diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/drivers/crypto/fsl/Kconfig | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/drivers/crypto/fsl/Kconfig')
| -rw-r--r-- | roms/u-boot/drivers/crypto/fsl/Kconfig | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/roms/u-boot/drivers/crypto/fsl/Kconfig b/roms/u-boot/drivers/crypto/fsl/Kconfig new file mode 100644 index 000000000..1f5dfb94b --- /dev/null +++ b/roms/u-boot/drivers/crypto/fsl/Kconfig @@ -0,0 +1,67 @@ +config FSL_CAAM + bool "Freescale Crypto Driver Support" + select SHA_HW_ACCEL + imply CMD_HASH + help + Enables the Freescale's Cryptographic Accelerator and Assurance + Module (CAAM), also known as the SEC version 4 (SEC4). The driver uses + Job Ring as interface to communicate with CAAM. + +config CAAM_64BIT + bool + default y if PHYS_64BIT && !ARCH_IMX8M + help + Select Crypto driver for 64 bits CAAM version + +config SYS_FSL_HAS_SEC + bool + help + Enable Freescale Secure Boot and Trusted Architecture + +config SYS_FSL_SEC_COMPAT_2 + bool + help + Secure boot and trust architecture compatible version 2 + +config SYS_FSL_SEC_COMPAT_4 + bool + help + Secure boot and trust architecture compatible version 4 + +config SYS_FSL_SEC_COMPAT_5 + bool + help + Secure boot and trust architecture compatible version 5 + +config SYS_FSL_SEC_COMPAT_6 + bool + help + Secure boot and trust architecture compatible version 6 + +config SYS_FSL_SEC_BE + bool "Big-endian access to Freescale Secure Boot" + +config SYS_FSL_SEC_COMPAT + int "Freescale Secure Boot compatibility" + depends on SYS_FSL_HAS_SEC + default 2 if SYS_FSL_SEC_COMPAT_2 + default 4 if SYS_FSL_SEC_COMPAT_4 + default 5 if SYS_FSL_SEC_COMPAT_5 + default 6 if SYS_FSL_SEC_COMPAT_6 + +config SYS_FSL_SEC_LE + bool "Little-endian access to Freescale Secure Boot" + +if FSL_CAAM + +config FSL_CAAM_RNG + bool "Enable Random Number Generator support" + depends on DM_RNG + default y + help + Enable support for the hardware based random number generator + module of the CAAM. The random data is fetched from the DRGB + using the prediction resistance flag which means the DRGB is + reseeded from the TRNG every time random data is generated. + +endif |