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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/include/configs/sama5d2_ptc_ek.h | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/include/configs/sama5d2_ptc_ek.h')
-rw-r--r-- | roms/u-boot/include/configs/sama5d2_ptc_ek.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/roms/u-boot/include/configs/sama5d2_ptc_ek.h b/roms/u-boot/include/configs/sama5d2_ptc_ek.h new file mode 100644 index 000000000..f42e26a0e --- /dev/null +++ b/roms/u-boot/include/configs/sama5d2_ptc_ek.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA5D2 PTC EK Board. + * + * Copyright (C) 2017 Microchip Technology Inc. + * Wenyou Yang <wenyou.yang@microchip.com> + * Ludovic Desroches <ludovic.desroches@microchip.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "at91-sama5_common.h" + +#undef CONFIG_SYS_AT91_MAIN_CLOCK +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* NAND Flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE BIT(21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE BIT(22) +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif + +#endif /* __CONFIG_H */ |