diff options
Diffstat (limited to 'capstone/suite/MC/ARM')
92 files changed, 6256 insertions, 0 deletions
diff --git a/capstone/suite/MC/ARM/arm-aliases.s.cs b/capstone/suite/MC/ARM/arm-aliases.s.cs new file mode 100644 index 000000000..8f3b66ff7 --- /dev/null +++ b/capstone/suite/MC/ARM/arm-aliases.s.cs @@ -0,0 +1,7 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x03,0x10,0x82,0xe0 = add r1, r2, r3 +0x03,0x10,0x42,0xe0 = sub r1, r2, r3 +0x03,0x10,0x22,0xe0 = eor r1, r2, r3 +0x03,0x10,0x82,0xe1 = orr r1, r2, r3 +0x03,0x10,0x02,0xe0 = and r1, r2, r3 +0x03,0x10,0xc2,0xe1 = bic r1, r2, r3 diff --git a/capstone/suite/MC/ARM/arm-arithmetic-aliases.s.cs b/capstone/suite/MC/ARM/arm-arithmetic-aliases.s.cs new file mode 100644 index 000000000..75139c63f --- /dev/null +++ b/capstone/suite/MC/ARM/arm-arithmetic-aliases.s.cs @@ -0,0 +1,50 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x06,0x20,0x42,0xe2 = sub r2, r2, #6 +0x06,0x20,0x42,0xe2 = sub r2, r2, #6 +0x03,0x20,0x42,0xe0 = sub r2, r2, r3 +0x03,0x20,0x42,0xe0 = sub r2, r2, r3 +0x06,0x20,0x82,0xe2 = add r2, r2, #6 +0x06,0x20,0x82,0xe2 = add r2, r2, #6 +0x03,0x20,0x82,0xe0 = add r2, r2, r3 +0x03,0x20,0x82,0xe0 = add r2, r2, r3 +0x06,0x20,0x02,0xe2 = and r2, r2, #6 +0x06,0x20,0x02,0xe2 = and r2, r2, #6 +0x03,0x20,0x02,0xe0 = and r2, r2, r3 +0x03,0x20,0x02,0xe0 = and r2, r2, r3 +0x06,0x20,0x82,0xe3 = orr r2, r2, #6 +0x06,0x20,0x82,0xe3 = orr r2, r2, #6 +0x03,0x20,0x82,0xe1 = orr r2, r2, r3 +0x03,0x20,0x82,0xe1 = orr r2, r2, r3 +0x06,0x20,0x22,0xe2 = eor r2, r2, #6 +0x06,0x20,0x22,0xe2 = eor r2, r2, #6 +0x03,0x20,0x22,0xe0 = eor r2, r2, r3 +0x03,0x20,0x22,0xe0 = eor r2, r2, r3 +0x06,0x20,0xc2,0xe3 = bic r2, r2, #6 +0x06,0x20,0xc2,0xe3 = bic r2, r2, #6 +0x03,0x20,0xc2,0xe1 = bic r2, r2, r3 +0x03,0x20,0xc2,0xe1 = bic r2, r2, r3 +0x06,0x20,0x52,0x02 = subseq r2, r2, #6 +0x06,0x20,0x52,0x02 = subseq r2, r2, #6 +0x03,0x20,0x52,0x00 = subseq r2, r2, r3 +0x03,0x20,0x52,0x00 = subseq r2, r2, r3 +0x06,0x20,0x92,0x02 = addseq r2, r2, #6 +0x06,0x20,0x92,0x02 = addseq r2, r2, #6 +0x03,0x20,0x92,0x00 = addseq r2, r2, r3 +0x03,0x20,0x92,0x00 = addseq r2, r2, r3 +0x06,0x20,0x12,0x02 = andseq r2, r2, #6 +0x06,0x20,0x12,0x02 = andseq r2, r2, #6 +0x03,0x20,0x12,0x00 = andseq r2, r2, r3 +0x03,0x20,0x12,0x00 = andseq r2, r2, r3 +0x06,0x20,0x92,0x03 = orrseq r2, r2, #6 +0x06,0x20,0x92,0x03 = orrseq r2, r2, #6 +0x03,0x20,0x92,0x01 = orrseq r2, r2, r3 +0x03,0x20,0x92,0x01 = orrseq r2, r2, r3 +0x06,0x20,0x32,0x02 = eorseq r2, r2, #6 +0x06,0x20,0x32,0x02 = eorseq r2, r2, #6 +0x03,0x20,0x32,0x00 = eorseq r2, r2, r3 +0x03,0x20,0x32,0x00 = eorseq r2, r2, r3 +0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6 +0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6 +0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3 +0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3 +0x7b,0x00,0x8f,0xe2 = add r0, pc, #123 diff --git a/capstone/suite/MC/ARM/arm-it-block.s.cs b/capstone/suite/MC/ARM/arm-it-block.s.cs new file mode 100644 index 000000000..caf1d5758 --- /dev/null +++ b/capstone/suite/MC/ARM/arm-it-block.s.cs @@ -0,0 +1,2 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x03,0x20,0xa0,0x01 = moveq r2, r3 diff --git a/capstone/suite/MC/ARM/arm-memory-instructions.s.cs b/capstone/suite/MC/ARM/arm-memory-instructions.s.cs new file mode 100644 index 000000000..8951802c9 --- /dev/null +++ b/capstone/suite/MC/ARM/arm-memory-instructions.s.cs @@ -0,0 +1,138 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x00,0x50,0x97,0xe5 = ldr r5, [r7] +0x3f,0x60,0x93,0xe5 = ldr r6, [r3, #63] +0xff,0x2f,0xb4,0xe5 = ldr r2, [r4, #4095]! +0x1e,0x10,0x92,0xe4 = ldr r1, [r2], #30 +0x1e,0x30,0x11,0xe4 = ldr r3, [r1], #-30 +0x00,0x90,0x12,0xe4 = ldr r9, [r2], #-0 +0x01,0x30,0x98,0xe7 = ldr r3, [r8, r1] +0x03,0x20,0x15,0xe7 = ldr r2, [r5, -r3] +0x09,0x10,0xb5,0xe7 = ldr r1, [r5, r9]! +0x08,0x60,0x37,0xe7 = ldr r6, [r7, -r8]! +0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]! +0x02,0x50,0x99,0xe6 = ldr r5, [r9], r2 +0x06,0x40,0x13,0xe6 = ldr r4, [r3], -r6 +0x82,0x37,0x18,0xe7 = ldr r3, [r8, -r2, lsl #15] +0xc3,0x17,0x95,0xe6 = ldr r1, [r5], r3, asr #15 +0x00,0x30,0xd8,0xe5 = ldrb r3, [r8] +0x3f,0x10,0xdd,0xe5 = ldrb r1, [sp, #63] +0xff,0x9f,0xf3,0xe5 = ldrb r9, [r3, #4095]! +0x16,0x80,0xd1,0xe4 = ldrb r8, [r1], #22 +0x13,0x20,0x57,0xe4 = ldrb r2, [r7], #-19 +0x05,0x90,0xd8,0xe7 = ldrb r9, [r8, r5] +0x01,0x10,0x55,0xe7 = ldrb r1, [r5, -r1] +0x02,0x30,0xf5,0xe7 = ldrb r3, [r5, r2]! +0x03,0x60,0x79,0xe7 = ldrb r6, [r9, -r3]! +0x04,0x20,0xd1,0xe6 = ldrb r2, [r1], r4 +0x05,0x80,0x54,0xe6 = ldrb r8, [r4], -r5 +0x81,0x77,0x5c,0xe7 = ldrb r7, [r12, -r1, lsl #15] +0xc9,0x57,0xd2,0xe6 = ldrb r5, [r2], r9, asr #15 +0x04,0x30,0xf1,0xe4 = ldrbt r3, [r1], #4 +0x08,0x20,0x78,0xe4 = ldrbt r2, [r8], #-8 +0x06,0x80,0xf7,0xe6 = ldrbt r8, [r7], r6 +0x06,0x16,0x72,0xe6 = ldrbt r1, [r2], -r6, lsl #12 +0xd0,0x20,0xc5,0xe1 = ldrd r2, r3, [r5] +0xdf,0x60,0xc2,0xe1 = ldrd r6, r7, [r2, #15] +0xd0,0x02,0xe9,0xe1 = ldrd r0, r1, [r9, #32]! +0xd8,0x60,0xc1,0xe0 = ldrd r6, r7, [r1], #8 +0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0 +0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0 +0xd0,0x00,0x48,0xe0 = ldrd r0, r1, [r8], #-0 +0xd3,0x40,0x81,0xe1 = ldrd r4, r5, [r1, r3] +0xd2,0x40,0xa7,0xe1 = ldrd r4, r5, [r7, r2]! +0xdc,0x00,0x88,0xe0 = ldrd r0, r1, [r8], r12 +0xdc,0x00,0x08,0xe0 = ldrd r0, r1, [r8], -r12 +0xb0,0x30,0xd4,0xe1 = ldrh r3, [r4] +0xb4,0x20,0xd7,0xe1 = ldrh r2, [r7, #4] +0xb0,0x14,0xf8,0xe1 = ldrh r1, [r8, #64]! +0xb4,0xc0,0xdd,0xe0 = ldrh ip, [sp], #4 +0xb4,0x60,0x95,0xe1 = ldrh r6, [r5, r4] +0xbb,0x30,0xb8,0xe1 = ldrh r3, [r8, r11]! +0xb1,0x10,0x32,0xe1 = ldrh r1, [r2, -r1]! +0xb2,0x90,0x97,0xe0 = ldrh r9, [r7], r2 +0xb2,0x40,0x13,0xe0 = ldrh r4, [r3], -r2 +0xb0,0x98,0xf7,0xe0 = ldrht r9, [r7], #128 +0xbb,0x44,0x73,0xe0 = ldrht r4, [r3], #-75 +0xb2,0x90,0xb7,0xe0 = ldrht r9, [r7], r2 +0xb2,0x40,0x33,0xe0 = ldrht r4, [r3], -r2 +0xd0,0x30,0xd4,0xe1 = ldrsb r3, [r4] +0xd1,0x21,0xd7,0xe1 = ldrsb r2, [r7, #17] +0xdf,0x1f,0xf8,0xe1 = ldrsb r1, [r8, #255]! +0xd9,0xc0,0xdd,0xe0 = ldrsb ip, [sp], #9 +0xd4,0x60,0x95,0xe1 = ldrsb r6, [r5, r4] +0xdb,0x30,0xb8,0xe1 = ldrsb r3, [r8, r11]! +0xd1,0x10,0x32,0xe1 = ldrsb r1, [r2, -r1]! +0xd2,0x90,0x97,0xe0 = ldrsb r9, [r7], r2 +0xd2,0x40,0x13,0xe0 = ldrsb r4, [r3], -r2 +0xd1,0x50,0xf6,0xe0 = ldrsbt r5, [r6], #1 +0xdc,0x30,0x78,0xe0 = ldrsbt r3, [r8], #-12 +0xd5,0x80,0xb9,0xe0 = ldrsbt r8, [r9], r5 +0xd4,0x20,0x31,0xe0 = ldrsbt r2, [r1], -r4 +0xf0,0x50,0xd9,0xe1 = ldrsh r5, [r9] +0xf7,0x40,0xd5,0xe1 = ldrsh r4, [r5, #7] +0xf7,0x33,0xf6,0xe1 = ldrsh r3, [r6, #55]! +0xf9,0x20,0x57,0xe0 = ldrsh r2, [r7], #-9 +0xf5,0x30,0x91,0xe1 = ldrsh r3, [r1, r5] +0xf1,0x40,0xb6,0xe1 = ldrsh r4, [r6, r1]! +0xf6,0x50,0x33,0xe1 = ldrsh r5, [r3, -r6]! +0xf8,0x60,0x99,0xe0 = ldrsh r6, [r9], r8 +0xf3,0x70,0x18,0xe0 = ldrsh r7, [r8], -r3 +0xf1,0x50,0xf6,0xe0 = ldrsht r5, [r6], #1 +0xfc,0x30,0x78,0xe0 = ldrsht r3, [r8], #-12 +0xf5,0x80,0xb9,0xe0 = ldrsht r8, [r9], r5 +0xf4,0x20,0x31,0xe0 = ldrsht r2, [r1], -r4 +0x00,0x80,0x8c,0xe5 = str r8, [r12] +0x0c,0x70,0x81,0xe5 = str r7, [r1, #12] +0x28,0x30,0xa5,0xe5 = str r3, [r5, #40]! +0xff,0x9f,0x8d,0xe4 = str sb, [sp], #4095 +0x80,0x10,0x07,0xe4 = str r1, [r7], #-128 +0x00,0x10,0x00,0xe4 = str r1, [r0], #-0 +0x03,0x90,0x86,0xe7 = str r9, [r6, r3] +0x02,0x80,0x00,0xe7 = str r8, [r0, -r2] +0x06,0x70,0xa1,0xe7 = str r7, [r1, r6]! +0x01,0x60,0x2d,0xe7 = str r6, [sp, -r1]! +0x09,0x50,0x83,0xe6 = str r5, [r3], r9 +0x05,0x40,0x02,0xe6 = str r4, [r2], -r5 +0x02,0x31,0x04,0xe7 = str r3, [r4, -r2, lsl #2] +0x43,0x2c,0x87,0xe6 = str r2, [r7], r3, asr #24 +0x00,0x90,0xc2,0xe5 = strb r9, [r2] +0x03,0x70,0xc1,0xe5 = strb r7, [r1, #3] +0x95,0x61,0xe4,0xe5 = strb r6, [r4, #405]! +0x48,0x50,0xc7,0xe4 = strb r5, [r7], #72 +0x01,0x10,0x4d,0xe4 = strb r1, [sp], #-1 +0x09,0x10,0xc2,0xe7 = strb r1, [r2, r9] +0x08,0x20,0x43,0xe7 = strb r2, [r3, -r8] +0x07,0x30,0xe4,0xe7 = strb r3, [r4, r7]! +0x06,0x40,0x65,0xe7 = strb r4, [r5, -r6]! +0x05,0x50,0xc6,0xe6 = strb r5, [r6], r5 +0x04,0x60,0x42,0xe6 = strb r6, [r2], -r4 +0x83,0x72,0x4c,0xe7 = strb r7, [r12, -r3, lsl #5] +0x42,0xd6,0xc7,0xe6 = strb sp, [r7], r2, asr #12 +0x0c,0x60,0xe2,0xe4 = strbt r6, [r2], #12 +0x0d,0x50,0x66,0xe4 = strbt r5, [r6], #-13 +0x05,0x40,0xe9,0xe6 = strbt r4, [r9], r5 +0x82,0x31,0x68,0xe6 = strbt r3, [r8], -r2, lsl #3 +0xf0,0x10,0xc4,0xe1 = strd r1, r2, [r4] +0xf1,0x20,0xc6,0xe1 = strd r2, r3, [r6, #1] +0xf6,0x31,0xe7,0xe1 = strd r3, r4, [r7, #22]! +0xf7,0x40,0xc8,0xe0 = strd r4, r5, [r8], #7 +0xf0,0x50,0xcd,0xe0 = strd r5, r6, [sp], #0 +0xf0,0x60,0xce,0xe0 = strd r6, r7, [lr], #0 +0xf0,0x70,0x49,0xe0 = strd r7, r8, [r9], #-0 +0xf1,0x80,0x84,0xe1 = strd r8, r9, [r4, r1] +0xf9,0x70,0xa3,0xe1 = strd r7, r8, [r3, r9]! +0xf8,0x60,0x85,0xe0 = strd r6, r7, [r5], r8 +0xfa,0x50,0x0c,0xe0 = strd r5, r6, [r12], -r10 +0xb0,0x30,0xc4,0xe1 = strh r3, [r4] +0xb4,0x20,0xc7,0xe1 = strh r2, [r7, #4] +0xb0,0x14,0xe8,0xe1 = strh r1, [r8, #64]! +0xb4,0xc0,0xcd,0xe0 = strh ip, [sp], #4 +0xb4,0x60,0x85,0xe1 = strh r6, [r5, r4] +0xbb,0x30,0xa8,0xe1 = strh r3, [r8, r11]! +0xb1,0x10,0x22,0xe1 = strh r1, [r2, -r1]! +0xb2,0x90,0x87,0xe0 = strh r9, [r7], r2 +0xb2,0x40,0x03,0xe0 = strh r4, [r3], -r2 +0xbc,0x24,0xe5,0xe0 = strht r2, [r5], #76 +0xb9,0x81,0x61,0xe0 = strht r8, [r1], #-25 +0xb4,0x50,0xa3,0xe0 = strht r5, [r3], r4 +0xb0,0x60,0x28,0xe0 = strht r6, [r8], -r0 diff --git a/capstone/suite/MC/ARM/arm-shift-encoding.s.cs b/capstone/suite/MC/ARM/arm-shift-encoding.s.cs new file mode 100644 index 000000000..130b773aa --- /dev/null +++ b/capstone/suite/MC/ARM/arm-shift-encoding.s.cs @@ -0,0 +1,50 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] +0x20,0x00,0x90,0xe7 = ldr r0, [r0, r0, lsr #32] +0x20,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsr #16] +0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] +0x00,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsl #16] +0x40,0x00,0x90,0xe7 = ldr r0, [r0, r0, asr #32] +0x40,0x08,0x90,0xe7 = ldr r0, [r0, r0, asr #16] +0x60,0x00,0x90,0xe7 = ldr r0, [r0, r0, rrx] +0x60,0x08,0x90,0xe7 = ldr r0, [r0, r0, ror #16] +0x00,0xf0,0xd0,0xf7 = pld [r0, r0] +0x20,0xf0,0xd0,0xf7 = pld [r0, r0, lsr #32] +0x20,0xf8,0xd0,0xf7 = pld [r0, r0, lsr #16] +0x00,0xf0,0xd0,0xf7 = pld [r0, r0] +0x00,0xf8,0xd0,0xf7 = pld [r0, r0, lsl #16] +0x40,0xf0,0xd0,0xf7 = pld [r0, r0, asr #32] +0x40,0xf8,0xd0,0xf7 = pld [r0, r0, asr #16] +0x60,0xf0,0xd0,0xf7 = pld [r0, r0, rrx] +0x60,0xf8,0xd0,0xf7 = pld [r0, r0, ror #16] +0x00,0x00,0x80,0xe7 = str r0, [r0, r0] +0x20,0x00,0x80,0xe7 = str r0, [r0, r0, lsr #32] +0x20,0x08,0x80,0xe7 = str r0, [r0, r0, lsr #16] +0x00,0x00,0x80,0xe7 = str r0, [r0, r0] +0x00,0x08,0x80,0xe7 = str r0, [r0, r0, lsl #16] +0x40,0x00,0x80,0xe7 = str r0, [r0, r0, asr #32] +0x40,0x08,0x80,0xe7 = str r0, [r0, r0, asr #16] +0x60,0x00,0x80,0xe7 = str r0, [r0, r0, rrx] +0x60,0x08,0x80,0xe7 = str r0, [r0, r0, ror #16] +0x62,0x00,0x91,0xe6 = ldr r0, [r1], r2, rrx +0x05,0x30,0x94,0xe6 = ldr r3, [r4], r5 +0x08,0x60,0x87,0xe6 = str r6, [r7], r8 +0x0b,0x90,0x8a,0xe6 = str r9, [r10], r11 +0x0f,0xd0,0xae,0xe0 = adc sp, lr, pc +0x29,0x10,0xa8,0xe0 = adc r1, r8, r9, lsr #32 +0x2f,0x28,0xa7,0xe0 = adc r2, r7, pc, lsr #16 +0x0a,0x30,0xa6,0xe0 = adc r3, r6, r10 +0x0e,0x48,0xa5,0xe0 = adc r4, r5, lr, lsl #16 +0x4b,0x50,0xa4,0xe0 = adc r5, r4, r11, asr #32 +0x4d,0x68,0xa3,0xe0 = adc r6, r3, sp, asr #16 +0x6c,0x70,0xa2,0xe0 = adc r7, r2, r12, rrx +0x60,0x88,0xa1,0xe0 = adc r8, r1, r0, ror #16 +0x0e,0x00,0x5d,0xe1 = cmp sp, lr +0x28,0x00,0x51,0xe1 = cmp r1, r8, lsr #32 +0x27,0x08,0x52,0xe1 = cmp r2, r7, lsr #16 +0x06,0x00,0x53,0xe1 = cmp r3, r6 +0x05,0x08,0x54,0xe1 = cmp r4, r5, lsl #16 +0x44,0x00,0x55,0xe1 = cmp r5, r4, asr #32 +0x43,0x08,0x56,0xe1 = cmp r6, r3, asr #16 +0x62,0x00,0x57,0xe1 = cmp r7, r2, rrx +0x61,0x08,0x58,0xe1 = cmp r8, r1, ror #16 diff --git a/capstone/suite/MC/ARM/arm-thumb-trustzone.s.cs b/capstone/suite/MC/ARM/arm-thumb-trustzone.s.cs new file mode 100644 index 000000000..a8428b5e5 --- /dev/null +++ b/capstone/suite/MC/ARM/arm-thumb-trustzone.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xff,0xf7,0x00,0x80 = smc #15 +0x0c,0xbf = ite eq diff --git a/capstone/suite/MC/ARM/arm-trustzone.s.cs b/capstone/suite/MC/ARM/arm-trustzone.s.cs new file mode 100644 index 000000000..163b06c0c --- /dev/null +++ b/capstone/suite/MC/ARM/arm-trustzone.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x7f,0x00,0x60,0xe1 = smc #15 +0x70,0x00,0x60,0x01 = smceq #0 diff --git a/capstone/suite/MC/ARM/arm_addrmode2.s.cs b/capstone/suite/MC/ARM/arm_addrmode2.s.cs new file mode 100644 index 000000000..4479254e0 --- /dev/null +++ b/capstone/suite/MC/ARM/arm_addrmode2.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x02,0x10,0xb0,0xe6 = ldrt r1, [r0], r2 +0xa2,0x11,0xb0,0xe6 = ldrt r1, [r0], r2, lsr #3 +0x04,0x10,0xb0,0xe4 = ldrt r1, [r0], #4 +0x02,0x10,0xf0,0xe6 = ldrbt r1, [r0], r2 +0xa2,0x11,0xf0,0xe6 = ldrbt r1, [r0], r2, lsr #3 +0x04,0x10,0xf0,0xe4 = ldrbt r1, [r0], #4 +0x02,0x10,0xa0,0xe6 = strt r1, [r0], r2 +0xa2,0x11,0xa0,0xe6 = strt r1, [r0], r2, lsr #3 +0x04,0x10,0xa0,0xe4 = strt r1, [r0], #4 +0x02,0x10,0xe0,0xe6 = strbt r1, [r0], r2 +0xa2,0x11,0xe0,0xe6 = strbt r1, [r0], r2, lsr #3 +0x04,0x10,0xe0,0xe4 = strbt r1, [r0], #4 +0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]! +0xa2,0x11,0xf0,0xe7 = ldrb r1, [r0, r2, lsr #3]! diff --git a/capstone/suite/MC/ARM/arm_addrmode3.s.cs b/capstone/suite/MC/ARM/arm_addrmode3.s.cs new file mode 100644 index 000000000..5dca005c8 --- /dev/null +++ b/capstone/suite/MC/ARM/arm_addrmode3.s.cs @@ -0,0 +1,9 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xd2,0x10,0xb0,0xe0 = ldrsbt r1, [r0], r2 +0xd4,0x10,0xf0,0xe0 = ldrsbt r1, [r0], #4 +0xf2,0x10,0xb0,0xe0 = ldrsht r1, [r0], r2 +0xf4,0x10,0xf0,0xe0 = ldrsht r1, [r0], #4 +0xb2,0x10,0xb0,0xe0 = ldrht r1, [r0], r2 +0xb4,0x10,0xf0,0xe0 = ldrht r1, [r0], #4 +0xb2,0x10,0xa0,0xe0 = strht r1, [r0], r2 +0xb4,0x10,0xe0,0xe0 = strht r1, [r0], #4 diff --git a/capstone/suite/MC/ARM/arm_instructions.s.cs b/capstone/suite/MC/ARM/arm_instructions.s.cs new file mode 100644 index 000000000..ec8aeaa5b --- /dev/null +++ b/capstone/suite/MC/ARM/arm_instructions.s.cs @@ -0,0 +1,25 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x1e,0xff,0x2f,0xe1 = bx lr +0xa0,0x0d,0xe1,0xf2 = vqdmull.s32 q8, d17, d16 +0x03,0x10,0x02,0xe0 = and r1, r2, r3 +0x03,0x10,0x12,0xe0 = ands r1, r2, r3 +0x03,0x10,0x22,0xe0 = eor r1, r2, r3 +0x03,0x10,0x32,0xe0 = eors r1, r2, r3 +0x03,0x10,0x42,0xe0 = sub r1, r2, r3 +0x03,0x10,0x52,0xe0 = subs r1, r2, r3 +0x03,0x10,0x82,0xe0 = add r1, r2, r3 +0x03,0x10,0x92,0xe0 = adds r1, r2, r3 +0x03,0x10,0xa2,0xe0 = adc r1, r2, r3 +0x03,0x10,0xc2,0xe1 = bic r1, r2, r3 +0x03,0x10,0xd2,0xe1 = bics r1, r2, r3 +0x02,0x10,0xa0,0xe1 = mov r1, r2 +0x02,0x10,0xe0,0xe1 = mvn r1, r2 +0x02,0x10,0xf0,0xe1 = mvns r1, r2 +0x90,0x02,0xcb,0xe7 = bfi r0, r0, #5, #7 +0x7a,0x00,0x20,0xe1 = bkpt #10 +0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4 +0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4 +0x13,0x14,0x82,0xe0 = add r1, r2, r3, lsl r4 +0x30,0x0f,0xa6,0xe6 = ssat16 r0, #7, r0 +0x00,0x00,0x0a,0xf1 = cpsie none, #0 +0xb0,0x30,0x42,0xe1 = strh r3, [r2, #-0] diff --git a/capstone/suite/MC/ARM/basic-arm-instructions-v8.s.cs b/capstone/suite/MC/ARM/basic-arm-instructions-v8.s.cs new file mode 100644 index 000000000..387f84588 --- /dev/null +++ b/capstone/suite/MC/ARM/basic-arm-instructions-v8.s.cs @@ -0,0 +1,10 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0x59,0xf0,0x7f,0xf5 = dmb ishld +0x51,0xf0,0x7f,0xf5 = dmb oshld +0x55,0xf0,0x7f,0xf5 = dmb nshld +0x5d,0xf0,0x7f,0xf5 = dmb ld +0x49,0xf0,0x7f,0xf5 = dsb ishld +0x41,0xf0,0x7f,0xf5 = dsb oshld +0x45,0xf0,0x7f,0xf5 = dsb nshld +0x4d,0xf0,0x7f,0xf5 = dsb ld +0x05,0xf0,0x20,0xe3 = sevl diff --git a/capstone/suite/MC/ARM/basic-arm-instructions.s.cs b/capstone/suite/MC/ARM/basic-arm-instructions.s.cs new file mode 100644 index 000000000..9a486d71e --- /dev/null +++ b/capstone/suite/MC/ARM/basic-arm-instructions.s.cs @@ -0,0 +1,996 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x0f,0x10,0xa2,0xe2 = adc r1, r2, #15 +0xf0,0x10,0xa2,0xe2 = adc r1, r2, #240 +0x0f,0x1c,0xa2,0xe2 = adc r1, r2, #3840 +0x0f,0x1a,0xa2,0xe2 = adc r1, r2, #61440 +0x0f,0x18,0xa2,0xe2 = adc r1, r2, #983040 +0x0f,0x16,0xa2,0xe2 = adc r1, r2, #15728640 +0x0f,0x14,0xa2,0xe2 = adc r1, r2, #251658240 +0x0f,0x12,0xa2,0xe2 = adc r1, r2, #4026531840 +0xff,0x12,0xa2,0xe2 = adc r1, r2, #4026531855 +0x0f,0x1c,0xb2,0xe2 = adcs r1, r2, #3840 +0x0f,0x1c,0xb2,0x02 = adcseq r1, r2, #3840 +0x0f,0x1c,0xa2,0x02 = adceq r1, r2, #3840 +0x06,0x40,0xa5,0xe0 = adc r4, r5, r6 +0x86,0x40,0xa5,0xe0 = adc r4, r5, r6, lsl #1 +0x86,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsl #31 +0xa6,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #1 +0xa6,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsr #31 +0x26,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #32 +0xc6,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #1 +0xc6,0x4f,0xa5,0xe0 = adc r4, r5, r6, asr #31 +0x46,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #32 +0xe6,0x40,0xa5,0xe0 = adc r4, r5, r6, ror #1 +0xe6,0x4f,0xa5,0xe0 = adc r4, r5, r6, ror #31 +0x18,0x69,0xa7,0xe0 = adc r6, r7, r8, lsl r9 +0x38,0x69,0xa7,0xe0 = adc r6, r7, r8, lsr r9 +0x58,0x69,0xa7,0xe0 = adc r6, r7, r8, asr r9 +0x78,0x69,0xa7,0xe0 = adc r6, r7, r8, ror r9 +0x66,0x40,0xa5,0xe0 = adc r4, r5, r6, rrx +0x06,0x50,0xa5,0xe0 = adc r5, r5, r6 +0x85,0x40,0xa4,0xe0 = adc r4, r4, r5, lsl #1 +0x85,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsl #31 +0xa5,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #1 +0xa5,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsr #31 +0x25,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #32 +0xc5,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #1 +0xc5,0x4f,0xa4,0xe0 = adc r4, r4, r5, asr #31 +0x45,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #32 +0xe5,0x40,0xa4,0xe0 = adc r4, r4, r5, ror #1 +0xe5,0x4f,0xa4,0xe0 = adc r4, r4, r5, ror #31 +0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx +0x17,0x69,0xa6,0xe0 = adc r6, r6, r7, lsl r9 +0x37,0x69,0xa6,0xe0 = adc r6, r6, r7, lsr r9 +0x57,0x69,0xa6,0xe0 = adc r6, r6, r7, asr r9 +0x77,0x69,0xa6,0xe0 = adc r6, r6, r7, ror r9 +0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx +0x0f,0x4a,0x85,0xe2 = add r4, r5, #61440 +0x06,0x40,0x85,0xe0 = add r4, r5, r6 +0x86,0x42,0x85,0xe0 = add r4, r5, r6, lsl #5 +0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5 +0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5 +0xc6,0x42,0x85,0xe0 = add r4, r5, r6, asr #5 +0xe6,0x42,0x85,0xe0 = add r4, r5, r6, ror #5 +0x18,0x69,0x87,0xe0 = add r6, r7, r8, lsl r9 +0x13,0x49,0x84,0xe0 = add r4, r4, r3, lsl r9 +0x38,0x69,0x87,0xe0 = add r6, r7, r8, lsr r9 +0x58,0x69,0x87,0xe0 = add r6, r7, r8, asr r9 +0x78,0x69,0x87,0xe0 = add r6, r7, r8, ror r9 +0x66,0x40,0x85,0xe0 = add r4, r5, r6, rrx +0x0f,0x5a,0x85,0xe2 = add r5, r5, #61440 +0x05,0x40,0x84,0xe0 = add r4, r4, r5 +0x85,0x42,0x84,0xe0 = add r4, r4, r5, lsl #5 +0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5 +0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5 +0xc5,0x42,0x84,0xe0 = add r4, r4, r5, asr #5 +0xe5,0x42,0x84,0xe0 = add r4, r4, r5, ror #5 +0x17,0x69,0x86,0xe0 = add r6, r6, r7, lsl r9 +0x37,0x69,0x86,0xe0 = add r6, r6, r7, lsr r9 +0x57,0x69,0x86,0xe0 = add r6, r6, r7, asr r9 +0x77,0x69,0x86,0xe0 = add r6, r6, r7, ror r9 +0x65,0x40,0x84,0xe0 = add r4, r4, r5, rrx +0x04,0x00,0x40,0xe2 = sub r0, r0, #4 +0x15,0x40,0x45,0xe2 = sub r4, r5, #21 +0x22,0x30,0x81,0xe0 = add r3, r1, r2, lsr #32 +0x42,0x30,0x81,0xe0 = add r3, r1, r2, asr #32 +0x0f,0xa0,0x01,0xe2 = and r10, r1, #15 +0x06,0xa0,0x01,0xe0 = and r10, r1, r6 +0x06,0xa5,0x01,0xe0 = and r10, r1, r6, lsl #10 +0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10 +0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10 +0x46,0xa5,0x01,0xe0 = and r10, r1, r6, asr #10 +0x66,0xa5,0x01,0xe0 = and r10, r1, r6, ror #10 +0x18,0x62,0x07,0xe0 = and r6, r7, r8, lsl r2 +0x38,0x62,0x07,0xe0 = and r6, r7, r8, lsr r2 +0x58,0x62,0x07,0xe0 = and r6, r7, r8, asr r2 +0x78,0x62,0x07,0xe0 = and r6, r7, r8, ror r2 +0x66,0xa0,0x01,0xe0 = and r10, r1, r6, rrx +0x02,0x21,0xc3,0xe3 = bic r2, r3, #-2147483648 +0x0f,0x10,0x01,0xe2 = and r1, r1, #15 +0x01,0xa0,0x0a,0xe0 = and r10, r10, r1 +0x01,0xa5,0x0a,0xe0 = and r10, r10, r1, lsl #10 +0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10 +0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10 +0x41,0xa5,0x0a,0xe0 = and r10, r10, r1, asr #10 +0x61,0xa5,0x0a,0xe0 = and r10, r10, r1, ror #10 +0x17,0x62,0x06,0xe0 = and r6, r6, r7, lsl r2 +0x37,0x62,0x06,0xe0 = and r6, r6, r7, lsr r2 +0x57,0x62,0x06,0xe0 = and r6, r6, r7, asr r2 +0x77,0x62,0x06,0xe0 = and r6, r6, r7, ror r2 +0x61,0xa0,0x0a,0xe0 = and r10, r10, r1, rrx +0x22,0x30,0x01,0xe0 = and r3, r1, r2, lsr #32 +0x42,0x30,0x01,0xe0 = and r3, r1, r2, asr #32 +0x44,0x20,0xa0,0xe1 = asr r2, r4, #32 +0x44,0x21,0xa0,0xe1 = asr r2, r4, #2 +0x04,0x20,0xa0,0xe1 = mov r2, r4 +0x44,0x41,0xa0,0xe1 = asr r4, r4, #2 +0x9f,0x51,0xd3,0xe7 = bfc r5, #3, #17 +0x9f,0x51,0xd3,0x37 = bfclo r5, #3, #17 +0x92,0x51,0xd3,0xe7 = bfi r5, r2, #3, #17 +0x92,0x51,0xd3,0x17 = bfine r5, r2, #3, #17 +0x0f,0xa0,0xc1,0xe3 = bic r10, r1, #15 +0x06,0xa0,0xc1,0xe1 = bic r10, r1, r6 +0x06,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsl #10 +0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10 +0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10 +0x46,0xa5,0xc1,0xe1 = bic r10, r1, r6, asr #10 +0x66,0xa5,0xc1,0xe1 = bic r10, r1, r6, ror #10 +0x18,0x62,0xc7,0xe1 = bic r6, r7, r8, lsl r2 +0x38,0x62,0xc7,0xe1 = bic r6, r7, r8, lsr r2 +0x58,0x62,0xc7,0xe1 = bic r6, r7, r8, asr r2 +0x78,0x62,0xc7,0xe1 = bic r6, r7, r8, ror r2 +0x66,0xa0,0xc1,0xe1 = bic r10, r1, r6, rrx +0x0f,0x10,0xc1,0xe3 = bic r1, r1, #15 +0x01,0xa0,0xca,0xe1 = bic r10, r10, r1 +0x01,0xa5,0xca,0xe1 = bic r10, r10, r1, lsl #10 +0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10 +0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10 +0x41,0xa5,0xca,0xe1 = bic r10, r10, r1, asr #10 +0x61,0xa5,0xca,0xe1 = bic r10, r10, r1, ror #10 +0x17,0x62,0xc6,0xe1 = bic r6, r6, r7, lsl r2 +0x37,0x62,0xc6,0xe1 = bic r6, r6, r7, lsr r2 +0x57,0x62,0xc6,0xe1 = bic r6, r6, r7, asr r2 +0x77,0x62,0xc6,0xe1 = bic r6, r6, r7, ror r2 +0x61,0xa0,0xca,0xe1 = bic r10, r10, r1, rrx +0x22,0x30,0xc1,0xe1 = bic r3, r1, r2, lsr #32 +0x42,0x30,0xc1,0xe1 = bic r3, r1, r2, asr #32 +0x7a,0x00,0x20,0xe1 = bkpt #10 +0x7f,0xff,0x2f,0xe1 = bkpt #65535 +0x27,0x3b,0x6d,0x9b = blls #28634276 +0xa0,0xb0,0x7b,0xfa = blx #32424584 +0x50,0xd8,0x3d,0xfa = blx #16212296 +0x32,0xff,0x2f,0xe1 = blx r2 +0x32,0xff,0x2f,0x11 = blxne r2 +0x12,0xff,0x2f,0xe1 = bx r2 +0x12,0xff,0x2f,0x11 = bxne r2 +0x22,0xff,0x2f,0xe1 = bxj r2 +0x22,0xff,0x2f,0x11 = bxjne r2 +0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4 +0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4 +0xe0,0x6c,0x0c,0xfe = cdp2 p12, #0, c6, c12, c0, #7 +0x81,0x17,0x11,0x1e = cdpne p7, #1, c1, c1, c1, #4 +0x1f,0xf0,0x7f,0xf5 = clrex +0x12,0x1f,0x6f,0xe1 = clz r1, r2 +0x12,0x1f,0x6f,0x01 = clzeq r1, r2 +0x0f,0x00,0x71,0xe3 = cmn r1, #15 +0x06,0x00,0x71,0xe1 = cmn r1, r6 +0x06,0x05,0x71,0xe1 = cmn r1, r6, lsl #10 +0x26,0x05,0x71,0xe1 = cmn r1, r6, lsr #10 +0x26,0x05,0x7d,0xe1 = cmn sp, r6, lsr #10 +0x46,0x05,0x71,0xe1 = cmn r1, r6, asr #10 +0x66,0x05,0x71,0xe1 = cmn r1, r6, ror #10 +0x18,0x02,0x77,0xe1 = cmn r7, r8, lsl r2 +0x38,0x02,0x7d,0xe1 = cmn sp, r8, lsr r2 +0x58,0x02,0x77,0xe1 = cmn r7, r8, asr r2 +0x78,0x02,0x77,0xe1 = cmn r7, r8, ror r2 +0x66,0x00,0x71,0xe1 = cmn r1, r6, rrx +0x0f,0x00,0x51,0xe3 = cmp r1, #15 +0x06,0x00,0x51,0xe1 = cmp r1, r6 +0x06,0x05,0x51,0xe1 = cmp r1, r6, lsl #10 +0x26,0x05,0x51,0xe1 = cmp r1, r6, lsr #10 +0x26,0x05,0x5d,0xe1 = cmp sp, r6, lsr #10 +0x46,0x05,0x51,0xe1 = cmp r1, r6, asr #10 +0x66,0x05,0x51,0xe1 = cmp r1, r6, ror #10 +0x18,0x02,0x57,0xe1 = cmp r7, r8, lsl r2 +0x38,0x02,0x5d,0xe1 = cmp sp, r8, lsr r2 +0x58,0x02,0x57,0xe1 = cmp r7, r8, asr r2 +0x78,0x02,0x57,0xe1 = cmp r7, r8, ror r2 +0x66,0x00,0x51,0xe1 = cmp r1, r6, rrx +0x02,0x00,0x70,0xe3 = cmn r0, #2 +0x00,0x00,0x5e,0xe3 = cmp lr, #0 +0xc0,0x01,0x08,0xf1 = cpsie aif +0x0f,0x00,0x02,0xf1 = cps #15 +0xca,0x00,0x0e,0xf1 = cpsid if, #10 +0xf0,0xf0,0x20,0xe3 = dbg #0 +0xf5,0xf0,0x20,0xe3 = dbg #5 +0xff,0xf0,0x20,0xe3 = dbg #15 +0x5f,0xf0,0x7f,0xf5 = dmb sy +0x5e,0xf0,0x7f,0xf5 = dmb st +0x5d,0xf0,0x7f,0xf5 = dmb #0xd +0x5c,0xf0,0x7f,0xf5 = dmb #0xc +0x5b,0xf0,0x7f,0xf5 = dmb ish +0x5a,0xf0,0x7f,0xf5 = dmb ishst +0x59,0xf0,0x7f,0xf5 = dmb #0x9 +0x58,0xf0,0x7f,0xf5 = dmb #0x8 +0x57,0xf0,0x7f,0xf5 = dmb nsh +0x56,0xf0,0x7f,0xf5 = dmb nshst +0x55,0xf0,0x7f,0xf5 = dmb #0x5 +0x54,0xf0,0x7f,0xf5 = dmb #0x4 +0x53,0xf0,0x7f,0xf5 = dmb osh +0x52,0xf0,0x7f,0xf5 = dmb oshst +0x51,0xf0,0x7f,0xf5 = dmb #0x1 +0x50,0xf0,0x7f,0xf5 = dmb #0x0 +0x5f,0xf0,0x7f,0xf5 = dmb sy +0x5e,0xf0,0x7f,0xf5 = dmb st +0x5b,0xf0,0x7f,0xf5 = dmb ish +0x5b,0xf0,0x7f,0xf5 = dmb ish +0x5a,0xf0,0x7f,0xf5 = dmb ishst +0x5a,0xf0,0x7f,0xf5 = dmb ishst +0x57,0xf0,0x7f,0xf5 = dmb nsh +0x57,0xf0,0x7f,0xf5 = dmb nsh +0x56,0xf0,0x7f,0xf5 = dmb nshst +0x56,0xf0,0x7f,0xf5 = dmb nshst +0x53,0xf0,0x7f,0xf5 = dmb osh +0x52,0xf0,0x7f,0xf5 = dmb oshst +0x5f,0xf0,0x7f,0xf5 = dmb sy +0x4f,0xf0,0x7f,0xf5 = dsb sy +0x4e,0xf0,0x7f,0xf5 = dsb st +0x4d,0xf0,0x7f,0xf5 = dsb #0xd +0x4b,0xf0,0x7f,0xf5 = dsb ish +0x4a,0xf0,0x7f,0xf5 = dsb ishst +0x49,0xf0,0x7f,0xf5 = dsb #0x9 +0x48,0xf0,0x7f,0xf5 = dsb #0x8 +0x47,0xf0,0x7f,0xf5 = dsb nsh +0x46,0xf0,0x7f,0xf5 = dsb nshst +0x45,0xf0,0x7f,0xf5 = dsb #0x5 +0x44,0xf0,0x7f,0xf5 = dsb #0x4 +0x43,0xf0,0x7f,0xf5 = dsb osh +0x42,0xf0,0x7f,0xf5 = dsb oshst +0x41,0xf0,0x7f,0xf5 = dsb #0x1 +0x40,0xf0,0x7f,0xf5 = dsb #0x0 +0x48,0xf0,0x7f,0xf5 = dsb #0x8 +0x47,0xf0,0x7f,0xf5 = dsb nsh +0x4f,0xf0,0x7f,0xf5 = dsb sy +0x4e,0xf0,0x7f,0xf5 = dsb st +0x4b,0xf0,0x7f,0xf5 = dsb ish +0x4b,0xf0,0x7f,0xf5 = dsb ish +0x4a,0xf0,0x7f,0xf5 = dsb ishst +0x4a,0xf0,0x7f,0xf5 = dsb ishst +0x47,0xf0,0x7f,0xf5 = dsb nsh +0x47,0xf0,0x7f,0xf5 = dsb nsh +0x46,0xf0,0x7f,0xf5 = dsb nshst +0x46,0xf0,0x7f,0xf5 = dsb nshst +0x43,0xf0,0x7f,0xf5 = dsb osh +0x42,0xf0,0x7f,0xf5 = dsb oshst +0x4f,0xf0,0x7f,0xf5 = dsb sy +0x4f,0xf0,0x7f,0xf5 = dsb sy +0x42,0xf0,0x7f,0xf5 = dsb oshst +0x0f,0x4a,0x25,0xe2 = eor r4, r5, #61440 +0x06,0x40,0x25,0xe0 = eor r4, r5, r6 +0x86,0x42,0x25,0xe0 = eor r4, r5, r6, lsl #5 +0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5 +0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5 +0xc6,0x42,0x25,0xe0 = eor r4, r5, r6, asr #5 +0xe6,0x42,0x25,0xe0 = eor r4, r5, r6, ror #5 +0x18,0x69,0x27,0xe0 = eor r6, r7, r8, lsl r9 +0x38,0x69,0x27,0xe0 = eor r6, r7, r8, lsr r9 +0x58,0x69,0x27,0xe0 = eor r6, r7, r8, asr r9 +0x78,0x69,0x27,0xe0 = eor r6, r7, r8, ror r9 +0x66,0x40,0x25,0xe0 = eor r4, r5, r6, rrx +0x0f,0x5a,0x25,0xe2 = eor r5, r5, #61440 +0x05,0x40,0x24,0xe0 = eor r4, r4, r5 +0x85,0x42,0x24,0xe0 = eor r4, r4, r5, lsl #5 +0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5 +0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5 +0xc5,0x42,0x24,0xe0 = eor r4, r4, r5, asr #5 +0xe5,0x42,0x24,0xe0 = eor r4, r4, r5, ror #5 +0x17,0x69,0x26,0xe0 = eor r6, r6, r7, lsl r9 +0x37,0x69,0x26,0xe0 = eor r6, r6, r7, lsr r9 +0x57,0x69,0x26,0xe0 = eor r6, r6, r7, asr r9 +0x77,0x69,0x26,0xe0 = eor r6, r6, r7, ror r9 +0x65,0x40,0x24,0xe0 = eor r4, r4, r5, rrx +0x22,0x30,0x21,0xe0 = eor r3, r1, r2, lsr #32 +0x42,0x30,0x21,0xe0 = eor r3, r1, r2, asr #32 +0x6f,0xf0,0x7f,0xf5 = isb sy +0x6f,0xf0,0x7f,0xf5 = isb sy +0x6f,0xf0,0x7f,0xf5 = isb sy +0x61,0xf0,0x7f,0xf5 = isb #0x1 +0x01,0x80,0x91,0xfd = ldc2 p0, c8, [r1, #4] +0x00,0x71,0x92,0xfd = ldc2 p1, c7, [r2] +0x38,0x62,0x13,0xfd = ldc2 p2, c6, [r3, #-224] +0x1e,0x53,0x34,0xfd = ldc2 p3, c5, [r4, #-120]! +0x04,0x44,0xb5,0xfc = ldc2 p4, c4, [r5], #16 +0x12,0x35,0x36,0xfc = ldc2 p5, c3, [r6], #-72 +0x01,0x26,0xd7,0xfd = ldc2l p6, c2, [r7, #4] +0x00,0x17,0xd8,0xfd = ldc2l p7, c1, [r8] +0x38,0x08,0x59,0xfd = ldc2l p8, c0, [r9, #-224] +0x1e,0x19,0x7a,0xfd = ldc2l p9, c1, [r10, #-120]! +0x04,0x20,0xfb,0xfc = ldc2l p0, c2, [r11], #16 +0x12,0x31,0x7c,0xfc = ldc2l p1, c3, [r12], #-72 +0x01,0x4c,0x90,0xed = ldc p12, c4, [r0, #4] +0x00,0x5d,0x91,0xed = ldc p13, c5, [r1] +0x38,0x6e,0x12,0xed = ldc p14, c6, [r2, #-224] +0x1e,0x7f,0x33,0xed = ldc p15, c7, [r3, #-120]! +0x04,0x85,0xb4,0xec = ldc p5, c8, [r4], #16 +0x12,0x94,0x35,0xec = ldc p4, c9, [r5], #-72 +0x01,0xa3,0xd6,0xed = ldcl p3, c10, [r6, #4] +0x00,0xb2,0xd7,0xed = ldcl p2, c11, [r7] +0x38,0xc1,0x58,0xed = ldcl p1, c12, [r8, #-224] +0x1e,0xd0,0x79,0xed = ldcl p0, c13, [r9, #-120]! +0x04,0xe6,0xfa,0xec = ldcl p6, c14, [r10], #16 +0x12,0xf7,0x7b,0xec = ldcl p7, c15, [r11], #-72 +0x01,0x4c,0x90,0x3d = ldclo p12, c4, [r0, #4] +0x00,0x5d,0x91,0x8d = ldchi p13, c5, [r1] +0x38,0x6e,0x12,0x2d = ldchs p14, c6, [r2, #-224] +0x1e,0x7f,0x33,0x3d = ldclo p15, c7, [r3, #-120]! +0x04,0x85,0xb4,0x0c = ldceq p5, c8, [r4], #16 +0x12,0x94,0x35,0xcc = ldcgt p4, c9, [r5], #-72 +0x01,0xa3,0xd6,0xbd = ldcllt p3, c10, [r6, #4] +0x00,0xb2,0xd7,0xad = ldclge p2, c11, [r7] +0x38,0xc1,0x58,0xdd = ldclle p1, c12, [r8, #-224] +0x1e,0xd0,0x79,0x1d = ldclne p0, c13, [r9, #-120]! +0x04,0xe6,0xfa,0x0c = ldcleq p6, c14, [r10], #16 +0x12,0xf7,0x7b,0x8c = ldclhi p7, c15, [r11], #-72 +0x19,0x82,0x91,0xfc = ldc2 p2, c8, [r1], {25} +0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x92,0xe9 = ldmib r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x12,0xe8 = ldmda r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x12,0xe9 = ldmdb r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0xb2,0xe8 = ldm r2!, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0xb2,0xe9 = ldmib r2!, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x32,0xe8 = ldmda r2!, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x32,0xe9 = ldmdb r2!, {r1, r3, r4, r5, r6, sp} +0x05,0x40,0xd0,0xe8 = ldm r0, {r0, r2, lr} ^ +0x0f,0x80,0xfd,0xe8 = ldm sp!, {r0, r1, r2, r3, pc} ^ +0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4] +0x9f,0x2f,0xf5,0xe1 = ldrexh r2, [r5] +0x9f,0x1f,0x97,0xe1 = ldrex r1, [r7] +0x9f,0x6f,0xb8,0xe1 = ldrexd r6, r7, [r8] +0xb0,0x80,0x7b,0x80 = ldrhthi r8, [r11], #-0 +0xb0,0x80,0xfb,0x80 = ldrhthi r8, [r11], #0 +0x84,0x2f,0xa0,0xe1 = lsl r2, r4, #31 +0x84,0x20,0xa0,0xe1 = lsl r2, r4, #1 +0x04,0x20,0xa0,0xe1 = mov r2, r4 +0x84,0x40,0xa0,0xe1 = lsl r4, r4, #1 +0x24,0x20,0xa0,0xe1 = lsr r2, r4, #32 +0x24,0x21,0xa0,0xe1 = lsr r2, r4, #2 +0x04,0x20,0xa0,0xe1 = mov r2, r4 +0x24,0x41,0xa0,0xe1 = lsr r4, r4, #2 +0x91,0x57,0x21,0xee = mcr p7, #1, r5, c1, c1, #4 +0x91,0x57,0x21,0xfe = mcr2 p7, #1, r5, c1, c1, #4 +0x91,0x57,0x21,0x9e = mcrls p7, #1, r5, c1, c1, #4 +0xf1,0x57,0x44,0xec = mcrr p7, #15, r5, r4, c1 +0xf1,0x57,0x44,0xfc = mcrr2 p7, #15, r5, r4, c1 +0xf1,0x57,0x44,0xcc = mcrrgt p7, #15, r5, r4, c1 +0x92,0x43,0x21,0xe0 = mla r1, r2, r3, r4 +0x92,0x43,0x31,0xe0 = mlas r1, r2, r3, r4 +0x92,0x43,0x21,0x10 = mlane r1, r2, r3, r4 +0x92,0x43,0x31,0x10 = mlasne r1, r2, r3, r4 +0x95,0x36,0x62,0xe0 = mls r2, r5, r6, r3 +0x95,0x36,0x62,0x10 = mlsne r2, r5, r6, r3 +0x07,0x30,0xa0,0xe3 = mov r3, #7 +0xff,0x4e,0xa0,0xe3 = mov r4, #4080 +0xff,0x58,0xa0,0xe3 = mov r5, #16711680 +0xff,0x6f,0x0f,0xe3 = movw r6, #65535 +0xff,0x9f,0x0f,0xe3 = movw r9, #65535 +0x07,0x30,0xb0,0xe3 = movs r3, #7 +0xff,0x4e,0xa0,0x03 = moveq r4, #4080 +0xff,0x58,0xb0,0x03 = movseq r5, #16711680 +0x03,0x20,0xa0,0xe1 = mov r2, r3 +0x03,0x20,0xb0,0xe1 = movs r2, r3 +0x03,0x20,0xa0,0x01 = moveq r2, r3 +0x03,0x20,0xb0,0x01 = movseq r2, r3 +0x08,0xc0,0xa0,0xe1 = mov r12, r8 +0x03,0x20,0xa0,0xe1 = mov r2, r3 +0x08,0xc0,0xa0,0xe1 = mov r12, r8 +0x03,0x20,0xa0,0xe1 = mov r2, r3 +0x08,0xc0,0xa0,0xe1 = mov r12, r8 +0x03,0x20,0xa0,0xe1 = mov r2, r3 +0x08,0xc0,0xa0,0xe1 = mov r12, r8 +0x03,0x20,0xa0,0xe1 = mov r2, r3 +0x07,0x30,0x40,0xe3 = movt r3, #7 +0xff,0x6f,0x4f,0xe3 = movt r6, #65535 +0xf0,0x4f,0x40,0x03 = movteq r4, #4080 +0x92,0x1e,0x11,0xee = mrc p14, #0, r1, c1, c2, #4 +0xd6,0xff,0xff,0xee = mrc p15, #7, apsr_nzcv, c15, c6, #6 +0x92,0x1e,0x11,0xfe = mrc2 p14, #0, r1, c1, c2, #4 +0x30,0xf9,0xff,0xfe = mrc2 p9, #7, apsr_nzcv, c15, c0, #1 +0xd6,0xff,0xff,0x0e = mrceq p15, #7, apsr_nzcv, c15, c6, #6 +0x11,0x57,0x54,0xec = mrrc p7, #1, r5, r4, c1 +0x11,0x57,0x54,0xfc = mrrc2 p7, #1, r5, r4, c1 +0x11,0x57,0x54,0x3c = mrrclo p7, #1, r5, r4, c1 +0x00,0x80,0x0f,0xe1 = mrs r8, apsr +0x00,0x80,0x0f,0xe1 = mrs r8, apsr +0x00,0x80,0x4f,0xe1 = mrs r8, spsr +0x05,0xf0,0x28,0xe3 = msr apsr_nzcvq, #5 +0x05,0xf0,0x24,0xe3 = msr apsr_g, #5 +0x05,0xf0,0x28,0xe3 = msr apsr_nzcvq, #5 +0x05,0xf0,0x28,0xe3 = msr apsr_nzcvq, #5 +0x05,0xf0,0x2c,0xe3 = msr apsr_nzcvqg, #5 +0x05,0xf0,0x29,0xe3 = msr cpsr_fc, #5 +0x05,0xf0,0x21,0xe3 = msr cpsr_c, #5 +0x05,0xf0,0x22,0xe3 = msr cpsr_x, #5 +0x05,0xf0,0x29,0xe3 = msr cpsr_fc, #5 +0x05,0xf0,0x29,0xe3 = msr cpsr_fc, #5 +0x05,0xf0,0x2e,0xe3 = msr cpsr_fsx, #5 +0x05,0xf0,0x69,0xe3 = msr spsr_fc, #5 +0x05,0xf0,0x6f,0xe3 = msr spsr_fsxc, #5 +0x05,0xf0,0x2f,0xe3 = msr cpsr_fsxc, #5 +0x00,0xf0,0x28,0xe1 = msr apsr_nzcvq, r0 +0x00,0xf0,0x24,0xe1 = msr apsr_g, r0 +0x00,0xf0,0x28,0xe1 = msr apsr_nzcvq, r0 +0x00,0xf0,0x28,0xe1 = msr apsr_nzcvq, r0 +0x00,0xf0,0x2c,0xe1 = msr apsr_nzcvqg, r0 +0x00,0xf0,0x29,0xe1 = msr cpsr_fc, r0 +0x00,0xf0,0x21,0xe1 = msr cpsr_c, r0 +0x00,0xf0,0x22,0xe1 = msr cpsr_x, r0 +0x00,0xf0,0x29,0xe1 = msr cpsr_fc, r0 +0x00,0xf0,0x29,0xe1 = msr cpsr_fc, r0 +0x00,0xf0,0x2e,0xe1 = msr cpsr_fsx, r0 +0x00,0xf0,0x69,0xe1 = msr spsr_fc, r0 +0x00,0xf0,0x6f,0xe1 = msr spsr_fsxc, r0 +0x00,0xf0,0x2f,0xe1 = msr cpsr_fsxc, r0 +0x96,0x07,0x05,0xe0 = mul r5, r6, r7 +0x96,0x07,0x15,0xe0 = muls r5, r6, r7 +0x96,0x07,0x05,0xc0 = mulgt r5, r6, r7 +0x96,0x07,0x15,0xd0 = mulsle r5, r6, r7 +0x07,0x30,0xe0,0xe3 = mvn r3, #7 +0xff,0x4e,0xe0,0xe3 = mvn r4, #4080 +0xff,0x58,0xe0,0xe3 = mvn r5, #16711680 +0x07,0x30,0xf0,0xe3 = mvns r3, #7 +0xff,0x4e,0xe0,0x03 = mvneq r4, #4080 +0xff,0x58,0xf0,0x03 = mvnseq r5, #16711680 +0x03,0x20,0xe0,0xe1 = mvn r2, r3 +0x03,0x20,0xf0,0xe1 = mvns r2, r3 +0x86,0x59,0xe0,0xe1 = mvn r5, r6, lsl #19 +0xa6,0x54,0xe0,0xe1 = mvn r5, r6, lsr #9 +0x46,0x52,0xe0,0xe1 = mvn r5, r6, asr #4 +0x66,0x53,0xe0,0xe1 = mvn r5, r6, ror #6 +0x66,0x50,0xe0,0xe1 = mvn r5, r6, rrx +0x03,0x20,0xe0,0x01 = mvneq r2, r3 +0x03,0x25,0xf0,0x01 = mvnseq r2, r3, lsl #10 +0x16,0x57,0xe0,0xe1 = mvn r5, r6, lsl r7 +0x36,0x57,0xf0,0xe1 = mvns r5, r6, lsr r7 +0x56,0x57,0xe0,0xc1 = mvngt r5, r6, asr r7 +0x76,0x57,0xf0,0xb1 = mvnslt r5, r6, ror r7 +0x00,0x50,0x68,0xe2 = rsb r5, r8, #0 +0x00,0xf0,0x20,0xe3 = nop +0x00,0xf0,0x20,0xe3 = nop +0x00,0xf0,0x20,0xc3 = nopgt +0x0f,0x4a,0x85,0xe3 = orr r4, r5, #61440 +0x06,0x40,0x85,0xe1 = orr r4, r5, r6 +0x86,0x42,0x85,0xe1 = orr r4, r5, r6, lsl #5 +0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5 +0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5 +0xc6,0x42,0x85,0xe1 = orr r4, r5, r6, asr #5 +0xe6,0x42,0x85,0xe1 = orr r4, r5, r6, ror #5 +0x18,0x69,0x87,0xe1 = orr r6, r7, r8, lsl r9 +0x38,0x69,0x87,0xe1 = orr r6, r7, r8, lsr r9 +0x58,0x69,0x87,0xe1 = orr r6, r7, r8, asr r9 +0x78,0x69,0x87,0xe1 = orr r6, r7, r8, ror r9 +0x66,0x40,0x85,0xe1 = orr r4, r5, r6, rrx +0x0f,0x5a,0x85,0xe3 = orr r5, r5, #61440 +0x05,0x40,0x84,0xe1 = orr r4, r4, r5 +0x85,0x42,0x84,0xe1 = orr r4, r4, r5, lsl #5 +0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5 +0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5 +0xc5,0x42,0x84,0xe1 = orr r4, r4, r5, asr #5 +0xe5,0x42,0x84,0xe1 = orr r4, r4, r5, ror #5 +0x17,0x69,0x86,0xe1 = orr r6, r6, r7, lsl r9 +0x37,0x69,0x86,0xe1 = orr r6, r6, r7, lsr r9 +0x57,0x69,0x86,0xe1 = orr r6, r6, r7, asr r9 +0x77,0x69,0x86,0xe1 = orr r6, r6, r7, ror r9 +0x65,0x40,0x84,0xe1 = orr r4, r4, r5, rrx +0x0f,0x4a,0x95,0x03 = orrseq r4, r5, #61440 +0x06,0x40,0x85,0x11 = orrne r4, r5, r6 +0x86,0x42,0x95,0x01 = orrseq r4, r5, r6, lsl #5 +0x78,0x69,0x87,0x31 = orrlo r6, r7, r8, ror r9 +0x66,0x40,0x95,0x81 = orrshi r4, r5, r6, rrx +0x0f,0x5a,0x85,0x23 = orrhs r5, r5, #61440 +0x05,0x40,0x94,0x01 = orrseq r4, r4, r5 +0x57,0x69,0x86,0x11 = orrne r6, r6, r7, asr r9 +0x77,0x69,0x96,0xb1 = orrslt r6, r6, r7, ror r9 +0x65,0x40,0x94,0xc1 = orrsgt r4, r4, r5, rrx +0x22,0x30,0x81,0xe1 = orr r3, r1, r2, lsr #32 +0x42,0x30,0x81,0xe1 = orr r3, r1, r2, asr #32 +0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 +0x93,0x2f,0x82,0xe6 = pkhbt r2, r2, r3, lsl #31 +0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 +0x93,0x27,0x82,0xe6 = pkhbt r2, r2, r3, lsl #15 +0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3 +0xd3,0x2f,0x82,0xe6 = pkhtb r2, r2, r3, asr #31 +0xd3,0x27,0x82,0xe6 = pkhtb r2, r2, r3, asr #15 +// 0x04,0x70,0x9d,0xe4 = pop {r7} +0x80,0x07,0xbd,0xe8 = pop {r7, r8, r9, r10} +#0x04,0x70,0x2d,0xe5 = push {r7} +0x80,0x07,0x2d,0xe9 = push {r7, r8, r9, r10} +0x52,0x10,0x03,0xe1 = qadd r1, r2, r3 +0x52,0x10,0x03,0x11 = qaddne r1, r2, r3 +0x13,0x1f,0x22,0xe6 = qadd16 r1, r2, r3 +0x13,0x1f,0x22,0xc6 = qadd16gt r1, r2, r3 +0x93,0x1f,0x22,0xe6 = qadd8 r1, r2, r3 +0x93,0x1f,0x22,0xd6 = qadd8le r1, r2, r3 +0x57,0x60,0x48,0xe1 = qdadd r6, r7, r8 +0x57,0x60,0x48,0x81 = qdaddhi r6, r7, r8 +0x57,0x60,0x68,0xe1 = qdsub r6, r7, r8 +0x57,0x60,0x68,0x81 = qdsubhi r6, r7, r8 +0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0 +0x50,0x9f,0x2c,0x06 = qsaxeq r9, r12, r0 +0x52,0x10,0x23,0xe1 = qsub r1, r2, r3 +0x52,0x10,0x23,0x11 = qsubne r1, r2, r3 +0x73,0x1f,0x22,0xe6 = qsub16 r1, r2, r3 +0x73,0x1f,0x22,0xc6 = qsub16gt r1, r2, r3 +0xf3,0x1f,0x22,0xe6 = qsub8 r1, r2, r3 +0xf3,0x1f,0x22,0xd6 = qsub8le r1, r2, r3 +0x32,0x1f,0xff,0xe6 = rbit r1, r2 +0x32,0x1f,0xff,0x16 = rbitne r1, r2 +0x39,0x1f,0xbf,0xe6 = rev r1, r9 +0x35,0x1f,0xbf,0x16 = revne r1, r5 +0xb3,0x8f,0xbf,0xe6 = rev16 r8, r3 +0xb4,0xcf,0xbf,0x16 = rev16ne r12, r4 +0xb9,0x4f,0xff,0xe6 = revsh r4, r9 +0xb1,0x9f,0xff,0x16 = revshne r9, r1 +0x00,0x0a,0x12,0xf8 = rfeda r2 +0x00,0x0a,0x13,0xf9 = rfedb r3 +0x00,0x0a,0x95,0xf8 = rfeia r5 +0x00,0x0a,0x96,0xf9 = rfeib r6 +0x00,0x0a,0x34,0xf8 = rfeda r4! +0x00,0x0a,0x37,0xf9 = rfedb r7! +0x00,0x0a,0xb9,0xf8 = rfeia r9! +0x00,0x0a,0xb8,0xf9 = rfeib r8! +0x00,0x0a,0x12,0xf8 = rfeda r2 +0x00,0x0a,0x13,0xf9 = rfedb r3 +0x00,0x0a,0x95,0xf8 = rfeia r5 +0x00,0x0a,0x96,0xf9 = rfeib r6 +0x00,0x0a,0x34,0xf8 = rfeda r4! +0x00,0x0a,0x37,0xf9 = rfedb r7! +0x00,0x0a,0xb9,0xf8 = rfeia r9! +0x00,0x0a,0xb8,0xf9 = rfeib r8! +0x00,0x0a,0x91,0xf8 = rfeia r1 +0x00,0x0a,0xb1,0xf8 = rfeia r1! +0xe4,0x2f,0xa0,0xe1 = ror r2, r4, #31 +0xe4,0x20,0xa0,0xe1 = ror r2, r4, #1 +0x04,0x20,0xa0,0xe1 = mov r2, r4 +0xe4,0x40,0xa0,0xe1 = ror r4, r4, #1 +0x0f,0x4a,0x65,0xe2 = rsb r4, r5, #61440 +0x06,0x40,0x65,0xe0 = rsb r4, r5, r6 +0x86,0x42,0x65,0xe0 = rsb r4, r5, r6, lsl #5 +0xa6,0x42,0x65,0x30 = rsblo r4, r5, r6, lsr #5 +0xa6,0x42,0x65,0xe0 = rsb r4, r5, r6, lsr #5 +0xc6,0x42,0x65,0xe0 = rsb r4, r5, r6, asr #5 +0xe6,0x42,0x65,0xe0 = rsb r4, r5, r6, ror #5 +0x18,0x69,0x67,0xe0 = rsb r6, r7, r8, lsl r9 +0x38,0x69,0x67,0xe0 = rsb r6, r7, r8, lsr r9 +0x58,0x69,0x67,0xe0 = rsb r6, r7, r8, asr r9 +0x78,0x69,0x67,0xd0 = rsble r6, r7, r8, ror r9 +0x66,0x40,0x65,0xe0 = rsb r4, r5, r6, rrx +0x0f,0x5a,0x65,0xe2 = rsb r5, r5, #61440 +0x05,0x40,0x64,0xe0 = rsb r4, r4, r5 +0x85,0x42,0x64,0xe0 = rsb r4, r4, r5, lsl #5 +0xa5,0x42,0x64,0xe0 = rsb r4, r4, r5, lsr #5 +0xa5,0x42,0x64,0x10 = rsbne r4, r4, r5, lsr #5 +0xc5,0x42,0x64,0xe0 = rsb r4, r4, r5, asr #5 +0xe5,0x42,0x64,0xe0 = rsb r4, r4, r5, ror #5 +0x17,0x69,0x66,0xc0 = rsbgt r6, r6, r7, lsl r9 +0x37,0x69,0x66,0xe0 = rsb r6, r6, r7, lsr r9 +0x57,0x69,0x66,0xe0 = rsb r6, r6, r7, asr r9 +0x77,0x69,0x66,0xe0 = rsb r6, r6, r7, ror r9 +0x65,0x40,0x64,0xe0 = rsb r4, r4, r5, rrx +0x0f,0x4a,0xe5,0xe2 = rsc r4, r5, #61440 +0x06,0x40,0xe5,0xe0 = rsc r4, r5, r6 +0x86,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsl #5 +0xa6,0x42,0xe5,0x30 = rsclo r4, r5, r6, lsr #5 +0xa6,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsr #5 +0xc6,0x42,0xe5,0xe0 = rsc r4, r5, r6, asr #5 +0xe6,0x42,0xe5,0xe0 = rsc r4, r5, r6, ror #5 +0x18,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsl r9 +0x38,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsr r9 +0x58,0x69,0xe7,0xe0 = rsc r6, r7, r8, asr r9 +0x78,0x69,0xe7,0xd0 = rscle r6, r7, r8, ror r9 +0xfe,0x1e,0xf8,0xe2 = rscs r1, r8, #4064 +0x0f,0x5a,0xe5,0xe2 = rsc r5, r5, #61440 +0x05,0x40,0xe4,0xe0 = rsc r4, r4, r5 +0x85,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsl #5 +0xa5,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsr #5 +0xa5,0x42,0xe4,0x10 = rscne r4, r4, r5, lsr #5 +0xc5,0x42,0xe4,0xe0 = rsc r4, r4, r5, asr #5 +0xe5,0x42,0xe4,0xe0 = rsc r4, r4, r5, ror #5 +0x17,0x69,0xe6,0xc0 = rscgt r6, r6, r7, lsl r9 +0x37,0x69,0xe6,0xe0 = rsc r6, r6, r7, lsr r9 +0x57,0x69,0xe6,0xe0 = rsc r6, r6, r7, asr r9 +0x77,0x69,0xe6,0xe0 = rsc r6, r6, r7, ror r9 +0x61,0x00,0xa0,0xe1 = rrx r0, r1 +0x6f,0xd0,0xa0,0xe1 = rrx sp, pc +0x6e,0xf0,0xa0,0xe1 = rrx pc, lr +0x6d,0xe0,0xa0,0xe1 = rrx lr, sp +0x61,0x00,0xb0,0xe1 = rrxs r0, r1 +0x6f,0xd0,0xb0,0xe1 = rrxs sp, pc +0x6e,0xf0,0xb0,0xe1 = rrxs pc, lr +0x6d,0xe0,0xb0,0xe1 = rrxs lr, sp +0x13,0x1f,0x12,0xe6 = sadd16 r1, r2, r3 +0x13,0x1f,0x12,0xc6 = sadd16gt r1, r2, r3 +0x93,0x1f,0x12,0xe6 = sadd8 r1, r2, r3 +0x93,0x1f,0x12,0xd6 = sadd8le r1, r2, r3 +0x30,0x9f,0x1c,0xe6 = sasx r9, r12, r0 +0x30,0x9f,0x1c,0x06 = sasxeq r9, r12, r0 +0x0f,0x4a,0xc5,0xe2 = sbc r4, r5, #61440 +0x06,0x40,0xc5,0xe0 = sbc r4, r5, r6 +0x86,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsl #5 +0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5 +0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5 +0xc6,0x42,0xc5,0xe0 = sbc r4, r5, r6, asr #5 +0xe6,0x42,0xc5,0xe0 = sbc r4, r5, r6, ror #5 +0x18,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsl r9 +0x38,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsr r9 +0x58,0x69,0xc7,0xe0 = sbc r6, r7, r8, asr r9 +0x78,0x69,0xc7,0xe0 = sbc r6, r7, r8, ror r9 +0x0f,0x5a,0xc5,0xe2 = sbc r5, r5, #61440 +0x05,0x40,0xc4,0xe0 = sbc r4, r4, r5 +0x85,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsl #5 +0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5 +0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5 +0xc5,0x42,0xc4,0xe0 = sbc r4, r4, r5, asr #5 +0xe5,0x42,0xc4,0xe0 = sbc r4, r4, r5, ror #5 +0x17,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsl r9 +0x37,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsr r9 +0x57,0x69,0xc6,0xe0 = sbc r6, r6, r7, asr r9 +0x77,0x69,0xc6,0xe0 = sbc r6, r6, r7, ror r9 +0x55,0x48,0xa0,0xe7 = sbfx r4, r5, #16, #1 +0x55,0x48,0xaf,0xc7 = sbfxgt r4, r5, #16, #16 +0xb1,0x9f,0x82,0xe6 = sel r9, r2, r1 +0xb1,0x9f,0x82,0x16 = selne r9, r2, r1 +0x00,0x02,0x01,0xf1 = setend be +0x00,0x02,0x01,0xf1 = setend be +0x00,0x00,0x01,0xf1 = setend le +0x00,0x00,0x01,0xf1 = setend le +0x04,0xf0,0x20,0xe3 = sev +0x04,0xf0,0x20,0x03 = seveq +0x12,0x4f,0x38,0xe6 = shadd16 r4, r8, r2 +0x12,0x4f,0x38,0xc6 = shadd16gt r4, r8, r2 +0x92,0x4f,0x38,0xe6 = shadd8 r4, r8, r2 +0x92,0x4f,0x38,0xc6 = shadd8gt r4, r8, r2 +0x32,0x4f,0x38,0xe6 = shasx r4, r8, r2 +0x32,0x4f,0x38,0xc6 = shasxgt r4, r8, r2 +0x72,0x4f,0x38,0xe6 = shsub16 r4, r8, r2 +0x72,0x4f,0x38,0xc6 = shsub16gt r4, r8, r2 +0xf2,0x4f,0x38,0xe6 = shsub8 r4, r8, r2 +0xf2,0x4f,0x38,0xc6 = shsub8gt r4, r8, r2 +0x81,0x09,0x03,0xe1 = smlabb r3, r1, r9, r0 +0xc6,0x14,0x05,0xe1 = smlabt r5, r6, r4, r1 +0xa2,0x23,0x04,0xe1 = smlatb r4, r2, r3, r2 +0xe3,0x48,0x08,0xe1 = smlatt r8, r3, r8, r4 +0x81,0x09,0x03,0xa1 = smlabbge r3, r1, r9, r0 +0xc6,0x14,0x05,0xd1 = smlabtle r5, r6, r4, r1 +0xa2,0x23,0x04,0x11 = smlatbne r4, r2, r3, r2 +0xe3,0x48,0x08,0x01 = smlatteq r8, r3, r8, r4 +0x13,0x85,0x02,0xe7 = smlad r2, r3, r5, r8 +0x33,0x85,0x02,0xe7 = smladx r2, r3, r5, r8 +0x13,0x85,0x02,0x07 = smladeq r2, r3, r5, r8 +0x33,0x85,0x02,0x87 = smladxhi r2, r3, r5, r8 +0x95,0x28,0xe3,0xe0 = smlal r2, r3, r5, r8 +0x95,0x28,0xf3,0xe0 = smlals r2, r3, r5, r8 +0x95,0x28,0xe3,0x00 = smlaleq r2, r3, r5, r8 +0x95,0x28,0xf3,0x80 = smlalshi r2, r3, r5, r8 +0x89,0x30,0x41,0xe1 = smlalbb r3, r1, r9, r0 +0xc4,0x51,0x46,0xe1 = smlalbt r5, r6, r4, r1 +0xa3,0x42,0x42,0xe1 = smlaltb r4, r2, r3, r2 +0xe8,0x84,0x43,0xe1 = smlaltt r8, r3, r8, r4 +0x89,0x30,0x41,0xa1 = smlalbbge r3, r1, r9, r0 +0xc4,0x51,0x46,0xd1 = smlalbtle r5, r6, r4, r1 +0xa3,0x42,0x42,0x11 = smlaltbne r4, r2, r3, r2 +0xe8,0x84,0x43,0x01 = smlaltteq r8, r3, r8, r4 +0x15,0x28,0x43,0xe7 = smlald r2, r3, r5, r8 +0x35,0x28,0x43,0xe7 = smlaldx r2, r3, r5, r8 +0x15,0x28,0x43,0x07 = smlaldeq r2, r3, r5, r8 +0x35,0x28,0x43,0x87 = smlaldxhi r2, r3, r5, r8 +0x83,0x8a,0x22,0xe1 = smlawb r2, r3, r10, r8 +0xc3,0x95,0x28,0xe1 = smlawt r8, r3, r5, r9 +0x87,0x85,0x22,0x01 = smlawbeq r2, r7, r5, r8 +0xc3,0x80,0x21,0x81 = smlawthi r1, r3, r0, r8 +0x53,0x85,0x02,0xe7 = smlsd r2, r3, r5, r8 +0x73,0x85,0x02,0xe7 = smlsdx r2, r3, r5, r8 +0x53,0x85,0x02,0x07 = smlsdeq r2, r3, r5, r8 +0x73,0x85,0x02,0x87 = smlsdxhi r2, r3, r5, r8 +0x55,0x21,0x49,0xe7 = smlsld r2, r9, r5, r1 +0x72,0x48,0x4b,0xe7 = smlsldx r4, r11, r2, r8 +0x55,0x86,0x42,0x07 = smlsldeq r8, r2, r5, r6 +0x73,0x18,0x40,0x87 = smlsldxhi r1, r0, r3, r8 +0x12,0x43,0x51,0xe7 = smmla r1, r2, r3, r4 +0x33,0x12,0x54,0xe7 = smmlar r4, r3, r2, r1 +0x12,0x43,0x51,0x37 = smmlalo r1, r2, r3, r4 +0x33,0x12,0x54,0x27 = smmlarhs r4, r3, r2, r1 +0xd2,0x43,0x51,0xe7 = smmls r1, r2, r3, r4 +0xf3,0x12,0x54,0xe7 = smmlsr r4, r3, r2, r1 +0xd2,0x43,0x51,0x37 = smmlslo r1, r2, r3, r4 +0xf3,0x12,0x54,0x27 = smmlsrhs r4, r3, r2, r1 +0x13,0xf4,0x52,0xe7 = smmul r2, r3, r4 +0x32,0xf1,0x53,0xe7 = smmulr r3, r2, r1 +0x13,0xf4,0x52,0x37 = smmullo r2, r3, r4 +0x32,0xf1,0x53,0x27 = smmulrhs r3, r2, r1 +0x13,0xf4,0x02,0xe7 = smuad r2, r3, r4 +0x32,0xf1,0x03,0xe7 = smuadx r3, r2, r1 +0x13,0xf4,0x02,0xb7 = smuadlt r2, r3, r4 +0x32,0xf1,0x03,0xa7 = smuadxge r3, r2, r1 +0x89,0x00,0x63,0xe1 = smulbb r3, r9, r0 +0xc4,0x01,0x65,0xe1 = smulbt r5, r4, r1 +0xa2,0x02,0x64,0xe1 = smultb r4, r2, r2 +0xe3,0x04,0x68,0xe1 = smultt r8, r3, r4 +0x89,0x00,0x61,0xa1 = smulbbge r1, r9, r0 +0xc6,0x04,0x65,0xd1 = smulbtle r5, r6, r4 +0xa3,0x02,0x62,0x11 = smultbne r2, r3, r2 +0xe3,0x04,0x68,0x01 = smultteq r8, r3, r4 +0x90,0x31,0xc9,0xe0 = smull r3, r9, r0, r1 +0x90,0x32,0xd9,0xe0 = smulls r3, r9, r0, r2 +0x94,0x85,0xc3,0x00 = smulleq r8, r3, r4, r5 +0x94,0x83,0xd3,0x00 = smullseq r8, r3, r4, r3 +0xa9,0x00,0x23,0xe1 = smulwb r3, r9, r0 +0xe9,0x02,0x23,0xe1 = smulwt r3, r9, r2 +0x50,0xf1,0x03,0xe7 = smusd r3, r0, r1 +0x79,0xf2,0x03,0xe7 = smusdx r3, r9, r2 +0x53,0xf2,0x08,0x07 = smusdeq r8, r3, r2 +0x74,0xf3,0x07,0x17 = smusdxne r7, r4, r3 +0x05,0x05,0x4d,0xf8 = srsda sp, #5 +0x01,0x05,0x4d,0xf9 = srsdb sp, #1 +0x00,0x05,0xcd,0xf8 = srsia sp, #0 +0x0f,0x05,0xcd,0xf9 = srsib sp, #15 +0x1f,0x05,0x6d,0xf8 = srsda sp!, #31 +0x13,0x05,0x6d,0xf9 = srsdb sp!, #19 +0x02,0x05,0xed,0xf8 = srsia sp!, #2 +0x0e,0x05,0xed,0xf9 = srsib sp!, #14 +0x0b,0x05,0xcd,0xf9 = srsib sp, #11 +0x0a,0x05,0xcd,0xf8 = srsia sp, #10 +0x09,0x05,0x4d,0xf9 = srsdb sp, #9 +0x05,0x05,0x4d,0xf8 = srsda sp, #5 +0x05,0x05,0xed,0xf9 = srsib sp!, #5 +0x05,0x05,0xed,0xf8 = srsia sp!, #5 +0x05,0x05,0x6d,0xf9 = srsdb sp!, #5 +0x05,0x05,0x6d,0xf8 = srsda sp!, #5 +0x05,0x05,0xcd,0xf8 = srsia sp, #5 +0x05,0x05,0xed,0xf8 = srsia sp!, #5 +0x05,0x05,0x4d,0xf8 = srsda sp, #5 +0x01,0x05,0x4d,0xf9 = srsdb sp, #1 +0x00,0x05,0xcd,0xf8 = srsia sp, #0 +0x0f,0x05,0xcd,0xf9 = srsib sp, #15 +0x1f,0x05,0x6d,0xf8 = srsda sp!, #31 +0x13,0x05,0x6d,0xf9 = srsdb sp!, #19 +0x02,0x05,0xed,0xf8 = srsia sp!, #2 +0x0e,0x05,0xed,0xf9 = srsib sp!, #14 +0x0b,0x05,0xcd,0xf9 = srsib sp, #11 +0x0a,0x05,0xcd,0xf8 = srsia sp, #10 +0x09,0x05,0x4d,0xf9 = srsdb sp, #9 +0x05,0x05,0x4d,0xf8 = srsda sp, #5 +0x05,0x05,0xed,0xf9 = srsib sp!, #5 +0x05,0x05,0xed,0xf8 = srsia sp!, #5 +0x05,0x05,0x6d,0xf9 = srsdb sp!, #5 +0x05,0x05,0x6d,0xf8 = srsda sp!, #5 +0x05,0x05,0xcd,0xf8 = srsia sp, #5 +0x05,0x05,0xed,0xf8 = srsia sp!, #5 +0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10 +0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10 +0x9a,0x8f,0xa0,0xe6 = ssat r8, #1, r10, lsl #31 +0x5a,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #32 +0xda,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #1 +0x37,0x2f,0xa0,0xe6 = ssat16 r2, #1, r7 +0x35,0x3f,0xaf,0xe6 = ssat16 r3, #16, r5 +0x54,0x2f,0x13,0xe6 = ssax r2, r3, r4 +0x54,0x2f,0x13,0xb6 = ssaxlt r2, r3, r4 +0x76,0x1f,0x10,0xe6 = ssub16 r1, r0, r6 +0x72,0x5f,0x13,0x16 = ssub16ne r5, r3, r2 +0xf4,0x9f,0x12,0xe6 = ssub8 r9, r2, r4 +0xf2,0x5f,0x11,0x06 = ssub8eq r5, r1, r2 +0x01,0x80,0x81,0xfd = stc2 p0, c8, [r1, #4] +0x00,0x71,0x82,0xfd = stc2 p1, c7, [r2] +0x38,0x62,0x03,0xfd = stc2 p2, c6, [r3, #-224] +0x1e,0x53,0x24,0xfd = stc2 p3, c5, [r4, #-120]! +0x04,0x44,0xa5,0xfc = stc2 p4, c4, [r5], #16 +0x12,0x35,0x26,0xfc = stc2 p5, c3, [r6], #-72 +0x01,0x26,0xc7,0xfd = stc2l p6, c2, [r7, #4] +0x00,0x17,0xc8,0xfd = stc2l p7, c1, [r8] +0x38,0x08,0x49,0xfd = stc2l p8, c0, [r9, #-224] +0x1e,0x19,0x6a,0xfd = stc2l p9, c1, [r10, #-120]! +0x04,0x20,0xeb,0xfc = stc2l p0, c2, [r11], #16 +0x12,0x31,0x6c,0xfc = stc2l p1, c3, [r12], #-72 +0x01,0x4c,0x80,0xed = stc p12, c4, [r0, #4] +0x00,0x5d,0x81,0xed = stc p13, c5, [r1] +0x38,0x6e,0x02,0xed = stc p14, c6, [r2, #-224] +0x1e,0x7f,0x23,0xed = stc p15, c7, [r3, #-120]! +0x04,0x85,0xa4,0xec = stc p5, c8, [r4], #16 +0x12,0x94,0x25,0xec = stc p4, c9, [r5], #-72 +0x01,0xa3,0xc6,0xed = stcl p3, c10, [r6, #4] +0x00,0xb2,0xc7,0xed = stcl p2, c11, [r7] +0x38,0xc1,0x48,0xed = stcl p1, c12, [r8, #-224] +0x1e,0xd0,0x69,0xed = stcl p0, c13, [r9, #-120]! +0x04,0xe6,0xea,0xec = stcl p6, c14, [r10], #16 +0x12,0xf7,0x6b,0xec = stcl p7, c15, [r11], #-72 +0x01,0x4c,0x80,0x3d = stclo p12, c4, [r0, #4] +0x00,0x5d,0x81,0x8d = stchi p13, c5, [r1] +0x38,0x6e,0x02,0x2d = stchs p14, c6, [r2, #-224] +0x1e,0x7f,0x23,0x3d = stclo p15, c7, [r3, #-120]! +0x04,0x85,0xa4,0x0c = stceq p5, c8, [r4], #16 +0x12,0x94,0x25,0xcc = stcgt p4, c9, [r5], #-72 +0x01,0xa3,0xc6,0xbd = stcllt p3, c10, [r6, #4] +0x00,0xb2,0xc7,0xad = stclge p2, c11, [r7] +0x38,0xc1,0x48,0xdd = stclle p1, c12, [r8, #-224] +0x1e,0xd0,0x69,0x1d = stclne p0, c13, [r9, #-120]! +0x04,0xe6,0xea,0x0c = stcleq p6, c14, [r10], #16 +0x12,0xf7,0x6b,0x8c = stclhi p7, c15, [r11], #-72 +0x19,0x82,0x81,0xfc = stc2 p2, c8, [r1], {25} +0x7a,0x20,0x82,0xe8 = stm r2, {r1, r3, r4, r5, r6, sp} +0x7a,0x40,0x83,0xe8 = stm r3, {r1, r3, r4, r5, r6, lr} +0x7a,0x20,0x84,0xe9 = stmib r4, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0x05,0xe8 = stmda r5, {r1, r3, r4, r5, r6, sp} +0x7a,0x01,0x06,0xe9 = stmdb r6, {r1, r3, r4, r5, r6, r8} +0x7a,0x20,0x0d,0xe9 = stmdb sp, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0xa8,0xe8 = stm r8!, {r1, r3, r4, r5, r6, sp} +0x7a,0x20,0xa9,0xe9 = stmib sb!, {r1, r3, r4, r5, r6, sp} +0x7a,0x00,0x2d,0xe8 = stmda sp!, {r1, r3, r4, r5, r6} +0xa2,0x20,0x20,0xe9 = stmdb r0!, {r1, r5, r7, sp} +0x93,0x1f,0xc4,0xe1 = strexb r1, r3, [r4] +0x92,0x4f,0xe5,0xe1 = strexh r4, r2, [r5] +0x91,0x2f,0x87,0xe1 = strex r2, r1, [r7] +0x92,0x6f,0xa8,0xe1 = strexd r6, r2, r3, [r8] +0x00,0x30,0x2a,0x55 = strpl r3, [r10, #-0]! +0x00,0x30,0xaa,0x55 = strpl r3, [r10, #0]! +0x0f,0x4a,0x45,0xe2 = sub r4, r5, #61440 +0x06,0x40,0x45,0xe0 = sub r4, r5, r6 +0x86,0x42,0x45,0xe0 = sub r4, r5, r6, lsl #5 +0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5 +0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5 +0xc6,0x42,0x45,0xe0 = sub r4, r5, r6, asr #5 +0xe6,0x42,0x45,0xe0 = sub r4, r5, r6, ror #5 +0x18,0x69,0x47,0xe0 = sub r6, r7, r8, lsl r9 +0x38,0x69,0x47,0xe0 = sub r6, r7, r8, lsr r9 +0x58,0x69,0x47,0xe0 = sub r6, r7, r8, asr r9 +0x78,0x69,0x47,0xe0 = sub r6, r7, r8, ror r9 +0x0f,0x5a,0x45,0xe2 = sub r5, r5, #61440 +0x05,0x40,0x44,0xe0 = sub r4, r4, r5 +0x85,0x42,0x44,0xe0 = sub r4, r4, r5, lsl #5 +0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5 +0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5 +0xc5,0x42,0x44,0xe0 = sub r4, r4, r5, asr #5 +0xe5,0x42,0x44,0xe0 = sub r4, r4, r5, ror #5 +0x17,0x69,0x46,0xe0 = sub r6, r6, r7, lsl r9 +0x37,0x69,0x46,0xe0 = sub r6, r6, r7, lsr r9 +0x57,0x69,0x46,0xe0 = sub r6, r6, r7, asr r9 +0x77,0x69,0x46,0xe0 = sub r6, r6, r7, ror r9 +0x22,0x30,0x41,0xe0 = sub r3, r1, r2, lsr #32 +0x42,0x30,0x41,0xe0 = sub r3, r1, r2, asr #32 +0x10,0x00,0x00,0xef = svc #16 +0x00,0x00,0x00,0xef = svc #0 +0xff,0xff,0xff,0xef = svc #16777215 +0x92,0x10,0x03,0xe1 = swp r1, r2, [r3] +0x94,0x40,0x06,0xe1 = swp r4, r4, [r6] +0x91,0x50,0x49,0xe1 = swpb r5, r1, [r9] +0x74,0x20,0xa3,0xe6 = sxtab r2, r3, r4 +0x76,0x40,0xa5,0xe6 = sxtab r4, r5, r6 +0x79,0x64,0xa2,0xb6 = sxtablt r6, r2, r9, ror #8 +0x74,0x58,0xa1,0xe6 = sxtab r5, r1, r4, ror #16 +0x73,0x7c,0xa8,0xe6 = sxtab r7, r8, r3, ror #24 +0x74,0x00,0x81,0xa6 = sxtab16ge r0, r1, r4 +0x77,0x60,0x82,0xe6 = sxtab16 r6, r2, r7 +0x78,0x34,0x85,0xe6 = sxtab16 r3, r5, r8, ror #8 +0x71,0x38,0x82,0xe6 = sxtab16 r3, r2, r1, ror #16 +0x73,0x1c,0x82,0x06 = sxtab16eq r1, r2, r3, ror #24 +0x79,0x10,0xb3,0xe6 = sxtah r1, r3, r9 +0x76,0x60,0xb1,0x86 = sxtahhi r6, r1, r6 +0x73,0x34,0xb8,0xe6 = sxtah r3, r8, r3, ror #8 +0x74,0x28,0xb2,0x36 = sxtahlo r2, r2, r4, ror #16 +0x73,0x9c,0xb3,0xe6 = sxtah r9, r3, r3, ror #24 +0x74,0x20,0xaf,0xa6 = sxtbge r2, r4 +0x76,0x50,0xaf,0xe6 = sxtb r5, r6 +0x79,0x64,0xaf,0xe6 = sxtb r6, r9, ror #8 +0x71,0x58,0xaf,0x36 = sxtblo r5, r1, ror #16 +0x73,0x8c,0xaf,0xe6 = sxtb r8, r3, ror #24 +0x74,0x10,0x8f,0xe6 = sxtb16 r1, r4 +0x77,0x60,0x8f,0xe6 = sxtb16 r6, r7 +0x75,0x34,0x8f,0x26 = sxtb16hs r3, r5, ror #8 +0x71,0x38,0x8f,0xe6 = sxtb16 r3, r1, ror #16 +0x73,0x2c,0x8f,0xa6 = sxtb16ge r2, r3, ror #24 +0x79,0x30,0xbf,0x16 = sxthne r3, r9 +0x76,0x10,0xbf,0xe6 = sxth r1, r6 +0x78,0x34,0xbf,0xe6 = sxth r3, r8, ror #8 +0x72,0x28,0xbf,0xd6 = sxthle r2, r2, ror #16 +0x73,0x9c,0xbf,0xe6 = sxth r9, r3, ror #24 +0x0f,0x0a,0x35,0xe3 = teq r5, #61440 +0x05,0x00,0x34,0xe1 = teq r4, r5 +0x85,0x02,0x34,0xe1 = teq r4, r5, lsl #5 +0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5 +0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5 +0xc5,0x02,0x34,0xe1 = teq r4, r5, asr #5 +0xe5,0x02,0x34,0xe1 = teq r4, r5, ror #5 +0x17,0x09,0x36,0xe1 = teq r6, r7, lsl r9 +0x37,0x09,0x36,0xe1 = teq r6, r7, lsr r9 +0x57,0x09,0x36,0xe1 = teq r6, r7, asr r9 +0x77,0x09,0x36,0xe1 = teq r6, r7, ror r9 +0x0f,0x0a,0x15,0xe3 = tst r5, #61440 +0x05,0x00,0x14,0xe1 = tst r4, r5 +0x85,0x02,0x14,0xe1 = tst r4, r5, lsl #5 +0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5 +0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5 +0xc5,0x02,0x14,0xe1 = tst r4, r5, asr #5 +0xe5,0x02,0x14,0xe1 = tst r4, r5, ror #5 +0x17,0x09,0x16,0xe1 = tst r6, r7, lsl r9 +0x37,0x09,0x16,0xe1 = tst r6, r7, lsr r9 +0x57,0x09,0x16,0xe1 = tst r6, r7, asr r9 +0x77,0x09,0x16,0xe1 = tst r6, r7, ror r9 +0x13,0x1f,0x52,0xe6 = uadd16 r1, r2, r3 +0x13,0x1f,0x52,0xc6 = uadd16gt r1, r2, r3 +0x93,0x1f,0x52,0xe6 = uadd8 r1, r2, r3 +0x93,0x1f,0x52,0xd6 = uadd8le r1, r2, r3 +0x30,0x9f,0x5c,0xe6 = uasx r9, r12, r0 +0x30,0x9f,0x5c,0x06 = uasxeq r9, r12, r0 +0x55,0x48,0xe0,0xe7 = ubfx r4, r5, #16, #1 +0x55,0x48,0xef,0xc7 = ubfxgt r4, r5, #16, #16 +0x12,0x4f,0x78,0xe6 = uhadd16 r4, r8, r2 +0x12,0x4f,0x78,0xc6 = uhadd16gt r4, r8, r2 +0x92,0x4f,0x78,0xe6 = uhadd8 r4, r8, r2 +0x92,0x4f,0x78,0xc6 = uhadd8gt r4, r8, r2 +0x32,0x4f,0x78,0xe6 = uhasx r4, r8, r2 +0x32,0x4f,0x78,0xc6 = uhasxgt r4, r8, r2 +0x72,0x4f,0x78,0xe6 = uhsub16 r4, r8, r2 +0x72,0x4f,0x78,0xc6 = uhsub16gt r4, r8, r2 +0xf2,0x4f,0x78,0xe6 = uhsub8 r4, r8, r2 +0xf2,0x4f,0x78,0xc6 = uhsub8gt r4, r8, r2 +0x95,0x36,0x44,0xe0 = umaal r3, r4, r5, r6 +0x95,0x36,0x44,0xb0 = umaallt r3, r4, r5, r6 +0x96,0x28,0xa4,0xe0 = umlal r2, r4, r6, r8 +0x92,0x66,0xa1,0xc0 = umlalgt r6, r1, r2, r6 +0x92,0x23,0xb9,0xe0 = umlals r2, r9, r2, r3 +0x91,0x32,0xb5,0x00 = umlalseq r3, r5, r1, r2 +0x96,0x28,0x84,0xe0 = umull r2, r4, r6, r8 +0x92,0x66,0x81,0xc0 = umullgt r6, r1, r2, r6 +0x92,0x23,0x99,0xe0 = umulls r2, r9, r2, r3 +0x91,0x32,0x95,0x00 = umullseq r3, r5, r1, r2 +0x13,0x1f,0x62,0xe6 = uqadd16 r1, r2, r3 +0x19,0x4f,0x67,0xc6 = uqadd16gt r4, r7, r9 +0x98,0x3f,0x64,0xe6 = uqadd8 r3, r4, r8 +0x92,0x8f,0x61,0xd6 = uqadd8le r8, r1, r2 +0x31,0x2f,0x64,0xe6 = uqasx r2, r4, r1 +0x39,0x5f,0x62,0x86 = uqasxhi r5, r2, r9 +0x57,0x1f,0x63,0xe6 = uqsax r1, r3, r7 +0x52,0x3f,0x66,0xe6 = uqsax r3, r6, r2 +0x73,0x1f,0x65,0xe6 = uqsub16 r1, r5, r3 +0x75,0x3f,0x62,0xc6 = uqsub16gt r3, r2, r5 +0xf4,0x2f,0x61,0xe6 = uqsub8 r2, r1, r4 +0xf9,0x4f,0x66,0xd6 = uqsub8le r4, r6, r9 +0x11,0xf4,0x82,0xe7 = usad8 r2, r1, r4 +0x16,0xf9,0x84,0xd7 = usad8le r4, r6, r9 +0x15,0x73,0x81,0xe7 = usada8 r1, r5, r3, r7 +0x12,0x15,0x83,0xc7 = usada8gt r3, r2, r5, r1 +0x1a,0x80,0xe1,0xe6 = usat r8, #1, r10 +0x1a,0x80,0xe4,0xe6 = usat r8, #4, r10 +0x9a,0x8f,0xe5,0xe6 = usat r8, #5, r10, lsl #31 +0x5a,0x80,0xff,0xe6 = usat r8, #31, r10, asr #32 +0xda,0x80,0xf0,0xe6 = usat r8, #16, r10, asr #1 +0x37,0x2f,0xe2,0xe6 = usat16 r2, #2, r7 +0x35,0x3f,0xef,0xe6 = usat16 r3, #15, r5 +0x54,0x2f,0x53,0xe6 = usax r2, r3, r4 +0x54,0x2f,0x53,0x16 = usaxne r2, r3, r4 +0x77,0x4f,0x52,0xe6 = usub16 r4, r2, r7 +0x73,0x1f,0x51,0x86 = usub16hi r1, r1, r3 +0xf5,0x1f,0x58,0xe6 = usub8 r1, r8, r5 +0xf3,0x9f,0x52,0xd6 = usub8le r9, r2, r3 +0x74,0x20,0xe3,0xe6 = uxtab r2, r3, r4 +0x76,0x40,0xe5,0xe6 = uxtab r4, r5, r6 +0x79,0x64,0xe2,0xb6 = uxtablt r6, r2, r9, ror #8 +0x74,0x58,0xe1,0xe6 = uxtab r5, r1, r4, ror #16 +0x73,0x7c,0xe8,0xe6 = uxtab r7, r8, r3, ror #24 +0x74,0x00,0xc1,0xa6 = uxtab16ge r0, r1, r4 +0x77,0x60,0xc2,0xe6 = uxtab16 r6, r2, r7 +0x78,0x34,0xc5,0xe6 = uxtab16 r3, r5, r8, ror #8 +0x71,0x38,0xc2,0xe6 = uxtab16 r3, r2, r1, ror #16 +0x73,0x1c,0xc2,0x06 = uxtab16eq r1, r2, r3, ror #24 +0x79,0x10,0xf3,0xe6 = uxtah r1, r3, r9 +0x76,0x60,0xf1,0x86 = uxtahhi r6, r1, r6 +0x73,0x34,0xf8,0xe6 = uxtah r3, r8, r3, ror #8 +0x74,0x28,0xf2,0x36 = uxtahlo r2, r2, r4, ror #16 +0x73,0x9c,0xf3,0xe6 = uxtah r9, r3, r3, ror #24 +0x74,0x20,0xef,0xa6 = uxtbge r2, r4 +0x76,0x50,0xef,0xe6 = uxtb r5, r6 +0x79,0x64,0xef,0xe6 = uxtb r6, r9, ror #8 +0x71,0x58,0xef,0x36 = uxtblo r5, r1, ror #16 +0x73,0x8c,0xef,0xe6 = uxtb r8, r3, ror #24 +0x74,0x10,0xcf,0xe6 = uxtb16 r1, r4 +0x77,0x60,0xcf,0xe6 = uxtb16 r6, r7 +0x75,0x34,0xcf,0x26 = uxtb16hs r3, r5, ror #8 +0x71,0x38,0xcf,0xe6 = uxtb16 r3, r1, ror #16 +0x73,0x2c,0xcf,0xa6 = uxtb16ge r2, r3, ror #24 +0x79,0x30,0xff,0x16 = uxthne r3, r9 +0x76,0x10,0xff,0xe6 = uxth r1, r6 +0x78,0x34,0xff,0xe6 = uxth r3, r8, ror #8 +0x72,0x28,0xff,0xd6 = uxthle r2, r2, ror #16 +0x73,0x9c,0xff,0xe6 = uxth r9, r3, ror #24 +0x02,0xf0,0x20,0xe3 = wfe +0x02,0xf0,0x20,0x83 = wfehi +0x03,0xf0,0x20,0xe3 = wfi +0x03,0xf0,0x20,0xb3 = wfilt +0x01,0xf0,0x20,0xe3 = yield +0x01,0xf0,0x20,0x13 = yieldne +0x04,0xf0,0x20,0xe3 = sev +0x03,0xf0,0x20,0xe3 = wfi +0x02,0xf0,0x20,0xe3 = wfe +0x01,0xf0,0x20,0xe3 = yield +0x00,0xf0,0x20,0xe3 = nop +0xef,0xf0,0x20,0xc3 = hintgt #239 diff --git a/capstone/suite/MC/ARM/basic-thumb-instructions.s.cs b/capstone/suite/MC/ARM/basic-thumb-instructions.s.cs new file mode 100644 index 000000000..b43241fd8 --- /dev/null +++ b/capstone/suite/MC/ARM/basic-thumb-instructions.s.cs @@ -0,0 +1,130 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x74,0x41 = adcs r4, r6 +0xd1,0x1c = adds r1, r2, #3 +0x03,0x32 = adds r2, #3 +0x08,0x32 = adds r2, #8 +0xd1,0x18 = adds r1, r2, r3 +0x42,0x44 = add r2, r8 +0x01,0xb0 = add sp, #4 +0x7f,0xb0 = add sp, #508 +0x01,0xb0 = add sp, #4 +0x02,0xaa = add r2, sp, #8 +0xff,0xaa = add r2, sp, #1020 +0x82,0xb0 = sub sp, #8 +0x82,0xb0 = sub sp, #8 +0x9d,0x44 = add sp, r3 +0x6a,0x44 = add r2, sp, r2 +0x00,0xa5 = adr r5, #0 +0x01,0xa2 = adr r2, #4 +0xff,0xa3 = adr r3, #1020 +0x1a,0x10 = asrs r2, r3, #32 +0x5a,0x11 = asrs r2, r3, #5 +0x5a,0x10 = asrs r2, r3, #1 +0x6d,0x15 = asrs r5, r5, #21 +0x6d,0x15 = asrs r5, r5, #21 +0x6b,0x15 = asrs r3, r5, #21 +0x15,0x41 = asrs r5, r2 +0x97,0xe3 = b #1842 +0x2e,0xe7 = b #-416 +0x80,0xd0 = beq #-252 +0x50,0xd0 = beq #164 +0xd8,0xf0,0x20,0xe8 = blx #884804 +0xb0,0xf1,0x40,0xe8 = blx #1769604 +0xb1,0x43 = bics r1, r6 +0x00,0xbe = bkpt #0 +0xff,0xbe = bkpt #255 +0xa0,0x47 = blx r4 +0x10,0x47 = bx r2 +0xcd,0x42 = cmn r5, r1 +0x20,0x2e = cmp r6, #32 +0xa3,0x42 = cmp r3, r4 +0x88,0x45 = cmp r8, r1 +0x61,0xb6 = cpsie f +0x74,0xb6 = cpsid a +0x6c,0x40 = eors r4, r5 +0xff,0xcb = ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} +0xba,0xca = ldm r2!, {r1, r3, r4, r5, r7} +0x02,0xc9 = ldm r1, {r1} +0x29,0x68 = ldr r1, [r5] +0x32,0x6a = ldr r2, [r6, #32] +0xfb,0x6f = ldr r3, [r7, #124] +0x00,0x99 = ldr r1, [sp] +0x06,0x9a = ldr r2, [sp, #24] +0xff,0x9b = ldr r3, [sp, #1020] +0x97,0x4b = ldr r3, [pc, #604] +0x5c,0x4b = ldr r3, [pc, #368] +0xd1,0x58 = ldr r1, [r2, r3] +0x1c,0x78 = ldrb r4, [r3] +0x35,0x78 = ldrb r5, [r6] +0xfe,0x7f = ldrb r6, [r7, #31] +0x66,0x5d = ldrb r6, [r4, r5] +0x1b,0x88 = ldrh r3, [r3] +0x74,0x88 = ldrh r4, [r6, #2] +0xfd,0x8f = ldrh r5, [r7, #62] +0x96,0x5b = ldrh r6, [r2, r6] +0x96,0x57 = ldrsb r6, [r2, r6] +0x7b,0x5e = ldrsh r3, [r7, r1] +// 0x2c,0x00 = lsls r4, r5, #0 +0x2c,0x01 = lsls r4, r5, #4 +0x1b,0x03 = lsls r3, r3, #12 +0x1b,0x03 = lsls r3, r3, #12 +0x19,0x03 = lsls r1, r3, #12 +0xb2,0x40 = lsls r2, r6 +0x59,0x08 = lsrs r1, r3, #1 +0x19,0x08 = lsrs r1, r3, #32 +0x24,0x0d = lsrs r4, r4, #20 +0x24,0x0d = lsrs r4, r4, #20 +0x22,0x0d = lsrs r2, r4, #20 +0xf2,0x40 = lsrs r2, r6 +0x00,0x22 = movs r2, #0 +0xff,0x22 = movs r2, #255 +0x17,0x22 = movs r2, #23 +0x23,0x46 = mov r3, r4 +0x19,0x00 = movs r1, r3 +0x51,0x43 = muls r1, r2, r1 +0x5a,0x43 = muls r2, r3, r2 +0x63,0x43 = muls r3, r4, r3 +0xde,0x43 = mvns r6, r3 +0x63,0x42 = rsbs r3, r4, #0 +0x4c,0xbc = pop {r2, r3, r6} +0x86,0xb4 = push {r1, r2, r7} +0x1e,0xba = rev r6, r3 +0x57,0xba = rev16 r7, r2 +0xcd,0xba = revsh r5, r1 +0xfa,0x41 = rors r2, r7 +0x59,0x42 = rsbs r1, r3, #0 +0x9c,0x41 = sbcs r4, r3 +0x58,0xb6 = setend be +0x50,0xb6 = setend le +0x44,0xc1 = stm r1!, {r2, r6} +0x8e,0xc1 = stm r1!, {r1, r2, r3, r7} +0x3a,0x60 = str r2, [r7] +0x3a,0x60 = str r2, [r7] +0x4d,0x60 = str r5, [r1, #4] +0xfb,0x67 = str r3, [r7, #124] +0x00,0x92 = str r2, [sp] +0x00,0x93 = str r3, [sp] +0x05,0x94 = str r4, [sp, #20] +0xff,0x95 = str r5, [sp, #1020] +0xfa,0x50 = str r2, [r7, r3] +0x1c,0x70 = strb r4, [r3] +0x35,0x70 = strb r5, [r6] +0xfe,0x77 = strb r6, [r7, #31] +0x66,0x55 = strb r6, [r4, r5] +0x1b,0x80 = strh r3, [r3] +0x74,0x80 = strh r4, [r6, #2] +0xfd,0x87 = strh r5, [r7, #62] +0x96,0x53 = strh r6, [r2, r6] +0xd1,0x1e = subs r1, r2, #3 +0x03,0x3a = subs r2, #3 +0x08,0x3a = subs r2, #8 +0x83,0xb0 = sub sp, #12 +0xff,0xb0 = sub sp, #508 +0xd1,0x1a = subs r1, r2, r3 +0x00,0xdf = svc #0 +0xff,0xdf = svc #255 +0x6b,0xb2 = sxtb r3, r5 +0x2b,0xb2 = sxth r3, r5 +0x0e,0x42 = tst r6, r1 +0xd7,0xb2 = uxtb r7, r2 +0xa1,0xb2 = uxth r1, r4 diff --git a/capstone/suite/MC/ARM/basic-thumb2-instructions-v8.s.cs b/capstone/suite/MC/ARM/basic-thumb2-instructions-v8.s.cs new file mode 100644 index 000000000..a6d4d6f72 --- /dev/null +++ b/capstone/suite/MC/ARM/basic-thumb2-instructions-v8.s.cs @@ -0,0 +1 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None diff --git a/capstone/suite/MC/ARM/basic-thumb2-instructions.s.cs b/capstone/suite/MC/ARM/basic-thumb2-instructions.s.cs new file mode 100644 index 000000000..87175459e --- /dev/null +++ b/capstone/suite/MC/ARM/basic-thumb2-instructions.s.cs @@ -0,0 +1,1239 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x41,0xf1,0x04,0x00 = adc r0, r1, #4 +0x51,0xf1,0x00,0x00 = adcs r0, r1, #0 +0x42,0xf1,0xff,0x01 = adc r1, r2, #255 +0x47,0xf1,0x55,0x13 = adc r3, r7, #5570645 +0x4c,0xf1,0xaa,0x28 = adc r8, r12, #2852170240 +0x47,0xf1,0xa5,0x39 = adc r9, r7, #2779096485 +0x43,0xf1,0x07,0x45 = adc r5, r3, #2264924160 +0x42,0xf1,0xff,0x44 = adc r4, r2, #2139095040 +0x42,0xf5,0xd0,0x64 = adc r4, r2, #1664 +0x45,0xeb,0x06,0x04 = adc.w r4, r5, r6 +0x55,0xeb,0x06,0x04 = adcs.w r4, r5, r6 +0x41,0xeb,0x03,0x09 = adc.w r9, r1, r3 +0x51,0xeb,0x03,0x09 = adcs.w r9, r1, r3 +0x41,0xeb,0x33,0x10 = adc.w r0, r1, r3, ror #4 +0x51,0xeb,0xc3,0x10 = adcs.w r0, r1, r3, lsl #7 +0x41,0xeb,0xd3,0x70 = adc.w r0, r1, r3, lsr #31 +0x51,0xeb,0x23,0x00 = adcs.w r0, r1, r3, asr #32 +0x0d,0xeb,0x0c,0x02 = add.w r2, sp, ip +0x0a,0xbf = itet eq +// 0x03,0xf2,0xff,0x35 = addwne r5, r3, #1023 +// 0x05,0xf2,0x25,0x14 = addweq r4, r5, #293 +0x0d,0xf5,0x80,0x62 = add.w r2, sp, #1024 +0x08,0xf5,0x7f,0x42 = add.w r2, r8, #65280 +0x03,0xf2,0x01,0x12 = addw r2, r3, #257 +0x03,0xf2,0x01,0x12 = addw r2, r3, #257 +0x06,0xf5,0x80,0x7c = add.w r12, r6, #256 +0x06,0xf2,0x00,0x1c = addw r12, r6, #256 +0x12,0xf5,0xf8,0x71 = adds.w r1, r2, #496 +0x02,0xf1,0x01,0x02 = add.w r2, r2, #1 +0x00,0xf1,0x20,0x00 = add.w r0, r0, #32 +0x38,0x32 = adds r2, #56 +0x38,0x32 = adds r2, #56 +0x07,0xf1,0xcb,0x31 = add.w r1, r7, #3419130827 +0x0d,0xf1,0xff,0x7d = add.w sp, sp, #33423360 +0xb2,0xf1,0x10,0x02 = subs.w r2, r2, #16 +0xb2,0xf1,0x10,0x02 = subs.w r2, r2, #16 +0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 +0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 +0xa2,0xf2,0x10,0x02 = subw r2, r2, #16 +0x02,0xeb,0x08,0x01 = add.w r1, r2, r8 +0x09,0xeb,0x22,0x05 = add.w r5, r9, r2, asr #32 +0x13,0xeb,0xc1,0x77 = adds.w r7, r3, r1, lsl #31 +0x13,0xeb,0x56,0x60 = adds.w r0, r3, r6, lsr #25 +0x08,0xeb,0x31,0x34 = add.w r4, r8, r1, ror #12 +0xc2,0x44 = add r10, r8 +0xc2,0x44 = add r10, r8 +0xaf,0xf6,0xc6,0x4b = subw r11, pc, #3270 +// 0x0f,0xf2,0x03,0x02 = adr.w r2, #3 +// 0xaf,0xf2,0x3a,0x3b = adr.w r11, #-826 +// 0xaf,0xf2,0x00,0x01 = adr.w r1, #-0 +0x05,0xf4,0x7f,0x22 = and r2, r5, #1044480 +0x1c,0xf0,0x0f,0x03 = ands r3, r12, #15 +0x01,0xf0,0xff,0x01 = and r1, r1, #255 +0x01,0xf0,0xff,0x01 = and r1, r1, #255 +0x04,0xf0,0xff,0x35 = and r5, r4, #4294967295 +0x19,0xf0,0xff,0x31 = ands r1, r9, #4294967295 +0x09,0xea,0x08,0x04 = and.w r4, r9, r8 +0x04,0xea,0xe8,0x01 = and.w r1, r4, r8, asr #3 +0x11,0xea,0x47,0x02 = ands.w r2, r1, r7, lsl #1 +0x15,0xea,0x12,0x54 = ands.w r4, r5, r2, lsr #20 +0x0c,0xea,0x71,0x49 = and.w r9, r12, r1, ror #17 +0x4f,0xea,0x23,0x32 = asr.w r2, r3, #12 +0x5f,0xea,0x23,0x08 = asrs.w r8, r3, #32 +0x5f,0xea,0x63,0x02 = asrs.w r2, r3, #1 +0x4f,0xea,0x23,0x12 = asr.w r2, r3, #4 +0x5f,0xea,0xec,0x32 = asrs.w r2, r12, #15 +0x4f,0xea,0xe3,0x43 = asr.w r3, r3, #19 +0x5f,0xea,0xa8,0x08 = asrs.w r8, r8, #2 +0x5f,0xea,0x67,0x17 = asrs.w r7, r7, #5 +0x4f,0xea,0x6c,0x5c = asr.w r12, r12, #21 +0x44,0xfa,0x02,0xf3 = asr.w r3, r4, r2 +0x41,0xfa,0x02,0xf1 = asr.w r1, r1, r2 +0x54,0xfa,0x08,0xf3 = asrs.w r3, r4, r8 +0x08,0xbf = it eq +0x13,0xf5,0xce,0xa9 = bmi.w #-183392 +// 0x6f,0xf3,0xd3,0x05 = bfc r5, #3, #17 +0x38,0xbf = it lo +// 0x6f,0xf3,0xd3,0x05 = bfclo r5, #3, #17 +// 0x62,0xf3,0xd3,0x05 = bfi r5, r2, #3, #17 +0x18,0xbf = it ne +// 0x62,0xf3,0xd3,0x05 = bfine r5, r2, #3, #17 +0x21,0xf0,0x0f,0x0a = bic r10, r1, #15 +0x22,0xf0,0xff,0x35 = bic r5, r2, #4294967295 +0x3a,0xf0,0xff,0x3b = bics r11, r10, #4294967295 +0x23,0xea,0x06,0x0c = bic.w r12, r3, r6 +0x22,0xea,0x06,0x3b = bic.w r11, r2, r6, lsl #12 +0x24,0xea,0xd1,0x28 = bic.w r8, r4, r1, lsr #11 +0x25,0xea,0xd7,0x37 = bic.w r7, r5, r7, lsr #15 +0x27,0xea,0x29,0x06 = bic.w r6, r7, r9, asr #32 +0x26,0xea,0x78,0x05 = bic.w r5, r6, r8, ror #1 +0x21,0xf0,0x0f,0x01 = bic r1, r1, #15 +0x21,0xea,0x01,0x01 = bic.w r1, r1, r1 +0x24,0xea,0xc2,0x74 = bic.w r4, r4, r2, lsl #31 +0x26,0xea,0x13,0x36 = bic.w r6, r6, r3, lsr #12 +0x27,0xea,0xd4,0x17 = bic.w r7, r7, r4, lsr #7 +0x28,0xea,0xe5,0x38 = bic.w r8, r8, r5, asr #15 +0x2c,0xea,0x76,0x7c = bic.w r12, r12, r6, ror #29 +0x58,0xbf = it pl +0xea,0xbe = bkpt #234 +0xc5,0xf3,0x00,0x8f = bxj r5 +0x18,0xbf = it ne +// 0xc7,0xf3,0x00,0x8f = bxjne r7 +// 0x1f,0xb9 = cbnz r7, #6 +// 0x37,0xb9 = cbnz r7, #12 +0x11,0xee,0x81,0x17 = cdp p7, #1, c1, c1, c1, #4 +0x11,0xfe,0x81,0x17 = cdp2 p7, #1, c1, c1, c1, #4 +0xbf,0xf3,0x2f,0x8f = clrex +0x18,0xbf = it ne +// 0xb2,0xfa,0x82,0xf1 = clz r1, r2 +0x08,0xbf = it eq +// 0xb2,0xfa,0x82,0xf1 = clzeq r1, r2 +0x11,0xf1,0x0f,0x0f = cmn.w r1, #15 +0x18,0xeb,0x06,0x0f = cmn.w r8, r6 +0x11,0xeb,0x86,0x2f = cmn.w r1, r6, lsl #10 +0x11,0xeb,0x96,0x2f = cmn.w r1, r6, lsr #10 +0x1d,0xeb,0x96,0x2f = cmn.w sp, r6, lsr #10 +0x11,0xeb,0xa6,0x2f = cmn.w r1, r6, asr #10 +0x11,0xeb,0xb6,0x2f = cmn.w r1, r6, ror #10 +0xb5,0xf5,0x7f,0x4f = cmp.w r5, #65280 +0xb4,0xeb,0x0c,0x0f = cmp.w r4, r12 +0xb9,0xeb,0x06,0x3f = cmp.w r9, r6, lsl #12 +0xb3,0xeb,0xd7,0x7f = cmp.w r3, r7, lsr #31 +0xbd,0xeb,0x56,0x0f = cmp.w sp, r6, lsr #1 +0xb2,0xeb,0x25,0x6f = cmp.w r2, r5, asr #24 +0xb1,0xeb,0xf4,0x3f = cmp.w r1, r4, ror #15 +0x12,0xf1,0x02,0x0f = cmn.w r2, #2 +0xb9,0xf1,0x01,0x0f = cmp.w r9, #1 +0x61,0xb6 = cpsie f +0x74,0xb6 = cpsid a +0xaf,0xf3,0x20,0x84 = cpsie.w f +0xaf,0xf3,0x80,0x86 = cpsid.w a +0xaf,0xf3,0x43,0x85 = cpsie i, #3 +0xaf,0xf3,0x43,0x85 = cpsie i, #3 +0xaf,0xf3,0x29,0x87 = cpsid f, #9 +0xaf,0xf3,0x29,0x87 = cpsid f, #9 +0xaf,0xf3,0x00,0x81 = cps #0 +0xaf,0xf3,0x00,0x81 = cps #0 +0xaf,0xf3,0xf5,0x80 = dbg #5 +0xaf,0xf3,0xf0,0x80 = dbg #0 +0xaf,0xf3,0xff,0x80 = dbg #15 +0xbf,0xf3,0x5f,0x8f = dmb sy +0xbf,0xf3,0x5e,0x8f = dmb st +0xbf,0xf3,0x5d,0x8f = dmb #0xd +0xbf,0xf3,0x5c,0x8f = dmb #0xc +0xbf,0xf3,0x5b,0x8f = dmb ish +0xbf,0xf3,0x5a,0x8f = dmb ishst +0xbf,0xf3,0x59,0x8f = dmb #0x9 +0xbf,0xf3,0x58,0x8f = dmb #0x8 +0xbf,0xf3,0x57,0x8f = dmb nsh +0xbf,0xf3,0x56,0x8f = dmb nshst +0xbf,0xf3,0x55,0x8f = dmb #0x5 +0xbf,0xf3,0x54,0x8f = dmb #0x4 +0xbf,0xf3,0x53,0x8f = dmb osh +0xbf,0xf3,0x52,0x8f = dmb oshst +0xbf,0xf3,0x51,0x8f = dmb #0x1 +0xbf,0xf3,0x50,0x8f = dmb #0x0 +0xbf,0xf3,0x5f,0x8f = dmb sy +0xbf,0xf3,0x5e,0x8f = dmb st +0xbf,0xf3,0x5b,0x8f = dmb ish +0xbf,0xf3,0x5b,0x8f = dmb ish +0xbf,0xf3,0x5a,0x8f = dmb ishst +0xbf,0xf3,0x5a,0x8f = dmb ishst +0xbf,0xf3,0x57,0x8f = dmb nsh +0xbf,0xf3,0x57,0x8f = dmb nsh +0xbf,0xf3,0x56,0x8f = dmb nshst +0xbf,0xf3,0x56,0x8f = dmb nshst +0xbf,0xf3,0x53,0x8f = dmb osh +0xbf,0xf3,0x52,0x8f = dmb oshst +0xbf,0xf3,0x5f,0x8f = dmb sy +0xbf,0xf3,0x4f,0x8f = dsb sy +0xbf,0xf3,0x4e,0x8f = dsb st +0xbf,0xf3,0x4d,0x8f = dsb #0xd +0xbf,0xf3,0x4b,0x8f = dsb ish +0xbf,0xf3,0x4a,0x8f = dsb ishst +0xbf,0xf3,0x49,0x8f = dsb #0x9 +0xbf,0xf3,0x48,0x8f = dsb #0x8 +0xbf,0xf3,0x47,0x8f = dsb nsh +0xbf,0xf3,0x46,0x8f = dsb nshst +0xbf,0xf3,0x45,0x8f = dsb #0x5 +0xbf,0xf3,0x44,0x8f = dsb #0x4 +0xbf,0xf3,0x43,0x8f = dsb osh +0xbf,0xf3,0x42,0x8f = dsb oshst +0xbf,0xf3,0x41,0x8f = dsb #0x1 +0xbf,0xf3,0x40,0x8f = dsb #0x0 +0xbf,0xf3,0x4f,0x8f = dsb sy +0xbf,0xf3,0x4e,0x8f = dsb st +0xbf,0xf3,0x4b,0x8f = dsb ish +0xbf,0xf3,0x4b,0x8f = dsb ish +0xbf,0xf3,0x4a,0x8f = dsb ishst +0xbf,0xf3,0x4a,0x8f = dsb ishst +0xbf,0xf3,0x47,0x8f = dsb nsh +0xbf,0xf3,0x47,0x8f = dsb nsh +0xbf,0xf3,0x46,0x8f = dsb nshst +0xbf,0xf3,0x46,0x8f = dsb nshst +0xbf,0xf3,0x43,0x8f = dsb osh +0xbf,0xf3,0x42,0x8f = dsb oshst +0xbf,0xf3,0x4f,0x8f = dsb sy +0x85,0xf4,0x70,0x44 = eor r4, r5, #61440 +0x85,0xea,0x06,0x04 = eor.w r4, r5, r6 +0x85,0xea,0x46,0x14 = eor.w r4, r5, r6, lsl #5 +0x85,0xea,0x56,0x14 = eor.w r4, r5, r6, lsr #5 +0x85,0xea,0x56,0x14 = eor.w r4, r5, r6, lsr #5 +0x85,0xea,0x66,0x14 = eor.w r4, r5, r6, asr #5 +0x85,0xea,0x76,0x14 = eor.w r4, r5, r6, ror #5 +0xbf,0xf3,0x6f,0x8f = isb sy +0xbf,0xf3,0x6f,0x8f = isb sy +0xbf,0xf3,0x6f,0x8f = isb sy +0xbf,0xf3,0x61,0x8f = isb #0x1 +0x0d,0xbf = iteet eq +// 0x88,0x18 = addeq r0, r1, r2 +// 0x00,0xbf = nopne +// 0xf5,0x1b = subne r5, r6, r7 +0x0d,0xbf = iteet eq +// 0x88,0x18 = addeq r0, r1, r2 +// 0x00,0xbf = nopne +// 0xf5,0x1b = subne r5, r6, r7 +0x91,0xfd,0x01,0x80 = ldc2 p0, c8, [r1, #4] +0x92,0xfd,0x00,0x71 = ldc2 p1, c7, [r2] +0x13,0xfd,0x38,0x62 = ldc2 p2, c6, [r3, #-224] +0x34,0xfd,0x1e,0x53 = ldc2 p3, c5, [r4, #-120]! +0xb5,0xfc,0x04,0x44 = ldc2 p4, c4, [r5], #16 +0x36,0xfc,0x12,0x35 = ldc2 p5, c3, [r6], #-72 +0xd7,0xfd,0x01,0x26 = ldc2l p6, c2, [r7, #4] +0xd8,0xfd,0x00,0x17 = ldc2l p7, c1, [r8] +0x59,0xfd,0x38,0x08 = ldc2l p8, c0, [r9, #-224] +0x7a,0xfd,0x1e,0x19 = ldc2l p9, c1, [r10, #-120]! +0xfb,0xfc,0x04,0x20 = ldc2l p0, c2, [r11], #16 +0x7c,0xfc,0x12,0x31 = ldc2l p1, c3, [r12], #-72 +0x90,0xed,0x01,0x4c = ldc p12, c4, [r0, #4] +0x91,0xed,0x00,0x5d = ldc p13, c5, [r1] +0x12,0xed,0x38,0x6e = ldc p14, c6, [r2, #-224] +0x33,0xed,0x1e,0x7f = ldc p15, c7, [r3, #-120]! +0xb4,0xec,0x04,0x85 = ldc p5, c8, [r4], #16 +0x35,0xec,0x12,0x94 = ldc p4, c9, [r5], #-72 +0xd6,0xed,0x01,0xa3 = ldcl p3, c10, [r6, #4] +0xd7,0xed,0x00,0xb2 = ldcl p2, c11, [r7] +0x58,0xed,0x38,0xc1 = ldcl p1, c12, [r8, #-224] +0x79,0xed,0x1e,0xd0 = ldcl p0, c13, [r9, #-120]! +0xfa,0xec,0x04,0xe6 = ldcl p6, c14, [r10], #16 +0x7b,0xec,0x12,0xf7 = ldcl p7, c15, [r11], #-72 +0x91,0xfc,0x19,0x82 = ldc2 p2, c8, [r1], {25} +0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} +0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} +0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} +0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} +0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} +0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} +0xb5,0xe8,0x06,0x00 = ldm.w r5!, {r1, r2} +0x92,0xe8,0x06,0x00 = ldm.w r2, {r1, r2} +0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} +0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} +0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} +0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9} +0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6} +0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} +0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8} +0xbd,0xe8,0xf0,0x8f = pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc} +0x14,0xe9,0x30,0x03 = ldmdb r4, {r4, r5, r8, r9} +0x14,0xe9,0x60,0x00 = ldmdb r4, {r5, r6} +0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} +0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} +0x14,0xe9,0x60,0x00 = ldmdb r4, {r5, r6} +0x35,0xe9,0x08,0x01 = ldmdb r5!, {r3, r8} +0x55,0xf8,0x04,0x5c = ldr r5, [r5, #-4] +0x35,0x6a = ldr r5, [r6, #32] +0xd6,0xf8,0x21,0x50 = ldr.w r5, [r6, #33] +0xd6,0xf8,0x01,0x51 = ldr.w r5, [r6, #257] +0xd7,0xf8,0x01,0xf1 = ldr.w pc, [r7, #257] +0x54,0xf8,0xff,0x2f = ldr r2, [r4, #255]! +0x5d,0xf8,0x04,0x8f = ldr r8, [sp, #4]! +0x5d,0xf8,0x04,0xed = ldr lr, [sp, #-4]! +0x54,0xf8,0xff,0x2b = ldr r2, [r4], #255 +0x5d,0xf8,0x04,0x8b = ldr r8, [sp], #4 +0x5d,0xf8,0x04,0xe9 = ldr lr, [sp], #-4 +0x02,0x4f = ldr r7, [pc, #8] +0x02,0x4f = ldr r7, [pc, #8] +0xdf,0xf8,0x08,0x70 = ldr.w r7, [pc, #8] +0xff,0x4c = ldr r4, [pc, #1020] +0x5f,0xf8,0xfc,0x33 = ldr.w r3, [pc, #-1020] +0xdf,0xf8,0x00,0x64 = ldr.w r6, [pc, #1024] +0x5f,0xf8,0x00,0x04 = ldr.w r0, [pc, #-1024] +0xdf,0xf8,0xff,0x2f = ldr.w r2, [pc, #4095] +0x5f,0xf8,0xff,0x1f = ldr.w r1, [pc, #-4095] +0xdf,0xf8,0x84,0x80 = ldr.w r8, [pc, #132] +0xdf,0xf8,0x00,0xf1 = ldr.w pc, [pc, #256] +0x5f,0xf8,0x90,0xf1 = ldr.w pc, [pc, #-400] +0x1f,0xf8,0x00,0x90 = ldrb.w r9, [pc, #-0] +0x1f,0xf9,0x00,0xb0 = ldrsb.w r11, [pc, #-0] +0x3f,0xf8,0x00,0xa0 = ldrh.w r10, [pc, #-0] +0x3f,0xf9,0x00,0x10 = ldrsh.w r1, [pc, #-0] +0x5f,0xf8,0x00,0x50 = ldr.w r5, [pc, #-0] +0x58,0xf8,0x01,0x10 = ldr.w r1, [r8, r1] +0x55,0xf8,0x02,0x40 = ldr.w r4, [r5, r2] +0x50,0xf8,0x32,0x60 = ldr.w r6, [r0, r2, lsl #3] +0x58,0xf8,0x22,0x80 = ldr.w r8, [r8, r2, lsl #2] +0x5d,0xf8,0x12,0x70 = ldr.w r7, [sp, r2, lsl #1] +0x5d,0xf8,0x02,0x70 = ldr.w r7, [sp, r2] +0x15,0xf8,0x04,0x5c = ldrb r5, [r5, #-4] +0x96,0xf8,0x20,0x50 = ldrb.w r5, [r6, #32] +0x96,0xf8,0x21,0x50 = ldrb.w r5, [r6, #33] +0x96,0xf8,0x01,0x51 = ldrb.w r5, [r6, #257] +0x97,0xf8,0x01,0xe1 = ldrb.w lr, [r7, #257] +0x18,0xf8,0xff,0x5f = ldrb r5, [r8, #255]! +0x15,0xf8,0x04,0x2f = ldrb r2, [r5, #4]! +0x14,0xf8,0x04,0x1d = ldrb r1, [r4, #-4]! +0x13,0xf8,0xff,0xeb = ldrb lr, [r3], #255 +0x12,0xf8,0x04,0x9b = ldrb r9, [r2], #4 +0x1d,0xf8,0x04,0x39 = ldrb r3, [sp], #-4 +0x18,0xf8,0x01,0x10 = ldrb.w r1, [r8, r1] +0x15,0xf8,0x02,0x40 = ldrb.w r4, [r5, r2] +0x10,0xf8,0x32,0x60 = ldrb.w r6, [r0, r2, lsl #3] +0x18,0xf8,0x22,0x80 = ldrb.w r8, [r8, r2, lsl #2] +0x1d,0xf8,0x12,0x70 = ldrb.w r7, [sp, r2, lsl #1] +0x1d,0xf8,0x02,0x70 = ldrb.w r7, [sp, r2] +0x12,0xf8,0x00,0x1e = ldrbt r1, [r2] +0x18,0xf8,0x00,0x1e = ldrbt r1, [r8] +0x18,0xf8,0x03,0x1e = ldrbt r1, [r8, #3] +0x18,0xf8,0xff,0x1e = ldrbt r1, [r8, #255] +0xd6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24] +0xf6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24]! +0xf6,0xe8,0x01,0x35 = ldrd r3, r5, [r6], #4 +0x76,0xe8,0x02,0x35 = ldrd r3, r5, [r6], #-8 +0xd6,0xe9,0x00,0x35 = ldrd r3, r5, [r6] +0xd3,0xe9,0x00,0x81 = ldrd r8, r1, [r3] +0x52,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0] +0x72,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0]! +0x72,0xe8,0x00,0x01 = ldrd r0, r1, [r2], #-0 +0x54,0xe8,0x00,0x1f = ldrex r1, [r4] +0x54,0xe8,0x00,0x8f = ldrex r8, [r4] +0x5d,0xe8,0x20,0x2f = ldrex r2, [sp, #128] +0xd7,0xe8,0x4f,0x5f = ldrexb r5, [r7] +0xdc,0xe8,0x5f,0x9f = ldrexh r9, [r12] +0xd4,0xe8,0x7f,0x93 = ldrexd r9, r3, [r4] +0x35,0xf8,0x04,0x5c = ldrh r5, [r5, #-4] +0x35,0x8c = ldrh r5, [r6, #32] +0xb6,0xf8,0x21,0x50 = ldrh.w r5, [r6, #33] +0xb6,0xf8,0x01,0x51 = ldrh.w r5, [r6, #257] +0xb7,0xf8,0x01,0xe1 = ldrh.w lr, [r7, #257] +0x38,0xf8,0xff,0x5f = ldrh r5, [r8, #255]! +0x35,0xf8,0x04,0x2f = ldrh r2, [r5, #4]! +0x34,0xf8,0x04,0x1d = ldrh r1, [r4, #-4]! +0x33,0xf8,0xff,0xeb = ldrh lr, [r3], #255 +0x32,0xf8,0x04,0x9b = ldrh r9, [r2], #4 +0x3d,0xf8,0x04,0x39 = ldrh r3, [sp], #-4 +0x38,0xf8,0x01,0x10 = ldrh.w r1, [r8, r1] +0x35,0xf8,0x02,0x40 = ldrh.w r4, [r5, r2] +0x30,0xf8,0x32,0x60 = ldrh.w r6, [r0, r2, lsl #3] +0x38,0xf8,0x22,0x80 = ldrh.w r8, [r8, r2, lsl #2] +0x3d,0xf8,0x12,0x70 = ldrh.w r7, [sp, r2, lsl #1] +0x3d,0xf8,0x02,0x70 = ldrh.w r7, [sp, r2] +0x32,0xf8,0x00,0x1e = ldrht r1, [r2] +0x38,0xf8,0x00,0x1e = ldrht r1, [r8] +0x38,0xf8,0x03,0x1e = ldrht r1, [r8, #3] +0x38,0xf8,0xff,0x1e = ldrht r1, [r8, #255] +0x15,0xf9,0x04,0x5c = ldrsb r5, [r5, #-4] +0x96,0xf9,0x20,0x50 = ldrsb.w r5, [r6, #32] +0x96,0xf9,0x21,0x50 = ldrsb.w r5, [r6, #33] +0x96,0xf9,0x01,0x51 = ldrsb.w r5, [r6, #257] +0x97,0xf9,0x01,0xe1 = ldrsb.w lr, [r7, #257] +0x18,0xf9,0x01,0x10 = ldrsb.w r1, [r8, r1] +0x15,0xf9,0x02,0x40 = ldrsb.w r4, [r5, r2] +0x10,0xf9,0x32,0x60 = ldrsb.w r6, [r0, r2, lsl #3] +0x18,0xf9,0x22,0x80 = ldrsb.w r8, [r8, r2, lsl #2] +0x1d,0xf9,0x12,0x70 = ldrsb.w r7, [sp, r2, lsl #1] +0x1d,0xf9,0x02,0x70 = ldrsb.w r7, [sp, r2] +0x18,0xf9,0xff,0x5f = ldrsb r5, [r8, #255]! +0x15,0xf9,0x04,0x2f = ldrsb r2, [r5, #4]! +0x14,0xf9,0x04,0x1d = ldrsb r1, [r4, #-4]! +0x13,0xf9,0xff,0xeb = ldrsb lr, [r3], #255 +0x12,0xf9,0x04,0x9b = ldrsb r9, [r2], #4 +0x1d,0xf9,0x04,0x39 = ldrsb r3, [sp], #-4 +0x12,0xf9,0x00,0x1e = ldrsbt r1, [r2] +0x18,0xf9,0x00,0x1e = ldrsbt r1, [r8] +0x18,0xf9,0x03,0x1e = ldrsbt r1, [r8, #3] +0x18,0xf9,0xff,0x1e = ldrsbt r1, [r8, #255] +0x35,0xf9,0x04,0x5c = ldrsh r5, [r5, #-4] +0xb6,0xf9,0x20,0x50 = ldrsh.w r5, [r6, #32] +0xb6,0xf9,0x21,0x50 = ldrsh.w r5, [r6, #33] +0xb6,0xf9,0x01,0x51 = ldrsh.w r5, [r6, #257] +0xb7,0xf9,0x01,0xe1 = ldrsh.w lr, [r7, #257] +0x38,0xf9,0x01,0x10 = ldrsh.w r1, [r8, r1] +0x35,0xf9,0x02,0x40 = ldrsh.w r4, [r5, r2] +0x30,0xf9,0x32,0x60 = ldrsh.w r6, [r0, r2, lsl #3] +0x38,0xf9,0x22,0x80 = ldrsh.w r8, [r8, r2, lsl #2] +0x3d,0xf9,0x12,0x70 = ldrsh.w r7, [sp, r2, lsl #1] +0x3d,0xf9,0x02,0x70 = ldrsh.w r7, [sp, r2] +0x38,0xf9,0xff,0x5f = ldrsh r5, [r8, #255]! +0x35,0xf9,0x04,0x2f = ldrsh r2, [r5, #4]! +0x34,0xf9,0x04,0x1d = ldrsh r1, [r4, #-4]! +0x33,0xf9,0xff,0xeb = ldrsh lr, [r3], #255 +0x32,0xf9,0x04,0x9b = ldrsh r9, [r2], #4 +0x3d,0xf9,0x04,0x39 = ldrsh r3, [sp], #-4 +0x32,0xf9,0x00,0x1e = ldrsht r1, [r2] +0x38,0xf9,0x00,0x1e = ldrsht r1, [r8] +0x38,0xf9,0x03,0x1e = ldrsht r1, [r8, #3] +0x38,0xf9,0xff,0x1e = ldrsht r1, [r8, #255] +0x52,0xf8,0x00,0x1e = ldrt r1, [r2] +0x56,0xf8,0x00,0x2e = ldrt r2, [r6] +0x57,0xf8,0x03,0x3e = ldrt r3, [r7, #3] +0x59,0xf8,0xff,0x4e = ldrt r4, [r9, #255] +0x4f,0xea,0x03,0x32 = lsl.w r2, r3, #12 +0x5f,0xea,0xc3,0x78 = lsls.w r8, r3, #31 +0x5f,0xea,0x43,0x02 = lsls.w r2, r3, #1 +0x4f,0xea,0x03,0x12 = lsl.w r2, r3, #4 +0x5f,0xea,0xcc,0x32 = lsls.w r2, r12, #15 +0x4f,0xea,0xc3,0x43 = lsl.w r3, r3, #19 +0x5f,0xea,0x88,0x08 = lsls.w r8, r8, #2 +0x5f,0xea,0x47,0x17 = lsls.w r7, r7, #5 +0x4f,0xea,0x4c,0x5c = lsl.w r12, r12, #21 +0x04,0xfa,0x02,0xf3 = lsl.w r3, r4, r2 +0x01,0xfa,0x02,0xf1 = lsl.w r1, r1, r2 +0x14,0xfa,0x08,0xf3 = lsls.w r3, r4, r8 +0x4f,0xea,0x13,0x32 = lsr.w r2, r3, #12 +0x5f,0xea,0x13,0x08 = lsrs.w r8, r3, #32 +0x5f,0xea,0x53,0x02 = lsrs.w r2, r3, #1 +0x4f,0xea,0x13,0x12 = lsr.w r2, r3, #4 +0x5f,0xea,0xdc,0x32 = lsrs.w r2, r12, #15 +0x4f,0xea,0xd3,0x43 = lsr.w r3, r3, #19 +0x5f,0xea,0x98,0x08 = lsrs.w r8, r8, #2 +0x5f,0xea,0x57,0x17 = lsrs.w r7, r7, #5 +0x4f,0xea,0x5c,0x5c = lsr.w r12, r12, #21 +0x24,0xfa,0x02,0xf3 = lsr.w r3, r4, r2 +0x21,0xfa,0x02,0xf1 = lsr.w r1, r1, r2 +0x34,0xfa,0x08,0xf3 = lsrs.w r3, r4, r8 +0x21,0xee,0x91,0x57 = mcr p7, #1, r5, c1, c1, #4 +0x21,0xfe,0x91,0x57 = mcr2 p7, #1, r5, c1, c1, #4 +0x00,0xee,0x15,0x4e = mcr p14, #0, r4, c0, c5, #0 +0x41,0xfe,0x13,0x24 = mcr2 p4, #2, r2, c1, c3, #0 +0x44,0xec,0xf1,0x57 = mcrr p7, #15, r5, r4, c1 +0x44,0xfc,0xf1,0x57 = mcrr2 p7, #15, r5, r4, c1 +0x02,0xfb,0x03,0x41 = mla r1, r2, r3, r4 +0x02,0xfb,0x13,0x41 = mls r1, r2, r3, r4 +0x15,0x21 = movs r1, #21 +0x5f,0xf0,0x15,0x01 = movs.w r1, #21 +0x5f,0xf0,0x15,0x08 = movs.w r8, #21 +0x4f,0xf6,0xff,0x70 = movw r0, #65535 +0x4a,0xf6,0x01,0x31 = movw r1, #43777 +0x4a,0xf6,0x10,0x31 = movw r1, #43792 +0x4f,0xf0,0x7f,0x70 = mov.w r0, #66846720 +0x4f,0xf0,0x7f,0x70 = mov.w r0, #66846720 +0x5f,0xf0,0x7f,0x70 = movs.w r0, #66846720 +0x06,0xbf = itte eq +// 0x5f,0xf0,0x0c,0x01 = movseq.w r1, #12 +// 0x0c,0x21 = moveq r1, #12 +// 0x4f,0xf0,0x0c,0x01 = movne.w r1, #12 +0x4f,0xf4,0xe1,0x76 = mov.w r6, #450 +0x38,0xbf = it lo +// 0x4f,0xf0,0xff,0x31 = movlo.w r1, #-1 +0x6f,0xf0,0x02,0x03 = mvn r3, #2 +0x4a,0xf6,0xcd,0x3b = movw r11, #43981 +0x01,0x20 = movs r0, #1 +0x18,0xbf = it ne +// 0x0f,0x23 = movne r3, #15 +0x04,0xbf = itt eq +// 0xff,0x20 = moveq r0, #255 +// 0x40,0xf2,0x00,0x11 = movweq r1, #256 +0x4f,0xea,0x02,0x46 = lsl.w r6, r2, #16 +0x4f,0xea,0x12,0x46 = lsr.w r6, r2, #16 +0x16,0x10 = asrs r6, r2, #32 +0x5f,0xea,0x72,0x16 = rors.w r6, r2, #5 +// 0xac,0x40 = lsls r4, r5 +// 0xec,0x40 = lsrs r4, r5 +// 0x2c,0x41 = asrs r4, r5 +// 0xec,0x41 = rors r4, r5 +0x04,0xfa,0x05,0xf4 = lsl.w r4, r4, r5 +0x74,0xfa,0x08,0xf4 = rors.w r4, r4, r8 +0x35,0xfa,0x06,0xf4 = lsrs.w r4, r5, r6 +0x01,0xbf = itttt eq +// 0xac,0x40 = lsleq r4, r5 +// 0xec,0x40 = lsreq r4, r5 +// 0x2c,0x41 = asreq r4, r5 +// 0xec,0x41 = roreq r4, r5 +0x4f,0xea,0x34,0x04 = rrx r4, r4 +0xc0,0xf2,0x07,0x03 = movt r3, #7 +0xcf,0xf6,0xff,0x76 = movt r6, #65535 +0x08,0xbf = it eq +// 0xc0,0xf6,0xf0,0x74 = movteq r4, #4080 +0x11,0xee,0x92,0x1e = mrc p14, #0, r1, c1, c2, #4 +0xff,0xee,0xd6,0xff = mrc p15, #7, apsr_nzcv, c15, c6, #6 +0x32,0xee,0x12,0x19 = mrc p9, #1, r1, c2, c2, #0 +0x73,0xfe,0x14,0x3c = mrc2 p12, #3, r3, c3, c4, #0 +0x11,0xfe,0x92,0x1e = mrc2 p14, #0, r1, c1, c2, #4 +0xff,0xfe,0x30,0xf8 = mrc2 p8, #7, apsr_nzcv, c15, c0, #1 +0x54,0xec,0x11,0x57 = mrrc p7, #1, r5, r4, c1 +0x54,0xfc,0x11,0x57 = mrrc2 p7, #1, r5, r4, c1 +0xef,0xf3,0x00,0x88 = mrs r8, apsr +0xef,0xf3,0x00,0x88 = mrs r8, apsr +0xff,0xf3,0x00,0x88 = mrs r8, spsr +0x81,0xf3,0x00,0x88 = msr apsr_nzcvq, r1 +0x82,0xf3,0x00,0x84 = msr apsr_g, r2 +0x83,0xf3,0x00,0x88 = msr apsr_nzcvq, r3 +0x84,0xf3,0x00,0x88 = msr apsr_nzcvq, r4 +0x85,0xf3,0x00,0x8c = msr apsr_nzcvqg, r5 +0x86,0xf3,0x00,0x89 = msr cpsr_fc, r6 +0x87,0xf3,0x00,0x81 = msr cpsr_c, r7 +0x88,0xf3,0x00,0x82 = msr cpsr_x, r8 +0x89,0xf3,0x00,0x89 = msr cpsr_fc, r9 +0x8b,0xf3,0x00,0x89 = msr cpsr_fc, r11 +0x8c,0xf3,0x00,0x8e = msr cpsr_fsx, r12 +0x90,0xf3,0x00,0x89 = msr spsr_fc, r0 +0x95,0xf3,0x00,0x8f = msr spsr_fsxc, r5 +0x88,0xf3,0x00,0x8f = msr cpsr_fsxc, r8 +0x83,0xf3,0x00,0x89 = msr cpsr_fc, r3 +0x63,0x43 = muls r3, r4, r3 +0x04,0xfb,0x03,0xf3 = mul r3, r4, r3 +0x04,0xfb,0x06,0xf3 = mul r3, r4, r6 +0x08,0xbf = it eq +// 0x04,0xfb,0x05,0xf3 = muleq r3, r4, r5 +0xd8,0xbf = it le +// 0x04,0xfb,0x08,0xf4 = mulle r4, r4, r8 +0x06,0xfb,0x05,0xf5 = mul r5, r6, r5 +0x7f,0xf0,0x15,0x08 = mvns r8, #21 +0x6f,0xf0,0x7f,0x70 = mvn r0, #66846720 +0x7f,0xf0,0x7f,0x70 = mvns r0, #66846720 +0x06,0xbf = itte eq +// 0x7f,0xf0,0x0c,0x01 = mvnseq r1, #12 +// 0x6f,0xf0,0x0c,0x01 = mvneq r1, #12 +// 0x6f,0xf0,0x0c,0x01 = mvnne r1, #12 +0x6f,0xea,0x03,0x02 = mvn.w r2, r3 +// 0xda,0x43 = mvns r2, r3 +0x6f,0xea,0xc6,0x45 = mvn.w r5, r6, lsl #19 +0x6f,0xea,0x56,0x25 = mvn.w r5, r6, lsr #9 +0x6f,0xea,0x26,0x15 = mvn.w r5, r6, asr #4 +0x6f,0xea,0xb6,0x15 = mvn.w r5, r6, ror #6 +0x6f,0xea,0x36,0x05 = mvn.w r5, r6, rrx +0x08,0xbf = it eq +// 0xda,0x43 = mvneq r2, r3 +0xc2,0xf1,0x00,0x05 = rsb.w r5, r2, #0 +0xc8,0xf1,0x00,0x05 = rsb.w r5, r8, #0 +0xaf,0xf3,0x00,0x80 = nop.w +0x65,0xf4,0x70,0x44 = orn r4, r5, #61440 +0x65,0xea,0x06,0x04 = orn r4, r5, r6 +0x75,0xea,0x06,0x04 = orns r4, r5, r6 +0x65,0xea,0x46,0x14 = orn r4, r5, r6, lsl #5 +0x75,0xea,0x56,0x14 = orns r4, r5, r6, lsr #5 +0x65,0xea,0x56,0x14 = orn r4, r5, r6, lsr #5 +0x75,0xea,0x66,0x14 = orns r4, r5, r6, asr #5 +0x65,0xea,0x76,0x14 = orn r4, r5, r6, ror #5 +0x45,0xf4,0x70,0x44 = orr r4, r5, #61440 +0x45,0xea,0x06,0x04 = orr.w r4, r5, r6 +0x45,0xea,0x46,0x14 = orr.w r4, r5, r6, lsl #5 +0x55,0xea,0x56,0x14 = orrs.w r4, r5, r6, lsr #5 +0x45,0xea,0x56,0x14 = orr.w r4, r5, r6, lsr #5 +0x55,0xea,0x66,0x14 = orrs.w r4, r5, r6, asr #5 +0x45,0xea,0x76,0x14 = orr.w r4, r5, r6, ror #5 +0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 +0xc2,0xea,0xc3,0x72 = pkhbt r2, r2, r3, lsl #31 +0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 +0xc2,0xea,0xc3,0x32 = pkhbt r2, r2, r3, lsl #15 +0xc2,0xea,0x03,0x02 = pkhbt r2, r2, r3 +0xc2,0xea,0xe3,0x72 = pkhtb r2, r2, r3, asr #31 +0xc2,0xea,0xe3,0x32 = pkhtb r2, r2, r3, asr #15 +0x15,0xf8,0x04,0xfc = pld [r5, #-4] +0x96,0xf8,0x20,0xf0 = pld [r6, #32] +0x96,0xf8,0x21,0xf0 = pld [r6, #33] +0x96,0xf8,0x01,0xf1 = pld [r6, #257] +0x97,0xf8,0x01,0xf1 = pld [r7, #257] +0x91,0xf8,0x00,0xf0 = pld [r1] +0x11,0xf8,0x00,0xfc = pld [r1, #-0] +0x1f,0xf8,0xff,0xff = pld [pc, #-4095] +0x18,0xf8,0x01,0xf0 = pld [r8, r1] +0x15,0xf8,0x02,0xf0 = pld [r5, r2] +0x10,0xf8,0x32,0xf0 = pld [r0, r2, lsl #3] +0x18,0xf8,0x22,0xf0 = pld [r8, r2, lsl #2] +0x1d,0xf8,0x12,0xf0 = pld [sp, r2, lsl #1] +0x1d,0xf8,0x02,0xf0 = pld [sp, r2] +0x15,0xf9,0x04,0xfc = pli [r5, #-4] +0x96,0xf9,0x20,0xf0 = pli [r6, #32] +0x96,0xf9,0x21,0xf0 = pli [r6, #33] +0x96,0xf9,0x01,0xf1 = pli [r6, #257] +0x97,0xf9,0x01,0xf1 = pli [r7, #257] +0x9f,0xf9,0xff,0xff = pli [pc, #4095] +0x1f,0xf9,0xff,0xff = pli [pc, #-4095] +0x18,0xf9,0x01,0xf0 = pli [r8, r1] +0x15,0xf9,0x02,0xf0 = pli [r5, r2] +0x10,0xf9,0x32,0xf0 = pli [r0, r2, lsl #3] +0x18,0xf9,0x22,0xf0 = pli [r8, r2, lsl #2] +0x1d,0xf9,0x12,0xf0 = pli [sp, r2, lsl #1] +0x1d,0xf9,0x02,0xf0 = pli [sp, r2] +0xbd,0xe8,0x04,0x02 = pop.w {r2, r9} +0x2d,0xe9,0x04,0x02 = push.w {r2, r9} +// 0x83,0xfa,0x82,0xf1 = qadd r1, r2, r3 +// 0x92,0xfa,0x13,0xf1 = qadd16 r1, r2, r3 +// 0x82,0xfa,0x13,0xf1 = qadd8 r1, r2, r3 +0xc6,0xbf = itte gt +// 0x83,0xfa,0x82,0xf1 = qaddgt r1, r2, r3 +// 0x92,0xfa,0x13,0xf1 = qadd16gt r1, r2, r3 +// 0x82,0xfa,0x13,0xf1 = qadd8le r1, r2, r3 +// 0x88,0xfa,0x97,0xf6 = qdadd r6, r7, r8 +// 0x88,0xfa,0xb7,0xf6 = qdsub r6, r7, r8 +0x84,0xbf = itt hi +// 0x88,0xfa,0x97,0xf6 = qdaddhi r6, r7, r8 +// 0x88,0xfa,0xb7,0xf6 = qdsubhi r6, r7, r8 +// 0xec,0xfa,0x10,0xf9 = qsax r9, r12, r0 +0x08,0xbf = it eq +// 0xec,0xfa,0x10,0xf9 = qsaxeq r9, r12, r0 +// 0x83,0xfa,0xa2,0xf1 = qsub r1, r2, r3 +// 0xd2,0xfa,0x13,0xf1 = qsub16 r1, r2, r3 +// 0xc2,0xfa,0x13,0xf1 = qsub8 r1, r2, r3 +0xd6,0xbf = itet le +// 0x83,0xfa,0xa2,0xf1 = qsuble r1, r2, r3 +// 0xd2,0xfa,0x13,0xf1 = qsub16gt r1, r2, r3 +// 0xc2,0xfa,0x13,0xf1 = qsub8le r1, r2, r3 +// 0x92,0xfa,0xa2,0xf1 = rbit r1, r2 +0x18,0xbf = it ne +// 0x92,0xfa,0xa2,0xf1 = rbitne r1, r2 +0x92,0xfa,0x82,0xf1 = rev.w r1, r2 +0x98,0xfa,0x88,0xf2 = rev.w r2, r8 +0x1c,0xbf = itt ne +// 0x11,0xba = revne r1, r2 +// 0x98,0xfa,0x88,0xf1 = revne.w r1, r8 +0x92,0xfa,0x92,0xf1 = rev16.w r1, r2 +0x98,0xfa,0x98,0xf2 = rev16.w r2, r8 +0x1c,0xbf = itt ne +// 0x51,0xba = rev16ne r1, r2 +// 0x98,0xfa,0x98,0xf1 = rev16ne.w r1, r8 +0x92,0xfa,0xb2,0xf1 = revsh.w r1, r2 +0x98,0xfa,0xb8,0xf2 = revsh.w r2, r8 +0x1c,0xbf = itt ne +// 0xd1,0xba = revshne r1, r2 +// 0x98,0xfa,0xb8,0xf1 = revshne.w r1, r8 +0x4f,0xea,0x33,0x32 = ror.w r2, r3, #12 +0x5f,0xea,0xf3,0x78 = rors.w r8, r3, #31 +0x5f,0xea,0x73,0x02 = rors.w r2, r3, #1 +0x4f,0xea,0x33,0x12 = ror.w r2, r3, #4 +0x5f,0xea,0xfc,0x32 = rors.w r2, r12, #15 +0x4f,0xea,0xf3,0x43 = ror.w r3, r3, #19 +0x5f,0xea,0xb8,0x08 = rors.w r8, r8, #2 +0x5f,0xea,0x77,0x17 = rors.w r7, r7, #5 +0x4f,0xea,0x7c,0x5c = ror.w r12, r12, #21 +0x64,0xfa,0x02,0xf3 = ror.w r3, r4, r2 +0x61,0xfa,0x02,0xf1 = ror.w r1, r1, r2 +0x74,0xfa,0x08,0xf3 = rors.w r3, r4, r8 +0x4f,0xea,0x32,0x01 = rrx r1, r2 +0x5f,0xea,0x32,0x01 = rrxs r1, r2 +0xb4,0xbf = ite lt +// 0x4f,0xea,0x3c,0x09 = rrxlt r9, r12 +// 0x5f,0xea,0x33,0x08 = rrxsge r8, r3 +0xc5,0xf5,0x7f,0x22 = rsb.w r2, r5, #1044480 +0xdc,0xf1,0x0f,0x03 = rsbs.w r3, r12, #15 +0xc1,0xf1,0xff,0x01 = rsb.w r1, r1, #255 +0xc1,0xf1,0xff,0x01 = rsb.w r1, r1, #255 +0xcb,0xf1,0x00,0x0b = rsb.w r11, r11, #0 +0xc9,0xf1,0x00,0x09 = rsb.w r9, r9, #0 +0x4b,0x42 = rsbs r3, r1, #0 +0xc1,0xf1,0x00,0x03 = rsb.w r3, r1, #0 +0xc4,0xeb,0x08,0x04 = rsb r4, r4, r8 +0xc9,0xeb,0x08,0x04 = rsb r4, r9, r8 +0xc4,0xeb,0xe8,0x01 = rsb r1, r4, r8, asr #3 +0xd1,0xeb,0x47,0x02 = rsbs r2, r1, r7, lsl #1 +// 0x94,0xfa,0x08,0xf3 = sadd16 r3, r4, r8 +0x18,0xbf = it ne +// 0x94,0xfa,0x08,0xf3 = sadd16ne r3, r4, r8 +// 0x84,0xfa,0x08,0xf3 = sadd8 r3, r4, r8 +0x18,0xbf = it ne +// 0x84,0xfa,0x08,0xf3 = sadd8ne r3, r4, r8 +0xa2,0xfa,0x07,0xf9 = sasx r9, r2, r7 +0x18,0xbf = it ne +// 0xa5,0xfa,0x06,0xf2 = sasxne r2, r5, r6 +0xa2,0xfa,0x07,0xf9 = sasx r9, r2, r7 +0x18,0xbf = it ne +// 0xa5,0xfa,0x06,0xf2 = sasxne r2, r5, r6 +0x61,0xf1,0x04,0x00 = sbc r0, r1, #4 +0x71,0xf1,0x00,0x00 = sbcs r0, r1, #0 +0x62,0xf1,0xff,0x01 = sbc r1, r2, #255 +0x67,0xf1,0x55,0x13 = sbc r3, r7, #5570645 +0x6c,0xf1,0xaa,0x28 = sbc r8, r12, #2852170240 +0x67,0xf1,0xa5,0x39 = sbc r9, r7, #2779096485 +0x63,0xf1,0x07,0x45 = sbc r5, r3, #2264924160 +0x62,0xf1,0xff,0x44 = sbc r4, r2, #2139095040 +0x62,0xf5,0xd0,0x64 = sbc r4, r2, #1664 +0x65,0xeb,0x06,0x04 = sbc.w r4, r5, r6 +0x75,0xeb,0x06,0x04 = sbcs.w r4, r5, r6 +0x61,0xeb,0x03,0x09 = sbc.w r9, r1, r3 +0x71,0xeb,0x03,0x09 = sbcs.w r9, r1, r3 +0x61,0xeb,0x33,0x10 = sbc.w r0, r1, r3, ror #4 +0x71,0xeb,0xc3,0x10 = sbcs.w r0, r1, r3, lsl #7 +0x61,0xeb,0xd3,0x70 = sbc.w r0, r1, r3, lsr #31 +0x71,0xeb,0x23,0x00 = sbcs.w r0, r1, r3, asr #32 +0x45,0xf3,0x00,0x44 = sbfx r4, r5, #16, #1 +0xc8,0xbf = it gt +// 0x45,0xf3,0x0f,0x44 = sbfxgt r4, r5, #16, #16 +// 0xa9,0xfa,0x82,0xf5 = sel r5, r9, r2 +0xd8,0xbf = it le +// 0xa9,0xfa,0x82,0xf5 = selle r5, r9, r2 +// 0xaf,0xf3,0x04,0x80 = sev.w +0x08,0xbf = it eq +// 0xaf,0xf3,0x04,0x80 = seveq.w +// 0x92,0xfa,0x03,0xf1 = sadd16 r1, r2, r3 +// 0x82,0xfa,0x03,0xf1 = sadd8 r1, r2, r3 +0xcc,0xbf = ite gt +// 0x92,0xfa,0x03,0xf1 = sadd16gt r1, r2, r3 +// 0x82,0xfa,0x03,0xf1 = sadd8le r1, r2, r3 +// 0xa8,0xfa,0x22,0xf4 = shasx r4, r8, r2 +0xc8,0xbf = it gt +// 0xa8,0xfa,0x22,0xf4 = shasxgt r4, r8, r2 +// 0xa8,0xfa,0x22,0xf4 = shasx r4, r8, r2 +0xc8,0xbf = it gt +// 0xa8,0xfa,0x22,0xf4 = shasxgt r4, r8, r2 +// 0xe8,0xfa,0x22,0xf4 = shsax r4, r8, r2 +0xc8,0xbf = it gt +// 0xe8,0xfa,0x22,0xf4 = shsaxgt r4, r8, r2 +// 0xe8,0xfa,0x22,0xf4 = shsax r4, r8, r2 +0xc8,0xbf = it gt +// 0xe8,0xfa,0x22,0xf4 = shsaxgt r4, r8, r2 +// 0xd8,0xfa,0x22,0xf4 = shsub16 r4, r8, r2 +// 0xc8,0xfa,0x22,0xf4 = shsub8 r4, r8, r2 +0xc4,0xbf = itt gt +// 0xd8,0xfa,0x22,0xf4 = shsub16gt r4, r8, r2 +// 0xc8,0xfa,0x22,0xf4 = shsub8gt r4, r8, r2 +// 0x11,0xfb,0x09,0x03 = smlabb r3, r1, r9, r0 +// 0x16,0xfb,0x14,0x15 = smlabt r5, r6, r4, r1 +// 0x12,0xfb,0x23,0x24 = smlatb r4, r2, r3, r2 +// 0x13,0xfb,0x38,0x48 = smlatt r8, r3, r8, r4 +0xcb,0xbf = itete gt +// 0x11,0xfb,0x09,0x03 = smlabbgt r3, r1, r9, r0 +// 0x16,0xfb,0x14,0x15 = smlabtle r5, r6, r4, r1 +// 0x12,0xfb,0x23,0x24 = smlatbgt r4, r2, r3, r2 +// 0x13,0xfb,0x38,0x48 = smlattle r8, r3, r8, r4 +// 0x23,0xfb,0x05,0x82 = smlad r2, r3, r5, r8 +// 0x23,0xfb,0x15,0x82 = smladx r2, r3, r5, r8 +0x84,0xbf = itt hi +// 0x23,0xfb,0x05,0x82 = smladhi r2, r3, r5, r8 +// 0x23,0xfb,0x15,0x82 = smladxhi r2, r3, r5, r8 +// 0xc5,0xfb,0x08,0x23 = smlal r2, r3, r5, r8 +0x08,0xbf = it eq +// 0xc5,0xfb,0x08,0x23 = smlaleq r2, r3, r5, r8 +// 0xc9,0xfb,0x80,0x31 = smlalbb r3, r1, r9, r0 +// 0xc4,0xfb,0x91,0x56 = smlalbt r5, r6, r4, r1 +// 0xc3,0xfb,0xa2,0x42 = smlaltb r4, r2, r3, r2 +// 0xc8,0xfb,0xb4,0x83 = smlaltt r8, r3, r8, r4 +0xad,0xbf = iteet ge +// 0xc9,0xfb,0x80,0x31 = smlalbbge r3, r1, r9, r0 +// 0xc4,0xfb,0x91,0x56 = smlalbtlt r5, r6, r4, r1 +// 0xc3,0xfb,0xa2,0x42 = smlaltblt r4, r2, r3, r2 +// 0xc8,0xfb,0xb4,0x83 = smlalttge r8, r3, r8, r4 +// 0xc5,0xfb,0xc8,0x23 = smlald r2, r3, r5, r8 +// 0xc5,0xfb,0xd8,0x23 = smlaldx r2, r3, r5, r8 +0x0c,0xbf = ite eq +// 0xc5,0xfb,0xc8,0x23 = smlaldeq r2, r3, r5, r8 +// 0xc5,0xfb,0xd8,0x23 = smlaldxne r2, r3, r5, r8 +0x33,0xfb,0x0a,0x82 = smlawb r2, r3, r10, r8 +0x33,0xfb,0x15,0x98 = smlawt r8, r3, r5, r9 +0x0c,0xbf = ite eq +// 0x37,0xfb,0x05,0x82 = smlawbeq r2, r7, r5, r8 +// 0x33,0xfb,0x10,0x81 = smlawtne r1, r3, r0, r8 +// 0x43,0xfb,0x05,0x82 = smlsd r2, r3, r5, r8 +// 0x43,0xfb,0x15,0x82 = smlsdx r2, r3, r5, r8 +0xd4,0xbf = ite le +// 0x43,0xfb,0x05,0x82 = smlsdle r2, r3, r5, r8 +// 0x43,0xfb,0x15,0x82 = smlsdxgt r2, r3, r5, r8 +0xd5,0xfb,0xc1,0x29 = smlsld r2, r9, r5, r1 +0xd2,0xfb,0xd8,0x4b = smlsldx r4, r11, r2, r8 +0xac,0xbf = ite ge +// 0xd5,0xfb,0xc6,0x82 = smlsldge r8, r2, r5, r6 +// 0xd3,0xfb,0xd8,0x10 = smlsldxlt r1, r0, r3, r8 +// 0x52,0xfb,0x03,0x41 = smmla r1, r2, r3, r4 +// 0x53,0xfb,0x12,0x14 = smmlar r4, r3, r2, r1 +0x34,0xbf = ite lo +// 0x52,0xfb,0x03,0x41 = smmlalo r1, r2, r3, r4 +// 0x53,0xfb,0x12,0x14 = smmlarhs r4, r3, r2, r1 +// 0x62,0xfb,0x03,0x41 = smmls r1, r2, r3, r4 +// 0x63,0xfb,0x12,0x14 = smmlsr r4, r3, r2, r1 +0x34,0xbf = ite lo +// 0x62,0xfb,0x03,0x41 = smmlslo r1, r2, r3, r4 +// 0x63,0xfb,0x12,0x14 = smmlsrhs r4, r3, r2, r1 +// 0x53,0xfb,0x04,0xf2 = smmul r2, r3, r4 +// 0x52,0xfb,0x11,0xf3 = smmulr r3, r2, r1 +0x34,0xbf = ite lo +// 0x53,0xfb,0x04,0xf2 = smmullo r2, r3, r4 +// 0x52,0xfb,0x11,0xf3 = smmulrhs r3, r2, r1 +// 0x23,0xfb,0x04,0xf2 = smuad r2, r3, r4 +// 0x22,0xfb,0x11,0xf3 = smuadx r3, r2, r1 +0xb4,0xbf = ite lt +// 0x23,0xfb,0x04,0xf2 = smuadlt r2, r3, r4 +// 0x22,0xfb,0x11,0xf3 = smuadxge r3, r2, r1 +0x19,0xfb,0x00,0xf3 = smulbb r3, r9, r0 +0x14,0xfb,0x11,0xf5 = smulbt r5, r4, r1 +0x12,0xfb,0x22,0xf4 = smultb r4, r2, r2 +// 0x13,0xfb,0x34,0xf8 = smultt r8, r3, r4 +0xab,0xbf = itete ge +// 0x19,0xfb,0x00,0xf1 = smulbbge r1, r9, r0 +// 0x16,0xfb,0x14,0xf5 = smulbtlt r5, r6, r4 +// 0x13,0xfb,0x22,0xf2 = smultbge r2, r3, r2 +// 0x13,0xfb,0x34,0xf8 = smulttlt r8, r3, r4 +0x80,0xfb,0x01,0x39 = smull r3, r9, r0, r1 +0x08,0xbf = it eq +// 0x84,0xfb,0x05,0x83 = smulleq r8, r3, r4, r5 +// 0x39,0xfb,0x00,0xf3 = smulwb r3, r9, r0 +// 0x39,0xfb,0x12,0xf3 = smulwt r3, r9, r2 +0xcc,0xbf = ite gt +// 0x39,0xfb,0x00,0xf3 = smulwbgt r3, r9, r0 +// 0x39,0xfb,0x12,0xf3 = smulwtle r3, r9, r2 +0x40,0xfb,0x01,0xf3 = smusd r3, r0, r1 +0x49,0xfb,0x12,0xf3 = smusdx r3, r9, r2 +0x0c,0xbf = ite eq +// 0x43,0xfb,0x02,0xf8 = smusdeq r8, r3, r2 +// 0x44,0xfb,0x13,0xf7 = smusdxne r7, r4, r3 +0x0d,0xe8,0x01,0xc0 = srsdb sp, #1 +0x8d,0xe9,0x00,0xc0 = srsia sp, #0 +0x2d,0xe8,0x13,0xc0 = srsdb sp!, #19 +0xad,0xe9,0x02,0xc0 = srsia sp!, #2 +0x8d,0xe9,0x0a,0xc0 = srsia sp, #10 +0x0d,0xe8,0x09,0xc0 = srsdb sp, #9 +0xad,0xe9,0x05,0xc0 = srsia sp!, #5 +0x2d,0xe8,0x05,0xc0 = srsdb sp!, #5 +0x8d,0xe9,0x05,0xc0 = srsia sp, #5 +0xad,0xe9,0x05,0xc0 = srsia sp!, #5 +0x0d,0xe8,0x01,0xc0 = srsdb sp, #1 +0x8d,0xe9,0x00,0xc0 = srsia sp, #0 +0x2d,0xe8,0x13,0xc0 = srsdb sp!, #19 +0xad,0xe9,0x02,0xc0 = srsia sp!, #2 +0x8d,0xe9,0x0a,0xc0 = srsia sp, #10 +0x0d,0xe8,0x09,0xc0 = srsdb sp, #9 +0xad,0xe9,0x05,0xc0 = srsia sp!, #5 +0x2d,0xe8,0x05,0xc0 = srsdb sp!, #5 +0x8d,0xe9,0x05,0xc0 = srsia sp, #5 +0xad,0xe9,0x05,0xc0 = srsia sp!, #5 +0x0a,0xf3,0x00,0x08 = ssat r8, #1, r10 +0x0a,0xf3,0x00,0x08 = ssat r8, #1, r10 +0x0a,0xf3,0xc0,0x78 = ssat r8, #1, r10, lsl #31 +0x2a,0xf3,0x40,0x08 = ssat r8, #1, r10, asr #1 +0x27,0xf3,0x00,0x02 = ssat16 r2, #1, r7 +0x25,0xf3,0x0f,0x03 = ssat16 r3, #16, r5 +// 0xe3,0xfa,0x04,0xf2 = ssax r2, r3, r4 +0xb8,0xbf = it lt +// 0xe3,0xfa,0x04,0xf2 = ssaxlt r2, r3, r4 +// 0xe3,0xfa,0x04,0xf2 = ssax r2, r3, r4 +0xb8,0xbf = it lt +// 0xe3,0xfa,0x04,0xf2 = ssaxlt r2, r3, r4 +0xd0,0xfa,0x06,0xf1 = ssub16 r1, r0, r6 +0xc2,0xfa,0x04,0xf9 = ssub8 r9, r2, r4 +0x14,0xbf = ite ne +// 0xd3,0xfa,0x02,0xf5 = ssub16ne r5, r3, r2 +// 0xc1,0xfa,0x02,0xf5 = ssub8eq r5, r1, r2 +0x81,0xfd,0x01,0x80 = stc2 p0, c8, [r1, #4] +0x82,0xfd,0x00,0x71 = stc2 p1, c7, [r2] +0x03,0xfd,0x38,0x62 = stc2 p2, c6, [r3, #-224] +0x24,0xfd,0x1e,0x53 = stc2 p3, c5, [r4, #-120]! +0xa5,0xfc,0x04,0x44 = stc2 p4, c4, [r5], #16 +0x26,0xfc,0x12,0x35 = stc2 p5, c3, [r6], #-72 +0xc7,0xfd,0x01,0x26 = stc2l p6, c2, [r7, #4] +0xc8,0xfd,0x00,0x17 = stc2l p7, c1, [r8] +0x49,0xfd,0x38,0x08 = stc2l p8, c0, [r9, #-224] +0x6a,0xfd,0x1e,0x19 = stc2l p9, c1, [r10, #-120]! +0xeb,0xfc,0x04,0x20 = stc2l p0, c2, [r11], #16 +0x6c,0xfc,0x12,0x31 = stc2l p1, c3, [r12], #-72 +0x80,0xed,0x01,0x4c = stc p12, c4, [r0, #4] +0x81,0xed,0x00,0x5d = stc p13, c5, [r1] +0x02,0xed,0x38,0x6e = stc p14, c6, [r2, #-224] +0x23,0xed,0x1e,0x7f = stc p15, c7, [r3, #-120]! +0xa4,0xec,0x04,0x85 = stc p5, c8, [r4], #16 +0x25,0xec,0x12,0x94 = stc p4, c9, [r5], #-72 +0xc6,0xed,0x01,0xa3 = stcl p3, c10, [r6, #4] +0xc7,0xed,0x00,0xb2 = stcl p2, c11, [r7] +0x48,0xed,0x38,0xc1 = stcl p1, c12, [r8, #-224] +0x69,0xed,0x1e,0xd0 = stcl p0, c13, [r9, #-120]! +0xea,0xec,0x04,0xe6 = stcl p6, c14, [r10], #16 +0x6b,0xec,0x12,0xf7 = stcl p7, c15, [r11], #-72 +0x81,0xfc,0x19,0x82 = stc2 p2, c8, [r1], {25} +0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} +0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} +0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0xa5,0xe8,0x06,0x00 = stm.w r5!, {r1, r2} +0x82,0xe8,0x06,0x00 = stm.w r2, {r1, r2} +0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} +0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0x84,0xe8,0x30,0x03 = stm.w r4, {r4, r5, r8, r9} +0x84,0xe8,0x60,0x00 = stm.w r4, {r5, r6} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0x04,0xe9,0x30,0x03 = stmdb r4, {r4, r5, r8, r9} +0x04,0xe9,0x60,0x00 = stmdb r4, {r5, r6} +0x25,0xe9,0x08,0x01 = stmdb r5!, {r3, r8} +0xa5,0xe8,0x08,0x01 = stm.w r5!, {r3, r8} +0x05,0xe9,0x03,0x00 = stmdb r5, {r0, r1} +0x45,0xf8,0x04,0x5c = str r5, [r5, #-4] +0x35,0x62 = str r5, [r6, #32] +0xc6,0xf8,0x21,0x50 = str.w r5, [r6, #33] +0xc6,0xf8,0x01,0x51 = str.w r5, [r6, #257] +0xc7,0xf8,0x01,0xf1 = str.w pc, [r7, #257] +0x44,0xf8,0xff,0x2f = str r2, [r4, #255]! +0x4d,0xf8,0x04,0x8f = str r8, [sp, #4]! +0x4d,0xf8,0x04,0xed = str lr, [sp, #-4]! +0x44,0xf8,0xff,0x2b = str r2, [r4], #255 +0x4d,0xf8,0x04,0x8b = str r8, [sp], #4 +0x4d,0xf8,0x04,0xe9 = str lr, [sp], #-4 +0x48,0xf8,0x01,0x10 = str.w r1, [r8, r1] +0x45,0xf8,0x02,0x40 = str.w r4, [r5, r2] +0x40,0xf8,0x32,0x60 = str.w r6, [r0, r2, lsl #3] +0x48,0xf8,0x22,0x80 = str.w r8, [r8, r2, lsl #2] +0x4d,0xf8,0x12,0x70 = str.w r7, [sp, r2, lsl #1] +0x4d,0xf8,0x02,0x70 = str.w r7, [sp, r2] +0x05,0xf8,0x04,0x5c = strb r5, [r5, #-4] +0x86,0xf8,0x20,0x50 = strb.w r5, [r6, #32] +0x86,0xf8,0x21,0x50 = strb.w r5, [r6, #33] +0x86,0xf8,0x01,0x51 = strb.w r5, [r6, #257] +0x87,0xf8,0x01,0xe1 = strb.w lr, [r7, #257] +0x08,0xf8,0xff,0x5f = strb r5, [r8, #255]! +0x05,0xf8,0x04,0x2f = strb r2, [r5, #4]! +0x04,0xf8,0x04,0x1d = strb r1, [r4, #-4]! +0x03,0xf8,0xff,0xeb = strb lr, [r3], #255 +0x02,0xf8,0x04,0x9b = strb r9, [r2], #4 +0x0d,0xf8,0x04,0x39 = strb r3, [sp], #-4 +0x08,0xf8,0x00,0x4d = strb r4, [r8, #-0]! +0x00,0xf8,0x00,0x19 = strb r1, [r0], #-0 +0x08,0xf8,0x01,0x10 = strb.w r1, [r8, r1] +0x05,0xf8,0x02,0x40 = strb.w r4, [r5, r2] +0x00,0xf8,0x32,0x60 = strb.w r6, [r0, r2, lsl #3] +0x08,0xf8,0x22,0x80 = strb.w r8, [r8, r2, lsl #2] +0x0d,0xf8,0x12,0x70 = strb.w r7, [sp, r2, lsl #1] +0x0d,0xf8,0x02,0x70 = strb.w r7, [sp, r2] +0x02,0xf8,0x00,0x1e = strbt r1, [r2] +0x08,0xf8,0x00,0x1e = strbt r1, [r8] +0x08,0xf8,0x03,0x1e = strbt r1, [r8, #3] +0x08,0xf8,0xff,0x1e = strbt r1, [r8, #255] +0xc6,0xe9,0x06,0x35 = strd r3, r5, [r6, #24] +0xe6,0xe9,0x06,0x35 = strd r3, r5, [r6, #24]! +0xe6,0xe8,0x01,0x35 = strd r3, r5, [r6], #4 +0x66,0xe8,0x02,0x35 = strd r3, r5, [r6], #-8 +0xc6,0xe9,0x00,0x35 = strd r3, r5, [r6] +0xc3,0xe9,0x00,0x81 = strd r8, r1, [r3] +0x42,0xe9,0x00,0x01 = strd r0, r1, [r2, #-0] +0x62,0xe9,0x00,0x01 = strd r0, r1, [r2, #-0]! +0x62,0xe8,0x00,0x01 = strd r0, r1, [r2], #-0 +0x44,0xe8,0x00,0x81 = strex r1, r8, [r4] +0x44,0xe8,0x00,0x28 = strex r8, r2, [r4] +0x4d,0xe8,0x20,0xc2 = strex r2, ip, [sp, #128] +0xc7,0xe8,0x45,0x1f = strexb r5, r1, [r7] +0xcc,0xe8,0x59,0x7f = strexh r9, r7, [r12] +0xc4,0xe8,0x79,0x36 = strexd r9, r3, r6, [r4] +0x25,0xf8,0x04,0x5c = strh r5, [r5, #-4] +0x35,0x84 = strh r5, [r6, #32] +0xa6,0xf8,0x21,0x50 = strh.w r5, [r6, #33] +0xa6,0xf8,0x01,0x51 = strh.w r5, [r6, #257] +0xa7,0xf8,0x01,0xe1 = strh.w lr, [r7, #257] +0x28,0xf8,0xff,0x5f = strh r5, [r8, #255]! +0x25,0xf8,0x04,0x2f = strh r2, [r5, #4]! +0x24,0xf8,0x04,0x1d = strh r1, [r4, #-4]! +0x23,0xf8,0xff,0xeb = strh lr, [r3], #255 +0x22,0xf8,0x04,0x9b = strh r9, [r2], #4 +0x2d,0xf8,0x04,0x39 = strh r3, [sp], #-4 +0x28,0xf8,0x01,0x10 = strh.w r1, [r8, r1] +0x25,0xf8,0x02,0x40 = strh.w r4, [r5, r2] +0x20,0xf8,0x32,0x60 = strh.w r6, [r0, r2, lsl #3] +0x28,0xf8,0x22,0x80 = strh.w r8, [r8, r2, lsl #2] +0x2d,0xf8,0x12,0x70 = strh.w r7, [sp, r2, lsl #1] +0x2d,0xf8,0x02,0x70 = strh.w r7, [sp, r2] +0x22,0xf8,0x00,0x1e = strht r1, [r2] +0x28,0xf8,0x00,0x1e = strht r1, [r8] +0x28,0xf8,0x03,0x1e = strht r1, [r8, #3] +0x28,0xf8,0xff,0x1e = strht r1, [r8, #255] +0x42,0xf8,0x00,0x1e = strt r1, [r2] +0x48,0xf8,0x00,0x1e = strt r1, [r8] +0x48,0xf8,0x03,0x1e = strt r1, [r8, #3] +0x48,0xf8,0xff,0x1e = strt r1, [r8, #255] +0x0a,0xbf = itet eq +// 0x11,0x1f = subeq r1, r2, #4 +// 0xa3,0xf2,0xff,0x35 = subwne r5, r3, #1023 +// 0xa5,0xf2,0x25,0x14 = subweq r4, r5, #293 +0xad,0xf5,0x80,0x62 = sub.w r2, sp, #1024 +0xa8,0xf5,0x7f,0x42 = sub.w r2, r8, #65280 +0xa3,0xf2,0x01,0x12 = subw r2, r3, #257 +0xa3,0xf2,0x01,0x12 = subw r2, r3, #257 +0xa6,0xf5,0x80,0x7c = sub.w r12, r6, #256 +0xa6,0xf2,0x00,0x1c = subw r12, r6, #256 +0xb2,0xf5,0xf8,0x71 = subs.w r1, r2, #496 +0xa2,0xf1,0x01,0x02 = sub.w r2, r2, #1 +0xa0,0xf1,0x20,0x00 = sub.w r0, r0, #32 +0x38,0x3a = subs r2, #56 +0x38,0x3a = subs r2, #56 +0xa5,0xeb,0x06,0x04 = sub.w r4, r5, r6 +0xa5,0xeb,0x46,0x14 = sub.w r4, r5, r6, lsl #5 +0xa5,0xeb,0x56,0x14 = sub.w r4, r5, r6, lsr #5 +0xa5,0xeb,0x56,0x14 = sub.w r4, r5, r6, lsr #5 +0xa5,0xeb,0x66,0x14 = sub.w r4, r5, r6, asr #5 +0xa5,0xeb,0x76,0x14 = sub.w r4, r5, r6, ror #5 +0xa2,0xeb,0x3c,0x05 = sub.w r5, r2, r12, rrx +0xad,0xeb,0x0c,0x02 = sub.w r2, sp, ip +0xad,0xeb,0x0c,0x0d = sub.w sp, sp, ip +0xad,0xeb,0x0c,0x02 = sub.w r2, sp, ip +0xad,0xeb,0x0c,0x0d = sub.w sp, sp, ip +0x00,0xdf = svc #0 +0x0c,0xbf = ite eq +// 0xff,0xdf = svceq #255 +// 0x21,0xdf = svcne #33 +0x43,0xfa,0x84,0xf2 = sxtab r2, r3, r4 +0x45,0xfa,0x86,0xf4 = sxtab r4, r5, r6 +0xb8,0xbf = it lt +// 0x42,0xfa,0x99,0xf6 = sxtablt r6, r2, r9, ror #8 +0x41,0xfa,0xa4,0xf5 = sxtab r5, r1, r4, ror #16 +0x48,0xfa,0xb3,0xf7 = sxtab r7, r8, r3, ror #24 +0x22,0xfa,0x87,0xf6 = sxtab16 r6, r2, r7 +0x25,0xfa,0x98,0xf3 = sxtab16 r3, r5, r8, ror #8 +0x22,0xfa,0xa1,0xf3 = sxtab16 r3, r2, r1, ror #16 +0x14,0xbf = ite ne +// 0x21,0xfa,0x84,0xf0 = sxtab16ne r0, r1, r4 +// 0x22,0xfa,0xb3,0xf1 = sxtab16eq r1, r2, r3, ror #24 +0x03,0xfa,0x89,0xf1 = sxtah r1, r3, r9 +0x08,0xfa,0x93,0xf3 = sxtah r3, r8, r3, ror #8 +0x03,0xfa,0xb3,0xf9 = sxtah r9, r3, r3, ror #24 +0x8c,0xbf = ite hi +// 0x01,0xfa,0x86,0xf6 = sxtahhi r6, r1, r6 +// 0x02,0xfa,0xa4,0xf2 = sxtahls r2, r2, r4, ror #16 +0x75,0xb2 = sxtb r5, r6 +0x4f,0xfa,0x99,0xf6 = sxtb.w r6, r9, ror #8 +0x4f,0xfa,0xb3,0xf8 = sxtb.w r8, r3, ror #24 +0xac,0xbf = ite ge +// 0x62,0xb2 = sxtbge r2, r4 +// 0x4f,0xfa,0xa1,0xf5 = sxtblt.w r5, r1, ror #16 +0x4f,0xfa,0x88,0xf7 = sxtb.w r7, r8 +0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4 +0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7 +0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16 +0x2c,0xbf = ite hs +// 0x2f,0xfa,0x95,0xf3 = sxtb16hs r3, r5, ror #8 +// 0x2f,0xfa,0xb3,0xf2 = sxtb16lo r2, r3, ror #24 +0x31,0xb2 = sxth r1, r6 +0x0f,0xfa,0x98,0xf3 = sxth.w r3, r8, ror #8 +0x0f,0xfa,0xb3,0xf9 = sxth.w r9, r3, ror #24 +0x1c,0xbf = itt ne +// 0x0f,0xfa,0x89,0xf3 = sxthne.w r3, r9 +// 0x0f,0xfa,0xa2,0xf2 = sxthne.w r2, r2, ror #16 +0x0f,0xfa,0x88,0xf7 = sxth.w r7, r8 +0x75,0xb2 = sxtb r5, r6 +0x4f,0xfa,0x99,0xf6 = sxtb.w r6, r9, ror #8 +0x4f,0xfa,0xb3,0xf8 = sxtb.w r8, r3, ror #24 +0xac,0xbf = ite ge +// 0x62,0xb2 = sxtbge r2, r4 +// 0x4f,0xfa,0xa1,0xf5 = sxtblt.w r5, r1, ror #16 +0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4 +0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7 +0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16 +0x2c,0xbf = ite hs +// 0x2f,0xfa,0x95,0xf3 = sxtb16hs r3, r5, ror #8 +// 0x2f,0xfa,0xb3,0xf2 = sxtb16lo r2, r3, ror #24 +0x31,0xb2 = sxth r1, r6 +0x0f,0xfa,0x98,0xf3 = sxth.w r3, r8, ror #8 +0x0f,0xfa,0xb3,0xf9 = sxth.w r9, r3, ror #24 +0x1c,0xbf = itt ne +// 0x0f,0xfa,0x89,0xf3 = sxthne.w r3, r9 +// 0x0f,0xfa,0xa2,0xf2 = sxthne.w r2, r2, ror #16 +// 0xd3,0xe8,0x08,0xf0 = tbb [r3, r8] +// 0xd3,0xe8,0x18,0xf0 = tbh [r3, r8, lsl #1] +0x08,0xbf = it eq +// 0xd3,0xe8,0x08,0xf0 = tbbeq [r3, r8] +0x28,0xbf = it hs +// 0xd3,0xe8,0x18,0xf0 = tbhhs [r3, r8, lsl #1] +0x95,0xf4,0x70,0x4f = teq.w r5, #61440 +0x94,0xea,0x05,0x0f = teq.w r4, r5 +0x94,0xea,0x45,0x1f = teq.w r4, r5, lsl #5 +0x94,0xea,0x55,0x1f = teq.w r4, r5, lsr #5 +0x94,0xea,0x55,0x1f = teq.w r4, r5, lsr #5 +0x94,0xea,0x65,0x1f = teq.w r4, r5, asr #5 +0x94,0xea,0x75,0x1f = teq.w r4, r5, ror #5 +0x15,0xf4,0x70,0x4f = tst.w r5, #61440 +0x2a,0x42 = tst r2, r5 +0x13,0xea,0x4c,0x1f = tst.w r3, r12, lsl #5 +0x14,0xea,0x1b,0x1f = tst.w r4, r11, lsr #4 +0x15,0xea,0x1a,0x3f = tst.w r5, r10, lsr #12 +0x16,0xea,0xa9,0x7f = tst.w r6, r9, asr #30 +0x17,0xea,0xb8,0x0f = tst.w r7, r8, ror #2 +// 0x92,0xfa,0x43,0xf1 = uadd16 r1, r2, r3 +// 0x82,0xfa,0x43,0xf1 = uadd8 r1, r2, r3 +0xcc,0xbf = ite gt +// 0x92,0xfa,0x43,0xf1 = uadd16gt r1, r2, r3 +// 0x82,0xfa,0x43,0xf1 = uadd8le r1, r2, r3 +// 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0 +0x08,0xbf = it eq +// 0xac,0xfa,0x40,0xf9 = uasxeq r9, r12, r0 +// 0xac,0xfa,0x40,0xf9 = uasx r9, r12, r0 +0x08,0xbf = it eq +// 0xac,0xfa,0x40,0xf9 = uasxeq r9, r12, r0 +0xc5,0xf3,0x00,0x44 = ubfx r4, r5, #16, #1 +0xc8,0xbf = it gt +// 0xc5,0xf3,0x0f,0x44 = ubfxgt r4, r5, #16, #16 +// 0x98,0xfa,0x62,0xf4 = uhadd16 r4, r8, r2 +// 0x88,0xfa,0x62,0xf4 = uhadd8 r4, r8, r2 +0xc4,0xbf = itt gt +// 0x98,0xfa,0x62,0xf4 = uhadd16gt r4, r8, r2 +// 0x88,0xfa,0x62,0xf4 = uhadd8gt r4, r8, r2 +0xa1,0xfa,0x65,0xf4 = uhasx r4, r1, r5 +0xe6,0xfa,0x66,0xf5 = uhsax r5, r6, r6 +0xc4,0xbf = itt gt +// 0xa9,0xfa,0x68,0xf6 = uhasxgt r6, r9, r8 +// 0xe8,0xfa,0x6c,0xf7 = uhsaxgt r7, r8, r12 +0xa1,0xfa,0x65,0xf4 = uhasx r4, r1, r5 +0xe6,0xfa,0x66,0xf5 = uhsax r5, r6, r6 +0xc4,0xbf = itt gt +// 0xa9,0xfa,0x68,0xf6 = uhasxgt r6, r9, r8 +// 0xe8,0xfa,0x6c,0xf7 = uhsaxgt r7, r8, r12 +0xd8,0xfa,0x63,0xf5 = uhsub16 r5, r8, r3 +0xc7,0xfa,0x66,0xf1 = uhsub8 r1, r7, r6 +0xbc,0xbf = itt lt +// 0xd9,0xfa,0x6c,0xf4 = uhsub16lt r4, r9, r12 +// 0xc1,0xfa,0x65,0xf3 = uhsub8lt r3, r1, r5 +// 0xe5,0xfb,0x66,0x34 = umaal r3, r4, r5, r6 +0xb8,0xbf = it lt +// 0xe5,0xfb,0x66,0x34 = umaallt r3, r4, r5, r6 +0xe6,0xfb,0x08,0x24 = umlal r2, r4, r6, r8 +0xc8,0xbf = it gt +// 0xe2,0xfb,0x06,0x61 = umlalgt r6, r1, r2, r6 +0xa6,0xfb,0x08,0x24 = umull r2, r4, r6, r8 +0xc8,0xbf = it gt +// 0xa2,0xfb,0x06,0x61 = umullgt r6, r1, r2, r6 +0x92,0xfa,0x53,0xf1 = uqadd16 r1, r2, r3 +0x84,0xfa,0x58,0xf3 = uqadd8 r3, r4, r8 +0xcc,0xbf = ite gt +// 0x97,0xfa,0x59,0xf4 = uqadd16gt r4, r7, r9 +// 0x81,0xfa,0x52,0xf8 = uqadd8le r8, r1, r2 +0xa2,0xfa,0x53,0xf1 = uqasx r1, r2, r3 +0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8 +0xcc,0xbf = ite gt +// 0xa7,0xfa,0x59,0xf4 = uqasxgt r4, r7, r9 +// 0xe1,0xfa,0x52,0xf8 = uqsaxle r8, r1, r2 +0xa2,0xfa,0x53,0xf1 = uqasx r1, r2, r3 +0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8 +0xcc,0xbf = ite gt +// 0xa7,0xfa,0x59,0xf4 = uqasxgt r4, r7, r9 +// 0xe1,0xfa,0x52,0xf8 = uqsaxle r8, r1, r2 +0xc2,0xfa,0x59,0xf8 = uqsub8 r8, r2, r9 +0xd9,0xfa,0x57,0xf1 = uqsub16 r1, r9, r7 +0xcc,0xbf = ite gt +// 0xc1,0xfa,0x56,0xf3 = uqsub8gt r3, r1, r6 +// 0xd6,0xfa,0x54,0xf4 = uqsub16le r4, r6, r4 +0x79,0xfb,0x07,0xf1 = usad8 r1, r9, r7 +0x72,0xfb,0x09,0xc8 = usada8 r8, r2, r9, r12 +0xcc,0xbf = ite gt +// 0x71,0xfb,0x06,0x93 = usada8gt r3, r1, r6, r9 +// 0x76,0xfb,0x04,0xf4 = usad8le r4, r6, r4 +0x8a,0xf3,0x01,0x08 = usat r8, #1, r10 +0x8a,0xf3,0x04,0x08 = usat r8, #4, r10 +0x8a,0xf3,0xc5,0x78 = usat r8, #5, r10, lsl #31 +0xaa,0xf3,0x50,0x08 = usat r8, #16, r10, asr #1 +0xa7,0xf3,0x02,0x02 = usat16 r2, #2, r7 +0xa5,0xf3,0x0f,0x03 = usat16 r3, #15, r5 +0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4 +0x18,0xbf = it ne +// 0xe1,0xfa,0x49,0xf6 = usaxne r6, r1, r9 +0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4 +0x18,0xbf = it ne +// 0xe1,0xfa,0x49,0xf6 = usaxne r6, r1, r9 +0xd2,0xfa,0x47,0xf4 = usub16 r4, r2, r7 +0xc8,0xfa,0x45,0xf1 = usub8 r1, r8, r5 +0x8c,0xbf = ite hi +// 0xd1,0xfa,0x43,0xf1 = usub16hi r1, r1, r3 +// 0xc2,0xfa,0x43,0xf9 = usub8ls r9, r2, r3 +0x53,0xfa,0x84,0xf2 = uxtab r2, r3, r4 +0x55,0xfa,0x86,0xf4 = uxtab r4, r5, r6 +0xb8,0xbf = it lt +// 0x52,0xfa,0x99,0xf6 = uxtablt r6, r2, r9, ror #8 +0x51,0xfa,0xa4,0xf5 = uxtab r5, r1, r4, ror #16 +0x58,0xfa,0xb3,0xf7 = uxtab r7, r8, r3, ror #24 +0xa8,0xbf = it ge +// 0x31,0xfa,0x84,0xf0 = uxtab16ge r0, r1, r4 +0x32,0xfa,0x87,0xf6 = uxtab16 r6, r2, r7 +0x35,0xfa,0x98,0xf3 = uxtab16 r3, r5, r8, ror #8 +0x32,0xfa,0xa1,0xf3 = uxtab16 r3, r2, r1, ror #16 +0x08,0xbf = it eq +// 0x32,0xfa,0xb3,0xf1 = uxtab16eq r1, r2, r3, ror #24 +0x13,0xfa,0x89,0xf1 = uxtah r1, r3, r9 +0x88,0xbf = it hi +// 0x11,0xfa,0x86,0xf6 = uxtahhi r6, r1, r6 +0x18,0xfa,0x93,0xf3 = uxtah r3, r8, r3, ror #8 +0x38,0xbf = it lo +// 0x12,0xfa,0xa4,0xf2 = uxtahlo r2, r2, r4, ror #16 +0x13,0xfa,0xb3,0xf9 = uxtah r9, r3, r3, ror #24 +0xa8,0xbf = it ge +// 0xe2,0xb2 = uxtbge r2, r4 +0xf5,0xb2 = uxtb r5, r6 +0x5f,0xfa,0x99,0xf6 = uxtb.w r6, r9, ror #8 +0x38,0xbf = it lo +// 0x5f,0xfa,0xa1,0xf5 = uxtblo.w r5, r1, ror #16 +0x5f,0xfa,0xb3,0xf8 = uxtb.w r8, r3, ror #24 +0x5f,0xfa,0x88,0xf7 = uxtb.w r7, r8 +0x3f,0xfa,0x84,0xf1 = uxtb16 r1, r4 +0x3f,0xfa,0x87,0xf6 = uxtb16 r6, r7 +0x28,0xbf = it hs +// 0x3f,0xfa,0x95,0xf3 = uxtb16hs r3, r5, ror #8 +0x3f,0xfa,0xa1,0xf3 = uxtb16 r3, r1, ror #16 +0xa8,0xbf = it ge +// 0x3f,0xfa,0xb3,0xf2 = uxtb16ge r2, r3, ror #24 +0x18,0xbf = it ne +// 0x1f,0xfa,0x89,0xf3 = uxthne.w r3, r9 +0xb1,0xb2 = uxth r1, r6 +0x1f,0xfa,0x98,0xf3 = uxth.w r3, r8, ror #8 +0xd8,0xbf = it le +// 0x1f,0xfa,0xa2,0xf2 = uxthle.w r2, r2, ror #16 +0x1f,0xfa,0xb3,0xf9 = uxth.w r9, r3, ror #24 +0x1f,0xfa,0x88,0xf7 = uxth.w r7, r8 +// 0x20,0xbf = wfe +// 0x30,0xbf = wfi +// 0x10,0xbf = yield +0xb6,0xbf = itet lt +// 0x20,0xbf = wfelt +// 0x30,0xbf = wfige +// 0x10,0xbf = yieldlt +// 0xaf,0xf3,0x04,0x80 = sev.w +0xaf,0xf3,0x03,0x80 = wfi.w +0xaf,0xf3,0x02,0x80 = wfe.w +0xaf,0xf3,0x01,0x80 = yield.w +0xaf,0xf3,0x00,0x80 = nop.w +0x40,0xbf = sev +// 0x30,0xbf = wfi +// 0x20,0xbf = wfe +// 0x10,0xbf = yield +// 0x00,0xbf = nop +0xb6,0xbf = itet lt +// 0xf0,0xbf = hintlt #15 +// 0xaf,0xf3,0x10,0x80 = hintge.w #16 +// 0xaf,0xf3,0xef,0x80 = hintlt.w #239 +0x70,0xbf = hint #7 +0xaf,0xf3,0x07,0x80 = hint.w #7 +0x9f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #22] +0xbf,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #22] +0x9f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #22] +0xbf,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #22] +0xdf,0xf8,0x16,0xb0 = ldr.w r11, [pc, #22] +0x9f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #22] +0xbf,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #22] +0x9f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #22] +0xbf,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #22] +0x5f,0xf8,0x16,0xb0 = ldr.w r11, [pc, #-22] +0x1f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #-22] +0x3f,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #-22] +0x1f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #-22] +0x3f,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #-22] +0x5f,0xf8,0x16,0xb0 = ldr.w r11, [pc, #-22] +0x1f,0xf8,0x16,0xb0 = ldrb.w r11, [pc, #-22] +0x3f,0xf8,0x16,0xb0 = ldrh.w r11, [pc, #-22] +0x1f,0xf9,0x16,0xb0 = ldrsb.w r11, [pc, #-22] +0x3f,0xf9,0x16,0xb0 = ldrsh.w r11, [pc, #-22] +0x03,0x49 = ldr r1, [pc, #12] +0xde,0xf3,0x04,0x8f = subs pc, lr, #4 diff --git a/capstone/suite/MC/ARM/crc32-thumb.s.cs b/capstone/suite/MC/ARM/crc32-thumb.s.cs new file mode 100644 index 000000000..c6541a5e1 --- /dev/null +++ b/capstone/suite/MC/ARM/crc32-thumb.s.cs @@ -0,0 +1,7 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None +0xc1,0xfa,0x82,0xf0 = crc32b r0, r1, r2 +0xc1,0xfa,0x92,0xf0 = crc32h r0, r1, r2 +0xc1,0xfa,0xa2,0xf0 = crc32w r0, r1, r2 +0xd1,0xfa,0x82,0xf0 = crc32cb r0, r1, r2 +0xd1,0xfa,0x92,0xf0 = crc32ch r0, r1, r2 +0xd1,0xfa,0xa2,0xf0 = crc32cw r0, r1, r2 diff --git a/capstone/suite/MC/ARM/crc32.s.cs b/capstone/suite/MC/ARM/crc32.s.cs new file mode 100644 index 000000000..a530ff79d --- /dev/null +++ b/capstone/suite/MC/ARM/crc32.s.cs @@ -0,0 +1,7 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0x42,0x00,0x01,0xe1 = crc32b r0, r1, r2 +0x42,0x00,0x21,0xe1 = crc32h r0, r1, r2 +0x42,0x00,0x41,0xe1 = crc32w r0, r1, r2 +0x42,0x02,0x01,0xe1 = crc32cb r0, r1, r2 +0x42,0x02,0x21,0xe1 = crc32ch r0, r1, r2 +0x42,0x02,0x41,0xe1 = crc32cw r0, r1, r2 diff --git a/capstone/suite/MC/ARM/dot-req.s.cs b/capstone/suite/MC/ARM/dot-req.s.cs new file mode 100644 index 000000000..c54eab3a6 --- /dev/null +++ b/capstone/suite/MC/ARM/dot-req.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x05,0xb0,0xa0,0xe1 = mov r11, r5 +0x06,0x10,0xa0,0xe1 = mov r1, r6 diff --git a/capstone/suite/MC/ARM/fp-armv8.s.cs b/capstone/suite/MC/ARM/fp-armv8.s.cs new file mode 100644 index 000000000..5e8299c9f --- /dev/null +++ b/capstone/suite/MC/ARM/fp-armv8.s.cs @@ -0,0 +1,52 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0xe0,0x3b,0xb2,0xee = vcvtt.f64.f16 d3, s1 +0xcc,0x2b,0xf3,0xee = vcvtt.f16.f64 s5, d12 +0x60,0x3b,0xb2,0xee = vcvtb.f64.f16 d3, s1 +0x41,0x2b,0xb3,0xee = vcvtb.f16.f64 s4, d1 +0xe0,0x3b,0xb2,0xae = vcvttge.f64.f16 d3, s1 +0xcc,0x2b,0xf3,0xce = vcvttgt.f16.f64 s5, d12 +0x60,0x3b,0xb2,0x0e = vcvtbeq.f64.f16 d3, s1 +0x41,0x2b,0xb3,0xbe = vcvtblt.f16.f64 s4, d1 +0xe1,0x1a,0xbc,0xfe = vcvta.s32.f32 s2, s3 +0xc3,0x1b,0xbc,0xfe = vcvta.s32.f64 s2, d3 +0xeb,0x3a,0xbd,0xfe = vcvtn.s32.f32 s6, s23 +0xe7,0x3b,0xbd,0xfe = vcvtn.s32.f64 s6, d23 +0xc2,0x0a,0xbe,0xfe = vcvtp.s32.f32 s0, s4 +0xc4,0x0b,0xbe,0xfe = vcvtp.s32.f64 s0, d4 +0xc4,0x8a,0xff,0xfe = vcvtm.s32.f32 s17, s8 +0xc8,0x8b,0xff,0xfe = vcvtm.s32.f64 s17, d8 +0x61,0x1a,0xbc,0xfe = vcvta.u32.f32 s2, s3 +0x43,0x1b,0xbc,0xfe = vcvta.u32.f64 s2, d3 +0x6b,0x3a,0xbd,0xfe = vcvtn.u32.f32 s6, s23 +0x67,0x3b,0xbd,0xfe = vcvtn.u32.f64 s6, d23 +0x42,0x0a,0xbe,0xfe = vcvtp.u32.f32 s0, s4 +0x44,0x0b,0xbe,0xfe = vcvtp.u32.f64 s0, d4 +0x44,0x8a,0xff,0xfe = vcvtm.u32.f32 s17, s8 +0x48,0x8b,0xff,0xfe = vcvtm.u32.f64 s17, d8 +0xab,0x2a,0x20,0xfe = vselge.f32 s4, s1, s23 +0xa7,0xeb,0x6f,0xfe = vselge.f64 d30, d31, d23 +0x80,0x0a,0x30,0xfe = vselgt.f32 s0, s1, s0 +0x24,0x5b,0x3a,0xfe = vselgt.f64 d5, d10, d20 +0x2b,0xfa,0x0e,0xfe = vseleq.f32 s30, s28, s23 +0x08,0x2b,0x04,0xfe = vseleq.f64 d2, d4, d8 +0x07,0xaa,0x58,0xfe = vselvs.f32 s21, s16, s14 +0x2f,0x0b,0x11,0xfe = vselvs.f64 d0, d1, d31 +0x00,0x2a,0xc6,0xfe = vmaxnm.f32 s5, s12, s0 +0xae,0x5b,0x86,0xfe = vmaxnm.f64 d5, d22, d30 +0x46,0x0a,0x80,0xfe = vminnm.f32 s0, s0, s12 +0x49,0x4b,0x86,0xfe = vminnm.f64 d4, d6, d9 +0xcc,0x3b,0xb6,0xae = vrintzge.f64 d3, d12 +0xcc,0x1a,0xf6,0xee = vrintz.f32 s3, s24 +0x40,0x5b,0xb6,0xbe = vrintrlt.f64 d5, d0 +0x64,0x0a,0xb6,0xee = vrintr.f32 s0, s9 +0x6e,0xcb,0xf7,0x0e = vrintxeq.f64 d28, d30 +0x47,0x5a,0xb7,0x6e = vrintxvs.f32 s10, s14 +0x44,0x3b,0xb8,0xfe = vrinta.f64 d3, d4 +0x60,0x6a,0xb8,0xfe = vrinta.f32 s12, s1 +0x44,0x3b,0xb9,0xfe = vrintn.f64 d3, d4 +0x60,0x6a,0xb9,0xfe = vrintn.f32 s12, s1 +0x44,0x3b,0xba,0xfe = vrintp.f64 d3, d4 +0x60,0x6a,0xba,0xfe = vrintp.f32 s12, s1 +0x44,0x3b,0xbb,0xfe = vrintm.f64 d3, d4 +0x60,0x6a,0xbb,0xfe = vrintm.f32 s12, s1 +0x10,0xda,0xf5,0xee = vmrs sp, mvfr2 diff --git a/capstone/suite/MC/ARM/fpv8.s.cs b/capstone/suite/MC/ARM/fpv8.s.cs new file mode 100644 index 000000000..bdd80e1b7 --- /dev/null +++ b/capstone/suite/MC/ARM/fpv8.s.cs @@ -0,0 +1,36 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0xa0,0x0b,0x71,0xee = vadd.f64 d16, d17, d16 +0xe0,0x0b,0x71,0xee = vsub.f64 d16, d17, d16 +0xa0,0x0b,0xc1,0xee = vdiv.f64 d16, d17, d16 +0x07,0x5b,0x85,0xee = vdiv.f64 d5, d5, d7 +0xa0,0x0b,0x61,0xee = vmul.f64 d16, d17, d16 +0xa1,0x4b,0x64,0xee = vmul.f64 d20, d20, d17 +0xe0,0x0b,0x61,0xee = vnmul.f64 d16, d17, d16 +0xe0,0x1b,0xf4,0xee = vcmpe.f64 d17, d16 +0xc0,0x0b,0xf5,0xee = vcmpe.f64 d16, #0 +0xe0,0x0b,0xf0,0xee = vabs.f64 d16, d16 +0xe0,0x0b,0xb7,0xee = vcvt.f32.f64 s0, d16 +0xc0,0x0a,0xf7,0xee = vcvt.f64.f32 d16, s0 +0x60,0x0b,0xf1,0xee = vneg.f64 d16, d16 +0xe0,0x0b,0xf1,0xee = vsqrt.f64 d16, d16 +0xc0,0x0b,0xf8,0xee = vcvt.f64.s32 d16, s0 +0x40,0x0b,0xf8,0xee = vcvt.f64.u32 d16, s0 +0xe0,0x0b,0xbd,0xee = vcvt.s32.f64 s0, d16 +0xe0,0x0b,0xbc,0xee = vcvt.u32.f64 s0, d16 +0xa1,0x0b,0x42,0xee = vmla.f64 d16, d18, d17 +0xe1,0x0b,0x42,0xee = vmls.f64 d16, d18, d17 +0xe1,0x0b,0x52,0xee = vnmla.f64 d16, d18, d17 +0xa1,0x0b,0x52,0xee = vnmls.f64 d16, d18, d17 +0x60,0x0b,0xf1,0x1e = vnegne.f64 d16, d16 +0x08,0x0b,0xf0,0xee = vmov.f64 d16, #3.000000e+00 +0x08,0x0b,0xf8,0xee = vmov.f64 d16, #-3.000000e+00 +0x40,0x0b,0xbd,0xee = vcvtr.s32.f64 s0, d0 +0x40,0x0b,0xbc,0xee = vcvtr.u32.f64 s0, d0 +0xc0,0x0b,0xba,0xee = vcvt.f64.s32 d0, d0, #32 +0x40,0x0b,0xba,0xee = vcvt.f64.s16 d0, d0, #16 +0xc0,0x4b,0xfb,0xee = vcvt.f64.u32 d20, d20, #32 +0x40,0x7b,0xfb,0xee = vcvt.f64.u16 d23, d23, #16 +0xc0,0x2b,0xbe,0xee = vcvt.s32.f64 d2, d2, #32 +0x40,0xfb,0xbe,0xee = vcvt.s16.f64 d15, d15, #16 +0xc0,0x4b,0xff,0xee = vcvt.u32.f64 d20, d20, #32 +0x40,0x7b,0xff,0xee = vcvt.u16.f64 d23, d23, #16 diff --git a/capstone/suite/MC/ARM/idiv-thumb.s.cs b/capstone/suite/MC/ARM/idiv-thumb.s.cs new file mode 100644 index 000000000..1196fe201 --- /dev/null +++ b/capstone/suite/MC/ARM/idiv-thumb.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x92,0xfb,0xf3,0xf1 = sdiv r1, r2, r3 +0xb4,0xfb,0xf5,0xf3 = udiv r3, r4, r5 diff --git a/capstone/suite/MC/ARM/idiv.s.cs b/capstone/suite/MC/ARM/idiv.s.cs new file mode 100644 index 000000000..557e619b3 --- /dev/null +++ b/capstone/suite/MC/ARM/idiv.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x12,0xf3,0x11,0xe7 = sdiv r1, r2, r3 +0x14,0xf5,0x33,0xe7 = udiv r3, r4, r5 diff --git a/capstone/suite/MC/ARM/load-store-acquire-release-v8-thumb.s.cs b/capstone/suite/MC/ARM/load-store-acquire-release-v8-thumb.s.cs new file mode 100644 index 000000000..317369c92 --- /dev/null +++ b/capstone/suite/MC/ARM/load-store-acquire-release-v8-thumb.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None +0xd4,0xe8,0xcf,0x3f = ldaexb r3, [r4] +0xd5,0xe8,0xdf,0x2f = ldaexh r2, [r5] +0xd7,0xe8,0xef,0x1f = ldaex r1, [r7] +0xd8,0xe8,0xff,0x67 = ldaexd r6, r7, [r8] +0xc4,0xe8,0xc1,0x3f = stlexb r1, r3, [r4] +0xc5,0xe8,0xd4,0x2f = stlexh r4, r2, [r5] +0xc7,0xe8,0xe2,0x1f = stlex r2, r1, [r7] +0xc8,0xe8,0xf6,0x23 = stlexd r6, r2, r3, [r8] +0xd6,0xe8,0xaf,0x5f = lda r5, [r6] +0xd6,0xe8,0x8f,0x5f = ldab r5, [r6] +0xd9,0xe8,0x9f,0xcf = ldah r12, [r9] +0xc0,0xe8,0xaf,0x3f = stl r3, [r0] +0xc1,0xe8,0x8f,0x2f = stlb r2, [r1] +0xc3,0xe8,0x9f,0x2f = stlh r2, [r3] diff --git a/capstone/suite/MC/ARM/load-store-acquire-release-v8.s.cs b/capstone/suite/MC/ARM/load-store-acquire-release-v8.s.cs new file mode 100644 index 000000000..dc86605ab --- /dev/null +++ b/capstone/suite/MC/ARM/load-store-acquire-release-v8.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0x9f,0x3e,0xd4,0xe1 = ldaexb r3, [r4] +0x9f,0x2e,0xf5,0xe1 = ldaexh r2, [r5] +0x9f,0x1e,0x97,0xe1 = ldaex r1, [r7] +0x9f,0x6e,0xb8,0xe1 = ldaexd r6, r7, [r8] +0x93,0x1e,0xc4,0xe1 = stlexb r1, r3, [r4] +0x92,0x4e,0xe5,0xe1 = stlexh r4, r2, [r5] +0x91,0x2e,0x87,0xe1 = stlex r2, r1, [r7] +0x92,0x6e,0xa8,0xe1 = stlexd r6, r2, r3, [r8] +0x9f,0x5c,0x96,0xe1 = lda r5, [r6] +0x9f,0x5c,0xd6,0xe1 = ldab r5, [r6] +0x9f,0xcc,0xf9,0xe1 = ldah r12, [r9] +0x93,0xfc,0x80,0xe1 = stl r3, [r0] +0x92,0xfc,0xc1,0xe1 = stlb r2, [r1] +0x92,0xfc,0xe3,0xe1 = stlh r2, [r3] diff --git a/capstone/suite/MC/ARM/mode-switch.s.cs b/capstone/suite/MC/ARM/mode-switch.s.cs new file mode 100644 index 000000000..78c7c46a3 --- /dev/null +++ b/capstone/suite/MC/ARM/mode-switch.s.cs @@ -0,0 +1,5 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x00,0xeb,0x01,0x00 = add.w r0, r0, r1 +0x40,0x18 = adds r0, r0, r1 +0x00,0xeb,0x01,0x00 = add.w r0, r0, r1 +0x40,0x18 = adds r0, r0, r1 diff --git a/capstone/suite/MC/ARM/neon-abs-encoding.s.cs b/capstone/suite/MC/ARM/neon-abs-encoding.s.cs new file mode 100644 index 000000000..73b2f5c3c --- /dev/null +++ b/capstone/suite/MC/ARM/neon-abs-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x20,0x03,0xf1,0xf3 = vabs.s8 d16, d16 +0x20,0x03,0xf5,0xf3 = vabs.s16 d16, d16 +0x20,0x03,0xf9,0xf3 = vabs.s32 d16, d16 +0x20,0x07,0xf9,0xf3 = vabs.f32 d16, d16 +0x60,0x03,0xf1,0xf3 = vabs.s8 q8, q8 +0x60,0x03,0xf5,0xf3 = vabs.s16 q8, q8 +0x60,0x03,0xf9,0xf3 = vabs.s32 q8, q8 +0x60,0x07,0xf9,0xf3 = vabs.f32 q8, q8 +0x20,0x07,0xf0,0xf3 = vqabs.s8 d16, d16 +0x20,0x07,0xf4,0xf3 = vqabs.s16 d16, d16 +0x20,0x07,0xf8,0xf3 = vqabs.s32 d16, d16 +0x60,0x07,0xf0,0xf3 = vqabs.s8 q8, q8 +0x60,0x07,0xf4,0xf3 = vqabs.s16 q8, q8 +0x60,0x07,0xf8,0xf3 = vqabs.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neon-absdiff-encoding.s.cs b/capstone/suite/MC/ARM/neon-absdiff-encoding.s.cs new file mode 100644 index 000000000..6f36a7380 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-absdiff-encoding.s.cs @@ -0,0 +1,39 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa1,0x07,0x40,0xf2 = vabd.s8 d16, d16, d17 +0xa1,0x07,0x50,0xf2 = vabd.s16 d16, d16, d17 +0xa1,0x07,0x60,0xf2 = vabd.s32 d16, d16, d17 +0xa1,0x07,0x40,0xf3 = vabd.u8 d16, d16, d17 +0xa1,0x07,0x50,0xf3 = vabd.u16 d16, d16, d17 +0xa1,0x07,0x60,0xf3 = vabd.u32 d16, d16, d17 +0xa1,0x0d,0x60,0xf3 = vabd.f32 d16, d16, d17 +0xe2,0x07,0x40,0xf2 = vabd.s8 q8, q8, q9 +0xe2,0x07,0x50,0xf2 = vabd.s16 q8, q8, q9 +0xe2,0x07,0x60,0xf2 = vabd.s32 q8, q8, q9 +0xe2,0x07,0x40,0xf3 = vabd.u8 q8, q8, q9 +0xe2,0x07,0x50,0xf3 = vabd.u16 q8, q8, q9 +0xe2,0x07,0x60,0xf3 = vabd.u32 q8, q8, q9 +0xe2,0x0d,0x60,0xf3 = vabd.f32 q8, q8, q9 +0xa1,0x07,0xc0,0xf2 = vabdl.s8 q8, d16, d17 +0xa1,0x07,0xd0,0xf2 = vabdl.s16 q8, d16, d17 +0xa1,0x07,0xe0,0xf2 = vabdl.s32 q8, d16, d17 +0xa1,0x07,0xc0,0xf3 = vabdl.u8 q8, d16, d17 +0xa1,0x07,0xd0,0xf3 = vabdl.u16 q8, d16, d17 +0xa1,0x07,0xe0,0xf3 = vabdl.u32 q8, d16, d17 +0xb1,0x07,0x42,0xf2 = vaba.s8 d16, d18, d17 +0xb1,0x07,0x52,0xf2 = vaba.s16 d16, d18, d17 +0xb1,0x07,0x62,0xf2 = vaba.s32 d16, d18, d17 +0xb1,0x07,0x42,0xf3 = vaba.u8 d16, d18, d17 +0xb1,0x07,0x52,0xf3 = vaba.u16 d16, d18, d17 +0xb1,0x07,0x62,0xf3 = vaba.u32 d16, d18, d17 +0xf4,0x27,0x40,0xf2 = vaba.s8 q9, q8, q10 +0xf4,0x27,0x50,0xf2 = vaba.s16 q9, q8, q10 +0xf4,0x27,0x60,0xf2 = vaba.s32 q9, q8, q10 +0xf4,0x27,0x40,0xf3 = vaba.u8 q9, q8, q10 +0xf4,0x27,0x50,0xf3 = vaba.u16 q9, q8, q10 +0xf4,0x27,0x60,0xf3 = vaba.u32 q9, q8, q10 +0xa2,0x05,0xc3,0xf2 = vabal.s8 q8, d19, d18 +0xa2,0x05,0xd3,0xf2 = vabal.s16 q8, d19, d18 +0xa2,0x05,0xe3,0xf2 = vabal.s32 q8, d19, d18 +0xa2,0x05,0xc3,0xf3 = vabal.u8 q8, d19, d18 +0xa2,0x05,0xd3,0xf3 = vabal.u16 q8, d19, d18 +0xa2,0x05,0xe3,0xf3 = vabal.u32 q8, d19, d18 diff --git a/capstone/suite/MC/ARM/neon-add-encoding.s.cs b/capstone/suite/MC/ARM/neon-add-encoding.s.cs new file mode 100644 index 000000000..bf8a5d95e --- /dev/null +++ b/capstone/suite/MC/ARM/neon-add-encoding.s.cs @@ -0,0 +1,119 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa0,0x08,0x41,0xf2 = vadd.i8 d16, d17, d16 +0xa0,0x08,0x51,0xf2 = vadd.i16 d16, d17, d16 +0xa0,0x08,0x71,0xf2 = vadd.i64 d16, d17, d16 +0xa0,0x08,0x61,0xf2 = vadd.i32 d16, d17, d16 +0xa1,0x0d,0x40,0xf2 = vadd.f32 d16, d16, d17 +0xe2,0x0d,0x40,0xf2 = vadd.f32 q8, q8, q9 +0xa0,0x00,0xc1,0xf2 = vaddl.s8 q8, d17, d16 +0xa0,0x00,0xd1,0xf2 = vaddl.s16 q8, d17, d16 +0xa0,0x00,0xe1,0xf2 = vaddl.s32 q8, d17, d16 +0xa0,0x00,0xc1,0xf3 = vaddl.u8 q8, d17, d16 +0xa0,0x00,0xd1,0xf3 = vaddl.u16 q8, d17, d16 +0xa0,0x00,0xe1,0xf3 = vaddl.u32 q8, d17, d16 +0xa2,0x01,0xc0,0xf2 = vaddw.s8 q8, q8, d18 +0xa2,0x01,0xd0,0xf2 = vaddw.s16 q8, q8, d18 +0xa2,0x01,0xe0,0xf2 = vaddw.s32 q8, q8, d18 +0xa2,0x01,0xc0,0xf3 = vaddw.u8 q8, q8, d18 +0xa2,0x01,0xd0,0xf3 = vaddw.u16 q8, q8, d18 +0xa2,0x01,0xe0,0xf3 = vaddw.u32 q8, q8, d18 +0xa1,0x00,0x40,0xf2 = vhadd.s8 d16, d16, d17 +0xa1,0x00,0x50,0xf2 = vhadd.s16 d16, d16, d17 +0xa1,0x00,0x60,0xf2 = vhadd.s32 d16, d16, d17 +0xa1,0x00,0x40,0xf3 = vhadd.u8 d16, d16, d17 +0xa1,0x00,0x50,0xf3 = vhadd.u16 d16, d16, d17 +0xa1,0x00,0x60,0xf3 = vhadd.u32 d16, d16, d17 +0xe2,0x00,0x40,0xf2 = vhadd.s8 q8, q8, q9 +0xe2,0x00,0x50,0xf2 = vhadd.s16 q8, q8, q9 +0xe2,0x00,0x60,0xf2 = vhadd.s32 q8, q8, q9 +0xe2,0x00,0x40,0xf3 = vhadd.u8 q8, q8, q9 +0xe2,0x00,0x50,0xf3 = vhadd.u16 q8, q8, q9 +0xe2,0x00,0x60,0xf3 = vhadd.u32 q8, q8, q9 +0x28,0xb0,0x0b,0xf2 = vhadd.s8 d11, d11, d24 +0x27,0xc0,0x1c,0xf2 = vhadd.s16 d12, d12, d23 +0x26,0xd0,0x2d,0xf2 = vhadd.s32 d13, d13, d22 +0x25,0xe0,0x0e,0xf3 = vhadd.u8 d14, d14, d21 +0x24,0xf0,0x1f,0xf3 = vhadd.u16 d15, d15, d20 +0xa3,0x00,0x60,0xf3 = vhadd.u32 d16, d16, d19 +0x68,0x20,0x02,0xf2 = vhadd.s8 q1, q1, q12 +0x66,0x40,0x14,0xf2 = vhadd.s16 q2, q2, q11 +0x64,0x60,0x26,0xf2 = vhadd.s32 q3, q3, q10 +0x62,0x80,0x08,0xf3 = vhadd.u8 q4, q4, q9 +0x60,0xa0,0x1a,0xf3 = vhadd.u16 q5, q5, q8 +0x4e,0xc0,0x2c,0xf3 = vhadd.u32 q6, q6, q7 +0xa1,0x01,0x40,0xf2 = vrhadd.s8 d16, d16, d17 +0xa1,0x01,0x50,0xf2 = vrhadd.s16 d16, d16, d17 +0xa1,0x01,0x60,0xf2 = vrhadd.s32 d16, d16, d17 +0xa1,0x01,0x40,0xf3 = vrhadd.u8 d16, d16, d17 +0xa1,0x01,0x50,0xf3 = vrhadd.u16 d16, d16, d17 +0xa1,0x01,0x60,0xf3 = vrhadd.u32 d16, d16, d17 +0xe2,0x01,0x40,0xf2 = vrhadd.s8 q8, q8, q9 +0xe2,0x01,0x50,0xf2 = vrhadd.s16 q8, q8, q9 +0xe2,0x01,0x60,0xf2 = vrhadd.s32 q8, q8, q9 +0xe2,0x01,0x40,0xf3 = vrhadd.u8 q8, q8, q9 +0xe2,0x01,0x50,0xf3 = vrhadd.u16 q8, q8, q9 +0xe2,0x01,0x60,0xf3 = vrhadd.u32 q8, q8, q9 +0xa1,0x01,0x40,0xf2 = vrhadd.s8 d16, d16, d17 +0xa1,0x01,0x50,0xf2 = vrhadd.s16 d16, d16, d17 +0xa1,0x01,0x60,0xf2 = vrhadd.s32 d16, d16, d17 +0xa1,0x01,0x40,0xf3 = vrhadd.u8 d16, d16, d17 +0xa1,0x01,0x50,0xf3 = vrhadd.u16 d16, d16, d17 +0xa1,0x01,0x60,0xf3 = vrhadd.u32 d16, d16, d17 +0xe2,0x01,0x40,0xf2 = vrhadd.s8 q8, q8, q9 +0xe2,0x01,0x50,0xf2 = vrhadd.s16 q8, q8, q9 +0xe2,0x01,0x60,0xf2 = vrhadd.s32 q8, q8, q9 +0xe2,0x01,0x40,0xf3 = vrhadd.u8 q8, q8, q9 +0xe2,0x01,0x50,0xf3 = vrhadd.u16 q8, q8, q9 +0xe2,0x01,0x60,0xf3 = vrhadd.u32 q8, q8, q9 +0xb1,0x00,0x40,0xf2 = vqadd.s8 d16, d16, d17 +0xb1,0x00,0x50,0xf2 = vqadd.s16 d16, d16, d17 +0xb1,0x00,0x60,0xf2 = vqadd.s32 d16, d16, d17 +0xb1,0x00,0x70,0xf2 = vqadd.s64 d16, d16, d17 +0xb1,0x00,0x40,0xf3 = vqadd.u8 d16, d16, d17 +0xb1,0x00,0x50,0xf3 = vqadd.u16 d16, d16, d17 +0xb1,0x00,0x60,0xf3 = vqadd.u32 d16, d16, d17 +0xb1,0x00,0x70,0xf3 = vqadd.u64 d16, d16, d17 +0xf2,0x00,0x40,0xf2 = vqadd.s8 q8, q8, q9 +0xf2,0x00,0x50,0xf2 = vqadd.s16 q8, q8, q9 +0xf2,0x00,0x60,0xf2 = vqadd.s32 q8, q8, q9 +0xf2,0x00,0x70,0xf2 = vqadd.s64 q8, q8, q9 +0xf2,0x00,0x40,0xf3 = vqadd.u8 q8, q8, q9 +0xf2,0x00,0x50,0xf3 = vqadd.u16 q8, q8, q9 +0xf2,0x00,0x60,0xf3 = vqadd.u32 q8, q8, q9 +0xf2,0x00,0x70,0xf3 = vqadd.u64 q8, q8, q9 +0xb1,0x00,0x40,0xf2 = vqadd.s8 d16, d16, d17 +0xb1,0x00,0x50,0xf2 = vqadd.s16 d16, d16, d17 +0xb1,0x00,0x60,0xf2 = vqadd.s32 d16, d16, d17 +0xb1,0x00,0x70,0xf2 = vqadd.s64 d16, d16, d17 +0xb1,0x00,0x40,0xf3 = vqadd.u8 d16, d16, d17 +0xb1,0x00,0x50,0xf3 = vqadd.u16 d16, d16, d17 +0xb1,0x00,0x60,0xf3 = vqadd.u32 d16, d16, d17 +0xb1,0x00,0x70,0xf3 = vqadd.u64 d16, d16, d17 +0xf2,0x00,0x40,0xf2 = vqadd.s8 q8, q8, q9 +0xf2,0x00,0x50,0xf2 = vqadd.s16 q8, q8, q9 +0xf2,0x00,0x60,0xf2 = vqadd.s32 q8, q8, q9 +0xf2,0x00,0x70,0xf2 = vqadd.s64 q8, q8, q9 +0xf2,0x00,0x40,0xf3 = vqadd.u8 q8, q8, q9 +0xf2,0x00,0x50,0xf3 = vqadd.u16 q8, q8, q9 +0xf2,0x00,0x60,0xf3 = vqadd.u32 q8, q8, q9 +0xf2,0x00,0x70,0xf3 = vqadd.u64 q8, q8, q9 +0xa2,0x04,0xc0,0xf2 = vaddhn.i16 d16, q8, q9 +0xa2,0x04,0xd0,0xf2 = vaddhn.i32 d16, q8, q9 +0xa2,0x04,0xe0,0xf2 = vaddhn.i64 d16, q8, q9 +0xa2,0x04,0xc0,0xf3 = vraddhn.i16 d16, q8, q9 +0xa2,0x04,0xd0,0xf3 = vraddhn.i32 d16, q8, q9 +0xa2,0x04,0xe0,0xf3 = vraddhn.i64 d16, q8, q9 +0x05,0x68,0x06,0xf2 = vadd.i8 d6, d6, d5 +0x01,0x78,0x17,0xf2 = vadd.i16 d7, d7, d1 +0x02,0x88,0x28,0xf2 = vadd.i32 d8, d8, d2 +0x03,0x98,0x39,0xf2 = vadd.i64 d9, d9, d3 +0x4a,0xc8,0x0c,0xf2 = vadd.i8 q6, q6, q5 +0x42,0xe8,0x1e,0xf2 = vadd.i16 q7, q7, q1 +0xc4,0x08,0x60,0xf2 = vadd.i32 q8, q8, q2 +0xc6,0x28,0x72,0xf2 = vadd.i64 q9, q9, q3 +0x05,0xc1,0x8c,0xf2 = vaddw.s8 q6, q6, d5 +0x01,0xe1,0x9e,0xf2 = vaddw.s16 q7, q7, d1 +0x82,0x01,0xe0,0xf2 = vaddw.s32 q8, q8, d2 +0x05,0xc1,0x8c,0xf3 = vaddw.u8 q6, q6, d5 +0x01,0xe1,0x9e,0xf3 = vaddw.u16 q7, q7, d1 +0x82,0x01,0xe0,0xf3 = vaddw.u32 q8, q8, d2 diff --git a/capstone/suite/MC/ARM/neon-bitcount-encoding.s.cs b/capstone/suite/MC/ARM/neon-bitcount-encoding.s.cs new file mode 100644 index 000000000..9c75cc111 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-bitcount-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x20,0x05,0xf0,0xf3 = vcnt.8 d16, d16 +0x60,0x05,0xf0,0xf3 = vcnt.8 q8, q8 +0xa0,0x04,0xf0,0xf3 = vclz.i8 d16, d16 +0xa0,0x04,0xf4,0xf3 = vclz.i16 d16, d16 +0xa0,0x04,0xf8,0xf3 = vclz.i32 d16, d16 +0xe0,0x04,0xf0,0xf3 = vclz.i8 q8, q8 +0xe0,0x04,0xf4,0xf3 = vclz.i16 q8, q8 +0xe0,0x04,0xf8,0xf3 = vclz.i32 q8, q8 +0x20,0x04,0xf0,0xf3 = vcls.s8 d16, d16 +0x20,0x04,0xf4,0xf3 = vcls.s16 d16, d16 +0x20,0x04,0xf8,0xf3 = vcls.s32 d16, d16 +0x60,0x04,0xf0,0xf3 = vcls.s8 q8, q8 +0x60,0x04,0xf4,0xf3 = vcls.s16 q8, q8 +0x60,0x04,0xf8,0xf3 = vcls.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neon-bitwise-encoding.s.cs b/capstone/suite/MC/ARM/neon-bitwise-encoding.s.cs new file mode 100644 index 000000000..b9b939e4e --- /dev/null +++ b/capstone/suite/MC/ARM/neon-bitwise-encoding.s.cs @@ -0,0 +1,126 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xb0,0x01,0x41,0xf2 = vand d16, d17, d16 +0xf2,0x01,0x40,0xf2 = vand q8, q8, q9 +0xb0,0x01,0x41,0xf3 = veor d16, d17, d16 +0xf2,0x01,0x40,0xf3 = veor q8, q8, q9 +0xb0,0x01,0x61,0xf2 = vorr d16, d17, d16 +0xf2,0x01,0x60,0xf2 = vorr q8, q8, q9 +0x11,0x07,0xc0,0xf2 = vorr.i32 d16, #0x1000000 +0x51,0x07,0xc0,0xf2 = vorr.i32 q8, #0x1000000 +0x50,0x01,0xc0,0xf2 = vorr.i32 q8, #0 +0xb0,0x01,0x51,0xf2 = vbic d16, d17, d16 +0xf2,0x01,0x50,0xf2 = vbic q8, q8, q9 +0x3f,0x07,0xc7,0xf3 = vbic.i32 d16, #0xff000000 +0x7f,0x07,0xc7,0xf3 = vbic.i32 q8, #0xff000000 +0xf6,0x41,0x54,0xf2 = vbic q10, q10, q11 +0x11,0x91,0x19,0xf2 = vbic d9, d9, d1 +0xb0,0x01,0x71,0xf2 = vorn d16, d17, d16 +0xf2,0x01,0x70,0xf2 = vorn q8, q8, q9 +0xa0,0x05,0xf0,0xf3 = vmvn d16, d16 +0xe0,0x05,0xf0,0xf3 = vmvn q8, q8 +0xb0,0x21,0x51,0xf3 = vbsl d18, d17, d16 +0xf2,0x01,0x54,0xf3 = vbsl q8, q10, q9 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x56,0x81,0x0e,0xf3 = veor q4, q7, q3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x07,0xf2 = vand d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x13,0x41,0x27,0xf2 = vorr d4, d7, d3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x56,0x81,0x2e,0xf2 = vorr q4, q7, q3 +0x5a,0xc1,0x0c,0xf2 = vand q6, q6, q5 +0x5a,0xc1,0x0c,0xf2 = vand q6, q6, q5 +0x52,0xe1,0x0e,0xf2 = vand q7, q7, q1 +0xd4,0x01,0x40,0xf2 = vand q8, q8, q2 +0xd4,0x01,0x40,0xf2 = vand q8, q8, q2 +0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 +0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 +0x52,0xe1,0x0e,0xf3 = veor q7, q7, q1 +0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 +0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 +0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 +0x5a,0xc1,0x0c,0xf3 = veor q6, q6, q5 +0x52,0xe1,0x0e,0xf3 = veor q7, q7, q1 +0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 +0xd4,0x01,0x40,0xf3 = veor q8, q8, q2 +0x4a,0xa2,0xb5,0xf3 = vclt.s16 q5, q5, #0 +0x05,0x52,0xb5,0xf3 = vclt.s16 d5, d5, #0 +0x56,0xa8,0x1a,0xf3 = vceq.i16 q5, q5, q3 +0x13,0x58,0x15,0xf3 = vceq.i16 d5, d5, d3 +0x46,0xa3,0x1a,0xf2 = vcgt.s16 q5, q5, q3 +0x03,0x53,0x15,0xf2 = vcgt.s16 d5, d5, d3 +0x56,0xa3,0x1a,0xf2 = vcge.s16 q5, q5, q3 +0x13,0x53,0x15,0xf2 = vcge.s16 d5, d5, d3 +0x4a,0xa0,0xb5,0xf3 = vcgt.s16 q5, q5, #0 +0x05,0x50,0xb5,0xf3 = vcgt.s16 d5, d5, #0 +0xca,0xa0,0xb5,0xf3 = vcge.s16 q5, q5, #0 +0x85,0x50,0xb5,0xf3 = vcge.s16 d5, d5, #0 +0x4a,0xa1,0xb5,0xf3 = vceq.i16 q5, q5, #0 +0x05,0x51,0xb5,0xf3 = vceq.i16 d5, d5, #0 +0xca,0xa1,0xb5,0xf3 = vcle.s16 q5, q5, #0 +0x85,0x51,0xb5,0xf3 = vcle.s16 d5, d5, #0 +0x3e,0x5e,0x05,0xf3 = vacge.f32 d5, d5, d30 +0x56,0xae,0x0a,0xf3 = vacge.f32 q5, q5, q3 +0x3e,0x5e,0x25,0xf3 = vacgt.f32 d5, d5, d30 +0x56,0xae,0x2a,0xf3 = vacgt.f32 q5, q5, q3 diff --git a/capstone/suite/MC/ARM/neon-cmp-encoding.s.cs b/capstone/suite/MC/ARM/neon-cmp-encoding.s.cs new file mode 100644 index 000000000..dd397bacc --- /dev/null +++ b/capstone/suite/MC/ARM/neon-cmp-encoding.s.cs @@ -0,0 +1,88 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xb1,0x08,0x40,0xf3 = vceq.i8 d16, d16, d17 +0xb1,0x08,0x50,0xf3 = vceq.i16 d16, d16, d17 +0xb1,0x08,0x60,0xf3 = vceq.i32 d16, d16, d17 +0xa1,0x0e,0x40,0xf2 = vceq.f32 d16, d16, d17 +0xf2,0x08,0x40,0xf3 = vceq.i8 q8, q8, q9 +0xf2,0x08,0x50,0xf3 = vceq.i16 q8, q8, q9 +0xf2,0x08,0x60,0xf3 = vceq.i32 q8, q8, q9 +0xe2,0x0e,0x40,0xf2 = vceq.f32 q8, q8, q9 +0xb1,0x03,0x40,0xf2 = vcge.s8 d16, d16, d17 +0xb1,0x03,0x50,0xf2 = vcge.s16 d16, d16, d17 +0xb1,0x03,0x60,0xf2 = vcge.s32 d16, d16, d17 +0xb1,0x03,0x40,0xf3 = vcge.u8 d16, d16, d17 +0xb1,0x03,0x50,0xf3 = vcge.u16 d16, d16, d17 +0xb1,0x03,0x60,0xf3 = vcge.u32 d16, d16, d17 +0xa1,0x0e,0x40,0xf3 = vcge.f32 d16, d16, d17 +0xf2,0x03,0x40,0xf2 = vcge.s8 q8, q8, q9 +0xf2,0x03,0x50,0xf2 = vcge.s16 q8, q8, q9 +0xf2,0x03,0x60,0xf2 = vcge.s32 q8, q8, q9 +0xf2,0x03,0x40,0xf3 = vcge.u8 q8, q8, q9 +0xf2,0x03,0x50,0xf3 = vcge.u16 q8, q8, q9 +0xf2,0x03,0x60,0xf3 = vcge.u32 q8, q8, q9 +0xe2,0x0e,0x40,0xf3 = vcge.f32 q8, q8, q9 +0xb1,0x0e,0x40,0xf3 = vacge.f32 d16, d16, d17 +0xf2,0x0e,0x40,0xf3 = vacge.f32 q8, q8, q9 +0xa1,0x03,0x40,0xf2 = vcgt.s8 d16, d16, d17 +0xa1,0x03,0x50,0xf2 = vcgt.s16 d16, d16, d17 +0xa1,0x03,0x60,0xf2 = vcgt.s32 d16, d16, d17 +0xa1,0x03,0x40,0xf3 = vcgt.u8 d16, d16, d17 +0xa1,0x03,0x50,0xf3 = vcgt.u16 d16, d16, d17 +0xa1,0x03,0x60,0xf3 = vcgt.u32 d16, d16, d17 +0xa1,0x0e,0x60,0xf3 = vcgt.f32 d16, d16, d17 +0xe2,0x03,0x40,0xf2 = vcgt.s8 q8, q8, q9 +0xe2,0x03,0x50,0xf2 = vcgt.s16 q8, q8, q9 +0xe2,0x03,0x60,0xf2 = vcgt.s32 q8, q8, q9 +0xe2,0x03,0x40,0xf3 = vcgt.u8 q8, q8, q9 +0xe2,0x03,0x50,0xf3 = vcgt.u16 q8, q8, q9 +0xe2,0x03,0x60,0xf3 = vcgt.u32 q8, q8, q9 +0xe2,0x0e,0x60,0xf3 = vcgt.f32 q8, q8, q9 +0xb1,0x0e,0x60,0xf3 = vacgt.f32 d16, d16, d17 +0xf2,0x0e,0x60,0xf3 = vacgt.f32 q8, q8, q9 +0xb1,0x08,0x40,0xf2 = vtst.8 d16, d16, d17 +0xb1,0x08,0x50,0xf2 = vtst.16 d16, d16, d17 +0xb1,0x08,0x60,0xf2 = vtst.32 d16, d16, d17 +0xf2,0x08,0x40,0xf2 = vtst.8 q8, q8, q9 +0xf2,0x08,0x50,0xf2 = vtst.16 q8, q8, q9 +0xf2,0x08,0x60,0xf2 = vtst.32 q8, q8, q9 +0x20,0x01,0xf1,0xf3 = vceq.i8 d16, d16, #0 +0xa0,0x00,0xf1,0xf3 = vcge.s8 d16, d16, #0 +0xa0,0x01,0xf1,0xf3 = vcle.s8 d16, d16, #0 +0x20,0x00,0xf1,0xf3 = vcgt.s8 d16, d16, #0 +0x20,0x02,0xf1,0xf3 = vclt.s8 d16, d16, #0 +0x6a,0x83,0x46,0xf2 = vcgt.s8 q12, q3, q13 +0x6a,0x83,0x56,0xf2 = vcgt.s16 q12, q3, q13 +0x6a,0x83,0x66,0xf2 = vcgt.s32 q12, q3, q13 +0x6a,0x83,0x46,0xf3 = vcgt.u8 q12, q3, q13 +0x6a,0x83,0x56,0xf3 = vcgt.u16 q12, q3, q13 +0x6a,0x83,0x66,0xf3 = vcgt.u32 q12, q3, q13 +0x6a,0x8e,0x66,0xf3 = vcgt.f32 q12, q3, q13 +0x0d,0xc3,0x03,0xf2 = vcgt.s8 d12, d3, d13 +0x0d,0xc3,0x13,0xf2 = vcgt.s16 d12, d3, d13 +0x0d,0xc3,0x23,0xf2 = vcgt.s32 d12, d3, d13 +0x0d,0xc3,0x03,0xf3 = vcgt.u8 d12, d3, d13 +0x0d,0xc3,0x13,0xf3 = vcgt.u16 d12, d3, d13 +0x0d,0xc3,0x23,0xf3 = vcgt.u32 d12, d3, d13 +0x0d,0xce,0x23,0xf3 = vcgt.f32 d12, d3, d13 +0xb0,0x03,0x41,0xf2 = vcge.s8 d16, d17, d16 +0xb0,0x03,0x51,0xf2 = vcge.s16 d16, d17, d16 +0xb0,0x03,0x61,0xf2 = vcge.s32 d16, d17, d16 +0xb0,0x03,0x41,0xf3 = vcge.u8 d16, d17, d16 +0xb0,0x03,0x51,0xf3 = vcge.u16 d16, d17, d16 +0xb0,0x03,0x61,0xf3 = vcge.u32 d16, d17, d16 +0xa0,0x0e,0x41,0xf3 = vcge.f32 d16, d17, d16 +0xf0,0x03,0x42,0xf2 = vcge.s8 q8, q9, q8 +0xf0,0x03,0x52,0xf2 = vcge.s16 q8, q9, q8 +0xf0,0x03,0x62,0xf2 = vcge.s32 q8, q9, q8 +0xf0,0x03,0x42,0xf3 = vcge.u8 q8, q9, q8 +0xf0,0x03,0x52,0xf3 = vcge.u16 q8, q9, q8 +0xf0,0x03,0x62,0xf3 = vcge.u32 q8, q9, q8 +0xe0,0x0e,0x42,0xf3 = vcge.f32 q8, q9, q8 +0xf6,0x2e,0x68,0xf3 = vacgt.f32 q9, q12, q11 +0x1b,0x9e,0x2c,0xf3 = vacgt.f32 d9, d12, d11 +0xf6,0x6e,0x68,0xf3 = vacgt.f32 q11, q12, q11 +0x1b,0xbe,0x2c,0xf3 = vacgt.f32 d11, d12, d11 +0xf6,0x2e,0x48,0xf3 = vacge.f32 q9, q12, q11 +0x1b,0x9e,0x0c,0xf3 = vacge.f32 d9, d12, d11 +0xf6,0x6e,0x48,0xf3 = vacge.f32 q11, q12, q11 +0x1b,0xbe,0x0c,0xf3 = vacge.f32 d11, d12, d11 diff --git a/capstone/suite/MC/ARM/neon-convert-encoding.s.cs b/capstone/suite/MC/ARM/neon-convert-encoding.s.cs new file mode 100644 index 000000000..0344353aa --- /dev/null +++ b/capstone/suite/MC/ARM/neon-convert-encoding.s.cs @@ -0,0 +1,27 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x20,0x07,0xfb,0xf3 = vcvt.s32.f32 d16, d16 +0xa0,0x07,0xfb,0xf3 = vcvt.u32.f32 d16, d16 +0x20,0x06,0xfb,0xf3 = vcvt.f32.s32 d16, d16 +0xa0,0x06,0xfb,0xf3 = vcvt.f32.u32 d16, d16 +0x60,0x07,0xfb,0xf3 = vcvt.s32.f32 q8, q8 +0xe0,0x07,0xfb,0xf3 = vcvt.u32.f32 q8, q8 +0x60,0x06,0xfb,0xf3 = vcvt.f32.s32 q8, q8 +0xe0,0x06,0xfb,0xf3 = vcvt.f32.u32 q8, q8 +0x30,0x0f,0xff,0xf2 = vcvt.s32.f32 d16, d16, #1 +0x20,0x07,0xfb,0xf3 = vcvt.s32.f32 d16, d16 +0x30,0x0f,0xff,0xf3 = vcvt.u32.f32 d16, d16, #1 +0xa0,0x07,0xfb,0xf3 = vcvt.u32.f32 d16, d16 +0x30,0x0e,0xff,0xf2 = vcvt.f32.s32 d16, d16, #1 +0x20,0x06,0xfb,0xf3 = vcvt.f32.s32 d16, d16 +0x30,0x0e,0xff,0xf3 = vcvt.f32.u32 d16, d16, #1 +0xa0,0x06,0xfb,0xf3 = vcvt.f32.u32 d16, d16 +0x70,0x0f,0xff,0xf2 = vcvt.s32.f32 q8, q8, #1 +0x60,0x07,0xfb,0xf3 = vcvt.s32.f32 q8, q8 +0x70,0x0f,0xff,0xf3 = vcvt.u32.f32 q8, q8, #1 +0xe0,0x07,0xfb,0xf3 = vcvt.u32.f32 q8, q8 +0x70,0x0e,0xff,0xf2 = vcvt.f32.s32 q8, q8, #1 +0x60,0x06,0xfb,0xf3 = vcvt.f32.s32 q8, q8 +0x70,0x0e,0xff,0xf3 = vcvt.f32.u32 q8, q8, #1 +0xe0,0x06,0xfb,0xf3 = vcvt.f32.u32 q8, q8 +0x20,0x07,0xf6,0xf3 = vcvt.f32.f16 q8, d16 +0x20,0x06,0xf6,0xf3 = vcvt.f16.f32 d16, q8 diff --git a/capstone/suite/MC/ARM/neon-crypto.s.cs b/capstone/suite/MC/ARM/neon-crypto.s.cs new file mode 100644 index 000000000..3cb081a66 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-crypto.s.cs @@ -0,0 +1,16 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0x42,0x03,0xb0,0xf3 = aesd.8 q0, q1 +0x02,0x03,0xb0,0xf3 = aese.8 q0, q1 +0xc2,0x03,0xb0,0xf3 = aesimc.8 q0, q1 +0x82,0x03,0xb0,0xf3 = aesmc.8 q0, q1 +0xc2,0x02,0xb9,0xf3 = sha1h.32 q0, q1 +0x82,0x03,0xba,0xf3 = sha1su1.32 q0, q1 +0xc2,0x03,0xba,0xf3 = sha256su0.32 q0, q1 +0x44,0x0c,0x02,0xf2 = sha1c.32 q0, q1, q2 +0x44,0x0c,0x22,0xf2 = sha1m.32 q0, q1, q2 +0x44,0x0c,0x12,0xf2 = sha1p.32 q0, q1, q2 +0x44,0x0c,0x32,0xf2 = sha1su0.32 q0, q1, q2 +0x44,0x0c,0x02,0xf3 = sha256h.32 q0, q1, q2 +0x44,0x0c,0x12,0xf3 = sha256h2.32 q0, q1, q2 +0x44,0x0c,0x22,0xf3 = sha256su1.32 q0, q1, q2 +0xa1,0x0e,0xe0,0xf2 = vmull.p64 q8, d16, d17 diff --git a/capstone/suite/MC/ARM/neon-dup-encoding.s.cs b/capstone/suite/MC/ARM/neon-dup-encoding.s.cs new file mode 100644 index 000000000..8e57cd953 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-dup-encoding.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x90,0x0b,0xc0,0xee = vdup.8 d16, r0 +0xb0,0x0b,0x80,0xee = vdup.16 d16, r0 +0x90,0x0b,0x80,0xee = vdup.32 d16, r0 +0x90,0x0b,0xe0,0xee = vdup.8 q8, r0 +0xb0,0x0b,0xa0,0xee = vdup.16 q8, r0 +0x90,0x0b,0xa0,0xee = vdup.32 q8, r0 +0x20,0x0c,0xf3,0xf3 = vdup.8 d16, d16[1] +0x20,0x0c,0xf6,0xf3 = vdup.16 d16, d16[1] +0x20,0x0c,0xfc,0xf3 = vdup.32 d16, d16[1] +0x60,0x0c,0xf3,0xf3 = vdup.8 q8, d16[1] +0x60,0x0c,0xf6,0xf3 = vdup.16 q8, d16[1] +0x60,0x0c,0xfc,0xf3 = vdup.32 q8, d16[1] diff --git a/capstone/suite/MC/ARM/neon-minmax-encoding.s.cs b/capstone/suite/MC/ARM/neon-minmax-encoding.s.cs new file mode 100644 index 000000000..913976404 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-minmax-encoding.s.cs @@ -0,0 +1,57 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x03,0x16,0x02,0xf2 = vmax.s8 d1, d2, d3 +0x06,0x46,0x15,0xf2 = vmax.s16 d4, d5, d6 +0x09,0x76,0x28,0xf2 = vmax.s32 d7, d8, d9 +0x0c,0xa6,0x0b,0xf3 = vmax.u8 d10, d11, d12 +0x0f,0xd6,0x1e,0xf3 = vmax.u16 d13, d14, d15 +0xa2,0x06,0x61,0xf3 = vmax.u32 d16, d17, d18 +0xa5,0x3f,0x44,0xf2 = vmax.f32 d19, d20, d21 +0x03,0x26,0x02,0xf2 = vmax.s8 d2, d2, d3 +0x06,0x56,0x15,0xf2 = vmax.s16 d5, d5, d6 +0x09,0x86,0x28,0xf2 = vmax.s32 d8, d8, d9 +0x0c,0xb6,0x0b,0xf3 = vmax.u8 d11, d11, d12 +0x0f,0xe6,0x1e,0xf3 = vmax.u16 d14, d14, d15 +0xa2,0x16,0x61,0xf3 = vmax.u32 d17, d17, d18 +0xa5,0x4f,0x44,0xf2 = vmax.f32 d20, d20, d21 +0x46,0x26,0x04,0xf2 = vmax.s8 q1, q2, q3 +0x4c,0x86,0x1a,0xf2 = vmax.s16 q4, q5, q6 +0xe2,0xe6,0x20,0xf2 = vmax.s32 q7, q8, q9 +0xe8,0x46,0x46,0xf3 = vmax.u8 q10, q11, q12 +0xee,0xa6,0x5c,0xf3 = vmax.u16 q13, q14, q15 +0x60,0xc6,0x2e,0xf3 = vmax.u32 q6, q7, q8 +0x42,0x2f,0x4a,0xf2 = vmax.f32 q9, q5, q1 +0x46,0x46,0x04,0xf2 = vmax.s8 q2, q2, q3 +0x4c,0xa6,0x1a,0xf2 = vmax.s16 q5, q5, q6 +0xe2,0x06,0x60,0xf2 = vmax.s32 q8, q8, q9 +0xc4,0x66,0x46,0xf3 = vmax.u8 q11, q11, q2 +0x4a,0x86,0x18,0xf3 = vmax.u16 q4, q4, q5 +0x60,0xe6,0x2e,0xf3 = vmax.u32 q7, q7, q8 +0x42,0x4f,0x04,0xf2 = vmax.f32 q2, q2, q1 +0x13,0x16,0x02,0xf2 = vmin.s8 d1, d2, d3 +0x16,0x46,0x15,0xf2 = vmin.s16 d4, d5, d6 +0x19,0x76,0x28,0xf2 = vmin.s32 d7, d8, d9 +0x1c,0xa6,0x0b,0xf3 = vmin.u8 d10, d11, d12 +0x1f,0xd6,0x1e,0xf3 = vmin.u16 d13, d14, d15 +0xb2,0x06,0x61,0xf3 = vmin.u32 d16, d17, d18 +0xa5,0x3f,0x64,0xf2 = vmin.f32 d19, d20, d21 +0x13,0x26,0x02,0xf2 = vmin.s8 d2, d2, d3 +0x16,0x56,0x15,0xf2 = vmin.s16 d5, d5, d6 +0x19,0x86,0x28,0xf2 = vmin.s32 d8, d8, d9 +0x1c,0xb6,0x0b,0xf3 = vmin.u8 d11, d11, d12 +0x1f,0xe6,0x1e,0xf3 = vmin.u16 d14, d14, d15 +0xb2,0x16,0x61,0xf3 = vmin.u32 d17, d17, d18 +0xa5,0x4f,0x64,0xf2 = vmin.f32 d20, d20, d21 +0x56,0x26,0x04,0xf2 = vmin.s8 q1, q2, q3 +0x5c,0x86,0x1a,0xf2 = vmin.s16 q4, q5, q6 +0xf2,0xe6,0x20,0xf2 = vmin.s32 q7, q8, q9 +0xf8,0x46,0x46,0xf3 = vmin.u8 q10, q11, q12 +0xfe,0xa6,0x5c,0xf3 = vmin.u16 q13, q14, q15 +0x70,0xc6,0x2e,0xf3 = vmin.u32 q6, q7, q8 +0x42,0x2f,0x6a,0xf2 = vmin.f32 q9, q5, q1 +0x56,0x46,0x04,0xf2 = vmin.s8 q2, q2, q3 +0x5c,0xa6,0x1a,0xf2 = vmin.s16 q5, q5, q6 +0xf2,0x06,0x60,0xf2 = vmin.s32 q8, q8, q9 +0xd4,0x66,0x46,0xf3 = vmin.u8 q11, q11, q2 +0x5a,0x86,0x18,0xf3 = vmin.u16 q4, q4, q5 +0x70,0xe6,0x2e,0xf3 = vmin.u32 q7, q7, q8 +0x42,0x4f,0x24,0xf2 = vmin.f32 q2, q2, q1 diff --git a/capstone/suite/MC/ARM/neon-mov-encoding.s.cs b/capstone/suite/MC/ARM/neon-mov-encoding.s.cs new file mode 100644 index 000000000..7a53d2bb3 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-mov-encoding.s.cs @@ -0,0 +1,76 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x18,0x0e,0xc0,0xf2 = vmov.i8 d16, #0x8 +0x10,0x08,0xc1,0xf2 = vmov.i16 d16, #0x10 +0x10,0x0a,0xc1,0xf2 = vmov.i16 d16, #0x1000 +0x10,0x00,0xc2,0xf2 = vmov.i32 d16, #0x20 +0x10,0x02,0xc2,0xf2 = vmov.i32 d16, #0x2000 +0x10,0x04,0xc2,0xf2 = vmov.i32 d16, #0x200000 +0x10,0x06,0xc2,0xf2 = vmov.i32 d16, #0x20000000 +0x10,0x0c,0xc2,0xf2 = vmov.i32 d16, #0x20ff +0x10,0x0d,0xc2,0xf2 = vmov.i32 d16, #0x20ffff +0x33,0x0e,0xc1,0xf3 = vmov.i64 d16, #0xff0000ff0000ffff +0x58,0x0e,0xc0,0xf2 = vmov.i8 q8, #0x8 +0x50,0x08,0xc1,0xf2 = vmov.i16 q8, #0x10 +0x50,0x0a,0xc1,0xf2 = vmov.i16 q8, #0x1000 +0x50,0x00,0xc2,0xf2 = vmov.i32 q8, #0x20 +0x50,0x02,0xc2,0xf2 = vmov.i32 q8, #0x2000 +0x50,0x04,0xc2,0xf2 = vmov.i32 q8, #0x200000 +0x50,0x06,0xc2,0xf2 = vmov.i32 q8, #0x20000000 +0x50,0x0c,0xc2,0xf2 = vmov.i32 q8, #0x20ff +0x50,0x0d,0xc2,0xf2 = vmov.i32 q8, #0x20ffff +0x73,0x0e,0xc1,0xf3 = vmov.i64 q8, #0xff0000ff0000ffff +0x30,0x08,0xc1,0xf2 = vmvn.i16 d16, #0x10 +0x30,0x0a,0xc1,0xf2 = vmvn.i16 d16, #0x1000 +0x30,0x00,0xc2,0xf2 = vmvn.i32 d16, #0x20 +0x30,0x02,0xc2,0xf2 = vmvn.i32 d16, #0x2000 +0x30,0x04,0xc2,0xf2 = vmvn.i32 d16, #0x200000 +0x30,0x06,0xc2,0xf2 = vmvn.i32 d16, #0x20000000 +0x30,0x0c,0xc2,0xf2 = vmvn.i32 d16, #0x20ff +0x30,0x0d,0xc2,0xf2 = vmvn.i32 d16, #0x20ffff +0x30,0x0a,0xc8,0xf2 = vmovl.s8 q8, d16 +0x30,0x0a,0xd0,0xf2 = vmovl.s16 q8, d16 +0x30,0x0a,0xe0,0xf2 = vmovl.s32 q8, d16 +0x30,0x0a,0xc8,0xf3 = vmovl.u8 q8, d16 +0x30,0x0a,0xd0,0xf3 = vmovl.u16 q8, d16 +0x30,0x0a,0xe0,0xf3 = vmovl.u32 q8, d16 +0x20,0x02,0xf2,0xf3 = vmovn.i16 d16, q8 +0x20,0x02,0xf6,0xf3 = vmovn.i32 d16, q8 +0x20,0x02,0xfa,0xf3 = vmovn.i64 d16, q8 +0xa0,0x02,0xf2,0xf3 = vqmovn.s16 d16, q8 +0xa0,0x02,0xf6,0xf3 = vqmovn.s32 d16, q8 +0xa0,0x02,0xfa,0xf3 = vqmovn.s64 d16, q8 +0xe0,0x02,0xf2,0xf3 = vqmovn.u16 d16, q8 +0xe0,0x02,0xf6,0xf3 = vqmovn.u32 d16, q8 +0xe0,0x02,0xfa,0xf3 = vqmovn.u64 d16, q8 +0x60,0x02,0xf2,0xf3 = vqmovun.s16 d16, q8 +0x60,0x02,0xf6,0xf3 = vqmovun.s32 d16, q8 +0x60,0x02,0xfa,0xf3 = vqmovun.s64 d16, q8 +0xb0,0x0b,0x50,0xee = vmov.s8 r0, d16[1] +0xf0,0x0b,0x10,0xee = vmov.s16 r0, d16[1] +0xb0,0x0b,0xd0,0xee = vmov.u8 r0, d16[1] +0xf0,0x0b,0x90,0xee = vmov.u16 r0, d16[1] +0x90,0x0b,0x30,0xee = vmov.32 r0, d16[1] +0xb0,0x1b,0x40,0xee = vmov.8 d16[1], r1 +0xf0,0x1b,0x00,0xee = vmov.16 d16[1], r1 +0x90,0x1b,0x20,0xee = vmov.32 d16[1], r1 +0xb0,0x1b,0x42,0xee = vmov.8 d18[1], r1 +0xf0,0x1b,0x02,0xee = vmov.16 d18[1], r1 +0x90,0x1b,0x22,0xee = vmov.32 d18[1], r1 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 +0x82,0x15,0xb0,0xf3 = vmvn d1, d2 diff --git a/capstone/suite/MC/ARM/neon-mul-accum-encoding.s.cs b/capstone/suite/MC/ARM/neon-mul-accum-encoding.s.cs new file mode 100644 index 000000000..bb1b176b1 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-mul-accum-encoding.s.cs @@ -0,0 +1,39 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa1,0x09,0x42,0xf2 = vmla.i8 d16, d18, d17 +0xa1,0x09,0x52,0xf2 = vmla.i16 d16, d18, d17 +0xa1,0x09,0x62,0xf2 = vmla.i32 d16, d18, d17 +0xb1,0x0d,0x42,0xf2 = vmla.f32 d16, d18, d17 +0xe4,0x29,0x40,0xf2 = vmla.i8 q9, q8, q10 +0xe4,0x29,0x50,0xf2 = vmla.i16 q9, q8, q10 +0xe4,0x29,0x60,0xf2 = vmla.i32 q9, q8, q10 +0xf4,0x2d,0x40,0xf2 = vmla.f32 q9, q8, q10 +0xc3,0x80,0xe0,0xf3 = vmla.i32 q12, q8, d3[0] +0xa2,0x08,0xc3,0xf2 = vmlal.s8 q8, d19, d18 +0xa2,0x08,0xd3,0xf2 = vmlal.s16 q8, d19, d18 +0xa2,0x08,0xe3,0xf2 = vmlal.s32 q8, d19, d18 +0xa2,0x08,0xc3,0xf3 = vmlal.u8 q8, d19, d18 +0xa2,0x08,0xd3,0xf3 = vmlal.u16 q8, d19, d18 +0xa2,0x08,0xe3,0xf3 = vmlal.u32 q8, d19, d18 +0xa2,0x09,0xd3,0xf2 = vqdmlal.s16 q8, d19, d18 +0xa2,0x09,0xe3,0xf2 = vqdmlal.s32 q8, d19, d18 +0x47,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[0] +0x4f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[1] +0x67,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[2] +0x6f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[3] +0xa1,0x09,0x42,0xf3 = vmls.i8 d16, d18, d17 +0xa1,0x09,0x52,0xf3 = vmls.i16 d16, d18, d17 +0xa1,0x09,0x62,0xf3 = vmls.i32 d16, d18, d17 +0xb1,0x0d,0x62,0xf2 = vmls.f32 d16, d18, d17 +0xe4,0x29,0x40,0xf3 = vmls.i8 q9, q8, q10 +0xe4,0x29,0x50,0xf3 = vmls.i16 q9, q8, q10 +0xe4,0x29,0x60,0xf3 = vmls.i32 q9, q8, q10 +0xf4,0x2d,0x60,0xf2 = vmls.f32 q9, q8, q10 +0xe6,0x84,0x98,0xf3 = vmls.i16 q4, q12, d6[2] +0xa2,0x0a,0xc3,0xf2 = vmlsl.s8 q8, d19, d18 +0xa2,0x0a,0xd3,0xf2 = vmlsl.s16 q8, d19, d18 +0xa2,0x0a,0xe3,0xf2 = vmlsl.s32 q8, d19, d18 +0xa2,0x0a,0xc3,0xf3 = vmlsl.u8 q8, d19, d18 +0xa2,0x0a,0xd3,0xf3 = vmlsl.u16 q8, d19, d18 +0xa2,0x0a,0xe3,0xf3 = vmlsl.u32 q8, d19, d18 +0xa2,0x0b,0xd3,0xf2 = vqdmlsl.s16 q8, d19, d18 +0xa2,0x0b,0xe3,0xf2 = vqdmlsl.s32 q8, d19, d18 diff --git a/capstone/suite/MC/ARM/neon-mul-encoding.s.cs b/capstone/suite/MC/ARM/neon-mul-encoding.s.cs new file mode 100644 index 000000000..728888be4 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-mul-encoding.s.cs @@ -0,0 +1,72 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17 +0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17 +0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17 +0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17 +0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9 +0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9 +0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9 +0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9 +0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17 +0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9 +0x68,0x28,0xd8,0xf2 = vmul.i16 d18, d8, d0[3] +0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17 +0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17 +0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17 +0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17 +0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9 +0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9 +0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9 +0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9 +0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17 +0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9 +0xa1,0x0b,0x50,0xf2 = vqdmulh.s16 d16, d16, d17 +0xa1,0x0b,0x60,0xf2 = vqdmulh.s32 d16, d16, d17 +0xe2,0x0b,0x50,0xf2 = vqdmulh.s16 q8, q8, q9 +0xe2,0x0b,0x60,0xf2 = vqdmulh.s32 q8, q8, q9 +0xa1,0x0b,0x50,0xf2 = vqdmulh.s16 d16, d16, d17 +0xa1,0x0b,0x60,0xf2 = vqdmulh.s32 d16, d16, d17 +0xe2,0x0b,0x50,0xf2 = vqdmulh.s16 q8, q8, q9 +0xe2,0x0b,0x60,0xf2 = vqdmulh.s32 q8, q8, q9 +0x43,0xbc,0x92,0xf2 = vqdmulh.s16 d11, d2, d3[0] +0xa1,0x0b,0x50,0xf3 = vqrdmulh.s16 d16, d16, d17 +0xa1,0x0b,0x60,0xf3 = vqrdmulh.s32 d16, d16, d17 +0xe2,0x0b,0x50,0xf3 = vqrdmulh.s16 q8, q8, q9 +0xe2,0x0b,0x60,0xf3 = vqrdmulh.s32 q8, q8, q9 +0xa1,0x0c,0xc0,0xf2 = vmull.s8 q8, d16, d17 +0xa1,0x0c,0xd0,0xf2 = vmull.s16 q8, d16, d17 +0xa1,0x0c,0xe0,0xf2 = vmull.s32 q8, d16, d17 +0xa1,0x0c,0xc0,0xf3 = vmull.u8 q8, d16, d17 +0xa1,0x0c,0xd0,0xf3 = vmull.u16 q8, d16, d17 +0xa1,0x0c,0xe0,0xf3 = vmull.u32 q8, d16, d17 +0xa1,0x0e,0xc0,0xf2 = vmull.p8 q8, d16, d17 +0xa1,0x0d,0xd0,0xf2 = vqdmull.s16 q8, d16, d17 +0xa1,0x0d,0xe0,0xf2 = vqdmull.s32 q8, d16, d17 +0x64,0x08,0x90,0xf2 = vmul.i16 d0, d0, d4[2] +0x6f,0x18,0x91,0xf2 = vmul.i16 d1, d1, d7[3] +0x49,0x28,0x92,0xf2 = vmul.i16 d2, d2, d1[1] +0x42,0x38,0xa3,0xf2 = vmul.i32 d3, d3, d2[0] +0x63,0x48,0xa4,0xf2 = vmul.i32 d4, d4, d3[1] +0x44,0x58,0xa5,0xf2 = vmul.i32 d5, d5, d4[0] +0x65,0x69,0xa6,0xf2 = vmul.f32 d6, d6, d5[1] +0x64,0x08,0x90,0xf3 = vmul.i16 q0, q0, d4[2] +0x6f,0x28,0x92,0xf3 = vmul.i16 q1, q1, d7[3] +0x49,0x48,0x94,0xf3 = vmul.i16 q2, q2, d1[1] +0x42,0x68,0xa6,0xf3 = vmul.i32 q3, q3, d2[0] +0x63,0x88,0xa8,0xf3 = vmul.i32 q4, q4, d3[1] +0x44,0xa8,0xaa,0xf3 = vmul.i32 q5, q5, d4[0] +0x65,0xc9,0xac,0xf3 = vmul.f32 q6, q6, d5[1] +0x64,0x98,0x90,0xf2 = vmul.i16 d9, d0, d4[2] +0x6f,0x88,0x91,0xf2 = vmul.i16 d8, d1, d7[3] +0x49,0x78,0x92,0xf2 = vmul.i16 d7, d2, d1[1] +0x42,0x68,0xa3,0xf2 = vmul.i32 d6, d3, d2[0] +0x63,0x58,0xa4,0xf2 = vmul.i32 d5, d4, d3[1] +0x44,0x48,0xa5,0xf2 = vmul.i32 d4, d5, d4[0] +0x65,0x39,0xa6,0xf2 = vmul.f32 d3, d6, d5[1] +0x64,0x28,0xd0,0xf3 = vmul.i16 q9, q0, d4[2] +0x6f,0x08,0xd2,0xf3 = vmul.i16 q8, q1, d7[3] +0x49,0xe8,0x94,0xf3 = vmul.i16 q7, q2, d1[1] +0x42,0xc8,0xa6,0xf3 = vmul.i32 q6, q3, d2[0] +0x63,0xa8,0xa8,0xf3 = vmul.i32 q5, q4, d3[1] +0x44,0x88,0xaa,0xf3 = vmul.i32 q4, q5, d4[0] +0x65,0x69,0xac,0xf3 = vmul.f32 q3, q6, d5[1] diff --git a/capstone/suite/MC/ARM/neon-neg-encoding.s.cs b/capstone/suite/MC/ARM/neon-neg-encoding.s.cs new file mode 100644 index 000000000..d87147a41 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-neg-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa0,0x03,0xf1,0xf3 = vneg.s8 d16, d16 +0xa0,0x03,0xf5,0xf3 = vneg.s16 d16, d16 +0xa0,0x03,0xf9,0xf3 = vneg.s32 d16, d16 +0xa0,0x07,0xf9,0xf3 = vneg.f32 d16, d16 +0xe0,0x03,0xf1,0xf3 = vneg.s8 q8, q8 +0xe0,0x03,0xf5,0xf3 = vneg.s16 q8, q8 +0xe0,0x03,0xf9,0xf3 = vneg.s32 q8, q8 +0xe0,0x07,0xf9,0xf3 = vneg.f32 q8, q8 +0xa0,0x07,0xf0,0xf3 = vqneg.s8 d16, d16 +0xa0,0x07,0xf4,0xf3 = vqneg.s16 d16, d16 +0xa0,0x07,0xf8,0xf3 = vqneg.s32 d16, d16 +0xe0,0x07,0xf0,0xf3 = vqneg.s8 q8, q8 +0xe0,0x07,0xf4,0xf3 = vqneg.s16 q8, q8 +0xe0,0x07,0xf8,0xf3 = vqneg.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neon-pairwise-encoding.s.cs b/capstone/suite/MC/ARM/neon-pairwise-encoding.s.cs new file mode 100644 index 000000000..3183a57c6 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-pairwise-encoding.s.cs @@ -0,0 +1,47 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xb0,0x0b,0x41,0xf2 = vpadd.i8 d16, d17, d16 +0xb0,0x0b,0x51,0xf2 = vpadd.i16 d16, d17, d16 +0xb0,0x0b,0x61,0xf2 = vpadd.i32 d16, d17, d16 +0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17 +0xb0,0x1b,0x41,0xf2 = vpadd.i8 d17, d17, d16 +0xb0,0x1b,0x51,0xf2 = vpadd.i16 d17, d17, d16 +0xb0,0x1b,0x61,0xf2 = vpadd.i32 d17, d17, d16 +0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17 +0x20,0x02,0xf0,0xf3 = vpaddl.s8 d16, d16 +0x20,0x02,0xf4,0xf3 = vpaddl.s16 d16, d16 +0x20,0x02,0xf8,0xf3 = vpaddl.s32 d16, d16 +0xa0,0x02,0xf0,0xf3 = vpaddl.u8 d16, d16 +0xa0,0x02,0xf4,0xf3 = vpaddl.u16 d16, d16 +0xa0,0x02,0xf8,0xf3 = vpaddl.u32 d16, d16 +0x60,0x02,0xf0,0xf3 = vpaddl.s8 q8, q8 +0x60,0x02,0xf4,0xf3 = vpaddl.s16 q8, q8 +0x60,0x02,0xf8,0xf3 = vpaddl.s32 q8, q8 +0xe0,0x02,0xf0,0xf3 = vpaddl.u8 q8, q8 +0xe0,0x02,0xf4,0xf3 = vpaddl.u16 q8, q8 +0xe0,0x02,0xf8,0xf3 = vpaddl.u32 q8, q8 +0x21,0x06,0xf0,0xf3 = vpadal.s8 d16, d17 +0x21,0x06,0xf4,0xf3 = vpadal.s16 d16, d17 +0x21,0x06,0xf8,0xf3 = vpadal.s32 d16, d17 +0xa1,0x06,0xf0,0xf3 = vpadal.u8 d16, d17 +0xa1,0x06,0xf4,0xf3 = vpadal.u16 d16, d17 +0xa1,0x06,0xf8,0xf3 = vpadal.u32 d16, d17 +0x60,0x26,0xf0,0xf3 = vpadal.s8 q9, q8 +0x60,0x26,0xf4,0xf3 = vpadal.s16 q9, q8 +0x60,0x26,0xf8,0xf3 = vpadal.s32 q9, q8 +0xe0,0x26,0xf0,0xf3 = vpadal.u8 q9, q8 +0xe0,0x26,0xf4,0xf3 = vpadal.u16 q9, q8 +0xe0,0x26,0xf8,0xf3 = vpadal.u32 q9, q8 +0xb1,0x0a,0x40,0xf2 = vpmin.s8 d16, d16, d17 +0xb1,0x0a,0x50,0xf2 = vpmin.s16 d16, d16, d17 +0xb1,0x0a,0x60,0xf2 = vpmin.s32 d16, d16, d17 +0xb1,0x0a,0x40,0xf3 = vpmin.u8 d16, d16, d17 +0xb1,0x0a,0x50,0xf3 = vpmin.u16 d16, d16, d17 +0xb1,0x0a,0x60,0xf3 = vpmin.u32 d16, d16, d17 +0xa1,0x0f,0x60,0xf3 = vpmin.f32 d16, d16, d17 +0xa1,0x0a,0x40,0xf2 = vpmax.s8 d16, d16, d17 +0xa1,0x0a,0x50,0xf2 = vpmax.s16 d16, d16, d17 +0xa1,0x0a,0x60,0xf2 = vpmax.s32 d16, d16, d17 +0xa1,0x0a,0x40,0xf3 = vpmax.u8 d16, d16, d17 +0xa1,0x0a,0x50,0xf3 = vpmax.u16 d16, d16, d17 +0xa1,0x0a,0x60,0xf3 = vpmax.u32 d16, d16, d17 +0xa1,0x0f,0x40,0xf3 = vpmax.f32 d16, d16, d17 diff --git a/capstone/suite/MC/ARM/neon-reciprocal-encoding.s.cs b/capstone/suite/MC/ARM/neon-reciprocal-encoding.s.cs new file mode 100644 index 000000000..d2d8fff47 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-reciprocal-encoding.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x20,0x04,0xfb,0xf3 = vrecpe.u32 d16, d16 +0x60,0x04,0xfb,0xf3 = vrecpe.u32 q8, q8 +0x20,0x05,0xfb,0xf3 = vrecpe.f32 d16, d16 +0x60,0x05,0xfb,0xf3 = vrecpe.f32 q8, q8 +0xb1,0x0f,0x40,0xf2 = vrecps.f32 d16, d16, d17 +0xf2,0x0f,0x40,0xf2 = vrecps.f32 q8, q8, q9 +0xa0,0x04,0xfb,0xf3 = vrsqrte.u32 d16, d16 +0xe0,0x04,0xfb,0xf3 = vrsqrte.u32 q8, q8 +0xa0,0x05,0xfb,0xf3 = vrsqrte.f32 d16, d16 +0xe0,0x05,0xfb,0xf3 = vrsqrte.f32 q8, q8 +0xb1,0x0f,0x60,0xf2 = vrsqrts.f32 d16, d16, d17 +0xf2,0x0f,0x60,0xf2 = vrsqrts.f32 q8, q8, q9 diff --git a/capstone/suite/MC/ARM/neon-reverse-encoding.s.cs b/capstone/suite/MC/ARM/neon-reverse-encoding.s.cs new file mode 100644 index 000000000..b00547348 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-reverse-encoding.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x20,0x00,0xf0,0xf3 = vrev64.8 d16, d16 +0x20,0x00,0xf4,0xf3 = vrev64.16 d16, d16 +0x20,0x00,0xf8,0xf3 = vrev64.32 d16, d16 +0x60,0x00,0xf0,0xf3 = vrev64.8 q8, q8 +0x60,0x00,0xf4,0xf3 = vrev64.16 q8, q8 +0x60,0x00,0xf8,0xf3 = vrev64.32 q8, q8 +0xa0,0x00,0xf0,0xf3 = vrev32.8 d16, d16 +0xa0,0x00,0xf4,0xf3 = vrev32.16 d16, d16 +0xe0,0x00,0xf0,0xf3 = vrev32.8 q8, q8 +0xe0,0x00,0xf4,0xf3 = vrev32.16 q8, q8 +0x20,0x01,0xf0,0xf3 = vrev16.8 d16, d16 +0x60,0x01,0xf0,0xf3 = vrev16.8 q8, q8 diff --git a/capstone/suite/MC/ARM/neon-satshift-encoding.s.cs b/capstone/suite/MC/ARM/neon-satshift-encoding.s.cs new file mode 100644 index 000000000..2137e0ba5 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-satshift-encoding.s.cs @@ -0,0 +1,75 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xb0,0x04,0x41,0xf2 = vqshl.s8 d16, d16, d17 +0xb0,0x04,0x51,0xf2 = vqshl.s16 d16, d16, d17 +0xb0,0x04,0x61,0xf2 = vqshl.s32 d16, d16, d17 +0xb0,0x04,0x71,0xf2 = vqshl.s64 d16, d16, d17 +0xb0,0x04,0x41,0xf3 = vqshl.u8 d16, d16, d17 +0xb0,0x04,0x51,0xf3 = vqshl.u16 d16, d16, d17 +0xb0,0x04,0x61,0xf3 = vqshl.u32 d16, d16, d17 +0xb0,0x04,0x71,0xf3 = vqshl.u64 d16, d16, d17 +0xf0,0x04,0x42,0xf2 = vqshl.s8 q8, q8, q9 +0xf0,0x04,0x52,0xf2 = vqshl.s16 q8, q8, q9 +0xf0,0x04,0x62,0xf2 = vqshl.s32 q8, q8, q9 +0xf0,0x04,0x72,0xf2 = vqshl.s64 q8, q8, q9 +0xf0,0x04,0x42,0xf3 = vqshl.u8 q8, q8, q9 +0xf0,0x04,0x52,0xf3 = vqshl.u16 q8, q8, q9 +0xf0,0x04,0x62,0xf3 = vqshl.u32 q8, q8, q9 +0xf0,0x04,0x72,0xf3 = vqshl.u64 q8, q8, q9 +0x30,0x07,0xcf,0xf2 = vqshl.s8 d16, d16, #7 +0x30,0x07,0xdf,0xf2 = vqshl.s16 d16, d16, #15 +0x30,0x07,0xff,0xf2 = vqshl.s32 d16, d16, #31 +0xb0,0x07,0xff,0xf2 = vqshl.s64 d16, d16, #63 +0x30,0x07,0xcf,0xf3 = vqshl.u8 d16, d16, #7 +0x30,0x07,0xdf,0xf3 = vqshl.u16 d16, d16, #15 +0x30,0x07,0xff,0xf3 = vqshl.u32 d16, d16, #31 +0xb0,0x07,0xff,0xf3 = vqshl.u64 d16, d16, #63 +0x30,0x06,0xcf,0xf3 = vqshlu.s8 d16, d16, #7 +0x30,0x06,0xdf,0xf3 = vqshlu.s16 d16, d16, #15 +0x30,0x06,0xff,0xf3 = vqshlu.s32 d16, d16, #31 +0xb0,0x06,0xff,0xf3 = vqshlu.s64 d16, d16, #63 +0x70,0x07,0xcf,0xf2 = vqshl.s8 q8, q8, #7 +0x70,0x07,0xdf,0xf2 = vqshl.s16 q8, q8, #15 +0x70,0x07,0xff,0xf2 = vqshl.s32 q8, q8, #31 +0xf0,0x07,0xff,0xf2 = vqshl.s64 q8, q8, #63 +0x70,0x07,0xcf,0xf3 = vqshl.u8 q8, q8, #7 +0x70,0x07,0xdf,0xf3 = vqshl.u16 q8, q8, #15 +0x70,0x07,0xff,0xf3 = vqshl.u32 q8, q8, #31 +0xf0,0x07,0xff,0xf3 = vqshl.u64 q8, q8, #63 +0x70,0x06,0xcf,0xf3 = vqshlu.s8 q8, q8, #7 +0x70,0x06,0xdf,0xf3 = vqshlu.s16 q8, q8, #15 +0x70,0x06,0xff,0xf3 = vqshlu.s32 q8, q8, #31 +0xf0,0x06,0xff,0xf3 = vqshlu.s64 q8, q8, #63 +0xb0,0x05,0x41,0xf2 = vqrshl.s8 d16, d16, d17 +0xb0,0x05,0x51,0xf2 = vqrshl.s16 d16, d16, d17 +0xb0,0x05,0x61,0xf2 = vqrshl.s32 d16, d16, d17 +0xb0,0x05,0x71,0xf2 = vqrshl.s64 d16, d16, d17 +0xb0,0x05,0x41,0xf3 = vqrshl.u8 d16, d16, d17 +0xb0,0x05,0x51,0xf3 = vqrshl.u16 d16, d16, d17 +0xb0,0x05,0x61,0xf3 = vqrshl.u32 d16, d16, d17 +0xb0,0x05,0x71,0xf3 = vqrshl.u64 d16, d16, d17 +0xf0,0x05,0x42,0xf2 = vqrshl.s8 q8, q8, q9 +0xf0,0x05,0x52,0xf2 = vqrshl.s16 q8, q8, q9 +0xf0,0x05,0x62,0xf2 = vqrshl.s32 q8, q8, q9 +0xf0,0x05,0x72,0xf2 = vqrshl.s64 q8, q8, q9 +0xf0,0x05,0x42,0xf3 = vqrshl.u8 q8, q8, q9 +0xf0,0x05,0x52,0xf3 = vqrshl.u16 q8, q8, q9 +0xf0,0x05,0x62,0xf3 = vqrshl.u32 q8, q8, q9 +0xf0,0x05,0x72,0xf3 = vqrshl.u64 q8, q8, q9 +0x30,0x09,0xc8,0xf2 = vqshrn.s16 d16, q8, #8 +0x30,0x09,0xd0,0xf2 = vqshrn.s32 d16, q8, #16 +0x30,0x09,0xe0,0xf2 = vqshrn.s64 d16, q8, #32 +0x30,0x09,0xc8,0xf3 = vqshrn.u16 d16, q8, #8 +0x30,0x09,0xd0,0xf3 = vqshrn.u32 d16, q8, #16 +0x30,0x09,0xe0,0xf3 = vqshrn.u64 d16, q8, #32 +0x30,0x08,0xc8,0xf3 = vqshrun.s16 d16, q8, #8 +0x30,0x08,0xd0,0xf3 = vqshrun.s32 d16, q8, #16 +0x30,0x08,0xe0,0xf3 = vqshrun.s64 d16, q8, #32 +0x70,0x09,0xc8,0xf2 = vqrshrn.s16 d16, q8, #8 +0x70,0x09,0xd0,0xf2 = vqrshrn.s32 d16, q8, #16 +0x70,0x09,0xe0,0xf2 = vqrshrn.s64 d16, q8, #32 +0x70,0x09,0xc8,0xf3 = vqrshrn.u16 d16, q8, #8 +0x70,0x09,0xd0,0xf3 = vqrshrn.u32 d16, q8, #16 +0x70,0x09,0xe0,0xf3 = vqrshrn.u64 d16, q8, #32 +0x70,0x08,0xc8,0xf3 = vqrshrun.s16 d16, q8, #8 +0x70,0x08,0xd0,0xf3 = vqrshrun.s32 d16, q8, #16 +0x70,0x08,0xe0,0xf3 = vqrshrun.s64 d16, q8, #32 diff --git a/capstone/suite/MC/ARM/neon-shift-encoding.s.cs b/capstone/suite/MC/ARM/neon-shift-encoding.s.cs new file mode 100644 index 000000000..d4ca57b43 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-shift-encoding.s.cs @@ -0,0 +1,238 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa1,0x04,0x40,0xf3 = vshl.u8 d16, d17, d16 +0xa1,0x04,0x50,0xf3 = vshl.u16 d16, d17, d16 +0xa1,0x04,0x60,0xf3 = vshl.u32 d16, d17, d16 +0xa1,0x04,0x70,0xf3 = vshl.u64 d16, d17, d16 +0x30,0x05,0xcf,0xf2 = vshl.i8 d16, d16, #7 +0x30,0x05,0xdf,0xf2 = vshl.i16 d16, d16, #15 +0x30,0x05,0xff,0xf2 = vshl.i32 d16, d16, #31 +0xb0,0x05,0xff,0xf2 = vshl.i64 d16, d16, #63 +0xe2,0x04,0x40,0xf3 = vshl.u8 q8, q9, q8 +0xe2,0x04,0x50,0xf3 = vshl.u16 q8, q9, q8 +0xe2,0x04,0x60,0xf3 = vshl.u32 q8, q9, q8 +0xe2,0x04,0x70,0xf3 = vshl.u64 q8, q9, q8 +0x70,0x05,0xcf,0xf2 = vshl.i8 q8, q8, #7 +0x70,0x05,0xdf,0xf2 = vshl.i16 q8, q8, #15 +0x70,0x05,0xff,0xf2 = vshl.i32 q8, q8, #31 +0xf0,0x05,0xff,0xf2 = vshl.i64 q8, q8, #63 +0x30,0x00,0xc9,0xf3 = vshr.u8 d16, d16, #7 +0x30,0x00,0xd1,0xf3 = vshr.u16 d16, d16, #15 +0x30,0x00,0xe1,0xf3 = vshr.u32 d16, d16, #31 +0xb0,0x00,0xc1,0xf3 = vshr.u64 d16, d16, #63 +0x70,0x00,0xc9,0xf3 = vshr.u8 q8, q8, #7 +0x70,0x00,0xd1,0xf3 = vshr.u16 q8, q8, #15 +0x70,0x00,0xe1,0xf3 = vshr.u32 q8, q8, #31 +0xf0,0x00,0xc1,0xf3 = vshr.u64 q8, q8, #63 +0x30,0x00,0xc9,0xf2 = vshr.s8 d16, d16, #7 +0x30,0x00,0xd1,0xf2 = vshr.s16 d16, d16, #15 +0x30,0x00,0xe1,0xf2 = vshr.s32 d16, d16, #31 +0xb0,0x00,0xc1,0xf2 = vshr.s64 d16, d16, #63 +0x70,0x00,0xc9,0xf2 = vshr.s8 q8, q8, #7 +0x70,0x00,0xd1,0xf2 = vshr.s16 q8, q8, #15 +0x70,0x00,0xe1,0xf2 = vshr.s32 q8, q8, #31 +0xf0,0x00,0xc1,0xf2 = vshr.s64 q8, q8, #63 +0x30,0x00,0xc9,0xf3 = vshr.u8 d16, d16, #7 +0x30,0x00,0xd1,0xf3 = vshr.u16 d16, d16, #15 +0x30,0x00,0xe1,0xf3 = vshr.u32 d16, d16, #31 +0xb0,0x00,0xc1,0xf3 = vshr.u64 d16, d16, #63 +0x70,0x00,0xc9,0xf3 = vshr.u8 q8, q8, #7 +0x70,0x00,0xd1,0xf3 = vshr.u16 q8, q8, #15 +0x70,0x00,0xe1,0xf3 = vshr.u32 q8, q8, #31 +0xf0,0x00,0xc1,0xf3 = vshr.u64 q8, q8, #63 +0x30,0x00,0xc9,0xf2 = vshr.s8 d16, d16, #7 +0x30,0x00,0xd1,0xf2 = vshr.s16 d16, d16, #15 +0x30,0x00,0xe1,0xf2 = vshr.s32 d16, d16, #31 +0xb0,0x00,0xc1,0xf2 = vshr.s64 d16, d16, #63 +0x70,0x00,0xc9,0xf2 = vshr.s8 q8, q8, #7 +0x70,0x00,0xd1,0xf2 = vshr.s16 q8, q8, #15 +0x70,0x00,0xe1,0xf2 = vshr.s32 q8, q8, #31 +0xf0,0x00,0xc1,0xf2 = vshr.s64 q8, q8, #63 +0x16,0x01,0xc9,0xf2 = vsra.s8 d16, d6, #7 +0x32,0xa1,0xd1,0xf2 = vsra.s16 d26, d18, #15 +0x1a,0xb1,0xa1,0xf2 = vsra.s32 d11, d10, #31 +0xb3,0xc1,0x81,0xf2 = vsra.s64 d12, d19, #63 +0x70,0x21,0x89,0xf2 = vsra.s8 q1, q8, #7 +0x5e,0x41,0x91,0xf2 = vsra.s16 q2, q7, #15 +0x5c,0x61,0xa1,0xf2 = vsra.s32 q3, q6, #31 +0xda,0x81,0x81,0xf2 = vsra.s64 q4, q5, #63 +0x30,0x01,0xc9,0xf2 = vsra.s8 d16, d16, #7 +0x1f,0xf1,0x91,0xf2 = vsra.s16 d15, d15, #15 +0x1e,0xe1,0xa1,0xf2 = vsra.s32 d14, d14, #31 +0x9d,0xd1,0x81,0xf2 = vsra.s64 d13, d13, #63 +0x58,0x81,0x89,0xf2 = vsra.s8 q4, q4, #7 +0x5a,0xa1,0x91,0xf2 = vsra.s16 q5, q5, #15 +0x5c,0xc1,0xa1,0xf2 = vsra.s32 q6, q6, #31 +0xde,0xe1,0x81,0xf2 = vsra.s64 q7, q7, #63 +0x16,0x01,0xc9,0xf3 = vsra.u8 d16, d6, #7 +0x32,0xa1,0xd1,0xf3 = vsra.u16 d26, d18, #15 +0x1a,0xb1,0xa1,0xf3 = vsra.u32 d11, d10, #31 +0xb3,0xc1,0x81,0xf3 = vsra.u64 d12, d19, #63 +0x70,0x21,0x89,0xf3 = vsra.u8 q1, q8, #7 +0x5e,0x41,0x91,0xf3 = vsra.u16 q2, q7, #15 +0x5c,0x61,0xa1,0xf3 = vsra.u32 q3, q6, #31 +0xda,0x81,0x81,0xf3 = vsra.u64 q4, q5, #63 +0x30,0x01,0xc9,0xf3 = vsra.u8 d16, d16, #7 +0x1f,0xf1,0x91,0xf3 = vsra.u16 d15, d15, #15 +0x1e,0xe1,0xa1,0xf3 = vsra.u32 d14, d14, #31 +0x9d,0xd1,0x81,0xf3 = vsra.u64 d13, d13, #63 +0x58,0x81,0x89,0xf3 = vsra.u8 q4, q4, #7 +0x5a,0xa1,0x91,0xf3 = vsra.u16 q5, q5, #15 +0x5c,0xc1,0xa1,0xf3 = vsra.u32 q6, q6, #31 +0xde,0xe1,0x81,0xf3 = vsra.u64 q7, q7, #63 +0x16,0x04,0xc9,0xf3 = vsri.8 d16, d6, #7 +0x32,0xa4,0xd1,0xf3 = vsri.16 d26, d18, #15 +0x1a,0xb4,0xa1,0xf3 = vsri.32 d11, d10, #31 +0xb3,0xc4,0x81,0xf3 = vsri.64 d12, d19, #63 +0x70,0x24,0x89,0xf3 = vsri.8 q1, q8, #7 +0x5e,0x44,0x91,0xf3 = vsri.16 q2, q7, #15 +0x5c,0x64,0xa1,0xf3 = vsri.32 q3, q6, #31 +0xda,0x84,0x81,0xf3 = vsri.64 q4, q5, #63 +0x30,0x04,0xc9,0xf3 = vsri.8 d16, d16, #7 +0x1f,0xf4,0x91,0xf3 = vsri.16 d15, d15, #15 +0x1e,0xe4,0xa1,0xf3 = vsri.32 d14, d14, #31 +0x9d,0xd4,0x81,0xf3 = vsri.64 d13, d13, #63 +0x58,0x84,0x89,0xf3 = vsri.8 q4, q4, #7 +0x5a,0xa4,0x91,0xf3 = vsri.16 q5, q5, #15 +0x5c,0xc4,0xa1,0xf3 = vsri.32 q6, q6, #31 +0xde,0xe4,0x81,0xf3 = vsri.64 q7, q7, #63 +0x16,0x05,0xcf,0xf3 = vsli.8 d16, d6, #7 +0x32,0xa5,0xdf,0xf3 = vsli.16 d26, d18, #15 +0x1a,0xb5,0xbf,0xf3 = vsli.32 d11, d10, #31 +0xb3,0xc5,0xbf,0xf3 = vsli.64 d12, d19, #63 +0x70,0x25,0x8f,0xf3 = vsli.8 q1, q8, #7 +0x5e,0x45,0x9f,0xf3 = vsli.16 q2, q7, #15 +0x5c,0x65,0xbf,0xf3 = vsli.32 q3, q6, #31 +0xda,0x85,0xbf,0xf3 = vsli.64 q4, q5, #63 +0x30,0x05,0xcf,0xf3 = vsli.8 d16, d16, #7 +0x1f,0xf5,0x9f,0xf3 = vsli.16 d15, d15, #15 +0x1e,0xe5,0xbf,0xf3 = vsli.32 d14, d14, #31 +0x9d,0xd5,0xbf,0xf3 = vsli.64 d13, d13, #63 +0x58,0x85,0x8f,0xf3 = vsli.8 q4, q4, #7 +0x5a,0xa5,0x9f,0xf3 = vsli.16 q5, q5, #15 +0x5c,0xc5,0xbf,0xf3 = vsli.32 q6, q6, #31 +0xde,0xe5,0xbf,0xf3 = vsli.64 q7, q7, #63 +0x30,0x0a,0xcf,0xf2 = vshll.s8 q8, d16, #7 +0x30,0x0a,0xdf,0xf2 = vshll.s16 q8, d16, #15 +0x30,0x0a,0xff,0xf2 = vshll.s32 q8, d16, #31 +0x30,0x0a,0xcf,0xf3 = vshll.u8 q8, d16, #7 +0x30,0x0a,0xdf,0xf3 = vshll.u16 q8, d16, #15 +0x30,0x0a,0xff,0xf3 = vshll.u32 q8, d16, #31 +0x20,0x03,0xf2,0xf3 = vshll.i8 q8, d16, #8 +0x20,0x03,0xf6,0xf3 = vshll.i16 q8, d16, #16 +0x20,0x03,0xfa,0xf3 = vshll.i32 q8, d16, #32 +0x30,0x08,0xc8,0xf2 = vshrn.i16 d16, q8, #8 +0x30,0x08,0xd0,0xf2 = vshrn.i32 d16, q8, #16 +0x30,0x08,0xe0,0xf2 = vshrn.i64 d16, q8, #32 +0xa1,0x05,0x40,0xf2 = vrshl.s8 d16, d17, d16 +0xa1,0x05,0x50,0xf2 = vrshl.s16 d16, d17, d16 +0xa1,0x05,0x60,0xf2 = vrshl.s32 d16, d17, d16 +0xa1,0x05,0x70,0xf2 = vrshl.s64 d16, d17, d16 +0xa1,0x05,0x40,0xf3 = vrshl.u8 d16, d17, d16 +0xa1,0x05,0x50,0xf3 = vrshl.u16 d16, d17, d16 +0xa1,0x05,0x60,0xf3 = vrshl.u32 d16, d17, d16 +0xa1,0x05,0x70,0xf3 = vrshl.u64 d16, d17, d16 +0xe2,0x05,0x40,0xf2 = vrshl.s8 q8, q9, q8 +0xe2,0x05,0x50,0xf2 = vrshl.s16 q8, q9, q8 +0xe2,0x05,0x60,0xf2 = vrshl.s32 q8, q9, q8 +0xe2,0x05,0x70,0xf2 = vrshl.s64 q8, q9, q8 +0xe2,0x05,0x40,0xf3 = vrshl.u8 q8, q9, q8 +0xe2,0x05,0x50,0xf3 = vrshl.u16 q8, q9, q8 +0xe2,0x05,0x60,0xf3 = vrshl.u32 q8, q9, q8 +0xe2,0x05,0x70,0xf3 = vrshl.u64 q8, q9, q8 +0x30,0x02,0xc8,0xf2 = vrshr.s8 d16, d16, #8 +0x30,0x02,0xd0,0xf2 = vrshr.s16 d16, d16, #16 +0x30,0x02,0xe0,0xf2 = vrshr.s32 d16, d16, #32 +0xb0,0x02,0xc0,0xf2 = vrshr.s64 d16, d16, #64 +0x30,0x02,0xc8,0xf3 = vrshr.u8 d16, d16, #8 +0x30,0x02,0xd0,0xf3 = vrshr.u16 d16, d16, #16 +0x30,0x02,0xe0,0xf3 = vrshr.u32 d16, d16, #32 +0xb0,0x02,0xc0,0xf3 = vrshr.u64 d16, d16, #64 +0x70,0x02,0xc8,0xf2 = vrshr.s8 q8, q8, #8 +0x70,0x02,0xd0,0xf2 = vrshr.s16 q8, q8, #16 +0x70,0x02,0xe0,0xf2 = vrshr.s32 q8, q8, #32 +0xf0,0x02,0xc0,0xf2 = vrshr.s64 q8, q8, #64 +0x70,0x02,0xc8,0xf3 = vrshr.u8 q8, q8, #8 +0x70,0x02,0xd0,0xf3 = vrshr.u16 q8, q8, #16 +0x70,0x02,0xe0,0xf3 = vrshr.u32 q8, q8, #32 +0xf0,0x02,0xc0,0xf3 = vrshr.u64 q8, q8, #64 +0x70,0x08,0xc8,0xf2 = vrshrn.i16 d16, q8, #8 +0x70,0x08,0xd0,0xf2 = vrshrn.i32 d16, q8, #16 +0x70,0x08,0xe0,0xf2 = vrshrn.i64 d16, q8, #32 +0x70,0x09,0xcc,0xf2 = vqrshrn.s16 d16, q8, #4 +0x70,0x09,0xd3,0xf2 = vqrshrn.s32 d16, q8, #13 +0x70,0x09,0xf3,0xf2 = vqrshrn.s64 d16, q8, #13 +0x70,0x09,0xcc,0xf3 = vqrshrn.u16 d16, q8, #4 +0x70,0x09,0xd3,0xf3 = vqrshrn.u32 d16, q8, #13 +0x70,0x09,0xf3,0xf3 = vqrshrn.u64 d16, q8, #13 +0x48,0x84,0x0a,0xf2 = vshl.s8 q4, q4, q5 +0x48,0x84,0x1a,0xf2 = vshl.s16 q4, q4, q5 +0x48,0x84,0x2a,0xf2 = vshl.s32 q4, q4, q5 +0x48,0x84,0x3a,0xf2 = vshl.s64 q4, q4, q5 +0x48,0x84,0x0a,0xf3 = vshl.u8 q4, q4, q5 +0x48,0x84,0x1a,0xf3 = vshl.u16 q4, q4, q5 +0x48,0x84,0x2a,0xf3 = vshl.u32 q4, q4, q5 +0x48,0x84,0x3a,0xf3 = vshl.u64 q4, q4, q5 +0x04,0x44,0x05,0xf2 = vshl.s8 d4, d4, d5 +0x04,0x44,0x15,0xf2 = vshl.s16 d4, d4, d5 +0x04,0x44,0x25,0xf2 = vshl.s32 d4, d4, d5 +0x04,0x44,0x35,0xf2 = vshl.s64 d4, d4, d5 +0x04,0x44,0x05,0xf3 = vshl.u8 d4, d4, d5 +0x04,0x44,0x15,0xf3 = vshl.u16 d4, d4, d5 +0x04,0x44,0x25,0xf3 = vshl.u32 d4, d4, d5 +0x04,0x44,0x35,0xf3 = vshl.u64 d4, d4, d5 +0x58,0x85,0x8a,0xf2 = vshl.i8 q4, q4, #2 +0x58,0x85,0x9e,0xf2 = vshl.i16 q4, q4, #14 +0x58,0x85,0xbb,0xf2 = vshl.i32 q4, q4, #27 +0xd8,0x85,0xa3,0xf2 = vshl.i64 q4, q4, #35 +0x14,0x45,0x8e,0xf2 = vshl.i8 d4, d4, #6 +0x14,0x45,0x9a,0xf2 = vshl.i16 d4, d4, #10 +0x14,0x45,0xb1,0xf2 = vshl.i32 d4, d4, #17 +0x94,0x45,0xab,0xf2 = vshl.i64 d4, d4, #43 +0x0b,0xb5,0x04,0xf2 = vrshl.s8 d11, d11, d4 +0x0c,0xc5,0x15,0xf2 = vrshl.s16 d12, d12, d5 +0x0d,0xd5,0x26,0xf2 = vrshl.s32 d13, d13, d6 +0x0e,0xe5,0x37,0xf2 = vrshl.s64 d14, d14, d7 +0x0f,0xf5,0x08,0xf3 = vrshl.u8 d15, d15, d8 +0x20,0x05,0x59,0xf3 = vrshl.u16 d16, d16, d9 +0x21,0x15,0x6a,0xf3 = vrshl.u32 d17, d17, d10 +0x22,0x25,0x7b,0xf3 = vrshl.u64 d18, d18, d11 +0xc2,0x25,0x00,0xf2 = vrshl.s8 q1, q1, q8 +0xc4,0x45,0x1e,0xf2 = vrshl.s16 q2, q2, q15 +0xc6,0x65,0x2c,0xf2 = vrshl.s32 q3, q3, q14 +0xc8,0x85,0x3a,0xf2 = vrshl.s64 q4, q4, q13 +0xca,0xa5,0x08,0xf3 = vrshl.u8 q5, q5, q12 +0xcc,0xc5,0x16,0xf3 = vrshl.u16 q6, q6, q11 +0xce,0xe5,0x24,0xf3 = vrshl.u32 q7, q7, q10 +0xe0,0x05,0x72,0xf3 = vrshl.u64 q8, q8, q9 +0x1f,0xf0,0x88,0xf2 = vshr.s8 d15, d15, #8 +0x1c,0xc0,0x90,0xf2 = vshr.s16 d12, d12, #16 +0x1d,0xd0,0xa0,0xf2 = vshr.s32 d13, d13, #32 +0x9e,0xe0,0x80,0xf2 = vshr.s64 d14, d14, #64 +0x30,0x00,0xc8,0xf3 = vshr.u8 d16, d16, #8 +0x31,0x10,0xd0,0xf3 = vshr.u16 d17, d17, #16 +0x16,0x60,0xa0,0xf3 = vshr.u32 d6, d6, #32 +0x9a,0xa0,0x80,0xf3 = vshr.u64 d10, d10, #64 +0x52,0x20,0x88,0xf2 = vshr.s8 q1, q1, #8 +0x54,0x40,0x90,0xf2 = vshr.s16 q2, q2, #16 +0x56,0x60,0xa0,0xf2 = vshr.s32 q3, q3, #32 +0xd8,0x80,0x80,0xf2 = vshr.s64 q4, q4, #64 +0x5a,0xa0,0x88,0xf3 = vshr.u8 q5, q5, #8 +0x5c,0xc0,0x90,0xf3 = vshr.u16 q6, q6, #16 +0x5e,0xe0,0xa0,0xf3 = vshr.u32 q7, q7, #32 +0xf0,0x00,0xc0,0xf3 = vshr.u64 q8, q8, #64 +0x1f,0xf2,0x88,0xf2 = vrshr.s8 d15, d15, #8 +0x1c,0xc2,0x90,0xf2 = vrshr.s16 d12, d12, #16 +0x1d,0xd2,0xa0,0xf2 = vrshr.s32 d13, d13, #32 +0x9e,0xe2,0x80,0xf2 = vrshr.s64 d14, d14, #64 +0x30,0x02,0xc8,0xf3 = vrshr.u8 d16, d16, #8 +0x31,0x12,0xd0,0xf3 = vrshr.u16 d17, d17, #16 +0x16,0x62,0xa0,0xf3 = vrshr.u32 d6, d6, #32 +0x9a,0xa2,0x80,0xf3 = vrshr.u64 d10, d10, #64 +0x52,0x22,0x88,0xf2 = vrshr.s8 q1, q1, #8 +0x54,0x42,0x90,0xf2 = vrshr.s16 q2, q2, #16 +0x56,0x62,0xa0,0xf2 = vrshr.s32 q3, q3, #32 +0xd8,0x82,0x80,0xf2 = vrshr.s64 q4, q4, #64 +0x5a,0xa2,0x88,0xf3 = vrshr.u8 q5, q5, #8 +0x5c,0xc2,0x90,0xf3 = vrshr.u16 q6, q6, #16 +0x5e,0xe2,0xa0,0xf3 = vrshr.u32 q7, q7, #32 +0xf0,0x02,0xc0,0xf3 = vrshr.u64 q8, q8, #64 diff --git a/capstone/suite/MC/ARM/neon-shiftaccum-encoding.s.cs b/capstone/suite/MC/ARM/neon-shiftaccum-encoding.s.cs new file mode 100644 index 000000000..7ea28dafb --- /dev/null +++ b/capstone/suite/MC/ARM/neon-shiftaccum-encoding.s.cs @@ -0,0 +1,97 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x30,0x11,0xc8,0xf2 = vsra.s8 d17, d16, #8 +0x1e,0xf1,0x90,0xf2 = vsra.s16 d15, d14, #16 +0x1c,0xd1,0xa0,0xf2 = vsra.s32 d13, d12, #32 +0x9a,0xb1,0x80,0xf2 = vsra.s64 d11, d10, #64 +0x54,0xe1,0x88,0xf2 = vsra.s8 q7, q2, #8 +0x5c,0x61,0x90,0xf2 = vsra.s16 q3, q6, #16 +0x5a,0x21,0xe0,0xf2 = vsra.s32 q9, q5, #32 +0xd8,0x01,0xc0,0xf2 = vsra.s64 q8, q4, #64 +0x30,0x11,0xc8,0xf3 = vsra.u8 d17, d16, #8 +0x1e,0xb1,0x95,0xf3 = vsra.u16 d11, d14, #11 +0x1f,0xc1,0xaa,0xf3 = vsra.u32 d12, d15, #22 +0xb0,0xd1,0x8a,0xf3 = vsra.u64 d13, d16, #54 +0x5e,0x21,0x88,0xf3 = vsra.u8 q1, q7, #8 +0x5e,0x41,0x9a,0xf3 = vsra.u16 q2, q7, #6 +0x5c,0x61,0xab,0xf3 = vsra.u32 q3, q6, #21 +0xda,0x81,0xa7,0xf3 = vsra.u64 q4, q5, #25 +0x30,0x01,0xc8,0xf2 = vsra.s8 d16, d16, #8 +0x1e,0xe1,0x90,0xf2 = vsra.s16 d14, d14, #16 +0x1c,0xc1,0xa0,0xf2 = vsra.s32 d12, d12, #32 +0x9a,0xa1,0x80,0xf2 = vsra.s64 d10, d10, #64 +0x54,0x41,0x88,0xf2 = vsra.s8 q2, q2, #8 +0x5c,0xc1,0x90,0xf2 = vsra.s16 q6, q6, #16 +0x5a,0xa1,0xa0,0xf2 = vsra.s32 q5, q5, #32 +0xd8,0x81,0x80,0xf2 = vsra.s64 q4, q4, #64 +0x30,0x01,0xc8,0xf3 = vsra.u8 d16, d16, #8 +0x1e,0xe1,0x95,0xf3 = vsra.u16 d14, d14, #11 +0x1f,0xf1,0xaa,0xf3 = vsra.u32 d15, d15, #22 +0xb0,0x01,0xca,0xf3 = vsra.u64 d16, d16, #54 +0x5e,0xe1,0x88,0xf3 = vsra.u8 q7, q7, #8 +0x5e,0xe1,0x9a,0xf3 = vsra.u16 q7, q7, #6 +0x5c,0xc1,0xab,0xf3 = vsra.u32 q6, q6, #21 +0xda,0xa1,0xa7,0xf3 = vsra.u64 q5, q5, #25 +0x3a,0x53,0x88,0xf2 = vrsra.s8 d5, d26, #8 +0x39,0x63,0x90,0xf2 = vrsra.s16 d6, d25, #16 +0x38,0x73,0xa0,0xf2 = vrsra.s32 d7, d24, #32 +0xb7,0xe3,0x80,0xf2 = vrsra.s64 d14, d23, #64 +0x36,0xf3,0x88,0xf3 = vrsra.u8 d15, d22, #8 +0x35,0x03,0xd0,0xf3 = vrsra.u16 d16, d21, #16 +0x34,0x13,0xe0,0xf3 = vrsra.u32 d17, d20, #32 +0xb3,0x23,0xc0,0xf3 = vrsra.u64 d18, d19, #64 +0x54,0x23,0x88,0xf2 = vrsra.s8 q1, q2, #8 +0x56,0x43,0x90,0xf2 = vrsra.s16 q2, q3, #16 +0x58,0x63,0xa0,0xf2 = vrsra.s32 q3, q4, #32 +0xda,0x83,0x80,0xf2 = vrsra.s64 q4, q5, #64 +0x5c,0xa3,0x88,0xf3 = vrsra.u8 q5, q6, #8 +0x5e,0xc3,0x90,0xf3 = vrsra.u16 q6, q7, #16 +0x70,0xe3,0xa0,0xf3 = vrsra.u32 q7, q8, #32 +0xf2,0x03,0xc0,0xf3 = vrsra.u64 q8, q9, #64 +0x3a,0xa3,0xc8,0xf2 = vrsra.s8 d26, d26, #8 +0x39,0x93,0xd0,0xf2 = vrsra.s16 d25, d25, #16 +0x38,0x83,0xe0,0xf2 = vrsra.s32 d24, d24, #32 +0xb7,0x73,0xc0,0xf2 = vrsra.s64 d23, d23, #64 +0x36,0x63,0xc8,0xf3 = vrsra.u8 d22, d22, #8 +0x35,0x53,0xd0,0xf3 = vrsra.u16 d21, d21, #16 +0x34,0x43,0xe0,0xf3 = vrsra.u32 d20, d20, #32 +0xb3,0x33,0xc0,0xf3 = vrsra.u64 d19, d19, #64 +0x54,0x43,0x88,0xf2 = vrsra.s8 q2, q2, #8 +0x56,0x63,0x90,0xf2 = vrsra.s16 q3, q3, #16 +0x58,0x83,0xa0,0xf2 = vrsra.s32 q4, q4, #32 +0xda,0xa3,0x80,0xf2 = vrsra.s64 q5, q5, #64 +0x5c,0xc3,0x88,0xf3 = vrsra.u8 q6, q6, #8 +0x5e,0xe3,0x90,0xf3 = vrsra.u16 q7, q7, #16 +0x70,0x03,0xe0,0xf3 = vrsra.u32 q8, q8, #32 +0xf2,0x23,0xc0,0xf3 = vrsra.u64 q9, q9, #64 +0x1c,0xb5,0x8f,0xf3 = vsli.8 d11, d12, #7 +0x1d,0xc5,0x9f,0xf3 = vsli.16 d12, d13, #15 +0x1e,0xd5,0xbf,0xf3 = vsli.32 d13, d14, #31 +0x9f,0xe5,0xbf,0xf3 = vsli.64 d14, d15, #63 +0x70,0x25,0x8f,0xf3 = vsli.8 q1, q8, #7 +0x5e,0x45,0x9f,0xf3 = vsli.16 q2, q7, #15 +0x58,0x65,0xbf,0xf3 = vsli.32 q3, q4, #31 +0xda,0x85,0xbf,0xf3 = vsli.64 q4, q5, #63 +0x1b,0xc4,0xc8,0xf3 = vsri.8 d28, d11, #8 +0x1c,0xa4,0xd0,0xf3 = vsri.16 d26, d12, #16 +0x1d,0x84,0xe0,0xf3 = vsri.32 d24, d13, #32 +0x9e,0x54,0xc0,0xf3 = vsri.64 d21, d14, #64 +0x70,0x24,0x88,0xf3 = vsri.8 q1, q8, #8 +0x54,0xa4,0x90,0xf3 = vsri.16 q5, q2, #16 +0x58,0xe4,0xa0,0xf3 = vsri.32 q7, q4, #32 +0xdc,0x24,0xc0,0xf3 = vsri.64 q9, q6, #64 +0x1c,0xc5,0x8f,0xf3 = vsli.8 d12, d12, #7 +0x1d,0xd5,0x9f,0xf3 = vsli.16 d13, d13, #15 +0x1e,0xe5,0xbf,0xf3 = vsli.32 d14, d14, #31 +0x9f,0xf5,0xbf,0xf3 = vsli.64 d15, d15, #63 +0x70,0x05,0xcf,0xf3 = vsli.8 q8, q8, #7 +0x5e,0xe5,0x9f,0xf3 = vsli.16 q7, q7, #15 +0x58,0x85,0xbf,0xf3 = vsli.32 q4, q4, #31 +0xda,0xa5,0xbf,0xf3 = vsli.64 q5, q5, #63 +0x1b,0xb4,0x88,0xf3 = vsri.8 d11, d11, #8 +0x1c,0xc4,0x90,0xf3 = vsri.16 d12, d12, #16 +0x1d,0xd4,0xa0,0xf3 = vsri.32 d13, d13, #32 +0x9e,0xe4,0x80,0xf3 = vsri.64 d14, d14, #64 +0x70,0x04,0xc8,0xf3 = vsri.8 q8, q8, #8 +0x54,0x44,0x90,0xf3 = vsri.16 q2, q2, #16 +0x58,0x84,0xa0,0xf3 = vsri.32 q4, q4, #32 +0xdc,0xc4,0x80,0xf3 = vsri.64 q6, q6, #64 diff --git a/capstone/suite/MC/ARM/neon-shuffle-encoding.s.cs b/capstone/suite/MC/ARM/neon-shuffle-encoding.s.cs new file mode 100644 index 000000000..b82d67d79 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-shuffle-encoding.s.cs @@ -0,0 +1,59 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa0,0x03,0xf1,0xf2 = vext.8 d16, d17, d16, #3 +0xa0,0x05,0xf1,0xf2 = vext.8 d16, d17, d16, #5 +0xe0,0x03,0xf2,0xf2 = vext.8 q8, q9, q8, #3 +0xe0,0x07,0xf2,0xf2 = vext.8 q8, q9, q8, #7 +0xa0,0x06,0xf1,0xf2 = vext.16 d16, d17, d16, #3 +0xe0,0x0c,0xf2,0xf2 = vext.32 q8, q9, q8, #3 +0xe0,0x08,0xf2,0xf2 = vext.64 q8, q9, q8, #1 +0xa0,0x13,0xf1,0xf2 = vext.8 d17, d17, d16, #3 +0x0b,0x75,0xb7,0xf2 = vext.8 d7, d7, d11, #5 +0x60,0x63,0xb6,0xf2 = vext.8 q3, q3, q8, #3 +0xc8,0x27,0xf2,0xf2 = vext.8 q9, q9, q4, #7 +0x2a,0x16,0xb1,0xf2 = vext.16 d1, d1, d26, #3 +0x60,0xac,0xba,0xf2 = vext.32 q5, q5, q8, #3 +0x60,0xa8,0xba,0xf2 = vext.64 q5, q5, q8, #1 +0xa0,0x10,0xf2,0xf3 = vtrn.8 d17, d16 +0xa0,0x10,0xf6,0xf3 = vtrn.16 d17, d16 +0xa0,0x10,0xfa,0xf3 = vtrn.32 d17, d16 +0xe0,0x20,0xf2,0xf3 = vtrn.8 q9, q8 +0xe0,0x20,0xf6,0xf3 = vtrn.16 q9, q8 +0xe0,0x20,0xfa,0xf3 = vtrn.32 q9, q8 +0x20,0x11,0xf2,0xf3 = vuzp.8 d17, d16 +0x20,0x11,0xf6,0xf3 = vuzp.16 d17, d16 +0x60,0x21,0xf2,0xf3 = vuzp.8 q9, q8 +0x60,0x21,0xf6,0xf3 = vuzp.16 q9, q8 +0x60,0x21,0xfa,0xf3 = vuzp.32 q9, q8 +0xa0,0x11,0xf2,0xf3 = vzip.8 d17, d16 +0xa0,0x11,0xf6,0xf3 = vzip.16 d17, d16 +0xe0,0x21,0xf2,0xf3 = vzip.8 q9, q8 +0xe0,0x21,0xf6,0xf3 = vzip.16 q9, q8 +0xe0,0x21,0xfa,0xf3 = vzip.32 q9, q8 +0x83,0x20,0xba,0xf3 = vtrn.32 d2, d3 +0x83,0x20,0xba,0xf3 = vtrn.32 d2, d3 +0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 +0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 +0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 +0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9 +0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 +0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 +0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 +0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9 +0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 +0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 +0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 +0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 +0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9 +0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 +0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 +0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 +0xcc,0xc0,0xf2,0xf3 = vtrn.8 q14, q6 +0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 +0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 +0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 +0xcc,0xc0,0xf6,0xf3 = vtrn.16 q14, q6 +0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 +0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 +0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 +0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 +0xcc,0xc0,0xfa,0xf3 = vtrn.32 q14, q6 diff --git a/capstone/suite/MC/ARM/neon-sub-encoding.s.cs b/capstone/suite/MC/ARM/neon-sub-encoding.s.cs new file mode 100644 index 000000000..2d9a223cb --- /dev/null +++ b/capstone/suite/MC/ARM/neon-sub-encoding.s.cs @@ -0,0 +1,82 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa0,0x08,0x41,0xf3 = vsub.i8 d16, d17, d16 +0xa0,0x08,0x51,0xf3 = vsub.i16 d16, d17, d16 +0xa0,0x08,0x61,0xf3 = vsub.i32 d16, d17, d16 +0xa0,0x08,0x71,0xf3 = vsub.i64 d16, d17, d16 +0xa1,0x0d,0x60,0xf2 = vsub.f32 d16, d16, d17 +0xe2,0x08,0x40,0xf3 = vsub.i8 q8, q8, q9 +0xe2,0x08,0x50,0xf3 = vsub.i16 q8, q8, q9 +0xe2,0x08,0x60,0xf3 = vsub.i32 q8, q8, q9 +0xe2,0x08,0x70,0xf3 = vsub.i64 q8, q8, q9 +0xe2,0x0d,0x60,0xf2 = vsub.f32 q8, q8, q9 +0x25,0xd8,0x0d,0xf3 = vsub.i8 d13, d13, d21 +0x26,0xe8,0x1e,0xf3 = vsub.i16 d14, d14, d22 +0x27,0xf8,0x2f,0xf3 = vsub.i32 d15, d15, d23 +0xa8,0x08,0x70,0xf3 = vsub.i64 d16, d16, d24 +0xa9,0x1d,0x61,0xf2 = vsub.f32 d17, d17, d25 +0x64,0x28,0x02,0xf3 = vsub.i8 q1, q1, q10 +0x62,0x48,0x14,0xf3 = vsub.i16 q2, q2, q9 +0x60,0x68,0x26,0xf3 = vsub.i32 q3, q3, q8 +0x4e,0x88,0x38,0xf3 = vsub.i64 q4, q4, q7 +0x4c,0xad,0x2a,0xf2 = vsub.f32 q5, q5, q6 +0xa0,0x02,0xc1,0xf2 = vsubl.s8 q8, d17, d16 +0xa0,0x02,0xd1,0xf2 = vsubl.s16 q8, d17, d16 +0xa0,0x02,0xe1,0xf2 = vsubl.s32 q8, d17, d16 +0xa0,0x02,0xc1,0xf3 = vsubl.u8 q8, d17, d16 +0xa0,0x02,0xd1,0xf3 = vsubl.u16 q8, d17, d16 +0xa0,0x02,0xe1,0xf3 = vsubl.u32 q8, d17, d16 +0xa2,0x03,0xc0,0xf2 = vsubw.s8 q8, q8, d18 +0xa2,0x03,0xd0,0xf2 = vsubw.s16 q8, q8, d18 +0xa2,0x03,0xe0,0xf2 = vsubw.s32 q8, q8, d18 +0xa2,0x03,0xc0,0xf3 = vsubw.u8 q8, q8, d18 +0xa2,0x03,0xd0,0xf3 = vsubw.u16 q8, q8, d18 +0xa2,0x03,0xe0,0xf3 = vsubw.u32 q8, q8, d18 +0xa1,0x02,0x40,0xf2 = vhsub.s8 d16, d16, d17 +0xa1,0x02,0x50,0xf2 = vhsub.s16 d16, d16, d17 +0xa1,0x02,0x60,0xf2 = vhsub.s32 d16, d16, d17 +0xa1,0x02,0x40,0xf3 = vhsub.u8 d16, d16, d17 +0xa1,0x02,0x50,0xf3 = vhsub.u16 d16, d16, d17 +0xa1,0x02,0x60,0xf3 = vhsub.u32 d16, d16, d17 +0xe2,0x02,0x40,0xf2 = vhsub.s8 q8, q8, q9 +0xe2,0x02,0x50,0xf2 = vhsub.s16 q8, q8, q9 +0xe2,0x02,0x60,0xf2 = vhsub.s32 q8, q8, q9 +0xb1,0x02,0x40,0xf2 = vqsub.s8 d16, d16, d17 +0xb1,0x02,0x50,0xf2 = vqsub.s16 d16, d16, d17 +0xb1,0x02,0x60,0xf2 = vqsub.s32 d16, d16, d17 +0xb1,0x02,0x70,0xf2 = vqsub.s64 d16, d16, d17 +0xb1,0x02,0x40,0xf3 = vqsub.u8 d16, d16, d17 +0xb1,0x02,0x50,0xf3 = vqsub.u16 d16, d16, d17 +0xb1,0x02,0x60,0xf3 = vqsub.u32 d16, d16, d17 +0xb1,0x02,0x70,0xf3 = vqsub.u64 d16, d16, d17 +0xf2,0x02,0x40,0xf2 = vqsub.s8 q8, q8, q9 +0xf2,0x02,0x50,0xf2 = vqsub.s16 q8, q8, q9 +0xf2,0x02,0x60,0xf2 = vqsub.s32 q8, q8, q9 +0xf2,0x02,0x70,0xf2 = vqsub.s64 q8, q8, q9 +0xf2,0x02,0x40,0xf3 = vqsub.u8 q8, q8, q9 +0xf2,0x02,0x50,0xf3 = vqsub.u16 q8, q8, q9 +0xf2,0x02,0x60,0xf3 = vqsub.u32 q8, q8, q9 +0xf2,0x02,0x70,0xf3 = vqsub.u64 q8, q8, q9 +0xa2,0x06,0xc0,0xf2 = vsubhn.i16 d16, q8, q9 +0xa2,0x06,0xd0,0xf2 = vsubhn.i32 d16, q8, q9 +0xa2,0x06,0xe0,0xf2 = vsubhn.i64 d16, q8, q9 +0xa2,0x06,0xc0,0xf3 = vrsubhn.i16 d16, q8, q9 +0xa2,0x06,0xd0,0xf3 = vrsubhn.i32 d16, q8, q9 +0xa2,0x06,0xe0,0xf3 = vrsubhn.i64 d16, q8, q9 +0x28,0xb2,0x0b,0xf2 = vhsub.s8 d11, d11, d24 +0x27,0xc2,0x1c,0xf2 = vhsub.s16 d12, d12, d23 +0x26,0xd2,0x2d,0xf2 = vhsub.s32 d13, d13, d22 +0x25,0xe2,0x0e,0xf3 = vhsub.u8 d14, d14, d21 +0x24,0xf2,0x1f,0xf3 = vhsub.u16 d15, d15, d20 +0xa3,0x02,0x60,0xf3 = vhsub.u32 d16, d16, d19 +0x68,0x22,0x02,0xf2 = vhsub.s8 q1, q1, q12 +0x66,0x42,0x14,0xf2 = vhsub.s16 q2, q2, q11 +0x64,0x62,0x26,0xf2 = vhsub.s32 q3, q3, q10 +0x62,0x82,0x08,0xf3 = vhsub.u8 q4, q4, q9 +0x60,0xa2,0x1a,0xf3 = vhsub.u16 q5, q5, q8 +0x4e,0xc2,0x2c,0xf3 = vhsub.u32 q6, q6, q7 +0x05,0xc3,0x8c,0xf2 = vsubw.s8 q6, q6, d5 +0x01,0xe3,0x9e,0xf2 = vsubw.s16 q7, q7, d1 +0x82,0x03,0xe0,0xf2 = vsubw.s32 q8, q8, d2 +0x05,0xc3,0x8c,0xf3 = vsubw.u8 q6, q6, d5 +0x01,0xe3,0x9e,0xf3 = vsubw.u16 q7, q7, d1 +0x82,0x03,0xe0,0xf3 = vsubw.u32 q8, q8, d2 diff --git a/capstone/suite/MC/ARM/neon-table-encoding.s.cs b/capstone/suite/MC/ARM/neon-table-encoding.s.cs new file mode 100644 index 000000000..4b7d73d74 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-table-encoding.s.cs @@ -0,0 +1,9 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0xa0,0x08,0xf1,0xf3 = vtbl.8 d16, {d17}, d16 +0xa2,0x09,0xf0,0xf3 = vtbl.8 d16, {d16, d17}, d18 +0xa4,0x0a,0xf0,0xf3 = vtbl.8 d16, {d16, d17, d18}, d20 +0xa4,0x0b,0xf0,0xf3 = vtbl.8 d16, {d16, d17, d18, d19}, d20 +0xe1,0x28,0xf0,0xf3 = vtbx.8 d18, {d16}, d17 +0xe2,0x39,0xf0,0xf3 = vtbx.8 d19, {d16, d17}, d18 +0xe5,0x4a,0xf0,0xf3 = vtbx.8 d20, {d16, d17, d18}, d21 +0xe5,0x4b,0xf0,0xf3 = vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/capstone/suite/MC/ARM/neon-v8.s.cs b/capstone/suite/MC/ARM/neon-v8.s.cs new file mode 100644 index 000000000..a3447e0de --- /dev/null +++ b/capstone/suite/MC/ARM/neon-v8.s.cs @@ -0,0 +1,38 @@ +# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None +0x11,0x4f,0x05,0xf3 = vmaxnm.f32 d4, d5, d1 +0x5c,0x4f,0x08,0xf3 = vmaxnm.f32 q2, q4, q6 +0x3e,0x5f,0x24,0xf3 = vminnm.f32 d5, d4, d30 +0xd4,0x0f,0x2a,0xf3 = vminnm.f32 q0, q13, q2 +0x06,0x40,0xbb,0xf3 = vcvta.s32.f32 d4, d6 +0x8a,0xc0,0xbb,0xf3 = vcvta.u32.f32 d12, d10 +0x4c,0x80,0xbb,0xf3 = vcvta.s32.f32 q4, q6 +0xe4,0x80,0xbb,0xf3 = vcvta.u32.f32 q4, q10 +0x2e,0x13,0xbb,0xf3 = vcvtm.s32.f32 d1, d30 +0x8a,0xc3,0xbb,0xf3 = vcvtm.u32.f32 d12, d10 +0x64,0x23,0xbb,0xf3 = vcvtm.s32.f32 q1, q10 +0xc2,0xa3,0xfb,0xf3 = vcvtm.u32.f32 q13, q1 +0x21,0xf1,0xbb,0xf3 = vcvtn.s32.f32 d15, d17 +0x83,0x51,0xbb,0xf3 = vcvtn.u32.f32 d5, d3 +0x60,0x61,0xbb,0xf3 = vcvtn.s32.f32 q3, q8 +0xc6,0xa1,0xbb,0xf3 = vcvtn.u32.f32 q5, q3 +0x25,0xb2,0xbb,0xf3 = vcvtp.s32.f32 d11, d21 +0xa7,0xe2,0xbb,0xf3 = vcvtp.u32.f32 d14, d23 +0x6e,0x82,0xbb,0xf3 = vcvtp.s32.f32 q4, q15 +0xe0,0x22,0xfb,0xf3 = vcvtp.u32.f32 q9, q8 +0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0 +0x48,0x24,0xba,0xf3 = vrintn.f32 q1, q4 +0x8c,0x54,0xba,0xf3 = vrintx.f32 d5, d12 +0xc6,0x04,0xba,0xf3 = vrintx.f32 q0, q3 +0x00,0x35,0xba,0xf3 = vrinta.f32 d3, d0 +0x44,0x05,0xfa,0xf3 = vrinta.f32 q8, q2 +0xa2,0xc5,0xba,0xf3 = vrintz.f32 d12, d18 +0xc8,0x25,0xfa,0xf3 = vrintz.f32 q9, q4 +0x80,0x36,0xba,0xf3 = vrintm.f32 d3, d0 +0xc8,0x26,0xba,0xf3 = vrintm.f32 q1, q4 +0x80,0x37,0xba,0xf3 = vrintp.f32 d3, d0 +0xc8,0x27,0xba,0xf3 = vrintp.f32 q1, q4 +0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0 +0xc6,0x04,0xba,0xf3 = vrintx.f32 q0, q3 +0x00,0x35,0xba,0xf3 = vrinta.f32 d3, d0 +0xc8,0x25,0xfa,0xf3 = vrintz.f32 q9, q4 +0xc8,0x27,0xba,0xf3 = vrintp.f32 q1, q4 diff --git a/capstone/suite/MC/ARM/neon-vld-encoding.s.cs b/capstone/suite/MC/ARM/neon-vld-encoding.s.cs new file mode 100644 index 000000000..2fbb3903f --- /dev/null +++ b/capstone/suite/MC/ARM/neon-vld-encoding.s.cs @@ -0,0 +1,213 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x1f,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64] +0x4f,0x07,0x60,0xf4 = vld1.16 {d16}, [r0] +0x8f,0x07,0x60,0xf4 = vld1.32 {d16}, [r0] +0xcf,0x07,0x60,0xf4 = vld1.64 {d16}, [r0] +0x1f,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64] +0x6f,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128] +0x8f,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0] +0xcf,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0] +0x0f,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3] +0x5f,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64] +0x8f,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3] +0xdf,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64] +0x0f,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3] +0x5f,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64] +0x8f,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3] +0xdf,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64] +0x1d,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64]! +0x4d,0x07,0x60,0xf4 = vld1.16 {d16}, [r0]! +0x8d,0x07,0x60,0xf4 = vld1.32 {d16}, [r0]! +0xcd,0x07,0x60,0xf4 = vld1.64 {d16}, [r0]! +0x1d,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64]! +0x6d,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128]! +0x8d,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0]! +0xcd,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0]! +0x15,0x07,0x60,0xf4 = vld1.8 {d16}, [r0:64], r5 +0x45,0x07,0x60,0xf4 = vld1.16 {d16}, [r0], r5 +0x85,0x07,0x60,0xf4 = vld1.32 {d16}, [r0], r5 +0xc5,0x07,0x60,0xf4 = vld1.64 {d16}, [r0], r5 +0x15,0x0a,0x60,0xf4 = vld1.8 {d16, d17}, [r0:64], r5 +0x65,0x0a,0x60,0xf4 = vld1.16 {d16, d17}, [r0:128], r5 +0x85,0x0a,0x60,0xf4 = vld1.32 {d16, d17}, [r0], r5 +0xc5,0x0a,0x60,0xf4 = vld1.64 {d16, d17}, [r0], r5 +0x0d,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3]! +0x5d,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64]! +0x8d,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3]! +0xdd,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64]! +0x06,0x16,0x23,0xf4 = vld1.8 {d1, d2, d3}, [r3], r6 +0x56,0x46,0x23,0xf4 = vld1.16 {d4, d5, d6}, [r3:64], r6 +0x86,0x56,0x23,0xf4 = vld1.32 {d5, d6, d7}, [r3], r6 +0xd6,0x66,0x23,0xf4 = vld1.64 {d6, d7, d8}, [r3:64], r6 +0x0d,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3]! +0x5d,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64]! +0x8d,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3]! +0xdd,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64]! +0x08,0x12,0x23,0xf4 = vld1.8 {d1, d2, d3, d4}, [r3], r8 +0x58,0x42,0x23,0xf4 = vld1.16 {d4, d5, d6, d7}, [r3:64], r8 +0x88,0x52,0x23,0xf4 = vld1.32 {d5, d6, d7, d8}, [r3], r8 +0xd8,0x62,0x23,0xf4 = vld1.64 {d6, d7, d8, d9}, [r3:64], r8 +0x1f,0x08,0x60,0xf4 = vld2.8 {d16, d17}, [r0:64] +0x6f,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128] +0x8f,0x08,0x60,0xf4 = vld2.32 {d16, d17}, [r0] +0x1f,0x03,0x60,0xf4 = vld2.8 {d16, d17, d18, d19}, [r0:64] +0x6f,0x03,0x60,0xf4 = vld2.16 {d16, d17, d18, d19}, [r0:128] +0xbf,0x03,0x60,0xf4 = vld2.32 {d16, d17, d18, d19}, [r0:256] +0x1d,0x38,0x60,0xf4 = vld2.8 {d19, d20}, [r0:64]! +0x6d,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128]! +0x8d,0x48,0x60,0xf4 = vld2.32 {d20, d21}, [r0]! +0x1d,0x43,0x20,0xf4 = vld2.8 {d4, d5, d6, d7}, [r0:64]! +0x6d,0x13,0x20,0xf4 = vld2.16 {d1, d2, d3, d4}, [r0:128]! +0xbd,0xe3,0x20,0xf4 = vld2.32 {d14, d15, d16, d17}, [r0:256]! +0x16,0x38,0x60,0xf4 = vld2.8 {d19, d20}, [r0:64], r6 +0x66,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128], r6 +0x86,0x48,0x60,0xf4 = vld2.32 {d20, d21}, [r0], r6 +0x16,0x43,0x20,0xf4 = vld2.8 {d4, d5, d6, d7}, [r0:64], r6 +0x66,0x13,0x20,0xf4 = vld2.16 {d1, d2, d3, d4}, [r0:128], r6 +0xb6,0xe3,0x20,0xf4 = vld2.32 {d14, d15, d16, d17}, [r0:256], r6 +0x0f,0x04,0x61,0xf4 = vld3.8 {d16, d17, d18}, [r1] +0x4f,0x64,0x22,0xf4 = vld3.16 {d6, d7, d8}, [r2] +0x8f,0x14,0x23,0xf4 = vld3.32 {d1, d2, d3}, [r3] +0x1f,0x05,0x60,0xf4 = vld3.8 {d16, d18, d20}, [r0:64] +0x4f,0xb5,0x64,0xf4 = vld3.16 {d27, d29, d31}, [r4] +0x8f,0x65,0x25,0xf4 = vld3.32 {d6, d8, d10}, [r5] +0x01,0xc4,0x26,0xf4 = vld3.8 {d12, d13, d14}, [r6], r1 +0x42,0xb4,0x27,0xf4 = vld3.16 {d11, d12, d13}, [r7], r2 +0x83,0x24,0x28,0xf4 = vld3.32 {d2, d3, d4}, [r8], r3 +0x04,0x45,0x29,0xf4 = vld3.8 {d4, d6, d8}, [r9], r4 +0x44,0xe5,0x29,0xf4 = vld3.16 {d14, d16, d18}, [r9], r4 +0x85,0x05,0x6a,0xf4 = vld3.32 {d16, d18, d20}, [r10], r5 +0x0d,0x64,0x28,0xf4 = vld3.8 {d6, d7, d8}, [r8]! +0x4d,0x94,0x27,0xf4 = vld3.16 {d9, d10, d11}, [r7]! +0x8d,0x14,0x26,0xf4 = vld3.32 {d1, d2, d3}, [r6]! +0x1d,0x05,0x60,0xf4 = vld3.8 {d16, d18, d20}, [r0:64]! +0x4d,0x45,0x65,0xf4 = vld3.16 {d20, d22, d24}, [r5]! +0x8d,0x55,0x24,0xf4 = vld3.32 {d5, d7, d9}, [r4]! +0x1f,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64] +0x6f,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2:128] +0xbf,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:256] +0x3f,0x11,0x65,0xf4 = vld4.8 {d17, d19, d21, d23}, [r5:256] +0x4f,0x11,0x67,0xf4 = vld4.16 {d17, d19, d21, d23}, [r7] +0x8f,0x01,0x68,0xf4 = vld4.32 {d16, d18, d20, d22}, [r8] +0x1d,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64]! +0x6d,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2:128]! +0xbd,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:256]! +0x3d,0x11,0x65,0xf4 = vld4.8 {d17, d19, d21, d23}, [r5:256]! +0x4d,0x11,0x67,0xf4 = vld4.16 {d17, d19, d21, d23}, [r7]! +0x8d,0x01,0x68,0xf4 = vld4.32 {d16, d18, d20, d22}, [r8]! +0x18,0x00,0x61,0xf4 = vld4.8 {d16, d17, d18, d19}, [r1:64], r8 +0x47,0x00,0x62,0xf4 = vld4.16 {d16, d17, d18, d19}, [r2], r7 +0x95,0x00,0x63,0xf4 = vld4.32 {d16, d17, d18, d19}, [r3:64], r5 +0x32,0x01,0x64,0xf4 = vld4.8 {d16, d18, d20, d22}, [r4:256], r2 +0x43,0x01,0x66,0xf4 = vld4.16 {d16, d18, d20, d22}, [r6], r3 +0x84,0x11,0x69,0xf4 = vld4.32 {d17, d19, d21, d23}, [r9], r4 +0x0f,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1] +0x0d,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1]! +0x03,0x4c,0xa1,0xf4 = vld1.8 {d4[]}, [r1], r3 +0x2f,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1] +0x2d,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1]! +0x23,0x4c,0xa1,0xf4 = vld1.8 {d4[], d5[]}, [r1], r3 +0x6f,0x00,0xe0,0xf4 = vld1.8 {d16[3]}, [r0] +0x9f,0x04,0xe0,0xf4 = vld1.16 {d16[2]}, [r0:16] +0xbf,0x08,0xe0,0xf4 = vld1.32 {d16[1]}, [r0:32] +0xcd,0xc0,0xa2,0xf4 = vld1.8 {d12[6]}, [r2]! +0xc2,0xc0,0xa2,0xf4 = vld1.8 {d12[6]}, [r2], r2 +0xcd,0xc4,0xa2,0xf4 = vld1.16 {d12[3]}, [r2]! +0x82,0xc4,0xa2,0xf4 = vld1.16 {d12[2]}, [r2], r2 +0x3f,0x01,0xe0,0xf4 = vld2.8 {d16[1], d17[1]}, [r0:16] +0x5f,0x05,0xe0,0xf4 = vld2.16 {d16[1], d17[1]}, [r0:32] +0x8f,0x09,0xe0,0xf4 = vld2.32 {d16[1], d17[1]}, [r0] +0x6f,0x15,0xe0,0xf4 = vld2.16 {d17[1], d19[1]}, [r0] +0x5f,0x19,0xe0,0xf4 = vld2.32 {d17[0], d19[0]}, [r0:64] +0x5d,0x19,0xe0,0xf4 = vld2.32 {d17[0], d19[0]}, [r0:64]! +0x83,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2], r3 +0x8d,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2]! +0x8f,0x21,0xa2,0xf4 = vld2.8 {d2[4], d3[4]}, [r2] +0x8f,0x6d,0xe1,0xf4 = vld2.32 {d22[], d23[]}, [r1] +0xaf,0x6d,0xe1,0xf4 = vld2.32 {d22[], d24[]}, [r1] +0x8d,0xad,0xa3,0xf4 = vld2.32 {d10[], d11[]}, [r3]! +0xad,0xed,0xa4,0xf4 = vld2.32 {d14[], d16[]}, [r4]! +0x84,0x6d,0xe5,0xf4 = vld2.32 {d22[], d23[]}, [r5], r4 +0xa4,0x6d,0xe6,0xf4 = vld2.32 {d22[], d24[]}, [r6], r4 +0x2f,0x02,0xe1,0xf4 = vld3.8 {d16[1], d17[1], d18[1]}, [r1] +0x4f,0x66,0xa2,0xf4 = vld3.16 {d6[1], d7[1], d8[1]}, [r2] +0x8f,0x1a,0xa3,0xf4 = vld3.32 {d1[1], d2[1], d3[1]}, [r3] +0xaf,0xb6,0xe4,0xf4 = vld3.16 {d27[2], d29[2], d31[2]}, [r4] +0x4f,0x6a,0xa5,0xf4 = vld3.32 {d6[0], d8[0], d10[0]}, [r5] +0x61,0xc2,0xa6,0xf4 = vld3.8 {d12[3], d13[3], d14[3]}, [r6], r1 +0x82,0xb6,0xa7,0xf4 = vld3.16 {d11[2], d12[2], d13[2]}, [r7], r2 +0x83,0x2a,0xa8,0xf4 = vld3.32 {d2[1], d3[1], d4[1]}, [r8], r3 +0xa4,0xe6,0xa9,0xf4 = vld3.16 {d14[2], d16[2], d18[2]}, [r9], r4 +0x45,0x0a,0xea,0xf4 = vld3.32 {d16[0], d18[0], d20[0]}, [r10], r5 +0xcd,0x62,0xa8,0xf4 = vld3.8 {d6[6], d7[6], d8[6]}, [r8]! +0x8d,0x96,0xa7,0xf4 = vld3.16 {d9[2], d10[2], d11[2]}, [r7]! +0x8d,0x1a,0xa6,0xf4 = vld3.32 {d1[1], d2[1], d3[1]}, [r6]! +// 0xad,0x46,0xe5,0xf4 = vld3.16 {d20[2], d21[2], d22[2]}, [r5]! +0x4d,0x5a,0xa4,0xf4 = vld3.32 {d5[0], d7[0], d9[0]}, [r4]! +0x0f,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1] +0x4f,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2] +0x8f,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3] +0x2f,0x1e,0xe7,0xf4 = vld3.8 {d17[], d19[], d21[]}, [r7] +0x6f,0x1e,0xe7,0xf4 = vld3.16 {d17[], d19[], d21[]}, [r7] +0xaf,0x0e,0xe8,0xf4 = vld3.32 {d16[], d18[], d20[]}, [r8] +0x0d,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1]! +0x4d,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2]! +0x8d,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3]! +// 0x2d,0x1e,0xe7,0xf4 = vld3.8 {d17[], d18[], d19[]}, [r7]! +// 0x6d,0x1e,0xe7,0xf4 = vld3.16 {d17[], d18[], d19[]}, [r7]! +0xad,0x0e,0xe8,0xf4 = vld3.32 {d16[], d18[], d20[]}, [r8]! +0x08,0x0e,0xe1,0xf4 = vld3.8 {d16[], d17[], d18[]}, [r1], r8 +0x47,0x0e,0xe2,0xf4 = vld3.16 {d16[], d17[], d18[]}, [r2], r7 +0x85,0x0e,0xe3,0xf4 = vld3.32 {d16[], d17[], d18[]}, [r3], r5 +0x23,0x0e,0xe6,0xf4 = vld3.8 {d16[], d18[], d20[]}, [r6], r3 +0x63,0x0e,0xe6,0xf4 = vld3.16 {d16[], d18[], d20[]}, [r6], r3 +0xa4,0x1e,0xe9,0xf4 = vld3.32 {d17[], d19[], d21[]}, [r9], r4 +0x2f,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] +0x4f,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] +0x8f,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] +0x6f,0x17,0xe7,0xf4 = vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] +0xcf,0x0b,0xe8,0xf4 = vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] +0x3d,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32]! +0x5d,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! +0xad,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! +// 0x6d,0x17,0xe7,0xf4 = vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! +0xcd,0x0b,0xe8,0xf4 = vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! +0x38,0x03,0xe1,0xf4 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 +0x47,0x07,0xe2,0xf4 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 +0x95,0x0b,0xe3,0xf4 = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:64], r5 +0x63,0x07,0xe6,0xf4 = vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 +0xc4,0x1b,0xe9,0xf4 = vld4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 +0x0f,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1] +0x4f,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2] +0x8f,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3] +0x2f,0x1f,0xe7,0xf4 = vld4.8 {d17[], d19[], d21[], d23[]}, [r7] +0x6f,0x1f,0xe7,0xf4 = vld4.16 {d17[], d19[], d21[], d23[]}, [r7] +0xaf,0x0f,0xe8,0xf4 = vld4.32 {d16[], d18[], d20[], d22[]}, [r8] +0x0d,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1]! +0x4d,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2]! +0x8d,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3]! +// 0x2d,0x1f,0xe7,0xf4 = vld4.8 {d17[], d18[], d19[], d20[]}, [r7]! +// 0x6d,0x1f,0xe7,0xf4 = vld4.16 {d17[], d18[], d19[], d20[]}, [r7]! +0xad,0x0f,0xe8,0xf4 = vld4.32 {d16[], d18[], d20[], d22[]}, [r8]! +0x08,0x0f,0xe1,0xf4 = vld4.8 {d16[], d17[], d18[], d19[]}, [r1], r8 +0x47,0x0f,0xe2,0xf4 = vld4.16 {d16[], d17[], d18[], d19[]}, [r2], r7 +0x85,0x0f,0xe3,0xf4 = vld4.32 {d16[], d17[], d18[], d19[]}, [r3], r5 +0x23,0x0f,0xe6,0xf4 = vld4.8 {d16[], d18[], d20[], d22[]}, [r6], r3 +0x63,0x0f,0xe6,0xf4 = vld4.16 {d16[], d18[], d20[], d22[]}, [r6], r3 +0xa4,0x1f,0xe9,0xf4 = vld4.32 {d17[], d19[], d21[], d23[]}, [r9], r4 +0x0f,0x6a,0x29,0xf4 = vld1.8 {d6, d7}, [r9] +0x0f,0x62,0x29,0xf4 = vld1.8 {d6, d7, d8, d9}, [r9] +0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] +0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] +0x0f,0x27,0x22,0xf4 = vld1.8 {d2}, [r2] +0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] +0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] +0x0f,0x4a,0x22,0xf4 = vld1.8 {d4, d5}, [r2] +0x8f,0x4a,0x22,0xf4 = vld1.32 {d4, d5}, [r2] +0x0f,0x26,0x22,0xf4 = vld1.8 {d2, d3, d4}, [r2] +0x8f,0x26,0x22,0xf4 = vld1.32 {d2, d3, d4}, [r2] +0xcf,0x26,0x22,0xf4 = vld1.64 {d2, d3, d4}, [r2] +0xed,0x22,0x22,0xf4 = vld1.64 {d2, d3, d4, d5}, [r2:128]! +0xed,0x22,0x22,0xf4 = vld1.64 {d2, d3, d4, d5}, [r2:128]! +0x1f,0x08,0x60,0xf4 = vld2.8 {d16, d17}, [r0:64] +0x6f,0x08,0x60,0xf4 = vld2.16 {d16, d17}, [r0:128] diff --git a/capstone/suite/MC/ARM/neon-vst-encoding.s.cs b/capstone/suite/MC/ARM/neon-vst-encoding.s.cs new file mode 100644 index 000000000..09240adf8 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-vst-encoding.s.cs @@ -0,0 +1,120 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x1f,0x07,0x40,0xf4 = vst1.8 {d16}, [r0:64] +0x4f,0x07,0x40,0xf4 = vst1.16 {d16}, [r0] +0x8f,0x07,0x40,0xf4 = vst1.32 {d16}, [r0] +0xcf,0x07,0x40,0xf4 = vst1.64 {d16}, [r0] +0x1f,0x0a,0x40,0xf4 = vst1.8 {d16, d17}, [r0:64] +0x6f,0x0a,0x40,0xf4 = vst1.16 {d16, d17}, [r0:128] +0x8f,0x0a,0x40,0xf4 = vst1.32 {d16, d17}, [r0] +0xcf,0x0a,0x40,0xf4 = vst1.64 {d16, d17}, [r0] +0x1f,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64] +0x1d,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64]! +0x03,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0], r3 +0x1f,0x02,0x40,0xf4 = vst1.8 {d16, d17, d18, d19}, [r0:64] +0x5d,0x02,0x41,0xf4 = vst1.16 {d16, d17, d18, d19}, [r1:64]! +0xc2,0x02,0x43,0xf4 = vst1.64 {d16, d17, d18, d19}, [r3], r2 +0x1f,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64] +0x6f,0x08,0x40,0xf4 = vst2.16 {d16, d17}, [r0:128] +0x8f,0x08,0x40,0xf4 = vst2.32 {d16, d17}, [r0] +0x1f,0x03,0x40,0xf4 = vst2.8 {d16, d17, d18, d19}, [r0:64] +0x6f,0x03,0x40,0xf4 = vst2.16 {d16, d17, d18, d19}, [r0:128] +0xbf,0x03,0x40,0xf4 = vst2.32 {d16, d17, d18, d19}, [r0:256] +0x1d,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64]! +0x6d,0xe8,0x40,0xf4 = vst2.16 {d30, d31}, [r0:128]! +0x8d,0xe8,0x00,0xf4 = vst2.32 {d14, d15}, [r0]! +0x1d,0x03,0x40,0xf4 = vst2.8 {d16, d17, d18, d19}, [r0:64]! +0x6d,0x23,0x40,0xf4 = vst2.16 {d18, d19, d20, d21}, [r0:128]! +0xbd,0x83,0x00,0xf4 = vst2.32 {d8, d9, d10, d11}, [r0:256]! +0x0f,0x04,0x41,0xf4 = vst3.8 {d16, d17, d18}, [r1] +0x4f,0x64,0x02,0xf4 = vst3.16 {d6, d7, d8}, [r2] +0x8f,0x14,0x03,0xf4 = vst3.32 {d1, d2, d3}, [r3] +0x1f,0x05,0x40,0xf4 = vst3.8 {d16, d18, d20}, [r0:64] +0x4f,0xb5,0x44,0xf4 = vst3.16 {d27, d29, d31}, [r4] +0x8f,0x65,0x05,0xf4 = vst3.32 {d6, d8, d10}, [r5] +0x01,0xc4,0x06,0xf4 = vst3.8 {d12, d13, d14}, [r6], r1 +0x42,0xb4,0x07,0xf4 = vst3.16 {d11, d12, d13}, [r7], r2 +0x83,0x24,0x08,0xf4 = vst3.32 {d2, d3, d4}, [r8], r3 +0x04,0x45,0x09,0xf4 = vst3.8 {d4, d6, d8}, [r9], r4 +0x44,0xe5,0x09,0xf4 = vst3.16 {d14, d16, d18}, [r9], r4 +0x85,0x05,0x4a,0xf4 = vst3.32 {d16, d18, d20}, [r10], r5 +0x0d,0x64,0x08,0xf4 = vst3.8 {d6, d7, d8}, [r8]! +0x4d,0x94,0x07,0xf4 = vst3.16 {d9, d10, d11}, [r7]! +0x8d,0x14,0x06,0xf4 = vst3.32 {d1, d2, d3}, [r6]! +0x1d,0x05,0x40,0xf4 = vst3.8 {d16, d18, d20}, [r0:64]! +0x4d,0x45,0x45,0xf4 = vst3.16 {d20, d22, d24}, [r5]! +0x8d,0x55,0x04,0xf4 = vst3.32 {d5, d7, d9}, [r4]! +0x1f,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64] +0x6f,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2:128] +0xbf,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:256] +0x3f,0x11,0x45,0xf4 = vst4.8 {d17, d19, d21, d23}, [r5:256] +0x4f,0x11,0x47,0xf4 = vst4.16 {d17, d19, d21, d23}, [r7] +0x8f,0x01,0x48,0xf4 = vst4.32 {d16, d18, d20, d22}, [r8] +0x1d,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64]! +0x6d,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2:128]! +0xbd,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:256]! +0x3d,0x11,0x45,0xf4 = vst4.8 {d17, d19, d21, d23}, [r5:256]! +0x4d,0x11,0x47,0xf4 = vst4.16 {d17, d19, d21, d23}, [r7]! +0x8d,0x01,0x48,0xf4 = vst4.32 {d16, d18, d20, d22}, [r8]! +0x18,0x00,0x41,0xf4 = vst4.8 {d16, d17, d18, d19}, [r1:64], r8 +0x47,0x00,0x42,0xf4 = vst4.16 {d16, d17, d18, d19}, [r2], r7 +0x95,0x00,0x43,0xf4 = vst4.32 {d16, d17, d18, d19}, [r3:64], r5 +0x32,0x01,0x44,0xf4 = vst4.8 {d16, d18, d20, d22}, [r4:256], r2 +0x43,0x01,0x46,0xf4 = vst4.16 {d16, d18, d20, d22}, [r6], r3 +0x84,0x11,0x49,0xf4 = vst4.32 {d17, d19, d21, d23}, [r9], r4 +0x3f,0x01,0xc0,0xf4 = vst2.8 {d16[1], d17[1]}, [r0:16] +0x5f,0x05,0xc0,0xf4 = vst2.16 {d16[1], d17[1]}, [r0:32] +0x8f,0x09,0xc0,0xf4 = vst2.32 {d16[1], d17[1]}, [r0] +0x6f,0x15,0xc0,0xf4 = vst2.16 {d17[1], d19[1]}, [r0] +0x5f,0x19,0xc0,0xf4 = vst2.32 {d17[0], d19[0]}, [r0:64] +0x83,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2], r3 +0x8d,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2]! +0x8f,0x21,0x82,0xf4 = vst2.8 {d2[4], d3[4]}, [r2] +0x6f,0x15,0xc0,0xf4 = vst2.16 {d17[1], d19[1]}, [r0] +0x5f,0x19,0xc0,0xf4 = vst2.32 {d17[0], d19[0]}, [r0:64] +0x6d,0x75,0x81,0xf4 = vst2.16 {d7[1], d9[1]}, [r1]! +0x5d,0x69,0x82,0xf4 = vst2.32 {d6[0], d8[0]}, [r2:64]! +0x65,0x25,0x83,0xf4 = vst2.16 {d2[1], d4[1]}, [r3], r5 +0x57,0x59,0x84,0xf4 = vst2.32 {d5[0], d7[0]}, [r4:64], r7 +0x2f,0x02,0xc1,0xf4 = vst3.8 {d16[1], d17[1], d18[1]}, [r1] +0x4f,0x66,0x82,0xf4 = vst3.16 {d6[1], d7[1], d8[1]}, [r2] +0x8f,0x1a,0x83,0xf4 = vst3.32 {d1[1], d2[1], d3[1]}, [r3] +0x6f,0xb6,0xc4,0xf4 = vst3.16 {d27[1], d29[1], d31[1]}, [r4] +0xcf,0x6a,0x85,0xf4 = vst3.32 {d6[1], d8[1], d10[1]}, [r5] +0x21,0xc2,0x86,0xf4 = vst3.8 {d12[1], d13[1], d14[1]}, [r6], r1 +0x42,0xb6,0x87,0xf4 = vst3.16 {d11[1], d12[1], d13[1]}, [r7], r2 +0x83,0x2a,0x88,0xf4 = vst3.32 {d2[1], d3[1], d4[1]}, [r8], r3 +0x64,0xe6,0x89,0xf4 = vst3.16 {d14[1], d16[1], d18[1]}, [r9], r4 +0xc5,0x0a,0xca,0xf4 = vst3.32 {d16[1], d18[1], d20[1]}, [r10], r5 +0x2d,0x62,0x88,0xf4 = vst3.8 {d6[1], d7[1], d8[1]}, [r8]! +0x4d,0x96,0x87,0xf4 = vst3.16 {d9[1], d10[1], d11[1]}, [r7]! +0x8d,0x1a,0x86,0xf4 = vst3.32 {d1[1], d2[1], d3[1]}, [r6]! +// 0x6d,0x46,0xc5,0xf4 = vst3.16 {d20[1], d21[1], d22[1]}, [r5]! +0xcd,0x5a,0x84,0xf4 = vst3.32 {d5[1], d7[1], d9[1]}, [r4]! +0x2f,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] +0x4f,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] +0x8f,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] +0x6f,0x17,0xc7,0xf4 = vst4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] +0xcf,0x0b,0xc8,0xf4 = vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] +0x3d,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32]! +0x5d,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! +0xad,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! +// 0x6d,0x17,0xc7,0xf4 = vst4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! +0xcd,0x0b,0xc8,0xf4 = vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! +0x38,0x03,0xc1,0xf4 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 +0x47,0x07,0xc2,0xf4 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 +0x95,0x0b,0xc3,0xf4 = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:64], r5 +0x63,0x07,0xc6,0xf4 = vst4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 +0xc4,0x1b,0xc9,0xf4 = vst4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 +0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] +0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] +0x0f,0x27,0x02,0xf4 = vst1.8 {d2}, [r2] +0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] +0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] +0x0f,0x4a,0x02,0xf4 = vst1.8 {d4, d5}, [r2] +0x8f,0x4a,0x02,0xf4 = vst1.32 {d4, d5}, [r2] +0x0f,0x89,0x04,0xf4 = vst2.8 {d8, d10}, [r4] +0xbf,0x98,0x83,0xf4 = vst1.32 {d9[1]}, [r3:32] +0xbd,0xb8,0xc9,0xf4 = vst1.32 {d27[1]}, [r9:32]! +0xb5,0xb8,0xc3,0xf4 = vst1.32 {d27[1]}, [r3:32], r5 +0x1f,0x08,0x40,0xf4 = vst2.8 {d16, d17}, [r0:64] +0x6f,0x08,0x40,0xf4 = vst2.16 {d16, d17}, [r0:128] diff --git a/capstone/suite/MC/ARM/neon-vswp.s.cs b/capstone/suite/MC/ARM/neon-vswp.s.cs new file mode 100644 index 000000000..bf5ea6cf6 --- /dev/null +++ b/capstone/suite/MC/ARM/neon-vswp.s.cs @@ -0,0 +1,3 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x02,0x10,0xb2,0xf3 = vswp d1, d2 +0x44,0x20,0xb2,0xf3 = vswp q1, q2 diff --git a/capstone/suite/MC/ARM/neont2-abs-encoding.s.cs b/capstone/suite/MC/ARM/neont2-abs-encoding.s.cs new file mode 100644 index 000000000..fc2386aa5 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-abs-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf1,0xff,0x20,0x03 = vabs.s8 d16, d16 +0xf5,0xff,0x20,0x03 = vabs.s16 d16, d16 +0xf9,0xff,0x20,0x03 = vabs.s32 d16, d16 +0xf9,0xff,0x20,0x07 = vabs.f32 d16, d16 +0xf1,0xff,0x60,0x03 = vabs.s8 q8, q8 +0xf5,0xff,0x60,0x03 = vabs.s16 q8, q8 +0xf9,0xff,0x60,0x03 = vabs.s32 q8, q8 +0xf9,0xff,0x60,0x07 = vabs.f32 q8, q8 +0xf0,0xff,0x20,0x07 = vqabs.s8 d16, d16 +0xf4,0xff,0x20,0x07 = vqabs.s16 d16, d16 +0xf8,0xff,0x20,0x07 = vqabs.s32 d16, d16 +0xf0,0xff,0x60,0x07 = vqabs.s8 q8, q8 +0xf4,0xff,0x60,0x07 = vqabs.s16 q8, q8 +0xf8,0xff,0x60,0x07 = vqabs.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neont2-absdiff-encoding.s.cs b/capstone/suite/MC/ARM/neont2-absdiff-encoding.s.cs new file mode 100644 index 000000000..e1efa7735 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-absdiff-encoding.s.cs @@ -0,0 +1,39 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x40,0xef,0xa1,0x07 = vabd.s8 d16, d16, d17 +0x50,0xef,0xa1,0x07 = vabd.s16 d16, d16, d17 +0x60,0xef,0xa1,0x07 = vabd.s32 d16, d16, d17 +0x40,0xff,0xa1,0x07 = vabd.u8 d16, d16, d17 +0x50,0xff,0xa1,0x07 = vabd.u16 d16, d16, d17 +0x60,0xff,0xa1,0x07 = vabd.u32 d16, d16, d17 +0x60,0xff,0xa1,0x0d = vabd.f32 d16, d16, d17 +0x40,0xef,0xe2,0x07 = vabd.s8 q8, q8, q9 +0x50,0xef,0xe2,0x07 = vabd.s16 q8, q8, q9 +0x60,0xef,0xe2,0x07 = vabd.s32 q8, q8, q9 +0x40,0xff,0xe2,0x07 = vabd.u8 q8, q8, q9 +0x50,0xff,0xe2,0x07 = vabd.u16 q8, q8, q9 +0x60,0xff,0xe2,0x07 = vabd.u32 q8, q8, q9 +0x60,0xff,0xe2,0x0d = vabd.f32 q8, q8, q9 +0xc0,0xef,0xa1,0x07 = vabdl.s8 q8, d16, d17 +0xd0,0xef,0xa1,0x07 = vabdl.s16 q8, d16, d17 +0xe0,0xef,0xa1,0x07 = vabdl.s32 q8, d16, d17 +0xc0,0xff,0xa1,0x07 = vabdl.u8 q8, d16, d17 +0xd0,0xff,0xa1,0x07 = vabdl.u16 q8, d16, d17 +0xe0,0xff,0xa1,0x07 = vabdl.u32 q8, d16, d17 +0x42,0xef,0xb1,0x07 = vaba.s8 d16, d18, d17 +0x52,0xef,0xb1,0x07 = vaba.s16 d16, d18, d17 +0x62,0xef,0xb1,0x07 = vaba.s32 d16, d18, d17 +0x42,0xff,0xb1,0x07 = vaba.u8 d16, d18, d17 +0x52,0xff,0xb1,0x07 = vaba.u16 d16, d18, d17 +0x62,0xff,0xb1,0x07 = vaba.u32 d16, d18, d17 +0x40,0xef,0xf4,0x27 = vaba.s8 q9, q8, q10 +0x50,0xef,0xf4,0x27 = vaba.s16 q9, q8, q10 +0x60,0xef,0xf4,0x27 = vaba.s32 q9, q8, q10 +0x40,0xff,0xf4,0x27 = vaba.u8 q9, q8, q10 +0x50,0xff,0xf4,0x27 = vaba.u16 q9, q8, q10 +0x60,0xff,0xf4,0x27 = vaba.u32 q9, q8, q10 +0xc3,0xef,0xa2,0x05 = vabal.s8 q8, d19, d18 +0xd3,0xef,0xa2,0x05 = vabal.s16 q8, d19, d18 +0xe3,0xef,0xa2,0x05 = vabal.s32 q8, d19, d18 +0xc3,0xff,0xa2,0x05 = vabal.u8 q8, d19, d18 +0xd3,0xff,0xa2,0x05 = vabal.u16 q8, d19, d18 +0xe3,0xff,0xa2,0x05 = vabal.u32 q8, d19, d18 diff --git a/capstone/suite/MC/ARM/neont2-add-encoding.s.cs b/capstone/suite/MC/ARM/neont2-add-encoding.s.cs new file mode 100644 index 000000000..3a67385d6 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-add-encoding.s.cs @@ -0,0 +1,65 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x41,0xef,0xa0,0x08 = vadd.i8 d16, d17, d16 +0x51,0xef,0xa0,0x08 = vadd.i16 d16, d17, d16 +0x71,0xef,0xa0,0x08 = vadd.i64 d16, d17, d16 +0x61,0xef,0xa0,0x08 = vadd.i32 d16, d17, d16 +0x40,0xef,0xa1,0x0d = vadd.f32 d16, d16, d17 +0x40,0xef,0xe2,0x0d = vadd.f32 q8, q8, q9 +0xc1,0xef,0xa0,0x00 = vaddl.s8 q8, d17, d16 +0xd1,0xef,0xa0,0x00 = vaddl.s16 q8, d17, d16 +0xe1,0xef,0xa0,0x00 = vaddl.s32 q8, d17, d16 +0xc1,0xff,0xa0,0x00 = vaddl.u8 q8, d17, d16 +0xd1,0xff,0xa0,0x00 = vaddl.u16 q8, d17, d16 +0xe1,0xff,0xa0,0x00 = vaddl.u32 q8, d17, d16 +0xc0,0xef,0xa2,0x01 = vaddw.s8 q8, q8, d18 +0xd0,0xef,0xa2,0x01 = vaddw.s16 q8, q8, d18 +0xe0,0xef,0xa2,0x01 = vaddw.s32 q8, q8, d18 +0xc0,0xff,0xa2,0x01 = vaddw.u8 q8, q8, d18 +0xd0,0xff,0xa2,0x01 = vaddw.u16 q8, q8, d18 +0xe0,0xff,0xa2,0x01 = vaddw.u32 q8, q8, d18 +0x40,0xef,0xa1,0x00 = vhadd.s8 d16, d16, d17 +0x50,0xef,0xa1,0x00 = vhadd.s16 d16, d16, d17 +0x60,0xef,0xa1,0x00 = vhadd.s32 d16, d16, d17 +0x40,0xff,0xa1,0x00 = vhadd.u8 d16, d16, d17 +0x50,0xff,0xa1,0x00 = vhadd.u16 d16, d16, d17 +0x60,0xff,0xa1,0x00 = vhadd.u32 d16, d16, d17 +0x40,0xef,0xe2,0x00 = vhadd.s8 q8, q8, q9 +0x50,0xef,0xe2,0x00 = vhadd.s16 q8, q8, q9 +0x60,0xef,0xe2,0x00 = vhadd.s32 q8, q8, q9 +0x40,0xff,0xe2,0x00 = vhadd.u8 q8, q8, q9 +0x50,0xff,0xe2,0x00 = vhadd.u16 q8, q8, q9 +0x60,0xff,0xe2,0x00 = vhadd.u32 q8, q8, q9 +0x40,0xef,0xa1,0x01 = vrhadd.s8 d16, d16, d17 +0x50,0xef,0xa1,0x01 = vrhadd.s16 d16, d16, d17 +0x60,0xef,0xa1,0x01 = vrhadd.s32 d16, d16, d17 +0x40,0xff,0xa1,0x01 = vrhadd.u8 d16, d16, d17 +0x50,0xff,0xa1,0x01 = vrhadd.u16 d16, d16, d17 +0x60,0xff,0xa1,0x01 = vrhadd.u32 d16, d16, d17 +0x40,0xef,0xe2,0x01 = vrhadd.s8 q8, q8, q9 +0x50,0xef,0xe2,0x01 = vrhadd.s16 q8, q8, q9 +0x60,0xef,0xe2,0x01 = vrhadd.s32 q8, q8, q9 +0x40,0xff,0xe2,0x01 = vrhadd.u8 q8, q8, q9 +0x50,0xff,0xe2,0x01 = vrhadd.u16 q8, q8, q9 +0x60,0xff,0xe2,0x01 = vrhadd.u32 q8, q8, q9 +0x40,0xef,0xb1,0x00 = vqadd.s8 d16, d16, d17 +0x50,0xef,0xb1,0x00 = vqadd.s16 d16, d16, d17 +0x60,0xef,0xb1,0x00 = vqadd.s32 d16, d16, d17 +0x70,0xef,0xb1,0x00 = vqadd.s64 d16, d16, d17 +0x40,0xff,0xb1,0x00 = vqadd.u8 d16, d16, d17 +0x50,0xff,0xb1,0x00 = vqadd.u16 d16, d16, d17 +0x60,0xff,0xb1,0x00 = vqadd.u32 d16, d16, d17 +0x70,0xff,0xb1,0x00 = vqadd.u64 d16, d16, d17 +0x40,0xef,0xf2,0x00 = vqadd.s8 q8, q8, q9 +0x50,0xef,0xf2,0x00 = vqadd.s16 q8, q8, q9 +0x60,0xef,0xf2,0x00 = vqadd.s32 q8, q8, q9 +0x70,0xef,0xf2,0x00 = vqadd.s64 q8, q8, q9 +0x40,0xff,0xf2,0x00 = vqadd.u8 q8, q8, q9 +0x50,0xff,0xf2,0x00 = vqadd.u16 q8, q8, q9 +0x60,0xff,0xf2,0x00 = vqadd.u32 q8, q8, q9 +0x70,0xff,0xf2,0x00 = vqadd.u64 q8, q8, q9 +0xc0,0xef,0xa2,0x04 = vaddhn.i16 d16, q8, q9 +0xd0,0xef,0xa2,0x04 = vaddhn.i32 d16, q8, q9 +0xe0,0xef,0xa2,0x04 = vaddhn.i64 d16, q8, q9 +0xc0,0xff,0xa2,0x04 = vraddhn.i16 d16, q8, q9 +0xd0,0xff,0xa2,0x04 = vraddhn.i32 d16, q8, q9 +0xe0,0xff,0xa2,0x04 = vraddhn.i64 d16, q8, q9 diff --git a/capstone/suite/MC/ARM/neont2-bitcount-encoding.s.cs b/capstone/suite/MC/ARM/neont2-bitcount-encoding.s.cs new file mode 100644 index 000000000..6f6714d5e --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-bitcount-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf0,0xff,0x20,0x05 = vcnt.8 d16, d16 +0xf0,0xff,0x60,0x05 = vcnt.8 q8, q8 +0xf0,0xff,0xa0,0x04 = vclz.i8 d16, d16 +0xf4,0xff,0xa0,0x04 = vclz.i16 d16, d16 +0xf8,0xff,0xa0,0x04 = vclz.i32 d16, d16 +0xf0,0xff,0xe0,0x04 = vclz.i8 q8, q8 +0xf4,0xff,0xe0,0x04 = vclz.i16 q8, q8 +0xf8,0xff,0xe0,0x04 = vclz.i32 q8, q8 +0xf0,0xff,0x20,0x04 = vcls.s8 d16, d16 +0xf4,0xff,0x20,0x04 = vcls.s16 d16, d16 +0xf8,0xff,0x20,0x04 = vcls.s32 d16, d16 +0xf0,0xff,0x60,0x04 = vcls.s8 q8, q8 +0xf4,0xff,0x60,0x04 = vcls.s16 q8, q8 +0xf8,0xff,0x60,0x04 = vcls.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neont2-bitwise-encoding.s.cs b/capstone/suite/MC/ARM/neont2-bitwise-encoding.s.cs new file mode 100644 index 000000000..9d2d8983b --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-bitwise-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x41,0xef,0xb0,0x01 = vand d16, d17, d16 +0x40,0xef,0xf2,0x01 = vand q8, q8, q9 +0x41,0xff,0xb0,0x01 = veor d16, d17, d16 +0x40,0xff,0xf2,0x01 = veor q8, q8, q9 +0x61,0xef,0xb0,0x01 = vorr d16, d17, d16 +0x60,0xef,0xf2,0x01 = vorr q8, q8, q9 +0x51,0xef,0xb0,0x01 = vbic d16, d17, d16 +0x50,0xef,0xf2,0x01 = vbic q8, q8, q9 +0x71,0xef,0xb0,0x01 = vorn d16, d17, d16 +0x70,0xef,0xf2,0x01 = vorn q8, q8, q9 +0xf0,0xff,0xa0,0x05 = vmvn d16, d16 +0xf0,0xff,0xe0,0x05 = vmvn q8, q8 +0x51,0xff,0xb0,0x21 = vbsl d18, d17, d16 +0x54,0xff,0xf2,0x01 = vbsl q8, q10, q9 diff --git a/capstone/suite/MC/ARM/neont2-cmp-encoding.s.cs b/capstone/suite/MC/ARM/neont2-cmp-encoding.s.cs new file mode 100644 index 000000000..6bd4971b3 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-cmp-encoding.s.cs @@ -0,0 +1,17 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xfb,0xff,0x20,0x07 = vcvt.s32.f32 d16, d16 +0xfb,0xff,0xa0,0x07 = vcvt.u32.f32 d16, d16 +0xfb,0xff,0x20,0x06 = vcvt.f32.s32 d16, d16 +0xfb,0xff,0xa0,0x06 = vcvt.f32.u32 d16, d16 +0xfb,0xff,0x60,0x07 = vcvt.s32.f32 q8, q8 +0xfb,0xff,0xe0,0x07 = vcvt.u32.f32 q8, q8 +0xfb,0xff,0x60,0x06 = vcvt.f32.s32 q8, q8 +0xfb,0xff,0xe0,0x06 = vcvt.f32.u32 q8, q8 +0xff,0xef,0x30,0x0f = vcvt.s32.f32 d16, d16, #1 +0xff,0xff,0x30,0x0f = vcvt.u32.f32 d16, d16, #1 +0xff,0xef,0x30,0x0e = vcvt.f32.s32 d16, d16, #1 +0xff,0xff,0x30,0x0e = vcvt.f32.u32 d16, d16, #1 +0xff,0xef,0x70,0x0f = vcvt.s32.f32 q8, q8, #1 +0xff,0xff,0x70,0x0f = vcvt.u32.f32 q8, q8, #1 +0xff,0xef,0x70,0x0e = vcvt.f32.s32 q8, q8, #1 +0xff,0xff,0x70,0x0e = vcvt.f32.u32 q8, q8, #1 diff --git a/capstone/suite/MC/ARM/neont2-convert-encoding.s.cs b/capstone/suite/MC/ARM/neont2-convert-encoding.s.cs new file mode 100644 index 000000000..b502580ec --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-convert-encoding.s.cs @@ -0,0 +1,19 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xfb,0xff,0x20,0x07 = vcvt.s32.f32 d16, d16 +0xfb,0xff,0xa0,0x07 = vcvt.u32.f32 d16, d16 +0xfb,0xff,0x20,0x06 = vcvt.f32.s32 d16, d16 +0xfb,0xff,0xa0,0x06 = vcvt.f32.u32 d16, d16 +0xfb,0xff,0x60,0x07 = vcvt.s32.f32 q8, q8 +0xfb,0xff,0xe0,0x07 = vcvt.u32.f32 q8, q8 +0xfb,0xff,0x60,0x06 = vcvt.f32.s32 q8, q8 +0xfb,0xff,0xe0,0x06 = vcvt.f32.u32 q8, q8 +0xff,0xef,0x30,0x0f = vcvt.s32.f32 d16, d16, #1 +0xff,0xff,0x30,0x0f = vcvt.u32.f32 d16, d16, #1 +0xff,0xef,0x30,0x0e = vcvt.f32.s32 d16, d16, #1 +0xff,0xff,0x30,0x0e = vcvt.f32.u32 d16, d16, #1 +0xff,0xef,0x70,0x0f = vcvt.s32.f32 q8, q8, #1 +0xff,0xff,0x70,0x0f = vcvt.u32.f32 q8, q8, #1 +0xff,0xef,0x70,0x0e = vcvt.f32.s32 q8, q8, #1 +0xff,0xff,0x70,0x0e = vcvt.f32.u32 q8, q8, #1 +0xf6,0xff,0x20,0x07 = vcvt.f32.f16 q8, d16 +0xf6,0xff,0x20,0x06 = vcvt.f16.f32 d16, q8 diff --git a/capstone/suite/MC/ARM/neont2-dup-encoding.s.cs b/capstone/suite/MC/ARM/neont2-dup-encoding.s.cs new file mode 100644 index 000000000..525cd7fe8 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-dup-encoding.s.cs @@ -0,0 +1,19 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xc0,0xee,0x90,0x1b = vdup.8 d16, r1 +0x8f,0xee,0x30,0x2b = vdup.16 d15, r2 +0x8e,0xee,0x10,0x3b = vdup.32 d14, r3 +0xe2,0xee,0x90,0x4b = vdup.8 q9, r4 +0xa0,0xee,0xb0,0x5b = vdup.16 q8, r5 +0xae,0xee,0x10,0x6b = vdup.32 q7, r6 +0xf1,0xff,0x0b,0x0c = vdup.8 d16, d11[0] +0xf2,0xff,0x0c,0x1c = vdup.16 d17, d12[0] +0xf4,0xff,0x0d,0x2c = vdup.32 d18, d13[0] +0xb1,0xff,0x4a,0x6c = vdup.8 q3, d10[0] +0xf2,0xff,0x49,0x2c = vdup.16 q9, d9[0] +0xf4,0xff,0x48,0x0c = vdup.32 q8, d8[0] +0xf3,0xff,0x0b,0x0c = vdup.8 d16, d11[1] +0xf6,0xff,0x0c,0x1c = vdup.16 d17, d12[1] +0xfc,0xff,0x0d,0x2c = vdup.32 d18, d13[1] +0xb3,0xff,0x4a,0x6c = vdup.8 q3, d10[1] +0xf6,0xff,0x49,0x2c = vdup.16 q9, d9[1] +0xfc,0xff,0x48,0x0c = vdup.32 q8, d8[1] diff --git a/capstone/suite/MC/ARM/neont2-minmax-encoding.s.cs b/capstone/suite/MC/ARM/neont2-minmax-encoding.s.cs new file mode 100644 index 000000000..eb605f9fb --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-minmax-encoding.s.cs @@ -0,0 +1,57 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x02,0xef,0x03,0x16 = vmax.s8 d1, d2, d3 +0x15,0xef,0x06,0x46 = vmax.s16 d4, d5, d6 +0x28,0xef,0x09,0x76 = vmax.s32 d7, d8, d9 +0x0b,0xff,0x0c,0xa6 = vmax.u8 d10, d11, d12 +0x1e,0xff,0x0f,0xd6 = vmax.u16 d13, d14, d15 +0x61,0xff,0xa2,0x06 = vmax.u32 d16, d17, d18 +0x44,0xef,0xa5,0x3f = vmax.f32 d19, d20, d21 +0x02,0xef,0x03,0x26 = vmax.s8 d2, d2, d3 +0x15,0xef,0x06,0x56 = vmax.s16 d5, d5, d6 +0x28,0xef,0x09,0x86 = vmax.s32 d8, d8, d9 +0x0b,0xff,0x0c,0xb6 = vmax.u8 d11, d11, d12 +0x1e,0xff,0x0f,0xe6 = vmax.u16 d14, d14, d15 +0x61,0xff,0xa2,0x16 = vmax.u32 d17, d17, d18 +0x44,0xef,0xa5,0x4f = vmax.f32 d20, d20, d21 +0x04,0xef,0x46,0x26 = vmax.s8 q1, q2, q3 +0x1a,0xef,0x4c,0x86 = vmax.s16 q4, q5, q6 +0x20,0xef,0xe2,0xe6 = vmax.s32 q7, q8, q9 +0x46,0xff,0xe8,0x46 = vmax.u8 q10, q11, q12 +0x5c,0xff,0xee,0xa6 = vmax.u16 q13, q14, q15 +0x2e,0xff,0x60,0xc6 = vmax.u32 q6, q7, q8 +0x4a,0xef,0x42,0x2f = vmax.f32 q9, q5, q1 +0x04,0xef,0x46,0x46 = vmax.s8 q2, q2, q3 +0x1a,0xef,0x4c,0xa6 = vmax.s16 q5, q5, q6 +0x60,0xef,0xe2,0x06 = vmax.s32 q8, q8, q9 +0x46,0xff,0xc4,0x66 = vmax.u8 q11, q11, q2 +0x18,0xff,0x4a,0x86 = vmax.u16 q4, q4, q5 +0x2e,0xff,0x60,0xe6 = vmax.u32 q7, q7, q8 +0x04,0xef,0x42,0x4f = vmax.f32 q2, q2, q1 +0x02,0xef,0x13,0x16 = vmin.s8 d1, d2, d3 +0x15,0xef,0x16,0x46 = vmin.s16 d4, d5, d6 +0x28,0xef,0x19,0x76 = vmin.s32 d7, d8, d9 +0x0b,0xff,0x1c,0xa6 = vmin.u8 d10, d11, d12 +0x1e,0xff,0x1f,0xd6 = vmin.u16 d13, d14, d15 +0x61,0xff,0xb2,0x06 = vmin.u32 d16, d17, d18 +0x64,0xef,0xa5,0x3f = vmin.f32 d19, d20, d21 +0x02,0xef,0x13,0x26 = vmin.s8 d2, d2, d3 +0x15,0xef,0x16,0x56 = vmin.s16 d5, d5, d6 +0x28,0xef,0x19,0x86 = vmin.s32 d8, d8, d9 +0x0b,0xff,0x1c,0xb6 = vmin.u8 d11, d11, d12 +0x1e,0xff,0x1f,0xe6 = vmin.u16 d14, d14, d15 +0x61,0xff,0xb2,0x16 = vmin.u32 d17, d17, d18 +0x64,0xef,0xa5,0x4f = vmin.f32 d20, d20, d21 +0x04,0xef,0x56,0x26 = vmin.s8 q1, q2, q3 +0x1a,0xef,0x5c,0x86 = vmin.s16 q4, q5, q6 +0x20,0xef,0xf2,0xe6 = vmin.s32 q7, q8, q9 +0x46,0xff,0xf8,0x46 = vmin.u8 q10, q11, q12 +0x5c,0xff,0xfe,0xa6 = vmin.u16 q13, q14, q15 +0x2e,0xff,0x70,0xc6 = vmin.u32 q6, q7, q8 +0x6a,0xef,0x42,0x2f = vmin.f32 q9, q5, q1 +0x04,0xef,0x56,0x46 = vmin.s8 q2, q2, q3 +0x1a,0xef,0x5c,0xa6 = vmin.s16 q5, q5, q6 +0x60,0xef,0xf2,0x06 = vmin.s32 q8, q8, q9 +0x46,0xff,0xd4,0x66 = vmin.u8 q11, q11, q2 +0x18,0xff,0x5a,0x86 = vmin.u16 q4, q4, q5 +0x2e,0xff,0x70,0xe6 = vmin.u32 q7, q7, q8 +0x24,0xef,0x42,0x4f = vmin.f32 q2, q2, q1 diff --git a/capstone/suite/MC/ARM/neont2-mov-encoding.s.cs b/capstone/suite/MC/ARM/neont2-mov-encoding.s.cs new file mode 100644 index 000000000..b39c0c687 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-mov-encoding.s.cs @@ -0,0 +1,58 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xc0,0xef,0x18,0x0e = vmov.i8 d16, #0x8 +0xc1,0xef,0x10,0x08 = vmov.i16 d16, #0x10 +0xc1,0xef,0x10,0x0a = vmov.i16 d16, #0x1000 +0xc2,0xef,0x10,0x00 = vmov.i32 d16, #0x20 +0xc2,0xef,0x10,0x02 = vmov.i32 d16, #0x2000 +0xc2,0xef,0x10,0x04 = vmov.i32 d16, #0x200000 +0xc2,0xef,0x10,0x06 = vmov.i32 d16, #0x20000000 +0xc2,0xef,0x10,0x0c = vmov.i32 d16, #0x20ff +0xc2,0xef,0x10,0x0d = vmov.i32 d16, #0x20ffff +0xc1,0xff,0x33,0x0e = vmov.i64 d16, #0xff0000ff0000ffff +0xc0,0xef,0x58,0x0e = vmov.i8 q8, #0x8 +0xc1,0xef,0x50,0x08 = vmov.i16 q8, #0x10 +0xc1,0xef,0x50,0x0a = vmov.i16 q8, #0x1000 +0xc2,0xef,0x50,0x00 = vmov.i32 q8, #0x20 +0xc2,0xef,0x50,0x02 = vmov.i32 q8, #0x2000 +0xc2,0xef,0x50,0x04 = vmov.i32 q8, #0x200000 +0xc2,0xef,0x50,0x06 = vmov.i32 q8, #0x20000000 +0xc2,0xef,0x50,0x0c = vmov.i32 q8, #0x20ff +0xc2,0xef,0x50,0x0d = vmov.i32 q8, #0x20ffff +0xc1,0xff,0x73,0x0e = vmov.i64 q8, #0xff0000ff0000ffff +0xc1,0xef,0x30,0x08 = vmvn.i16 d16, #0x10 +0xc1,0xef,0x30,0x0a = vmvn.i16 d16, #0x1000 +0xc2,0xef,0x30,0x00 = vmvn.i32 d16, #0x20 +0xc2,0xef,0x30,0x02 = vmvn.i32 d16, #0x2000 +0xc2,0xef,0x30,0x04 = vmvn.i32 d16, #0x200000 +0xc2,0xef,0x30,0x06 = vmvn.i32 d16, #0x20000000 +0xc2,0xef,0x30,0x0c = vmvn.i32 d16, #0x20ff +0xc2,0xef,0x30,0x0d = vmvn.i32 d16, #0x20ffff +0xc8,0xef,0x30,0x0a = vmovl.s8 q8, d16 +0xd0,0xef,0x30,0x0a = vmovl.s16 q8, d16 +0xe0,0xef,0x30,0x0a = vmovl.s32 q8, d16 +0xc8,0xff,0x30,0x0a = vmovl.u8 q8, d16 +0xd0,0xff,0x30,0x0a = vmovl.u16 q8, d16 +0xe0,0xff,0x30,0x0a = vmovl.u32 q8, d16 +0xf2,0xff,0x20,0x02 = vmovn.i16 d16, q8 +0xf6,0xff,0x20,0x02 = vmovn.i32 d16, q8 +0xfa,0xff,0x20,0x02 = vmovn.i64 d16, q8 +0xf2,0xff,0xa0,0x02 = vqmovn.s16 d16, q8 +0xf6,0xff,0xa0,0x02 = vqmovn.s32 d16, q8 +0xfa,0xff,0xa0,0x02 = vqmovn.s64 d16, q8 +0xf2,0xff,0xe0,0x02 = vqmovn.u16 d16, q8 +0xf6,0xff,0xe0,0x02 = vqmovn.u32 d16, q8 +0xfa,0xff,0xe0,0x02 = vqmovn.u64 d16, q8 +0xf2,0xff,0x60,0x02 = vqmovun.s16 d16, q8 +0xf6,0xff,0x60,0x02 = vqmovun.s32 d16, q8 +0xfa,0xff,0x60,0x02 = vqmovun.s64 d16, q8 +0x50,0xee,0xb0,0x0b = vmov.s8 r0, d16[1] +0x10,0xee,0xf0,0x0b = vmov.s16 r0, d16[1] +0xd0,0xee,0xb0,0x0b = vmov.u8 r0, d16[1] +0x90,0xee,0xf0,0x0b = vmov.u16 r0, d16[1] +0x30,0xee,0x90,0x0b = vmov.32 r0, d16[1] +0x40,0xee,0xb0,0x1b = vmov.8 d16[1], r1 +0x00,0xee,0xf0,0x1b = vmov.16 d16[1], r1 +0x20,0xee,0x90,0x1b = vmov.32 d16[1], r1 +0x42,0xee,0xb0,0x1b = vmov.8 d18[1], r1 +0x02,0xee,0xf0,0x1b = vmov.16 d18[1], r1 +0x22,0xee,0x90,0x1b = vmov.32 d18[1], r1 diff --git a/capstone/suite/MC/ARM/neont2-mul-accum-encoding.s.cs b/capstone/suite/MC/ARM/neont2-mul-accum-encoding.s.cs new file mode 100644 index 000000000..385141d96 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-mul-accum-encoding.s.cs @@ -0,0 +1,41 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x42,0xef,0xa1,0x09 = vmla.i8 d16, d18, d17 +0x52,0xef,0xa1,0x09 = vmla.i16 d16, d18, d17 +0x62,0xef,0xa1,0x09 = vmla.i32 d16, d18, d17 +0x42,0xef,0xb1,0x0d = vmla.f32 d16, d18, d17 +0x40,0xef,0xe4,0x29 = vmla.i8 q9, q8, q10 +0x50,0xef,0xe4,0x29 = vmla.i16 q9, q8, q10 +0x60,0xef,0xe4,0x29 = vmla.i32 q9, q8, q10 +0x40,0xef,0xf4,0x2d = vmla.f32 q9, q8, q10 +0xe0,0xff,0xc3,0x80 = vmla.i32 q12, q8, d3[0] +0xc3,0xef,0xa2,0x08 = vmlal.s8 q8, d19, d18 +0xd3,0xef,0xa2,0x08 = vmlal.s16 q8, d19, d18 +0xe3,0xef,0xa2,0x08 = vmlal.s32 q8, d19, d18 +0xc3,0xff,0xa2,0x08 = vmlal.u8 q8, d19, d18 +0xd3,0xff,0xa2,0x08 = vmlal.u16 q8, d19, d18 +0xe3,0xff,0xa2,0x08 = vmlal.u32 q8, d19, d18 +0xa5,0xef,0x4a,0x02 = vmlal.s32 q0, d5, d10[0] +0xd3,0xef,0xa2,0x09 = vqdmlal.s16 q8, d19, d18 +0xe3,0xef,0xa2,0x09 = vqdmlal.s32 q8, d19, d18 +0xdb,0xef,0x47,0x63 = vqdmlal.s16 q11, d11, d7[0] +0xdb,0xef,0x4f,0x63 = vqdmlal.s16 q11, d11, d7[1] +0xdb,0xef,0x67,0x63 = vqdmlal.s16 q11, d11, d7[2] +0xdb,0xef,0x6f,0x63 = vqdmlal.s16 q11, d11, d7[3] +0x42,0xff,0xa1,0x09 = vmls.i8 d16, d18, d17 +0x52,0xff,0xa1,0x09 = vmls.i16 d16, d18, d17 +0x62,0xff,0xa1,0x09 = vmls.i32 d16, d18, d17 +0x62,0xef,0xb1,0x0d = vmls.f32 d16, d18, d17 +0x40,0xff,0xe4,0x29 = vmls.i8 q9, q8, q10 +0x50,0xff,0xe4,0x29 = vmls.i16 q9, q8, q10 +0x60,0xff,0xe4,0x29 = vmls.i32 q9, q8, q10 +0x60,0xef,0xf4,0x2d = vmls.f32 q9, q8, q10 +0x98,0xff,0xe6,0x84 = vmls.i16 q4, q12, d6[2] +0xc3,0xef,0xa2,0x0a = vmlsl.s8 q8, d19, d18 +0xd3,0xef,0xa2,0x0a = vmlsl.s16 q8, d19, d18 +0xe3,0xef,0xa2,0x0a = vmlsl.s32 q8, d19, d18 +0xc3,0xff,0xa2,0x0a = vmlsl.u8 q8, d19, d18 +0xd3,0xff,0xa2,0x0a = vmlsl.u16 q8, d19, d18 +0xe3,0xff,0xa2,0x0a = vmlsl.u32 q8, d19, d18 +0xd9,0xff,0xe9,0x66 = vmlsl.u16 q11, d25, d1[3] +0xd3,0xef,0xa2,0x0b = vqdmlsl.s16 q8, d19, d18 +0xe3,0xef,0xa2,0x0b = vqdmlsl.s32 q8, d19, d18 diff --git a/capstone/suite/MC/ARM/neont2-mul-encoding.s.cs b/capstone/suite/MC/ARM/neont2-mul-encoding.s.cs new file mode 100644 index 000000000..0fa91066a --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-mul-encoding.s.cs @@ -0,0 +1,31 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x40,0xef,0xb1,0x09 = vmul.i8 d16, d16, d17 +0x50,0xef,0xb1,0x09 = vmul.i16 d16, d16, d17 +0x60,0xef,0xb1,0x09 = vmul.i32 d16, d16, d17 +0x40,0xff,0xb1,0x0d = vmul.f32 d16, d16, d17 +0x40,0xef,0xf2,0x09 = vmul.i8 q8, q8, q9 +0x50,0xef,0xf2,0x09 = vmul.i16 q8, q8, q9 +0x60,0xef,0xf2,0x09 = vmul.i32 q8, q8, q9 +0x40,0xff,0xf2,0x0d = vmul.f32 q8, q8, q9 +0x40,0xff,0xb1,0x09 = vmul.p8 d16, d16, d17 +0x40,0xff,0xf2,0x09 = vmul.p8 q8, q8, q9 +0xd8,0xef,0x68,0x28 = vmul.i16 d18, d8, d0[3] +0x50,0xef,0xa1,0x0b = vqdmulh.s16 d16, d16, d17 +0x60,0xef,0xa1,0x0b = vqdmulh.s32 d16, d16, d17 +0x50,0xef,0xe2,0x0b = vqdmulh.s16 q8, q8, q9 +0x60,0xef,0xe2,0x0b = vqdmulh.s32 q8, q8, q9 +0x92,0xef,0x43,0xbc = vqdmulh.s16 d11, d2, d3[0] +0x50,0xff,0xa1,0x0b = vqrdmulh.s16 d16, d16, d17 +0x60,0xff,0xa1,0x0b = vqrdmulh.s32 d16, d16, d17 +0x50,0xff,0xe2,0x0b = vqrdmulh.s16 q8, q8, q9 +0x60,0xff,0xe2,0x0b = vqrdmulh.s32 q8, q8, q9 +0xc0,0xef,0xa1,0x0c = vmull.s8 q8, d16, d17 +0xd0,0xef,0xa1,0x0c = vmull.s16 q8, d16, d17 +0xe0,0xef,0xa1,0x0c = vmull.s32 q8, d16, d17 +0xc0,0xff,0xa1,0x0c = vmull.u8 q8, d16, d17 +0xd0,0xff,0xa1,0x0c = vmull.u16 q8, d16, d17 +0xe0,0xff,0xa1,0x0c = vmull.u32 q8, d16, d17 +0xc0,0xef,0xa1,0x0e = vmull.p8 q8, d16, d17 +0xd0,0xef,0xa1,0x0d = vqdmull.s16 q8, d16, d17 +0xe0,0xef,0xa1,0x0d = vqdmull.s32 q8, d16, d17 +0x97,0xef,0x49,0x2b = vqdmull.s16 q1, d7, d1[1] diff --git a/capstone/suite/MC/ARM/neont2-neg-encoding.s.cs b/capstone/suite/MC/ARM/neont2-neg-encoding.s.cs new file mode 100644 index 000000000..a6eaa0695 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-neg-encoding.s.cs @@ -0,0 +1,15 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf1,0xff,0xa0,0x03 = vneg.s8 d16, d16 +0xf5,0xff,0xa0,0x03 = vneg.s16 d16, d16 +0xf9,0xff,0xa0,0x03 = vneg.s32 d16, d16 +0xf9,0xff,0xa0,0x07 = vneg.f32 d16, d16 +0xf1,0xff,0xe0,0x03 = vneg.s8 q8, q8 +0xf5,0xff,0xe0,0x03 = vneg.s16 q8, q8 +0xf9,0xff,0xe0,0x03 = vneg.s32 q8, q8 +0xf9,0xff,0xe0,0x07 = vneg.f32 q8, q8 +0xf0,0xff,0xa0,0x07 = vqneg.s8 d16, d16 +0xf4,0xff,0xa0,0x07 = vqneg.s16 d16, d16 +0xf8,0xff,0xa0,0x07 = vqneg.s32 d16, d16 +0xf0,0xff,0xe0,0x07 = vqneg.s8 q8, q8 +0xf4,0xff,0xe0,0x07 = vqneg.s16 q8, q8 +0xf8,0xff,0xe0,0x07 = vqneg.s32 q8, q8 diff --git a/capstone/suite/MC/ARM/neont2-pairwise-encoding.s.cs b/capstone/suite/MC/ARM/neont2-pairwise-encoding.s.cs new file mode 100644 index 000000000..39bbe947c --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-pairwise-encoding.s.cs @@ -0,0 +1,43 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x05,0xef,0x1b,0x1b = vpadd.i8 d1, d5, d11 +0x12,0xef,0x1c,0xdb = vpadd.i16 d13, d2, d12 +0x21,0xef,0x1d,0xeb = vpadd.i32 d14, d1, d13 +0x40,0xff,0x8e,0x3d = vpadd.f32 d19, d16, d14 +0xb0,0xff,0x0a,0x72 = vpaddl.s8 d7, d10 +0xb4,0xff,0x0b,0x82 = vpaddl.s16 d8, d11 +0xb8,0xff,0x0c,0x92 = vpaddl.s32 d9, d12 +0xb0,0xff,0x8d,0x02 = vpaddl.u8 d0, d13 +0xb4,0xff,0x8e,0x52 = vpaddl.u16 d5, d14 +0xb8,0xff,0x8f,0x62 = vpaddl.u32 d6, d15 +0xb0,0xff,0x4e,0x82 = vpaddl.s8 q4, q7 +0xb4,0xff,0x4c,0xa2 = vpaddl.s16 q5, q6 +0xb8,0xff,0x4a,0xc2 = vpaddl.s32 q6, q5 +0xb0,0xff,0xc8,0xe2 = vpaddl.u8 q7, q4 +0xf4,0xff,0xc6,0x02 = vpaddl.u16 q8, q3 +0xf8,0xff,0xc4,0x22 = vpaddl.u32 q9, q2 +0xf0,0xff,0x04,0x06 = vpadal.s8 d16, d4 +0xf4,0xff,0x09,0x46 = vpadal.s16 d20, d9 +0xf8,0xff,0x01,0x26 = vpadal.s32 d18, d1 +0xb0,0xff,0xa9,0xe6 = vpadal.u8 d14, d25 +0xb4,0xff,0x86,0xc6 = vpadal.u16 d12, d6 +0xb8,0xff,0x87,0xb6 = vpadal.u32 d11, d7 +0xb0,0xff,0x64,0x86 = vpadal.s8 q4, q10 +0xb4,0xff,0x66,0xa6 = vpadal.s16 q5, q11 +0xb8,0xff,0x68,0xc6 = vpadal.s32 q6, q12 +0xb0,0xff,0xea,0xe6 = vpadal.u8 q7, q13 +0xf4,0xff,0xec,0x06 = vpadal.u16 q8, q14 +0xf8,0xff,0xee,0x26 = vpadal.u32 q9, q15 +0x4d,0xef,0x9a,0x0a = vpmin.s8 d16, d29, d10 +0x5c,0xef,0x9b,0x1a = vpmin.s16 d17, d28, d11 +0x6b,0xef,0x9c,0x2a = vpmin.s32 d18, d27, d12 +0x4a,0xff,0x9d,0x3a = vpmin.u8 d19, d26, d13 +0x59,0xff,0x9e,0x4a = vpmin.u16 d20, d25, d14 +0x68,0xff,0x9f,0x5a = vpmin.u32 d21, d24, d15 +0x67,0xff,0xa0,0x6f = vpmin.f32 d22, d23, d16 +0x04,0xef,0xa1,0x3a = vpmax.s8 d3, d20, d17 +0x15,0xef,0xa0,0x4a = vpmax.s16 d4, d21, d16 +0x26,0xef,0x8f,0x5a = vpmax.s32 d5, d22, d15 +0x07,0xff,0x8e,0x6a = vpmax.u8 d6, d23, d14 +0x18,0xff,0x8d,0x7a = vpmax.u16 d7, d24, d13 +0x29,0xff,0x8c,0x8a = vpmax.u32 d8, d25, d12 +0x0a,0xff,0x8b,0x9f = vpmax.f32 d9, d26, d11 diff --git a/capstone/suite/MC/ARM/neont2-reciprocal-encoding.s.cs b/capstone/suite/MC/ARM/neont2-reciprocal-encoding.s.cs new file mode 100644 index 000000000..139b9ae38 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-reciprocal-encoding.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xfb,0xff,0x20,0x04 = vrecpe.u32 d16, d16 +0xfb,0xff,0x60,0x04 = vrecpe.u32 q8, q8 +0xfb,0xff,0x20,0x05 = vrecpe.f32 d16, d16 +0xfb,0xff,0x60,0x05 = vrecpe.f32 q8, q8 +0x40,0xef,0xb1,0x0f = vrecps.f32 d16, d16, d17 +0x40,0xef,0xf2,0x0f = vrecps.f32 q8, q8, q9 +0xfb,0xff,0xa0,0x04 = vrsqrte.u32 d16, d16 +0xfb,0xff,0xe0,0x04 = vrsqrte.u32 q8, q8 +0xfb,0xff,0xa0,0x05 = vrsqrte.f32 d16, d16 +0xfb,0xff,0xe0,0x05 = vrsqrte.f32 q8, q8 +0x60,0xef,0xb1,0x0f = vrsqrts.f32 d16, d16, d17 +0x60,0xef,0xf2,0x0f = vrsqrts.f32 q8, q8, q9 diff --git a/capstone/suite/MC/ARM/neont2-reverse-encoding.s.cs b/capstone/suite/MC/ARM/neont2-reverse-encoding.s.cs new file mode 100644 index 000000000..119b1d10d --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-reverse-encoding.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf0,0xff,0x20,0x00 = vrev64.8 d16, d16 +0xf4,0xff,0x20,0x00 = vrev64.16 d16, d16 +0xf8,0xff,0x20,0x00 = vrev64.32 d16, d16 +0xf0,0xff,0x60,0x00 = vrev64.8 q8, q8 +0xf4,0xff,0x60,0x00 = vrev64.16 q8, q8 +0xf8,0xff,0x60,0x00 = vrev64.32 q8, q8 +0xf0,0xff,0xa0,0x00 = vrev32.8 d16, d16 +0xf4,0xff,0xa0,0x00 = vrev32.16 d16, d16 +0xf0,0xff,0xe0,0x00 = vrev32.8 q8, q8 +0xf4,0xff,0xe0,0x00 = vrev32.16 q8, q8 +0xf0,0xff,0x20,0x01 = vrev16.8 d16, d16 +0xf0,0xff,0x60,0x01 = vrev16.8 q8, q8 diff --git a/capstone/suite/MC/ARM/neont2-satshift-encoding.s.cs b/capstone/suite/MC/ARM/neont2-satshift-encoding.s.cs new file mode 100644 index 000000000..859b44a59 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-satshift-encoding.s.cs @@ -0,0 +1,75 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x41,0xef,0xb0,0x04 = vqshl.s8 d16, d16, d17 +0x51,0xef,0xb0,0x04 = vqshl.s16 d16, d16, d17 +0x61,0xef,0xb0,0x04 = vqshl.s32 d16, d16, d17 +0x71,0xef,0xb0,0x04 = vqshl.s64 d16, d16, d17 +0x41,0xff,0xb0,0x04 = vqshl.u8 d16, d16, d17 +0x51,0xff,0xb0,0x04 = vqshl.u16 d16, d16, d17 +0x61,0xff,0xb0,0x04 = vqshl.u32 d16, d16, d17 +0x71,0xff,0xb0,0x04 = vqshl.u64 d16, d16, d17 +0x42,0xef,0xf0,0x04 = vqshl.s8 q8, q8, q9 +0x52,0xef,0xf0,0x04 = vqshl.s16 q8, q8, q9 +0x62,0xef,0xf0,0x04 = vqshl.s32 q8, q8, q9 +0x72,0xef,0xf0,0x04 = vqshl.s64 q8, q8, q9 +0x42,0xff,0xf0,0x04 = vqshl.u8 q8, q8, q9 +0x52,0xff,0xf0,0x04 = vqshl.u16 q8, q8, q9 +0x62,0xff,0xf0,0x04 = vqshl.u32 q8, q8, q9 +0x72,0xff,0xf0,0x04 = vqshl.u64 q8, q8, q9 +0xcf,0xef,0x30,0x07 = vqshl.s8 d16, d16, #7 +0xdf,0xef,0x30,0x07 = vqshl.s16 d16, d16, #15 +0xff,0xef,0x30,0x07 = vqshl.s32 d16, d16, #31 +0xff,0xef,0xb0,0x07 = vqshl.s64 d16, d16, #63 +0xcf,0xff,0x30,0x07 = vqshl.u8 d16, d16, #7 +0xdf,0xff,0x30,0x07 = vqshl.u16 d16, d16, #15 +0xff,0xff,0x30,0x07 = vqshl.u32 d16, d16, #31 +0xff,0xff,0xb0,0x07 = vqshl.u64 d16, d16, #63 +0xcf,0xff,0x30,0x06 = vqshlu.s8 d16, d16, #7 +0xdf,0xff,0x30,0x06 = vqshlu.s16 d16, d16, #15 +0xff,0xff,0x30,0x06 = vqshlu.s32 d16, d16, #31 +0xff,0xff,0xb0,0x06 = vqshlu.s64 d16, d16, #63 +0xcf,0xef,0x70,0x07 = vqshl.s8 q8, q8, #7 +0xdf,0xef,0x70,0x07 = vqshl.s16 q8, q8, #15 +0xff,0xef,0x70,0x07 = vqshl.s32 q8, q8, #31 +0xff,0xef,0xf0,0x07 = vqshl.s64 q8, q8, #63 +0xcf,0xff,0x70,0x07 = vqshl.u8 q8, q8, #7 +0xdf,0xff,0x70,0x07 = vqshl.u16 q8, q8, #15 +0xff,0xff,0x70,0x07 = vqshl.u32 q8, q8, #31 +0xff,0xff,0xf0,0x07 = vqshl.u64 q8, q8, #63 +0xcf,0xff,0x70,0x06 = vqshlu.s8 q8, q8, #7 +0xdf,0xff,0x70,0x06 = vqshlu.s16 q8, q8, #15 +0xff,0xff,0x70,0x06 = vqshlu.s32 q8, q8, #31 +0xff,0xff,0xf0,0x06 = vqshlu.s64 q8, q8, #63 +0x41,0xef,0xb0,0x05 = vqrshl.s8 d16, d16, d17 +0x51,0xef,0xb0,0x05 = vqrshl.s16 d16, d16, d17 +0x61,0xef,0xb0,0x05 = vqrshl.s32 d16, d16, d17 +0x71,0xef,0xb0,0x05 = vqrshl.s64 d16, d16, d17 +0x41,0xff,0xb0,0x05 = vqrshl.u8 d16, d16, d17 +0x51,0xff,0xb0,0x05 = vqrshl.u16 d16, d16, d17 +0x61,0xff,0xb0,0x05 = vqrshl.u32 d16, d16, d17 +0x71,0xff,0xb0,0x05 = vqrshl.u64 d16, d16, d17 +0x42,0xef,0xf0,0x05 = vqrshl.s8 q8, q8, q9 +0x52,0xef,0xf0,0x05 = vqrshl.s16 q8, q8, q9 +0x62,0xef,0xf0,0x05 = vqrshl.s32 q8, q8, q9 +0x72,0xef,0xf0,0x05 = vqrshl.s64 q8, q8, q9 +0x42,0xff,0xf0,0x05 = vqrshl.u8 q8, q8, q9 +0x52,0xff,0xf0,0x05 = vqrshl.u16 q8, q8, q9 +0x62,0xff,0xf0,0x05 = vqrshl.u32 q8, q8, q9 +0x72,0xff,0xf0,0x05 = vqrshl.u64 q8, q8, q9 +0xc8,0xef,0x30,0x09 = vqshrn.s16 d16, q8, #8 +0xd0,0xef,0x30,0x09 = vqshrn.s32 d16, q8, #16 +0xe0,0xef,0x30,0x09 = vqshrn.s64 d16, q8, #32 +0xc8,0xff,0x30,0x09 = vqshrn.u16 d16, q8, #8 +0xd0,0xff,0x30,0x09 = vqshrn.u32 d16, q8, #16 +0xe0,0xff,0x30,0x09 = vqshrn.u64 d16, q8, #32 +0xc8,0xff,0x30,0x08 = vqshrun.s16 d16, q8, #8 +0xd0,0xff,0x30,0x08 = vqshrun.s32 d16, q8, #16 +0xe0,0xff,0x30,0x08 = vqshrun.s64 d16, q8, #32 +0xc8,0xef,0x70,0x09 = vqrshrn.s16 d16, q8, #8 +0xd0,0xef,0x70,0x09 = vqrshrn.s32 d16, q8, #16 +0xe0,0xef,0x70,0x09 = vqrshrn.s64 d16, q8, #32 +0xc8,0xff,0x70,0x09 = vqrshrn.u16 d16, q8, #8 +0xd0,0xff,0x70,0x09 = vqrshrn.u32 d16, q8, #16 +0xe0,0xff,0x70,0x09 = vqrshrn.u64 d16, q8, #32 +0xc8,0xff,0x70,0x08 = vqrshrun.s16 d16, q8, #8 +0xd0,0xff,0x70,0x08 = vqrshrun.s32 d16, q8, #16 +0xe0,0xff,0x70,0x08 = vqrshrun.s64 d16, q8, #32 diff --git a/capstone/suite/MC/ARM/neont2-shift-encoding.s.cs b/capstone/suite/MC/ARM/neont2-shift-encoding.s.cs new file mode 100644 index 000000000..b86f7e964 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-shift-encoding.s.cs @@ -0,0 +1,80 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x40,0xff,0xa1,0x04 = vshl.u8 d16, d17, d16 +0x50,0xff,0xa1,0x04 = vshl.u16 d16, d17, d16 +0x60,0xff,0xa1,0x04 = vshl.u32 d16, d17, d16 +0x70,0xff,0xa1,0x04 = vshl.u64 d16, d17, d16 +0xcf,0xef,0x30,0x05 = vshl.i8 d16, d16, #7 +0xdf,0xef,0x30,0x05 = vshl.i16 d16, d16, #15 +0xff,0xef,0x30,0x05 = vshl.i32 d16, d16, #31 +0xff,0xef,0xb0,0x05 = vshl.i64 d16, d16, #63 +0x40,0xff,0xe2,0x04 = vshl.u8 q8, q9, q8 +0x50,0xff,0xe2,0x04 = vshl.u16 q8, q9, q8 +0x60,0xff,0xe2,0x04 = vshl.u32 q8, q9, q8 +0x70,0xff,0xe2,0x04 = vshl.u64 q8, q9, q8 +0xcf,0xef,0x70,0x05 = vshl.i8 q8, q8, #7 +0xdf,0xef,0x70,0x05 = vshl.i16 q8, q8, #15 +0xff,0xef,0x70,0x05 = vshl.i32 q8, q8, #31 +0xff,0xef,0xf0,0x05 = vshl.i64 q8, q8, #63 +0xc8,0xff,0x30,0x00 = vshr.u8 d16, d16, #8 +0xd0,0xff,0x30,0x00 = vshr.u16 d16, d16, #16 +0xe0,0xff,0x30,0x00 = vshr.u32 d16, d16, #32 +0xc0,0xff,0xb0,0x00 = vshr.u64 d16, d16, #64 +0xc8,0xff,0x70,0x00 = vshr.u8 q8, q8, #8 +0xd0,0xff,0x70,0x00 = vshr.u16 q8, q8, #16 +0xe0,0xff,0x70,0x00 = vshr.u32 q8, q8, #32 +0xc0,0xff,0xf0,0x00 = vshr.u64 q8, q8, #64 +0xc8,0xef,0x30,0x00 = vshr.s8 d16, d16, #8 +0xd0,0xef,0x30,0x00 = vshr.s16 d16, d16, #16 +0xe0,0xef,0x30,0x00 = vshr.s32 d16, d16, #32 +0xc0,0xef,0xb0,0x00 = vshr.s64 d16, d16, #64 +0xc8,0xef,0x70,0x00 = vshr.s8 q8, q8, #8 +0xd0,0xef,0x70,0x00 = vshr.s16 q8, q8, #16 +0xe0,0xef,0x70,0x00 = vshr.s32 q8, q8, #32 +0xc0,0xef,0xf0,0x00 = vshr.s64 q8, q8, #64 +0xcf,0xef,0x30,0x0a = vshll.s8 q8, d16, #7 +0xdf,0xef,0x30,0x0a = vshll.s16 q8, d16, #15 +0xff,0xef,0x30,0x0a = vshll.s32 q8, d16, #31 +0xcf,0xff,0x30,0x0a = vshll.u8 q8, d16, #7 +0xdf,0xff,0x30,0x0a = vshll.u16 q8, d16, #15 +0xff,0xff,0x30,0x0a = vshll.u32 q8, d16, #31 +0xf2,0xff,0x20,0x03 = vshll.i8 q8, d16, #8 +0xf6,0xff,0x20,0x03 = vshll.i16 q8, d16, #16 +0xfa,0xff,0x20,0x03 = vshll.i32 q8, d16, #32 +0xc8,0xef,0x30,0x08 = vshrn.i16 d16, q8, #8 +0xd0,0xef,0x30,0x08 = vshrn.i32 d16, q8, #16 +0xe0,0xef,0x30,0x08 = vshrn.i64 d16, q8, #32 +0x40,0xef,0xa1,0x05 = vrshl.s8 d16, d17, d16 +0x50,0xef,0xa1,0x05 = vrshl.s16 d16, d17, d16 +0x60,0xef,0xa1,0x05 = vrshl.s32 d16, d17, d16 +0x70,0xef,0xa1,0x05 = vrshl.s64 d16, d17, d16 +0x40,0xff,0xa1,0x05 = vrshl.u8 d16, d17, d16 +0x50,0xff,0xa1,0x05 = vrshl.u16 d16, d17, d16 +0x60,0xff,0xa1,0x05 = vrshl.u32 d16, d17, d16 +0x70,0xff,0xa1,0x05 = vrshl.u64 d16, d17, d16 +0x40,0xef,0xe2,0x05 = vrshl.s8 q8, q9, q8 +0x50,0xef,0xe2,0x05 = vrshl.s16 q8, q9, q8 +0x60,0xef,0xe2,0x05 = vrshl.s32 q8, q9, q8 +0x70,0xef,0xe2,0x05 = vrshl.s64 q8, q9, q8 +0x40,0xff,0xe2,0x05 = vrshl.u8 q8, q9, q8 +0x50,0xff,0xe2,0x05 = vrshl.u16 q8, q9, q8 +0x60,0xff,0xe2,0x05 = vrshl.u32 q8, q9, q8 +0x70,0xff,0xe2,0x05 = vrshl.u64 q8, q9, q8 +0xc8,0xef,0x30,0x02 = vrshr.s8 d16, d16, #8 +0xd0,0xef,0x30,0x02 = vrshr.s16 d16, d16, #16 +0xe0,0xef,0x30,0x02 = vrshr.s32 d16, d16, #32 +0xc0,0xef,0xb0,0x02 = vrshr.s64 d16, d16, #64 +0xc8,0xff,0x30,0x02 = vrshr.u8 d16, d16, #8 +0xd0,0xff,0x30,0x02 = vrshr.u16 d16, d16, #16 +0xe0,0xff,0x30,0x02 = vrshr.u32 d16, d16, #32 +0xc0,0xff,0xb0,0x02 = vrshr.u64 d16, d16, #64 +0xc8,0xef,0x70,0x02 = vrshr.s8 q8, q8, #8 +0xd0,0xef,0x70,0x02 = vrshr.s16 q8, q8, #16 +0xe0,0xef,0x70,0x02 = vrshr.s32 q8, q8, #32 +0xc0,0xef,0xf0,0x02 = vrshr.s64 q8, q8, #64 +0xc8,0xff,0x70,0x02 = vrshr.u8 q8, q8, #8 +0xd0,0xff,0x70,0x02 = vrshr.u16 q8, q8, #16 +0xe0,0xff,0x70,0x02 = vrshr.u32 q8, q8, #32 +0xc0,0xff,0xf0,0x02 = vrshr.u64 q8, q8, #64 +0xc8,0xef,0x70,0x08 = vrshrn.i16 d16, q8, #8 +0xd0,0xef,0x70,0x08 = vrshrn.i32 d16, q8, #16 +0xe0,0xef,0x70,0x08 = vrshrn.i64 d16, q8, #32 diff --git a/capstone/suite/MC/ARM/neont2-shiftaccum-encoding.s.cs b/capstone/suite/MC/ARM/neont2-shiftaccum-encoding.s.cs new file mode 100644 index 000000000..b2383a975 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-shiftaccum-encoding.s.cs @@ -0,0 +1,97 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xc8,0xef,0x30,0x11 = vsra.s8 d17, d16, #8 +0x90,0xef,0x1e,0xf1 = vsra.s16 d15, d14, #16 +0xa0,0xef,0x1c,0xd1 = vsra.s32 d13, d12, #32 +0x80,0xef,0x9a,0xb1 = vsra.s64 d11, d10, #64 +0x88,0xef,0x54,0xe1 = vsra.s8 q7, q2, #8 +0x90,0xef,0x5c,0x61 = vsra.s16 q3, q6, #16 +0xe0,0xef,0x5a,0x21 = vsra.s32 q9, q5, #32 +0xc0,0xef,0xd8,0x01 = vsra.s64 q8, q4, #64 +0xc8,0xff,0x30,0x11 = vsra.u8 d17, d16, #8 +0x95,0xff,0x1e,0xb1 = vsra.u16 d11, d14, #11 +0xaa,0xff,0x1f,0xc1 = vsra.u32 d12, d15, #22 +0x8a,0xff,0xb0,0xd1 = vsra.u64 d13, d16, #54 +0x88,0xff,0x5e,0x21 = vsra.u8 q1, q7, #8 +0x9a,0xff,0x5e,0x41 = vsra.u16 q2, q7, #6 +0xab,0xff,0x5c,0x61 = vsra.u32 q3, q6, #21 +0xa7,0xff,0xda,0x81 = vsra.u64 q4, q5, #25 +0xc8,0xef,0x30,0x01 = vsra.s8 d16, d16, #8 +0x90,0xef,0x1e,0xe1 = vsra.s16 d14, d14, #16 +0xa0,0xef,0x1c,0xc1 = vsra.s32 d12, d12, #32 +0x80,0xef,0x9a,0xa1 = vsra.s64 d10, d10, #64 +0x88,0xef,0x54,0x41 = vsra.s8 q2, q2, #8 +0x90,0xef,0x5c,0xc1 = vsra.s16 q6, q6, #16 +0xa0,0xef,0x5a,0xa1 = vsra.s32 q5, q5, #32 +0x80,0xef,0xd8,0x81 = vsra.s64 q4, q4, #64 +0xc8,0xff,0x30,0x01 = vsra.u8 d16, d16, #8 +0x95,0xff,0x1e,0xe1 = vsra.u16 d14, d14, #11 +0xaa,0xff,0x1f,0xf1 = vsra.u32 d15, d15, #22 +0xca,0xff,0xb0,0x01 = vsra.u64 d16, d16, #54 +0x88,0xff,0x5e,0xe1 = vsra.u8 q7, q7, #8 +0x9a,0xff,0x5e,0xe1 = vsra.u16 q7, q7, #6 +0xab,0xff,0x5c,0xc1 = vsra.u32 q6, q6, #21 +0xa7,0xff,0xda,0xa1 = vsra.u64 q5, q5, #25 +0x88,0xef,0x3a,0x53 = vrsra.s8 d5, d26, #8 +0x90,0xef,0x39,0x63 = vrsra.s16 d6, d25, #16 +0xa0,0xef,0x38,0x73 = vrsra.s32 d7, d24, #32 +0x80,0xef,0xb7,0xe3 = vrsra.s64 d14, d23, #64 +0x88,0xff,0x36,0xf3 = vrsra.u8 d15, d22, #8 +0xd0,0xff,0x35,0x03 = vrsra.u16 d16, d21, #16 +0xe0,0xff,0x34,0x13 = vrsra.u32 d17, d20, #32 +0xc0,0xff,0xb3,0x23 = vrsra.u64 d18, d19, #64 +0x88,0xef,0x54,0x23 = vrsra.s8 q1, q2, #8 +0x90,0xef,0x56,0x43 = vrsra.s16 q2, q3, #16 +0xa0,0xef,0x58,0x63 = vrsra.s32 q3, q4, #32 +0x80,0xef,0xda,0x83 = vrsra.s64 q4, q5, #64 +0x88,0xff,0x5c,0xa3 = vrsra.u8 q5, q6, #8 +0x90,0xff,0x5e,0xc3 = vrsra.u16 q6, q7, #16 +0xa0,0xff,0x70,0xe3 = vrsra.u32 q7, q8, #32 +0xc0,0xff,0xf2,0x03 = vrsra.u64 q8, q9, #64 +0xc8,0xef,0x3a,0xa3 = vrsra.s8 d26, d26, #8 +0xd0,0xef,0x39,0x93 = vrsra.s16 d25, d25, #16 +0xe0,0xef,0x38,0x83 = vrsra.s32 d24, d24, #32 +0xc0,0xef,0xb7,0x73 = vrsra.s64 d23, d23, #64 +0xc8,0xff,0x36,0x63 = vrsra.u8 d22, d22, #8 +0xd0,0xff,0x35,0x53 = vrsra.u16 d21, d21, #16 +0xe0,0xff,0x34,0x43 = vrsra.u32 d20, d20, #32 +0xc0,0xff,0xb3,0x33 = vrsra.u64 d19, d19, #64 +0x88,0xef,0x54,0x43 = vrsra.s8 q2, q2, #8 +0x90,0xef,0x56,0x63 = vrsra.s16 q3, q3, #16 +0xa0,0xef,0x58,0x83 = vrsra.s32 q4, q4, #32 +0x80,0xef,0xda,0xa3 = vrsra.s64 q5, q5, #64 +0x88,0xff,0x5c,0xc3 = vrsra.u8 q6, q6, #8 +0x90,0xff,0x5e,0xe3 = vrsra.u16 q7, q7, #16 +0xe0,0xff,0x70,0x03 = vrsra.u32 q8, q8, #32 +0xc0,0xff,0xf2,0x23 = vrsra.u64 q9, q9, #64 +0x8f,0xff,0x1c,0xb5 = vsli.8 d11, d12, #7 +0x9f,0xff,0x1d,0xc5 = vsli.16 d12, d13, #15 +0xbf,0xff,0x1e,0xd5 = vsli.32 d13, d14, #31 +0xbf,0xff,0x9f,0xe5 = vsli.64 d14, d15, #63 +0x8f,0xff,0x70,0x25 = vsli.8 q1, q8, #7 +0x9f,0xff,0x5e,0x45 = vsli.16 q2, q7, #15 +0xbf,0xff,0x58,0x65 = vsli.32 q3, q4, #31 +0xbf,0xff,0xda,0x85 = vsli.64 q4, q5, #63 +0xc8,0xff,0x1b,0xc4 = vsri.8 d28, d11, #8 +0xd0,0xff,0x1c,0xa4 = vsri.16 d26, d12, #16 +0xe0,0xff,0x1d,0x84 = vsri.32 d24, d13, #32 +0xc0,0xff,0x9e,0x54 = vsri.64 d21, d14, #64 +0x88,0xff,0x70,0x24 = vsri.8 q1, q8, #8 +0x90,0xff,0x54,0xa4 = vsri.16 q5, q2, #16 +0xa0,0xff,0x58,0xe4 = vsri.32 q7, q4, #32 +0xc0,0xff,0xdc,0x24 = vsri.64 q9, q6, #64 +0x8f,0xff,0x1c,0xc5 = vsli.8 d12, d12, #7 +0x9f,0xff,0x1d,0xd5 = vsli.16 d13, d13, #15 +0xbf,0xff,0x1e,0xe5 = vsli.32 d14, d14, #31 +0xbf,0xff,0x9f,0xf5 = vsli.64 d15, d15, #63 +0xcf,0xff,0x70,0x05 = vsli.8 q8, q8, #7 +0x9f,0xff,0x5e,0xe5 = vsli.16 q7, q7, #15 +0xbf,0xff,0x58,0x85 = vsli.32 q4, q4, #31 +0xbf,0xff,0xda,0xa5 = vsli.64 q5, q5, #63 +0x88,0xff,0x1b,0xb4 = vsri.8 d11, d11, #8 +0x90,0xff,0x1c,0xc4 = vsri.16 d12, d12, #16 +0xa0,0xff,0x1d,0xd4 = vsri.32 d13, d13, #32 +0x80,0xff,0x9e,0xe4 = vsri.64 d14, d14, #64 +0xc8,0xff,0x70,0x04 = vsri.8 q8, q8, #8 +0x90,0xff,0x54,0x44 = vsri.16 q2, q2, #16 +0xa0,0xff,0x58,0x84 = vsri.32 q4, q4, #32 +0x80,0xff,0xdc,0xc4 = vsri.64 q6, q6, #64 diff --git a/capstone/suite/MC/ARM/neont2-shuffle-encoding.s.cs b/capstone/suite/MC/ARM/neont2-shuffle-encoding.s.cs new file mode 100644 index 000000000..151d905e7 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-shuffle-encoding.s.cs @@ -0,0 +1,23 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf1,0xef,0xa0,0x03 = vext.8 d16, d17, d16, #3 +0xf1,0xef,0xa0,0x05 = vext.8 d16, d17, d16, #5 +0xf2,0xef,0xe0,0x03 = vext.8 q8, q9, q8, #3 +0xf2,0xef,0xe0,0x07 = vext.8 q8, q9, q8, #7 +0xf1,0xef,0xa0,0x06 = vext.16 d16, d17, d16, #3 +0xf2,0xef,0xe0,0x0c = vext.32 q8, q9, q8, #3 +0xf2,0xff,0xa0,0x10 = vtrn.8 d17, d16 +0xf6,0xff,0xa0,0x10 = vtrn.16 d17, d16 +0xfa,0xff,0xa0,0x10 = vtrn.32 d17, d16 +0xf2,0xff,0xe0,0x20 = vtrn.8 q9, q8 +0xf6,0xff,0xe0,0x20 = vtrn.16 q9, q8 +0xfa,0xff,0xe0,0x20 = vtrn.32 q9, q8 +0xf2,0xff,0x20,0x11 = vuzp.8 d17, d16 +0xf6,0xff,0x20,0x11 = vuzp.16 d17, d16 +0xf2,0xff,0x60,0x21 = vuzp.8 q9, q8 +0xf6,0xff,0x60,0x21 = vuzp.16 q9, q8 +0xfa,0xff,0x60,0x21 = vuzp.32 q9, q8 +0xf2,0xff,0xa0,0x11 = vzip.8 d17, d16 +0xf6,0xff,0xa0,0x11 = vzip.16 d17, d16 +0xf2,0xff,0xe0,0x21 = vzip.8 q9, q8 +0xf6,0xff,0xe0,0x21 = vzip.16 q9, q8 +0xfa,0xff,0xe0,0x21 = vzip.32 q9, q8 diff --git a/capstone/suite/MC/ARM/neont2-sub-encoding.s.cs b/capstone/suite/MC/ARM/neont2-sub-encoding.s.cs new file mode 100644 index 000000000..151d905e7 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-sub-encoding.s.cs @@ -0,0 +1,23 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf1,0xef,0xa0,0x03 = vext.8 d16, d17, d16, #3 +0xf1,0xef,0xa0,0x05 = vext.8 d16, d17, d16, #5 +0xf2,0xef,0xe0,0x03 = vext.8 q8, q9, q8, #3 +0xf2,0xef,0xe0,0x07 = vext.8 q8, q9, q8, #7 +0xf1,0xef,0xa0,0x06 = vext.16 d16, d17, d16, #3 +0xf2,0xef,0xe0,0x0c = vext.32 q8, q9, q8, #3 +0xf2,0xff,0xa0,0x10 = vtrn.8 d17, d16 +0xf6,0xff,0xa0,0x10 = vtrn.16 d17, d16 +0xfa,0xff,0xa0,0x10 = vtrn.32 d17, d16 +0xf2,0xff,0xe0,0x20 = vtrn.8 q9, q8 +0xf6,0xff,0xe0,0x20 = vtrn.16 q9, q8 +0xfa,0xff,0xe0,0x20 = vtrn.32 q9, q8 +0xf2,0xff,0x20,0x11 = vuzp.8 d17, d16 +0xf6,0xff,0x20,0x11 = vuzp.16 d17, d16 +0xf2,0xff,0x60,0x21 = vuzp.8 q9, q8 +0xf6,0xff,0x60,0x21 = vuzp.16 q9, q8 +0xfa,0xff,0x60,0x21 = vuzp.32 q9, q8 +0xf2,0xff,0xa0,0x11 = vzip.8 d17, d16 +0xf6,0xff,0xa0,0x11 = vzip.16 d17, d16 +0xf2,0xff,0xe0,0x21 = vzip.8 q9, q8 +0xf6,0xff,0xe0,0x21 = vzip.16 q9, q8 +0xfa,0xff,0xe0,0x21 = vzip.32 q9, q8 diff --git a/capstone/suite/MC/ARM/neont2-table-encoding.s.cs b/capstone/suite/MC/ARM/neont2-table-encoding.s.cs new file mode 100644 index 000000000..f2d43c1b7 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-table-encoding.s.cs @@ -0,0 +1,9 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xf1,0xff,0xa0,0x08 = vtbl.8 d16, {d17}, d16 +0xf0,0xff,0xa2,0x09 = vtbl.8 d16, {d16, d17}, d18 +0xf0,0xff,0xa4,0x0a = vtbl.8 d16, {d16, d17, d18}, d20 +0xf0,0xff,0xa4,0x0b = vtbl.8 d16, {d16, d17, d18, d19}, d20 +0xf0,0xff,0xe1,0x28 = vtbx.8 d18, {d16}, d17 +0xf0,0xff,0xe2,0x39 = vtbx.8 d19, {d16, d17}, d18 +0xf0,0xff,0xe5,0x4a = vtbx.8 d20, {d16, d17, d18}, d21 +0xf0,0xff,0xe5,0x4b = vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/capstone/suite/MC/ARM/neont2-vld-encoding.s.cs b/capstone/suite/MC/ARM/neont2-vld-encoding.s.cs new file mode 100644 index 000000000..85c3b7074 --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-vld-encoding.s.cs @@ -0,0 +1,51 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x60,0xf9,0x1f,0x07 = vld1.8 {d16}, [r0:64] +0x60,0xf9,0x4f,0x07 = vld1.16 {d16}, [r0] +0x60,0xf9,0x8f,0x07 = vld1.32 {d16}, [r0] +0x60,0xf9,0xcf,0x07 = vld1.64 {d16}, [r0] +0x60,0xf9,0x1f,0x0a = vld1.8 {d16, d17}, [r0:64] +0x60,0xf9,0x6f,0x0a = vld1.16 {d16, d17}, [r0:128] +0x60,0xf9,0x8f,0x0a = vld1.32 {d16, d17}, [r0] +0x60,0xf9,0xcf,0x0a = vld1.64 {d16, d17}, [r0] +0x60,0xf9,0x1f,0x08 = vld2.8 {d16, d17}, [r0:64] +0x60,0xf9,0x6f,0x08 = vld2.16 {d16, d17}, [r0:128] +0x60,0xf9,0x8f,0x08 = vld2.32 {d16, d17}, [r0] +0x60,0xf9,0x1f,0x03 = vld2.8 {d16, d17, d18, d19}, [r0:64] +0x60,0xf9,0x6f,0x03 = vld2.16 {d16, d17, d18, d19}, [r0:128] +0x60,0xf9,0xbf,0x03 = vld2.32 {d16, d17, d18, d19}, [r0:256] +0x60,0xf9,0x1f,0x04 = vld3.8 {d16, d17, d18}, [r0:64] +0x60,0xf9,0x4f,0x04 = vld3.16 {d16, d17, d18}, [r0] +0x60,0xf9,0x8f,0x04 = vld3.32 {d16, d17, d18}, [r0] +0x60,0xf9,0x1d,0x05 = vld3.8 {d16, d18, d20}, [r0:64]! +0x60,0xf9,0x1d,0x15 = vld3.8 {d17, d19, d21}, [r0:64]! +0x60,0xf9,0x4d,0x05 = vld3.16 {d16, d18, d20}, [r0]! +0x60,0xf9,0x4d,0x15 = vld3.16 {d17, d19, d21}, [r0]! +0x60,0xf9,0x8d,0x05 = vld3.32 {d16, d18, d20}, [r0]! +0x60,0xf9,0x8d,0x15 = vld3.32 {d17, d19, d21}, [r0]! +0x60,0xf9,0x1f,0x00 = vld4.8 {d16, d17, d18, d19}, [r0:64] +0x60,0xf9,0x6f,0x00 = vld4.16 {d16, d17, d18, d19}, [r0:128] +0x60,0xf9,0xbf,0x00 = vld4.32 {d16, d17, d18, d19}, [r0:256] +0x60,0xf9,0x3d,0x01 = vld4.8 {d16, d18, d20, d22}, [r0:256]! +0x60,0xf9,0x3d,0x11 = vld4.8 {d17, d19, d21, d23}, [r0:256]! +0x60,0xf9,0x4d,0x01 = vld4.16 {d16, d18, d20, d22}, [r0]! +0x60,0xf9,0x4d,0x11 = vld4.16 {d17, d19, d21, d23}, [r0]! +0x60,0xf9,0x8d,0x01 = vld4.32 {d16, d18, d20, d22}, [r0]! +0x60,0xf9,0x8d,0x11 = vld4.32 {d17, d19, d21, d23}, [r0]! +0xe0,0xf9,0x6f,0x00 = vld1.8 {d16[3]}, [r0] +0xe0,0xf9,0x9f,0x04 = vld1.16 {d16[2]}, [r0:16] +0xe0,0xf9,0xbf,0x08 = vld1.32 {d16[1]}, [r0:32] +0xe0,0xf9,0x3f,0x01 = vld2.8 {d16[1], d17[1]}, [r0:16] +0xe0,0xf9,0x5f,0x05 = vld2.16 {d16[1], d17[1]}, [r0:32] +0xe0,0xf9,0x8f,0x09 = vld2.32 {d16[1], d17[1]}, [r0] +0xe0,0xf9,0x6f,0x15 = vld2.16 {d17[1], d19[1]}, [r0] +0xe0,0xf9,0x5f,0x19 = vld2.32 {d17[0], d19[0]}, [r0:64] +0xe0,0xf9,0x2f,0x02 = vld3.8 {d16[1], d17[1], d18[1]}, [r0] +0xe0,0xf9,0x4f,0x06 = vld3.16 {d16[1], d17[1], d18[1]}, [r0] +0xe0,0xf9,0x8f,0x0a = vld3.32 {d16[1], d17[1], d18[1]}, [r0] +0xe0,0xf9,0x6f,0x06 = vld3.16 {d16[1], d18[1], d20[1]}, [r0] +0xe0,0xf9,0xcf,0x1a = vld3.32 {d17[1], d19[1], d21[1]}, [r0] +0xe0,0xf9,0x3f,0x03 = vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] +0xe0,0xf9,0x4f,0x07 = vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +0xe0,0xf9,0xaf,0x0b = vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] +0xe0,0xf9,0x7f,0x07 = vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] +0xe0,0xf9,0x4f,0x1b = vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/capstone/suite/MC/ARM/neont2-vst-encoding.s.cs b/capstone/suite/MC/ARM/neont2-vst-encoding.s.cs new file mode 100644 index 000000000..a7199255b --- /dev/null +++ b/capstone/suite/MC/ARM/neont2-vst-encoding.s.cs @@ -0,0 +1,48 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x40,0xf9,0x1f,0x07 = vst1.8 {d16}, [r0:64] +0x40,0xf9,0x4f,0x07 = vst1.16 {d16}, [r0] +0x40,0xf9,0x8f,0x07 = vst1.32 {d16}, [r0] +0x40,0xf9,0xcf,0x07 = vst1.64 {d16}, [r0] +0x40,0xf9,0x1f,0x0a = vst1.8 {d16, d17}, [r0:64] +0x40,0xf9,0x6f,0x0a = vst1.16 {d16, d17}, [r0:128] +0x40,0xf9,0x8f,0x0a = vst1.32 {d16, d17}, [r0] +0x40,0xf9,0xcf,0x0a = vst1.64 {d16, d17}, [r0] +0x40,0xf9,0x1f,0x08 = vst2.8 {d16, d17}, [r0:64] +0x40,0xf9,0x6f,0x08 = vst2.16 {d16, d17}, [r0:128] +0x40,0xf9,0x8f,0x08 = vst2.32 {d16, d17}, [r0] +0x40,0xf9,0x1f,0x03 = vst2.8 {d16, d17, d18, d19}, [r0:64] +0x40,0xf9,0x6f,0x03 = vst2.16 {d16, d17, d18, d19}, [r0:128] +0x40,0xf9,0xbf,0x03 = vst2.32 {d16, d17, d18, d19}, [r0:256] +0x40,0xf9,0x1f,0x04 = vst3.8 {d16, d17, d18}, [r0:64] +0x40,0xf9,0x4f,0x04 = vst3.16 {d16, d17, d18}, [r0] +0x40,0xf9,0x8f,0x04 = vst3.32 {d16, d17, d18}, [r0] +0x40,0xf9,0x1d,0x05 = vst3.8 {d16, d18, d20}, [r0:64]! +0x40,0xf9,0x1d,0x15 = vst3.8 {d17, d19, d21}, [r0:64]! +0x40,0xf9,0x4d,0x05 = vst3.16 {d16, d18, d20}, [r0]! +0x40,0xf9,0x4d,0x15 = vst3.16 {d17, d19, d21}, [r0]! +0x40,0xf9,0x8d,0x05 = vst3.32 {d16, d18, d20}, [r0]! +0x40,0xf9,0x8d,0x15 = vst3.32 {d17, d19, d21}, [r0]! +0x40,0xf9,0x1f,0x00 = vst4.8 {d16, d17, d18, d19}, [r0:64] +0x40,0xf9,0x6f,0x00 = vst4.16 {d16, d17, d18, d19}, [r0:128] +0x40,0xf9,0x3d,0x01 = vst4.8 {d16, d18, d20, d22}, [r0:256]! +0x40,0xf9,0x3d,0x11 = vst4.8 {d17, d19, d21, d23}, [r0:256]! +0x40,0xf9,0x4d,0x01 = vst4.16 {d16, d18, d20, d22}, [r0]! +0x40,0xf9,0x4d,0x11 = vst4.16 {d17, d19, d21, d23}, [r0]! +0x40,0xf9,0x8d,0x01 = vst4.32 {d16, d18, d20, d22}, [r0]! +0x40,0xf9,0x8d,0x11 = vst4.32 {d17, d19, d21, d23}, [r0]! +0xc0,0xf9,0x3f,0x01 = vst2.8 {d16[1], d17[1]}, [r0:16] +0xc0,0xf9,0x5f,0x05 = vst2.16 {d16[1], d17[1]}, [r0:32] +0xc0,0xf9,0x8f,0x09 = vst2.32 {d16[1], d17[1]}, [r0] +0xc0,0xf9,0x6f,0x15 = vst2.16 {d17[1], d19[1]}, [r0] +0xc0,0xf9,0x5f,0x19 = vst2.32 {d17[0], d19[0]}, [r0:64] +0xc0,0xf9,0x2f,0x02 = vst3.8 {d16[1], d17[1], d18[1]}, [r0] +0xc0,0xf9,0x4f,0x06 = vst3.16 {d16[1], d17[1], d18[1]}, [r0] +0xc0,0xf9,0x8f,0x0a = vst3.32 {d16[1], d17[1], d18[1]}, [r0] +0xc0,0xf9,0xaf,0x16 = vst3.16 {d17[2], d19[2], d21[2]}, [r0] +0xc0,0xf9,0x4f,0x0a = vst3.32 {d16[0], d18[0], d20[0]}, [r0] +0xc0,0xf9,0x3f,0x03 = vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] +0xc0,0xf9,0x4f,0x07 = vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +0xc0,0xf9,0xaf,0x0b = vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] +0xc0,0xf9,0xff,0x17 = vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0:64] +0xc0,0xf9,0x4f,0x1b = vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] +0x04,0xf9,0x0f,0x89 = vst2.8 {d8, d10}, [r4] diff --git a/capstone/suite/MC/ARM/simple-fp-encoding.s.cs b/capstone/suite/MC/ARM/simple-fp-encoding.s.cs new file mode 100644 index 000000000..9ce0f492d --- /dev/null +++ b/capstone/suite/MC/ARM/simple-fp-encoding.s.cs @@ -0,0 +1,122 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x80,0x0a,0x30,0xee = vadd.f32 s0, s1, s0 +0xc0,0x0a,0x30,0xee = vsub.f32 s0, s1, s0 +0x80,0x0a,0x80,0xee = vdiv.f32 s0, s1, s0 +0xa3,0x2a,0xc2,0xee = vdiv.f32 s5, s5, s7 +0x80,0x0a,0x20,0xee = vmul.f32 s0, s1, s0 +0xaa,0x5a,0x65,0xee = vmul.f32 s11, s11, s21 +0xc0,0x0a,0x20,0xee = vnmul.f32 s0, s1, s0 +0xc0,0x0a,0xf4,0xee = vcmpe.f32 s1, s0 +0xc0,0x0a,0xb5,0xee = vcmpe.f32 s0, #0 +0xc0,0x0a,0xb0,0xee = vabs.f32 s0, s0 +0x40,0x0a,0xb1,0xee = vneg.f32 s0, s0 +0xc0,0x0a,0xb1,0xee = vsqrt.f32 s0, s0 +0xc0,0x0a,0xb8,0xee = vcvt.f32.s32 s0, s0 +0x40,0x0a,0xb8,0xee = vcvt.f32.u32 s0, s0 +0xc0,0x0a,0xbd,0xee = vcvt.s32.f32 s0, s0 +0xc0,0x0a,0xbc,0xee = vcvt.u32.f32 s0, s0 +0x00,0x0a,0x41,0xee = vmla.f32 s1, s2, s0 +0x40,0x0a,0x41,0xee = vmls.f32 s1, s2, s0 +0x40,0x0a,0x51,0xee = vnmla.f32 s1, s2, s0 +0x00,0x0a,0x51,0xee = vnmls.f32 s1, s2, s0 +0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr +0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr +0x10,0xfa,0xf1,0xee = vmrs APSR_nzcv, fpscr +0x10,0x2a,0xf0,0xee = vmrs r2, fpsid +0x10,0x3a,0xf0,0xee = vmrs r3, fpsid +0x10,0x4a,0xf7,0xee = vmrs r4, mvfr0 +0x10,0x5a,0xf6,0xee = vmrs r5, mvfr1 +0x10,0x0a,0x00,0x1e = vmovne s0, r0 +0x10,0x1a,0x00,0x0e = vmoveq s0, r1 +0x10,0x1a,0x11,0xee = vmov r1, s2 +0x10,0x3a,0x02,0xee = vmov s4, r3 +0x12,0x1b,0x55,0xec = vmov r1, r5, d2 +0x14,0x3b,0x49,0xec = vmov d4, r3, r9 +0x10,0x0a,0xf1,0xee = vmrs r0, fpscr +0x10,0x0a,0xf8,0xee = vmrs r0, fpexc +0x10,0x0a,0xf0,0xee = vmrs r0, fpsid +0x10,0x1a,0xf9,0xee = vmrs r1, fpinst +0x10,0x8a,0xfa,0xee = vmrs r8, fpinst2 +0x10,0x0a,0xe1,0xee = vmsr fpscr, r0 +0x10,0x0a,0xe8,0xee = vmsr fpexc, r0 +0x10,0x0a,0xe0,0xee = vmsr fpsid, r0 +0x10,0x3a,0xe9,0xee = vmsr fpinst, r3 +0x10,0x4a,0xea,0xee = vmsr fpinst2, r4 +0x08,0x0a,0xb0,0xee = vmov.f32 s0, #3.000000e+00 +0x08,0x0a,0xb8,0xee = vmov.f32 s0, #-3.000000e+00 +0x10,0x0a,0x00,0xee = vmov s0, r0 +0x90,0x1a,0x00,0xee = vmov s1, r1 +0x10,0x2a,0x01,0xee = vmov s2, r2 +0x90,0x3a,0x01,0xee = vmov s3, r3 +0x10,0x0a,0x10,0xee = vmov r0, s0 +0x90,0x1a,0x10,0xee = vmov r1, s1 +0x10,0x2a,0x11,0xee = vmov r2, s2 +0x90,0x3a,0x11,0xee = vmov r3, s3 +0x30,0x0b,0x51,0xec = vmov r0, r1, d16 +0x31,0x1a,0x42,0xec = vmov s3, s4, r1, r2 +0x11,0x1a,0x42,0xec = vmov s2, s3, r1, r2 +0x31,0x1a,0x52,0xec = vmov r1, r2, s3, s4 +0x11,0x1a,0x52,0xec = vmov r1, r2, s2, s3 +0x1f,0x1b,0x42,0xec = vmov d15, r1, r2 +0x30,0x1b,0x42,0xec = vmov d16, r1, r2 +0x1f,0x1b,0x52,0xec = vmov r1, r2, d15 +0x30,0x1b,0x52,0xec = vmov r1, r2, d16 +0x00,0x1b,0xd0,0xed = vldr d17, [r0] +0x00,0x0a,0x9e,0xed = vldr s0, [lr] +0x00,0x0b,0x9e,0xed = vldr d0, [lr] +0x08,0x1b,0x92,0xed = vldr d1, [r2, #32] +0x08,0x1b,0x12,0xed = vldr d1, [r2, #-32] +0x00,0x2b,0x93,0xed = vldr d2, [r3] +0x00,0x3b,0x9f,0xed = vldr d3, [pc] +0x00,0x3b,0x9f,0xed = vldr d3, [pc] +0x00,0x3b,0x1f,0xed = vldr d3, [pc, #-0] +0x00,0x6a,0xd0,0xed = vldr s13, [r0] +0x08,0x0a,0xd2,0xed = vldr s1, [r2, #32] +0x08,0x0a,0x52,0xed = vldr s1, [r2, #-32] +0x00,0x1a,0x93,0xed = vldr s2, [r3] +0x00,0x2a,0xdf,0xed = vldr s5, [pc] +0x00,0x2a,0xdf,0xed = vldr s5, [pc] +0x00,0x2a,0x5f,0xed = vldr s5, [pc, #-0] +0x00,0x4b,0x81,0xed = vstr d4, [r1] +0x06,0x4b,0x81,0xed = vstr d4, [r1, #24] +0x06,0x4b,0x01,0xed = vstr d4, [r1, #-24] +0x00,0x0a,0x8e,0xed = vstr s0, [lr] +0x00,0x0b,0x8e,0xed = vstr d0, [lr] +0x00,0x2a,0x81,0xed = vstr s4, [r1] +0x06,0x2a,0x81,0xed = vstr s4, [r1, #24] +0x06,0x2a,0x01,0xed = vstr s4, [r1, #-24] +0x0c,0x2b,0x91,0xec = vldmia r1, {d2, d3, d4, d5, d6, d7} +0x06,0x1a,0x91,0xec = vldmia r1, {s2, s3, s4, s5, s6, s7} +0x0c,0x2b,0x81,0xec = vstmia r1, {d2, d3, d4, d5, d6, d7} +0x06,0x1a,0x81,0xec = vstmia r1, {s2, s3, s4, s5, s6, s7} +0x10,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12, d13, d14, d15} +0x07,0x0b,0xb5,0xec = fldmiax r5!, {d0, d1, d2} +0x05,0x4b,0x90,0x0c = fldmiaxeq r0, {d4, d5} +0x07,0x4b,0x35,0x1d = fldmdbxne r5!, {d4, d5, d6} +0x11,0x0b,0xa5,0xec = fstmiax r5!, {d0, d1, d2, d3, d4, d5, d6, d7} +0x05,0x8b,0x84,0x0c = fstmiaxeq r4, {d8, d9} +0x07,0x2b,0x27,0x1d = fstmdbxne r7!, {d2, d3, d4} +0x60,0x0a,0xbd,0xee = vcvtr.s32.f32 s0, s1 +0x60,0x0a,0xbc,0xee = vcvtr.u32.f32 s0, s1 +0x90,0x8a,0x00,0xee = vmov s1, r8 +0x10,0x4a,0x01,0xee = vmov s2, r4 +0x90,0x6a,0x01,0xee = vmov s3, r6 +0x10,0x1a,0x02,0xee = vmov s4, r1 +0x90,0x2a,0x02,0xee = vmov s5, r2 +0x10,0x3a,0x03,0xee = vmov s6, r3 +0x10,0x1a,0x14,0xee = vmov r1, s8 +0x10,0x2a,0x12,0xee = vmov r2, s4 +0x10,0x3a,0x13,0xee = vmov r3, s6 +0x90,0x4a,0x10,0xee = vmov r4, s1 +0x10,0x5a,0x11,0xee = vmov r5, s2 +0x90,0x6a,0x11,0xee = vmov r6, s3 +0xc6,0x0a,0xbb,0xee = vcvt.f32.u32 s0, s0, #20 +0x67,0x0a,0xbb,0xee = vcvt.f32.u16 s0, s0, #1 +0xc6,0x0a,0xfa,0xee = vcvt.f32.s32 s1, s1, #20 +0x67,0x8a,0xfa,0xee = vcvt.f32.s16 s17, s17, #1 +0xc6,0x6a,0xbf,0xee = vcvt.u32.f32 s12, s12, #20 +0x67,0xea,0xbf,0xee = vcvt.u16.f32 s28, s28, #1 +0xc6,0x0a,0xfe,0xee = vcvt.s32.f32 s1, s1, #20 +0x67,0x8a,0xfe,0xee = vcvt.s16.f32 s17, s17, #1 +0x10,0x40,0x80,0xf2 = vmov.i32 d4, #0x0 +0x12,0x46,0x84,0xf2 = vmov.i32 d4, #0x42000000 diff --git a/capstone/suite/MC/ARM/thumb-fp-armv8.s.cs b/capstone/suite/MC/ARM/thumb-fp-armv8.s.cs new file mode 100644 index 000000000..fc7c412f3 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb-fp-armv8.s.cs @@ -0,0 +1,51 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None +// 0xb2,0xee,0xe0,0x3b = vcvtt.f64.f16 d3, s1 +// 0xf3,0xee,0xcc,0x2b = vcvtt.f16.f64 s5, d12 +// 0xb2,0xee,0x60,0x3b = vcvtb.f64.f16 d3, s1 +// 0xb3,0xee,0x41,0x2b = vcvtb.f16.f64 s4, d1 +// 0xb2,0xee,0xe0,0x3b = vcvttge.f64.f16 d3, s1 +// 0xf3,0xee,0xcc,0x2b = vcvttgt.f16.f64 s5, d12 +// 0xb2,0xee,0x60,0x3b = vcvtbeq.f64.f16 d3, s1 +// 0xb3,0xee,0x41,0x2b = vcvtblt.f16.f64 s4, d1 +0xbc,0xfe,0xe1,0x1a = vcvta.s32.f32 s2, s3 +0xbc,0xfe,0xc3,0x1b = vcvta.s32.f64 s2, d3 +0xbd,0xfe,0xeb,0x3a = vcvtn.s32.f32 s6, s23 +0xbd,0xfe,0xe7,0x3b = vcvtn.s32.f64 s6, d23 +0xbe,0xfe,0xc2,0x0a = vcvtp.s32.f32 s0, s4 +0xbe,0xfe,0xc4,0x0b = vcvtp.s32.f64 s0, d4 +0xff,0xfe,0xc4,0x8a = vcvtm.s32.f32 s17, s8 +0xff,0xfe,0xc8,0x8b = vcvtm.s32.f64 s17, d8 +0xbc,0xfe,0x61,0x1a = vcvta.u32.f32 s2, s3 +0xbc,0xfe,0x43,0x1b = vcvta.u32.f64 s2, d3 +0xbd,0xfe,0x6b,0x3a = vcvtn.u32.f32 s6, s23 +0xbd,0xfe,0x67,0x3b = vcvtn.u32.f64 s6, d23 +0xbe,0xfe,0x42,0x0a = vcvtp.u32.f32 s0, s4 +0xbe,0xfe,0x44,0x0b = vcvtp.u32.f64 s0, d4 +0xff,0xfe,0x44,0x8a = vcvtm.u32.f32 s17, s8 +0xff,0xfe,0x48,0x8b = vcvtm.u32.f64 s17, d8 +0x20,0xfe,0xab,0x2a = vselge.f32 s4, s1, s23 +0x6f,0xfe,0xa7,0xeb = vselge.f64 d30, d31, d23 +0x30,0xfe,0x80,0x0a = vselgt.f32 s0, s1, s0 +0x3a,0xfe,0x24,0x5b = vselgt.f64 d5, d10, d20 +0x0e,0xfe,0x2b,0xfa = vseleq.f32 s30, s28, s23 +0x04,0xfe,0x08,0x2b = vseleq.f64 d2, d4, d8 +0x58,0xfe,0x07,0xaa = vselvs.f32 s21, s16, s14 +0x11,0xfe,0x2f,0x0b = vselvs.f64 d0, d1, d31 +0xc6,0xfe,0x00,0x2a = vmaxnm.f32 s5, s12, s0 +0x86,0xfe,0xae,0x5b = vmaxnm.f64 d5, d22, d30 +0x80,0xfe,0x46,0x0a = vminnm.f32 s0, s0, s12 +0x86,0xfe,0x49,0x4b = vminnm.f64 d4, d6, d9 +// 0xb6,0xee,0xcc,0x3b = vrintzge.f64 d3, d12 +0xf6,0xee,0xcc,0x1a = vrintz.f32 s3, s24 +// 0xb6,0xee,0x40,0x5b = vrintrlt.f64 d5, d0 +0xb6,0xee,0x64,0x0a = vrintr.f32 s0, s9 +// 0xf7,0xee,0x6e,0xcb = vrintxeq.f64 d28, d30 +// 0xb7,0xee,0x47,0x5a = vrintxvs.f32 s10, s14 +0xb8,0xfe,0x44,0x3b = vrinta.f64 d3, d4 +0xb8,0xfe,0x60,0x6a = vrinta.f32 s12, s1 +0xb9,0xfe,0x44,0x3b = vrintn.f64 d3, d4 +0xb9,0xfe,0x60,0x6a = vrintn.f32 s12, s1 +0xba,0xfe,0x44,0x3b = vrintp.f64 d3, d4 +0xba,0xfe,0x60,0x6a = vrintp.f32 s12, s1 +0xbb,0xfe,0x44,0x3b = vrintm.f64 d3, d4 +0xbb,0xfe,0x60,0x6a = vrintm.f32 s12, s1 diff --git a/capstone/suite/MC/ARM/thumb-hints.s.cs b/capstone/suite/MC/ARM/thumb-hints.s.cs new file mode 100644 index 000000000..ea9fd56c5 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb-hints.s.cs @@ -0,0 +1,12 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x00,0xbf = nop +0x10,0xbf = yield +0x20,0xbf = wfe +0x30,0xbf = wfi +0x40,0xbf = sev +0xbf,0xf3,0x5f,0x8f = dmb sy +0xbf,0xf3,0x5f,0x8f = dmb sy +0xbf,0xf3,0x4f,0x8f = dsb sy +0xbf,0xf3,0x4f,0x8f = dsb sy +0xbf,0xf3,0x6f,0x8f = isb sy +0xbf,0xf3,0x6f,0x8f = isb sy diff --git a/capstone/suite/MC/ARM/thumb-neon-crypto.s.cs b/capstone/suite/MC/ARM/thumb-neon-crypto.s.cs new file mode 100644 index 000000000..55bfd2c9c --- /dev/null +++ b/capstone/suite/MC/ARM/thumb-neon-crypto.s.cs @@ -0,0 +1,16 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None +0xb0,0xff,0x42,0x03 = aesd.8 q0, q1 +0xb0,0xff,0x02,0x03 = aese.8 q0, q1 +0xb0,0xff,0xc2,0x03 = aesimc.8 q0, q1 +0xb0,0xff,0x82,0x03 = aesmc.8 q0, q1 +0xb9,0xff,0xc2,0x02 = sha1h.32 q0, q1 +0xba,0xff,0x82,0x03 = sha1su1.32 q0, q1 +0xba,0xff,0xc2,0x03 = sha256su0.32 q0, q1 +0x02,0xef,0x44,0x0c = sha1c.32 q0, q1, q2 +0x22,0xef,0x44,0x0c = sha1m.32 q0, q1, q2 +0x12,0xef,0x44,0x0c = sha1p.32 q0, q1, q2 +0x32,0xef,0x44,0x0c = sha1su0.32 q0, q1, q2 +0x02,0xff,0x44,0x0c = sha256h.32 q0, q1, q2 +0x12,0xff,0x44,0x0c = sha256h2.32 q0, q1, q2 +0x22,0xff,0x44,0x0c = sha256su1.32 q0, q1, q2 +0xe0,0xef,0xa1,0x0e = vmull.p64 q8, d16, d17 diff --git a/capstone/suite/MC/ARM/thumb-neon-v8.s.cs b/capstone/suite/MC/ARM/thumb-neon-v8.s.cs new file mode 100644 index 000000000..51d892ff7 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb-neon-v8.s.cs @@ -0,0 +1,38 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_V8, None +0x05,0xff,0x11,0x4f = vmaxnm.f32 d4, d5, d1 +0x08,0xff,0x5c,0x4f = vmaxnm.f32 q2, q4, q6 +0x24,0xff,0x3e,0x5f = vminnm.f32 d5, d4, d30 +0x2a,0xff,0xd4,0x0f = vminnm.f32 q0, q13, q2 +0xbb,0xff,0x06,0x40 = vcvta.s32.f32 d4, d6 +0xbb,0xff,0x8a,0xc0 = vcvta.u32.f32 d12, d10 +0xbb,0xff,0x4c,0x80 = vcvta.s32.f32 q4, q6 +0xbb,0xff,0xe4,0x80 = vcvta.u32.f32 q4, q10 +0xbb,0xff,0x2e,0x13 = vcvtm.s32.f32 d1, d30 +0xbb,0xff,0x8a,0xc3 = vcvtm.u32.f32 d12, d10 +0xbb,0xff,0x64,0x23 = vcvtm.s32.f32 q1, q10 +0xfb,0xff,0xc2,0xa3 = vcvtm.u32.f32 q13, q1 +0xbb,0xff,0x21,0xf1 = vcvtn.s32.f32 d15, d17 +0xbb,0xff,0x83,0x51 = vcvtn.u32.f32 d5, d3 +0xbb,0xff,0x60,0x61 = vcvtn.s32.f32 q3, q8 +0xbb,0xff,0xc6,0xa1 = vcvtn.u32.f32 q5, q3 +0xbb,0xff,0x25,0xb2 = vcvtp.s32.f32 d11, d21 +0xbb,0xff,0xa7,0xe2 = vcvtp.u32.f32 d14, d23 +0xbb,0xff,0x6e,0x82 = vcvtp.s32.f32 q4, q15 +0xfb,0xff,0xe0,0x22 = vcvtp.u32.f32 q9, q8 +0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0 +0xba,0xff,0x48,0x24 = vrintn.f32 q1, q4 +0xba,0xff,0x8c,0x54 = vrintx.f32 d5, d12 +0xba,0xff,0xc6,0x04 = vrintx.f32 q0, q3 +0xba,0xff,0x00,0x35 = vrinta.f32 d3, d0 +0xfa,0xff,0x44,0x05 = vrinta.f32 q8, q2 +0xba,0xff,0xa2,0xc5 = vrintz.f32 d12, d18 +0xfa,0xff,0xc8,0x25 = vrintz.f32 q9, q4 +0xba,0xff,0x80,0x36 = vrintm.f32 d3, d0 +0xba,0xff,0xc8,0x26 = vrintm.f32 q1, q4 +0xba,0xff,0x80,0x37 = vrintp.f32 d3, d0 +0xba,0xff,0xc8,0x27 = vrintp.f32 q1, q4 +0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0 +0xba,0xff,0xc6,0x04 = vrintx.f32 q0, q3 +0xba,0xff,0x00,0x35 = vrinta.f32 d3, d0 +0xfa,0xff,0xc8,0x25 = vrintz.f32 q9, q4 +0xba,0xff,0xc8,0x27 = vrintp.f32 q1, q4 diff --git a/capstone/suite/MC/ARM/thumb-shift-encoding.s.cs b/capstone/suite/MC/ARM/thumb-shift-encoding.s.cs new file mode 100644 index 000000000..78efe20e7 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb-shift-encoding.s.cs @@ -0,0 +1,19 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x6e,0xeb,0x00,0x0c = sbc.w ip, lr, r0 +0x68,0xeb,0x19,0x01 = sbc.w r1, r8, r9, lsr #32 +0x67,0xeb,0x1f,0x42 = sbc.w r2, r7, pc, lsr #16 +0x66,0xeb,0x0a,0x03 = sbc.w r3, r6, r10 +0x65,0xeb,0x0e,0x44 = sbc.w r4, r5, lr, lsl #16 +0x64,0xeb,0x2b,0x05 = sbc.w r5, r4, r11, asr #32 +0x63,0xeb,0x2d,0x46 = sbc.w r6, r3, sp, asr #16 +0x62,0xeb,0x3c,0x07 = sbc.w r7, r2, r12, rrx +0x61,0xeb,0x30,0x48 = sbc.w r8, r1, r0, ror #16 +0x0e,0xea,0x00,0x0c = and.w ip, lr, r0 +0x08,0xea,0x19,0x01 = and.w r1, r8, r9, lsr #32 +0x07,0xea,0x1f,0x42 = and.w r2, r7, pc, lsr #16 +0x06,0xea,0x0a,0x03 = and.w r3, r6, r10 +0x05,0xea,0x0e,0x44 = and.w r4, r5, lr, lsl #16 +0x04,0xea,0x2b,0x05 = and.w r5, r4, r11, asr #32 +0x03,0xea,0x2d,0x46 = and.w r6, r3, sp, asr #16 +0x02,0xea,0x3c,0x07 = and.w r7, r2, r12, rrx +0x01,0xea,0x30,0x48 = and.w r8, r1, r0, ror #16 diff --git a/capstone/suite/MC/ARM/thumb.s.cs b/capstone/suite/MC/ARM/thumb.s.cs new file mode 100644 index 000000000..6d5bcbbb8 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb.s.cs @@ -0,0 +1,19 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x91,0x42 = cmp r1, r2 +0x16,0xbc = pop {r1, r2, r4} +0xfe,0xde = trap +0xc8,0x47 = blx r9 +0xd0,0x47 = blx r10 +0x1a,0xba = rev r2, r3 +0x63,0xba = rev16 r3, r4 +0xf5,0xba = revsh r5, r6 +0x5a,0xb2 = sxtb r2, r3 +0x1a,0xb2 = sxth r2, r3 +0x2c,0x42 = tst r4, r5 +0xf3,0xb2 = uxtb r3, r6 +0xb3,0xb2 = uxth r3, r6 +0x8b,0x58 = ldr r3, [r1, r2] +0x02,0xbe = bkpt #2 +0xc0,0x46 = mov r8, r8 +0x67,0xb6 = cpsie aif +0x78,0x46 = mov r0, pc diff --git a/capstone/suite/MC/ARM/thumb2-b.w-encodingT4.s.cs b/capstone/suite/MC/ARM/thumb2-b.w-encodingT4.s.cs new file mode 100644 index 000000000..6927f57cb --- /dev/null +++ b/capstone/suite/MC/ARM/thumb2-b.w-encodingT4.s.cs @@ -0,0 +1,2 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x36,0xf0,0x06,0xbc = b.w #223248 diff --git a/capstone/suite/MC/ARM/thumb2-branches.s.cs b/capstone/suite/MC/ARM/thumb2-branches.s.cs new file mode 100644 index 000000000..98a729237 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb2-branches.s.cs @@ -0,0 +1,82 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +// 0xff,0xf7,0x00,0xbc = b.w #-2044 +// 0x00,0xf0,0xff,0xbb = b.w #2050 +// 0x66,0xf6,0x30,0xbc = b.w #-1677212 +// 0x99,0xf1,0xcf,0xbb = b.w #1677218 +// 0x00,0xe4 = b #-2044 +0xff,0xe3 = b #2050 +0xff,0xf7,0xff,0xbb = b.w #-2046 +0x00,0xf0,0x00,0xbc = b.w #2052 +// 0x66,0xf6,0x30,0xbc = b.w #-1677212 +// 0x99,0xf1,0xcf,0xbb = b.w #1677218 +0x08,0xbf = it eq +// 0x00,0xe4 = beq #-2044 +0x18,0xbf = it ne +// 0x01,0xe4 = bne #-2042 +0xc8,0xbf = it gt +// 0xff,0xf7,0x00,0xbc = bgt.w #-2044 +0xd8,0xbf = it le +// 0x00,0xf0,0xff,0xbb = ble.w #2050 +0xa8,0xbf = it ge +// 0x66,0xf6,0x30,0xbc = bge.w #-1677212 +0xb8,0xbf = it lt +// 0x99,0xf1,0xcf,0xbb = blt.w #1677218 +0x80,0xd0 = beq #-252 +0x7f,0xd1 = bne #258 +0x3f,0xf5,0x80,0xaf = bmi.w #-252 +0x40,0xf0,0x7f,0x80 = bne.w #258 +0xc0,0xf6,0x00,0x80 = blt.w #-1048572 +0xbf,0xf2,0xff,0xaf = bge.w #1048578 +0x80,0xd1 = bne #-252 +0x7f,0xdc = bgt #258 +0x7f,0xf4,0x7f,0xaf = bne.w #-254 +0x00,0xf3,0x80,0x80 = bgt.w #260 +0x40,0xf4,0x00,0x80 = bne.w #-1048572 +0x3f,0xf3,0xff,0xaf = bgt.w #1048578 +0x08,0xbf = it eq +// 0x08,0x44 = addeq r0, r1 +0x40,0xd1 = bne #132 +0x0c,0xbf = ite eq +// 0x08,0x44 = addeq r0, r1 +// 0x40,0xe0 = bne #132 +// 0x00,0xe4 = b #-2044 +// 0xff,0xf7,0x00,0xbc = b.w #-2044 +// 0x00,0xf0,0xff,0xbb = b.w #2050 +// 0x66,0xf6,0x30,0xbc = b.w #-1677212 +// 0x99,0xf1,0xcf,0xbb = b.w #1677218 +// 0x00,0xe4 = b #-2044 +0xff,0xe3 = b #2050 +0xff,0xf7,0xff,0xbb = b.w #-2046 +0x00,0xf0,0x00,0xbc = b.w #2052 +// 0x66,0xf6,0x30,0xbc = b.w #-1677212 +// 0x99,0xf1,0xcf,0xbb = b.w #1677218 +0x08,0xbf = it eq +// 0x00,0xe4 = beq #-2044 +0x18,0xbf = it ne +// 0x01,0xe4 = bne #-2042 +0xc8,0xbf = it gt +// 0xff,0xf7,0x00,0xbc = bgt.w #-2044 +0xd8,0xbf = it le +// 0x00,0xf0,0xff,0xbb = ble.w #2050 +0xa8,0xbf = it ge +// 0x66,0xf6,0x30,0xbc = bge.w #-1677212 +0xb8,0xbf = it lt +// 0x99,0xf1,0xcf,0xbb = blt.w #1677218 +0x80,0xd0 = beq #-252 +0x7f,0xd1 = bne #258 +0x3f,0xf5,0x80,0xaf = bmi.w #-252 +0x40,0xf0,0x7f,0x80 = bne.w #258 +0xc0,0xf6,0x00,0x80 = blt.w #-1048572 +0xbf,0xf2,0xff,0xaf = bge.w #1048578 +0x80,0xd1 = bne #-252 +0x7f,0xdc = bgt #258 +0x7f,0xf4,0x7f,0xaf = bne.w #-254 +0x00,0xf3,0x80,0x80 = bgt.w #260 +0x40,0xf4,0x00,0x80 = bne.w #-1048572 +0x3f,0xf3,0xff,0xaf = bgt.w #1048578 +0x08,0xbf = it eq +// 0x08,0x44 = addeq r0, r1 +0x40,0xd1 = bne #132 +0x0c,0xbf = ite eq +// 0x08,0x44 = addeq r0, r1 +// 0x40,0xe0 = b #132 diff --git a/capstone/suite/MC/ARM/thumb2-mclass.s.cs b/capstone/suite/MC/ARM/thumb2-mclass.s.cs new file mode 100644 index 000000000..62446148d --- /dev/null +++ b/capstone/suite/MC/ARM/thumb2-mclass.s.cs @@ -0,0 +1,41 @@ +# CS_ARCH_ARM, CS_MODE_THUMB+CS_MODE_MCLASS, None +0xef,0xf3,0x00,0x80 = mrs r0, apsr +0xef,0xf3,0x01,0x80 = mrs r0, iapsr +0xef,0xf3,0x02,0x80 = mrs r0, eapsr +0xef,0xf3,0x03,0x80 = mrs r0, xpsr +0xef,0xf3,0x05,0x80 = mrs r0, ipsr +0xef,0xf3,0x06,0x80 = mrs r0, epsr +0xef,0xf3,0x07,0x80 = mrs r0, iepsr +0xef,0xf3,0x08,0x80 = mrs r0, msp +0xef,0xf3,0x09,0x80 = mrs r0, psp +0xef,0xf3,0x10,0x80 = mrs r0, primask +0xef,0xf3,0x11,0x80 = mrs r0, basepri +0xef,0xf3,0x12,0x80 = mrs r0, basepri_max +0xef,0xf3,0x13,0x80 = mrs r0, faultmask +0xef,0xf3,0x14,0x80 = mrs r0, control +// 0x80,0xf3,0x00,0x88 = msr apsr, r0 +// 0x80,0xf3,0x00,0x88 = msr apsr, r0 +0x80,0xf3,0x00,0x84 = msr apsr_g, r0 +0x80,0xf3,0x00,0x8c = msr apsr_nzcvqg, r0 +// 0x80,0xf3,0x01,0x88 = msr iapsr, r0 +// 0x80,0xf3,0x01,0x88 = msr iapsr, r0 +0x80,0xf3,0x01,0x84 = msr iapsr_g, r0 +0x80,0xf3,0x01,0x8c = msr iapsr_nzcvqg, r0 +// 0x80,0xf3,0x02,0x88 = msr eapsr, r0 +// 0x80,0xf3,0x02,0x88 = msr eapsr, r0 +0x80,0xf3,0x02,0x84 = msr eapsr_g, r0 +0x80,0xf3,0x02,0x8c = msr eapsr_nzcvqg, r0 +// 0x80,0xf3,0x03,0x88 = msr xpsr, r0 +// 0x80,0xf3,0x03,0x88 = msr xpsr, r0 +0x80,0xf3,0x03,0x84 = msr xpsr_g, r0 +0x80,0xf3,0x03,0x8c = msr xpsr_nzcvqg, r0 +0x80,0xf3,0x05,0x88 = msr ipsr, r0 +0x80,0xf3,0x06,0x88 = msr epsr, r0 +0x80,0xf3,0x07,0x88 = msr iepsr, r0 +0x80,0xf3,0x08,0x88 = msr msp, r0 +0x80,0xf3,0x09,0x88 = msr psp, r0 +0x80,0xf3,0x10,0x88 = msr primask, r0 +0x80,0xf3,0x11,0x88 = msr basepri, r0 +0x80,0xf3,0x12,0x88 = msr basepri_max, r0 +0x80,0xf3,0x13,0x88 = msr faultmask, r0 +0x80,0xf3,0x14,0x88 = msr control, r0 diff --git a/capstone/suite/MC/ARM/thumb2-narrow-dp.ll.cs b/capstone/suite/MC/ARM/thumb2-narrow-dp.ll.cs new file mode 100644 index 000000000..8040e8b56 --- /dev/null +++ b/capstone/suite/MC/ARM/thumb2-narrow-dp.ll.cs @@ -0,0 +1,379 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x12,0xea,0x01,0x00 = ands.w r0, r2, r1 +0x0a,0x40 = ands r2, r1 +0x0a,0x40 = ands r2, r1 +0x10,0xea,0x01,0x00 = ands.w r0, r0, r1 +0x11,0xea,0x03,0x03 = ands.w r3, r1, r3 +0x01,0xea,0x00,0x00 = and.w r0, r1, r0 +// 0x0f,0x40 = ands r7, r1 +// 0x0f,0x40 = ands r7, r1 +0x11,0xea,0x08,0x08 = ands.w r8, r1, r8 +0x18,0xea,0x01,0x08 = ands.w r8, r8, r1 +0x18,0xea,0x00,0x00 = ands.w r0, r8, r0 +0x11,0xea,0x08,0x01 = ands.w r1, r1, r8 +0x12,0xea,0x41,0x02 = ands.w r2, r2, r1, lsl #1 +0x11,0xea,0x50,0x00 = ands.w r0, r1, r0, lsr #1 +0x08,0xbf = it eq +// 0x02,0xea,0x01,0x00 = andeq.w r0, r2, r1 +0x08,0xbf = it eq +// 0x0b,0x40 = andeq r3, r1 +0x08,0xbf = it eq +// 0x0b,0x40 = andeq r3, r1 +0x08,0xbf = it eq +// 0x00,0xea,0x01,0x00 = andeq.w r0, r0, r1 +0x08,0xbf = it eq +// 0x01,0xea,0x02,0x02 = andeq.w r2, r1, r2 +0x08,0xbf = it eq +// 0x11,0xea,0x00,0x00 = andseq.w r0, r1, r0 +0x08,0xbf = it eq +// 0x0f,0x40 = andeq r7, r1 +0x08,0xbf = it eq +// 0x0f,0x40 = andeq r7, r1 +0x08,0xbf = it eq +// 0x01,0xea,0x08,0x08 = andeq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x08,0xea,0x01,0x08 = andeq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x08,0xea,0x04,0x04 = andeq.w r4, r8, r4 +0x08,0xbf = it eq +// 0x04,0xea,0x08,0x04 = andeq.w r4, r4, r8 +0x08,0xbf = it eq +// 0x00,0xea,0x41,0x00 = andeq.w r0, r0, r1, lsl #1 +0x08,0xbf = it eq +// 0x01,0xea,0x55,0x05 = andeq.w r5, r1, r5, lsr #1 +0x92,0xea,0x01,0x00 = eors.w r0, r2, r1 +0x4d,0x40 = eors r5, r1 +0x4d,0x40 = eors r5, r1 +0x90,0xea,0x01,0x00 = eors.w r0, r0, r1 +0x91,0xea,0x02,0x02 = eors.w r2, r1, r2 +0x81,0xea,0x01,0x01 = eor.w r1, r1, r1 +// 0x4f,0x40 = eors r7, r1 +// 0x4f,0x40 = eors r7, r1 +0x91,0xea,0x08,0x08 = eors.w r8, r1, r8 +0x98,0xea,0x01,0x08 = eors.w r8, r8, r1 +0x98,0xea,0x06,0x06 = eors.w r6, r8, r6 +0x90,0xea,0x08,0x00 = eors.w r0, r0, r8 +0x92,0xea,0x41,0x02 = eors.w r2, r2, r1, lsl #1 +0x91,0xea,0x50,0x00 = eors.w r0, r1, r0, lsr #1 +0x08,0xbf = it eq +// 0x82,0xea,0x01,0x03 = eoreq.w r3, r2, r1 +0x08,0xbf = it eq +// 0x48,0x40 = eoreq r0, r1 +0x08,0xbf = it eq +// 0x4a,0x40 = eoreq r2, r1 +0x08,0xbf = it eq +// 0x83,0xea,0x01,0x03 = eoreq.w r3, r3, r1 +0x08,0xbf = it eq +// 0x81,0xea,0x00,0x00 = eoreq.w r0, r1, r0 +0x08,0xbf = it eq +// 0x91,0xea,0x01,0x01 = eorseq.w r1, r1, r1 +0x08,0xbf = it eq +// 0x4f,0x40 = eoreq r7, r1 +0x08,0xbf = it eq +// 0x4f,0x40 = eoreq r7, r1 +0x08,0xbf = it eq +// 0x81,0xea,0x08,0x08 = eoreq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x88,0xea,0x01,0x08 = eoreq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x88,0xea,0x00,0x00 = eoreq.w r0, r8, r0 +0x08,0xbf = it eq +// 0x83,0xea,0x08,0x03 = eoreq.w r3, r3, r8 +0x08,0xbf = it eq +// 0x84,0xea,0x41,0x04 = eoreq.w r4, r4, r1, lsl #1 +0x08,0xbf = it eq +// 0x81,0xea,0x50,0x00 = eoreq.w r0, r1, r0, lsr #1 +0x12,0xfa,0x01,0xf0 = lsls.w r0, r2, r1 +// 0x8a,0x40 = lsls r2, r1 +0x11,0xfa,0x02,0xf2 = lsls.w r2, r1, r2 +0x10,0xfa,0x01,0xf0 = lsls.w r0, r0, r1 +// 0x11,0xfa,0x04,0xf4 = lsls.w r4, r1, r4 +0x01,0xfa,0x04,0xf4 = lsl.w r4, r1, r4 +// 0x8f,0x40 = lsls r7, r1 +0x11,0xfa,0x08,0xf8 = lsls.w r8, r1, r8 +0x18,0xfa,0x01,0xf8 = lsls.w r8, r8, r1 +0x18,0xfa,0x03,0xf3 = lsls.w r3, r8, r3 +0x15,0xfa,0x08,0xf5 = lsls.w r5, r5, r8 +0x08,0xbf = it eq +// 0x02,0xfa,0x01,0xf0 = lsleq.w r0, r2, r1 +0x08,0xbf = it eq +// 0x8a,0x40 = lsleq r2, r1 +0x08,0xbf = it eq +// 0x01,0xfa,0x02,0xf2 = lsleq.w r2, r1, r2 +0x08,0xbf = it eq +// 0x00,0xfa,0x01,0xf0 = lsleq.w r0, r0, r1 +0x08,0xbf = it eq +// 0x01,0xfa,0x03,0xf3 = lsleq.w r3, r1, r3 +0x08,0xbf = it eq +// 0x11,0xfa,0x04,0xf4 = lslseq.w r4, r1, r4 +0x08,0xbf = it eq +// 0x8f,0x40 = lsleq r7, r1 +0x08,0xbf = it eq +// 0x01,0xfa,0x08,0xf8 = lsleq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x08,0xfa,0x01,0xf8 = lsleq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x08,0xfa,0x00,0xf0 = lsleq.w r0, r8, r0 +0x08,0xbf = it eq +// 0x03,0xfa,0x08,0xf3 = lsleq.w r3, r3, r8 +0x32,0xfa,0x01,0xf6 = lsrs.w r6, r2, r1 +0xca,0x40 = lsrs r2, r1 +0x31,0xfa,0x02,0xf2 = lsrs.w r2, r1, r2 +0x32,0xfa,0x01,0xf2 = lsrs.w r2, r2, r1 +0x31,0xfa,0x03,0xf3 = lsrs.w r3, r1, r3 +0x21,0xfa,0x04,0xf4 = lsr.w r4, r1, r4 +// 0xcf,0x40 = lsrs r7, r1 +0x31,0xfa,0x08,0xf8 = lsrs.w r8, r1, r8 +0x38,0xfa,0x01,0xf8 = lsrs.w r8, r8, r1 +0x38,0xfa,0x02,0xf2 = lsrs.w r2, r8, r2 +0x35,0xfa,0x08,0xf5 = lsrs.w r5, r5, r8 +0x08,0xbf = it eq +// 0x22,0xfa,0x01,0xf6 = lsreq.w r6, r2, r1 +0x08,0xbf = it eq +// 0xcf,0x40 = lsreq r7, r1 +0x08,0xbf = it eq +// 0x21,0xfa,0x07,0xf7 = lsreq.w r7, r1, r7 +0x08,0xbf = it eq +// 0x27,0xfa,0x01,0xf7 = lsreq.w r7, r7, r1 +0x08,0xbf = it eq +// 0x21,0xfa,0x02,0xf2 = lsreq.w r2, r1, r2 +0x08,0xbf = it eq +// 0x31,0xfa,0x00,0xf0 = lsrseq.w r0, r1, r0 +0x08,0xbf = it eq +// 0xcf,0x40 = lsreq r7, r1 +0x08,0xbf = it eq +// 0x21,0xfa,0x08,0xf8 = lsreq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x28,0xfa,0x01,0xf8 = lsreq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x28,0xfa,0x01,0xf1 = lsreq.w r1, r8, r1 +0x08,0xbf = it eq +// 0x24,0xfa,0x08,0xf4 = lsreq.w r4, r4, r8 +0x56,0xfa,0x05,0xf7 = asrs.w r7, r6, r5 +0x08,0x41 = asrs r0, r1 +0x51,0xfa,0x00,0xf0 = asrs.w r0, r1, r0 +0x53,0xfa,0x01,0xf3 = asrs.w r3, r3, r1 +0x51,0xfa,0x01,0xf1 = asrs.w r1, r1, r1 +0x41,0xfa,0x00,0xf0 = asr.w r0, r1, r0 +// 0x0f,0x41 = asrs r7, r1 +0x51,0xfa,0x08,0xf8 = asrs.w r8, r1, r8 +0x58,0xfa,0x01,0xf8 = asrs.w r8, r8, r1 +0x58,0xfa,0x05,0xf5 = asrs.w r5, r8, r5 +0x55,0xfa,0x08,0xf5 = asrs.w r5, r5, r8 +0x08,0xbf = it eq +// 0x42,0xfa,0x01,0xf0 = asreq.w r0, r2, r1 +0x08,0xbf = it eq +// 0x0a,0x41 = asreq r2, r1 +0x08,0xbf = it eq +// 0x42,0xfa,0x01,0xf1 = asreq.w r1, r2, r1 +0x08,0xbf = it eq +// 0x44,0xfa,0x01,0xf4 = asreq.w r4, r4, r1 +0x08,0xbf = it eq +// 0x41,0xfa,0x06,0xf6 = asreq.w r6, r1, r6 +0x08,0xbf = it eq +// 0x51,0xfa,0x03,0xf3 = asrseq.w r3, r1, r3 +0x08,0xbf = it eq +// 0x0f,0x41 = asreq r7, r1 +0x08,0xbf = it eq +// 0x41,0xfa,0x08,0xf8 = asreq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x48,0xfa,0x01,0xf8 = asreq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x48,0xfa,0x01,0xf1 = asreq.w r1, r8, r1 +0x08,0xbf = it eq +// 0x43,0xfa,0x08,0xf3 = asreq.w r3, r3, r8 +0x52,0xeb,0x01,0x05 = adcs.w r5, r2, r1 +0x4d,0x41 = adcs r5, r1 +// 0x4b,0x41 = adcs r3, r1 +0x52,0xeb,0x01,0x02 = adcs.w r2, r2, r1 +// 0x51,0xeb,0x03,0x03 = adcs.w r3, r1, r3 +// 0x41,0xeb,0x00,0x00 = adc.w r0, r1, r0 +// 0x4f,0x41 = adcs r7, r1 +// 0x4f,0x41 = adcs r7, r1 +0x51,0xeb,0x08,0x08 = adcs.w r8, r1, r8 +0x58,0xeb,0x01,0x08 = adcs.w r8, r8, r1 +0x58,0xeb,0x05,0x05 = adcs.w r5, r8, r5 +0x52,0xeb,0x08,0x02 = adcs.w r2, r2, r8 +0x53,0xeb,0x41,0x03 = adcs.w r3, r3, r1, lsl #1 +0x51,0xeb,0x54,0x04 = adcs.w r4, r1, r4, lsr #1 +0x08,0xbf = it eq +// 0x42,0xeb,0x03,0x01 = adceq.w r1, r2, r3 +0x08,0xbf = it eq +// 0x49,0x41 = adceq r1, r1 +0x08,0xbf = it eq +// 0x4b,0x41 = adceq r3, r1 +0x08,0xbf = it eq +// 0x43,0xeb,0x01,0x03 = adceq.w r3, r3, r1 +0x08,0xbf = it eq +// 0x41,0xeb,0x00,0x00 = adceq.w r0, r1, r0 +0x08,0xbf = it eq +// 0x51,0xeb,0x03,0x03 = adcseq.w r3, r1, r3 +0x08,0xbf = it eq +// 0x4f,0x41 = adceq r7, r1 +0x08,0xbf = it eq +// 0x4f,0x41 = adceq r7, r1 +0x08,0xbf = it eq +// 0x41,0xeb,0x08,0x08 = adceq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x48,0xeb,0x01,0x08 = adceq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x48,0xeb,0x03,0x03 = adceq.w r3, r8, r3 +0x08,0xbf = it eq +// 0x41,0xeb,0x08,0x01 = adceq.w r1, r1, r8 +0x08,0xbf = it eq +// 0x42,0xeb,0x41,0x02 = adceq.w r2, r2, r1, lsl #1 +0x08,0xbf = it eq +// 0x41,0xeb,0x51,0x01 = adceq.w r1, r1, r1, lsr #1 +0x72,0xeb,0x01,0x03 = sbcs.w r3, r2, r1 +0x8c,0x41 = sbcs r4, r1 +0x74,0xeb,0x01,0x01 = sbcs.w r1, r4, r1 +0x74,0xeb,0x01,0x04 = sbcs.w r4, r4, r1 +// 0x71,0xeb,0x02,0x02 = sbcs.w r2, r1, r2 +// 0x61,0xeb,0x00,0x00 = sbc.w r0, r1, r0 +// 0x8f,0x41 = sbcs r7, r1 +0x71,0xeb,0x08,0x08 = sbcs.w r8, r1, r8 +0x78,0xeb,0x01,0x08 = sbcs.w r8, r8, r1 +0x78,0xeb,0x04,0x04 = sbcs.w r4, r8, r4 +0x73,0xeb,0x08,0x03 = sbcs.w r3, r3, r8 +0x72,0xeb,0x41,0x02 = sbcs.w r2, r2, r1, lsl #1 +0x71,0xeb,0x55,0x05 = sbcs.w r5, r1, r5, lsr #1 +0x08,0xbf = it eq +// 0x62,0xeb,0x01,0x05 = sbceq.w r5, r2, r1 +0x08,0xbf = it eq +// 0x8d,0x41 = sbceq r5, r1 +0x08,0xbf = it eq +// 0x65,0xeb,0x01,0x01 = sbceq.w r1, r5, r1 +0x08,0xbf = it eq +// 0x65,0xeb,0x01,0x05 = sbceq.w r5, r5, r1 +0x08,0xbf = it eq +// 0x61,0xeb,0x00,0x00 = sbceq.w r0, r1, r0 +0x08,0xbf = it eq +// 0x71,0xeb,0x02,0x02 = sbcseq.w r2, r1, r2 +0x08,0xbf = it eq +// 0x8f,0x41 = sbceq r7, r1 +0x08,0xbf = it eq +// 0x61,0xeb,0x08,0x08 = sbceq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x68,0xeb,0x01,0x08 = sbceq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x68,0xeb,0x07,0x07 = sbceq.w r7, r8, r7 +0x08,0xbf = it eq +// 0x67,0xeb,0x08,0x07 = sbceq.w r7, r7, r8 +0x08,0xbf = it eq +// 0x62,0xeb,0x41,0x02 = sbceq.w r2, r2, r1, lsl #1 +0x08,0xbf = it eq +// 0x61,0xeb,0x55,0x05 = sbceq.w r5, r1, r5, lsr #1 +0x72,0xfa,0x01,0xf3 = rors.w r3, r2, r1 +0xc8,0x41 = rors r0, r1 +0x70,0xfa,0x01,0xf1 = rors.w r1, r0, r1 +0x72,0xfa,0x01,0xf2 = rors.w r2, r2, r1 +0x71,0xfa,0x02,0xf2 = rors.w r2, r1, r2 +0x61,0xfa,0x05,0xf5 = ror.w r5, r1, r5 +// 0xcf,0x41 = rors r7, r1 +0x71,0xfa,0x08,0xf8 = rors.w r8, r1, r8 +0x78,0xfa,0x01,0xf8 = rors.w r8, r8, r1 +0x78,0xfa,0x06,0xf6 = rors.w r6, r8, r6 +0x76,0xfa,0x08,0xf6 = rors.w r6, r6, r8 +0x08,0xbf = it eq +// 0x62,0xfa,0x01,0xf4 = roreq.w r4, r2, r1 +0x08,0xbf = it eq +// 0xcc,0x41 = roreq r4, r1 +0x08,0xbf = it eq +// 0x64,0xfa,0x01,0xf1 = roreq.w r1, r4, r1 +0x08,0xbf = it eq +// 0x64,0xfa,0x01,0xf4 = roreq.w r4, r4, r1 +0x08,0xbf = it eq +// 0x61,0xfa,0x00,0xf0 = roreq.w r0, r1, r0 +0x08,0xbf = it eq +// 0x71,0xfa,0x00,0xf0 = rorseq.w r0, r1, r0 +0x08,0xbf = it eq +// 0xcf,0x41 = roreq r7, r1 +0x08,0xbf = it eq +// 0x61,0xfa,0x08,0xf8 = roreq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x68,0xfa,0x01,0xf8 = roreq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x68,0xfa,0x03,0xf3 = roreq.w r3, r8, r3 +0x08,0xbf = it eq +// 0x61,0xfa,0x08,0xf1 = roreq.w r1, r1, r8 +0x52,0xea,0x01,0x07 = orrs.w r7, r2, r1 +0x0a,0x43 = orrs r2, r1 +0x0b,0x43 = orrs r3, r1 +0x54,0xea,0x01,0x04 = orrs.w r4, r4, r1 +0x51,0xea,0x05,0x05 = orrs.w r5, r1, r5 +0x41,0xea,0x02,0x02 = orr.w r2, r1, r2 +// 0x0f,0x43 = orrs r7, r1 +// 0x0f,0x43 = orrs r7, r1 +0x51,0xea,0x08,0x08 = orrs.w r8, r1, r8 +0x58,0xea,0x01,0x08 = orrs.w r8, r8, r1 +0x58,0xea,0x01,0x01 = orrs.w r1, r8, r1 +0x50,0xea,0x08,0x00 = orrs.w r0, r0, r8 +0x51,0xea,0x41,0x01 = orrs.w r1, r1, r1, lsl #1 +0x51,0xea,0x50,0x00 = orrs.w r0, r1, r0, lsr #1 +0x08,0xbf = it eq +// 0x42,0xea,0x01,0x00 = orreq.w r0, r2, r1 +0x08,0xbf = it eq +// 0x0d,0x43 = orreq r5, r1 +0x08,0xbf = it eq +// 0x0d,0x43 = orreq r5, r1 +0x08,0xbf = it eq +// 0x42,0xea,0x01,0x02 = orreq.w r2, r2, r1 +0x08,0xbf = it eq +// 0x41,0xea,0x03,0x03 = orreq.w r3, r1, r3 +0x08,0xbf = it eq +// 0x51,0xea,0x04,0x04 = orrseq.w r4, r1, r4 +0x08,0xbf = it eq +// 0x0f,0x43 = orreq r7, r1 +0x08,0xbf = it eq +// 0x0f,0x43 = orreq r7, r1 +0x08,0xbf = it eq +// 0x41,0xea,0x08,0x08 = orreq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x48,0xea,0x01,0x08 = orreq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x48,0xea,0x00,0x00 = orreq.w r0, r8, r0 +0x08,0xbf = it eq +// 0x40,0xea,0x08,0x00 = orreq.w r0, r0, r8 +0x08,0xbf = it eq +// 0x42,0xea,0x41,0x02 = orreq.w r2, r2, r1, lsl #1 +0x08,0xbf = it eq +// 0x41,0xea,0x52,0x02 = orreq.w r2, r1, r2, lsr #1 +0x32,0xea,0x01,0x03 = bics.w r3, r2, r1 +0x8a,0x43 = bics r2, r1 +0x32,0xea,0x01,0x01 = bics.w r1, r2, r1 +0x32,0xea,0x01,0x02 = bics.w r2, r2, r1 +0x31,0xea,0x00,0x00 = bics.w r0, r1, r0 +0x21,0xea,0x00,0x00 = bic.w r0, r1, r0 +// 0x8f,0x43 = bics r7, r1 +0x31,0xea,0x08,0x08 = bics.w r8, r1, r8 +0x38,0xea,0x01,0x08 = bics.w r8, r8, r1 +0x38,0xea,0x07,0x07 = bics.w r7, r8, r7 +0x35,0xea,0x08,0x05 = bics.w r5, r5, r8 +0x33,0xea,0x41,0x03 = bics.w r3, r3, r1, lsl #1 +0x31,0xea,0x54,0x04 = bics.w r4, r1, r4, lsr #1 +0x08,0xbf = it eq +// 0x22,0xea,0x01,0x00 = biceq.w r0, r2, r1 +0x08,0xbf = it eq +// 0x8d,0x43 = biceq r5, r1 +0x08,0xbf = it eq +// 0x25,0xea,0x01,0x01 = biceq.w r1, r5, r1 +0x08,0xbf = it eq +// 0x24,0xea,0x01,0x04 = biceq.w r4, r4, r1 +0x08,0xbf = it eq +// 0x21,0xea,0x02,0x02 = biceq.w r2, r1, r2 +0x08,0xbf = it eq +// 0x31,0xea,0x05,0x05 = bicseq.w r5, r1, r5 +0x08,0xbf = it eq +// 0x8f,0x43 = biceq r7, r1 +0x08,0xbf = it eq +// 0x21,0xea,0x08,0x08 = biceq.w r8, r1, r8 +0x08,0xbf = it eq +// 0x28,0xea,0x01,0x08 = biceq.w r8, r8, r1 +0x08,0xbf = it eq +// 0x28,0xea,0x00,0x00 = biceq.w r0, r8, r0 +0x08,0xbf = it eq +// 0x22,0xea,0x08,0x02 = biceq.w r2, r2, r8 +0x08,0xbf = it eq +// 0x24,0xea,0x41,0x04 = biceq.w r4, r4, r1, lsl #1 +0x08,0xbf = it eq +// 0x21,0xea,0x55,0x05 = biceq.w r5, r1, r5, lsr #1 diff --git a/capstone/suite/MC/ARM/thumb2-pldw.s.cs b/capstone/suite/MC/ARM/thumb2-pldw.s.cs new file mode 100644 index 000000000..0c367168f --- /dev/null +++ b/capstone/suite/MC/ARM/thumb2-pldw.s.cs @@ -0,0 +1,2 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0xb0,0xf8,0x01,0xf1 = pldw [r0, #257] diff --git a/capstone/suite/MC/ARM/vfp4-thumb.s.cs b/capstone/suite/MC/ARM/vfp4-thumb.s.cs new file mode 100644 index 000000000..65be67a9d --- /dev/null +++ b/capstone/suite/MC/ARM/vfp4-thumb.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +// 0xe2,0xee,0xa1,0x0b = vfma.f64 d16, d18, d17 +0xa2,0xee,0x00,0x1a = vfma.f32 s2, s4, s0 +0x42,0xef,0xb1,0x0c = vfma.f32 d16, d18, d17 +0x08,0xef,0x50,0x4c = vfma.f32 q2, q4, q0 +// 0xd2,0xee,0xe1,0x0b = vfnma.f64 d16, d18, d17 +0x92,0xee,0x40,0x1a = vfnma.f32 s2, s4, s0 +// 0xe2,0xee,0xe1,0x0b = vfms.f64 d16, d18, d17 +0xa2,0xee,0x40,0x1a = vfms.f32 s2, s4, s0 +0x62,0xef,0xb1,0x0c = vfms.f32 d16, d18, d17 +0x28,0xef,0x50,0x4c = vfms.f32 q2, q4, q0 +// 0xd2,0xee,0xa1,0x0b = vfnms.f64 d16, d18, d17 +0x92,0xee,0x00,0x1a = vfnms.f32 s2, s4, s0 diff --git a/capstone/suite/MC/ARM/vfp4.s.cs b/capstone/suite/MC/ARM/vfp4.s.cs new file mode 100644 index 000000000..370b51610 --- /dev/null +++ b/capstone/suite/MC/ARM/vfp4.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +// 0xa1,0x0b,0xe2,0xee = vfma.f64 d16, d18, d17 +0x00,0x1a,0xa2,0xee = vfma.f32 s2, s4, s0 +0xb1,0x0c,0x42,0xf2 = vfma.f32 d16, d18, d17 +0x50,0x4c,0x08,0xf2 = vfma.f32 q2, q4, q0 +// 0xe1,0x0b,0xd2,0xee = vfnma.f64 d16, d18, d17 +0x40,0x1a,0x92,0xee = vfnma.f32 s2, s4, s0 +// 0xe1,0x0b,0xe2,0xee = vfms.f64 d16, d18, d17 +0x40,0x1a,0xa2,0xee = vfms.f32 s2, s4, s0 +0xb1,0x0c,0x62,0xf2 = vfms.f32 d16, d18, d17 +0x50,0x4c,0x28,0xf2 = vfms.f32 q2, q4, q0 +// 0xa1,0x0b,0xd2,0xee = vfnms.f64 d16, d18, d17 +0x00,0x1a,0x92,0xee = vfnms.f32 s2, s4, s0 diff --git a/capstone/suite/MC/ARM/vpush-vpop-thumb.s.cs b/capstone/suite/MC/ARM/vpush-vpop-thumb.s.cs new file mode 100644 index 000000000..1526131f3 --- /dev/null +++ b/capstone/suite/MC/ARM/vpush-vpop-thumb.s.cs @@ -0,0 +1,9 @@ +# CS_ARCH_ARM, CS_MODE_THUMB, None +0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12} +0x2d,0xed,0x05,0x4a = vpush {s8, s9, s10, s11, s12} +0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12} +0xbd,0xec,0x05,0x4a = vpop {s8, s9, s10, s11, s12} +0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12} +0x2d,0xed,0x05,0x4a = vpush {s8, s9, s10, s11, s12} +0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12} +0xbd,0xec,0x05,0x4a = vpop {s8, s9, s10, s11, s12} diff --git a/capstone/suite/MC/ARM/vpush-vpop.s.cs b/capstone/suite/MC/ARM/vpush-vpop.s.cs new file mode 100644 index 000000000..d369a54a0 --- /dev/null +++ b/capstone/suite/MC/ARM/vpush-vpop.s.cs @@ -0,0 +1,9 @@ +# CS_ARCH_ARM, CS_MODE_ARM, None +0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12} +0x05,0x4a,0x2d,0xed = vpush {s8, s9, s10, s11, s12} +0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12} +0x05,0x4a,0xbd,0xec = vpop {s8, s9, s10, s11, s12} +0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12} +0x05,0x4a,0x2d,0xed = vpush {s8, s9, s10, s11, s12} +0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12} +0x05,0x4a,0xbd,0xec = vpop {s8, s9, s10, s11, s12} |