diff options
Diffstat (limited to 'roms/edk2/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm')
-rw-r--r-- | roms/edk2/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm b/roms/edk2/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm new file mode 100644 index 000000000..a72c9aef1 --- /dev/null +++ b/roms/edk2/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm @@ -0,0 +1,33 @@ +;------------------------------------------------------------------------------
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuFlushTlb
+ AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+; VOID
+; );
+;
+CpuFlushTlb
+ tlbi vmalle1 // Invalidate Inst TLB and Data TLB
+ dsb sy
+ isb
+ ret
+
+ END
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