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-rw-r--r--roms/edk2/MdePkg/Library/BaseLib/Ia32/DisableCache.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseLib/Ia32/DisableCache.c b/roms/edk2/MdePkg/Library/BaseLib/Ia32/DisableCache.c
new file mode 100644
index 000000000..6a8be4ef2
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseLib/Ia32/DisableCache.c
@@ -0,0 +1,30 @@
+/** @file
+ AsmDisableCache function
+
+ Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/**
+ Set CD bit and clear NW bit of CR0 followed by a WBINVD.
+
+ Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
+ and executing a WBINVD instruction. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmDisableCache (
+ VOID
+ )
+{
+ _asm {
+ mov eax, cr0
+ bts eax, 30
+ btr eax, 29
+ mov cr0, eax
+ wbinvd
+ }
+}
+