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-rw-r--r--roms/edk2/MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c27
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diff --git a/roms/edk2/MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c b/roms/edk2/MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c
new file mode 100644
index 000000000..88d0877a2
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseLib/RiscV64/CpuBreakpoint.c
@@ -0,0 +1,27 @@
+/** @file
+ CPU breakpoint for RISC-V
+
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "BaseLibInternals.h"
+
+extern VOID RiscVCpuBreakpoint (VOID);
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ RiscVCpuBreakpoint ();
+}