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-rw-r--r--roms/edk2/MdePkg/Library/BaseLib/X64/EnableCache.nasm37
1 files changed, 37 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseLib/X64/EnableCache.nasm b/roms/edk2/MdePkg/Library/BaseLib/X64/EnableCache.nasm
new file mode 100644
index 000000000..b6fae3cbf
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseLib/X64/EnableCache.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ mov rax, cr0
+ btr rax, 29
+ btr rax, 30
+ mov cr0, rax
+ ret
+