diff options
Diffstat (limited to 'roms/edk2/OvmfPkg/Csm/Include')
17 files changed, 4508 insertions, 0 deletions
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/BootScript.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/BootScript.h new file mode 100644 index 000000000..a3518ea83 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/BootScript.h @@ -0,0 +1,41 @@ +/** @file
+ This file contains the boot script definitions that are shared between the
+ Boot Script Executor PPI and the Boot Script Save Protocol.
+
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _BOOT_SCRIPT_H_
+#define _BOOT_SCRIPT_H_
+
+#include <PiDxe.h>
+///
+/// The framework implementation defines follow opcode that are different from the PI specification:
+/// Add FRAMEWORK_ prefix to avoid naming conflict.
+///
+/// S3 Boot Script Table identifier.
+///
+#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
+///
+/// The opcode is used to add a record for memory reads of the memory location and continues when the
+/// exit criteria is satisfied, or after a defined duration.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
+///
+/// The opcode is used to add a record for dispatching specified arbitrary code into a specified
+/// boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
+///
+/// The opcode indicates the start of the boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
+///
+/// The opcode indicates the end of the boot script table.
+///
+#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
+
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/DxeCis.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/DxeCis.h new file mode 100644 index 000000000..98a947e42 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/DxeCis.h @@ -0,0 +1,170 @@ +/** @file
+ Include file for definitions in the Intel Platform Innovation Framework for EFI
+ Driver Execution Environment Core Interface Specification (DXE CIS) Version 0.91.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _DXECIS_H_
+#define _DXECIS_H_
+
+#include <Protocol/StatusCode.h>
+
+/**
+ Functions of this type are used with the Framework MP Services Protocol and
+ the SMM Services Table to execute a procedure on enabled APs. The context
+ the AP should use durng execution is specified by Buffer.
+
+ @param[in] Buffer The pointer to the procedure's argument.
+
+**/
+typedef
+VOID
+(EFIAPI *FRAMEWORK_EFI_AP_PROCEDURE)(
+ IN VOID *Buffer
+ );
+
+///
+/// The Framework EFI Runtime Services Table as an extension to the EFI 1.10 Runtime Services Table.
+///
+typedef struct {
+ //
+ // Table header for the Framework EFI Runtime Services Table
+ //
+ EFI_TABLE_HEADER Hdr;
+ //
+ // Time services
+ //
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
+ //
+ // Virtual memory services
+ //
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
+ //
+ // Variable services
+ //
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
+ //
+ // Misc
+ //
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
+ ///
+ /// A Framework extension to the EFI 1.10 runtime table.
+ /// It was moved to a protocol to avoid conflict with UEFI 2.0.
+ ///
+ EFI_REPORT_STATUS_CODE ReportStatusCode;
+} FRAMEWORK_EFI_RUNTIME_SERVICES;
+
+///
+/// The Framework EFI Boot Services Table. Complies with the DxeCis specification.
+///
+typedef struct {
+ ///
+ /// The table header for the EFI Boot Services Table.
+ ///
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Task Priority Services
+ //
+ EFI_RAISE_TPL RaiseTPL;
+ EFI_RESTORE_TPL RestoreTPL;
+
+ //
+ // Memory Services
+ //
+ EFI_ALLOCATE_PAGES AllocatePages;
+ EFI_FREE_PAGES FreePages;
+ EFI_GET_MEMORY_MAP GetMemoryMap;
+ EFI_ALLOCATE_POOL AllocatePool;
+ EFI_FREE_POOL FreePool;
+
+ //
+ // Event & Timer Services
+ //
+ EFI_CREATE_EVENT CreateEvent;
+ EFI_SET_TIMER SetTimer;
+ EFI_WAIT_FOR_EVENT WaitForEvent;
+ EFI_SIGNAL_EVENT SignalEvent;
+ EFI_CLOSE_EVENT CloseEvent;
+ EFI_CHECK_EVENT CheckEvent;
+
+ //
+ // Protocol Handler Services
+ //
+ EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
+ EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
+ EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
+ EFI_HANDLE_PROTOCOL HandleProtocol;
+ EFI_HANDLE_PROTOCOL PcHandleProtocol;
+ EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
+ EFI_LOCATE_HANDLE LocateHandle;
+ EFI_LOCATE_DEVICE_PATH LocateDevicePath;
+ EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
+
+ //
+ // Image Services
+ //
+ EFI_IMAGE_LOAD LoadImage;
+ EFI_IMAGE_START StartImage;
+ EFI_EXIT Exit;
+ EFI_IMAGE_UNLOAD UnloadImage;
+ EFI_EXIT_BOOT_SERVICES ExitBootServices;
+
+ //
+ // Miscellaneous Services
+ //
+ EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
+ EFI_STALL Stall;
+ EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
+
+ //
+ // DriverSupport Services
+ //
+ EFI_CONNECT_CONTROLLER ConnectController;
+ EFI_DISCONNECT_CONTROLLER DisconnectController;
+
+ //
+ // Open and Close Protocol Services
+ //
+ EFI_OPEN_PROTOCOL OpenProtocol;
+ EFI_CLOSE_PROTOCOL CloseProtocol;
+ EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
+
+ //
+ // Library Services
+ //
+ EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
+ EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
+ EFI_LOCATE_PROTOCOL LocateProtocol;
+ EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
+ EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
+
+ //
+ // 32-bit CRC Services
+ //
+ EFI_CALCULATE_CRC32 CalculateCrc32;
+
+ //
+ // Miscellaneous Services
+ //
+ EFI_COPY_MEM CopyMem;
+ EFI_SET_MEM SetMem;
+} FRAMEWORK_EFI_BOOT_SERVICES;
+
+#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
+#define EFI_EVENT_NOTIFY_SIGNAL_ALL 0x00000400
+#define EFI_EVENT_SIGNAL_READY_TO_BOOT 0x00000203
+#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
+
+#endif
+
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeHeader.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeHeader.h new file mode 100644 index 000000000..e2b5a28b8 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeHeader.h @@ -0,0 +1,79 @@ +/** @file
+ Defines the data structure that is the volume header found at the beginning of
+ all firmware volumes that are either memory mapped or have an
+ associated FirmwareVolumeBlock protocol.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ These definitions are from the Firmware Volume Block Spec 0.9.
+
+**/
+
+#ifndef __EFI_FIRMWARE_VOLUME_HEADER_H__
+#define __EFI_FIRMWARE_VOLUME_HEADER_H__
+
+///
+/// Firmware Volume Block Attributes bit definitions.
+///@{
+#define EFI_FVB_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB_READ_STATUS 0x00000004
+
+#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB_WRITE_STATUS 0x00000020
+
+#define EFI_FVB_LOCK_CAP 0x00000040
+#define EFI_FVB_LOCK_STATUS 0x00000080
+
+#define EFI_FVB_STICKY_WRITE 0x00000200
+#define EFI_FVB_MEMORY_MAPPED 0x00000400
+#define EFI_FVB_ERASE_POLARITY 0x00000800
+
+#define EFI_FVB_ALIGNMENT_CAP 0x00008000
+#define EFI_FVB_ALIGNMENT_2 0x00010000
+#define EFI_FVB_ALIGNMENT_4 0x00020000
+#define EFI_FVB_ALIGNMENT_8 0x00040000
+#define EFI_FVB_ALIGNMENT_16 0x00080000
+#define EFI_FVB_ALIGNMENT_32 0x00100000
+#define EFI_FVB_ALIGNMENT_64 0x00200000
+#define EFI_FVB_ALIGNMENT_128 0x00400000
+#define EFI_FVB_ALIGNMENT_256 0x00800000
+#define EFI_FVB_ALIGNMENT_512 0x01000000
+#define EFI_FVB_ALIGNMENT_1K 0x02000000
+#define EFI_FVB_ALIGNMENT_2K 0x04000000
+#define EFI_FVB_ALIGNMENT_4K 0x08000000
+#define EFI_FVB_ALIGNMENT_8K 0x10000000
+#define EFI_FVB_ALIGNMENT_16K 0x20000000
+#define EFI_FVB_ALIGNMENT_32K 0x40000000
+#define EFI_FVB_ALIGNMENT_64K 0x80000000
+///@}
+
+/// This is a simple macro defined as the set of all FV Block Attributes signifying capabilities.
+#define EFI_FVB_CAPABILITIES ( EFI_FVB_READ_DISABLED_CAP | \
+ EFI_FVB_READ_ENABLED_CAP | \
+ EFI_FVB_WRITE_DISABLED_CAP | \
+ EFI_FVB_WRITE_ENABLED_CAP | \
+ EFI_FVB_LOCK_CAP \
+ )
+
+/** A parameterized macro defining a boolean expression that tests the state of a particular bit.
+ *
+ * @param FvbAttributes Indicates a test for CLEAR if EFI_FVB_ERASE_POLARITY is 1, else test for SET.
+ *
+ * @param TestAttributes The set of bits to test.
+ *
+ * @param Bit A value indicating the bit(s) to test.
+ * If multiple bits are set, the logical OR of their tests is the expression's value.
+**/
+#define EFI_TEST_FFS_ATTRIBUTES_BIT( FvbAttributes, TestAttributes, Bit) \
+ ((BOOLEAN) \
+ ((FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit)) \
+ )
+
+/// A simple macro defined as the set of all FV Block Attribute bits that indicate status.
+#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
+
+#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeImageFormat.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeImageFormat.h new file mode 100644 index 000000000..c77e39b4c --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/FirmwareVolumeImageFormat.h @@ -0,0 +1,32 @@ +/** @file
+ This file defines the data structures that are architecturally defined for file
+ images loaded via the FirmwareVolume protocol. The Firmware Volume specification
+ is the basis for these definitions.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ These definitions are from the Firmware Volume Spec 0.9.
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+#define __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
+#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
+#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
+#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
+#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
+
+#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
+#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
+#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
+#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
+#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/FrameworkInternalFormRepresentation.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/FrameworkInternalFormRepresentation.h new file mode 100644 index 000000000..f10fc5231 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/FrameworkInternalFormRepresentation.h @@ -0,0 +1,397 @@ +/** @file
+ This file defines the encoding for the VFR (Visual Form Representation) language.
+ Framework IFR is primarily consumed by the EFI presentation engine, and produced by EFI
+ internal application and drivers as well as all add-in card option-ROM drivers
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ These definitions are from the Framework Specification HII 0.92.
+
+**/
+
+#ifndef __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
+#define __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
+
+typedef UINT16 STRING_REF;
+
+//
+// IFR Op codes
+//
+#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
+#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
+#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
+#define EFI_IFR_GRAPHIC_OP 0x04
+#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
+#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
+#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
+#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
+#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
+#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
+#define EFI_IFR_END_FORM_OP 0x0B
+#define EFI_IFR_HIDDEN_OP 0x0C
+#define EFI_IFR_END_FORM_SET_OP 0x0D
+#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
+#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
+#define EFI_IFR_END_ONE_OF_OP 0x10
+#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
+#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
+#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
+#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
+#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
+#define FRAMEWORK_EFI_IFR_AND_OP 0x15
+#define FRAMEWORK_EFI_IFR_OR_OP 0x16
+#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
+#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
+#define EFI_IFR_GRAYOUT_IF_OP 0x19
+#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
+#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
+#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
+#define EFI_IFR_LABEL_OP 0x1D
+#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
+#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
+#define EFI_IFR_BANNER_OP 0x20
+#define EFI_IFR_INVENTORY_OP 0x21
+#define EFI_IFR_EQ_VAR_VAL_OP 0x22
+#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
+#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
+#define EFI_IFR_VARSTORE_SELECT_OP 0x25
+#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
+#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
+#define EFI_IFR_OEM_OP 0xFE
+#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
+
+//
+// Define values for the flags fields in some VFR opcodes. These are
+// bitmasks.
+//
+#define EFI_IFR_FLAG_DEFAULT 0x01
+#define EFI_IFR_FLAG_MANUFACTURING 0x02
+#define EFI_IFR_FLAG_INTERACTIVE 0x04
+#define EFI_IFR_FLAG_NV_ACCESS 0x08
+#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
+#define EFI_IFR_FLAG_LATE_CHECK 0x20
+
+#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
+#define EFI_DISK_DEVICE_CLASS 0x01
+#define EFI_VIDEO_DEVICE_CLASS 0x02
+#define EFI_NETWORK_DEVICE_CLASS 0x04
+#define EFI_INPUT_DEVICE_CLASS 0x08
+#define EFI_ON_BOARD_DEVICE_CLASS 0x10
+#define EFI_OTHER_DEVICE_CLASS 0x20
+
+#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
+#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01
+#define EFI_FRONT_PAGE_SUBCLASS 0x02
+#define EFI_SINGLE_USE_SUBCLASS 0x03 ///< Used to display a single entity ,and then exit.
+
+///
+/// Used to flag dynamically created op-codes. This is meaningful to the IFR Library set
+/// and the browser because we need to distinguish between compiled NV map data and created data.
+/// We do not allow new entries to be created in the NV map dynamically, but we do need
+/// to display this information correctly. To dynamically create op-codes and assume that their
+/// data will be saved, ensure that the NV starting location they refer to is pre-defined in the
+/// NV map.
+///
+#define EFI_IFR_FLAG_CREATED 128
+
+
+#pragma pack(1)
+//
+// IFR Structure definitions
+//
+typedef struct {
+ UINT8 OpCode;
+ UINT8 Length;
+} FRAMEWORK_EFI_IFR_OP_HEADER;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ STRING_REF FormSetTitle;
+ STRING_REF Help;
+ EFI_PHYSICAL_ADDRESS CallbackHandle;
+ UINT16 Class;
+ UINT16 SubClass;
+ UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
+} FRAMEWORK_EFI_IFR_FORM_SET;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF FormTitle;
+} FRAMEWORK_EFI_IFR_FORM;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 LabelId;
+} EFI_IFR_LABEL;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF SubTitle;
+} FRAMEWORK_EFI_IFR_SUBTITLE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo;
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_TEXT;
+
+//
+// goto
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_REF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM_SET;
+
+//
+// Also notice that the IFR_ONE_OF and IFR_CHECK_BOX are identical in structure......
+// code assumes this to be true, if this ever changes we need to revisit the InitializeTagStructures code
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+} FRAMEWORK_EFI_IFR_ONE_OF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset in NV for storage of the data.
+ UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
+ STRING_REF Prompt; ///< The string token for the prompt.
+ STRING_REF Help; ///< The string token for the context-help.
+} FRAMEWORK_EFI_IFR_ORDERED_LIST;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< If non-zero, it means that it is the default option.
+ UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_CHECKBOX, EFI_IFR_CHECK_BOX;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Option; ///< The string token describing the option.
+ UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
+ UINT8 Flags; ///< If non-zero, it means that it is the default option.
+ UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
+} FRAMEWORK_EFI_IFR_ONE_OF_OPTION;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
+ UINT16 Default;
+} FRAMEWORK_EFI_IFR_NUMERIC;
+
+//
+// There is an interesting twist with regards to Time and Date. This is one of the few items which can accept input
+// from a user, and may or may not need to use storage in the NVRAM space. The decided method for determining
+// if NVRAM space will be used (only for a TimeOp or DateOp) is: If .QuestionId == 0 && .Width == 0 (normally an
+// impossibility) then use system resources to store the data away and not NV resources. In other words, the setup
+// engine will call gRT->SetTime, and gRT->SetDate for the saving of data, and the values displayed will be from the
+// gRT->GetXXXX series of calls.
+//
+typedef struct {
+ FRAMEWORK_EFI_IFR_NUMERIC Hour;
+ FRAMEWORK_EFI_IFR_NUMERIC Minute;
+ FRAMEWORK_EFI_IFR_NUMERIC Second;
+} FRAMEWORK_EFI_IFR_TIME;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_NUMERIC Year;
+ FRAMEWORK_EFI_IFR_NUMERIC Month;
+ FRAMEWORK_EFI_IFR_NUMERIC Day;
+} FRAMEWORK_EFI_IFR_DATE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId;///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT8 MinSize; ///< Minimum allowable sized password.
+ UINT8 MaxSize; ///< Maximum allowable sized password.
+ UINT16 Encoding;
+} FRAMEWORK_EFI_IFR_PASSWORD;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The ID designating what the question is about...
+ UINT8 Width; ///< The Size of the Data being saved.
+ STRING_REF Prompt; ///< The String Token for the Prompt.
+ STRING_REF Help; ///< The string Token for the context-help.
+ UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
+ UINT8 MinSize; ///< Minimum allowable sized password.
+ UINT8 MaxSize; ///< Maximum allowable sized password.
+} FRAMEWORK_EFI_IFR_STRING;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_ONE_OF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 Value;
+ UINT16 Key;
+} EFI_IFR_HIDDEN;
+
+///
+/// Inconsistent with specification here:
+/// The following definition may not comply with Framework Specification HII 0.92. To
+/// keep the inconsistant is for implementation needed.
+///@{
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_SUPPRESS;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_GRAY_OUT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Popup;
+ UINT8 Flags;
+} EFI_IFR_INCONSISTENT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset into variable storage.
+ UINT8 Width; ///< The size of variable storage.
+ UINT16 Value; ///< The value to compare against.
+} FRAMEWORK_EFI_IFR_EQ_ID_VAL;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; ///< The offset into variable storage.
+ UINT8 Width; ///< The size of variable storage.
+ UINT16 ListLength;
+ UINT16 ValueList[1];
+} FRAMEWORK_EFI_IFR_EQ_ID_LIST;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
+ UINT8 Width; ///< The size of variable storage (must be same for both).
+ UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
+} FRAMEWORK_EFI_IFR_EQ_ID_ID;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VariableId; ///< The offset into variable storage.
+ UINT16 Value; ///< The value to compare against.
+} EFI_IFR_EQ_VAR_VAL;
+///@}
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_AND;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_OR;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} FRAMEWORK_EFI_IFR_NOT;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_EXPR, EFI_IFR_END_IF;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help;
+ UINT8 Flags;
+ UINT16 Key;
+} EFI_IFR_SAVE_DEFAULTS;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo; ///< Optional text.
+} EFI_IFR_INVENTORY;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid; ///< GUID for the variable.
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+ UINT16 Size; ///< The size of the variable storage.
+} FRAMEWORK_EFI_IFR_VARSTORE;
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+} EFI_IFR_VARSTORE_SELECT;
+
+///
+/// Used for the ideqid VFR statement where two variable stores may be referenced in the
+/// same VFR statement.
+/// A browser should treat this as an FRAMEWORK_EFI_IFR_VARSTORE_SELECT statement and assume that all following
+/// IFR opcodes use the VarId as defined here.
+///
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
+ UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
+} EFI_IFR_VARSTORE_SELECT_PAIR;
+
+///
+/// Save defaults and restore defaults have same structure.
+///
+#define EFI_IFR_RESTORE_DEFAULTS EFI_IFR_SAVE_DEFAULTS
+
+typedef struct {
+ FRAMEWORK_EFI_IFR_OP_HEADER Header;
+ STRING_REF Title; ///< The string token for the banner title.
+ UINT16 LineNumber; ///< 1-based line number.
+ UINT8 Alignment; ///< Left, center, or right-aligned.
+} EFI_IFR_BANNER;
+
+#define EFI_IFR_BANNER_ALIGN_LEFT 0
+#define EFI_IFR_BANNER_ALIGN_CENTER 1
+#define EFI_IFR_BANNER_ALIGN_RIGHT 2
+#define EFI_IFR_BANNER_TIMEOUT 0xFF
+
+#pragma pack()
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/Hob.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/Hob.h new file mode 100644 index 000000000..f6a71fabe --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/Hob.h @@ -0,0 +1,28 @@ +/** @file
+ This file defines the data structures per HOB specification v0.9.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ These definitions are from the HOB Spec 0.9 that were not adopted by the PI specifications.
+
+**/
+
+#ifndef _HOB_H_
+#define _HOB_H_
+
+///
+/// Capsule volume HOB -- identical to a firmware volume.
+/// This macro is defined to comply with the hob Framework Spec. And the marco was
+/// retired in the PI1.0 specification.
+///
+#define EFI_HOB_TYPE_CV 0x0008
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_CAPSULE_VOLUME;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Framework/StatusCode.h b/roms/edk2/OvmfPkg/Csm/Include/Framework/StatusCode.h new file mode 100644 index 000000000..753029c13 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Framework/StatusCode.h @@ -0,0 +1,155 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ Intel Platform Innovation Framework for EFI Status Codes Specification
+ Version 0.92.
+
+**/
+
+#ifndef _FRAMEWORK_STATUS_CODE_H_
+#define _FRAMEWORK_STATUS_CODE_H_
+
+//
+// Required for X64 defines for CPU exception types
+//
+#include <Protocol/DebugSupport.h>
+
+///
+/// Software Class DXE BS Driver Subclass Progress Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+///@}
+
+///
+/// Software Class DXE RT Driver Subclass Progress Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+///@}
+
+///
+/// Software Subclass definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
+
+///
+/// Software Class X64 Exception Subclass Error Code definitions.
+/// These exceptions are derived from the debug protocol definitions in the EFI
+/// specification.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
+#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
+#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
+#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
+#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
+#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
+#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
+#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
+#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
+#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
+#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
+#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
+#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
+#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
+#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
+#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
+#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
+///@}
+
+///
+/// Software Class EFI After Life Subclass Progress Code definitions.
+///
+///@{
+#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+///@}
+
+///
+/// Software Class DXE Core Subclass Error Code definitions.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+///
+/// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
+///
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+///@}
+
+///
+/// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
+///
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+///@}
+
+///
+/// The reason that the processor was disabled.
+///
+/// Inconsistent with specification here:
+/// The Framework Specification, StatusCodes 0.92, does not define the macros.
+///
+///@{
+#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
+///@}
+
+///
+/// Software Class PEI Module Subclass Progress Code definitions.
+///
+///@{
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN EFI_SW_PEI_PC_RECOVERY_BEGIN
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD EFI_SW_PEI_PC_CAPSULE_LOAD
+#define EFI_SW_PEIM_PC_CAPSULE_START EFI_SW_PEI_PC_CAPSULE_START
+#define EFI_SW_PEIM_PC_RECOVERY_USER EFI_SW_PEI_PC_RECOVERY_USER
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO EFI_SW_PEI_PC_RECOVERY_AUTO
+///@}
+
+///
+/// Software Class PEI Core Subclass Error Code definitions.
+///
+///@{
+#define EFI_SW_PEIM_CORE_EC_DXE_CORRUPT EFI_SW_PEI_CORE_EC_DXE_CORRUPT
+#define EFI_SW_PEIM_CORE_EC_DXEIPL_NOT_FOUND EFI_SW_PEI_CORE_EC_DXEIPL_NOT_FOUND
+///@}
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/FrameworkDxe.h b/roms/edk2/OvmfPkg/Csm/Include/FrameworkDxe.h new file mode 100644 index 000000000..1d801960f --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/FrameworkDxe.h @@ -0,0 +1,26 @@ +/** @file
+ The root header file that provides Framework extension to UEFI/PI for modules. It can be included by
+ DXE, RUNTIME and SMM type modules that use Framework definitions.
+
+
+ This header file includes Framework extension definitions common to DXE
+ modules.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _FRAMEWORK_DXE_H_
+#define _FRAMEWORK_DXE_H_
+
+#include <PiDxe.h>
+
+#include <Framework/FrameworkInternalFormRepresentation.h>
+#include <Framework/FirmwareVolumeImageFormat.h>
+#include <Framework/FirmwareVolumeHeader.h>
+#include <Framework/Hob.h>
+#include <Framework/BootScript.h>
+#include <Framework/StatusCode.h>
+#include <Framework/DxeCis.h>
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyBios.h b/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyBios.h new file mode 100644 index 000000000..e35fbff8d --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyBios.h @@ -0,0 +1,29 @@ +/** @file
+ Defines a Tag GUID used to mark a UEFI legacy BIOS thunk driver based
+ on legacy BIOS services and legacy option ROM. This Tag GUID must be installed on
+ the ImageHandle of any module that follows the EFI Driver Model and uses
+ the Int86() or FarCall() services of the Legacy Bios Protocol to produce
+ a standard UEFI I/O Protocol.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _LEGACY_BIOS_H_
+#define _LEGACY_BIOS_H_
+
+///
+/// The Global ID for the Legacy BIOS GUID that must be installed onto the ImageHandle
+/// of any module follows the EFI Driver Model and uses the Int86() or FarCall()
+/// services of the Legacy BIOS Protocol to produce a standard UEFI I/O Protocol.
+///
+#define EFI_LEGACY_BIOS_GUID \
+ { \
+ 0x2e3044ac, 0x879f, 0x490f, {0x97, 0x60, 0xbb, 0xdf, 0xaf, 0x69, 0x5f, 0x50 } \
+ }
+
+extern EFI_GUID gEfiLegacyBiosGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyDevOrder.h b/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyDevOrder.h new file mode 100644 index 000000000..8ec3de5e3 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Guid/LegacyDevOrder.h @@ -0,0 +1,39 @@ +/** @file
+ Guid of a NV Variable which store the information about the
+ FD/HD/CD/NET/BEV order.
+
+Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __LEGACY_DEV_ORDER_VARIABLE_GUID_H__
+#define __LEGACY_DEV_ORDER_VARIABLE_GUID_H__
+
+///
+/// Name and Guid of a NV Variable which stores the information about the
+/// FD/HD/CD/NET/BEV order
+///
+#define EFI_LEGACY_DEV_ORDER_VARIABLE_GUID \
+ { \
+ 0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52} \
+ }
+
+typedef UINT8 BBS_TYPE;
+
+#pragma pack(1)
+typedef struct {
+ BBS_TYPE BbsType;
+ ///
+ /// Length = sizeof (UINT16) + sizeof (Data)
+ ///
+ UINT16 Length;
+ UINT16 Data[1];
+} LEGACY_DEV_ORDER_ENTRY;
+#pragma pack()
+
+#define VAR_LEGACY_DEV_ORDER L"LegacyDevOrder"
+
+extern EFI_GUID gEfiLegacyDevOrderVariableGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/FirmwareVolume.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/FirmwareVolume.h new file mode 100644 index 000000000..5e0216c76 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/FirmwareVolume.h @@ -0,0 +1,340 @@ +/** @file
+ This file declares the Firmware Volume Protocol.
+
+ The Firmware Volume Protocol provides file-level access to the firmware volume.
+ Each firmware volume driver must produce an instance of the Firmware Volume
+ Protocol if the firmware volume is to be visible to the system. The Firmware
+ Volume Protocol also provides mechanisms for determining and modifying some
+ attributes of the firmware volume.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume specification.
+ Version 0.9.
+
+**/
+
+#ifndef _FIRMWARE_VOLUME_H_
+#define _FIRMWARE_VOLUME_H_
+
+
+//
+// Firmware Volume Protocol GUID definition
+//
+#define EFI_FIRMWARE_VOLUME_PROTOCOL_GUID \
+ { \
+ 0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
+ }
+
+#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
+
+typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
+
+//
+// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
+//
+typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
+
+//
+// ************************************************************
+// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
+// ************************************************************
+//
+#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
+#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
+#define EFI_FV_READ_STATUS 0x0000000000000004ULL
+
+#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
+#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
+#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
+
+#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
+#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
+#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
+
+#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
+#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
+#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
+#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
+#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
+#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
+#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
+#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
+#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
+#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
+#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
+#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
+#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
+#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
+#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
+#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
+#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
+
+//
+// Protocol API definitions
+//
+
+/**
+ Retrieves attributes, insures positive polarity of attribute bits, and returns
+ resulting attributes in an output parameter.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Attributes Output buffer containing attributes.
+
+ @retval EFI_SUCCESS The firmware volume attributes were returned.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_GET_ATTRIBUTES)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Sets volume attributes
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Attributes On input, Attributes is a pointer to an
+ EFI_FV_ATTRIBUTES containing the desired firmware
+ volume settings. On successful return, it contains
+ the new settings of the firmware volume. On
+ unsuccessful return, Attributes is not modified
+ and the firmware volume settings are not changed.
+
+ @retval EFI_INVALID_PARAMETER A bit in Attributes was invalid.
+ @retval EFI_SUCCESS The requested firmware volume attributes were set
+ and the resulting EFI_FV_ATTRIBUTES is returned in
+ Attributes.
+ @retval EFI_ACCESS_DENIED The Device is locked and does not permit modification.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_SET_ATTRIBUTES)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Read the requested file (NameGuid) or file information from the firmware volume
+ and returns data in Buffer.
+
+ @param This The EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NameGuid The pointer to EFI_GUID, which is the filename of
+ the file to read.
+ @param Buffer The pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size
+ are returned as there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output
+ buffer is allocated from BS pool by ReadFile.
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output
+ buffer has been allocated by the caller and is being
+ passed in.
+ @param BufferSize On input: The buffer size. On output: The size
+ required to complete the read.
+ @param FoundType The pointer to the type of the file whose data
+ is returned.
+ @param FileAttributes The pointer to attributes of the file whose data
+ is returned.
+ @param AuthenticationStatus The pointer to the authentication status of the data.
+
+ @retval EFI_SUCCESS The call completed successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer filled, and the output is truncated.
+ @retval EFI_NOT_FOUND NameGuid was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_READ_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT EFI_FV_FILETYPE *FoundType,
+ OUT EFI_FV_FILE_ATTRIBUTES *FileAttributes,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Read the requested section from the specified file and returns data in Buffer.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NameGuid Filename identifying the file from which to read.
+ @param SectionType The section type to retrieve.
+ @param SectionInstance The instance of SectionType to retrieve.
+ @param Buffer Pointer to pointer to buffer in which contents of
+ a file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size
+ are returned as there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output
+ buffer is allocated from BS pool by ReadFile.
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output
+ buffer has been allocated by the caller and is being
+ passed in.
+ @param BufferSize The pointer to the buffer size passed in, and on
+ output the size required to complete the read.
+ @param AuthenticationStatus The pointer to the authentication status of the data.
+
+ @retval EFI_SUCCESS The call completed successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer is filled and the output is truncated.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+ @retval EFI_NOT_FOUND The name was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_READ_SECTION)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN SectionInstance,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
+
+#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
+#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
+
+typedef struct {
+ EFI_GUID *NameGuid;
+ EFI_FV_FILETYPE Type;
+ EFI_FV_FILE_ATTRIBUTES FileAttributes;
+ VOID *Buffer;
+ UINT32 BufferSize;
+} FRAMEWORK_EFI_FV_WRITE_FILE_DATA;
+
+/**
+ Write the supplied file (NameGuid) to the FV.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param NumberOfFiles Indicates the number of file records pointed to
+ by FileData.
+ @param WritePolicy Indicates the level of reliability of the write
+ with respect to things like power failure events.
+ @param FileData A pointer to an array of EFI_FV_WRITE_FILE_DATA
+ structures. Each element in the array indicates
+ a file to write, and there are NumberOfFiles
+ elements in the input array.
+
+ @retval EFI_SUCCESS The write completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The firmware volume does not have enough free
+ space to store file(s).
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to
+ access the firmware volume.
+ @retval EFI_WRITE_PROTECTED The firmware volume is configured to disallow writes.
+ @retval EFI_NOT_FOUND A delete was requested, but the requested file was
+ not found in the firmware volume.
+ @retval EFI_INVALID_PARAMETER A delete was requested with a multiple file write.
+ An unsupported WritePolicy was requested.
+ An unknown file type was specified.
+ A file system specific error has occurred.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_WRITE_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN UINT32 NumberOfFiles,
+ IN FRAMEWORK_EFI_FV_WRITE_POLICY WritePolicy,
+ IN FRAMEWORK_EFI_FV_WRITE_FILE_DATA *FileData
+ );
+
+/**
+ Given the input key, search for the next matching file in the volume.
+
+ @param This Indicates the EFI_FIRMWARE_VOLUME_PROTOCOL instance.
+ @param Key Pointer to a caller allocated buffer that contains
+ an implementation-specific key that is used to track
+ where to begin searching on successive calls.
+ @param FileType The pointer to the file type to filter for.
+ @param NameGuid The pointer to Guid filename of the file found.
+ @param Attributes The pointer to Attributes of the file found.
+ @param Size The pointer to Size in bytes of the file found.
+
+ @retval EFI_SUCCESS The output parameters are filled with data obtained from
+ the first matching file that was found.
+ @retval EFI_NOT_FOUND No files of type FileType were found.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access
+ the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FRAMEWORK_EFI_FV_GET_NEXT_FILE)(
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT VOID *Key,
+ IN OUT EFI_FV_FILETYPE *FileType,
+ OUT EFI_GUID *NameGuid,
+ OUT EFI_FV_FILE_ATTRIBUTES *Attributes,
+ OUT UINTN *Size
+ );
+
+//
+// Protocol interface structure
+//
+struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
+ ///
+ /// Retrieves volume capabilities and current settings.
+ ///
+ FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
+
+ ///
+ /// Modifies the current settings of the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
+
+ ///
+ /// Reads an entire file from the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_READ_FILE ReadFile;
+
+ ///
+ /// Reads a single section from a file into a buffer.
+ ///
+ FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
+
+ ///
+ /// Writes an entire file into the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
+
+ ///
+ /// Provides service to allow searching the firmware volume.
+ ///
+ FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
+
+ ///
+ /// Data field that indicates the size in bytes of the Key input buffer for
+ /// the GetNextFile() API.
+ ///
+ UINT32 KeySize;
+
+ ///
+ /// Handle of the parent firmware volume.
+ ///
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaAcpi.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaAcpi.h new file mode 100644 index 000000000..0ff57aa11 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaAcpi.h @@ -0,0 +1,298 @@ +/** @file
+ EFI ISA ACPI Protocol is used to enumerate and manage all the ISA controllers on
+ the platform's ISA Bus.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ISA_ACPI_H_
+#define __ISA_ACPI_H_
+
+///
+/// Global ID for the EFI ISA ACPI Protocol.
+///
+#define EFI_ISA_ACPI_PROTOCOL_GUID \
+ { \
+ 0x64a892dc, 0x5561, 0x4536, { 0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55 } \
+ }
+
+///
+/// Forward declaration fo the EFI ISA ACPI Protocol
+///
+typedef struct _EFI_ISA_ACPI_PROTOCOL EFI_ISA_ACPI_PROTOCOL;
+
+///
+/// ISA ACPI Protocol interrupt resource attributes.
+///
+#define EFI_ISA_ACPI_IRQ_TYPE_HIGH_TRUE_EDGE_SENSITIVE 0x01 ///< Edge triggered interrupt on a rising edge.
+#define EFI_ISA_ACPI_IRQ_TYPE_LOW_TRUE_EDGE_SENSITIVE 0x02 ///< Edge triggered interrupt on a falling edge.
+#define EFI_ISA_ACPI_IRQ_TYPE_HIGH_TRUE_LEVEL_SENSITIVE 0x04 ///< Level sensitive interrupt active high.
+#define EFI_ISA_ACPI_IRQ_TYPE_LOW_TRUE_LEVEL_SENSITIVE 0x08 ///< Level sensitive interrupt active low.
+
+///
+/// ISA ACPI Protocol DMA resource attributes.
+///
+#define EFI_ISA_ACPI_DMA_SPEED_TYPE_MASK 0x03 ///< Bit mask of supported DMA speed attributes.
+#define EFI_ISA_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00 ///< ISA controller supports compatibility mode DMA transfers.
+#define EFI_ISA_ACPI_DMA_SPEED_TYPE_A 0x01 ///< ISA controller supports type A DMA transfers.
+#define EFI_ISA_ACPI_DMA_SPEED_TYPE_B 0x02 ///< ISA controller supports type B DMA transfers.
+#define EFI_ISA_ACPI_DMA_SPEED_TYPE_F 0x03 ///< ISA controller supports type F DMA transfers.
+#define EFI_ISA_ACPI_DMA_COUNT_BY_BYTE 0x04 ///< ISA controller increments DMA address by bytes (8-bit).
+#define EFI_ISA_ACPI_DMA_COUNT_BY_WORD 0x08 ///< ISA controller increments DMA address by words (16-bit).
+#define EFI_ISA_ACPI_DMA_BUS_MASTER 0x10 ///< ISA controller is a DMA bus master.
+#define EFI_ISA_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x20 ///< ISA controller only supports 8-bit DMA transfers.
+#define EFI_ISA_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x40 ///< ISA controller both 8-bit and 16-bit DMA transfers.
+#define EFI_ISA_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x80 ///< ISA controller only supports 16-bit DMA transfers.
+
+///
+/// ISA ACPI Protocol MMIO resource attributes
+///
+#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
+#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
+#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
+#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
+#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
+#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
+#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
+#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
+
+///
+/// ISA ACPI Protocol I/O resource attributes
+///
+#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
+#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
+
+///
+/// EFI ISA ACPI resource type
+///
+typedef enum {
+ EfiIsaAcpiResourceEndOfList, ///< Marks the end if a resource list.
+ EfiIsaAcpiResourceIo, ///< ISA I/O port resource range.
+ EfiIsaAcpiResourceMemory, ///< ISA MMIO resource range.
+ EfiIsaAcpiResourceDma, ///< ISA DMA resource.
+ EfiIsaAcpiResourceInterrupt ///< ISA interrupt resource.
+} EFI_ISA_ACPI_RESOURCE_TYPE;
+
+///
+/// EFI ISA ACPI generic resource structure
+///
+typedef struct {
+ EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
+ UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
+ UINT32 StartRange; ///< The start of the resource range.
+ UINT32 EndRange; ///< The end of the resource range.
+} EFI_ISA_ACPI_RESOURCE;
+
+///
+/// EFI ISA ACPI resource device identifier
+///
+typedef struct {
+ UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
+ UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
+} EFI_ISA_ACPI_DEVICE_ID;
+
+///
+/// EFI ISA ACPI resource list
+///
+typedef struct {
+ EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
+ EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
+} EFI_ISA_ACPI_RESOURCE_LIST;
+
+/**
+ Enumerates the ISA controllers on an ISA bus.
+
+ This service allows all the ISA controllers on an ISA bus to be enumerated. If
+ Device is a pointer to a NULL value, then the first ISA controller on the ISA
+ bus is returned in Device and EFI_SUCCESS is returned. If Device is a pointer
+ to a value that was returned on a prior call to DeviceEnumerate(), then the next
+ ISA controller on the ISA bus is returned in Device and EFI_SUCCESS is returned.
+ If Device is a pointer to the last ISA controller on the ISA bus, then
+ EFI_NOT_FOUND is returned.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[out] Device The pointer to an ISA controller named by ACPI HID/UID.
+
+ @retval EFI_SUCCESS The next ISA controller on the ISA bus was returned.
+ @retval EFI_NOT_FOUND No device found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_DEVICE_ENUMERATE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ OUT EFI_ISA_ACPI_DEVICE_ID **Device
+ );
+
+/**
+ Sets the power state of an ISA controller.
+
+ This services sets the power state of the ISA controller specified by Device to
+ the power state specified by OnOff. TRUE denotes on, FALSE denotes off.
+ If the power state is successfully set on the ISA Controller, then
+ EFI_SUCCESS is returned.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to an ISA controller named by ACPI HID/UID.
+ @param[in] OnOff TRUE denotes on, FALSE denotes off.
+
+ @retval EFI_SUCCESS Successfully set the power state of the ISA controller.
+ @retval Other The ISA controller could not be placed in the requested power state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_SET_DEVICE_POWER)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,
+ IN BOOLEAN OnOff
+ );
+
+/**
+ Retrieves the current set of resources associated with an ISA controller.
+
+ Retrieves the set of I/O, MMIO, DMA, and interrupt resources currently
+ assigned to the ISA controller specified by Device. These resources
+ are returned in ResourceList.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to an ISA controller named by ACPI HID/UID.
+ @param[out] ResourceList The pointer to the current resource list for Device.
+
+ @retval EFI_SUCCESS Successfully retrieved the current resource list.
+ @retval EFI_NOT_FOUND The resource list could not be retrieved.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_GET_CUR_RESOURCE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,
+ OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList
+ );
+
+/**
+ Retrieves the set of possible resources that may be assigned to an ISA controller
+ with SetResource().
+
+ Retrieves the possible sets of I/O, MMIO, DMA, and interrupt resources for the
+ ISA controller specified by Device. The sets are returned in ResourceList.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to an ISA controller named by ACPI HID/UID.
+ @param[out] ResourceList The pointer to the returned list of resource lists.
+
+ @retval EFI_UNSUPPORTED This service is not supported.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_GET_POS_RESOURCE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,
+ OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList
+ );
+
+/**
+ Assigns resources to an ISA controller.
+
+ Assigns the I/O, MMIO, DMA, and interrupt resources specified by ResourceList
+ to the ISA controller specified by Device. ResourceList must match a resource list returned by GetPosResource() for the same ISA controller.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to an ISA controller named by ACPI HID/UID.
+ @param[in] ResourceList The pointer to a resources list that must be one of the
+ resource lists returned by GetPosResource() for the
+ ISA controller specified by Device.
+
+ @retval EFI_SUCCESS Successfully set resources on the ISA controller.
+ @retval Other The resources could not be set for the ISA controller.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_SET_RESOURCE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,
+ IN EFI_ISA_ACPI_RESOURCE_LIST *ResourceList
+ );
+
+/**
+ Enables or disables an ISA controller.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to the ISA controller to enable/disable.
+ @param[in] Enable TRUE to enable the ISA controller. FALSE to disable the
+ ISA controller.
+
+ @retval EFI_SUCCESS Successfully enabled/disabled the ISA controller.
+ @retval Other The ISA controller could not be placed in the requested state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_ENABLE_DEVICE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,
+ IN BOOLEAN Enable
+ );
+
+/**
+ Initializes an ISA controller, so that it can be used. This service must be called
+ before SetResource(), EnableDevice(), or SetPower() will behave as expected.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+ @param[in] Device The pointer to an ISA controller named by ACPI HID/UID.
+
+ @retval EFI_SUCCESS Successfully initialized an ISA controller.
+ @retval Other The ISA controller could not be initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_INIT_DEVICE)(
+ IN EFI_ISA_ACPI_PROTOCOL *This,
+ IN EFI_ISA_ACPI_DEVICE_ID *Device
+ );
+
+/**
+ Initializes all the HW states required for the ISA controllers on the ISA bus
+ to be enumerated and managed by the rest of the services in this prorotol.
+ This service must be called before any of the other services in this
+ protocol will function as expected.
+
+ @param[in] This The pointer to the EFI_ISA_ACPI_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Successfully initialized all required hardware states.
+ @retval Other The ISA interface could not be initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_ACPI_INTERFACE_INIT)(
+ IN EFI_ISA_ACPI_PROTOCOL *This
+ );
+
+///
+/// The EFI_ISA_ACPI_PROTOCOL provides the services to enumerate and manage
+/// ISA controllers on an ISA bus. These services include the ability to initialize,
+/// enable, disable, and manage the power state of ISA controllers. It also
+/// includes services to query current resources, query possible resources,
+/// and assign resources to an ISA controller.
+///
+struct _EFI_ISA_ACPI_PROTOCOL {
+ EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
+ EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
+ EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
+ EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
+ EFI_ISA_ACPI_SET_RESOURCE SetResource;
+ EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
+ EFI_ISA_ACPI_INIT_DEVICE InitDevice;
+ EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
+};
+
+extern EFI_GUID gEfiIsaAcpiProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaIo.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaIo.h new file mode 100644 index 000000000..8807e421f --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/IsaIo.h @@ -0,0 +1,356 @@ +/** @file
+ ISA I/O Protocol is used by ISA device drivers to perform I/O, MMIO and DMA
+ operations on the ISA controllers they manage.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _EFI_ISA_IO_H_
+#define _EFI_ISA_IO_H_
+
+#include <Protocol/IsaAcpi.h>
+
+///
+/// Global ID for the EFI_ISA_IO_PROTOCOL
+///
+#define EFI_ISA_IO_PROTOCOL_GUID \
+ { \
+ 0x7ee2bd44, 0x3da0, 0x11d4, { 0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+///
+/// Forward declaration for the EFI_ISA_IO_PROTOCOL.
+///
+typedef struct _EFI_ISA_IO_PROTOCOL EFI_ISA_IO_PROTOCOL;
+
+///
+/// Width of EFI_ISA_IO_PROTOCOL I/O Port and MMIO operations.
+///
+typedef enum {
+ EfiIsaIoWidthUint8 = 0, ///< 8-bit operation.
+ EfiIsaIoWidthUint16, ///< 16-bit operation.
+ EfiIsaIoWidthUint32, ///< 32-bit operation
+ EfiIsaIoWidthReserved,
+ EfiIsaIoWidthFifoUint8, ///< 8-bit FIFO operation.
+ EfiIsaIoWidthFifoUint16, ///< 16-bit FIFO operation.
+ EfiIsaIoWidthFifoUint32, ///< 32-bit FIFO operation.
+ EfiIsaIoWidthFifoReserved,
+ EfiIsaIoWidthFillUint8, ///< 8-bit Fill operation.
+ EfiIsaIoWidthFillUint16, ///< 16-bit Fill operation.
+ EfiIsaIoWidthFillUint32, ///< 32-bit Fill operation.
+ EfiIsaIoWidthFillReserved,
+ EfiIsaIoWidthMaximum
+} EFI_ISA_IO_PROTOCOL_WIDTH;
+
+///
+/// Attributes for the EFI_ISA_IO_PROTOCOL common DMA buffer allocations.
+///
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x080 ///< Map a memory range so write are combined.
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_CACHED 0x800 ///< Map a memory range so all read and write accesses are cached.
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range.
+
+///
+/// Channel attribute for EFI_ISA_IO_PROTOCOL slave DMA requests
+///
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_COMPATIBLE 0x001 ///< Set the speed of the DMA transfer in compatible mode.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_A 0x002 ///< Not supported.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_B 0x004 ///< Not supported.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_C 0x008 ///< Not supported.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_8 0x010 ///< Request 8-bit DMA transfers. Only available on channels 0..3.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_16 0x020 ///< Request 16-bit DMA transfers. Only available on channels 4..7.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SINGLE_MODE 0x040 ///< Request a single DMA transfer.
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_DEMAND_MODE 0x080 ///< Request multiple DMA transfers until TC (Terminal Count) or EOP (End of Process).
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_AUTO_INITIALIZE 0x100 ///< Automatically reload base and count at the end of the DMA transfer.
+
+///
+/// The DMA opreration type for EFI_ISA_IO_PROTOCOL DMA requests.
+///
+typedef enum {
+ ///
+ /// A read operation from system memory by a bus master.
+ ///
+ EfiIsaIoOperationBusMasterRead,
+ ///
+ /// A write operation to system memory by a bus master.
+ ///
+ EfiIsaIoOperationBusMasterWrite,
+ ///
+ /// Provides both read and write access to system memory by both the processor
+ /// and a bus master. The buffer is coherent from both the processor's and the
+ /// bus master's point of view.
+ ///
+ EfiIsaIoOperationBusMasterCommonBuffer,
+ ///
+ /// A read operation from system memory by a slave device.
+ ///
+ EfiIsaIoOperationSlaveRead,
+ ///
+ /// A write operation to system memory by a slave master.
+ ///
+ EfiIsaIoOperationSlaveWrite,
+ EfiIsaIoOperationMaximum
+} EFI_ISA_IO_PROTOCOL_OPERATION;
+
+/**
+ Performs ISA I/O and MMIO Read/Write Cycles
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Width Specifies the width of the I/O or MMIO operation.
+ @param[in] Offset The offset into the ISA I/O or MMIO space to start the
+ operation.
+ @param[in] Count The number of I/O or MMIO operations to perform.
+ @param[in, out] Buffer For read operations, the destination buffer to store
+ the results. For write operations, the source buffer to
+ write data from.
+
+ @retval EFI_SUCCESS The data was successfully read from or written to the device.
+ @retval EFI_UNSUPPORTED The Offset is not valid for this device.
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_IO_MEM)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN EFI_ISA_IO_PROTOCOL_WIDTH Width,
+ IN UINT32 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+///
+/// Structure of functions for accessing ISA I/O and MMIO space.
+///
+typedef struct {
+ ///
+ /// Read from ISA I/O or MMIO space.
+ ///
+ EFI_ISA_IO_PROTOCOL_IO_MEM Read;
+ ///
+ /// Write to ISA I/O or MMIO space.
+ ///
+ EFI_ISA_IO_PROTOCOL_IO_MEM Write;
+} EFI_ISA_IO_PROTOCOL_ACCESS;
+
+/**
+ Copies data from one region of ISA MMIO space to another region of ISA
+ MMIO space.
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Width Specifies the width of the MMIO copy operation.
+ @param[in] DestOffset The offset of the destination in ISA MMIO space.
+ @param[in] SrcOffset The offset of the source in ISA MMIO space.
+ @param[in] Count The number tranfers to perform for this copy operation.
+
+ @retval EFI_SUCCESS The data was copied successfully.
+ @retval EFI_UNSUPPORTED The DestOffset or SrcOffset is not valid for this device.
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_COPY_MEM)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN EFI_ISA_IO_PROTOCOL_WIDTH Width,
+ IN UINT32 DestOffset,
+ IN UINT32 SrcOffset,
+ IN UINTN Count
+ );
+
+/**
+ Maps a memory region for DMA.
+
+ This function returns the device-specific addresses required to access system memory.
+ This function is used to map system memory for ISA DMA operations. All ISA DMA
+ operations must be performed through their mapped addresses, and such mappings must
+ be freed with EFI_ISA_IO_PROTOCOL.Unmap() after the DMA operation is completed.
+
+ If the DMA operation is a single read or write data transfer through an ISA bus
+ master, then EfiIsaIoOperationBusMasterRead or EfiIsaIoOperationBusMasterWrite
+ is used and the range is unmapped to complete the operation. If the DMA operation
+ is a single read or write data transfer through an ISA slave controller, then
+ EfiIsaIoOperationSlaveRead or EfiIsaIoOperationSlaveWrite is used and the range
+ is unmapped to complete the operation.
+
+ If performing a DMA read operation, all the data must be present in system memory before the Map() is performed. Similarly,
+ if performing a DMA write operation, the data must not be accessed in system
+ memory until EFI_ISA_IO_PROTOCOL.Unmap() is performed. Bus master operations that
+ require both read and write access or require multiple host device interactions
+ within the same mapped region must use EfiIsaIoOperationBusMasterCommonBuffer.
+ However, only memory allocated via the EFI_ISA_IO_PROTOCOL.AllocateBuffer() interface
+ is guaranteed to be able to be mapped for this operation type. In all mapping
+ requests the NumberOfBytes returned may be less than originally requested. It is
+ the caller's responsibility to make additional requests to complete the entire
+ transfer.
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Operation Indicates the type of DMA (slave or bus master),
+ and if the DMA operation is going to read or
+ write to system memory.
+ @param[in] ChannelNumber The slave channel number to use for this DMA
+ operation. If Operation and ChannelAttributes
+ shows that this device performs bus mastering
+ DMA, then this field is ignored. The legal
+ range for this field is 0..7.
+ @param[in] ChannelAttributes A bitmask of the attributes used to configure
+ the slave DMA channel for this DMA operation.
+ See EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_* for the
+ legal bit combinations.
+ @param[in] HostAddress The system memory address to map to the device.
+ @param[in, out] NumberOfBytes On input the number of bytes to map. On
+ output the number of bytes that were mapped.
+ @param[out] DeviceAddress The resulting map address for the bus master
+ device to use to access the hosts HostAddress.
+ @param[out] Mapping A returned value that must be passed to into
+ EFI_ISA_IO_PROTOCOL.Unmap() to free all the the
+ resources associated with this map request.
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_INVALID_PARAMETER The Operation is undefined.
+ @retval EFI_INVALID_PARAMETER The HostAddress is undefined.
+ @retval EFI_UNSUPPORTED The HostAddress can not be mapped as a common buffer.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_MAP)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN EFI_ISA_IO_PROTOCOL_OPERATION Operation,
+ IN UINT8 ChannelNumber OPTIONAL,
+ IN UINT32 ChannelAttributes,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
+ );
+
+/**
+ Unmaps a memory region that was previously mapped with EFI_ISA_IO_PROTOCOL.Map().
+
+ The EFI_ISA_IO_PROTOCOL.Map() operation is completed and any corresponding
+ resources are released. If the operation was EfiIsaIoOperationSlaveWrite
+ or EfiIsaIoOperationBusMasterWrite, the data is committed to system memory.
+ Any resources used for the mapping are freed.
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Mapping The mapping value returned from EFI_ISA_IO_PROTOCOL.Map().
+
+ @retval EFI_SUCCESS The memory region was unmapped.
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_UNMAP)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN VOID *Mapping
+ );
+
+/**
+ Allocates pages that are suitable for an EfiIsaIoOperationBusMasterCommonBuffer
+ mapping.
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Type The type allocation to perform.
+ @param[in] MemoryType The type of memory to allocate.
+ @param[in] Pages The number of pages to allocate.
+ @param[out] HostAddress A pointer to store the base address of the allocated range.
+ @param[in] Attributes The requested bit mask of attributes for the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_INVALID_PARAMETER Type is invalid.
+ @retval EFI_INVALID_PARAMETER MemoryType is invalid.
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.
+ @retval EFI_UNSUPPORTED Attributes is unsupported.
+ @retval EFI_UNSUPPORTED The memory range specified by HostAddress, Pages,
+ and Type is not available for common buffer use.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
+ );
+
+/**
+ Frees a common buffer that was allocated with EFI_ISA_IO_PROTOCOL.AllocateBuffer().
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+ @param[in] Pages The number of pages to free from the previously allocated common buffer.
+ @param[in] HostAddress The base address of the previously allocated common buffer.
+
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER The memory was not allocated with EFI_ISA_IO.AllocateBufer().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_FREE_BUFFER)(
+ IN EFI_ISA_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
+ );
+
+/**
+ Flushes a DMA buffer, which forces all DMA posted write transactions to complete.
+
+ @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The DMA buffers were flushed.
+ @retval EFI_DEVICE_ERROR The buffers were not flushed due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISA_IO_PROTOCOL_FLUSH)(
+ IN EFI_ISA_IO_PROTOCOL *This
+ );
+
+///
+/// The EFI_ISA_IO_PROTOCOL provides the basic Memory, I/O, and DMA interfaces
+/// used to abstract accesses to ISA controllers. There is one EFI_ISA_IO_PROTOCOL
+/// instance for each ISA controller on a ISA bus. A device driver that wishes
+/// to manage an ISA controller in a system will have to retrieve the
+/// ISA_PCI_IO_PROTOCOL instance associated with the ISA controller.
+///
+struct _EFI_ISA_IO_PROTOCOL {
+ EFI_ISA_IO_PROTOCOL_ACCESS Mem;
+ EFI_ISA_IO_PROTOCOL_ACCESS Io;
+ EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
+ EFI_ISA_IO_PROTOCOL_MAP Map;
+ EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
+ EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
+ EFI_ISA_IO_PROTOCOL_FLUSH Flush;
+ ///
+ /// The list of I/O , MMIO, DMA, and Interrupt resources associated with the
+ /// ISA controller abstracted by this instance of the EFI_ISA_IO_PROTOCOL.
+ ///
+ EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
+ ///
+ /// The size, in bytes, of the ROM image.
+ ///
+ UINT32 RomSize;
+ ///
+ /// A pointer to the in memory copy of the ROM image. The ISA Bus Driver is responsible
+ /// for allocating memory for the ROM image, and copying the contents of the ROM to memory
+ /// during ISA Bus initialization.
+ ///
+ VOID *RomImage;
+};
+
+extern EFI_GUID gEfiIsaIoProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBios.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBios.h new file mode 100644 index 000000000..cb320b601 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBios.h @@ -0,0 +1,1553 @@ +/** @file
+ The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage
+ under EFI and Legacy OS boot. This file also includes all the related
+ COMPATIBILITY16 structures and definitions.
+
+ Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow
+ well known naming conventions.
+
+ Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode
+ environment. Reverse thunk is the code that does the opposite.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.98.
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_H_
+#define _EFI_LEGACY_BIOS_H_
+
+///
+///
+///
+#pragma pack(1)
+
+typedef UINT8 SERIAL_MODE;
+typedef UINT8 PARALLEL_MODE;
+
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
+
+///
+/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
+/// physical address range. It is located on a 16-byte boundary and provides the physical address of the
+/// entry point for the Compatibility16 functions. These functions provide the platform-specific
+/// information that is required by the generic EfiCompatibility code. The functions are invoked via
+/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
+/// entry point.
+///
+typedef struct {
+ ///
+ /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
+ /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
+ ///
+ UINT32 Signature;
+
+ ///
+ /// The value required such that byte checksum of TableLength equals zero.
+ ///
+ UINT8 TableChecksum;
+
+ ///
+ /// The length of this table.
+ ///
+ UINT8 TableLength;
+
+ ///
+ /// The major EFI revision for which this table was generated.
+ ///
+ UINT8 EfiMajorRevision;
+
+ ///
+ /// The minor EFI revision for which this table was generated.
+ ///
+ UINT8 EfiMinorRevision;
+
+ ///
+ /// The major revision of this table.
+ ///
+ UINT8 TableMajorRevision;
+
+ ///
+ /// The minor revision of this table.
+ ///
+ UINT8 TableMinorRevision;
+
+ ///
+ /// Reserved for future usage.
+ ///
+ UINT16 Reserved;
+
+ ///
+ /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
+ ///
+ UINT16 Compatibility16CallSegment;
+
+ ///
+ /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
+ ///
+ UINT16 Compatibility16CallOffset;
+
+ ///
+ /// The segment of the entry point within the traditional BIOS for EfiCompatibility
+ /// to invoke the PnP installation check.
+ ///
+ UINT16 PnPInstallationCheckSegment;
+
+ ///
+ /// The Offset of the entry point within the traditional BIOS for EfiCompatibility
+ /// to invoke the PnP installation check.
+ ///
+ UINT16 PnPInstallationCheckOffset;
+
+ ///
+ /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform
+ ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).
+ ///
+ UINT32 EfiSystemTable;
+
+ ///
+ /// The address of an OEM-provided identifier string. The string is null terminated.
+ ///
+ UINT32 OemIdStringPointer;
+
+ ///
+ /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
+ /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
+ /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
+ /// RSD PTR with either the ACPI 1.0b or 2.0 values.
+ ///
+ UINT32 AcpiRsdPtrPointer;
+
+ ///
+ /// The OEM revision number. Usage is undefined but provided for OEM module usage.
+ ///
+ UINT16 OemRevision;
+
+ ///
+ /// The 32-bit physical address where INT15 E820 data is stored within the traditional
+ /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
+ /// data to the indicated area.
+ ///
+ UINT32 E820Pointer;
+
+ ///
+ /// The length of the E820 data and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 E820Length;
+
+ ///
+ /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
+ /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
+ /// copy the data to the indicated area.
+ ///
+ UINT32 IrqRoutingTablePointer;
+
+ ///
+ /// The length of the $PIR table and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 IrqRoutingTableLength;
+
+ ///
+ /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
+ /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data
+ /// to the indicated area.
+ ///
+ UINT32 MpTablePtr;
+
+ ///
+ /// The length of the MP table and is filled in by the EfiCompatibility code.
+ ///
+ UINT32 MpTableLength;
+
+ ///
+ /// The segment of the OEM-specific INT table/code.
+ ///
+ UINT16 OemIntSegment;
+
+ ///
+ /// The offset of the OEM-specific INT table/code.
+ ///
+ UINT16 OemIntOffset;
+
+ ///
+ /// The segment of the OEM-specific 32-bit table/code.
+ ///
+ UINT16 Oem32Segment;
+
+ ///
+ /// The offset of the OEM-specific 32-bit table/code.
+ ///
+ UINT16 Oem32Offset;
+
+ ///
+ /// The segment of the OEM-specific 16-bit table/code.
+ ///
+ UINT16 Oem16Segment;
+
+ ///
+ /// The offset of the OEM-specific 16-bit table/code.
+ ///
+ UINT16 Oem16Offset;
+
+ ///
+ /// The segment of the TPM binary passed to 16-bit CSM.
+ ///
+ UINT16 TpmSegment;
+
+ ///
+ /// The offset of the TPM binary passed to 16-bit CSM.
+ ///
+ UINT16 TpmOffset;
+
+ ///
+ /// A pointer to a string identifying the independent BIOS vendor.
+ ///
+ UINT32 IbvPointer;
+
+ ///
+ /// This field is NULL for all systems not supporting PCI Express. This field is the base
+ /// value of the start of the PCI Express memory-mapped configuration registers and
+ /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
+ /// Compatibility16InitializeYourself().
+ /// Compatibility16InitializeYourself() is defined in Compatibility16
+ /// Functions.
+ ///
+ UINT32 PciExpressBase;
+
+ ///
+ /// Maximum PCI bus number assigned.
+ ///
+ UINT8 LastPciBus;
+
+ ///
+ /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If
+ /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region
+ /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.
+ ///
+ UINT32 UmaAddress;
+
+ ///
+ /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region
+ /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).
+ ///
+ UINT32 UmaSize;
+
+ ///
+ /// Start Address of high memory that can be used for permanent allocation. If zero,
+ /// high memory is not available for permanent allocation.
+ ///
+ UINT32 HiPermanentMemoryAddress;
+
+ ///
+ /// Size of high memory that can be used for permanent allocation in bytes. If zero,
+ /// high memory is not available for permanent allocation.
+ ///
+ UINT32 HiPermanentMemorySize;
+} EFI_COMPATIBILITY16_TABLE;
+
+///
+/// Functions provided by the CSM binary which communicate between the EfiCompatibility
+/// and Compatibility16 code.
+///
+/// Inconsistent with the specification here:
+/// The member's name started with "Compatibility16" [defined in Intel Framework
+/// Compatibility Support Module Specification / 0.97 version]
+/// has been changed to "Legacy16" since keeping backward compatible.
+///
+typedef enum {
+ ///
+ /// Causes the Compatibility16 code to do any internal initialization required.
+ /// Input:
+ /// AX = Compatibility16InitializeYourself
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
+ /// Return:
+ /// AX = Return Status codes
+ ///
+ Legacy16InitializeYourself = 0x0000,
+
+ ///
+ /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
+ /// Input:
+ /// AX = Compatibility16UpdateBbs
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
+ /// Return:
+ /// AX = Returned status codes
+ ///
+ Legacy16UpdateBbs = 0x0001,
+
+ ///
+ /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
+ /// code is read/write.
+ /// Input:
+ /// AX = Compatibility16PrepareToBoot
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
+ /// Return:
+ /// AX = Returned status codes
+ ///
+ Legacy16PrepareToBoot = 0x0002,
+
+ ///
+ /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
+ /// Input:
+ /// AX = Compatibility16Boot
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16Boot = 0x0003,
+
+ ///
+ /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
+ /// stored in CMOS and is the priority number of the last attempted boot device.
+ /// Input:
+ /// AX = Compatibility16RetrieveLastBootDevice
+ /// Output:
+ /// AX = Returned status codes
+ /// BX = Priority number of the boot device.
+ ///
+ Legacy16RetrieveLastBootDevice = 0x0004,
+
+ ///
+ /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
+ /// Input:
+ /// AX = Compatibility16DispatchOprom
+ /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
+ /// Output:
+ /// AX = Returned status codes
+ /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
+ ///
+ Legacy16DispatchOprom = 0x0005,
+
+ ///
+ /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
+ /// of that region.
+ /// Input:
+ /// AX = Compatibility16GetTableAddress
+ /// BX = Allocation region
+ /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
+ /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
+ /// CX = Requested length in bytes.
+ /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
+ /// Output:
+ /// AX = Returned status codes
+ /// DS:BX = Address of the region
+ ///
+ Legacy16GetTableAddress = 0x0006,
+
+ ///
+ /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
+ /// Input:
+ /// AX = Compatibility16SetKeyboardLeds
+ /// CL = LED status.
+ /// Bit 0 Scroll Lock 0 = Off
+ /// Bit 1 NumLock
+ /// Bit 2 Caps Lock
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16SetKeyboardLeds = 0x0007,
+
+ ///
+ /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
+ /// do not have an OpROM associated with them. An example is SATA.
+ /// Input:
+ /// AX = Compatibility16InstallPciHandler
+ /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
+ /// Output:
+ /// AX = Returned status codes
+ ///
+ Legacy16InstallPciHandler = 0x0008
+} EFI_COMPATIBILITY_FUNCTIONS;
+
+
+///
+/// EFI_DISPATCH_OPROM_TABLE
+///
+typedef struct {
+ UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.
+ UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.
+ UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
+ UINT8 PciBus; ///< The PCI bus.
+ UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
+ UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
+ ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
+ ///< OpROM BIOS Setup to be executed.
+ UINT32 BbsTablePointer; ///< A pointer to the BBS table.
+ UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
+ ///< means that the relocation of this run time code is not supported.
+ ///< Inconsistent with specification here:
+ ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
+ ///< has been changed to "RuntimeSegment" since keeping backward compatible.
+
+} EFI_DISPATCH_OPROM_TABLE;
+
+///
+/// EFI_TO_COMPATIBILITY16_INIT_TABLE
+///
+typedef struct {
+ ///
+ /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
+ ///
+ UINT32 BiosLessThan1MB;
+
+ ///
+ /// The starting address of the high memory block.
+ ///
+ UINT32 HiPmmMemory;
+
+ ///
+ /// The length of high memory block.
+ ///
+ UINT32 HiPmmMemorySizeInBytes;
+
+ ///
+ /// The segment of the reverse thunk call code.
+ ///
+ UINT16 ReverseThunkCallSegment;
+
+ ///
+ /// The offset of the reverse thunk call code.
+ ///
+ UINT16 ReverseThunkCallOffset;
+
+ ///
+ /// The number of E820 entries copied to the Compatibility16 BIOS.
+ ///
+ UINT32 NumberE820Entries;
+
+ ///
+ /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
+ ///
+ UINT32 OsMemoryAbove1Mb;
+
+ ///
+ /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
+ ///
+ UINT32 ThunkStart;
+
+ ///
+ /// The size of the thunk code.
+ ///
+ UINT32 ThunkSizeInBytes;
+
+ ///
+ /// Starting address of memory under 1 MB.
+ ///
+ UINT32 LowPmmMemory;
+
+ ///
+ /// The length of low Memory block.
+ ///
+ UINT32 LowPmmMemorySizeInBytes;
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;
+
+///
+/// DEVICE_PRODUCER_SERIAL.
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the serial port.
+ UINT8 Irq; ///< IRQ assigned to the serial port.
+ SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
+} DEVICE_PRODUCER_SERIAL;
+
+///
+/// DEVICE_PRODUCER_SERIAL's modes.
+///@{
+#define DEVICE_SERIAL_MODE_NORMAL 0x00
+#define DEVICE_SERIAL_MODE_IRDA 0x01
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
+///@)
+
+///
+/// DEVICE_PRODUCER_PARALLEL.
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the parallel port.
+ UINT8 Irq; ///< IRQ assigned to the parallel port.
+ UINT8 Dma; ///< DMA assigned to the parallel port.
+ PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
+} DEVICE_PRODUCER_PARALLEL;
+
+///
+/// DEVICE_PRODUCER_PARALLEL's modes.
+///@{
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
+///@}
+
+///
+/// DEVICE_PRODUCER_FLOPPY
+///
+typedef struct {
+ UINT16 Address; ///< I/O address assigned to the floppy.
+ UINT8 Irq; ///< IRQ assigned to the floppy.
+ UINT8 Dma; ///< DMA assigned to the floppy.
+ UINT8 NumberOfFloppy; ///< Number of floppies in the system.
+} DEVICE_PRODUCER_FLOPPY;
+
+///
+/// LEGACY_DEVICE_FLAGS
+///
+typedef struct {
+ UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
+ UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
+ UINT32 Reserved : 30; ///< Reserved for future usage.
+} LEGACY_DEVICE_FLAGS;
+
+///
+/// DEVICE_PRODUCER_DATA_HEADER
+///
+typedef struct {
+ DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
+ DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
+ DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
+ UINT8 MousePresent; ///< Flag to indicate if mouse is present.
+ LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
+} DEVICE_PRODUCER_DATA_HEADER;
+
+///
+/// ATAPI_IDENTIFY
+///
+typedef struct {
+ UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
+} ATAPI_IDENTIFY;
+
+///
+/// HDD_INFO
+///
+typedef struct {
+ ///
+ /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
+ /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
+ /// 1 is slave.
+ ///
+ UINT16 Status;
+
+ ///
+ /// PCI bus of IDE controller.
+ ///
+ UINT32 Bus;
+
+ ///
+ /// PCI device of IDE controller.
+ ///
+ UINT32 Device;
+
+ ///
+ /// PCI function of IDE controller.
+ ///
+ UINT32 Function;
+
+ ///
+ /// Command ports base address.
+ ///
+ UINT16 CommandBaseAddress;
+
+ ///
+ /// Control ports base address.
+ ///
+ UINT16 ControlBaseAddress;
+
+ ///
+ /// Bus master address.
+ ///
+ UINT16 BusMasterAddress;
+
+ UINT8 HddIrq;
+
+ ///
+ /// Data that identifies the drive data; one per possible attached drive.
+ ///
+ ATAPI_IDENTIFY IdentifyDrive[2];
+} HDD_INFO;
+
+///
+/// HDD_INFO status bits
+///
+#define HDD_PRIMARY 0x01
+#define HDD_SECONDARY 0x02
+#define HDD_MASTER_ATAPI_CDROM 0x04
+#define HDD_SLAVE_ATAPI_CDROM 0x08
+#define HDD_MASTER_IDE 0x20
+#define HDD_SLAVE_IDE 0x40
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
+
+///
+/// BBS_STATUS_FLAGS;\.
+///
+typedef struct {
+ UINT16 OldPosition : 4; ///< Prior priority.
+ UINT16 Reserved1 : 4; ///< Reserved for future use.
+ UINT16 Enabled : 1; ///< If 0, ignore this entry.
+ UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
+ ///< 1 = Boot attempted failed.
+
+ ///
+ /// State of media present.
+ /// 00 = No bootable media is present in the device.
+ /// 01 = Unknown if a bootable media present.
+ /// 10 = Media is present and appears bootable.
+ /// 11 = Reserved.
+ ///
+ UINT16 MediaPresent : 2;
+ UINT16 Reserved2 : 4; ///< Reserved for future use.
+} BBS_STATUS_FLAGS;
+
+///
+/// BBS_TABLE, device type values & boot priority values.
+///
+typedef struct {
+ ///
+ /// The boot priority for this boot device. Values are defined below.
+ ///
+ UINT16 BootPriority;
+
+ ///
+ /// The PCI bus for this boot device.
+ ///
+ UINT32 Bus;
+
+ ///
+ /// The PCI device for this boot device.
+ ///
+ UINT32 Device;
+
+ ///
+ /// The PCI function for the boot device.
+ ///
+ UINT32 Function;
+
+ ///
+ /// The PCI class for this boot device.
+ ///
+ UINT8 Class;
+
+ ///
+ /// The PCI Subclass for this boot device.
+ ///
+ UINT8 SubClass;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
+ ///
+ UINT16 MfgStringOffset;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
+ ///
+ UINT16 MfgStringSegment;
+
+ ///
+ /// BBS device type. BBS device types are defined below.
+ ///
+ UINT16 DeviceType;
+
+ ///
+ /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
+ ///
+ BBS_STATUS_FLAGS StatusFlags;
+
+ ///
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
+ /// BCV devices.
+ ///
+ UINT16 BootHandlerOffset;
+
+ ///
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
+ /// BCV devices.
+ ///
+ UINT16 BootHandlerSegment;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing this device.
+ ///
+ UINT16 DescStringOffset;
+
+ ///
+ /// Segment:offset address of an ASCIIZ description string describing this device.
+ ///
+ UINT16 DescStringSegment;
+
+ ///
+ /// Reserved.
+ ///
+ UINT32 InitPerReserved;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq13Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq18Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq19Handler;
+
+ ///
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
+ ///
+ UINT32 AdditionalIrq40Handler;
+ UINT8 AssignedDriveNumber;
+ UINT32 AdditionalIrq41Handler;
+ UINT32 AdditionalIrq46Handler;
+ UINT32 IBV1;
+ UINT32 IBV2;
+} BBS_TABLE;
+
+///
+/// BBS device type values
+///@{
+#define BBS_FLOPPY 0x01
+#define BBS_HARDDISK 0x02
+#define BBS_CDROM 0x03
+#define BBS_PCMCIA 0x04
+#define BBS_USB 0x05
+#define BBS_EMBED_NETWORK 0x06
+#define BBS_BEV_DEVICE 0x80
+#define BBS_UNKNOWN 0xff
+///@}
+
+///
+/// BBS boot priority values
+///@{
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC
+#define BBS_LOWEST_PRIORITY 0xFFFD
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
+#define BBS_IGNORE_ENTRY 0xFFFF
+///@}
+
+///
+/// SMM_ATTRIBUTES
+///
+typedef struct {
+ ///
+ /// Access mechanism used to generate the soft SMI. Defined types are below. The other
+ /// values are reserved for future usage.
+ ///
+ UINT16 Type : 3;
+
+ ///
+ /// The size of "port" in bits. Defined values are below.
+ ///
+ UINT16 PortGranularity : 3;
+
+ ///
+ /// The size of data in bits. Defined values are below.
+ ///
+ UINT16 DataGranularity : 3;
+
+ ///
+ /// Reserved for future use.
+ ///
+ UINT16 Reserved : 7;
+} SMM_ATTRIBUTES;
+
+///
+/// SMM_ATTRIBUTES type values.
+///@{
+#define STANDARD_IO 0x00
+#define STANDARD_MEMORY 0x01
+///@}
+
+///
+/// SMM_ATTRIBUTES port size constants.
+///@{
+#define PORT_SIZE_8 0x00
+#define PORT_SIZE_16 0x01
+#define PORT_SIZE_32 0x02
+#define PORT_SIZE_64 0x03
+///@}
+
+///
+/// SMM_ATTRIBUTES data size constants.
+///@{
+#define DATA_SIZE_8 0x00
+#define DATA_SIZE_16 0x01
+#define DATA_SIZE_32 0x02
+#define DATA_SIZE_64 0x03
+///@}
+
+///
+/// SMM_FUNCTION & relating constants.
+///
+typedef struct {
+ UINT16 Function : 15;
+ UINT16 Owner : 1;
+} SMM_FUNCTION;
+
+///
+/// SMM_FUNCTION Function constants.
+///@{
+#define INT15_D042 0x0000
+#define GET_USB_BOOT_INFO 0x0001
+#define DMI_PNP_50_57 0x0002
+///@}
+
+///
+/// SMM_FUNCTION Owner constants.
+///@{
+#define STANDARD_OWNER 0x0
+#define OEM_OWNER 0x1
+///@}
+
+///
+/// This structure assumes both port and data sizes are 1. SmmAttribute must be
+/// properly to reflect that assumption.
+///
+typedef struct {
+ ///
+ /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
+ /// SMM_ATTRIBUTES is defined below.
+ ///
+ SMM_ATTRIBUTES SmmAttributes;
+
+ ///
+ /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
+ ///
+ SMM_FUNCTION SmmFunction;
+
+ ///
+ /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
+ ///
+ UINT8 SmmPort;
+
+ ///
+ /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
+ ///
+ UINT8 SmmData;
+} SMM_ENTRY;
+
+///
+/// SMM_TABLE
+///
+typedef struct {
+ UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
+ SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
+} SMM_TABLE;
+
+///
+/// UDC_ATTRIBUTES
+///
+typedef struct {
+ ///
+ /// This bit set indicates that the ServiceAreaData is valid.
+ ///
+ UINT8 DirectoryServiceValidity : 1;
+
+ ///
+ /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
+ /// DirectoryServiceValidity is 0.
+ ///
+ UINT8 RabcaUsedFlag : 1;
+
+ ///
+ /// This bit set indicates to execute hard disk diagnostics.
+ ///
+ UINT8 ExecuteHddDiagnosticsFlag : 1;
+
+ ///
+ /// Reserved for future use. Set to 0.
+ ///
+ UINT8 Reserved : 5;
+} UDC_ATTRIBUTES;
+
+///
+/// UD_TABLE
+///
+typedef struct {
+ ///
+ /// This field contains the bit-mapped attributes of the PARTIES information. Type
+ /// UDC_ATTRIBUTES is defined below.
+ ///
+ UDC_ATTRIBUTES Attributes;
+
+ ///
+ /// This field contains the zero-based device on which the selected
+ /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
+ ///
+ UINT8 DeviceNumber;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the parent device.
+ /// This index allows the user to reference the parent device information such as PCI
+ /// bus, device function.
+ ///
+ UINT8 BbsTableEntryNumberForParentDevice;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the boot entry.
+ ///
+ UINT8 BbsTableEntryNumberForBoot;
+
+ ///
+ /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
+ ///
+ UINT8 BbsTableEntryNumberForHddDiag;
+
+ ///
+ /// The raw Beer data.
+ ///
+ UINT8 BeerData[128];
+
+ ///
+ /// The raw data of selected service area.
+ ///
+ UINT8 ServiceAreaData[64];
+} UD_TABLE;
+
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00
+#define MAX_IDE_CONTROLLER 8
+
+///
+/// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+///
+typedef struct {
+ UINT16 MajorVersion; ///< The EfiCompatibility major version number.
+ UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
+ UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.
+ UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.
+ UINT32 SmbiosTableLength;
+ //
+ // Legacy SIO state
+ //
+ DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
+ UINT16 DevicePathType; ///< The default boot type.
+ UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
+ UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
+ ///< Compatibility16InitializeYourself() function.
+ //
+ // Controller & Drive Identify[2] per controller information
+ //
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
+ UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
+ UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.
+ UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.
+ UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
+ ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
+ ///< memory may have been discovered.
+ UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
+ ///< UD_TABLE is defined below.
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
+
+///
+/// EFI_LEGACY_INSTALL_PCI_HANDLER
+///
+typedef struct {
+ UINT8 PciBus; ///< The PCI bus of the device.
+ UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
+ UINT8 PciSegment; ///< The PCI segment of the device.
+ UINT8 PciClass; ///< The PCI class code of the device.
+ UINT8 PciSubclass; ///< The PCI subclass code of the device.
+ UINT8 PciInterface; ///< The PCI interface code of the device.
+ //
+ // Primary section
+ //
+ UINT8 PrimaryIrq; ///< The primary device IRQ.
+ UINT8 PrimaryReserved; ///< Reserved.
+ UINT16 PrimaryControl; ///< The primary device control I/O base.
+ UINT16 PrimaryBase; ///< The primary device I/O base.
+ UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
+ //
+ // Secondary Section
+ //
+ UINT8 SecondaryIrq; ///< The secondary device IRQ.
+ UINT8 SecondaryReserved; ///< Reserved.
+ UINT16 SecondaryControl; ///< The secondary device control I/O base.
+ UINT16 SecondaryBase; ///< The secondary device I/O base.
+ UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
+} EFI_LEGACY_INSTALL_PCI_HANDLER;
+
+//
+// Restore default pack value
+//
+#pragma pack()
+
+#define EFI_LEGACY_BIOS_PROTOCOL_GUID \
+ { \
+ 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;
+
+///
+/// Flags returned by CheckPciRom().
+///
+#define NO_ROM 0x00
+#define ROM_FOUND 0x01
+#define VALID_LEGACY_ROM 0x02
+#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.
+
+///
+/// The following macros do not appear in the Framework CSM Specification and
+/// are kept for backward compatibility only. They convert 32-bit address (_Adr)
+/// to Segment:Offset 16-bit form.
+///
+///@{
+#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)
+#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)
+///@}
+
+#define CARRY_FLAG 0x01
+
+///
+/// EFI_EFLAGS_REG
+///
+typedef struct {
+ UINT32 CF:1;
+ UINT32 Reserved1:1;
+ UINT32 PF:1;
+ UINT32 Reserved2:1;
+ UINT32 AF:1;
+ UINT32 Reserved3:1;
+ UINT32 ZF:1;
+ UINT32 SF:1;
+ UINT32 TF:1;
+ UINT32 IF:1;
+ UINT32 DF:1;
+ UINT32 OF:1;
+ UINT32 IOPL:2;
+ UINT32 NT:1;
+ UINT32 Reserved4:2;
+ UINT32 VM:1;
+ UINT32 Reserved5:14;
+} EFI_EFLAGS_REG;
+
+///
+/// EFI_DWORD_REGS
+///
+typedef struct {
+ UINT32 EAX;
+ UINT32 EBX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 ESI;
+ UINT32 EDI;
+ EFI_EFLAGS_REG EFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT32 EBP;
+ UINT32 ESP;
+} EFI_DWORD_REGS;
+
+///
+/// EFI_FLAGS_REG
+///
+typedef struct {
+ UINT16 CF:1;
+ UINT16 Reserved1:1;
+ UINT16 PF:1;
+ UINT16 Reserved2:1;
+ UINT16 AF:1;
+ UINT16 Reserved3:1;
+ UINT16 ZF:1;
+ UINT16 SF:1;
+ UINT16 TF:1;
+ UINT16 IF:1;
+ UINT16 DF:1;
+ UINT16 OF:1;
+ UINT16 IOPL:2;
+ UINT16 NT:1;
+ UINT16 Reserved4:1;
+} EFI_FLAGS_REG;
+
+///
+/// EFI_WORD_REGS
+///
+typedef struct {
+ UINT16 AX;
+ UINT16 ReservedAX;
+ UINT16 BX;
+ UINT16 ReservedBX;
+ UINT16 CX;
+ UINT16 ReservedCX;
+ UINT16 DX;
+ UINT16 ReservedDX;
+ UINT16 SI;
+ UINT16 ReservedSI;
+ UINT16 DI;
+ UINT16 ReservedDI;
+ EFI_FLAGS_REG Flags;
+ UINT16 ReservedFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT16 BP;
+ UINT16 ReservedBP;
+ UINT16 SP;
+ UINT16 ReservedSP;
+} EFI_WORD_REGS;
+
+///
+/// EFI_BYTE_REGS
+///
+typedef struct {
+ UINT8 AL, AH;
+ UINT16 ReservedAX;
+ UINT8 BL, BH;
+ UINT16 ReservedBX;
+ UINT8 CL, CH;
+ UINT16 ReservedCX;
+ UINT8 DL, DH;
+ UINT16 ReservedDX;
+} EFI_BYTE_REGS;
+
+///
+/// EFI_IA32_REGISTER_SET
+///
+typedef union {
+ EFI_DWORD_REGS E;
+ EFI_WORD_REGS X;
+ EFI_BYTE_REGS H;
+} EFI_IA32_REGISTER_SET;
+
+/**
+ Thunk to 16-bit real mode and execute a software interrupt with a vector
+ of BiosInt. Regs will contain the 16-bit register context on entry and
+ exit.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] BiosInt The processor interrupt vector to invoke.
+ @param[in,out] Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode.
+
+ @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status.
+ @retval FALSE There was a BIOS error in the target code.
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_INT86)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 BiosInt,
+ IN OUT EFI_IA32_REGISTER_SET *Regs
+ );
+
+/**
+ Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
+ 16-bit register context on entry and exit. Arguments can be passed on
+ the Stack argument
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Segment The segemnt of 16-bit mode call.
+ @param[in] Offset The offset of 16-bit mdoe call.
+ @param[in] Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode.
+ @param[in] Stack The caller allocated stack used to pass arguments.
+ @param[in] StackSize The size of Stack in bytes.
+
+ @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT16 Segment,
+ IN UINT16 Offset,
+ IN EFI_IA32_REGISTER_SET *Regs,
+ IN VOID *Stack,
+ IN UINTN StackSize
+ );
+
+/**
+ Test to see if a legacy PCI ROM exists for this device. Optionally return
+ the Legacy ROM instance for this PCI device.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded
+ @param[out] RomImage Return the legacy PCI ROM for this device.
+ @param[out] RomSize The size of ROM Image.
+ @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:
+ - 00 = No ROM.
+ - 01 = ROM Found.
+ - 02 = ROM is a valid legacy ROM.
+
+ @retval EFI_SUCCESS The Legacy Option ROM available for this device
+ @retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage, OPTIONAL
+ OUT UINTN *RomSize, OPTIONAL
+ OUT UINTN *Flags
+ );
+
+/**
+ Load a legacy PC-AT OPROM on the PciHandle device. Return information
+ about how many disks were added by the OPROM and the shadow address and
+ size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:
+
+ @param[in] This The protocol instance pointer.
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.
+ This value is NULL if RomImage is non-NULL. This is the normal
+ case.
+ @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is
+ no hardware associated with the ROM and thus no PciHandle,
+ otherwise is must be NULL.
+ Example is PXE base code.
+ @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:
+ - 00 = No ROM.
+ - 01 = ROM found.
+ - 02 = ROM is a valid legacy ROM.
+ @param[out] DiskStart The disk number of first device hooked by the ROM. If DiskStart
+ is the same as DiskEnd no disked were hooked.
+ @param[out] DiskEnd disk number of the last device hooked by the ROM.
+ @param[out] RomShadowAddress Shadow address of PC-AT ROM.
+ @param[out] RomShadowSize Size of RomShadowAddress in bytes.
+
+ @retval EFI_SUCCESS Thunk completed, see Regs for status.
+ @retval EFI_INVALID_PARAMETER PciHandle not found
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ IN VOID **RomImage,
+ OUT UINTN *Flags,
+ OUT UINT8 *DiskStart, OPTIONAL
+ OUT UINT8 *DiskEnd, OPTIONAL
+ OUT VOID **RomShadowAddress, OPTIONAL
+ OUT UINT32 *ShadowedRomSize OPTIONAL
+ );
+
+/**
+ This function attempts to traditionally boot the specified BootOption. If the EFI context has
+ been compromised, this function will not return. This procedure is not used for loading an EFI-aware
+ OS off a traditional device. The following actions occur:
+ - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to
+ Compatibility16.
+ - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.
+ - Find the traditional SMI handler from a firmware volume and register the traditional SMI
+ handler with the EFI SMI handler.
+ - Build onboard IDE information and pass this information to the Compatibility16 code.
+ - Make sure all PCI Interrupt Line registers are programmed to match 8259.
+ - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).
+ - Shadow all PCI ROMs.
+ - Set up BDA and EBDA standard areas before the legacy boot.
+ - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.
+ - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This
+ invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal
+ data structures. The boot device list is a parameter.
+ - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation
+ causes a thunk into the Compatibility16 code, which does an INT19.
+ - If the Compatibility16Boot() function returns, then the boot failed in a graceful
+ manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state
+ of EFI code is unknown.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] BootOption The EFI Device Path from BootXXXX variable.
+ @param[in] LoadOptionSize The size of LoadOption in size.
+ @param[in] LoadOption LThe oadOption from BootXXXX variable.
+
+ @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BootOption,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions
+ );
+
+/**
+ This function takes the Leds input parameter and sets/resets the BDA accordingly.
+ Leds is also passed to Compatibility16 code, in case any special processing is required.
+ This function is normally called from EFI Setup drivers that handle user-selectable
+ keyboard options such as boot with NUM LOCK on/off. This function does not
+ touch the keyboard or keyboard LEDs but only the BDA.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Leds The status of current Scroll, Num & Cap lock LEDS:
+ - Bit 0 is Scroll Lock 0 = Not locked.
+ - Bit 1 is Num Lock.
+ - Bit 2 is Caps Lock.
+
+ @retval EFI_SUCCESS The BDA was updated successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 Leds
+ );
+
+/**
+ Retrieve legacy BBS info and assign boot priority.
+
+ @param[in] This The protocol instance pointer.
+ @param[out] HddCount The number of HDD_INFO structures.
+ @param[out] HddInfo Onboard IDE controller information.
+ @param[out] BbsCount The number of BBS_TABLE structures.
+ @param[in,out] BbsTable Points to List of BBS_TABLE.
+
+ @retval EFI_SUCCESS Tables were returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *HddCount,
+ OUT HDD_INFO **HddInfo,
+ OUT UINT16 *BbsCount,
+ IN OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ Assign drive number to legacy HDD drives prior to booting an EFI
+ aware OS so the OS can access drives without an EFI driver.
+
+ @param[in] This The protocol instance pointer.
+ @param[out] BbsCount The number of BBS_TABLE structures
+ @param[out] BbsTable List of BBS entries
+
+ @retval EFI_SUCCESS Drive numbers assigned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *BbsCount,
+ OUT BBS_TABLE **BbsTable
+ );
+
+/**
+ To boot from an unconventional device like parties and/or execute
+ HDD diagnostics.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] Attributes How to interpret the other input parameters.
+ @param[in] BbsEntry The 0-based index into the BbsTable for the parent
+ device.
+ @param[in] BeerData A pointer to the 128 bytes of ram BEER data.
+ @param[in] ServiceAreaData A pointer to the 64 bytes of raw Service Area data. The
+ caller must provide a pointer to the specific Service
+ Area and not the start all Service Areas.
+
+ @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UDC_ATTRIBUTES Attributes,
+ IN UINTN BbsEntry,
+ IN VOID *BeerData,
+ IN VOID *ServiceAreaData
+ );
+
+/**
+ Shadow all legacy16 OPROMs that haven't been shadowed.
+ Warning: Use this with caution. This routine disconnects all EFI
+ drivers. If used externally, then the caller must re-connect EFI
+ drivers.
+
+ @param[in] This The protocol instance pointer.
+
+ @retval EFI_SUCCESS OPROMs were shadowed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This
+ );
+
+/**
+ Get a region from the LegacyBios for S3 usage.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] LegacyMemorySize The size of required region.
+ @param[in] Region The region to use.
+ 00 = Either 0xE0000 or 0xF0000 block.
+ - Bit0 = 1 0xF0000 block.
+ - Bit1 = 1 0xE0000 block.
+ @param[in] Alignment Address alignment. Bit mapped. The first non-zero
+ bit from right is alignment.
+ @param[out] LegacyMemoryAddress The Region Assigned
+
+ @retval EFI_SUCCESS The Region was assigned.
+ @retval EFI_ACCESS_DENIED The function was previously invoked.
+ @retval Other The Region was not assigned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN UINTN Region,
+ IN UINTN Alignment,
+ OUT VOID **LegacyMemoryAddress
+ );
+
+/**
+ Get a region from the LegacyBios for Tiano usage. Can only be invoked once.
+
+ @param[in] This The protocol instance pointer.
+ @param[in] LegacyMemorySize The size of data to copy.
+ @param[in] LegacyMemoryAddress The Legacy Region destination address.
+ Note: must be in region assigned by
+ LegacyBiosGetLegacyRegion.
+ @param[in] LegacyMemorySourceAddress The source of the data to copy.
+
+ @retval EFI_SUCCESS The Region assigned.
+ @retval EFI_ACCESS_DENIED Destination was outside an assigned region.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN VOID *LegacyMemoryAddress,
+ IN VOID *LegacyMemorySourceAddress
+ );
+
+///
+/// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()
+/// member function allows the BDS to support booting a traditional OS.
+/// EFI thunks drivers that make EFI bindings for BIOS INT services use
+/// all the other member functions.
+///
+struct _EFI_LEGACY_BIOS_PROTOCOL {
+ ///
+ /// Performs traditional software INT. See the Int86() function description.
+ ///
+ EFI_LEGACY_BIOS_INT86 Int86;
+
+ ///
+ /// Performs a far call into Compatibility16 or traditional OpROM code.
+ ///
+ EFI_LEGACY_BIOS_FARCALL86 FarCall86;
+
+ ///
+ /// Checks if a traditional OpROM exists for this device.
+ ///
+ EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;
+
+ ///
+ /// Loads a traditional OpROM in traditional OpROM address space.
+ ///
+ EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;
+
+ ///
+ /// Boots a traditional OS.
+ ///
+ EFI_LEGACY_BIOS_BOOT LegacyBoot;
+
+ ///
+ /// Updates BDA to reflect the current EFI keyboard LED status.
+ ///
+ EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;
+
+ ///
+ /// Allows an external agent, such as BIOS Setup, to get the BBS data.
+ ///
+ EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;
+
+ ///
+ /// Causes all legacy OpROMs to be shadowed.
+ ///
+ EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;
+
+ ///
+ /// Performs all actions prior to boot. Used when booting an EFI-aware OS
+ /// rather than a legacy OS.
+ ///
+ EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;
+
+ ///
+ /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.
+ ///
+ EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;
+
+ ///
+ /// Allows EFI to copy data to the area specified by GetLegacyRegion.
+ ///
+ EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;
+
+ ///
+ /// Allows the user to boot off an unconventional device such as a PARTIES partition.
+ ///
+ EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;
+};
+
+//
+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if
+// NULL pointer detection feature is enabled. Following macro can be used to
+// enable/disable page 0 before/after accessing it.
+//
+#define ACCESS_PAGE0_CODE(statements) \
+ do { \
+ EFI_STATUS Status_; \
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \
+ \
+ Desc_.Attributes = 0; \
+ Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \
+ ASSERT_EFI_ERROR (Status_); \
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \
+ Status_ = gDS->SetMemorySpaceAttributes ( \
+ 0, \
+ EFI_PAGES_TO_SIZE(1), \
+ Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \
+ ); \
+ ASSERT_EFI_ERROR (Status_); \
+ } \
+ \
+ { \
+ statements; \
+ } \
+ \
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \
+ Status_ = gDS->SetMemorySpaceAttributes ( \
+ 0, \
+ EFI_PAGES_TO_SIZE(1), \
+ Desc_.Attributes \
+ ); \
+ ASSERT_EFI_ERROR (Status_); \
+ } \
+ } while (FALSE)
+
+extern EFI_GUID gEfiLegacyBiosProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBiosPlatform.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBiosPlatform.h new file mode 100644 index 000000000..607ef358f --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyBiosPlatform.h @@ -0,0 +1,755 @@ +/** @file
+ The EFI Legacy BIOS Platform Protocol is used to mate a Legacy16
+ implementation with this EFI code. The EFI driver that produces
+ the Legacy BIOS protocol is generic and consumes this protocol.
+ A driver that matches the Legacy16 produces this protocol
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_PLATFORM_H_
+#define _EFI_LEGACY_BIOS_PLATFORM_H_
+
+///
+/// Legacy BIOS Platform depends on HDD_INFO and EFI_COMPATIBILITY16_TABLE that
+/// are defined with the Legacy BIOS Protocol
+///
+#include <Protocol/LegacyBios.h>
+
+#define EFI_LEGACY_BIOS_PLATFORM_PROTOCOL_GUID \
+ { \
+ 0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x9, 0x7, 0x9c, 0xc, 0xb4 } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL EFI_LEGACY_BIOS_PLATFORM_PROTOCOL;
+
+/**
+ This enum specifies the Mode param values for GetPlatformInfo()
+**/
+typedef enum {
+ ///
+ /// This mode is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The mode returns the MP table address in EFI memory, along with its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the MP table is to be copied. The second
+ /// invocation allows any MP table address fixes to occur in the EFI memory copy of the
+ /// MP table. The caller, not EfiGetPlatformBinaryMpTable, copies the modified MP
+ /// table to the allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to the MP table.
+ ///
+ /// TableSize Size in bytes of the MP table.
+ ///
+ /// Location Location to place table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit-mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ // LegacySegment Segment in which EfiCompatibility code will place the MP table.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the MP table.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The MP table was returned.
+ ///
+ /// EFI_UNSUPPORTED The MP table is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryMpTable = 0,
+ ///
+ /// This mode returns a block of data. The content and usage is IBV or OEM defined.
+ /// OEMs or IBVs normally use this function for nonstandard Compatibility16 runtime soft
+ /// INTs. It is the responsibility of this routine to coalesce multiple OEM 16 bit functions, if
+ /// they exist, into one coherent package that is understandable by the Compatibility16 code.
+ /// This function is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The function returns the table address in EFI memory, as well as its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the data (table) is to be copied. The second
+ /// invocation allows any data (table) address fixes to occur in the EFI memory copy of
+ /// the table. The caller, not GetOemIntData(), copies the modified data (table) to the
+ /// allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to OEM legacy 16 bit code or data.
+ ///
+ /// TableSize Size of data.
+ ///
+ /// Location Location to place table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The data was returned successfully.
+ ///
+ /// EFI_UNSUPPORTED Oem INT is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryOemIntData = 1,
+ ///
+ /// This mode returns a block of data. The content and usage is IBV defined. OEMs or
+ /// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It
+ /// is the responsibility of this routine to coalesce multiple OEM 16 bit functions, if they
+ /// exist, into one coherent package that is understandable by the Compatibility16 code.
+ ///
+ /// Example usage: A legacy mobile BIOS that has a pre-existing runtime
+ /// interface to return the battery status to calling applications.
+ ///
+ /// This mode is invoked twice. The first invocation has LegacySegment and
+ /// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
+ /// The second invocation has LegacySegment and LegacyOffset set to the location
+ /// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
+ /// invocation allows any table address fixes to occur in the EFI memory copy of the table.
+ /// The caller, not EfiGetPlatformBinaryOem16Data, copies the modified table to
+ /// the allocated region in 0xF0000 or 0xE0000 block after the second invocation.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table Pointer to OEM legacy 16 bit code or data.
+ ///
+ /// TableSize Size of data.
+ ///
+ /// Location Location to place the table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS The data was returned successfully.
+ ///
+ /// EFI_UNSUPPORTED Oem16 is not supported on this platform.
+ ///
+ EfiGetPlatformBinaryOem16Data = 2,
+///
+/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
+/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
+/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
+/// exist, into one coherent package that is understandable by the Compatibility16 code.
+///
+/// Example usage: A legacy mobile BIOS that has a pre existing runtime
+/// interface to return the battery status to calling applications.
+///
+/// This mode is invoked twice. The first invocation has LegacySegment and
+/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
+///
+/// The second invocation has LegacySegment and LegacyOffset set to the location
+/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
+/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
+/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
+/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
+///
+/// Note: There are two generic mechanisms by which this mode can be used.
+/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
+/// the data into the F0000 or E0000 block in the Compatibility16 code. The
+/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
+/// be viewed as two UINT16 entries.
+/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
+/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
+/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
+/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
+/// as a single UINT32 entry as determined by the IBV.
+///
+/// The function parameters associated with this mode are:
+///
+/// TableSize Size of data.
+///
+/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
+/// Bit 0 = 1 0xF0000 64 KB block.
+/// Bit 1 = 1 0xE0000 64 KB block.
+/// Multiple bits can be set.
+///
+/// Alignment Bit mapped address alignment granularity.
+/// The first nonzero bit from the right is the address granularity.
+///
+/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+///
+/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+///
+/// The return values associated with this mode are:
+/// EFI_SUCCESS The data was returned successfully.
+/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
+///
+EfiGetPlatformBinaryOem32Data = 3,
+ ///
+ /// This mode returns a TPM binary image for the onboard TPM device.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table TPM binary image for the onboard TPM device.
+ ///
+ /// TableSize Size of BinaryImage in bytes.
+ ///
+ /// Location Location to place the table. 0x00. Either 0xE0000 or 0xF0000 64 KB blocks.
+ /// Bit 0 = 1 0xF0000 64 KB block.
+ /// Bit 1 = 1 0xE0000 64 KB block.
+ /// Multiple bits can be set.
+ ///
+ /// Alignment Bit mapped address alignment granularity.
+ /// The first nonzero bit from the right is the address granularity.
+ ///
+ /// LegacySegment Segment in which EfiCompatibility code will place the table or data.
+ ///
+ /// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS BinaryImage is valid.
+ ///
+ /// EFI_UNSUPPORTED Mode is not supported on this platform.
+ ///
+ /// EFI_NOT_FOUND No BinaryImage was found.
+ ///
+ EfiGetPlatformBinaryTpmBinary = 4,
+ ///
+ /// The mode finds the Compatibility16 Rom Image.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// System ROM image for the platform.
+ ///
+ /// TableSize Size of Table in bytes.
+ ///
+ /// Location Ignored.
+ ///
+ /// Alignment Ignored.
+ ///
+ /// LegacySegment Ignored.
+ ///
+ /// LegacyOffset Ignored.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS ROM image found.
+ ///
+ /// EFI_NOT_FOUND ROM not found.
+ ///
+ EfiGetPlatformBinarySystemRom = 5,
+ ///
+ /// This mode returns the Base address of PciExpress memory mapped configuration
+ /// address space.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Table System ROM image for the platform.
+ ///
+ /// TableSize Size of Table in bytes.
+ ///
+ /// Location Ignored.
+ ///
+ /// Alignment Ignored.
+ ///
+ /// LegacySegment Ignored.
+ ///
+ /// LegacyOffset Ignored.
+ ///
+ /// The return values associated with this mode are:
+ ///
+ /// EFI_SUCCESS Address is valid.
+ ///
+ /// EFI_UNSUPPORTED System does not PciExpress.
+ ///
+ EfiGetPlatformPciExpressBase = 6,
+ ///
+ EfiGetPlatformPmmSize = 7,
+ ///
+ EfiGetPlatformEndOpromShadowAddr = 8,
+ ///
+} EFI_GET_PLATFORM_INFO_MODE;
+
+/**
+ This enum specifies the Mode param values for GetPlatformHandle().
+**/
+typedef enum {
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the VGA
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all VGA handles found.
+ ///
+ /// HandleCount Number of VGA handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformVgaHandle = 0,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the IDE
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all IDE handles found.
+ ///
+ /// HandleCount Number of IDE handles found.
+ ///
+ /// AdditionalData Pointer to HddInfo.
+ /// Information about all onboard IDE controllers.
+ ///
+ EfiGetPlatformIdeHandle = 1,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the ISA bus
+ /// controller used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all ISA bus handles found.
+ ///
+ /// HandleCount Number of ISA bus handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformIsaBusHandle = 2,
+ ///
+ /// This mode returns the Compatibility16 policy for the device that should be the USB
+ /// device used during a Compatibility16 boot.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0x00.
+ ///
+ /// HandleBuffer Buffer of all USB handles found.
+ ///
+ /// HandleCount Number of USB bus handles found.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiGetPlatformUsbHandle = 3
+} EFI_GET_PLATFORM_HANDLE_MODE;
+
+/**
+ This enum specifies the Mode param values for PlatformHooks().
+ Note: Any OEM defined hooks start with 0x8000.
+**/
+typedef enum {
+ ///
+ /// This mode allows any preprocessing before scanning OpROMs.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle Handle of device OpROM is associated with.
+ ///
+ /// ShadowAddress Address where OpROM is shadowed.
+ ///
+ /// Compatibility16Table NULL.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookPrepareToScanRom = 0,
+ ///
+ /// This mode shadows legacy OpROMS that may not have a physical device associated with
+ /// them. It returns EFI_SUCCESS if the ROM was shadowed.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle 0.
+ ///
+ /// ShadowAddress First free OpROM area, after other OpROMs have been dispatched..
+ ///
+ /// Compatibility16Table Pointer to the Compatibility16 Table.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookShadowServiceRoms= 1,
+ ///
+ /// This mode allows platform to perform any required operation after an OpROM has
+ /// completed its initialization.
+ ///
+ /// The function parameters associated with this mode are:
+ ///
+ /// Type 0.
+ ///
+ /// DeviceHandle Handle of device OpROM is associated with.
+ ///
+ /// ShadowAddress Address where OpROM is shadowed.
+ ///
+ /// Compatibility16Table NULL.
+ ///
+ /// AdditionalData NULL.
+ ///
+ EfiPlatformHookAfterRomInit = 2
+} EFI_GET_PLATFORM_HOOK_MODE;
+
+///
+/// This IRQ has not been assigned to PCI.
+///
+#define PCI_UNUSED 0x00
+///
+/// This IRQ has been assigned to PCI.
+///
+#define PCI_USED 0xFF
+///
+/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.
+///
+#define LEGACY_USED 0xFE
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// IRQ for this entry.
+ ///
+ UINT8 Irq;
+ ///
+ /// Status of this IRQ.
+ ///
+ /// PCI_UNUSED 0x00. This IRQ has not been assigned to PCI.
+ ///
+ /// PCI_USED 0xFF. This IRQ has been assigned to PCI.
+ ///
+ /// LEGACY_USED 0xFE. This IRQ has been used by an SIO legacy
+ /// device and cannot be used by PCI.
+ ///
+ UINT8 Used;
+} EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY;
+
+//
+// Define PIR table structures
+//
+#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
+
+typedef struct {
+ ///
+ /// $PIR.
+ ///
+ UINT32 Signature;
+ ///
+ /// 0x00.
+ ///
+ UINT8 MinorVersion;
+ ///
+ /// 0x01 for table version 1.0.
+ ///
+ UINT8 MajorVersion;
+ ///
+ /// 0x20 + RoutingTableEntries * 0x10.
+ ///
+ UINT16 TableSize;
+ ///
+ /// PCI interrupt router bus.
+ ///
+ UINT8 Bus;
+ ///
+ /// PCI interrupt router device/function.
+ ///
+ UINT8 DevFun;
+ ///
+ /// If nonzero, bit map of IRQs reserved for PCI.
+ ///
+ UINT16 PciOnlyIrq;
+ ///
+ /// Vendor ID of a compatible PCI interrupt router.
+ ///
+ UINT16 CompatibleVid;
+ ///
+ /// Device ID of a compatible PCI interrupt router.
+ ///
+ UINT16 CompatibleDid;
+ ///
+ /// If nonzero, a value passed directly to the IRQ miniport's Initialize function.
+ ///
+ UINT32 Miniport;
+ ///
+ /// Reserved for future usage.
+ ///
+ UINT8 Reserved[11];
+ ///
+ /// This byte plus the sum of all other bytes in the LocalPirqTable equal 0x00.
+ ///
+ UINT8 Checksum;
+} EFI_LEGACY_PIRQ_TABLE_HEADER;
+
+
+typedef struct {
+ ///
+ /// If nonzero, a value assigned by the IBV.
+ ///
+ UINT8 Pirq;
+ ///
+ /// If nonzero, the IRQs that can be assigned to this device.
+ ///
+ UINT16 IrqMask;
+} EFI_LEGACY_PIRQ_ENTRY;
+
+typedef struct {
+ ///
+ /// PCI bus of the entry.
+ ///
+ UINT8 Bus;
+ ///
+ /// PCI device of this entry.
+ ///
+ UINT8 Device;
+ ///
+ /// An IBV value and IRQ mask for PIRQ pins A through D.
+ ///
+ EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
+ ///
+ /// If nonzero, the slot number assigned by the board manufacturer.
+ ///
+ UINT8 Slot;
+ ///
+ /// Reserved for future use.
+ ///
+ UINT8 Reserved;
+} EFI_LEGACY_IRQ_ROUTING_ENTRY;
+
+#pragma pack()
+
+
+/**
+ Finds the binary data or other platform information.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what data to return. See See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Table Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param TableSize Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Location Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param Alignment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param LegacySegment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+ @param LegacyOffset Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.
+
+ @retval EFI_SUCCESS Data returned successfully.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Binary image or table not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_INFO_MODE Mode,
+ OUT VOID **Table,
+ OUT UINTN *TableSize,
+ OUT UINTN *Location,
+ OUT UINTN *Alignment,
+ IN UINT16 LegacySegment,
+ IN UINT16 LegacyOffset
+ );
+
+/**
+ Returns a buffer of handles for the requested subfunction.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what handle to return. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param Type Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param HandleBuffer Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param HandleCount Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+ @param AdditionalData Mode specific. See EFI_GET_PLATFORM_HANDLE_MODE enum.
+
+ @retval EFI_SUCCESS Handle is valid.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Handle is not known.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
+ IN UINT16 Type,
+ OUT EFI_HANDLE **HandleBuffer,
+ OUT UINTN *HandleCount,
+ IN VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Load and initialize the Legacy BIOS SMM handler.
+
+ @param This The protocol instance pointer.
+ @param EfiToLegacy16BootTable A pointer to Legacy16 boot table.
+
+ @retval EFI_SUCCESS SMM code loaded.
+ @retval EFI_DEVICE_ERROR SMM code failed to load
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_SMM_INIT)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ Allows platform to perform any required action after a LegacyBios operation.
+ Invokes the specific sub function specified by Mode.
+
+ @param This The protocol instance pointer.
+ @param Mode Specifies what handle to return. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param Type Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param DeviceHandle Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param ShadowAddress Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param Compatibility16Table Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+ @param AdditionalData Mode specific. See EFI_GET_PLATFORM_HOOK_MODE enum.
+
+ @retval EFI_SUCCESS The operation performed successfully. Mode specific.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_HOOKS)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HOOK_MODE Mode,
+ IN UINT16 Type,
+ IN EFI_HANDLE DeviceHandle, OPTIONAL
+ IN OUT UINTN *ShadowAddress, OPTIONAL
+ IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table, OPTIONAL
+ OUT VOID **AdditionalData OPTIONAL
+ );
+
+/**
+ Returns information associated with PCI IRQ routing.
+ This function returns the following information associated with PCI IRQ routing:
+ * An IRQ routing table and number of entries in the table.
+ * The $PIR table and its size.
+ * A list of PCI IRQs and the priority order to assign them.
+
+ @param This The protocol instance pointer.
+ @param RoutingTable The pointer to PCI IRQ Routing table.
+ This location is the $PIR table minus the header.
+ @param RoutingTableEntries The number of entries in table.
+ @param LocalPirqTable $PIR table.
+ @param PirqTableSize $PIR table size.
+ @param LocalIrqPriorityTable A list of interrupts in priority order to assign.
+ @param IrqPriorityTableEntries The number of entries in the priority table.
+
+ @retval EFI_SUCCESS Data was successfully returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ OUT VOID **RoutingTable,
+ OUT UINTN *RoutingTableEntries,
+ OUT VOID **LocalPirqTable, OPTIONAL
+ OUT UINTN *PirqTableSize, OPTIONAL
+ OUT VOID **LocalIrqPriorityTable, OPTIONAL
+ OUT UINTN *IrqPriorityTableEntries OPTIONAL
+ );
+
+/**
+ Translates the given PIRQ accounting for bridge.
+ This function translates the given PIRQ back through all buses, if required,
+ and returns the true PIRQ and associated IRQ.
+
+ @param This The protocol instance pointer.
+ @param PciBus The PCI bus number for this device.
+ @param PciDevice The PCI device number for this device.
+ @param PciFunction The PCI function number for this device.
+ @param Pirq Input is PIRQ reported by device, and output is true PIRQ.
+ @param PciIrq The IRQ already assigned to the PIRQ, or the IRQ to be
+ assigned to the PIRQ.
+
+ @retval EFI_SUCCESS The PIRQ was translated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN UINTN PciBus,
+ IN UINTN PciDevice,
+ IN UINTN PciFunction,
+ IN OUT UINT8 *Pirq,
+ OUT UINT8 *PciIrq
+ );
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This The protocol instance pointer.
+ @param BbsDevicePath The EFI Device Path from BootXXXX variable.
+ @param BbsTable The Internal BBS table.
+ @param LoadOptionSize The size of LoadOption in size.
+ @param LoadOption The LoadOption from BootXXXX variable
+ @param EfiToLegacy16BootTable A pointer to BootTable structure
+
+ @retval EFI_SUCCESS Ready to boot.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT)(
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
+ IN VOID *BbsTable,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ IN VOID *EfiToLegacy16BootTable
+ );
+
+/**
+ This protocol abstracts the platform portion of the traditional BIOS.
+**/
+struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
+ ///
+ /// Gets binary data or other platform information.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
+ ///
+ /// Returns a buffer of all handles matching the requested subfunction.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
+ ///
+ /// Loads and initializes the traditional BIOS SMM handler.
+ EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
+ ///
+ /// Allows platform to perform any required actions after a LegacyBios operation.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
+ ///
+ /// Gets $PIR table.
+ EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
+ ///
+ /// Translates the given PIRQ to the final value after traversing any PCI bridges.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
+ ///
+ /// Final platform function before the system attempts to boot to a traditional OS.
+ ///
+ EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
+};
+
+extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyInterrupt.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyInterrupt.h new file mode 100644 index 000000000..b3ad2ffb3 --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/LegacyInterrupt.h @@ -0,0 +1,122 @@ +/** @file
+ This protocol abstracts the PIRQ programming from the generic EFI Compatibility Support Modules (CSMs).
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This protocol is defined in Framework for the EFI Compatibility Support Module specification.
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_INTERRUPT_H_
+#define _EFI_LEGACY_INTERRUPT_H_
+
+
+#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
+ { \
+ 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
+ }
+
+typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;
+
+/**
+ Get the number of PIRQs this hardware supports.
+
+ @param This The protocol instance pointer.
+ @param NumberPirsq The number of PIRQs that are supported.
+
+ @retval EFI_SUCCESS The number of PIRQs was returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *NumberPirqs
+ );
+
+/**
+ Gets the PCI location associated with this protocol.
+
+ @param This The Protocol instance pointer.
+ @param Bus The PCI Bus.
+ @param Device The PCI Device.
+ @param Function The PCI Function.
+
+ @retval EFI_SUCCESS The Bus, Device, and Function were returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *Bus,
+ OUT UINT8 *Device,
+ OUT UINT8 *Function
+ );
+
+/**
+ Read the PIRQ register and return the data
+
+ @param This The protocol instance pointer.
+ @param PirqNumber The PIRQ register to read.
+ @param PirqData The data read.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ OUT UINT8 *PirqData
+ );
+
+/**
+ Write the specified PIRQ register with the given data.
+
+ @param This The protocol instance pointer.
+ @param PirqNumber A PIRQ register to read.
+ @param PirqData The data to write.
+
+ @retval EFI_SUCCESS The PIRQ was programmed.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ)(
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ IN UINT8 PirqData
+ );
+
+struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
+ ///
+ /// Gets the number of PIRQs supported.
+ ///
+ EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
+
+ ///
+ /// Gets the PCI bus, device, and function that is associated with this protocol.
+ ///
+ EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
+
+ ///
+ /// Reads the indicated PIRQ register.
+ ///
+ EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
+
+ ///
+ /// Writes to the indicated PIRQ register.
+ ///
+ EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
+};
+
+extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
+
+#endif
diff --git a/roms/edk2/OvmfPkg/Csm/Include/Protocol/VgaMiniPort.h b/roms/edk2/OvmfPkg/Csm/Include/Protocol/VgaMiniPort.h new file mode 100644 index 000000000..5071c712f --- /dev/null +++ b/roms/edk2/OvmfPkg/Csm/Include/Protocol/VgaMiniPort.h @@ -0,0 +1,88 @@ +/** @file
+ The VGA Mini Port Protocol used to set the text display mode of a VGA controller.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __VGA_MINI_PORT_H_
+#define __VGA_MINI_PORT_H_
+
+///
+/// Global ID for the EFI_VGA_MINI_PORT_PROTOCOL.
+///
+#define EFI_VGA_MINI_PORT_PROTOCOL_GUID \
+ { \
+ 0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3 } \
+ }
+
+///
+/// Forward declaration for the EFI_VGA_MINI_PORT_PROTOCOL.
+///
+typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
+
+/**
+ Sets the text display mode of a VGA controller.
+
+ Sets the text display mode of the VGA controller to the mode specified by
+ ModeNumber. A ModeNumber of 0 is a request for an 80x25 text mode. A
+ ModeNumber of 1 is a request for an 80x50 text mode. If ModeNumber is greater
+ than MaxModeNumber, then EFI_UNSUPPORTED is returned. If the VGA controller
+ is not functioning properly, then EFI_DEVICE_ERROR is returned. If the VGA
+ controller is successfully set to the mode number specified by ModeNumber, then
+ EFI_SUCCESS is returned.
+
+ @param[in] This A pointer to the EFI_VGA_MINI_PORT_PROTOCOL instance.
+ @param[in] ModeNumber The requested mode number. 0 for 80x25. 1 for 80x5.
+
+ @retval EFI_SUCCESS The mode number was set.
+ @retval EFI_UNSUPPORTED The mode number specified by ModeNumber is not supported.
+ @retval EFI_DEVICE_ERROR The device is not functioning properly.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_VGA_MINI_PORT_SET_MODE)(
+ IN EFI_VGA_MINI_PORT_PROTOCOL *This,
+ IN UINTN ModeNumber
+ );
+
+struct _EFI_VGA_MINI_PORT_PROTOCOL {
+ EFI_VGA_MINI_PORT_SET_MODE SetMode;
+ ///
+ /// MMIO base address of the VGA text mode framebuffer. Typically set to 0xB8000.
+ ///
+ UINT64 VgaMemoryOffset;
+ ///
+ /// I/O Port address for the VGA CRTC address register. Typically set to 0x3D4.
+ ///
+ UINT64 CrtcAddressRegisterOffset;
+ ///
+ /// I/O Port address for the VGA CRTC data register. Typically set to 0x3D5.
+ ///
+ UINT64 CrtcDataRegisterOffset;
+ ///
+ /// PCI Controller MMIO BAR index of the VGA text mode frame buffer. Typically
+ /// set to EFI_PCI_IO_PASS_THROUGH_BAR
+ ///
+ UINT8 VgaMemoryBar;
+ ///
+ /// PCI Controller I/O BAR index of the VGA CRTC address register. Typically
+ /// set to EFI_PCI_IO_PASS_THROUGH_BAR
+ ///
+ UINT8 CrtcAddressRegisterBar;
+ ///
+ /// PCI Controller I/O BAR index of the VGA CRTC data register. Typically set
+ /// to EFI_PCI_IO_PASS_THROUGH_BAR
+ ///
+ UINT8 CrtcDataRegisterBar;
+ ///
+ /// The maximum number of text modes that this VGA controller supports.
+ ///
+ UINT8 MaxMode;
+};
+
+extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
+
+#endif
|