diff options
Diffstat (limited to 'roms/edk2/StandaloneMmPkg/Include/Guid')
4 files changed, 251 insertions, 0 deletions
diff --git a/roms/edk2/StandaloneMmPkg/Include/Guid/MmCoreData.h b/roms/edk2/StandaloneMmPkg/Include/Guid/MmCoreData.h new file mode 100644 index 000000000..8bd80e051 --- /dev/null +++ b/roms/edk2/StandaloneMmPkg/Include/Guid/MmCoreData.h @@ -0,0 +1,127 @@ +/** @file
+ MM Core data.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __MM_CORE_DATA_H__
+#define __MM_CORE_DATA_H__
+
+#define MM_CORE_DATA_HOB_GUID \
+ { 0xa160bf99, 0x2aa4, 0x4d7d, { 0x99, 0x93, 0x89, 0x9c, 0xb1, 0x2d, 0xf3, 0x76 }}
+
+extern EFI_GUID gMmCoreDataHobGuid;
+
+typedef struct {
+ //
+ // Address pointer to MM_CORE_PRIVATE_DATA
+ //
+ EFI_PHYSICAL_ADDRESS Address;
+} MM_CORE_DATA_HOB_DATA;
+
+
+///
+/// Define values for the communications buffer used when gEfiEventDxeDispatchGuid is
+/// event signaled. This event is signaled by the DXE Core each time the DXE Core
+/// dispatcher has completed its work. When this event is signaled, the MM Core
+/// if notified, so the MM Core can dispatch MM drivers. If COMM_BUFFER_MM_DISPATCH_ERROR
+/// is returned in the communication buffer, then an error occurred dispatching MM
+/// Drivers. If COMM_BUFFER_MM_DISPATCH_SUCCESS is returned, then the MM Core
+/// dispatched all the drivers it could. If COMM_BUFFER_MM_DISPATCH_RESTART is
+/// returned, then the MM Core just dispatched the MM Driver that registered
+/// the MM Entry Point enabling the use of MM Mode. In this case, the MM Core
+/// should be notified again to dispatch more MM Drivers using MM Mode.
+///
+#define COMM_BUFFER_MM_DISPATCH_ERROR 0x00
+#define COMM_BUFFER_MM_DISPATCH_SUCCESS 0x01
+#define COMM_BUFFER_MM_DISPATCH_RESTART 0x02
+
+///
+/// Signature for the private structure shared between the MM IPL and the MM Core
+///
+#define MM_CORE_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('m', 'm', 'i', 'c')
+
+///
+/// Private structure that is used to share information between the MM IPL and
+/// the MM Core. This structure is allocated from memory of type EfiRuntimeServicesData.
+/// Since runtime memory types are converted to available memory when a legacy boot
+/// is performed, the MM Core must not access any fields of this structure if a legacy
+/// boot is performed. As a result, the MM IPL must create an event notification
+/// for the Legacy Boot event and notify the MM Core that a legacy boot is being
+/// performed. The MM Core can then use this information to filter accesses to
+/// thos structure.
+///
+typedef struct {
+ UINT64 Signature;
+
+ ///
+ /// The number of MMRAM ranges passed from the MM IPL to the MM Core. The MM
+ /// Core uses these ranges of MMRAM to initialize the MM Core memory manager.
+ ///
+ UINT64 MmramRangeCount;
+
+ ///
+ /// A table of MMRAM ranges passed from the MM IPL to the MM Core. The MM
+ /// Core uses these ranges of MMRAM to initialize the MM Core memory manager.
+ ///
+ EFI_PHYSICAL_ADDRESS MmramRanges;
+
+ ///
+ /// The MM Foundation Entry Point. The MM Core fills in this field when the
+ /// MM Core is initialized. The MM IPL is responsbile for registering this entry
+ /// point with the MM Configuration Protocol. The MM Configuration Protocol may
+ /// not be available at the time the MM IPL and MM Core are started, so the MM IPL
+ /// sets up a protocol notification on the MM Configuration Protocol and registers
+ /// the MM Foundation Entry Point as soon as the MM Configuration Protocol is
+ /// available.
+ ///
+ EFI_PHYSICAL_ADDRESS MmEntryPoint;
+
+ ///
+ /// Boolean flag set to TRUE while an MMI is being processed by the MM Core.
+ ///
+ BOOLEAN MmEntryPointRegistered;
+
+ ///
+ /// Boolean flag set to TRUE while an MMI is being processed by the MM Core.
+ ///
+ BOOLEAN InMm;
+
+ ///
+ /// This field is set by the MM Core then the MM Core is initialized. This field is
+ /// used by the MM Base 2 Protocol and MM Communication Protocol implementations in
+ /// the MM IPL.
+ ///
+ EFI_PHYSICAL_ADDRESS Mmst;
+
+ ///
+ /// This field is used by the MM Communicatioon Protocol to pass a buffer into
+ /// a software MMI handler and for the software MMI handler to pass a buffer back to
+ /// the caller of the MM Communication Protocol.
+ ///
+ EFI_PHYSICAL_ADDRESS CommunicationBuffer;
+
+ ///
+ /// This field is used by the MM Communicatioon Protocol to pass the size of a buffer,
+ /// in bytes, into a software MMI handler and for the software MMI handler to pass the
+ /// size, in bytes, of a buffer back to the caller of the MM Communication Protocol.
+ ///
+ UINT64 BufferSize;
+
+ ///
+ /// This field is used by the MM Communication Protocol to pass the return status from
+ /// a software MMI handler back to the caller of the MM Communication Protocol.
+ ///
+ UINT64 ReturnStatus;
+
+ EFI_PHYSICAL_ADDRESS MmCoreImageBase;
+ UINT64 MmCoreImageSize;
+ EFI_PHYSICAL_ADDRESS MmCoreEntryPoint;
+
+ EFI_PHYSICAL_ADDRESS StandaloneBfvAddress;
+} MM_CORE_PRIVATE_DATA;
+
+#endif
diff --git a/roms/edk2/StandaloneMmPkg/Include/Guid/MmFvDispatch.h b/roms/edk2/StandaloneMmPkg/Include/Guid/MmFvDispatch.h new file mode 100644 index 000000000..643f6e65f --- /dev/null +++ b/roms/edk2/StandaloneMmPkg/Include/Guid/MmFvDispatch.h @@ -0,0 +1,33 @@ +/** @file
+ GUIDs for MM Event.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __MM_FV_DISPATCH_H__
+#define __MM_FV_DISPATCH_H__
+
+#define MM_FV_DISPATCH_GUID \
+ { 0xb65694cc, 0x9e3, 0x4c3b, { 0xb5, 0xcd, 0x5, 0xf4, 0x4d, 0x3c, 0xdb, 0xff }}
+
+extern EFI_GUID gMmFvDispatchGuid;
+
+#pragma pack(1)
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS Address;
+ UINT64 Size;
+} EFI_MM_COMMUNICATE_FV_DISPATCH_DATA;
+
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINTN MessageLength;
+ EFI_MM_COMMUNICATE_FV_DISPATCH_DATA Data;
+} EFI_MM_COMMUNICATE_FV_DISPATCH;
+#pragma pack()
+
+#endif
diff --git a/roms/edk2/StandaloneMmPkg/Include/Guid/MmramMemoryReserve.h b/roms/edk2/StandaloneMmPkg/Include/Guid/MmramMemoryReserve.h new file mode 100644 index 000000000..898865ae6 --- /dev/null +++ b/roms/edk2/StandaloneMmPkg/Include/Guid/MmramMemoryReserve.h @@ -0,0 +1,56 @@ +/** @file
+ Definition of GUIDed HOB for reserving MMRAM regions.
+
+ This file defines:
+ * the GUID used to identify the GUID HOB for reserving MMRAM regions.
+ * the data structure of MMRAM descriptor to describe MMRAM candidate regions
+ * values of state of MMRAM candidate regions
+ * the GUID specific data structure of HOB for reserving MMRAM regions.
+ This GUIDed HOB can be used to convey the existence of the T-SEG reservation and H-SEG usage
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ GUIDs defined in MmCis spec version 0.9.
+
+**/
+
+#ifndef _EFI_MM_PEI_MMRAM_MEMORY_RESERVE_H_
+#define _EFI_MM_PEI_MMRAM_MEMORY_RESERVE_H_
+
+#define EFI_MM_PEI_MMRAM_MEMORY_RESERVE \
+ { \
+ 0x0703f912, 0xbf8d, 0x4e2a, {0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 } \
+ }
+
+/**
+* GUID specific data structure of HOB for reserving MMRAM regions.
+*
+* Inconsistent with specification here:
+* EFI_HOB_MMRAM_DESCRIPTOR_BLOCK has been changed to EFI_MMRAM_HOB_DESCRIPTOR_BLOCK.
+* This inconsistency is kept in code in order for backward compatibility.
+**/
+typedef struct {
+ ///
+ /// Designates the number of possible regions in the system
+ /// that can be usable for MMRAM.
+ ///
+ /// Inconsistent with specification here:
+ /// In Framework MM CIS 0.91 specification, it defines the field type as UINTN.
+ /// However, HOBs are supposed to be CPU neutral, so UINT32 should be used instead.
+ ///
+ UINT32 NumberOfMmReservedRegions;
+ ///
+ /// Used throughout this protocol to describe the candidate
+ /// regions for MMRAM that are supported by this platform.
+ ///
+ EFI_MMRAM_DESCRIPTOR Descriptor[1];
+} EFI_MMRAM_HOB_DESCRIPTOR_BLOCK;
+
+extern EFI_GUID gEfiMmPeiSmramMemoryReserveGuid;
+
+#endif
+
diff --git a/roms/edk2/StandaloneMmPkg/Include/Guid/MpInformation.h b/roms/edk2/StandaloneMmPkg/Include/Guid/MpInformation.h new file mode 100644 index 000000000..e3a916dfc --- /dev/null +++ b/roms/edk2/StandaloneMmPkg/Include/Guid/MpInformation.h @@ -0,0 +1,35 @@ +/** @file
+ EFI MP information protocol provides a lightweight MP_SERVICES_PROTOCOL.
+
+ MP information protocol only provides static information of MP processor.
+
+ Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _MP_INFORMATION_H_
+#define _MP_INFORMATION_H_
+
+#include <Protocol/MpService.h>
+#include <PiPei.h>
+#include <Ppi/SecPlatformInformation.h>
+
+#define MP_INFORMATION_GUID \
+ { \
+ 0xba33f15d, 0x4000, 0x45c1, {0x8e, 0x88, 0xf9, 0x16, 0x92, 0xd4, 0x57, 0xe3} \
+ }
+
+#pragma pack(1)
+typedef struct {
+ UINT64 NumberOfProcessors;
+ UINT64 NumberOfEnabledProcessors;
+ EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer[];
+} MP_INFORMATION_HOB_DATA;
+#pragma pack()
+
+extern EFI_GUID gMpInformationHobGuid;
+
+#endif
|