diff options
Diffstat (limited to 'roms/opensbi/lib/utils/sys')
| -rw-r--r-- | roms/opensbi/lib/utils/sys/clint.c | 203 | ||||
| -rw-r--r-- | roms/opensbi/lib/utils/sys/htif.c | 154 | ||||
| -rw-r--r-- | roms/opensbi/lib/utils/sys/objects.mk | 12 | ||||
| -rw-r--r-- | roms/opensbi/lib/utils/sys/sifive_test.c | 57 |
4 files changed, 426 insertions, 0 deletions
diff --git a/roms/opensbi/lib/utils/sys/clint.c b/roms/opensbi/lib/utils/sys/clint.c new file mode 100644 index 000000000..7a392aad8 --- /dev/null +++ b/roms/opensbi/lib/utils/sys/clint.c @@ -0,0 +1,203 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + */ + +#include <sbi/riscv_asm.h> +#include <sbi/riscv_atomic.h> +#include <sbi/riscv_io.h> +#include <sbi/sbi_error.h> +#include <sbi/sbi_hartmask.h> +#include <sbi_utils/sys/clint.h> + +#define CLINT_IPI_OFF 0 +#define CLINT_TIME_CMP_OFF 0x4000 +#define CLINT_TIME_VAL_OFF 0xbff8 + +static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS]; + +void clint_ipi_send(u32 target_hart) +{ + struct clint_data *clint; + + if (SBI_HARTMASK_MAX_BITS <= target_hart) + return; + clint = clint_ipi_hartid2data[target_hart]; + if (!clint) + return; + + /* Set CLINT IPI */ + writel(1, &clint->ipi[target_hart - clint->first_hartid]); +} + +void clint_ipi_clear(u32 target_hart) +{ + struct clint_data *clint; + + if (SBI_HARTMASK_MAX_BITS <= target_hart) + return; + clint = clint_ipi_hartid2data[target_hart]; + if (!clint) + return; + + /* Clear CLINT IPI */ + writel(0, &clint->ipi[target_hart - clint->first_hartid]); +} + +int clint_warm_ipi_init(void) +{ + /* Clear CLINT IPI for current HART */ + clint_ipi_clear(current_hartid()); + + return 0; +} + +int clint_cold_ipi_init(struct clint_data *clint) +{ + u32 i; + + if (!clint) + return SBI_EINVAL; + + /* Initialize private data */ + clint->ipi = (void *)clint->addr; + + /* Update IPI hartid table */ + for (i = 0; i < clint->hart_count; i++) + clint_ipi_hartid2data[clint->first_hartid + i] = clint; + + return 0; +} + +static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS]; + +#if __riscv_xlen != 32 +static u64 clint_time_rd64(volatile u64 *addr) +{ + return readq_relaxed(addr); +} + +static void clint_time_wr64(u64 value, volatile u64 *addr) +{ + writeq_relaxed(value, addr); +} +#endif + +static u64 clint_time_rd32(volatile u64 *addr) +{ + u32 lo, hi; + + do { + hi = readl_relaxed((u32 *)addr + 1); + lo = readl_relaxed((u32 *)addr); + } while (hi != readl_relaxed((u32 *)addr + 1)); + + return ((u64)hi << 32) | (u64)lo; +} + +static void clint_time_wr32(u64 value, volatile u64 *addr) +{ + u32 mask = -1U; + + writel_relaxed(value & mask, (void *)(addr)); + writel_relaxed(value >> 32, (void *)(addr) + 0x04); +} + +u64 clint_timer_value(void) +{ + struct clint_data *clint = clint_timer_hartid2data[current_hartid()]; + + /* Read CLINT Time Value */ + return clint->time_rd(clint->time_val) + clint->time_delta; +} + +void clint_timer_event_stop(void) +{ + u32 target_hart = current_hartid(); + struct clint_data *clint = clint_timer_hartid2data[target_hart]; + + /* Clear CLINT Time Compare */ + clint->time_wr(-1ULL, + &clint->time_cmp[target_hart - clint->first_hartid]); +} + +void clint_timer_event_start(u64 next_event) +{ + u32 target_hart = current_hartid(); + struct clint_data *clint = clint_timer_hartid2data[target_hart]; + + /* Program CLINT Time Compare */ + clint->time_wr(next_event - clint->time_delta, + &clint->time_cmp[target_hart - clint->first_hartid]); +} + +int clint_warm_timer_init(void) +{ + u64 v1, v2, mv; + u32 target_hart = current_hartid(); + struct clint_data *reference; + struct clint_data *clint = clint_timer_hartid2data[target_hart]; + + if (!clint) + return SBI_ENODEV; + + /* + * Compute delta if reference available + * + * We deliberately compute time_delta in warm init so that time_delta + * is computed on a HART which is going to use given CLINT. We use + * atomic flag timer_delta_computed to ensure that only one HART does + * time_delta computation. + */ + if (clint->time_delta_reference) { + reference = clint->time_delta_reference; + if (!atomic_raw_xchg_ulong(&clint->time_delta_computed, 1)) { + v1 = clint->time_rd(clint->time_val); + mv = reference->time_rd(reference->time_val); + v2 = clint->time_rd(clint->time_val); + clint->time_delta = mv - ((v1 / 2) + (v2 / 2)); + } + } + + /* Clear CLINT Time Compare */ + clint->time_wr(-1ULL, + &clint->time_cmp[target_hart - clint->first_hartid]); + + return 0; +} + +int clint_cold_timer_init(struct clint_data *clint, + struct clint_data *reference) +{ + u32 i; + + if (!clint) + return SBI_EINVAL; + + /* Initialize private data */ + clint->time_delta_reference = reference; + clint->time_delta_computed = 0; + clint->time_delta = 0; + clint->time_val = (u64 *)((void *)clint->addr + CLINT_TIME_VAL_OFF); + clint->time_cmp = (u64 *)((void *)clint->addr + CLINT_TIME_CMP_OFF); + clint->time_rd = clint_time_rd32; + clint->time_wr = clint_time_wr32; + + /* Override read/write accessors for 64bit MMIO */ +#if __riscv_xlen != 32 + if (clint->has_64bit_mmio) { + clint->time_rd = clint_time_rd64; + clint->time_wr = clint_time_wr64; + } +#endif + + /* Update timer hartid table */ + for (i = 0; i < clint->hart_count; i++) + clint_timer_hartid2data[clint->first_hartid + i] = clint; + + return 0; +} diff --git a/roms/opensbi/lib/utils/sys/htif.c b/roms/opensbi/lib/utils/sys/htif.c new file mode 100644 index 000000000..fd70fb981 --- /dev/null +++ b/roms/opensbi/lib/utils/sys/htif.c @@ -0,0 +1,154 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2010-2020, The Regents of the University of California + * (Regents). All Rights Reserved. + */ + +#include <sbi/riscv_locks.h> +#include <sbi_utils/sys/htif.h> + +#define HTIF_DATA_BITS 48 +#define HTIF_DATA_MASK ((1ULL << HTIF_DATA_BITS) - 1) +#define HTIF_DATA_SHIFT 0 +#define HTIF_CMD_BITS 8 +#define HTIF_CMD_MASK ((1ULL << HTIF_CMD_BITS) - 1) +#define HTIF_CMD_SHIFT 48 +#define HTIF_DEV_BITS 8 +#define HTIF_DEV_MASK ((1ULL << HTIF_DEV_BITS) - 1) +#define HTIF_DEV_SHIFT 56 + +#define HTIF_DEV_SYSTEM 0 +#define HTIF_DEV_CONSOLE 1 + +#define HTIF_CONSOLE_CMD_GETC 0 +#define HTIF_CONSOLE_CMD_PUTC 1 + +#if __riscv_xlen == 64 +# define TOHOST_CMD(dev, cmd, payload) \ + (((uint64_t)(dev) << HTIF_DEV_SHIFT) | \ + ((uint64_t)(cmd) << HTIF_CMD_SHIFT) | \ + (uint64_t)(payload)) +#else +# define TOHOST_CMD(dev, cmd, payload) ({ \ + if ((dev) || (cmd)) __builtin_trap(); \ + (payload); }) +#endif +#define FROMHOST_DEV(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_DEV_SHIFT) & HTIF_DEV_MASK) +#define FROMHOST_CMD(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_CMD_SHIFT) & HTIF_CMD_MASK) +#define FROMHOST_DATA(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_DATA_SHIFT) & HTIF_DATA_MASK) + +#define PK_SYS_write 64 + +volatile uint64_t tohost __attribute__((section(".htif"))); +volatile uint64_t fromhost __attribute__((section(".htif"))); +static int htif_console_buf; +static spinlock_t htif_lock = SPIN_LOCK_INITIALIZER; + +static void __check_fromhost() +{ + uint64_t fh = fromhost; + if (!fh) + return; + fromhost = 0; + + /* this should be from the console */ + if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE) + __builtin_trap(); + switch (FROMHOST_CMD(fh)) { + case HTIF_CONSOLE_CMD_GETC: + htif_console_buf = 1 + (uint8_t)FROMHOST_DATA(fh); + break; + case HTIF_CONSOLE_CMD_PUTC: + break; + default: + __builtin_trap(); + } +} + +static void __set_tohost(uint64_t dev, uint64_t cmd, uint64_t data) +{ + while (tohost) + __check_fromhost(); + tohost = TOHOST_CMD(dev, cmd, data); +} + +#if __riscv_xlen == 32 +static void do_tohost_fromhost(uint64_t dev, uint64_t cmd, uint64_t data) +{ + spin_lock(&htif_lock); + + __set_tohost(HTIF_DEV_SYSTEM, cmd, data); + + while (1) { + uint64_t fh = fromhost; + if (fh) { + if (FROMHOST_DEV(fh) == HTIF_DEV_SYSTEM && + FROMHOST_CMD(fh) == cmd) { + fromhost = 0; + break; + } + __check_fromhost(); + } + } + + spin_unlock(&htif_lock); +} + +void htif_putc(char ch) +{ + /* HTIF devices are not supported on RV32, so do a proxy write call */ + volatile uint64_t magic_mem[8]; + magic_mem[0] = PK_SYS_write; + magic_mem[1] = HTIF_DEV_CONSOLE; + magic_mem[2] = (uint64_t)(uintptr_t)&ch; + magic_mem[3] = HTIF_CONSOLE_CMD_PUTC; + do_tohost_fromhost(HTIF_DEV_SYSTEM, 0, (uint64_t)(uintptr_t)magic_mem); +} +#else +void htif_putc(char ch) +{ + spin_lock(&htif_lock); + __set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch); + spin_unlock(&htif_lock); +} +#endif + +int htif_getc(void) +{ + int ch; + +#if __riscv_xlen == 32 + /* HTIF devices are not supported on RV32 */ + return -1; +#endif + + spin_lock(&htif_lock); + + __check_fromhost(); + ch = htif_console_buf; + if (ch >= 0) { + htif_console_buf = -1; + __set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0); + } + + spin_unlock(&htif_lock); + + return ch - 1; +} + +int htif_system_reset_check(u32 type, u32 reason) +{ + return 1; +} + +void htif_system_reset(u32 type, u32 reason) +{ + while (1) { + fromhost = 0; + tohost = 1; + } +} diff --git a/roms/opensbi/lib/utils/sys/objects.mk b/roms/opensbi/lib/utils/sys/objects.mk new file mode 100644 index 000000000..7878ca8b4 --- /dev/null +++ b/roms/opensbi/lib/utils/sys/objects.mk @@ -0,0 +1,12 @@ +# +# SPDX-License-Identifier: BSD-2-Clause +# +# Copyright (c) 2019 Western Digital Corporation or its affiliates. +# +# Authors: +# Anup Patel <anup.patel@wdc.com> +# + +libsbiutils-objs-y += sys/clint.o +libsbiutils-objs-y += sys/htif.o +libsbiutils-objs-y += sys/sifive_test.o diff --git a/roms/opensbi/lib/utils/sys/sifive_test.c b/roms/opensbi/lib/utils/sys/sifive_test.c new file mode 100644 index 000000000..fdf31690c --- /dev/null +++ b/roms/opensbi/lib/utils/sys/sifive_test.c @@ -0,0 +1,57 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + */ + +#include <sbi/riscv_io.h> +#include <sbi/sbi_ecall_interface.h> +#include <sbi_utils/sys/sifive_test.h> + +#define FINISHER_FAIL 0x3333 +#define FINISHER_PASS 0x5555 +#define FINISHER_RESET 0x7777 + +static void *sifive_test_base; + +int sifive_test_system_reset_check(u32 type, u32 reason) +{ + switch (type) { + case SBI_SRST_RESET_TYPE_SHUTDOWN: + case SBI_SRST_RESET_TYPE_COLD_REBOOT: + case SBI_SRST_RESET_TYPE_WARM_REBOOT: + return 1; + } + + return 0; +} + +void sifive_test_system_reset(u32 type, u32 reason) +{ + /* + * Tell the "finisher" that the simulation + * was successful so that QEMU exits + */ + switch (type) { + case SBI_SRST_RESET_TYPE_SHUTDOWN: + if (reason == SBI_SRST_RESET_REASON_NONE) + writew(FINISHER_PASS, sifive_test_base); + else + writew(FINISHER_FAIL, sifive_test_base); + break; + case SBI_SRST_RESET_TYPE_COLD_REBOOT: + case SBI_SRST_RESET_TYPE_WARM_REBOOT: + writew(FINISHER_RESET, sifive_test_base); + break; + } +} + +int sifive_test_init(unsigned long base) +{ + sifive_test_base = (void *)base; + + return 0; +} |