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-rw-r--r--roms/u-boot/arch/arc/cpu/arcv1/Makefile5
-rw-r--r--roms/u-boot/arch/arc/cpu/arcv1/ivt.S26
-rw-r--r--roms/u-boot/arch/arc/cpu/arcv2/Makefile5
-rw-r--r--roms/u-boot/arch/arc/cpu/arcv2/ivt.S31
-rw-r--r--roms/u-boot/arch/arc/cpu/u-boot.lds63
5 files changed, 130 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arc/cpu/arcv1/Makefile b/roms/u-boot/arch/arc/cpu/arcv1/Makefile
new file mode 100644
index 000000000..4d42ac667
--- /dev/null
+++ b/roms/u-boot/arch/arc/cpu/arcv1/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+
+obj-y += ivt.o
diff --git a/roms/u-boot/arch/arc/cpu/arcv1/ivt.S b/roms/u-boot/arch/arc/cpu/arcv1/ivt.S
new file mode 100644
index 000000000..3d63430c2
--- /dev/null
+++ b/roms/u-boot/arch/arc/cpu/arcv1/ivt.S
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ */
+
+.section .ivt, "ax",@progbits
+.align 4
+_ivt:
+ /* Critical system events */
+ j _start /* 0 - 0x000 */
+ j memory_error /* 1 - 0x008 */
+ j instruction_error /* 2 - 0x010 */
+
+ /* Device interrupts */
+.rept 29
+ j interrupt_handler /* 3:31 - 0x018:0xF8 */
+.endr
+ /* Exceptions */
+ j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
+ j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
+ j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
+ j EV_TLBProtV /* 0x118, Protection Violation (0x23)
+ or Misaligned Access */
+ j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
+ j EV_Trap /* 0x128, Trap exception (0x25) */
+ j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
diff --git a/roms/u-boot/arch/arc/cpu/arcv2/Makefile b/roms/u-boot/arch/arc/cpu/arcv2/Makefile
new file mode 100644
index 000000000..ab740266b
--- /dev/null
+++ b/roms/u-boot/arch/arc/cpu/arcv2/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+
+obj-y += ivt.o
diff --git a/roms/u-boot/arch/arc/cpu/arcv2/ivt.S b/roms/u-boot/arch/arc/cpu/arcv2/ivt.S
new file mode 100644
index 000000000..3f5b4094f
--- /dev/null
+++ b/roms/u-boot/arch/arc/cpu/arcv2/ivt.S
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ */
+
+.section .ivt, "a",@progbits
+.align 4
+ /* Critical system events */
+.word _start /* 0x00 - Reset */
+.word memory_error /* 0x01 - Memory Error */
+.word instruction_error /* 0x02 - Instruction Error */
+
+ /* Exceptions */
+.word EV_MachineCheck /* 0x03 - Fatal Machine check */
+.word EV_TLBMissI /* 0x04 - Intruction TLB miss */
+.word EV_TLBMissD /* 0x05 - Data TLB miss */
+.word EV_TLBProtV /* 0x06 - Protection Violation or Misaligned Access */
+.word EV_PrivilegeV /* 0x07 - Privilege Violation */
+.word EV_SWI /* 0x08 - Software Interrupt */
+.word EV_Trap /* 0x09 - Trap */
+.word EV_Extension /* 0x0A - Extension Intruction Exception */
+.word EV_DivZero /* 0x0B - Division by Zero */
+.word EV_DCError /* 0x0C - Data cache consistency error */
+.word EV_Maligned /* 0x0D - Misaligned data access */
+.word 0 /* 0x0E - Unused */
+.word 0 /* 0x0F - Unused */
+
+ /* Device interrupts */
+.rept 240
+.word interrupt_handler /* 0x10 - 0xFF */
+.endr
diff --git a/roms/u-boot/arch/arc/cpu/u-boot.lds b/roms/u-boot/arch/arc/cpu/u-boot.lds
new file mode 100644
index 000000000..e12145c76
--- /dev/null
+++ b/roms/u-boot/arch/arc/cpu/u-boot.lds
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ */
+
+#include <config.h>
+
+OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+ . = CONFIG_SYS_TEXT_BASE;
+ __image_copy_start = .;
+ . = ALIGN(1024);
+ __ivt_start = .;
+ .ivt :
+ {
+ KEEP(*(.ivt))
+ }
+ __ivt_end = .;
+
+ . = ALIGN(1024);
+ __text_start = .;
+ .text : {
+ arch/arc/lib/start.o (.text*)
+ *(.text*)
+ }
+ __text_end = .;
+
+ . = ALIGN(4);
+ .rodata : {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ . = ALIGN(4);
+ .data : {
+ *(.data*)
+ }
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+ . = ALIGN(4);
+ __rel_dyn_start = .;
+ .rela.dyn : {
+ *(.rela.dyn)
+ }
+ __rel_dyn_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : {
+ *(.bss*)
+ }
+ __bss_end = .;
+
+ . = ALIGN(4);
+ __image_copy_end = .;
+ __init_end = .;
+}