aboutsummaryrefslogtreecommitdiffstats
path: root/roms/u-boot/arch/arm/cpu/armv7/Kconfig
diff options
context:
space:
mode:
Diffstat (limited to 'roms/u-boot/arch/arm/cpu/armv7/Kconfig')
-rw-r--r--roms/u-boot/arch/arm/cpu/armv7/Kconfig79
1 files changed, 79 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/cpu/armv7/Kconfig b/roms/u-boot/arch/arm/cpu/armv7/Kconfig
new file mode 100644
index 000000000..60bb0a9e1
--- /dev/null
+++ b/roms/u-boot/arch/arm/cpu/armv7/Kconfig
@@ -0,0 +1,79 @@
+if CPU_V7A
+
+config CPU_V7_HAS_NONSEC
+ bool
+
+config CPU_V7_HAS_VIRT
+ bool
+
+config ARCH_SUPPORT_PSCI
+ bool
+
+config ARMV7_NONSEC
+ bool "Enable support for booting in non-secure mode" if EXPERT
+ depends on CPU_V7_HAS_NONSEC
+ default y
+ ---help---
+ Say Y here to enable support for booting in non-secure / SVC mode.
+
+config ARMV7_BOOT_SEC_DEFAULT
+ bool "Boot in secure mode by default" if EXPERT
+ depends on ARMV7_NONSEC
+ default y if ARCH_TEGRA
+ ---help---
+ Say Y here to boot in secure mode by default even if non-secure mode
+ is supported. This option is useful to boot kernels which do not
+ suppport booting in non-secure mode. Only set this if you need it.
+ This can be overridden at run-time by setting the bootm_boot_mode env.
+ variable to "sec" or "nonsec".
+
+config ARMV7_VIRT
+ bool "Enable support for hardware virtualization" if EXPERT
+ depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
+ default y
+ ---help---
+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+
+config ARMV7_PSCI
+ bool "Enable PSCI support" if EXPERT
+ depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
+ default y
+ help
+ Say Y here to enable PSCI support.
+
+choice
+ prompt "Supported PSCI version"
+ depends on ARMV7_PSCI
+ default ARMV7_PSCI_0_1 if ARCH_SUNXI
+ default ARMV7_PSCI_1_0
+ help
+ Select the supported PSCI version.
+
+config ARMV7_PSCI_1_0
+ bool "PSCI V1.0"
+
+config ARMV7_PSCI_0_2
+ bool "PSCI V0.2"
+
+config ARMV7_PSCI_0_1
+ bool "PSCI V0.1"
+endchoice
+
+config ARMV7_PSCI_NR_CPUS
+ int "Maximum supported CPUs for PSCI"
+ depends on ARMV7_NONSEC
+ default 4
+ help
+ The maximum number of CPUs supported in the PSCI firmware.
+ It is no problem to set a larger value than the number of
+ CPUs in the actual hardware implementation.
+
+config ARMV7_LPAE
+ bool "Use LPAE page table format" if EXPERT
+ depends on CPU_V7A
+ default y if ARMV7_VIRT
+ ---help---
+ Say Y here to use the long descriptor page table format. This is
+ required if U-Boot runs in HYP mode.
+
+endif