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Diffstat (limited to 'roms/u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi')
-rw-r--r--roms/u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi47
1 files changed, 47 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi b/roms/u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi
new file mode 100644
index 000000000..298c337ed
--- /dev/null
+++ b/roms/u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2014-2015, 2020 Intel. All rights reserved.
+ */
+
+#include "socfpga_arria10_socdk_sdmmc_handoff.h"
+#include "socfpga_arria10-handoff.dtsi"
+#include "socfpga_arria10_handoff_u-boot.dtsi"
+#include "socfpga_arria10_socdk-u-boot.dtsi"
+
+/ {
+ chosen {
+ firmware-loader = <&fs_loader0>;
+ };
+
+ fs_loader0: fs-loader {
+ u-boot,dm-pre-reloc;
+ compatible = "u-boot,fs-loader";
+ phandlepart = <&mmc 1>;
+ };
+};
+
+&fpga_mgr {
+ u-boot,dm-pre-reloc;
+ altr,bitstream = "fit_spl_fpga.itb";
+};
+
+&mmc {
+ u-boot,dm-pre-reloc;
+};
+
+/* Clock available early */
+&main_sdmmc_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&peri_sdmmc_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_free_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk {
+ u-boot,dm-pre-reloc;
+};