diff options
Diffstat (limited to 'roms/u-boot/arch/arm/include/asm/arch-tegra20/gpio.h')
| -rw-r--r-- | roms/u-boot/arch/arm/include/asm/arch-tegra20/gpio.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/include/asm/arch-tegra20/gpio.h b/roms/u-boot/arch/arm/include/asm/arch-tegra20/gpio.h new file mode 100644 index 000000000..6818c2872 --- /dev/null +++ b/roms/u-boot/arch/arm/include/asm/arch-tegra20/gpio.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2011, Google Inc. All rights reserved. + * Portions Copyright 2011-2012 NVIDIA Corporation + */ + +#ifndef _TEGRA20_GPIO_H_ +#define _TEGRA20_GPIO_H_ + +/* + * The Tegra 2x GPIO controller has 224 GPIOs arranged in 7 banks of 4 ports, + * each with 8 GPIOs. + */ +#define TEGRA_GPIO_PORTS 4 /* number of ports per bank */ +#define TEGRA_GPIO_BANKS 7 /* number of banks */ + +#include <asm/arch-tegra/gpio.h> + +/* GPIO Controller registers for a single bank */ +struct gpio_ctlr_bank { + uint gpio_config[TEGRA_GPIO_PORTS]; + uint gpio_dir_out[TEGRA_GPIO_PORTS]; + uint gpio_out[TEGRA_GPIO_PORTS]; + uint gpio_in[TEGRA_GPIO_PORTS]; + uint gpio_int_status[TEGRA_GPIO_PORTS]; + uint gpio_int_enable[TEGRA_GPIO_PORTS]; + uint gpio_int_level[TEGRA_GPIO_PORTS]; + uint gpio_int_clear[TEGRA_GPIO_PORTS]; +}; + +struct gpio_ctlr { + struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS]; +}; + +#endif /* TEGRA20_GPIO_H_ */ |