diff options
Diffstat (limited to 'roms/u-boot/arch/arm/mach-rockchip/Kconfig')
-rw-r--r-- | roms/u-boot/arch/arm/mach-rockchip/Kconfig | 390 |
1 files changed, 390 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-rockchip/Kconfig b/roms/u-boot/arch/arm/mach-rockchip/Kconfig new file mode 100644 index 000000000..407bf3fbe --- /dev/null +++ b/roms/u-boot/arch/arm/mach-rockchip/Kconfig @@ -0,0 +1,390 @@ +if ARCH_ROCKCHIP + +config ROCKCHIP_PX30 + bool "Support Rockchip PX30" + select ARM64 + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select TPL + select TPL_TINY_FRAMEWORK if TPL + select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select TPL_NEEDS_SEPARATE_STACK if TPL + imply SPL_SEPARATE_BSS + select SPL_SERIAL_SUPPORT + select TPL_SERIAL_SUPPORT + select DEBUG_UART_BOARD_INIT + imply ROCKCHIP_COMMON_BOARD + imply SPL_ROCKCHIP_COMMON_BOARD + help + The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + +config ROCKCHIP_RK3036 + bool "Support Rockchip RK3036" + select CPU_V7A + select SUPPORT_SPL + select SPL + imply USB_FUNCTION_ROCKUSB + imply CMD_ROCKUSB + imply ROCKCHIP_COMMON_BOARD + help + The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + +config ROCKCHIP_RK3128 + bool "Support Rockchip RK3128" + select CPU_V7A + imply ROCKCHIP_COMMON_BOARD + help + The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + +config ROCKCHIP_RK3188 + bool "Support Rockchip RK3188" + select CPU_V7A + select SPL_BOARD_INIT if SPL + select SUPPORT_SPL + select SPL + select SPL_CLK + select SPL_REGMAP + select SPL_SYSCON + select SPL_RAM + select SPL_DRIVERS_MISC_SUPPORT + select SPL_ROCKCHIP_EARLYRETURN_TO_BROM + select SPL_ROCKCHIP_BACK_TO_BROM + select BOARD_LATE_INIT + imply ROCKCHIP_COMMON_BOARD + imply SPL_ROCKCHIP_COMMON_BOARD + help + The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 + including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two + video interfaces, several memory options and video codec support. + Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, + UART, SPI, I2C and PWMs. + +config ROCKCHIP_RK322X + bool "Support Rockchip RK3228/RK3229" + select CPU_V7A + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select SPL_DM + select SPL_OF_LIBFDT + select TPL + select TPL_DM + select TPL_OF_LIBFDT + select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select TPL_NEEDS_SEPARATE_STACK if TPL + select SPL_DRIVERS_MISC_SUPPORT + imply ROCKCHIP_COMMON_BOARD + imply SPL_SERIAL_SUPPORT + imply SPL_ROCKCHIP_COMMON_BOARD + imply TPL_SERIAL_SUPPORT + imply TPL_ROCKCHIP_COMMON_BOARD + select TPL_LIBCOMMON_SUPPORT + select TPL_LIBGENERIC_SUPPORT + help + The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 + including NEON and GPU, Mali-400 graphics, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + +config ROCKCHIP_RK3288 + bool "Support Rockchip RK3288" + select CPU_V7A + select OF_BOARD_SETUP + select SUPPORT_SPL + select SPL + select SUPPORT_TPL + imply PRE_CONSOLE_BUFFER + imply ROCKCHIP_COMMON_BOARD + imply SPL_ROCKCHIP_COMMON_BOARD + imply TPL_CLK + imply TPL_DM + imply TPL_DRIVERS_MISC_SUPPORT + imply TPL_LIBCOMMON_SUPPORT + imply TPL_LIBGENERIC_SUPPORT + imply TPL_NEEDS_SEPARATE_TEXT_BASE + imply TPL_NEEDS_SEPARATE_STACK + imply TPL_OF_CONTROL + imply TPL_OF_PLATDATA + imply TPL_RAM + imply TPL_REGMAP + imply TPL_ROCKCHIP_COMMON_BOARD + imply TPL_SERIAL_SUPPORT + imply TPL_SYSCON + imply USB_FUNCTION_ROCKUSB + imply CMD_ROCKUSB + help + The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 + including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two + video interfaces supporting HDMI and eDP, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. + +config ROCKCHIP_RK3308 + bool "Support Rockchip RK3308" + select ARM64 + select DEBUG_UART_BOARD_INIT + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select SPL_ATF + select SPL_ATF_NO_PLATFORM_PARAM + select SPL_LOAD_FIT + imply ROCKCHIP_COMMON_BOARD + imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_CLK + imply SPL_REGMAP + imply SPL_SYSCON + imply SPL_RAM + imply SPL_SERIAL_SUPPORT + imply TPL_SERIAL_SUPPORT + imply SPL_SEPARATE_BSS + help + The Rockchip RK3308 is a ARM-based Soc which embedded with quad + Cortex-A35 and highly integrated audio interfaces. + +config ROCKCHIP_RK3328 + bool "Support Rockchip RK3328" + select ARM64 + select SUPPORT_SPL + select SPL + select SUPPORT_TPL + select TPL + select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL + select TPL_NEEDS_SEPARATE_STACK if TPL + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_SDRAM_COMMON + imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_SERIAL_SUPPORT + imply TPL_SERIAL_SUPPORT + imply SPL_SEPARATE_BSS + select ENABLE_ARM_SOC_BOOT0_HOOK + select DEBUG_UART_BOARD_INIT + select SYS_NS16550 + help + The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. + including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two + video interfaces supporting HDMI and eDP, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. + +config ROCKCHIP_RK3368 + bool "Support Rockchip RK3368" + select ARM64 + select SUPPORT_SPL + select SUPPORT_TPL + select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select TPL_NEEDS_SEPARATE_STACK if TPL + imply ROCKCHIP_COMMON_BOARD + imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_SEPARATE_BSS + imply SPL_SERIAL_SUPPORT + imply TPL_SERIAL_SUPPORT + imply TPL_ROCKCHIP_COMMON_BOARD + help + The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised + into a big and little cluster with 4 cores each) Cortex-A53 including + AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache + (for the little cluster), PowerVR G6110 based graphics, one video + output processor supporting LVDS/HDMI/eDP, several DDR3 options and + video codec support. + + On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, + I2S, UARTs, SPI, I2C and PWMs. + +config ROCKCHIP_RK3399 + bool "Support Rockchip RK3399" + select ARM64 + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select SPL_ATF + select SPL_BOARD_INIT if SPL + select SPL_LOAD_FIT + select SPL_CLK if SPL + select SPL_PINCTRL if SPL + select SPL_RAM if SPL + select SPL_REGMAP if SPL + select SPL_SYSCON if SPL + select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL + select TPL_NEEDS_SEPARATE_STACK if TPL + select SPL_SEPARATE_BSS + select SPL_SERIAL_SUPPORT + select SPL_DRIVERS_MISC_SUPPORT + select CLK + select FIT + select PINCTRL + select RAM + select REGMAP + select SYSCON + select DM_PMIC + select DM_REGULATOR_FIXED + select BOARD_LATE_INIT + imply PRE_CONSOLE_BUFFER + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_SDRAM_COMMON + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF + imply SPL_ROCKCHIP_COMMON_BOARD + imply TPL_SERIAL_SUPPORT + imply TPL_LIBCOMMON_SUPPORT + imply TPL_LIBGENERIC_SUPPORT + imply TPL_SYS_MALLOC_SIMPLE + imply TPL_DRIVERS_MISC_SUPPORT + imply TPL_OF_CONTROL + imply TPL_DM + imply TPL_REGMAP + imply TPL_SYSCON + imply TPL_RAM + imply TPL_CLK + imply TPL_TINY_MEMSET + imply TPL_ROCKCHIP_COMMON_BOARD + imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT + imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT + help + The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 + and quad-core Cortex-A53. + including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two + video interfaces supporting HDMI and eDP, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. + +config ROCKCHIP_RV1108 + bool "Support Rockchip RV1108" + select CPU_V7A + imply ROCKCHIP_COMMON_BOARD + help + The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 + and a DSP. + +config ROCKCHIP_USB_UART + bool "Route uart output to usb pins" + help + Rockchip SoCs have the ability to route the signals of the debug + uart through the d+ and d- pins of a specific usb phy to enable + some form of closed-case debugging. With this option supported + SoCs will enable this routing as a debug measure. + +config SPL_ROCKCHIP_BACK_TO_BROM + bool "SPL returns to bootrom" + default y if ROCKCHIP_RK3036 + select ROCKCHIP_BROM_HELPER + select SPL_BOOTROM_SUPPORT + depends on SPL + help + Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, + SPL will return to the boot rom, which will then load the U-Boot + binary to keep going on. + +config TPL_ROCKCHIP_BACK_TO_BROM + bool "TPL returns to bootrom" + default y + select ROCKCHIP_BROM_HELPER + select TPL_BOOTROM_SUPPORT + depends on TPL + help + Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, + SPL will return to the boot rom, which will then load the U-Boot + binary to keep going on. + +config ROCKCHIP_COMMON_BOARD + bool "Rockchip common board file" + help + Rockchip SoCs have similar boot process, Common board file is mainly + in charge of common process of board_init() and board_late_init() for + U-Boot proper. + +config SPL_ROCKCHIP_COMMON_BOARD + bool "Rockchip SPL common board file" + depends on SPL + help + Rockchip SoCs have similar boot process, SPL is mainly in charge of + load and boot Trust ATF/U-Boot firmware, and DRAM init if there is + no TPL for the board. + +config TPL_ROCKCHIP_COMMON_BOARD + bool "Rockchip TPL common board file" + depends on TPL + help + Rockchip SoCs have similar boot process, prefer to use TPL for DRAM + init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL + common board is a basic TPL board init which can be shared for most + of SoCs to avoid copy-paste for different SoCs. + +config ROCKCHIP_BOOT_MODE_REG + hex "Rockchip boot mode flag register address" + help + The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) + according to the value from this register. + +config ROCKCHIP_SPL_RESERVE_IRAM + hex "Size of IRAM reserved in SPL" + default 0 + help + SPL may need reserve memory for firmware loaded by SPL, whose load + address is in IRAM and may overlay with SPL text area if not + reserved. + +config ROCKCHIP_BROM_HELPER + bool + +config SPL_ROCKCHIP_EARLYRETURN_TO_BROM + bool "SPL requires early-return (for RK3188-style BROM) to BROM" + depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK + help + Some Rockchip BROM variants (e.g. on the RK3188) load the + first stage in segments and enter multiple times. E.g. on + the RK3188, the first 1KB of the first stage are loaded + first and entered; after returning to the BROM, the + remainder of the first stage is loaded, but the BROM + re-enters at the same address/to the same code as previously. + + This enables support code in the BOOT0 hook for the SPL stage + to allow multiple entries. + +config TPL_ROCKCHIP_EARLYRETURN_TO_BROM + bool "TPL requires early-return (for RK3188-style BROM) to BROM" + depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK + help + Some Rockchip BROM variants (e.g. on the RK3188) load the + first stage in segments and enter multiple times. E.g. on + the RK3188, the first 1KB of the first stage are loaded + first and entered; after returning to the BROM, the + remainder of the first stage is loaded, but the BROM + re-enters at the same address/to the same code as previously. + + This enables support code in the BOOT0 hook for the TPL stage + to allow multiple entries. + +config SPL_MMC_SUPPORT + default y if !SPL_ROCKCHIP_BACK_TO_BROM + +config ROCKCHIP_SPI_IMAGE + bool "Build a SPI image for rockchip" + depends on HAS_ROM + help + Some Rockchip SoCs support booting from SPI flash. Enable this + option to produce a 4MB SPI-flash image (called u-boot.rom) + containing U-Boot. The image is built by binman. U-Boot sits near + the start of the image. + +source "arch/arm/mach-rockchip/px30/Kconfig" +source "arch/arm/mach-rockchip/rk3036/Kconfig" +source "arch/arm/mach-rockchip/rk3128/Kconfig" +source "arch/arm/mach-rockchip/rk3188/Kconfig" +source "arch/arm/mach-rockchip/rk322x/Kconfig" +source "arch/arm/mach-rockchip/rk3288/Kconfig" +source "arch/arm/mach-rockchip/rk3308/Kconfig" +source "arch/arm/mach-rockchip/rk3328/Kconfig" +source "arch/arm/mach-rockchip/rk3368/Kconfig" +source "arch/arm/mach-rockchip/rk3399/Kconfig" +source "arch/arm/mach-rockchip/rv1108/Kconfig" +endif |