1 files changed, 51 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-socfpga/include/mach/misc.h b/roms/u-boot/arch/arm/mach-socfpga/include/mach/misc.h
new file mode 100644
index 000000000..649d2f6ce
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-socfpga/include/mach/misc.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2016-2017 Intel Corporation
+ */
+
+#ifndef _SOCFPGA_MISC_H_
+#define _SOCFPGA_MISC_H_
+
+#include <asm/sections.h>
+
+void dwmac_deassert_reset(const unsigned int of_reset_id, const u32 phymode);
+
+struct bsel {
+	const char	*mode;
+	const char	*name;
+};
+
+extern struct bsel bsel_str[];
+
+#ifdef CONFIG_FPGA
+void socfpga_fpga_add(void *fpga_desc);
+#else
+static inline void socfpga_fpga_add(void *fpga_desc) {}
+#endif
+
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
+void socfpga_sdram_remap_zero(void);
+static inline bool socfpga_is_booting_from_fpga(void)
+{
+	if ((__image_copy_start >= (char *)SOCFPGA_FPGA_SLAVES_ADDRESS) &&
+	    (__image_copy_start < (char *)SOCFPGA_STM_ADDRESS))
+		return true;
+	return false;
+}
+#endif
+
+#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+void socfpga_init_security_policies(void);
+void socfpga_sdram_remap_zero(void);
+#endif
+
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+	defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+int is_fpga_config_ready(void);
+#endif
+
+void do_bridge_reset(int enable, unsigned int mask);
+void socfpga_pl310_clear(void);
+void socfpga_get_managers_addr(void);
+
+#endif /* _SOCFPGA_MISC_H_ */