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-rw-r--r--roms/u-boot/arch/arm/mach-tegra/emc.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-tegra/emc.c b/roms/u-boot/arch/arm/mach-tegra/emc.c
new file mode 100644
index 000000000..2eea14b5a
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-tegra/emc.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ */
+
+#include <common.h>
+#include <asm/global_data.h>
+#include "emc.h"
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/emc.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch-tegra/ap.h>
+#include <asm/arch-tegra/clk_rst.h>
+#include <asm/arch-tegra/pmu.h>
+#include <asm/arch-tegra/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* These rates are hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000)
+#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000)
+
+int board_emc_init(void)
+{
+ unsigned rate;
+
+ switch (tegra_get_chip_sku()) {
+ default:
+ case TEGRA_SOC_T20:
+ rate = EMC_SDRAM_RATE_T20;
+ break;
+ case TEGRA_SOC_T25:
+ rate = EMC_SDRAM_RATE_T25;
+ break;
+ }
+ return tegra_set_emc(gd->fdt_blob, rate);
+}