diff options
Diffstat (limited to 'roms/u-boot/arch/arm/mach-tegra/tegra186')
| -rw-r--r-- | roms/u-boot/arch/arm/mach-tegra/tegra186/Kconfig | 26 | ||||
| -rw-r--r-- | roms/u-boot/arch/arm/mach-tegra/tegra186/Makefile | 5 | ||||
| -rw-r--r-- | roms/u-boot/arch/arm/mach-tegra/tegra186/cache.S | 42 |
3 files changed, 73 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-tegra/tegra186/Kconfig b/roms/u-boot/arch/arm/mach-tegra/tegra186/Kconfig new file mode 100644 index 000000000..b2e53b58c --- /dev/null +++ b/roms/u-boot/arch/arm/mach-tegra/tegra186/Kconfig @@ -0,0 +1,26 @@ +# Copyright (c) 2016, NVIDIA CORPORATION. +# +# SPDX-License-Identifier: GPL-2.0 + +if TEGRA186 + +choice + prompt "Tegra186 board select" + +config TARGET_P2771_0000 + bool "NVIDIA Tegra186 P2771-0000 board" + select BOARD_LATE_INIT + help + P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The + combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB + micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO + expansion headers. + +endchoice + +config SYS_SOC + default "tegra186" + +source "board/nvidia/p2771-0000/Kconfig" + +endif diff --git a/roms/u-boot/arch/arm/mach-tegra/tegra186/Makefile b/roms/u-boot/arch/arm/mach-tegra/tegra186/Makefile new file mode 100644 index 000000000..3a2405027 --- /dev/null +++ b/roms/u-boot/arch/arm/mach-tegra/tegra186/Makefile @@ -0,0 +1,5 @@ +# Copyright (c) 2016, NVIDIA CORPORATION. +# +# SPDX-License-Identifier: GPL-2.0 + +obj-y += cache.o diff --git a/roms/u-boot/arch/arm/mach-tegra/tegra186/cache.S b/roms/u-boot/arch/arm/mach-tegra/tegra186/cache.S new file mode 100644 index 000000000..a449d242e --- /dev/null +++ b/roms/u-boot/arch/arm/mach-tegra/tegra186/cache.S @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + */ + +#include <config.h> +#include <linux/linkage.h> + +#define SMC_SIP_INVOKE_MCE 0x82FFFF00 +#define MCE_SMC_ROC_FLUSH_CACHE (SMC_SIP_INVOKE_MCE | 11) +#define MCE_SMC_ROC_FLUSH_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 14) +#define MCE_SMC_ROC_CLEAN_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 15) + +ENTRY(__asm_tegra_cache_smc) + mov x1, #0 + mov x2, #0 + mov x3, #0 + mov x4, #0 + mov x5, #0 + mov x6, #0 + smc #0 + mov x0, #0 + ret +ENDPROC(__asm_invalidate_l3_dcache) + +ENTRY(__asm_invalidate_l3_dcache) + mov x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY & 0xffff) + movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_invalidate_l3_dcache) + +ENTRY(__asm_flush_l3_dcache) + mov x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY & 0xffff) + movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_flush_l3_dcache) + +ENTRY(__asm_invalidate_l3_icache) + mov x0, #(MCE_SMC_ROC_FLUSH_CACHE & 0xffff) + movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_invalidate_l3_icache) |