4 files changed, 95 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-u8500/Kconfig b/roms/u-boot/arch/arm/mach-u8500/Kconfig
new file mode 100644
index 000000000..7478deb25
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-u8500/Kconfig
@@ -0,0 +1,27 @@
+if ARCH_U8500
+
+config SYS_SOC
+	default "u8500"
+
+choice
+	prompt "U8500 board selection"
+
+config TARGET_STEMMY
+	bool "Samsung (stemmy) board"
+	help
+	  The Samsung "stemmy" board supports Samsung smartphones released with
+	  the ST-Ericsson NovaThor U8500 SoC, e.g.
+
+	      - Samsung Galaxy S III mini (GT-I8190)	"golden"
+	      - Samsung Galaxy S Advance (GT-I9070)	"janice"
+	      - Samsung Galaxy Xcover 2 (GT-S7710)	"skomer"
+
+	  and likely others as well (untested).
+
+	  See board/ste/stemmy/README for details.
+
+endchoice
+
+source "board/ste/stemmy/Kconfig"
+
+endif
diff --git a/roms/u-boot/arch/arm/mach-u8500/Makefile b/roms/u-boot/arch/arm/mach-u8500/Makefile
new file mode 100644
index 000000000..0a53cbd9a
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-u8500/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+obj-y	+= cache.o
+obj-$(CONFIG_DISPLAY_CPUINFO)	+= cpuinfo.o
diff --git a/roms/u-boot/arch/arm/mach-u8500/cache.c b/roms/u-boot/arch/arm/mach-u8500/cache.c
new file mode 100644
index 000000000..f9fd4fe7d
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-u8500/cache.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <asm/armv7.h>
+#include <asm/cache.h>
+#include <asm/pl310.h>
+
+#define PL310_WAY_MASK	0xff
+
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#ifdef CONFIG_SYS_L2_PL310
+void v7_outer_cache_disable(void)
+{
+	struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+	/*
+	 * Linux expects the L2 cache to be turned off by the bootloader.
+	 * Otherwise, it fails very early (shortly after decompressing the kernel).
+	 *
+	 * On U8500, the L2 cache can be only turned on/off from the secure world.
+	 * Instead, prevent usage of the L2 cache by locking all ways.
+	 * The kernel needs to unlock them to make the L2 cache work again.
+	 */
+	writel(PL310_WAY_MASK, &pl310->pl310_lockdown_dbase);
+	writel(PL310_WAY_MASK, &pl310->pl310_lockdown_ibase);
+}
+#endif
diff --git a/roms/u-boot/arch/arm/mach-u8500/cpuinfo.c b/roms/u-boot/arch/arm/mach-u8500/cpuinfo.c
new file mode 100644
index 000000000..ab05b8a51
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-u8500/cpuinfo.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <asm/io.h>
+
+#define U8500_BOOTROM_BASE	0x90000000
+#define U8500_ASIC_ID_LOC_V2	(U8500_BOOTROM_BASE + 0x1DBF4)
+
+int print_cpuinfo(void)
+{
+	/* Convert ASIC ID to display string, e.g. 0x8520A0 => DB8520 V1.0 */
+	u32 asicid = readl(U8500_ASIC_ID_LOC_V2);
+	u32 cpu = (asicid >> 8) & 0xffff;
+	u32 rev = asicid & 0xff;
+
+	/* 0xA0 => 0x10 (V1.0) */
+	if (rev >= 0xa0)
+		rev -= 0x90;
+
+	printf("CPU: ST-Ericsson DB%x V%d.%d\n", cpu, rev >> 4, rev & 0xf);
+	return 0;
+}