diff options
Diffstat (limited to 'roms/u-boot/arch/riscv/include/asm/arch-fu540')
5 files changed, 93 insertions, 0 deletions
diff --git a/roms/u-boot/arch/riscv/include/asm/arch-fu540/cache.h b/roms/u-boot/arch/riscv/include/asm/arch-fu540/cache.h new file mode 100644 index 000000000..135a17c67 --- /dev/null +++ b/roms/u-boot/arch/riscv/include/asm/arch-fu540/cache.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 SiFive, Inc. + * + * Authors: + * Pragnesh Patel <pragnesh.patel@sifve.com> + */ + +#ifndef _CACHE_SIFIVE_H +#define _CACHE_SIFIVE_H + +int cache_enable_ways(void); + +#endif /* _CACHE_SIFIVE_H */ diff --git a/roms/u-boot/arch/riscv/include/asm/arch-fu540/clk.h b/roms/u-boot/arch/riscv/include/asm/arch-fu540/clk.h new file mode 100644 index 000000000..d71ed4357 --- /dev/null +++ b/roms/u-boot/arch/riscv/include/asm/arch-fu540/clk.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2020 SiFive Inc + * + * Authors: + * Pragnesh Patel <pragnesh.patel@sifive.com> + */ + +#ifndef __CLK_SIFIVE_H +#define __CLK_SIFIVE_H + +/* Note: This is a placeholder header for driver compilation. */ + +#endif diff --git a/roms/u-boot/arch/riscv/include/asm/arch-fu540/gpio.h b/roms/u-boot/arch/riscv/include/asm/arch-fu540/gpio.h new file mode 100644 index 000000000..b87282b97 --- /dev/null +++ b/roms/u-boot/arch/riscv/include/asm/arch-fu540/gpio.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 SiFive, Inc. + */ + +#ifndef _GPIO_SIFIVE_H +#define _GPIO_SIFIVE_H + +#define GPIO_INPUT_VAL 0x00 +#define GPIO_INPUT_EN 0x04 +#define GPIO_OUTPUT_EN 0x08 +#define GPIO_OUTPUT_VAL 0x0C +#define GPIO_RISE_IE 0x18 +#define GPIO_RISE_IP 0x1C +#define GPIO_FALL_IE 0x20 +#define GPIO_FALL_IP 0x24 +#define GPIO_HIGH_IE 0x28 +#define GPIO_HIGH_IP 0x2C +#define GPIO_LOW_IE 0x30 +#define GPIO_LOW_IP 0x34 +#define GPIO_OUTPUT_XOR 0x40 + +#define NR_GPIOS 16 + +enum gpio_state { + LOW, + HIGH +}; + +/* Details about a GPIO bank */ +struct sifive_gpio_plat { + void *base; /* address of registers in physical memory */ +}; + +#define SIFIVE_GENERIC_GPIO_NR(port, index) \ + (((port) * NR_GPIOS) + ((index) & (NR_GPIOS - 1))) + +#endif /* _GPIO_SIFIVE_H */ diff --git a/roms/u-boot/arch/riscv/include/asm/arch-fu540/reset.h b/roms/u-boot/arch/riscv/include/asm/arch-fu540/reset.h new file mode 100644 index 000000000..e42797a39 --- /dev/null +++ b/roms/u-boot/arch/riscv/include/asm/arch-fu540/reset.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2020 SiFive, Inc. + * + * Author: Sagar Kadam <sagar.kadam@sifive.com> + */ + +#ifndef __RESET_SIFIVE_H +#define __RESET_SIFIVE_H + +int sifive_reset_bind(struct udevice *dev, ulong count); + +#endif diff --git a/roms/u-boot/arch/riscv/include/asm/arch-fu540/spl.h b/roms/u-boot/arch/riscv/include/asm/arch-fu540/spl.h new file mode 100644 index 000000000..4697279f4 --- /dev/null +++ b/roms/u-boot/arch/riscv/include/asm/arch-fu540/spl.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 SiFive, Inc. + * + * Authors: + * Pragnesh Patel <pragnesh.patel@sifve.com> + */ + +#ifndef _SPL_SIFIVE_H +#define _SPL_SIFIVE_H + +int spl_soc_init(void); + +#endif /* _SPL_SIFIVE_H */ |