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-rw-r--r--roms/u-boot/board/firefly/firefly-rk3288/Kconfig15
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3288/MAINTAINERS6
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3288/Makefile7
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3288/firefly-rk3288.c47
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3308/Kconfig15
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3308/MAINTAINERS5
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3308/Makefile7
-rw-r--r--roms/u-boot/board/firefly/firefly-rk3308/roc_cc_rk3308.c82
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig16
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS8
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/Makefile7
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c78
12 files changed, 293 insertions, 0 deletions
diff --git a/roms/u-boot/board/firefly/firefly-rk3288/Kconfig b/roms/u-boot/board/firefly/firefly-rk3288/Kconfig
new file mode 100644
index 000000000..1c2bca868
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3288/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_FIREFLY_RK3288
+
+config SYS_BOARD
+ default "firefly-rk3288"
+
+config SYS_VENDOR
+ default "firefly"
+
+config SYS_CONFIG_NAME
+ default "firefly-rk3288"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/roms/u-boot/board/firefly/firefly-rk3288/MAINTAINERS b/roms/u-boot/board/firefly/firefly-rk3288/MAINTAINERS
new file mode 100644
index 000000000..42db0bd5e
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3288/MAINTAINERS
@@ -0,0 +1,6 @@
+FIREFLY
+M: Simon Glass <sjg@chromium.org>
+S: Maintained
+F: board/firefly/firefly-rk3288
+F: include/configs/firefly-rk3288.h
+F: configs/firefly-rk3288_defconfig
diff --git a/roms/u-boot/board/firefly/firefly-rk3288/Makefile b/roms/u-boot/board/firefly/firefly-rk3288/Makefile
new file mode 100644
index 000000000..671684597
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3288/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += firefly-rk3288.o
diff --git a/roms/u-boot/board/firefly/firefly-rk3288/firefly-rk3288.c b/roms/u-boot/board/firefly/firefly-rk3288/firefly-rk3288.c
new file mode 100644
index 000000000..41c49e5da
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2015 Google, Inc
+ */
+
+#include <common.h>
+#include <hang.h>
+#include <led.h>
+#include <log.h>
+#include <asm/global_data.h>
+
+#ifdef CONFIG_SPL_BUILD
+DECLARE_GLOBAL_DATA_PTR;
+static int setup_led(void)
+{
+#ifdef CONFIG_SPL_LED
+ struct udevice *dev;
+ char *led_name;
+ int ret;
+
+ led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
+ if (!led_name)
+ return 0;
+ ret = led_get_by_label(led_name, &dev);
+ if (ret) {
+ debug("%s: get=%d\n", __func__, ret);
+ return ret;
+ }
+ ret = led_set_state(dev, LEDST_ON);
+ if (ret)
+ return ret;
+#endif
+
+ return 0;
+}
+
+void spl_board_init(void)
+{
+ int ret;
+
+ ret = setup_led();
+ if (ret) {
+ debug("LED ret=%d\n", ret);
+ hang();
+ }
+}
+#endif
diff --git a/roms/u-boot/board/firefly/firefly-rk3308/Kconfig b/roms/u-boot/board/firefly/firefly-rk3308/Kconfig
new file mode 100644
index 000000000..80b1ad85a
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROC_RK3308_CC
+
+config SYS_BOARD
+ default "firefly-rk3308"
+
+config SYS_VENDOR
+ default "firefly"
+
+config SYS_CONFIG_NAME
+ default "firefly_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/roms/u-boot/board/firefly/firefly-rk3308/MAINTAINERS b/roms/u-boot/board/firefly/firefly-rk3308/MAINTAINERS
new file mode 100644
index 000000000..199079717
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3308/MAINTAINERS
@@ -0,0 +1,5 @@
+ROC-RK3308-CC
+M: Andy Yan <andy.yan@rock-chips.com>
+S: Maintained
+F: board/firefly/firefly-rk3308/roc_cc_rk3308.c
+F: configs/roc-cc-rk3308_defconfig
diff --git a/roms/u-boot/board/firefly/firefly-rk3308/Makefile b/roms/u-boot/board/firefly/firefly-rk3308/Makefile
new file mode 100644
index 000000000..4c50b26ea
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += roc_cc_rk3308.o
diff --git a/roms/u-boot/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/roms/u-boot/board/firefly/firefly-rk3308/roc_cc_rk3308.c
new file mode 100644
index 000000000..28dcc2a69
--- /dev/null
+++ b/roms/u-boot/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
+
+#if defined(CONFIG_DEBUG_UART)
+#define GRF_BASE 0xff000000
+
+enum {
+ GPIO1C7_SHIFT = 8,
+ GPIO1C7_MASK = GENMASK(11, 8),
+ GPIO1C7_GPIO = 0,
+ GPIO1C7_UART1_RTSN,
+ GPIO1C7_UART2_TX_M0,
+ GPIO1C7_SPI2_MOSI,
+ GPIO1C7_JTAG_TMS,
+
+ GPIO1C6_SHIFT = 4,
+ GPIO1C6_MASK = GENMASK(7, 4),
+ GPIO1C6_GPIO = 0,
+ GPIO1C6_UART1_CTSN,
+ GPIO1C6_UART2_RX_M0,
+ GPIO1C6_SPI2_MISO,
+ GPIO1C6_JTAG_TCLK,
+
+ GPIO4D3_SHIFT = 6,
+ GPIO4D3_MASK = GENMASK(7, 6),
+ GPIO4D3_GPIO = 0,
+ GPIO4D3_SDMMC_D3,
+ GPIO4D3_UART2_TX_M1,
+
+ GPIO4D2_SHIFT = 4,
+ GPIO4D2_MASK = GENMASK(5, 4),
+ GPIO4D2_GPIO = 0,
+ GPIO4D2_SDMMC_D2,
+ GPIO4D2_UART2_RX_M1,
+
+ UART2_IO_SEL_SHIFT = 2,
+ UART2_IO_SEL_MASK = GENMASK(3, 2),
+ UART2_IO_SEL_M0 = 0,
+ UART2_IO_SEL_M1,
+ UART2_IO_SEL_USB,
+};
+
+void board_debug_uart_init(void)
+{
+ static struct rk3308_grf * const grf = (void *)GRF_BASE;
+
+ /* Enable early UART2 channel m0 on the rk3308 */
+ rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
+ UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+ rk_clrsetreg(&grf->gpio1ch_iomux,
+ GPIO1C6_MASK | GPIO1C7_MASK,
+ GPIO1C6_UART2_RX_M0 << GPIO1C6_SHIFT |
+ GPIO1C7_UART2_TX_M0 << GPIO1C7_SHIFT);
+}
+#endif
+
+#define KEY_DOWN_MIN_VAL 0
+#define KEY_DOWN_MAX_VAL 30
+
+int rockchip_dnl_key_pressed(void)
+{
+ unsigned int val;
+
+ if (adc_channel_single_shot("saradc", 1, &val)) {
+ printf("%s read adc key val failed\n", __func__);
+ return false;
+ }
+
+ if (val >= KEY_DOWN_MIN_VAL && val <= KEY_DOWN_MAX_VAL)
+ return true;
+ else
+ return false;
+}
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig b/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig
new file mode 100644
index 000000000..720fbbb5f
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ROC_PC_RK3399
+
+config SYS_BOARD
+ default "roc-pc-rk3399"
+
+config SYS_VENDOR
+ default "firefly"
+
+config SYS_CONFIG_NAME
+ default "roc-pc-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
+
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS b/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS
new file mode 100644
index 000000000..68a5b757d
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+ROC-RK3399-PC
+M: Levin Du <djw@t-chip.com.cn>
+M: Suniel Mahesh <sunil@amarulasolutions.com>
+S: Maintained
+F: board/firefly/roc-pc-rk3399
+F: include/configs/roc-pc-rk3399.h
+F: configs/roc-pc-rk3399_defconfig
+F: configs/roc-pc-mezzanine-rk3399_defconfig
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile b/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile
new file mode 100644
index 000000000..29c79b25d
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += roc-pc-rk3399.o
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
new file mode 100644
index 000000000..93e7d776f
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <log.h>
+#include <spl_gpio.h>
+#include <asm/io.h>
+#include <power/regulator.h>
+
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/gpio.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+ struct udevice *regulator;
+ int ret;
+
+ ret = regulator_get_by_platname("vcc5v0_host", &regulator);
+ if (ret) {
+ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+ goto out;
+ }
+
+ ret = regulator_set_enable(regulator, true);
+ if (ret)
+ debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+out:
+ return 0;
+}
+
+#else
+
+#define PMUGRF_BASE 0xff320000
+#define GPIO0_BASE 0xff720000
+
+/**
+ * LED setup for roc-rk3399-pc
+ *
+ * 1. Set the low power leds (only during POR, pwr_key env is 'y')
+ * glow yellow LED, termed as low power
+ * poll for on board power key press
+ * once powe key pressed, turn off yellow
+ * 2. Turn on red LED, indicating full power mode
+ */
+void led_setup(void)
+{
+ struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+ struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+ bool press_pwr_key = false;
+
+ if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
+ env_init();
+ env_load();
+ if (env_get_yesno("pwr_key") == 1)
+ press_pwr_key = true;
+ }
+
+ if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+ spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
+ GPIO_PULL_NORMAL);
+ while (readl(&gpio0->ext_port) & 0x20)
+ ;
+
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+ }
+
+ spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+}
+
+#endif