diff options
Diffstat (limited to 'roms/u-boot/configs/socfpga_sr1500_defconfig')
| -rw-r--r-- | roms/u-boot/configs/socfpga_sr1500_defconfig | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/roms/u-boot/configs/socfpga_sr1500_defconfig b/roms/u-boot/configs/socfpga_sr1500_defconfig new file mode 100644 index 000000000..968c255cc --- /dev/null +++ b/roms/u-boot/configs/socfpga_sr1500_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x40000000 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0xE0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" +CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 +CONFIG_TARGET_SOCFPGA_SR1500=y +CONFIG_ENV_OFFSET_REDUND=0xF0000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_VERSION_VARIABLE=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_SF_DEFAULT_SPEED=100000000 +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_MARVELL=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +# CONFIG_SPL_WDT is not set |