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-rw-r--r--roms/u-boot/doc/device-tree-bindings/rtc/abracon,abx80x.txt31
-rw-r--r--roms/u-boot/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt22
-rw-r--r--roms/u-boot/doc/device-tree-bindings/rtc/ds3232.txt15
3 files changed, 68 insertions, 0 deletions
diff --git a/roms/u-boot/doc/device-tree-bindings/rtc/abracon,abx80x.txt b/roms/u-boot/doc/device-tree-bindings/rtc/abracon,abx80x.txt
new file mode 100644
index 000000000..2405e35a1
--- /dev/null
+++ b/roms/u-boot/doc/device-tree-bindings/rtc/abracon,abx80x.txt
@@ -0,0 +1,31 @@
+Abracon ABX80X I2C ultra low power RTC/Alarm chip
+
+The Abracon ABX80X family consist of the ab0801, ab0803, ab0804, ab0805, ab1801,
+ab1803, ab1804 and ab1805. The ab0805 is the superset of ab080x and the ab1805
+is the superset of ab180x.
+
+Required properties:
+
+ - "compatible": should one of:
+ "abracon,abx80x"
+ "abracon,ab0801"
+ "abracon,ab0803"
+ "abracon,ab0804"
+ "abracon,ab0805"
+ "abracon,ab1801"
+ "abracon,ab1803"
+ "abracon,ab1804"
+ "abracon,ab1805"
+ "microcrystal,rv1805"
+ Using "abracon,abx80x" will enable chip autodetection.
+ - "reg": I2C bus address of the device
+
+Optional properties:
+
+The abx804 and abx805 have a trickle charger that is able to charge the
+connected battery or supercap. Both the following properties have to be defined
+and valid to enable charging:
+
+ - "abracon,tc-diode": should be "standard" (0.6V) or "schottky" (0.3V)
+ - "abracon,tc-resistor": should be <0>, <3>, <6> or <11>. 0 disables the output
+ resistor, the other values are in kOhm.
diff --git a/roms/u-boot/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt b/roms/u-boot/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt
new file mode 100644
index 000000000..1d990bcc0
--- /dev/null
+++ b/roms/u-boot/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt
@@ -0,0 +1,22 @@
+Broadcom STB wake-up Timer
+
+The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
+ability to wake up the system from low-power suspend/standby modes.
+
+Required properties:
+- compatible : should contain "brcm,brcmstb-waketimer"
+- reg : the register start and length for the WKTMR block
+- interrupts : The TIMER interrupt
+- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
+ interrupt controller node
+- clocks : The phandle to the UPG fixed clock (27Mhz domain)
+
+Example:
+
+waketimer@f0411580 {
+ compatible = "brcm,brcmstb-waketimer";
+ reg = <0xf0411580 0x14>;
+ interrupts = <0x3>;
+ interrupt-parent = <&aon_pm_l2_intc>;
+ clocks = <&upg_fixed>;
+};
diff --git a/roms/u-boot/doc/device-tree-bindings/rtc/ds3232.txt b/roms/u-boot/doc/device-tree-bindings/rtc/ds3232.txt
new file mode 100644
index 000000000..254b7bc3c
--- /dev/null
+++ b/roms/u-boot/doc/device-tree-bindings/rtc/ds3232.txt
@@ -0,0 +1,15 @@
+DS3232 Real-Time Clock with SRAM
+
+The RTC driver provides time and date functionality. Also read and write
+functions are provided that can be used to access the SRAM memory.
+
+Required properties:
+- compatible : should contain "dallas,ds3232"
+- reg : the I2C RTC address
+
+Example:
+
+rtc@68 {
+ compatible = "dallas,ds3232";
+ reg = <0x68>;
+};