diff options
Diffstat (limited to 'roms/u-boot/drivers/usb/dwc3/io.h')
| -rw-r--r-- | roms/u-boot/drivers/usb/dwc3/io.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/roms/u-boot/drivers/usb/dwc3/io.h b/roms/u-boot/drivers/usb/dwc3/io.h new file mode 100644 index 000000000..2407f826c --- /dev/null +++ b/roms/u-boot/drivers/usb/dwc3/io.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/** + * io.h - DesignWare USB3 DRD IO Header + * + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * + * Authors: Felipe Balbi <balbi@ti.com>, + * Sebastian Andrzej Siewior <bigeasy@linutronix.de> + * + * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/io.h) and ported + * to uboot. + * + * commit 2c4cbe6e5a : usb: dwc3: add tracepoints to aid debugging + * + */ + +#ifndef __DRIVERS_USB_DWC3_IO_H +#define __DRIVERS_USB_DWC3_IO_H + +#include <cpu_func.h> +#include <asm/io.h> + +#define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE +static inline u32 dwc3_readl(void __iomem *base, u32 offset) +{ + unsigned long offs = offset - DWC3_GLOBALS_REGS_START; + u32 value; + + /* + * We requested the mem region starting from the Globals address + * space, see dwc3_probe in core.c. + * However, the offsets are given starting from xHCI address space. + */ + value = readl(base + offs); + + return value; +} + +static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) +{ + unsigned long offs = offset - DWC3_GLOBALS_REGS_START; + + /* + * We requested the mem region starting from the Globals address + * space, see dwc3_probe in core.c. + * However, the offsets are given starting from xHCI address space. + */ + writel(value, base + offs); +} + +static inline void dwc3_flush_cache(uintptr_t addr, int length) +{ + flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE)); +} +#endif /* __DRIVERS_USB_DWC3_IO_H */ |