1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
|
/**
** Proll (PROM replacement)
** iommu.c: Functions for DVMA management.
** Copyright 1999 Pete Zaitcev
** This code is licensed under GNU General Public License.
**/
#include "config.h"
#include "libopenbios/bindings.h"
#include "libopenbios/ofmem.h"
#include "drivers/drivers.h"
#include "iommu.h"
#include "arch/sparc32/ofmem_sparc32.h"
#include "arch/sparc32/asi.h"
#include "arch/sparc32/pgtsrmmu.h"
#ifdef CONFIG_DEBUG_IOMMU
#define DPRINTF(fmt, args...) \
do { printk(fmt , ##args); } while (0)
#else
#define DPRINTF(fmt, args...)
#endif
/*
* IOMMU parameters
*/
struct iommu {
struct iommu_regs *regs;
unsigned int *page_table;
unsigned long plow; /* Base bus address */
unsigned long pphys; /* Base phys address */
};
static struct iommu ciommu;
static void
iommu_invalidate(struct iommu_regs *iregs)
{
iregs->tlbflush = 0;
}
/*
* XXX This is a problematic interface. We alloc _memory_ which is uncached.
* So if we ever reuse allocations somebody is going to get uncached pages.
* Returned address is always aligned by page.
* BTW, we were not going to give away anonymous storage, were we not?
*/
void *
dvma_alloc(int size)
{
void *va;
unsigned int pa, iova;
unsigned int npages;
unsigned int mva, mpa;
unsigned int i;
unsigned int *iopte;
struct iommu *t = &ciommu;
npages = (size + (PAGE_SIZE-1)) / PAGE_SIZE;
iova = (unsigned int)mem_alloc(&cdvmem, npages * PAGE_SIZE, PAGE_SIZE);
if (iova == 0)
return NULL;
pa = t->pphys + (iova - t->plow);
va = (void *)pa2va((unsigned long)pa);
/*
* Change page attributes in MMU to uncached.
*/
mva = (unsigned int) va;
mpa = (unsigned int) pa;
ofmem_arch_map_pages(mpa, mva, npages * PAGE_SIZE, ofmem_arch_io_translation_mode(mpa));
/*
* Map into IOMMU page table.
*/
mpa = (unsigned int) pa;
iopte = &t->page_table[(iova - t->plow) / PAGE_SIZE];
for (i = 0; i < npages; i++) {
*iopte++ = MKIOPTE(mpa);
mpa += PAGE_SIZE;
}
return va;
}
void
dvma_sync(unsigned char *va, int size)
{
/* Synchronise the VA address region after DMA */
unsigned long virt = pointer2cell(va);
unsigned long page;
for (page = (unsigned long)virt; page < virt + size; page += PAGE_SIZE) {
srmmu_flush_tlb_page(page);
}
}
unsigned int
dvma_map_in(unsigned char *va)
{
/* Convert from VA to IOVA */
unsigned int pa, iova;
struct iommu *t = &ciommu;
pa = va2pa((unsigned int)va);
iova = t->plow + (pa - t->pphys);
return iova;
}
#define DVMA_SIZE 0x4000
/*
* Initialize IOMMU
* This looks like initialization of CPU MMU but
* the routine is higher in food chain.
*/
static struct iommu_regs *
iommu_init(struct iommu *t, uint64_t base)
{
unsigned int *ptab, pva;
int ptsize;
#ifdef CONFIG_DEBUG_IOMMU
unsigned int impl, vers;
#endif
unsigned int tmp;
struct iommu_regs *regs;
int ret;
unsigned long vasize;
regs = (struct iommu_regs *)ofmem_map_io(base, IOMMU_REGS);
if (regs == NULL) {
DPRINTF("Cannot map IOMMU\n");
for (;;) { }
}
t->regs = regs;
#ifdef CONFIG_DEBUG_IOMMU
impl = (regs->control & IOMMU_CTRL_IMPL) >> 28;
vers = (regs->control & IOMMU_CTRL_VERS) >> 24;
#endif
tmp = regs->control;
tmp &= ~(IOMMU_CTRL_RNGE);
tmp |= (IOMMU_RNGE_32MB | IOMMU_CTRL_ENAB);
t->plow = 0xfe000000; /* End - 32 MB */
/* Size of VA region that we manage */
vasize = 0x2000000; /* 32 MB */
regs->control = tmp;
iommu_invalidate(regs);
/* Allocate IOMMU page table */
/* Tremendous alignment causes great waste... */
ptsize = (vasize / PAGE_SIZE) * sizeof(int);
ret = ofmem_posix_memalign((void *)&ptab, ptsize, ptsize);
if (ret != 0) {
DPRINTF("Cannot allocate IOMMU table [0x%x]\n", ptsize);
for (;;) { }
}
t->page_table = ptab;
/* flush_cache_all(); */
/** flush_tlb_all(); **/
tmp = (unsigned int)va2pa((unsigned long)ptab);
regs->base = tmp >> 4;
iommu_invalidate(regs);
DPRINTF("IOMMU: impl %d vers %d page table at 0x%p (pa 0x%x) of size %d bytes\n",
impl, vers, t->page_table, tmp, ptsize);
mem_init(&cdvmem, (char*)t->plow, (char *)(t->plow + DVMA_SIZE));
ret = ofmem_posix_memalign((void *)&pva, DVMA_SIZE, PAGE_SIZE);
if (ret != 0) {
DPRINTF("Cannot allocate IOMMU phys size [0x%x]\n", DVMA_SIZE);
for (;;) { }
}
t->pphys = va2pa(pva);
return regs;
}
/* ( addr.lo addr.hi size -- virt ) */
static void
ob_iommu_map_in(void)
{
phys_addr_t phys;
ucell size, virt;
size = POP();
phys = POP();
phys = (phys << 32) + POP();
virt = ofmem_map_io(phys, size);
PUSH(virt);
}
/* ( virt size ) */
static void
ob_iommu_map_out(void)
{
ucell size = POP();
ucell virt = POP();
ofmem_release_io(virt, size);
}
static void
ob_iommu_dma_alloc(void)
{
call_parent_method("dma-alloc");
}
static void
ob_iommu_dma_free(void)
{
call_parent_method("dma-free");
}
static void
ob_iommu_dma_map_in(void)
{
call_parent_method("dma-map-in");
}
static void
ob_iommu_dma_map_out(void)
{
call_parent_method("dma-map-out");
}
static void
ob_iommu_dma_sync(void)
{
call_parent_method("dma-sync");
}
void
ob_init_iommu(uint64_t base)
{
struct iommu_regs *regs;
regs = iommu_init(&ciommu, base);
push_str("/iommu");
fword("find-device");
PUSH((unsigned long)regs);
fword("encode-int");
push_str("address");
fword("property");
PUSH(base >> 32);
fword("encode-int");
PUSH(base & 0xffffffff);
fword("encode-int");
fword("encode+");
PUSH(IOMMU_REGS);
fword("encode-int");
fword("encode+");
push_str("reg");
fword("property");
bind_func("map-in", ob_iommu_map_in);
bind_func("map-out", ob_iommu_map_out);
bind_func("dma-alloc", ob_iommu_dma_alloc);
bind_func("dma-free", ob_iommu_dma_free);
bind_func("dma-map-in", ob_iommu_dma_map_in);
bind_func("dma-map-out", ob_iommu_dma_map_out);
bind_func("dma-sync", ob_iommu_dma_sync);
}
|