diff options
Diffstat (limited to 'bsp/meta-rcar/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0028-net-sh_eth-Fix-compilation-warnings.patch')
| -rw-r--r-- | bsp/meta-rcar/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0028-net-sh_eth-Fix-compilation-warnings.patch | 135 |
1 files changed, 135 insertions, 0 deletions
diff --git a/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0028-net-sh_eth-Fix-compilation-warnings.patch b/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0028-net-sh_eth-Fix-compilation-warnings.patch new file mode 100644 index 00000000..2e878538 --- /dev/null +++ b/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-bsp/u-boot/u-boot/0028-net-sh_eth-Fix-compilation-warnings.patch @@ -0,0 +1,135 @@ +From 4d00819431c519c143242b230f6afaf59dc57051 Mon Sep 17 00:00:00 2001 +From: Valentine Barshak <valentine.barshak@cogentembedded.com> +Date: Mon, 2 Dec 2019 01:08:01 +0300 +Subject: [PATCH 2/4] net: sh_eth: Fix compilation warnings + +This fixes multiple type cast warnings: + "warning: cast to pointer from integer of different size" + +In most cases we use uintptr_t type instead of int or u32. +Also, use iobase address obtained from the device tree +instead of hard-coded macro for the phy address. + +Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> +--- + drivers/net/sh_eth.c | 24 ++++++++++++------------ + drivers/net/sh_eth.h | 8 ++++---- + 2 files changed, 16 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c +index b120977..fbae6ce 100644 +--- a/drivers/net/sh_eth.c ++++ b/drivers/net/sh_eth.c +@@ -36,8 +36,8 @@ + + #if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && !defined(CONFIG_SYS_DCACHE_OFF) + #define flush_cache_wback(addr, len) \ +- flush_dcache_range((u32)addr, \ +- (u32)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE))) ++ flush_dcache_range((uintptr_t)(addr), \ ++ (uintptr_t)(addr) + ALIGN((len), CONFIG_SH_ETHER_ALIGNE_SIZE)) + #else + #define flush_cache_wback(...) + #endif +@@ -45,11 +45,11 @@ + #if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) + #define invalidate_cache(addr, len) \ + { \ +- u32 line_size = CONFIG_SH_ETHER_ALIGNE_SIZE; \ +- u32 start, end; \ ++ uintptr_t line_size = CONFIG_SH_ETHER_ALIGNE_SIZE; \ ++ uintptr_t start, end; \ + \ +- start = (u32)addr; \ +- end = start + len; \ ++ start = (uintptr_t)(addr); \ ++ end = start + (len); \ + start &= ~(line_size - 1); \ + end = ((end + line_size - 1) & ~(line_size - 1)); \ + \ +@@ -73,7 +73,7 @@ static int sh_eth_send_common(struct sh_eth_dev *eth, void *packet, int len) + } + + /* packet must be a 4 byte boundary */ +- if ((int)packet & 3) { ++ if ((uintptr_t)packet & 3) { + printf(SHETHER_NAME ": %s: packet not 4 byte aligned\n" + , __func__); + ret = -EFAULT; +@@ -210,7 +210,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth) + + /* Make sure we use a P2 address (non-cacheable) */ + port_info->tx_desc_base = +- (struct tx_desc_s *)ADDR_TO_P2((u32)port_info->tx_desc_alloc); ++ (struct tx_desc_s *)ADDR_TO_P2((uintptr_t)port_info->tx_desc_alloc); + port_info->tx_desc_cur = port_info->tx_desc_base; + + /* Initialize all descriptors */ +@@ -264,7 +264,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth) + + /* Make sure we use a P2 address (non-cacheable) */ + port_info->rx_desc_base = +- (struct rx_desc_s *)ADDR_TO_P2((u32)port_info->rx_desc_alloc); ++ (struct rx_desc_s *)ADDR_TO_P2((uintptr_t)port_info->rx_desc_alloc); + + port_info->rx_desc_cur = port_info->rx_desc_base; + +@@ -280,7 +280,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth) + goto err_buf_alloc; + } + +- port_info->rx_buf_base = (u8 *)ADDR_TO_P2((u32)port_info->rx_buf_alloc); ++ port_info->rx_buf_base = (u8 *)ADDR_TO_P2((uintptr_t)port_info->rx_buf_alloc); + + /* Initialize all descriptors */ + for (cur_rx_desc = port_info->rx_desc_base, +@@ -699,7 +699,7 @@ static int sh_ether_recv(struct udevice *dev, int flags, uchar **packetp) + struct sh_ether_priv *priv = dev_get_priv(dev); + struct sh_eth_dev *eth = &priv->shdev; + struct sh_eth_info *port_info = ð->port_info[eth->port]; +- uchar *packet = (uchar *)ADDR_TO_P2(port_info->rx_desc_cur->rd2); ++ uchar *packet = (uchar *)ADDR_TO_P2((uintptr_t)port_info->rx_desc_cur->rd2); + int len; + + len = sh_eth_recv_start(eth); +@@ -845,7 +845,7 @@ static int sh_ether_probe(struct udevice *udev) + eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].iobase = +- (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port); ++ (void __iomem *)(priv->iobase + 0x800 * eth->port); + + ret = clk_enable(&priv->clk); + if (ret) +diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h +index 1fa38e7..61fe0c9 100644 +--- a/drivers/net/sh_eth.h ++++ b/drivers/net/sh_eth.h +@@ -15,20 +15,20 @@ + #if defined(CONFIG_SH) + /* Malloc returns addresses in the P1 area (cacheable). However we need to + use area P2 (non-cacheable) */ +-#define ADDR_TO_P2(addr) ((((int)(addr) & ~0xe0000000) | 0xa0000000)) ++#define ADDR_TO_P2(addr) ((((uintptr_t)(addr) & ~0xe0000000) | 0xa0000000)) + + /* The ethernet controller needs to use physical addresses */ + #if defined(CONFIG_SH_32BIT) +-#define ADDR_TO_PHY(addr) ((((int)(addr) & ~0xe0000000) | 0x40000000)) ++#define ADDR_TO_PHY(addr) ((((uintptr_t)(addr) & ~0xe0000000) | 0x40000000)) + #else +-#define ADDR_TO_PHY(addr) ((int)(addr) & ~0xe0000000) ++#define ADDR_TO_PHY(addr) ((uintptr_t)(addr) & ~0xe0000000) + #endif + #elif defined(CONFIG_ARM) + #ifndef inl + #define inl readl + #define outl writel + #endif +-#define ADDR_TO_PHY(addr) ((int)(addr)) ++#define ADDR_TO_PHY(addr) ((uintptr_t)(addr)) + #define ADDR_TO_P2(addr) (addr) + #endif /* defined(CONFIG_SH) */ + +-- +2.7.4 + |