diff options
Diffstat (limited to 'meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux')
10 files changed, 35 insertions, 331 deletions
diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/0004-Smack-Assign-smack_known_web-label-for-kernel-thread.patch b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/0004-Smack-Assign-smack_known_web-label-for-kernel-thread.patch deleted file mode 100644 index 1b17bc73f..000000000 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/0004-Smack-Assign-smack_known_web-label-for-kernel-thread.patch +++ /dev/null @@ -1,49 +0,0 @@ -From c8bbb0f916de54610513e376070aea531af19dd6 Mon Sep 17 00:00:00 2001 -From: jooseong lee <jooseong.lee@samsung.com> -Date: Thu, 3 Nov 2016 10:55:43 +0100 -Subject: [PATCH 4/4] Smack: Assign smack_known_web label for kernel thread's -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Assign smack_known_web label for kernel thread's socket in the sk_alloc_security hook - -Creating struct sock by sk_alloc function in various kernel subsystems -like bluetooth dosen't call smack_socket_post_create(). In such case, -received sock label is the floor('_') label and makes access deny. - -Refers-to: https://review.tizen.org/gerrit/#/c/80717/4 - -Change-Id: I2e5c9359bfede84a988fd4d4d74cdb9dfdfc52d8 -Signed-off-by: jooseong lee <jooseong.lee@samsung.com> -Signed-off-by: José Bollo <jose.bollo@iot.bzh> ---- - security/smack/smack_lsm.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c -index e45f0a3..a3f3ccc 100644 ---- a/security/smack/smack_lsm.c -+++ b/security/smack/smack_lsm.c -@@ -2107,8 +2107,16 @@ static int smack_sk_alloc_security(struct sock *sk, int family, gfp_t gfp_flags) - if (ssp == NULL) - return -ENOMEM; - -- ssp->smk_in = skp; -- ssp->smk_out = skp; -+ /* -+ * Sockets created by kernel threads receive web label. -+ */ -+ if (unlikely(current->flags & PF_KTHREAD)) { -+ ssp->smk_in = &smack_known_web; -+ ssp->smk_out = &smack_known_web; -+ } else { -+ ssp->smk_in = skp; -+ ssp->smk_out = skp; -+ } - ssp->smk_packet = NULL; - - sk->sk_security = ssp; --- -2.7.4 - diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/fixups.cfg b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/fixups.cfg index d6b3a30fd..29a25b798 100644 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/fixups.cfg +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/files/fixups.cfg @@ -6,3 +6,4 @@ # CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_BTRFS_FS is not set diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0001-enable-mhdp-with-etnaviv.patch b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0001-enable-mhdp-with-etnaviv.patch deleted file mode 100644 index 23ca0475a..000000000 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0001-enable-mhdp-with-etnaviv.patch +++ /dev/null @@ -1,23 +0,0 @@ -Tweak MHDP driver Kconfig so it can be enabled with etnaviv - -The MHDP driver is needed for using HDMI on the i.MX8MQ EVK, tweak its -Kconfig entry so that it can be enabled when using etnaviv, not just -Vivante. - -Upstream-Status: pending -Signed-off-by: Scott Murray <scott.murray@konsulko.com> ---- - -diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig -index 63d5f1b532ee..a18ba56aa218 100644 ---- a/drivers/gpu/drm/imx/Kconfig -+++ b/drivers/gpu/drm/imx/Kconfig -@@ -85,7 +85,7 @@ config DRM_IMX_CDNS_MHDP - select DRM_CDNS_DP - select DRM_CDNS_HDMI - select DRM_CDNS_AUDIO -- depends on DRM_IMX -+ depends on DRM_IMX || DRM_ETNAVIV - help - Choose this if you want to use HDMI on i.MX8. - diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0002-dts-enable-etnaviv.patch b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0002-dts-enable-etnaviv.patch index 4ce9b9d38..4ed4b685e 100644 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0002-dts-enable-etnaviv.patch +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0002-dts-enable-etnaviv.patch @@ -4,15 +4,14 @@ Some further investigation is required into how to manage this upstream in meta-freescale, as it is not required for the i.MX6 platforms AFAIK. Upstream-Status: pending - Signed-off-by: Scott Murray <scott.murray@konsulko.com> --- diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts -index f2a7e4069a0d..c0b6c5052656 100755 +index c3f8a24c3943..754fbfe30f0a 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts -@@ -1074,7 +1074,7 @@ +@@ -1224,7 +1224,7 @@ &vpu_v4l2 { status = "okay"; }; diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0003-drm-etnaviv-fix-TS-cache-flushing-on-GPUs-with-BLT-e.patch b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0003-drm-etnaviv-fix-TS-cache-flushing-on-GPUs-with-BLT-e.patch deleted file mode 100644 index d7a1f85b8..000000000 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0003-drm-etnaviv-fix-TS-cache-flushing-on-GPUs-with-BLT-e.patch +++ /dev/null @@ -1,151 +0,0 @@ -From f232d9ec029ce3e2543b05213e2979e01e503408 Mon Sep 17 00:00:00 2001 -From: Lucas Stach <l.stach@pengutronix.de> -Date: Wed, 26 Feb 2020 16:27:08 +0100 -Subject: [PATCH] drm/etnaviv: fix TS cache flushing on GPUs with BLT engine - -As seen in the Vivante kernel driver, most GPUs with the BLT engine have -a broken TS cache flush. The workaround is to temporarily set the BLT -command to CLEAR_IMAGE, without actually executing the clear. Apparently -this state change is enough to trigger the required TS cache flush. As -the BLT engine is completely asychronous, we also need a few more stall -states to synchronize the flush with the frontend. - -Root-caused-by: Jonathan Marek <jonathan@marek.ca> -Signed-off-by: Lucas Stach <l.stach@pengutronix.de> ---- - drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 60 ++++++++++++++++++++++-- - drivers/gpu/drm/etnaviv/state_blt.xml.h | 2 + - 2 files changed, 57 insertions(+), 5 deletions(-) - -diff --git a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c -index 32d9fac587f9..76d38561c910 100644 ---- a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c -+++ b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c -@@ -12,6 +12,7 @@ - - #include "common.xml.h" - #include "state.xml.h" -+#include "state_blt.xml.h" - #include "state_hi.xml.h" - #include "state_3d.xml.h" - #include "cmdstream.xml.h" -@@ -233,6 +234,8 @@ void etnaviv_buffer_end(struct etnaviv_gpu *gpu) - struct etnaviv_cmdbuf *buffer = &gpu->buffer; - unsigned int waitlink_offset = buffer->user_size - 16; - u32 link_target, flush = 0; -+ bool has_blt = !!(gpu->identity.minor_features5 & -+ chipMinorFeatures5_BLT_ENGINE); - - lockdep_assert_held(&gpu->lock); - -@@ -248,16 +251,38 @@ void etnaviv_buffer_end(struct etnaviv_gpu *gpu) - if (flush) { - unsigned int dwords = 7; - -+ if (has_blt) -+ dwords += 10; -+ - link_target = etnaviv_buffer_reserve(gpu, buffer, dwords); - - CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); - CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); -+ if (has_blt) { -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); -+ CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x0); -+ } - CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE, flush); -- if (gpu->exec_state == ETNA_PIPE_3D) -- CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE, -- VIVS_TS_FLUSH_CACHE_FLUSH); -+ if (gpu->exec_state == ETNA_PIPE_3D) { -+ if (has_blt) { -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_SET_COMMAND, 0x1); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x0); -+ } else { -+ CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE, -+ VIVS_TS_FLUSH_CACHE_FLUSH); -+ } -+ } - CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); - CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); -+ if (has_blt) { -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); -+ CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x0); -+ } - CMD_END(buffer); - - etnaviv_buffer_replace_wait(buffer, waitlink_offset, -@@ -323,6 +348,8 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, - bool switch_mmu_context = gpu->mmu_context != mmu_context; - unsigned int new_flush_seq = READ_ONCE(gpu->mmu_context->flush_seq); - bool need_flush = switch_mmu_context || gpu->flush_seq != new_flush_seq; -+ bool has_blt = !!(gpu->identity.minor_features5 & -+ chipMinorFeatures5_BLT_ENGINE); - - lockdep_assert_held(&gpu->lock); - -@@ -433,6 +460,15 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, - * 2 semaphore stall + 1 event + 1 wait + 1 link. - */ - return_dwords = 7; -+ -+ /* -+ * When the BLT engine is present we need 6 more dwords in the return -+ * target: 3 enable/flush/disable + 4 enable/semaphore stall/disable, -+ * but we don't need the normal TS flush state. -+ */ -+ if (has_blt) -+ return_dwords += 6; -+ - return_target = etnaviv_buffer_reserve(gpu, buffer, return_dwords); - CMD_LINK(cmdbuf, return_dwords, return_target); - -@@ -447,11 +483,25 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, - CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE, - VIVS_GL_FLUSH_CACHE_DEPTH | - VIVS_GL_FLUSH_CACHE_COLOR); -- CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE, -- VIVS_TS_FLUSH_CACHE_FLUSH); -+ if (has_blt) { -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_SET_COMMAND, 0x1); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x0); -+ } else { -+ CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE, -+ VIVS_TS_FLUSH_CACHE_FLUSH); -+ } - } - CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); - CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); -+ -+ if (has_blt) { -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); -+ CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_BLT); -+ CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x0); -+ } -+ - CMD_LOAD_STATE(buffer, VIVS_GL_EVENT, VIVS_GL_EVENT_EVENT_ID(event) | - VIVS_GL_EVENT_FROM_PE); - CMD_WAIT(buffer); -diff --git a/drivers/gpu/drm/etnaviv/state_blt.xml.h b/drivers/gpu/drm/etnaviv/state_blt.xml.h -index daae55995def..0e8bcf9dcc93 100644 ---- a/drivers/gpu/drm/etnaviv/state_blt.xml.h -+++ b/drivers/gpu/drm/etnaviv/state_blt.xml.h -@@ -46,6 +46,8 @@ DEALINGS IN THE SOFTWARE. - - /* This is a cut-down version of the state_blt.xml.h file */ - -+#define VIVS_BLT_SET_COMMAND 0x000140ac -+ - #define VIVS_BLT_ENABLE 0x000140b8 - #define VIVS_BLT_ENABLE_ENABLE 0x00000001 - --- -2.20.1 - diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0004-drm-sched-Fix-passing-zero-to-PTR_ERR-warning-v2.patch b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0004-drm-sched-Fix-passing-zero-to-PTR_ERR-warning-v2.patch deleted file mode 100644 index 8c141a0f5..000000000 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx/0004-drm-sched-Fix-passing-zero-to-PTR_ERR-warning-v2.patch +++ /dev/null @@ -1,50 +0,0 @@ -From d7c5782acd354bdb5ed0fa10e1e397eaed558390 Mon Sep 17 00:00:00 2001 -From: Andrey Grodzovsky <andrey.grodzovsky@amd.com> -Date: Tue, 29 Oct 2019 11:03:05 -0400 -Subject: [PATCH] drm/sched: Fix passing zero to 'PTR_ERR' warning v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Fix a static code checker warning. - -v2: Drop PTR_ERR_OR_ZERO. - -Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> -Reviewed-by: Emily Deng <Emily.Deng@amd.com> -Reviewed-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/scheduler/sched_main.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c -index 2af64459b3d7..fbb6446c4f69 100644 ---- a/drivers/gpu/drm/scheduler/sched_main.c -+++ b/drivers/gpu/drm/scheduler/sched_main.c -@@ -496,8 +496,10 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) - fence = sched->ops->run_job(s_job); - - if (IS_ERR_OR_NULL(fence)) { -+ if (IS_ERR(fence)) -+ dma_fence_set_error(&s_fence->finished, PTR_ERR(fence)); -+ - s_job->s_fence->parent = NULL; -- dma_fence_set_error(&s_fence->finished, PTR_ERR(fence)); - } else { - s_job->s_fence->parent = fence; - } -@@ -746,8 +748,9 @@ static int drm_sched_main(void *param) - r); - dma_fence_put(fence); - } else { -+ if (IS_ERR(fence)) -+ dma_fence_set_error(&s_fence->finished, PTR_ERR(fence)); - -- dma_fence_set_error(&s_fence->finished, PTR_ERR(fence)); - drm_sched_process_job(NULL, &sched_job->cb); - } - --- -2.20.1 - diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx_%.bbappend b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx_%.bbappend index 4dc51369a..7fa055b40 100644 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx_%.bbappend +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-imx_%.bbappend @@ -1,38 +1,16 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:${THISDIR}/files:" +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" -require recipes-kernel/linux/linux-agl.inc +require linux-fslc.inc # These patches and the configuration fragment below will need to be # revisited if/when using IMX_DEFAULT_BSP = "mainline" with i.MX8 -# becomes more feasible with upstream meta-freescale. -SRC_URI_append_etnaviv = " \ - file://0001-enable-mhdp-with-etnaviv.patch \ - file://0002-dts-enable-etnaviv.patch \ - file://0003-drm-etnaviv-fix-TS-cache-flushing-on-GPUs-with-BLT-e.patch \ - file://0004-drm-sched-Fix-passing-zero-to-PTR_ERR-warning-v2.patch \ -" - -# Make sure these are enabled so that AGL configurations work -SRC_URI_append = " file://tmpfs.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/tmpfs.cfg" -SRC_URI_append = " file://namespace.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/namespace.cfg" -SRC_URI_append = " file://cgroup.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/cgroup.cfg" - -# Support for CFG80211 subsystem -SRC_URI_append = " file://cfg80211.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/cfg80211.cfg" +# becomes feasible with the linux-fslc kernel. +#SRC_URI:append:etnaviv = " \ +# file://0002-dts-enable-etnaviv.patch \ +#" # Support for i.MX8MQ EVKB (e.g. Broadcom wifi) -SRC_URI_append_imx8mqevk = " file://imx8mq-evkb.cfg" -KERNEL_CONFIG_FRAGMENTS_append_imx8mqevk = " ${WORKDIR}/imx8mq-evkb.cfg" +AGL_KCONFIG_FRAGMENTS:append:imx8mq-evk = " imx8mq-evkb.cfg" # Build in etnaviv if required -SRC_URI_append_etnaviv = " file://etnaviv.cfg" -KERNEL_CONFIG_FRAGMENTS_append_etnaviv = " ${WORKDIR}/etnaviv.cfg" - -# Turn off a couple of things enabled by default by Freescale -# (lock debugging and userspace firmware loader fallback) -SRC_URI_append = " file://fixups.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/fixups.cfg" +AGL_KCONFIG_FRAGMENTS:append:etnaviv = " etnaviv.cfg" diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-lts_%.bbappend b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-lts_%.bbappend new file mode 100644 index 000000000..1007f3c7c --- /dev/null +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc-lts_%.bbappend @@ -0,0 +1 @@ +require linux-fslc.inc diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc.inc b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc.inc new file mode 100644 index 000000000..948b8c22c --- /dev/null +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc.inc @@ -0,0 +1,22 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +require recipes-kernel/linux/linux-yocto-agl.inc + +# Make sure these are enabled so that AGL systemd configuration works +AGL_KCONFIG_FRAGMENTS += " \ + tmpfs.cfg \ + namespace.cfg \ + cgroup.cfg \ +" + +# Support for CFG80211 subsystem +AGL_KCONFIG_FRAGMENTS += "cfg80211.cfg" + +# Turn off a couple of things enabled by default by Freescale +# (lock debugging and userspace firmware loader fallback) +AGL_KCONFIG_FRAGMENTS += "fixups.cfg" + +do_install:append:cubox-i() { + # Add symlink to work with default Hummingboard 2 u-boot configuration + ln -sf imx6q-hummingboard2.dtb ${D}/boot/imx6q-hummingboard2-emmc.dtb +} diff --git a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc_%.bbappend b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc_%.bbappend index 640f9cfe5..1007f3c7c 100644 --- a/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc_%.bbappend +++ b/meta-agl-bsp/meta-freescale-layer/recipes-kernel/linux/linux-fslc_%.bbappend @@ -1,25 +1 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/files:" - -require recipes-kernel/linux/linux-agl.inc - -# Make sure these are enabled so that AGL configurations work -SRC_URI_append = " file://tmpfs.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/tmpfs.cfg" -SRC_URI_append = " file://namespace.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/namespace.cfg" -SRC_URI_append = " file://cgroup.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/cgroup.cfg" - -# Support for CFG80211 subsystem -SRC_URI_append = " file://cfg80211.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/cfg80211.cfg" - -# Turn off a couple of things enabled by default by Freescale -# (lock debugging and userspace firmware loader fallback) -SRC_URI_append = " file://fixups.cfg" -KERNEL_CONFIG_FRAGMENTS_append = " ${WORKDIR}/fixups.cfg" - -do_install_append_cubox-i() { - # Add symlink to work with default Hummingboard 2 u-boot configuration - ln -sf imx6q-hummingboard2.dtb ${D}/boot/imx6q-hummingboard2-emmc.dtb -} +require linux-fslc.inc |