Add submodule dependency filesHEAD master

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
author: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> 2023-10-10 14:33:42 +0000
committer: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> 2023-10-10 14:33:42 +0000
commit: af1a266670d040d2f4083ff309d732d648afba2a (patch)
tree: 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/bindings
parent: e02cda008591317b1625707ff8e115a4841aa889 (diff)
165 files changed, 53763 insertions, 0 deletions
diff --git a/capstone/bindings/Makefile b/capstone/bindings/Makefile
new file mode 100644
index 000000000..83e9b255f
--- /dev/null
+++ b/capstone/bindings/Makefile
@@ -0,0 +1,107 @@
+TMPDIR = /tmp/capstone_test
+
+DIFF = diff -u -w
+
+TEST = $(TMPDIR)/test
+TEST_ARM = $(TMPDIR)/test_arm
+TEST_ARM64 = $(TMPDIR)/test_arm64
+TEST_M68K = $(TMPDIR)/test_m68k
+TEST_MIPS = $(TMPDIR)/test_mips
+TEST_MOS65XX = $(TMPDIR)/test_mos65xx
+TEST_PPC = $(TMPDIR)/test_ppc
+TEST_SPARC = $(TMPDIR)/test_sparc
+TEST_SYSZ = $(TMPDIR)/test_systemz
+TEST_X86 = $(TMPDIR)/test_x86
+TEST_XCORE = $(TMPDIR)/test_xcore
+TEST_BPF = $(TMPDIR)/test_bpf
+TEST_RISCV = $(TMPDIR)/test_riscv
+
+PYTHON2 ?= python
+
+.PHONY: all expected python java ocaml
+
+all:
+	cd python && $(MAKE) gen_const
+	cd java && $(MAKE) gen_const
+	cd ocaml && $(MAKE) gen_const
+
+tests: expected python java #oclma ruby
+
+test_java: expected java
+test_python: expected python
+
+expected:
+	cd ../tests && $(MAKE)
+	mkdir -p $(TMPDIR)
+	../tests/test > $(TEST)_e
+	../tests/test_arm > $(TEST_ARM)_e
+	../tests/test_arm64 > $(TEST_ARM64)_e
+	../tests/test_m68k > $(TEST_M68K)_e
+	../tests/test_mips > $(TEST_MIPS)_e
+	../tests/test_mos65xx > $(TEST_MOS65XX)_e
+	../tests/test_ppc > $(TEST_PPC)_e
+	../tests/test_sparc > $(TEST_SPARC)_e
+	../tests/test_systemz > $(TEST_SYSZ)_e
+	../tests/test_x86 > $(TEST_X86)_e
+	../tests/test_xcore > $(TEST_XCORE)_e
+	../tests/test_bpf > $(TEST_BPF)_e
+	../tests/test_riscv > $(TEST_RISCV)_e
+
+python: FORCE
+	cd python && $(MAKE)
+	$(PYTHON2) python/test.py > $(TEST)_o
+	$(PYTHON2) python/test_arm.py > $(TEST_ARM)_o
+	$(PYTHON2) python/test_arm64.py > $(TEST_ARM64)_o
+	$(PYTHON2) python/test_m68k.py > $(TEST_M68K)_o
+	$(PYTHON2) python/test_mips.py > $(TEST_MIPS)_o
+	$(PYTHON2) python/test_mos65xx.py > $(TEST_MOS65XX)_o
+	$(PYTHON2) python/test_ppc.py > $(TEST_PPC)_o
+	$(PYTHON2) python/test_sparc.py > $(TEST_SPARC)_o
+	$(PYTHON2) python/test_systemz.py > $(TEST_SYSZ)_o
+	$(PYTHON2) python/test_x86.py > $(TEST_X86)_o
+	$(PYTHON2) python/test_xcore.py > $(TEST_XCORE)_o
+	$(PYTHON2) python/test_bpf.py > $(TEST_BPF)_o
+	$(PYTHON2) python/test_riscv.py > $(TEST_RISCV)_o
+	$(MAKE) test_diff
+
+java: FORCE
+	cd java && $(MAKE)
+	cd java && ./run.sh > $(TEST)_o
+	cd java && ./run.sh arm > $(TEST_ARM)_o
+	cd java && ./run.sh arm64 > $(TEST_ARM64)_o
+	cd java && ./run.sh mips > $(TEST_MIPS)_o
+	cd java && ./run.sh ppc > $(TEST_PPC)_o
+	cd java && ./run.sh sparc > $(TEST_SPARC)_o
+	cd java && ./run.sh systemz > $(TEST_SYSZ)_o
+	cd java && ./run.sh x86 > $(TEST_X86)_o
+	cd java && ./run.sh xcore > $(TEST_XCORE)_o
+	$(MAKE) test_diff
+
+ocaml: FORCE
+
+test_diff: FORCE
+	$(DIFF) $(TEST)_e $(TEST)_o
+	$(DIFF) $(TEST_ARM)_e $(TEST_ARM)_o
+	$(DIFF) $(TEST_ARM64)_e $(TEST_ARM64)_o
+	$(DIFF) $(TEST_M68K)_e $(TEST_M68K)_o
+	$(DIFF) $(TEST_MIPS)_e $(TEST_MIPS)_o
+	$(DIFF) $(TEST_MOS65XX)_e $(TEST_MOS65XX)_o
+	$(DIFF) $(TEST_PPC)_e $(TEST_PPC)_o
+	$(DIFF) $(TEST_SPARC)_e $(TEST_SPARC)_o
+	$(DIFF) $(TEST_SYSZ)_e $(TEST_SYSZ)_o
+	$(DIFF) $(TEST_X86)_e $(TEST_X86)_o
+	$(DIFF) $(TEST_XCORE)_e $(TEST_XCORE)_o
+	$(DIFF) $(TEST_BPF)_e $(TEST_BPF)_o
+
+clean:
+	rm -rf $(TMPDIR)
+	cd java && $(MAKE) clean
+	cd python && $(MAKE) clean
+	cd ocaml && $(MAKE) clean
+
+check:
+	make -C ocaml check
+	make -C python check
+	make -C java check
+
+FORCE:
diff --git a/capstone/bindings/README b/capstone/bindings/README
new file mode 100644
index 000000000..63be0e01a
--- /dev/null
+++ b/capstone/bindings/README
@@ -0,0 +1,72 @@
+This directory contains bindings & test code for Python, Java & OCaml.
+See <language>/README for how to compile & install each binding.
+
+More bindings created & maintained by the community are available as followings.
+
+- Gapstone: Go binding (by Scott Knight).
+
+	https://github.com/knightsc/gapstone
+
+- Crabstone: Ruby binding for Capstone 3+ (by david942j).
+
+	https://github.com/david942j/crabstone
+
+- Crabstone: Ruby binding (by Ben Nagy).
+
+	https://github.com/bnagy/crabstone
+
+- Capstone-Vala: Vala binding (by Pancake).
+
+	https://github.com/radare/capstone-vala
+
+- Node-Capstone: NodeJS binding (by Jason Oster).
+
+	https://github.com/parasyte/node-capstone
+
+- CCcapstone: C++ binding (by Peter Hlavaty).
+
+	https://github.com/zer0mem/cccapstone
+
+- LuaCapstone: Lua binding (by Antonio Davide).
+
+	https://github.com/Dax89/LuaCapstone
+
+- Capstone-RS: Rust binding (by Richo Healey).
+
+	https://github.com/capstone-rust/capstone-rs
+
+- Capstone.NET: .NET framework binding (by Ahmed Garhy).
+
+	https://github.com/9ee1/Capstone.NET
+
+- CapstoneJ: High level Java wrapper for Capstone-java (by Keve Müller).
+
+	https://github.com/kevemueller/capstonej
+
+- Hapstone: Haskell binding (by ibabushkin)
+
+    https://github.com/ibabushkin/hapstone
+
+- CL-Capstone: Common Lisp bindings (by GrammaTech).
+
+    https://github.com/GrammaTech/cl-capstone
+
+- Emacs-capstone: Emacs (elisp) binding (by Bas Alberts)
+
+    https://github.com/collarchoke/emacs-capstone
+
+- C# binding (by Matt Graeber). Note: this is only for Capstone v2.0.
+
+	https://github.com/mattifestation/capstone
+
+- PowerShell binding (by Ruben Boonen).
+
+	https://github.com/aquynh/capstone/tree/master/bindings/powershell
+
+- PHP binding (by Fadhil Mandaga).
+
+	https://github.com/firodj/php-capstone
+	
+- capstone-d: D binding (by Dimitri Bohlender)
+
+	https://github.com/bohlender/capstone-d
diff --git a/capstone/bindings/const_generator.py b/capstone/bindings/const_generator.py
new file mode 100644
index 000000000..fda23642a
--- /dev/null
+++ b/capstone/bindings/const_generator.py
@@ -0,0 +1,177 @@
+# Capstone Disassembler Engine
+# By Dang Hoang Vu, 2013
+from __future__ import print_function
+import sys, re
+
+INCL_DIR = '../include/capstone/'
+
+include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h' ]
+
+template = {
+    'java': {
+            'header': "// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT\npackage capstone;\n\npublic class %s_const {\n",
+            'footer': "}",
+            'line_format': '\tpublic static final int %s = %s;\n',
+            'out_file': './java/capstone/%s_const.java',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'Arm',
+            'arm64.h': 'Arm64',
+            'm68k.h': 'M68k',
+            'mips.h': 'Mips',
+            'x86.h': 'X86',
+            'ppc.h': 'Ppc',
+            'sparc.h': 'Sparc',
+            'systemz.h': 'Sysz',
+            'xcore.h': 'Xcore',
+            'tms320c64x.h': 'TMS320C64x',
+            'm680x.h': 'M680x',
+            'evm.h': 'Evm',
+            'wasm.h': 'Wasm',
+            'comment_open': '\t//',
+            'comment_close': '',
+        },
+    'python': {
+            'header': "# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.py]\n",
+            'footer': "",
+            'line_format': '%s = %s\n',
+            'out_file': './python/capstone/%s_const.py',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'arm',
+            'arm64.h': 'arm64',
+            'm68k.h': 'm68k',
+            'mips.h': 'mips',
+            'x86.h': 'x86',
+            'ppc.h': 'ppc',
+            'sparc.h': 'sparc',
+            'systemz.h': 'sysz',
+            'xcore.h': 'xcore',
+            'tms320c64x.h': 'tms320c64x',
+            'm680x.h': 'm680x',
+            'evm.h': 'evm',
+            'wasm.h': 'wasm',
+            'mos65xx.h': 'mos65xx',
+            'bpf.h': 'bpf',
+            'riscv.h': 'riscv',
+            'comment_open': '#',
+            'comment_close': '',
+        },
+    'ocaml': {
+            'header': "(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.ml] *)\n",
+            'footer': "",
+            'line_format': 'let _%s = %s;;\n',
+            'out_file': './ocaml/%s_const.ml',
+            # prefixes for constant filenames of all archs - case sensitive
+            'arm.h': 'arm',
+            'arm64.h': 'arm64',
+            'mips.h': 'mips',
+            'm68k.h': 'm68k',
+            'x86.h': 'x86',
+            'ppc.h': 'ppc',
+            'sparc.h': 'sparc',
+            'systemz.h': 'sysz',
+            'xcore.h': 'xcore',
+            'tms320c64x.h': 'tms320c64x',
+            'm680x.h': 'm680x',
+            'evm.h': 'evm',
+            'wasm.h': 'wasm',
+            'comment_open': '(*',
+            'comment_close': ' *)',
+        },
+}
+
+# markup for comments to be added to autogen files
+MARKUP = '//>'
+
+def gen(lang):
+    global include, INCL_DIR
+    print('Generating bindings for', lang)
+    templ = template[lang]
+    print('Generating bindings for', lang)
+    for target in include:
+        if target not in templ:
+            print("Warning: No binding found for %s" % target)
+            continue
+        prefix = templ[target]
+        outfile = open(templ['out_file'] %(prefix), 'wb')   # open as binary prevents windows newlines
+        outfile.write((templ['header'] % (prefix)).encode("utf-8"))
+
+        lines = open(INCL_DIR + target).readlines()
+
+        count = 0
+        for line in lines:
+            line = line.strip()
+
+            if line.startswith(MARKUP):  # markup for comments
+                outfile.write(("\n%s%s%s\n" %(templ['comment_open'], \
+                                              line.replace(MARKUP, ''), \
+                                              templ['comment_close']) ).encode("utf-8"))
+                continue
+
+            if line == '' or line.startswith('//'):
+                continue
+
+            if line.startswith('#define '):
+                line = line[8:]     #cut off define
+                xline = re.split('\s+', line, 1)     #split to at most 2 express
+                if len(xline) != 2:
+                    continue
+                if '(' in xline[0] or ')' in xline[0]:      #does it look like a function
+                    continue
+                xline.insert(1, '=')            # insert an = so the expression below can parse it
+                line = ' '.join(xline)
+
+            if not line.startswith(prefix.upper()):
+                continue
+
+            tmp = line.strip().split(',')
+            for t in tmp:
+                t = t.strip()
+                if not t or t.startswith('//'): continue
+                # hacky: remove type cast (uint64_t)
+                t = t.replace('(uint64_t)', '')
+                t = re.sub(r'\((\d+)ULL << (\d+)\)', r'\1 << \2', t)    # (1ULL<<1) to 1 << 1
+                f = re.split('\s+', t)
+
+                if f[0].startswith(prefix.upper()):
+                    if len(f) > 1 and f[1] not in ('//', '///<', '='):
+                        print("Error: Unable to convert %s" % f)
+                        continue
+                    elif len(f) > 1 and f[1] == '=':
+                        rhs = ''.join(f[2:])
+                    else:
+                        rhs = str(count)
+                        count += 1
+
+                    try:
+                        count = int(rhs) + 1
+                        if (count == 1):
+                            outfile.write(("\n").encode("utf-8"))
+                    except ValueError:
+                        if lang == 'ocaml':
+                            # ocaml uses lsl for '<<', lor for '|'
+                            rhs = rhs.replace('<<', ' lsl ')
+                            rhs = rhs.replace('|', ' lor ')
+                            # ocaml variable has _ as prefix
+                            if rhs[0].isalpha():
+                                rhs = '_' + rhs
+
+                    outfile.write((templ['line_format'] %(f[0].strip(), rhs)).encode("utf-8"))
+
+        outfile.write((templ['footer']).encode("utf-8"))
+        outfile.close()
+
+def main():
+    try:
+        if sys.argv[1] == 'all':
+            for key in template.keys():
+                gen(key)
+        else:
+            gen(sys.argv[1])
+    except:
+        raise RuntimeError("Unsupported binding %s" % sys.argv[1])
+
+if __name__ == "__main__":
+    if len(sys.argv) < 2:
+        print("Usage:", sys.argv[0], " <bindings: java|python|ocaml|all>")
+        sys.exit(1)
+    main()
diff --git a/capstone/bindings/java/.gitignore b/capstone/bindings/java/.gitignore
new file mode 100644
index 000000000..82f7ecae2
--- /dev/null
+++ b/capstone/bindings/java/.gitignore
@@ -0,0 +1,2 @@
+*.class
+tags
diff --git a/capstone/bindings/java/Makefile b/capstone/bindings/java/Makefile
new file mode 100644
index 000000000..32f50bedc
--- /dev/null
+++ b/capstone/bindings/java/Makefile
@@ -0,0 +1,71 @@
+# Capstone Disassembler Engine
+# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013>
+
+ifndef BUILDDIR
+BLDIR = .
+OBJDIR = .
+else
+BLDIR = $(abspath $(BUILDDIR))/bindings/java
+OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/java
+endif
+
+JNA = /usr/share/java/jna/jna.jar
+
+ifneq ($(wildcard $(JNA)),)
+else
+  ifneq ($(wildcard /usr/share/java/jna.jar),)
+    JNA = /usr/share/java/jna.jar
+  else
+    JNA =
+  endif
+endif
+
+PYTHON2 ?= python
+
+CAPSTONE_JAVA = Capstone.java Arm_const.java Arm64_const.java Mips_const.java \
+				X86_const.java Xcore_const.java Ppc_const.java Sparc_const.java\
+				Sysz_const.java M680x_const.java \
+				Arm.java Arm64.java Mips.java X86.java Xcore.java Ppc.java\
+				Sparc.java Systemz.java M680x.java
+
+all: gen_const capstone tests
+
+capstone: capstone_class
+	@mkdir -p $(BLDIR)
+	cd $(OBJDIR) && jar cf $(BLDIR)/capstone.jar capstone/*.class
+
+capstone_class: jna
+ifdef BUILDDIR
+	@mkdir -p $(OBJDIR)
+	cd capstone && javac -d $(OBJDIR) -classpath $(JNA) $(CAPSTONE_JAVA)
+else
+	cd capstone && javac -classpath $(JNA) $(CAPSTONE_JAVA)
+endif
+
+tests: capstone_class jna
+	@mkdir -p $(OBJDIR)
+	javac -d $(OBJDIR) -classpath "$(JNA):$(BLDIR)/capstone.jar" TestBasic.java\
+		TestArm.java TestArm64.java TestMips.java TestX86.java TestXcore.java\
+		TestPpc.java TestSparc.java TestSystemz.java TestM680x.java
+
+gen_const:
+	cd ../ && $(PYTHON2) const_generator.py java
+
+jna:
+	@if [ ! $(JNA) ]; then echo "*** Unable to find JNA ***"; exit 1; fi
+
+clean:
+	rm -rf $(OBJDIR)/capstone/*.class
+	rm -rf $(OBJDIR)/*.class $(OBJDIR)/*.log $(BLDIR)/*.jar
+ifdef BUILDDIR
+	rm -rf $(BLDIR)
+	rm -rf $(OBJDIR)
+endif
+
+TESTS = testbasic arm arm64 m680x mips ppc sparc systemz x86 xcore
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./run.sh $$t > /dev/null && echo OK || echo FAILED; \
+	done
+
diff --git a/capstone/bindings/java/README b/capstone/bindings/java/README
new file mode 100644
index 000000000..f6cd8da7e
--- /dev/null
+++ b/capstone/bindings/java/README
@@ -0,0 +1,28 @@
+This has been tested with OpenJDK version 6 & 7 on Ubuntu-12.04 and
+Arch Linux-3.11, 64-bit.
+
+- OpenJDK is required to compile and run this test code.
+  For example, install OpenJDK 6 with:
+
+       $ sudo apt-get install openjdk-6-jre-headless openjdk-6-jdk
+
+- Java Native Access is required to run the code, you can install it with:
+
+       $ sudo apt-get install libjna-java
+
+- To compile and run this Java test code:
+
+       $ make
+       $ ./run.sh
+
+
+This directory contains some test code to show how to use Capstone API.
+
+- TestBasic.java
+  This code shows the most simple form of API where we only want to get basic
+  information out of disassembled instruction, such as address, mnemonic and
+  operand string.
+
+- Test<arch>.java
+  These code show how to retrieve architecture-specific information for each
+  architecture.
diff --git a/capstone/bindings/java/TestArm.java b/capstone/bindings/java/TestArm.java
new file mode 100644
index 000000000..654d5c56e
--- /dev/null
+++ b/capstone/bindings/java/TestArm.java
@@ -0,0 +1,142 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Arm;
+
+import static capstone.Arm_const.*;
+
+public class TestArm {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String ARM_CODE = "EDFFFFEB04e02de500000000e08322e5f102030e0000a0e30230c1e7000053e3000201f10540d0e8";
+  static final String ARM_CODE2 = "d1e800f0f02404071f3cf2c000004ff00001466c";
+  static final String THUMB_CODE2 = "4ff00001bde80088d1e800f018bfadbff3ff0b0c86f3008980f3008c4ffa99f6d0ffa201";
+  static final String THUMB_CODE  = "7047eb4683b0c9681fb130bfaff32084";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Arm.OpInfo operands = (Arm.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Arm.Operand i = (Arm.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == ARM_OP_SYSREG)
+          System.out.printf("\t\toperands[%d].type: SYSREG = %d\n", c, i.value.reg);
+        if (i.type == ARM_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == ARM_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == ARM_OP_PIMM)
+          System.out.printf("\t\toperands[%d].type: P-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM_OP_CIMM)
+          System.out.printf("\t\toperands[%d].type: C-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM_OP_SETEND)
+  				System.out.printf("\t\toperands[%d].type: SETEND = %s\n", c, i.value.setend == ARM_SETEND_BE? "be" : "le");
+        if (i.type == ARM_OP_FP)
+          System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
+        if (i.type == ARM_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.scale != 1)
+            System.out.printf("\t\t\toperands[%d].mem.scale: %d\n", c, (i.value.mem.scale));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, (i.value.mem.disp));
+          if (i.value.mem.lshift != 0)
+            System.out.printf("\t\t\toperands[%d].mem.lshift: 0x%x\n", c, (i.value.mem.lshift));
+        }
+        if (i.vector_index > 0)
+          System.out.printf("\t\t\toperands[%d].vector_index = %d\n", c, (i.vector_index));
+        if (i.shift.type != ARM_SFT_INVALID && i.shift.value > 0)
+          System.out.printf("\t\t\tShift: %d = %d\n", i.shift.type, i.shift.value);
+        if (i.subtracted)
+          System.out.printf("\t\t\toperands[%d].subtracted = True\n", c);
+      }
+    }
+    if (operands.writeback)
+      System.out.println("\tWrite-back: True");
+
+    if (operands.updateFlags)
+      System.out.println("\tUpdate-flags: True");
+
+    if (operands.cc != ARM_CC_AL && operands.cc != ARM_CC_INVALID)
+      System.out.printf("\tCode condition: %d\n",  operands.cc);
+
+    if (operands.cpsMode > 0)
+      System.out.printf("\tCPSI-mode: %d\n", operands.cpsMode);
+
+    if (operands.cpsFlag > 0)
+      System.out.printf("\tCPSI-flag: %d\n", operands.cpsFlag);
+
+    if (operands.vectorData > 0)
+      System.out.printf("\tVector-data: %d\n", operands.vectorData);
+
+    if (operands.vectorSize > 0)
+      System.out.printf("\tVector-size: %d\n", operands.vectorSize);
+
+    if (operands.usermode)
+      System.out.printf("\tUser-mode: True\n");
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, hexString2Byte(ARM_CODE), "ARM"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(THUMB_CODE), "Thumb"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(ARM_CODE2), "Thumb-mixed"),
+      new TestBasic.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, Capstone.CS_OPT_SYNTAX_NOREGNAME, hexString2Byte(THUMB_CODE2), "Thumb-2 & register named with numbers"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      if (test.syntax != 0)
+        cs.setSyntax(test.syntax);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+	  cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestArm64.java b/capstone/bindings/java/TestArm64.java
new file mode 100644
index 000000000..ce78f5ef5
--- /dev/null
+++ b/capstone/bindings/java/TestArm64.java
@@ -0,0 +1,124 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Arm64;
+
+import static capstone.Arm64_const.*;
+
+public class TestArm64 {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String ARM64_CODE = "090038d5bf4000d50c0513d52050020e20e43d0f0018a05fa200ae9e9f3703d5bf3303d5df3f03d5217c029b217c00530040214be10b40b9200481da2008028b105be83c";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Arm64.OpInfo operands = (Arm64.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Arm64.Operand i = (Arm64.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == ARM64_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == ARM64_OP_REG_MRS)
+          System.out.printf("\t\toperands[%d].type: REG_MRS = 0x%x\n", c, i.value.reg);
+        if (i.type == ARM64_OP_REG_MSR)
+          System.out.printf("\t\toperands[%d].type: REG_MSR = 0x%x\n", c, i.value.reg);
+        if (i.type == ARM64_OP_PSTATE)
+          System.out.printf("\t\toperands[%d].type: PSTATE = 0x%x\n", c, i.value.imm);
+			  if (i.type == ARM64_OP_BARRIER)
+  				System.out.printf("\t\toperands[%d].type: BARRIER = 0x%x\n", c, i.value.imm);
+
+        if (i.type == ARM64_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == ARM64_OP_CIMM)
+          System.out.printf("\t\toperands[%d].type: C-IMM = %d\n", c, i.value.imm);
+        if (i.type == ARM64_OP_FP)
+          System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
+        if (i.type == ARM64_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+        if (i.shift.type != ARM64_SFT_INVALID && i.shift.value > 0)
+          System.out.printf("\t\t\tShift: type = %d, value = %d\n", i.shift.type, i.shift.value);
+        if (i.ext != ARM64_EXT_INVALID)
+          System.out.printf("\t\t\tExt: %d\n", i.ext);
+        if (i.vas != ARM64_VAS_INVALID)
+          System.out.printf("\t\t\tVector Arrangement Specifier: 0x%x\n", i.vas);
+        if (i.vector_index != -1)
+          System.out.printf("\t\t\tVector Index: %d\n", i.vector_index);
+
+      }
+    }
+
+    if (operands.writeback)
+      System.out.println("\tWrite-back: True");
+
+    if (operands.updateFlags)
+      System.out.println("\tUpdate-flags: True");
+
+    if (operands.cc != ARM64_CC_AL && operands.cc != ARM64_CC_INVALID)
+      System.out.printf("\tCode-condition: %d\n",  operands.cc);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_ARM64, Capstone.CS_MODE_ARM, hexString2Byte(ARM64_CODE), "ARM-64"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x2c);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x: \n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestBasic.java b/capstone/bindings/java/TestBasic.java
new file mode 100644
index 000000000..421356b36
--- /dev/null
+++ b/capstone/bindings/java/TestBasic.java
@@ -0,0 +1,178 @@
+/* Capstone Disassembler Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
+
+import capstone.Capstone;
+
+public class TestBasic {
+  public static class platform {
+    public int arch;
+    public int mode;
+    public int syntax;
+    public byte[] code;
+    public String comment;
+
+    public platform(int a, int m, int syt, byte[] c, String s) {
+      arch = a;
+      mode = m;
+      code = c;
+      comment = s;
+      syntax = syt;
+    }
+
+    public platform(int a, int m, byte[] c, String s) {
+      arch = a;
+      mode = m;
+      code = c;
+      comment = s;
+    }
+  };
+
+  static public String stringToHex(byte[] code) {
+    StringBuilder buf = new StringBuilder(200);
+    for (byte ch: code) {
+      if (buf.length() > 0)
+        buf.append(' ');
+      buf.append(String.format("0x%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  public static final byte[] PPC_CODE = new byte[] {(byte)0x80, (byte)0x20, (byte)0x00, (byte)0x00, (byte)0x80, (byte)0x3f, (byte)0x00, (byte)0x00, (byte)0x10, (byte)0x43, (byte)0x23, (byte)0x0e, (byte)0xd0, (byte)0x44, (byte)0x00, (byte)0x80, (byte)0x4c, (byte)0x43, (byte)0x22, (byte)0x02, (byte)0x2d, (byte)0x03, (byte)0x00, (byte)0x80, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x14, (byte)0x7c, (byte)0x43, (byte)0x20, (byte)0x93, (byte)0x4f, (byte)0x20, (byte)0x00, (byte)0x21, (byte)0x4c, (byte)0xc8, (byte)0x00, (byte)0x21 };
+  public static final byte[] X86_CODE = new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 };
+  public static final byte[] SPARC_CODE = new byte[] { (byte)0x80, (byte)0xa0, (byte)0x40, (byte)0x02, (byte)0x85, (byte)0xc2, (byte)0x60, (byte)0x08, (byte)0x85, (byte)0xe8, (byte)0x20, (byte)0x01, (byte)0x81, (byte)0xe8, (byte)0x00, (byte)0x00, (byte)0x90, (byte)0x10, (byte)0x20, (byte)0x01, (byte)0xd5, (byte)0xf6, (byte)0x10, (byte)0x16, (byte)0x21, (byte)0x00, (byte)0x00, (byte)0x0a, (byte)0x86, (byte)0x00, (byte)0x40, (byte)0x02, (byte)0x01, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x12, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0x10, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xa0, (byte)0x02, (byte)0x00, (byte)0x09, (byte)0x0d, (byte)0xbf, (byte)0xff, (byte)0xff, (byte)0xd4, (byte)0x20, (byte)0x60, (byte)0x00, (byte)0xd4, (byte)0x4e, (byte)0x00, (byte)0x16, (byte)0x2a, (byte)0xc2, (byte)0x80, (byte)0x03 };
+  public static final byte[] SYSZ_CODE = new byte[] { (byte)0xed, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x1a, (byte)0x5a, (byte)0x0f, (byte)0x1f, (byte)0xff, (byte)0xc2, (byte)0x09, (byte)0x80, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x07, (byte)0xf7, (byte)0xeb, (byte)0x2a, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xe3, (byte)0x01, (byte)0xff, (byte)0xff, (byte)0x7f, (byte)0x57, (byte)0xeb, (byte)0x00, (byte)0xf0, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0xb2, (byte)0x4f, (byte)0x00, (byte)0x78 };
+  public static final byte[] SPARCV9_CODE = new byte[] { (byte)0x81, (byte)0xa8, (byte)0x0a, (byte)0x24, (byte)0x89, (byte)0xa0, (byte)0x10, (byte)0x20, (byte)0x89, (byte)0xa0, (byte)0x1a, (byte)0x60, (byte)0x89, (byte)0xa0, (byte)0x00, (byte)0xe0 };
+  public static final byte[] XCORE_CODE = new byte[] { (byte)0xfe, (byte)0x0f, (byte)0xfe, (byte)0x17, (byte)0x13, (byte)0x17, (byte)0xc6, (byte)0xfe, (byte)0xec, (byte)0x17, (byte)0x97, (byte)0xf8, (byte)0xec, (byte)0x4f, (byte)0x1f, (byte)0xfd, (byte)0xec, (byte)0x37, (byte)0x07, (byte)0xf2, (byte)0x45, (byte)0x5b, (byte)0xf9, (byte)0xfa, (byte)0x02, (byte)0x06, (byte)0x1b, (byte)0x10 };
+
+  static public void main(String argv[]) {
+    platform[] platforms = {
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_16,
+          Capstone.CS_OPT_SYNTAX_INTEL,
+          new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, (byte)0x00, (byte)0x00 },
+          "X86 16bit (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_32,
+          Capstone.CS_OPT_SYNTAX_ATT,
+          X86_CODE,
+          "X86 32bit (ATT syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_32,
+          X86_CODE,
+          "X86 32 (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_X86,
+          Capstone.CS_MODE_64,
+          new byte[] {(byte)0x55, (byte)0x48, (byte)0x8b, (byte)0x05, (byte)0xb8, (byte)0x13, (byte)0x00, (byte)0x00 },
+          "X86 64 (Intel syntax)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_ARM,
+          new byte[] { (byte)0xED, (byte)0xFF, (byte)0xFF, (byte)0xEB, (byte)0x04, (byte)0xe0, (byte)0x2d, (byte)0xe5, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0xe0, (byte)0x83, (byte)0x22, (byte)0xe5, (byte)0xf1, (byte)0x02, (byte)0x03, (byte)0x0e, (byte)0x00, (byte)0x00, (byte)0xa0, (byte)0xe3, (byte)0x02, (byte)0x30, (byte)0xc1, (byte)0xe7, (byte)0x00, (byte)0x00, (byte)0x53, (byte)0xe3 },
+          "ARM"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_THUMB,
+          new byte[] {(byte)0x4f, (byte)0xf0, (byte)0x00, (byte)0x01, (byte)0xbd, (byte)0xe8, (byte)0x00, (byte)0x88, (byte)0xd1, (byte)0xe8, (byte)0x00, (byte)0xf0 },
+          "THUMB-2"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_ARM,
+          new byte[] {(byte)0x10, (byte)0xf1, (byte)0x10, (byte)0xe7, (byte)0x11, (byte)0xf2, (byte)0x31, (byte)0xe7, (byte)0xdc, (byte)0xa1, (byte)0x2e, (byte)0xf3, (byte)0xe8, (byte)0x4e, (byte)0x62, (byte)0xf3 },
+          "ARM: Cortex-A15 + NEON"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM,
+          Capstone.CS_MODE_THUMB,
+          new byte[] {(byte)0x70, (byte)0x47, (byte)0xeb, (byte)0x46, (byte)0x83, (byte)0xb0, (byte)0xc9, (byte)0x68 },
+          "THUMB"
+          ),
+      new platform(
+          Capstone.CS_ARCH_MIPS,
+          Capstone.CS_MODE_MIPS32 + Capstone.CS_MODE_BIG_ENDIAN,
+          new byte[] {(byte)0x0C, (byte)0x10, (byte)0x00, (byte)0x97, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x00, (byte)0x24, (byte)0x02, (byte)0x00, (byte)0x0c, (byte)0x8f, (byte)0xa2, (byte)0x00, (byte)0x00, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0x56 },
+          "MIPS-32 (Big-endian)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_MIPS,
+          Capstone.CS_MODE_MIPS64+ Capstone.CS_MODE_LITTLE_ENDIAN,
+          new byte[] {(byte)0x56, (byte)0x34, (byte)0x21, (byte)0x34, (byte)0xc2, (byte)0x17, (byte)0x01, (byte)0x00 },
+          "MIPS-64-EL (Little-endian)"
+          ),
+      new platform(
+          Capstone.CS_ARCH_ARM64,
+          Capstone.CS_MODE_ARM,
+          new byte [] { 0x21, 0x7c, 0x02, (byte)0x9b, 0x21, 0x7c, 0x00, 0x53, 0x00, 0x40, 0x21, 0x4b, (byte)0xe1, 0x0b, 0x40, (byte)0xb9 },
+          "ARM-64"
+          ),
+      new platform (
+          Capstone.CS_ARCH_PPC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          PPC_CODE,
+          "PPC-64"
+          ),
+      new platform (
+          Capstone.CS_ARCH_PPC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          Capstone.CS_OPT_SYNTAX_NOREGNAME,
+          PPC_CODE,
+          "PPC-64, print register with number only"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SPARC,
+          Capstone.CS_MODE_BIG_ENDIAN,
+          SPARC_CODE,
+          "Sparc"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SPARC,
+          Capstone.CS_MODE_BIG_ENDIAN + Capstone.CS_MODE_V9,
+          SPARCV9_CODE,
+          "SparcV9"
+          ),
+      new platform (
+          Capstone.CS_ARCH_SYSZ,
+          0,
+          SYSZ_CODE,
+          "SystemZ"
+          ),
+      new platform (
+          Capstone.CS_ARCH_XCORE,
+          0,
+          XCORE_CODE,
+          "XCore"
+          ),
+    };
+
+    for (int j = 0; j < platforms.length; j++) {
+      System.out.println("****************");
+      System.out.println(String.format("Platform: %s", platforms[j].comment));
+      System.out.println(String.format("Code: %s", stringToHex(platforms[j].code)));
+      System.out.println("Disasm:");
+
+      Capstone cs = new Capstone(platforms[j].arch, platforms[j].mode);
+      if (platforms[j].syntax != 0)
+        cs.setSyntax(platforms[j].syntax);
+
+      Capstone.CsInsn[] all_insn = cs.disasm(platforms[j].code, 0x1000);
+
+      for (int i = 0; i < all_insn.length; i++) {
+        System.out.println(String.format("0x%x: \t%s\t%s", all_insn[i].address,
+              all_insn[i].mnemonic, all_insn[i].opStr));
+      }
+      System.out.printf("0x%x:\n\n", all_insn[all_insn.length-1].address + all_insn[all_insn.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+}
diff --git a/capstone/bindings/java/TestM680x.java b/capstone/bindings/java/TestM680x.java
new file mode 100644
index 000000000..a5c0e85b8
--- /dev/null
+++ b/capstone/bindings/java/TestM680x.java
@@ -0,0 +1,207 @@
+// Capstone Java binding
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+import java.lang.*;
+import capstone.Capstone;
+import capstone.M680x;
+
+import static capstone.M680x_const.*;
+
+public class TestM680x {
+
+  static final String sAccess[] = {
+    "UNCHANGED", "READ", "WRITE", "READ | WRITE",
+  };
+
+  static final String M6800_CODE = "010936647f7410009010A410b6100039";
+  static final String M6801_CODE = "04053c3d389310ec10ed1039";
+  static final String M6805_CODE = "047f00172228002e0040425a708e979ca015ad00c31000da1234e57ffe";
+  static final String M6808_CODE = "31220035224510004b005110525e226265123472848586878a8b8c9495a710af109e607f9e6b7f009ed610009ee67f";
+  static final String HD6301_CODE = "6b100071100072101039";
+  static final String M6809_CODE = "0610191a551e0123e931063455a681a7897fffa69d1000a791a69f100011ac99100039A607A627A647A667A60FA610A680A681A682A683A684A685A686A6887FA68880A6897FFFA6898000A68BA68C10A68D1000A691A693A694A695A696A6987FA69880A6997FFFA6998000A69BA69C10A69D1000A69F1000";
+  static final String M6811_CODE = "0203127f100013990800147f02157f011e7f20008fcf18081830183c1867188c1000188f18ce100018ff10001aa37f1aac1aee7f1aef7fcdac7f";
+  static final String CPU12_CODE = "000401000c00800e008000111e100080003b4a1000044b01044f7f80008f1000b752b7b1a667a6fea6f71802e23039e21000180c30391000181118121000181900181e00183e183f00";
+  static final String HD6309_CODE = "0110106210107b101000cd499602d21030231038103b1053105d1130431011372510113812113923113b34118e100011af1011ab1011f68000";
+  static final String HCS08_CODE = "3210009eae9ece7f9ebe10009efe7f3e10009ef37f9610009eff7f82";
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static public String stringToHexUc(byte[] code) {
+    StringBuilder buf = new StringBuilder(800);
+    for (byte ch: code) {
+      buf.append(String.format(" 0x%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  static public String stringToHexShortUc(byte[] code) {
+    StringBuilder buf = new StringBuilder(800);
+    for (byte ch: code) {
+      buf.append(String.format("%02x", ch));
+    }
+    return buf.toString();
+  }
+
+  public static Capstone cs;
+/*
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+*/
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    String bytes = stringToHexShortUc(ins.bytes);
+    System.out.printf("0x%04x:\t%s\t%s\t%s\n", ins.address, bytes, ins.mnemonic, ins.opStr);
+
+    M680x.OpInfo operands = (M680x.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c = 0; c < operands.op.length; c++) {
+        M680x.Operand i = (M680x.Operand) operands.op[c];
+        if (i.type == M680X_OP_REGISTER) {
+          String comment = "";
+          if ((c == 0 && ((operands.flags & M680X_FIRST_OP_IN_MNEM) != 0)) ||
+              (c == 1 && ((operands.flags & M680X_SECOND_OP_IN_MNEM) != 0)))
+            comment = " (in mnemonic)";
+          System.out.printf("\t\toperands[%d].type: REGISTER = %s%s\n", c, ins.regName(i.value.reg), comment);
+        }
+        if (i.type == M680X_OP_CONSTANT)
+          System.out.printf("\t\toperands[%d].type: CONSTANT = %d\n", c, i.value.const_val);
+        if (i.type == M680X_OP_IMMEDIATE)
+          System.out.printf("\t\toperands[%d].type: IMMEDIATE = #%d\n", c, i.value.imm);
+        if (i.type == M680X_OP_DIRECT)
+          System.out.printf("\t\toperands[%d].type: DIRECT = 0x%02x\n", c, i.value.direct_addr);
+        if (i.type == M680X_OP_EXTENDED)
+          System.out.printf("\t\toperands[%d].type: EXTENDED %s = 0x%04x\n", c,
+            i.value.ext.indirect != 0 ? "INDIRECT" : "", i.value.ext.address);
+        if (i.type == M680X_OP_RELATIVE)
+          System.out.printf("\t\toperands[%d].type: RELATIVE = 0x%04x\n", c, i.value.rel.address );
+        if (i.type == M680X_OP_INDEXED) {
+          System.out.printf("\t\toperands[%d].type: INDEXED%s\n", c,
+            (i.value.idx.flags & M680X_IDX_INDIRECT) != 0 ? " INDIRECT" : "");
+          if (i.value.idx.base_reg != M680X_REG_INVALID) {
+            String regName = ins.regName(i.value.idx.base_reg);
+            if (regName != null)
+              System.out.printf("\t\t\tbase register: %s\n", regName);
+          }
+          if (i.value.idx.offset_reg != M680X_REG_INVALID) {
+            String regName = ins.regName(i.value.idx.offset_reg);
+            if (regName != null)
+              System.out.printf("\t\t\toffset register: %s\n", regName);
+          }
+          if ((i.value.idx.offset_bits != 0) &&
+              (i.value.idx.offset_reg == M680X_REG_INVALID) &&
+              (i.value.idx.inc_dec == 0)) {
+            System.out.printf("\t\t\toffset: %d\n", i.value.idx.offset);
+            if (i.value.idx.base_reg == M680X_REG_PC)
+              System.out.printf("\t\t\toffset address: 0x%04x\n", i.value.idx.offset_addr);
+            System.out.printf("\t\t\toffset bits: %d\n", i.value.idx.offset_bits);
+          }
+          if (i.value.idx.inc_dec != 0) {
+            String post_pre =
+               (i.value.idx.flags & M680X_IDX_POST_INC_DEC) != 0 ?
+		"post" : "pre";
+            String inc_dec =
+               i.value.idx.inc_dec > 0 ? "increment" : "decrement";
+
+            System.out.printf("\t\t\t%s %s: %d\n", post_pre, inc_dec,
+			Math.abs(i.value.idx.inc_dec));
+          }
+        }
+        if (i.size != 0)
+          System.out.printf("\t\t\tsize: %d\n", i.size);
+        if (i.access != Capstone.CS_AC_INVALID)
+          System.out.printf("\t\t\taccess: %s\n", sAccess[i.access]);
+      }
+    }
+
+    if (ins.regsRead.length > 0) {
+      System.out.printf("\tRegisters read:");
+      for (int c = 0; c < ins.regsRead.length; c++) {
+        System.out.printf(" %s", ins.regName(ins.regsRead[c]));
+      }
+      System.out.printf("\n");
+    }
+
+    if (ins.regsWrite.length > 0) {
+      System.out.printf("\tRegisters modified:");
+      for (int c = 0; c < ins.regsWrite.length; c++) {
+        System.out.printf(" %s", ins.regName(ins.regsWrite[c]));
+      }
+      System.out.printf("\n");
+    }
+
+    if (ins.groups.length > 0)
+      System.out.printf("\tgroups_count: %d\n", ins.groups.length);
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6301,
+          hexString2Byte(HD6301_CODE), "M680X_HD6301"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6309,
+          hexString2Byte(HD6309_CODE), "M680X_HD6309"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6800,
+          hexString2Byte(M6800_CODE), "M680X_M6800"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6801,
+          hexString2Byte(M6801_CODE), "M680X_M6801"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6805,
+          hexString2Byte(M6805_CODE), "M680X_M68HC05"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6808,
+          hexString2Byte(M6808_CODE), "M680X_M68HC08"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6809,
+          hexString2Byte(M6809_CODE), "M680X_M6809"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_6811,
+          hexString2Byte(M6811_CODE), "M680X_M68HC11"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_CPU12,
+          hexString2Byte(CPU12_CODE), "M680X_CPU12"),
+      new TestBasic.platform(Capstone.CS_ARCH_M680X,
+          Capstone.CS_MODE_M680X_HCS08,
+          hexString2Byte(HCS08_CODE), "M680X_HCS08"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[20]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + stringToHexUc(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestMips.java b/capstone/bindings/java/TestMips.java
new file mode 100644
index 000000000..1a8b05c12
--- /dev/null
+++ b/capstone/bindings/java/TestMips.java
@@ -0,0 +1,91 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Mips;
+
+import static capstone.Mips_const.*;
+
+public class TestMips {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String MIPS_CODE  = "0C100097000000002402000c8fa2000034213456";
+  static final String MIPS_CODE2 = "56342134c2170100";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Mips.OpInfo operands = (Mips.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Mips.Operand i = (Mips.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == MIPS_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == MIPS_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == MIPS_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String base = ins.regName(i.value.mem.base);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: %s\n", c, hex(i.value.mem.disp));
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS32 + Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(MIPS_CODE), "MIPS-32 (Big-endian)"),
+      new TestBasic.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_MIPS64 + Capstone.CS_MODE_LITTLE_ENDIAN, hexString2Byte(MIPS_CODE2), "MIPS-64-EL (Little-endian)"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x:\n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestPpc.java b/capstone/bindings/java/TestPpc.java
new file mode 100644
index 000000000..8b630bfa9
--- /dev/null
+++ b/capstone/bindings/java/TestPpc.java
@@ -0,0 +1,96 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import capstone.Ppc;
+
+import static capstone.Ppc_const.*;
+
+public class TestPpc {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String PPC_CODE = "80200000803f00001043230ed04400804c4322022d0300807c4320147c4320934f2000214cc8002140820014";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Ppc.OpInfo operands = (Ppc.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Ppc.Operand i = (Ppc.Operand) operands.op[c];
+        if (i.type == PPC_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == PPC_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == PPC_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != PPC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.bc != 0)
+      System.out.printf("\tBranch code: %d\n", operands.bc);
+
+    if (operands.bh != 0)
+      System.out.printf("\tBranch hint: %d\n", operands.bh);
+
+    if (operands.updateCr0)
+      System.out.printf("\tUpdate-CR0: True\n");
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_PPC, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(PPC_CODE), "PPC-64"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestSparc.java b/capstone/bindings/java/TestSparc.java
new file mode 100644
index 000000000..df44f9506
--- /dev/null
+++ b/capstone/bindings/java/TestSparc.java
@@ -0,0 +1,97 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Sparc;
+
+import static capstone.Sparc_const.*;
+
+public class TestSparc {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String SPARC_CODE = "80a0400285c2600885e8200181e8000090102001d5f610162100000a860040020100000012bfffff10bfffffa00200090dbfffffd4206000d44e00162ac28003";
+  static final String SPARCV9_CODE = "81a80a2489a0102089a01a6089a000e0";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Sparc.OpInfo operands = (Sparc.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Sparc.Operand i = (Sparc.Operand) operands.op[c];
+        if (i.type == SPARC_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == SPARC_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == SPARC_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != SPARC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != SPARC_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.cc != 0)
+      System.out.printf("\tCode condition: %d\n", operands.cc);
+
+    if (operands.hint != 0)
+      System.out.printf("\tHint code: %d\n", operands.hint);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(SPARC_CODE), "Sparc"),
+      new TestBasic.platform(Capstone.CS_ARCH_SPARC, Capstone.CS_MODE_BIG_ENDIAN + Capstone.CS_MODE_V9, hexString2Byte(SPARCV9_CODE), "SparcV9"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestSystemz.java b/capstone/bindings/java/TestSystemz.java
new file mode 100644
index 000000000..784913b73
--- /dev/null
+++ b/capstone/bindings/java/TestSystemz.java
@@ -0,0 +1,96 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Systemz;
+
+import static capstone.Sysz_const.*;
+
+public class TestSystemz {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String SYSZ_CODE = "ed000000001a5a0f1fffc2098000000007f7eb2affff7f57e301ffff7f57eb00f0000024b24f0078ec180000c17f";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Systemz.OpInfo operands = (Systemz.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Systemz.Operand i = (Systemz.Operand) operands.op[c];
+        if (i.type == SYSZ_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == SYSZ_OP_ACREG)
+            System.out.printf("\t\toperands[%d].type: ACREG = %s\n", c, i.value.reg);
+        if (i.type == SYSZ_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == SYSZ_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != SYSZ_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != SYSZ_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.length != 0)
+            System.out.printf("\t\t\toperands[%d].mem.length: 0x%x\n", c, i.value.mem.disp);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+      }
+    }
+
+    if (operands.cc != 0)
+      System.out.printf("\tConditional code: %d\n", operands.cc);
+
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_SYSZ, 0, hexString2Byte(SYSZ_CODE), "SystemZ"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestX86.java b/capstone/bindings/java/TestX86.java
new file mode 100644
index 000000000..3a10962b3
--- /dev/null
+++ b/capstone/bindings/java/TestX86.java
@@ -0,0 +1,227 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+import capstone.Capstone;
+import static capstone.Capstone.CS_AC_READ;
+import static capstone.Capstone.CS_AC_WRITE;
+import capstone.Capstone.CsRegsAccess;
+import capstone.X86;
+
+import static capstone.X86_const.*;
+
+public class TestX86 {
+
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String X86_CODE64 = "55488b05b8130000";
+  static final String X86_CODE16 = "8d4c320801d881c6341200000523010000368b849123010000418d8439896700008d8789670000b4c6";
+  static final String X86_CODE32 = "8d4c320801d881c6341200000523010000368b849123010000418d8439896700008d8789670000b4c6";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  private static String array2hex(byte[] arr) {
+    String ret = "";
+    for (int i=0 ;i<arr.length; i++)
+      ret += String.format("0x%02x ", arr[i]);
+    return ret;
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    X86.OpInfo operands = (X86.OpInfo) ins.operands;
+
+    System.out.printf("\tPrefix: %s\n", array2hex(operands.prefix));
+
+    System.out.printf("\tOpcode: %s\n", array2hex(operands.opcode));
+
+    // print REX prefix (non-zero value is relevant for x86_64)
+    System.out.printf("\trex: 0x%x\n", operands.rex);
+
+    // print address size
+    System.out.printf("\taddr_size: %d\n", operands.addrSize);
+
+    // print modRM byte
+    System.out.printf("\tmodrm: 0x%x\n", operands.modrm);
+
+    // print modRM offset
+    if (operands.encoding.modrmOffset != 0) {
+      System.out.printf("\tmodrm offset: 0x%x\n", operands.encoding.modrmOffset);
+    }
+
+    // print displacement value
+    System.out.printf("\tdisp: 0x%x\n", operands.disp);
+
+    // print displacement offset
+    if (operands.encoding.dispOffset != 0) {
+      System.out.printf("\tdisp offset: 0x%x\n", operands.encoding.dispOffset);
+    }
+
+    //print displacement size
+    if (operands.encoding.dispSize != 0) {
+      System.out.printf("\tdisp size: 0x%x\n", operands.encoding.dispSize);
+    }
+
+    // SIB is not available in 16-bit mode
+    if ( (cs.mode & Capstone.CS_MODE_16) == 0) {
+      // print SIB byte
+      System.out.printf("\tsib: 0x%x\n", operands.sib);
+      if (operands.sib != 0)
+        System.out.printf("\t\tsib_base: %s\n\t\tsib_index: %s\n\t\tsib_scale: %d\n",
+          ins.regName(operands.sibBase), ins.regName(operands.sibIndex), operands.sibScale);
+    }
+
+    if (operands.xopCC != 0)
+        System.out.printf("\txop_cc: %u\n", operands.xopCC);
+
+    if (operands.sseCC != 0)
+        System.out.printf("\tsse_cc: %u\n", operands.sseCC);
+
+    if (operands.avxCC != 0)
+        System.out.printf("\tavx_cc: %u\n", operands.avxCC);
+
+    if (operands.avxSae)
+        System.out.printf("\tavx_sae: TRUE\n");
+
+    if (operands.avxRm != 0)
+        System.out.printf("\tavx_rm: %u\n", operands.avxRm);
+
+    int count = ins.opCount(X86_OP_IMM);
+    if (count > 0) {
+      System.out.printf("\timm_count: %d\n", count);
+      System.out.printf("\timm offset: 0x%x\n", operands.encoding.immOffset);
+      System.out.printf("\timm size: 0x%x\n", operands.encoding.immSize);
+      for (int i=0; i<count; i++) {
+        int index = ins.opIndex(X86_OP_IMM, i + 1);
+        System.out.printf("\t\timms[%d]: 0x%x\n", i+1, (operands.op[index].value.imm));
+      }
+    }
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        X86.Operand i = (X86.Operand) operands.op[c];
+        String imm = hex(i.value.imm);
+        if (i.type == X86_OP_REG)
+          System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == X86_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == X86_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n",c);
+          String segment = ins.regName(i.value.mem.segment);
+          String base = ins.regName(i.value.mem.base);
+          String index = ins.regName(i.value.mem.index);
+          if (segment != null)
+            System.out.printf("\t\t\toperands[%d].mem.segment: REG = %s\n", c, segment);
+          if (base != null)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
+          if (index != null)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
+          if (i.value.mem.scale != 1)
+            System.out.printf("\t\t\toperands[%d].mem.scale: %d\n", c, i.value.mem.scale);
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+        }
+
+        // AVX broadcast type
+        if (i.avx_bcast != X86_AVX_BCAST_INVALID) {
+          System.out.printf("\t\toperands[%d].avx_bcast: %d\n", c, i.avx_bcast);
+        }
+
+        // AVX zero opmask {z}
+        if (i.avx_zero_opmask) {
+          System.out.printf("\t\toperands[%d].avx_zero_opmask: TRUE\n", c);
+        }
+
+        System.out.printf("\t\toperands[%d].size: %d\n", c, i.size);
+        switch(i.access) {
+          case CS_AC_READ:
+            System.out.printf("\t\toperands[%d].access: READ\n", c);
+            break;
+          case CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: WRITE\n", c);
+            break;
+          case CS_AC_READ | CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: READ | WRITE\n", c);
+            break;
+        }
+      }
+
+      // Print out all registers accessed by this instruction (either implicit or explicit)
+      CsRegsAccess regsAccess = ins.regsAccess();
+      if (regsAccess != null) {
+        short[] regsRead = regsAccess.regsRead;
+        short[] regsWrite = regsAccess.regsWrite;
+
+        if (regsRead.length > 0) {
+          System.out.printf("\tRegisters read:");
+          for (int i = 0; i < regsRead.length; i++) {
+            System.out.printf(" %s", ins.regName(regsRead[i]));
+          }
+          System.out.print("\n");
+        }
+
+        if (regsWrite.length > 0) {
+          System.out.printf("\tRegister modified:");
+          for (int i = 0; i < regsWrite.length; i++) {
+            System.out.printf(" %s", ins.regName(regsWrite[i]));
+          }
+          System.out.print("\n");
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_16, hexString2Byte(X86_CODE16), "X86 16bit (Intel syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, Capstone.CS_OPT_SYNTAX_ATT, hexString2Byte(X86_CODE32), "X86 32 (AT&T syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, hexString2Byte(X86_CODE32), "X86 32 (Intel syntax)"),
+      new TestBasic.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_64, hexString2Byte(X86_CODE64), "X86 64 (Intel syntax)"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      if (test.syntax != 0) {
+        cs.setSyntax(test.syntax);
+      }
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+
+      System.out.printf("0x%x:\n\n", all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size);
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/TestXcore.java b/capstone/bindings/java/TestXcore.java
new file mode 100644
index 000000000..c1bfbccd3
--- /dev/null
+++ b/capstone/bindings/java/TestXcore.java
@@ -0,0 +1,89 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013-2014
+
+import capstone.Capstone;
+import capstone.Xcore;
+
+import static capstone.Xcore_const.*;
+
+public class TestXcore {
+  static byte[] hexString2Byte(String s) {
+    // from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
+    int len = s.length();
+    byte[] data = new byte[len / 2];
+    for (int i = 0; i < len; i += 2) {
+      data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
+          + Character.digit(s.charAt(i+1), 16));
+    }
+    return data;
+  }
+
+  static final String XCORE_CODE = "fe0ffe171317c6feec1797f8ec4f1ffdec3707f2455bf9fa02061b1009fdeca7";
+
+  public static Capstone cs;
+
+  private static String hex(int i) {
+    return Integer.toString(i, 16);
+  }
+
+  private static String hex(long i) {
+    return Long.toString(i, 16);
+  }
+
+  public static void print_ins_detail(Capstone.CsInsn ins) {
+    System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.opStr);
+
+    Xcore.OpInfo operands = (Xcore.OpInfo) ins.operands;
+
+    if (operands.op.length != 0) {
+      System.out.printf("\top_count: %d\n", operands.op.length);
+      for (int c=0; c<operands.op.length; c++) {
+        Xcore.Operand i = (Xcore.Operand) operands.op[c];
+        if (i.type == XCORE_OP_REG)
+            System.out.printf("\t\toperands[%d].type: REG = %s\n", c, ins.regName(i.value.reg));
+        if (i.type == XCORE_OP_IMM)
+          System.out.printf("\t\toperands[%d].type: IMM = 0x%x\n", c, i.value.imm);
+        if (i.type == XCORE_OP_MEM) {
+          System.out.printf("\t\toperands[%d].type: MEM\n", c);
+          if (i.value.mem.base != XCORE_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, ins.regName(i.value.mem.base));
+          if (i.value.mem.index != XCORE_REG_INVALID)
+            System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, ins.regName(i.value.mem.index));
+          if (i.value.mem.disp != 0)
+            System.out.printf("\t\t\toperands[%d].mem.disp: 0x%x\n", c, i.value.mem.disp);
+          if (i.value.mem.direct != 1)
+            System.out.printf("\t\t\toperands[%d].mem.direct: -1\n", c);
+        }
+      }
+    }
+  }
+
+  public static void main(String argv[]) {
+
+    final TestBasic.platform[] all_tests = {
+      new TestBasic.platform(Capstone.CS_ARCH_XCORE, Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(XCORE_CODE), "XCore"),
+    };
+
+    for (int i=0; i<all_tests.length; i++) {
+      TestBasic.platform test = all_tests[i];
+      System.out.println(new String(new char[16]).replace("\0", "*"));
+      System.out.println("Platform: " + test.comment);
+      System.out.println("Code: " + TestBasic.stringToHex(test.code));
+      System.out.println("Disasm:");
+
+      cs = new Capstone(test.arch, test.mode);
+      cs.setDetail(Capstone.CS_OPT_ON);
+      Capstone.CsInsn[] all_ins = cs.disasm(test.code, 0x1000);
+
+      for (int j = 0; j < all_ins.length; j++) {
+        print_ins_detail(all_ins[j]);
+        System.out.println();
+      }
+      System.out.printf("0x%x:\n\n", (all_ins[all_ins.length-1].address + all_ins[all_ins.length-1].size));
+
+      // Close when done
+      cs.close();
+    }
+  }
+
+}
diff --git a/capstone/bindings/java/capstone/.gitignore b/capstone/bindings/java/capstone/.gitignore
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/capstone/bindings/java/capstone/.gitignore
diff --git a/capstone/bindings/java/capstone/Arm.java b/capstone/bindings/java/capstone/Arm.java
new file mode 100644
index 000000000..42b14297e
--- /dev/null
+++ b/capstone/bindings/java/capstone/Arm.java
@@ -0,0 +1,153 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Arm_const.*;
+
+public class Arm {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int index;
+    public int scale;
+    public int disp;
+    public int lshift;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "scale", "disp", "lshift");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public double fp;
+    public MemType mem;
+    public int setend;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "fp", "mem", "setend");
+    }
+  }
+
+  public static class OpShift extends Structure {
+    public int type;
+    public int value;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type","value");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int vector_index;
+    public OpShift shift;
+    public int type;
+    public OpValue value;
+    public boolean subtracted;
+    public byte access;
+    public byte neon_lane;
+
+    public void read() {
+      readField("vector_index");
+      readField("type");
+      if (type == ARM_OP_MEM)
+        value.setType(MemType.class);
+      if (type == ARM_OP_FP)
+        value.setType(Double.TYPE);
+      if (type == ARM_OP_PIMM || type == ARM_OP_IMM || type == ARM_OP_CIMM)
+        value.setType(Integer.TYPE);
+      if (type == ARM_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == ARM_OP_INVALID)
+        return;
+      readField("value");
+      readField("shift");
+      readField("subtracted");
+      readField("access");
+      readField("neon_lane");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("vector_index", "shift", "type", "value", "subtracted", "access", "neon_lane");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public boolean usermode;
+    public int vector_size;
+    public int vector_data;
+    public int cps_mode;
+    public int cps_flag;
+    public int cc;
+    public byte update_flags;
+    public byte writeback;
+    public int mem_barrier;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[36];
+    }
+
+    public void read() {
+      readField("usermode");
+      readField("vector_size");
+      readField("vector_data");
+      readField("cps_mode");
+      readField("cps_flag");
+      readField("cc");
+      readField("update_flags");
+      readField("writeback");
+      readField("mem_barrier");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("usermode", "vector_size", "vector_data",
+          "cps_mode", "cps_flag", "cc", "update_flags", "writeback", "mem_barrier", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public boolean usermode;
+    public int vectorSize;
+    public int vectorData;
+    public int cpsMode;
+    public int cpsFlag;
+    public int cc;
+    public boolean updateFlags;
+    public boolean writeback;
+    public int memBarrier;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      usermode = op_info.usermode;
+      vectorSize = op_info.vector_size;
+      vectorData = op_info.vector_data;
+      cpsMode = op_info.cps_mode;
+      cpsFlag = op_info.cps_flag;
+      cc = op_info.cc;
+      updateFlags = (op_info.update_flags > 0);
+      writeback = (op_info.writeback > 0);
+      memBarrier = op_info.mem_barrier;
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Arm64.java b/capstone/bindings/java/capstone/Arm64.java
new file mode 100644
index 000000000..fdc1f2bc5
--- /dev/null
+++ b/capstone/bindings/java/capstone/Arm64.java
@@ -0,0 +1,125 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Arm64_const.*;
+
+public class Arm64 {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int index;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public double fp;
+    public MemType mem;
+    public int pstate;
+    public int sys;
+    public int prefetch;
+    public int barrier;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "fp", "mem", "pstate", "sys", "prefetch", "barrier");
+    }
+  }
+
+  public static class OpShift extends Structure {
+    public int type;
+    public int value;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type","value");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int vector_index;
+    public int vas;
+    public OpShift shift;
+    public int ext;
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == ARM64_OP_MEM)
+        value.setType(MemType.class);
+      if (type == ARM64_OP_FP)
+        value.setType(Double.TYPE);
+      if (type == ARM64_OP_IMM || type == ARM64_OP_CIMM || type == ARM64_OP_REG || type == ARM64_OP_REG_MRS || type == ARM64_OP_REG_MSR || type == ARM64_OP_PSTATE || type == ARM64_OP_SYS || type == ARM64_OP_PREFETCH || type == ARM64_OP_BARRIER)
+        value.setType(Integer.TYPE);
+      if (type == ARM64_OP_INVALID)
+        return;
+      readField("value");
+      readField("ext");
+      readField("shift");
+      readField("vas");
+      readField("vector_index");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("vector_index", "vas", "shift", "ext", "type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public byte _update_flags;
+    public byte _writeback;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("_update_flags");
+      readField("_writeback");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "_update_flags", "_writeback", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+    public boolean updateFlags;
+    public boolean writeback;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      updateFlags = (op_info._update_flags > 0);
+      writeback = (op_info._writeback > 0);
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Arm64_const.java b/capstone/bindings/java/capstone/Arm64_const.java
new file mode 100644
index 000000000..6c07e6058
--- /dev/null
+++ b/capstone/bindings/java/capstone/Arm64_const.java
@@ -0,0 +1,2253 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Arm64_const {
+
+	public static final int ARM64_SFT_INVALID = 0;
+	public static final int ARM64_SFT_LSL = 1;
+	public static final int ARM64_SFT_MSL = 2;
+	public static final int ARM64_SFT_LSR = 3;
+	public static final int ARM64_SFT_ASR = 4;
+	public static final int ARM64_SFT_ROR = 5;
+
+	public static final int ARM64_EXT_INVALID = 0;
+	public static final int ARM64_EXT_UXTB = 1;
+	public static final int ARM64_EXT_UXTH = 2;
+	public static final int ARM64_EXT_UXTW = 3;
+	public static final int ARM64_EXT_UXTX = 4;
+	public static final int ARM64_EXT_SXTB = 5;
+	public static final int ARM64_EXT_SXTH = 6;
+	public static final int ARM64_EXT_SXTW = 7;
+	public static final int ARM64_EXT_SXTX = 8;
+
+	public static final int ARM64_CC_INVALID = 0;
+	public static final int ARM64_CC_EQ = 1;
+	public static final int ARM64_CC_NE = 2;
+	public static final int ARM64_CC_HS = 3;
+	public static final int ARM64_CC_LO = 4;
+	public static final int ARM64_CC_MI = 5;
+	public static final int ARM64_CC_PL = 6;
+	public static final int ARM64_CC_VS = 7;
+	public static final int ARM64_CC_VC = 8;
+	public static final int ARM64_CC_HI = 9;
+	public static final int ARM64_CC_LS = 10;
+	public static final int ARM64_CC_GE = 11;
+	public static final int ARM64_CC_LT = 12;
+	public static final int ARM64_CC_GT = 13;
+	public static final int ARM64_CC_LE = 14;
+	public static final int ARM64_CC_AL = 15;
+	public static final int ARM64_CC_NV = 16;
+
+	public static final int ARM64_SYSREG_INVALID = 0;
+	public static final int ARM64_SYSREG_MDCCSR_EL0 = 0x9808;
+	public static final int ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828;
+	public static final int ARM64_SYSREG_MDRAR_EL1 = 0x8080;
+	public static final int ARM64_SYSREG_OSLSR_EL1 = 0x808C;
+	public static final int ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83F6;
+	public static final int ARM64_SYSREG_PMCEID0_EL0 = 0xDCE6;
+	public static final int ARM64_SYSREG_PMCEID1_EL0 = 0xDCE7;
+	public static final int ARM64_SYSREG_MIDR_EL1 = 0xC000;
+	public static final int ARM64_SYSREG_CCSIDR_EL1 = 0xC800;
+	public static final int ARM64_SYSREG_CCSIDR2_EL1 = 0xC802;
+	public static final int ARM64_SYSREG_CLIDR_EL1 = 0xC801;
+	public static final int ARM64_SYSREG_CTR_EL0 = 0xD801;
+	public static final int ARM64_SYSREG_MPIDR_EL1 = 0xC005;
+	public static final int ARM64_SYSREG_REVIDR_EL1 = 0xC006;
+	public static final int ARM64_SYSREG_AIDR_EL1 = 0xC807;
+	public static final int ARM64_SYSREG_DCZID_EL0 = 0xD807;
+	public static final int ARM64_SYSREG_ID_PFR0_EL1 = 0xC008;
+	public static final int ARM64_SYSREG_ID_PFR1_EL1 = 0xC009;
+	public static final int ARM64_SYSREG_ID_DFR0_EL1 = 0xC00A;
+	public static final int ARM64_SYSREG_ID_AFR0_EL1 = 0xC00B;
+	public static final int ARM64_SYSREG_ID_MMFR0_EL1 = 0xC00C;
+	public static final int ARM64_SYSREG_ID_MMFR1_EL1 = 0xC00D;
+	public static final int ARM64_SYSREG_ID_MMFR2_EL1 = 0xC00E;
+	public static final int ARM64_SYSREG_ID_MMFR3_EL1 = 0xC00F;
+	public static final int ARM64_SYSREG_ID_ISAR0_EL1 = 0xC010;
+	public static final int ARM64_SYSREG_ID_ISAR1_EL1 = 0xC011;
+	public static final int ARM64_SYSREG_ID_ISAR2_EL1 = 0xC012;
+	public static final int ARM64_SYSREG_ID_ISAR3_EL1 = 0xC013;
+	public static final int ARM64_SYSREG_ID_ISAR4_EL1 = 0xC014;
+	public static final int ARM64_SYSREG_ID_ISAR5_EL1 = 0xC015;
+	public static final int ARM64_SYSREG_ID_ISAR6_EL1 = 0xC017;
+	public static final int ARM64_SYSREG_ID_AA64PFR0_EL1 = 0xC020;
+	public static final int ARM64_SYSREG_ID_AA64PFR1_EL1 = 0xC021;
+	public static final int ARM64_SYSREG_ID_AA64DFR0_EL1 = 0xC028;
+	public static final int ARM64_SYSREG_ID_AA64DFR1_EL1 = 0xC029;
+	public static final int ARM64_SYSREG_ID_AA64AFR0_EL1 = 0xC02C;
+	public static final int ARM64_SYSREG_ID_AA64AFR1_EL1 = 0xC02D;
+	public static final int ARM64_SYSREG_ID_AA64ISAR0_EL1 = 0xC030;
+	public static final int ARM64_SYSREG_ID_AA64ISAR1_EL1 = 0xC031;
+	public static final int ARM64_SYSREG_ID_AA64MMFR0_EL1 = 0xC038;
+	public static final int ARM64_SYSREG_ID_AA64MMFR1_EL1 = 0xC039;
+	public static final int ARM64_SYSREG_ID_AA64MMFR2_EL1 = 0xC03A;
+	public static final int ARM64_SYSREG_MVFR0_EL1 = 0xC018;
+	public static final int ARM64_SYSREG_MVFR1_EL1 = 0xC019;
+	public static final int ARM64_SYSREG_MVFR2_EL1 = 0xC01A;
+	public static final int ARM64_SYSREG_RVBAR_EL1 = 0xC601;
+	public static final int ARM64_SYSREG_RVBAR_EL2 = 0xE601;
+	public static final int ARM64_SYSREG_RVBAR_EL3 = 0xF601;
+	public static final int ARM64_SYSREG_ISR_EL1 = 0xC608;
+	public static final int ARM64_SYSREG_CNTPCT_EL0 = 0xDF01;
+	public static final int ARM64_SYSREG_CNTVCT_EL0 = 0xDF02;
+	public static final int ARM64_SYSREG_ID_MMFR4_EL1 = 0xC016;
+	public static final int ARM64_SYSREG_TRCSTATR = 0x8818;
+	public static final int ARM64_SYSREG_TRCIDR8 = 0x8806;
+	public static final int ARM64_SYSREG_TRCIDR9 = 0x880E;
+	public static final int ARM64_SYSREG_TRCIDR10 = 0x8816;
+	public static final int ARM64_SYSREG_TRCIDR11 = 0x881E;
+	public static final int ARM64_SYSREG_TRCIDR12 = 0x8826;
+	public static final int ARM64_SYSREG_TRCIDR13 = 0x882E;
+	public static final int ARM64_SYSREG_TRCIDR0 = 0x8847;
+	public static final int ARM64_SYSREG_TRCIDR1 = 0x884F;
+	public static final int ARM64_SYSREG_TRCIDR2 = 0x8857;
+	public static final int ARM64_SYSREG_TRCIDR3 = 0x885F;
+	public static final int ARM64_SYSREG_TRCIDR4 = 0x8867;
+	public static final int ARM64_SYSREG_TRCIDR5 = 0x886F;
+	public static final int ARM64_SYSREG_TRCIDR6 = 0x8877;
+	public static final int ARM64_SYSREG_TRCIDR7 = 0x887F;
+	public static final int ARM64_SYSREG_TRCOSLSR = 0x888C;
+	public static final int ARM64_SYSREG_TRCPDSR = 0x88AC;
+	public static final int ARM64_SYSREG_TRCDEVAFF0 = 0x8BD6;
+	public static final int ARM64_SYSREG_TRCDEVAFF1 = 0x8BDE;
+	public static final int ARM64_SYSREG_TRCLSR = 0x8BEE;
+	public static final int ARM64_SYSREG_TRCAUTHSTATUS = 0x8BF6;
+	public static final int ARM64_SYSREG_TRCDEVARCH = 0x8BFE;
+	public static final int ARM64_SYSREG_TRCDEVID = 0x8B97;
+	public static final int ARM64_SYSREG_TRCDEVTYPE = 0x8B9F;
+	public static final int ARM64_SYSREG_TRCPIDR4 = 0x8BA7;
+	public static final int ARM64_SYSREG_TRCPIDR5 = 0x8BAF;
+	public static final int ARM64_SYSREG_TRCPIDR6 = 0x8BB7;
+	public static final int ARM64_SYSREG_TRCPIDR7 = 0x8BBF;
+	public static final int ARM64_SYSREG_TRCPIDR0 = 0x8BC7;
+	public static final int ARM64_SYSREG_TRCPIDR1 = 0x8BCF;
+	public static final int ARM64_SYSREG_TRCPIDR2 = 0x8BD7;
+	public static final int ARM64_SYSREG_TRCPIDR3 = 0x8BDF;
+	public static final int ARM64_SYSREG_TRCCIDR0 = 0x8BE7;
+	public static final int ARM64_SYSREG_TRCCIDR1 = 0x8BEF;
+	public static final int ARM64_SYSREG_TRCCIDR2 = 0x8BF7;
+	public static final int ARM64_SYSREG_TRCCIDR3 = 0x8BFF;
+	public static final int ARM64_SYSREG_ICC_IAR1_EL1 = 0xC660;
+	public static final int ARM64_SYSREG_ICC_IAR0_EL1 = 0xC640;
+	public static final int ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xC662;
+	public static final int ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xC642;
+	public static final int ARM64_SYSREG_ICC_RPR_EL1 = 0xC65B;
+	public static final int ARM64_SYSREG_ICH_VTR_EL2 = 0xE659;
+	public static final int ARM64_SYSREG_ICH_EISR_EL2 = 0xE65B;
+	public static final int ARM64_SYSREG_ICH_ELRSR_EL2 = 0xE65D;
+	public static final int ARM64_SYSREG_ID_AA64ZFR0_EL1 = 0xC024;
+	public static final int ARM64_SYSREG_LORID_EL1 = 0xC527;
+	public static final int ARM64_SYSREG_ERRIDR_EL1 = 0xC298;
+	public static final int ARM64_SYSREG_ERXFR_EL1 = 0xC2A0;
+	public static final int ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828;
+	public static final int ARM64_SYSREG_OSLAR_EL1 = 0x8084;
+	public static final int ARM64_SYSREG_PMSWINC_EL0 = 0xDCE4;
+	public static final int ARM64_SYSREG_TRCOSLAR = 0x8884;
+	public static final int ARM64_SYSREG_TRCLAR = 0x8BE6;
+	public static final int ARM64_SYSREG_ICC_EOIR1_EL1 = 0xC661;
+	public static final int ARM64_SYSREG_ICC_EOIR0_EL1 = 0xC641;
+	public static final int ARM64_SYSREG_ICC_DIR_EL1 = 0xC659;
+	public static final int ARM64_SYSREG_ICC_SGI1R_EL1 = 0xC65D;
+	public static final int ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xC65E;
+	public static final int ARM64_SYSREG_ICC_SGI0R_EL1 = 0xC65F;
+	public static final int ARM64_SYSREG_OSDTRRX_EL1 = 0x8002;
+	public static final int ARM64_SYSREG_OSDTRTX_EL1 = 0x801A;
+	public static final int ARM64_SYSREG_TEECR32_EL1 = 0x9000;
+	public static final int ARM64_SYSREG_MDCCINT_EL1 = 0x8010;
+	public static final int ARM64_SYSREG_MDSCR_EL1 = 0x8012;
+	public static final int ARM64_SYSREG_DBGDTR_EL0 = 0x9820;
+	public static final int ARM64_SYSREG_OSECCR_EL1 = 0x8032;
+	public static final int ARM64_SYSREG_DBGVCR32_EL2 = 0xA038;
+	public static final int ARM64_SYSREG_DBGBVR0_EL1 = 0x8004;
+	public static final int ARM64_SYSREG_DBGBVR1_EL1 = 0x800C;
+	public static final int ARM64_SYSREG_DBGBVR2_EL1 = 0x8014;
+	public static final int ARM64_SYSREG_DBGBVR3_EL1 = 0x801C;
+	public static final int ARM64_SYSREG_DBGBVR4_EL1 = 0x8024;
+	public static final int ARM64_SYSREG_DBGBVR5_EL1 = 0x802C;
+	public static final int ARM64_SYSREG_DBGBVR6_EL1 = 0x8034;
+	public static final int ARM64_SYSREG_DBGBVR7_EL1 = 0x803C;
+	public static final int ARM64_SYSREG_DBGBVR8_EL1 = 0x8044;
+	public static final int ARM64_SYSREG_DBGBVR9_EL1 = 0x804C;
+	public static final int ARM64_SYSREG_DBGBVR10_EL1 = 0x8054;
+	public static final int ARM64_SYSREG_DBGBVR11_EL1 = 0x805C;
+	public static final int ARM64_SYSREG_DBGBVR12_EL1 = 0x8064;
+	public static final int ARM64_SYSREG_DBGBVR13_EL1 = 0x806C;
+	public static final int ARM64_SYSREG_DBGBVR14_EL1 = 0x8074;
+	public static final int ARM64_SYSREG_DBGBVR15_EL1 = 0x807C;
+	public static final int ARM64_SYSREG_DBGBCR0_EL1 = 0x8005;
+	public static final int ARM64_SYSREG_DBGBCR1_EL1 = 0x800D;
+	public static final int ARM64_SYSREG_DBGBCR2_EL1 = 0x8015;
+	public static final int ARM64_SYSREG_DBGBCR3_EL1 = 0x801D;
+	public static final int ARM64_SYSREG_DBGBCR4_EL1 = 0x8025;
+	public static final int ARM64_SYSREG_DBGBCR5_EL1 = 0x802D;
+	public static final int ARM64_SYSREG_DBGBCR6_EL1 = 0x8035;
+	public static final int ARM64_SYSREG_DBGBCR7_EL1 = 0x803D;
+	public static final int ARM64_SYSREG_DBGBCR8_EL1 = 0x8045;
+	public static final int ARM64_SYSREG_DBGBCR9_EL1 = 0x804D;
+	public static final int ARM64_SYSREG_DBGBCR10_EL1 = 0x8055;
+	public static final int ARM64_SYSREG_DBGBCR11_EL1 = 0x805D;
+	public static final int ARM64_SYSREG_DBGBCR12_EL1 = 0x8065;
+	public static final int ARM64_SYSREG_DBGBCR13_EL1 = 0x806D;
+	public static final int ARM64_SYSREG_DBGBCR14_EL1 = 0x8075;
+	public static final int ARM64_SYSREG_DBGBCR15_EL1 = 0x807D;
+	public static final int ARM64_SYSREG_DBGWVR0_EL1 = 0x8006;
+	public static final int ARM64_SYSREG_DBGWVR1_EL1 = 0x800E;
+	public static final int ARM64_SYSREG_DBGWVR2_EL1 = 0x8016;
+	public static final int ARM64_SYSREG_DBGWVR3_EL1 = 0x801E;
+	public static final int ARM64_SYSREG_DBGWVR4_EL1 = 0x8026;
+	public static final int ARM64_SYSREG_DBGWVR5_EL1 = 0x802E;
+	public static final int ARM64_SYSREG_DBGWVR6_EL1 = 0x8036;
+	public static final int ARM64_SYSREG_DBGWVR7_EL1 = 0x803E;
+	public static final int ARM64_SYSREG_DBGWVR8_EL1 = 0x8046;
+	public static final int ARM64_SYSREG_DBGWVR9_EL1 = 0x804E;
+	public static final int ARM64_SYSREG_DBGWVR10_EL1 = 0x8056;
+	public static final int ARM64_SYSREG_DBGWVR11_EL1 = 0x805E;
+	public static final int ARM64_SYSREG_DBGWVR12_EL1 = 0x8066;
+	public static final int ARM64_SYSREG_DBGWVR13_EL1 = 0x806E;
+	public static final int ARM64_SYSREG_DBGWVR14_EL1 = 0x8076;
+	public static final int ARM64_SYSREG_DBGWVR15_EL1 = 0x807E;
+	public static final int ARM64_SYSREG_DBGWCR0_EL1 = 0x8007;
+	public static final int ARM64_SYSREG_DBGWCR1_EL1 = 0x800F;
+	public static final int ARM64_SYSREG_DBGWCR2_EL1 = 0x8017;
+	public static final int ARM64_SYSREG_DBGWCR3_EL1 = 0x801F;
+	public static final int ARM64_SYSREG_DBGWCR4_EL1 = 0x8027;
+	public static final int ARM64_SYSREG_DBGWCR5_EL1 = 0x802F;
+	public static final int ARM64_SYSREG_DBGWCR6_EL1 = 0x8037;
+	public static final int ARM64_SYSREG_DBGWCR7_EL1 = 0x803F;
+	public static final int ARM64_SYSREG_DBGWCR8_EL1 = 0x8047;
+	public static final int ARM64_SYSREG_DBGWCR9_EL1 = 0x804F;
+	public static final int ARM64_SYSREG_DBGWCR10_EL1 = 0x8057;
+	public static final int ARM64_SYSREG_DBGWCR11_EL1 = 0x805F;
+	public static final int ARM64_SYSREG_DBGWCR12_EL1 = 0x8067;
+	public static final int ARM64_SYSREG_DBGWCR13_EL1 = 0x806F;
+	public static final int ARM64_SYSREG_DBGWCR14_EL1 = 0x8077;
+	public static final int ARM64_SYSREG_DBGWCR15_EL1 = 0x807F;
+	public static final int ARM64_SYSREG_TEEHBR32_EL1 = 0x9080;
+	public static final int ARM64_SYSREG_OSDLR_EL1 = 0x809C;
+	public static final int ARM64_SYSREG_DBGPRCR_EL1 = 0x80A4;
+	public static final int ARM64_SYSREG_DBGCLAIMSET_EL1 = 0x83C6;
+	public static final int ARM64_SYSREG_DBGCLAIMCLR_EL1 = 0x83CE;
+	public static final int ARM64_SYSREG_CSSELR_EL1 = 0xD000;
+	public static final int ARM64_SYSREG_VPIDR_EL2 = 0xE000;
+	public static final int ARM64_SYSREG_VMPIDR_EL2 = 0xE005;
+	public static final int ARM64_SYSREG_CPACR_EL1 = 0xC082;
+	public static final int ARM64_SYSREG_SCTLR_EL1 = 0xC080;
+	public static final int ARM64_SYSREG_SCTLR_EL2 = 0xE080;
+	public static final int ARM64_SYSREG_SCTLR_EL3 = 0xF080;
+	public static final int ARM64_SYSREG_ACTLR_EL1 = 0xC081;
+	public static final int ARM64_SYSREG_ACTLR_EL2 = 0xE081;
+	public static final int ARM64_SYSREG_ACTLR_EL3 = 0xF081;
+	public static final int ARM64_SYSREG_HCR_EL2 = 0xE088;
+	public static final int ARM64_SYSREG_SCR_EL3 = 0xF088;
+	public static final int ARM64_SYSREG_MDCR_EL2 = 0xE089;
+	public static final int ARM64_SYSREG_SDER32_EL3 = 0xF089;
+	public static final int ARM64_SYSREG_CPTR_EL2 = 0xE08A;
+	public static final int ARM64_SYSREG_CPTR_EL3 = 0xF08A;
+	public static final int ARM64_SYSREG_HSTR_EL2 = 0xE08B;
+	public static final int ARM64_SYSREG_HACR_EL2 = 0xE08F;
+	public static final int ARM64_SYSREG_MDCR_EL3 = 0xF099;
+	public static final int ARM64_SYSREG_TTBR0_EL1 = 0xC100;
+	public static final int ARM64_SYSREG_TTBR0_EL2 = 0xE100;
+	public static final int ARM64_SYSREG_TTBR0_EL3 = 0xF100;
+	public static final int ARM64_SYSREG_TTBR1_EL1 = 0xC101;
+	public static final int ARM64_SYSREG_TCR_EL1 = 0xC102;
+	public static final int ARM64_SYSREG_TCR_EL2 = 0xE102;
+	public static final int ARM64_SYSREG_TCR_EL3 = 0xF102;
+	public static final int ARM64_SYSREG_VTTBR_EL2 = 0xE108;
+	public static final int ARM64_SYSREG_VTCR_EL2 = 0xE10A;
+	public static final int ARM64_SYSREG_DACR32_EL2 = 0xE180;
+	public static final int ARM64_SYSREG_SPSR_EL1 = 0xC200;
+	public static final int ARM64_SYSREG_SPSR_EL2 = 0xE200;
+	public static final int ARM64_SYSREG_SPSR_EL3 = 0xF200;
+	public static final int ARM64_SYSREG_ELR_EL1 = 0xC201;
+	public static final int ARM64_SYSREG_ELR_EL2 = 0xE201;
+	public static final int ARM64_SYSREG_ELR_EL3 = 0xF201;
+	public static final int ARM64_SYSREG_SP_EL0 = 0xC208;
+	public static final int ARM64_SYSREG_SP_EL1 = 0xE208;
+	public static final int ARM64_SYSREG_SP_EL2 = 0xF208;
+	public static final int ARM64_SYSREG_SPSEL = 0xC210;
+	public static final int ARM64_SYSREG_NZCV = 0xDA10;
+	public static final int ARM64_SYSREG_DAIF = 0xDA11;
+	public static final int ARM64_SYSREG_CURRENTEL = 0xC212;
+	public static final int ARM64_SYSREG_SPSR_IRQ = 0xE218;
+	public static final int ARM64_SYSREG_SPSR_ABT = 0xE219;
+	public static final int ARM64_SYSREG_SPSR_UND = 0xE21A;
+	public static final int ARM64_SYSREG_SPSR_FIQ = 0xE21B;
+	public static final int ARM64_SYSREG_FPCR = 0xDA20;
+	public static final int ARM64_SYSREG_FPSR = 0xDA21;
+	public static final int ARM64_SYSREG_DSPSR_EL0 = 0xDA28;
+	public static final int ARM64_SYSREG_DLR_EL0 = 0xDA29;
+	public static final int ARM64_SYSREG_IFSR32_EL2 = 0xE281;
+	public static final int ARM64_SYSREG_AFSR0_EL1 = 0xC288;
+	public static final int ARM64_SYSREG_AFSR0_EL2 = 0xE288;
+	public static final int ARM64_SYSREG_AFSR0_EL3 = 0xF288;
+	public static final int ARM64_SYSREG_AFSR1_EL1 = 0xC289;
+	public static final int ARM64_SYSREG_AFSR1_EL2 = 0xE289;
+	public static final int ARM64_SYSREG_AFSR1_EL3 = 0xF289;
+	public static final int ARM64_SYSREG_ESR_EL1 = 0xC290;
+	public static final int ARM64_SYSREG_ESR_EL2 = 0xE290;
+	public static final int ARM64_SYSREG_ESR_EL3 = 0xF290;
+	public static final int ARM64_SYSREG_FPEXC32_EL2 = 0xE298;
+	public static final int ARM64_SYSREG_FAR_EL1 = 0xC300;
+	public static final int ARM64_SYSREG_FAR_EL2 = 0xE300;
+	public static final int ARM64_SYSREG_FAR_EL3 = 0xF300;
+	public static final int ARM64_SYSREG_HPFAR_EL2 = 0xE304;
+	public static final int ARM64_SYSREG_PAR_EL1 = 0xC3A0;
+	public static final int ARM64_SYSREG_PMCR_EL0 = 0xDCE0;
+	public static final int ARM64_SYSREG_PMCNTENSET_EL0 = 0xDCE1;
+	public static final int ARM64_SYSREG_PMCNTENCLR_EL0 = 0xDCE2;
+	public static final int ARM64_SYSREG_PMOVSCLR_EL0 = 0xDCE3;
+	public static final int ARM64_SYSREG_PMSELR_EL0 = 0xDCE5;
+	public static final int ARM64_SYSREG_PMCCNTR_EL0 = 0xDCE8;
+	public static final int ARM64_SYSREG_PMXEVTYPER_EL0 = 0xDCE9;
+	public static final int ARM64_SYSREG_PMXEVCNTR_EL0 = 0xDCEA;
+	public static final int ARM64_SYSREG_PMUSERENR_EL0 = 0xDCF0;
+	public static final int ARM64_SYSREG_PMINTENSET_EL1 = 0xC4F1;
+	public static final int ARM64_SYSREG_PMINTENCLR_EL1 = 0xC4F2;
+	public static final int ARM64_SYSREG_PMOVSSET_EL0 = 0xDCF3;
+	public static final int ARM64_SYSREG_MAIR_EL1 = 0xC510;
+	public static final int ARM64_SYSREG_MAIR_EL2 = 0xE510;
+	public static final int ARM64_SYSREG_MAIR_EL3 = 0xF510;
+	public static final int ARM64_SYSREG_AMAIR_EL1 = 0xC518;
+	public static final int ARM64_SYSREG_AMAIR_EL2 = 0xE518;
+	public static final int ARM64_SYSREG_AMAIR_EL3 = 0xF518;
+	public static final int ARM64_SYSREG_VBAR_EL1 = 0xC600;
+	public static final int ARM64_SYSREG_VBAR_EL2 = 0xE600;
+	public static final int ARM64_SYSREG_VBAR_EL3 = 0xF600;
+	public static final int ARM64_SYSREG_RMR_EL1 = 0xC602;
+	public static final int ARM64_SYSREG_RMR_EL2 = 0xE602;
+	public static final int ARM64_SYSREG_RMR_EL3 = 0xF602;
+	public static final int ARM64_SYSREG_CONTEXTIDR_EL1 = 0xC681;
+	public static final int ARM64_SYSREG_TPIDR_EL0 = 0xDE82;
+	public static final int ARM64_SYSREG_TPIDR_EL2 = 0xE682;
+	public static final int ARM64_SYSREG_TPIDR_EL3 = 0xF682;
+	public static final int ARM64_SYSREG_TPIDRRO_EL0 = 0xDE83;
+	public static final int ARM64_SYSREG_TPIDR_EL1 = 0xC684;
+	public static final int ARM64_SYSREG_CNTFRQ_EL0 = 0xDF00;
+	public static final int ARM64_SYSREG_CNTVOFF_EL2 = 0xE703;
+	public static final int ARM64_SYSREG_CNTKCTL_EL1 = 0xC708;
+	public static final int ARM64_SYSREG_CNTHCTL_EL2 = 0xE708;
+	public static final int ARM64_SYSREG_CNTP_TVAL_EL0 = 0xDF10;
+	public static final int ARM64_SYSREG_CNTHP_TVAL_EL2 = 0xE710;
+	public static final int ARM64_SYSREG_CNTPS_TVAL_EL1 = 0xFF10;
+	public static final int ARM64_SYSREG_CNTP_CTL_EL0 = 0xDF11;
+	public static final int ARM64_SYSREG_CNTHP_CTL_EL2 = 0xE711;
+	public static final int ARM64_SYSREG_CNTPS_CTL_EL1 = 0xFF11;
+	public static final int ARM64_SYSREG_CNTP_CVAL_EL0 = 0xDF12;
+	public static final int ARM64_SYSREG_CNTHP_CVAL_EL2 = 0xE712;
+	public static final int ARM64_SYSREG_CNTPS_CVAL_EL1 = 0xFF12;
+	public static final int ARM64_SYSREG_CNTV_TVAL_EL0 = 0xDF18;
+	public static final int ARM64_SYSREG_CNTV_CTL_EL0 = 0xDF19;
+	public static final int ARM64_SYSREG_CNTV_CVAL_EL0 = 0xDF1A;
+	public static final int ARM64_SYSREG_PMEVCNTR0_EL0 = 0xDF40;
+	public static final int ARM64_SYSREG_PMEVCNTR1_EL0 = 0xDF41;
+	public static final int ARM64_SYSREG_PMEVCNTR2_EL0 = 0xDF42;
+	public static final int ARM64_SYSREG_PMEVCNTR3_EL0 = 0xDF43;
+	public static final int ARM64_SYSREG_PMEVCNTR4_EL0 = 0xDF44;
+	public static final int ARM64_SYSREG_PMEVCNTR5_EL0 = 0xDF45;
+	public static final int ARM64_SYSREG_PMEVCNTR6_EL0 = 0xDF46;
+	public static final int ARM64_SYSREG_PMEVCNTR7_EL0 = 0xDF47;
+	public static final int ARM64_SYSREG_PMEVCNTR8_EL0 = 0xDF48;
+	public static final int ARM64_SYSREG_PMEVCNTR9_EL0 = 0xDF49;
+	public static final int ARM64_SYSREG_PMEVCNTR10_EL0 = 0xDF4A;
+	public static final int ARM64_SYSREG_PMEVCNTR11_EL0 = 0xDF4B;
+	public static final int ARM64_SYSREG_PMEVCNTR12_EL0 = 0xDF4C;
+	public static final int ARM64_SYSREG_PMEVCNTR13_EL0 = 0xDF4D;
+	public static final int ARM64_SYSREG_PMEVCNTR14_EL0 = 0xDF4E;
+	public static final int ARM64_SYSREG_PMEVCNTR15_EL0 = 0xDF4F;
+	public static final int ARM64_SYSREG_PMEVCNTR16_EL0 = 0xDF50;
+	public static final int ARM64_SYSREG_PMEVCNTR17_EL0 = 0xDF51;
+	public static final int ARM64_SYSREG_PMEVCNTR18_EL0 = 0xDF52;
+	public static final int ARM64_SYSREG_PMEVCNTR19_EL0 = 0xDF53;
+	public static final int ARM64_SYSREG_PMEVCNTR20_EL0 = 0xDF54;
+	public static final int ARM64_SYSREG_PMEVCNTR21_EL0 = 0xDF55;
+	public static final int ARM64_SYSREG_PMEVCNTR22_EL0 = 0xDF56;
+	public static final int ARM64_SYSREG_PMEVCNTR23_EL0 = 0xDF57;
+	public static final int ARM64_SYSREG_PMEVCNTR24_EL0 = 0xDF58;
+	public static final int ARM64_SYSREG_PMEVCNTR25_EL0 = 0xDF59;
+	public static final int ARM64_SYSREG_PMEVCNTR26_EL0 = 0xDF5A;
+	public static final int ARM64_SYSREG_PMEVCNTR27_EL0 = 0xDF5B;
+	public static final int ARM64_SYSREG_PMEVCNTR28_EL0 = 0xDF5C;
+	public static final int ARM64_SYSREG_PMEVCNTR29_EL0 = 0xDF5D;
+	public static final int ARM64_SYSREG_PMEVCNTR30_EL0 = 0xDF5E;
+	public static final int ARM64_SYSREG_PMCCFILTR_EL0 = 0xDF7F;
+	public static final int ARM64_SYSREG_PMEVTYPER0_EL0 = 0xDF60;
+	public static final int ARM64_SYSREG_PMEVTYPER1_EL0 = 0xDF61;
+	public static final int ARM64_SYSREG_PMEVTYPER2_EL0 = 0xDF62;
+	public static final int ARM64_SYSREG_PMEVTYPER3_EL0 = 0xDF63;
+	public static final int ARM64_SYSREG_PMEVTYPER4_EL0 = 0xDF64;
+	public static final int ARM64_SYSREG_PMEVTYPER5_EL0 = 0xDF65;
+	public static final int ARM64_SYSREG_PMEVTYPER6_EL0 = 0xDF66;
+	public static final int ARM64_SYSREG_PMEVTYPER7_EL0 = 0xDF67;
+	public static final int ARM64_SYSREG_PMEVTYPER8_EL0 = 0xDF68;
+	public static final int ARM64_SYSREG_PMEVTYPER9_EL0 = 0xDF69;
+	public static final int ARM64_SYSREG_PMEVTYPER10_EL0 = 0xDF6A;
+	public static final int ARM64_SYSREG_PMEVTYPER11_EL0 = 0xDF6B;
+	public static final int ARM64_SYSREG_PMEVTYPER12_EL0 = 0xDF6C;
+	public static final int ARM64_SYSREG_PMEVTYPER13_EL0 = 0xDF6D;
+	public static final int ARM64_SYSREG_PMEVTYPER14_EL0 = 0xDF6E;
+	public static final int ARM64_SYSREG_PMEVTYPER15_EL0 = 0xDF6F;
+	public static final int ARM64_SYSREG_PMEVTYPER16_EL0 = 0xDF70;
+	public static final int ARM64_SYSREG_PMEVTYPER17_EL0 = 0xDF71;
+	public static final int ARM64_SYSREG_PMEVTYPER18_EL0 = 0xDF72;
+	public static final int ARM64_SYSREG_PMEVTYPER19_EL0 = 0xDF73;
+	public static final int ARM64_SYSREG_PMEVTYPER20_EL0 = 0xDF74;
+	public static final int ARM64_SYSREG_PMEVTYPER21_EL0 = 0xDF75;
+	public static final int ARM64_SYSREG_PMEVTYPER22_EL0 = 0xDF76;
+	public static final int ARM64_SYSREG_PMEVTYPER23_EL0 = 0xDF77;
+	public static final int ARM64_SYSREG_PMEVTYPER24_EL0 = 0xDF78;
+	public static final int ARM64_SYSREG_PMEVTYPER25_EL0 = 0xDF79;
+	public static final int ARM64_SYSREG_PMEVTYPER26_EL0 = 0xDF7A;
+	public static final int ARM64_SYSREG_PMEVTYPER27_EL0 = 0xDF7B;
+	public static final int ARM64_SYSREG_PMEVTYPER28_EL0 = 0xDF7C;
+	public static final int ARM64_SYSREG_PMEVTYPER29_EL0 = 0xDF7D;
+	public static final int ARM64_SYSREG_PMEVTYPER30_EL0 = 0xDF7E;
+	public static final int ARM64_SYSREG_TRCPRGCTLR = 0x8808;
+	public static final int ARM64_SYSREG_TRCPROCSELR = 0x8810;
+	public static final int ARM64_SYSREG_TRCCONFIGR = 0x8820;
+	public static final int ARM64_SYSREG_TRCAUXCTLR = 0x8830;
+	public static final int ARM64_SYSREG_TRCEVENTCTL0R = 0x8840;
+	public static final int ARM64_SYSREG_TRCEVENTCTL1R = 0x8848;
+	public static final int ARM64_SYSREG_TRCSTALLCTLR = 0x8858;
+	public static final int ARM64_SYSREG_TRCTSCTLR = 0x8860;
+	public static final int ARM64_SYSREG_TRCSYNCPR = 0x8868;
+	public static final int ARM64_SYSREG_TRCCCCTLR = 0x8870;
+	public static final int ARM64_SYSREG_TRCBBCTLR = 0x8878;
+	public static final int ARM64_SYSREG_TRCTRACEIDR = 0x8801;
+	public static final int ARM64_SYSREG_TRCQCTLR = 0x8809;
+	public static final int ARM64_SYSREG_TRCVICTLR = 0x8802;
+	public static final int ARM64_SYSREG_TRCVIIECTLR = 0x880A;
+	public static final int ARM64_SYSREG_TRCVISSCTLR = 0x8812;
+	public static final int ARM64_SYSREG_TRCVIPCSSCTLR = 0x881A;
+	public static final int ARM64_SYSREG_TRCVDCTLR = 0x8842;
+	public static final int ARM64_SYSREG_TRCVDSACCTLR = 0x884A;
+	public static final int ARM64_SYSREG_TRCVDARCCTLR = 0x8852;
+	public static final int ARM64_SYSREG_TRCSEQEVR0 = 0x8804;
+	public static final int ARM64_SYSREG_TRCSEQEVR1 = 0x880C;
+	public static final int ARM64_SYSREG_TRCSEQEVR2 = 0x8814;
+	public static final int ARM64_SYSREG_TRCSEQRSTEVR = 0x8834;
+	public static final int ARM64_SYSREG_TRCSEQSTR = 0x883C;
+	public static final int ARM64_SYSREG_TRCEXTINSELR = 0x8844;
+	public static final int ARM64_SYSREG_TRCCNTRLDVR0 = 0x8805;
+	public static final int ARM64_SYSREG_TRCCNTRLDVR1 = 0x880D;
+	public static final int ARM64_SYSREG_TRCCNTRLDVR2 = 0x8815;
+	public static final int ARM64_SYSREG_TRCCNTRLDVR3 = 0x881D;
+	public static final int ARM64_SYSREG_TRCCNTCTLR0 = 0x8825;
+	public static final int ARM64_SYSREG_TRCCNTCTLR1 = 0x882D;
+	public static final int ARM64_SYSREG_TRCCNTCTLR2 = 0x8835;
+	public static final int ARM64_SYSREG_TRCCNTCTLR3 = 0x883D;
+	public static final int ARM64_SYSREG_TRCCNTVR0 = 0x8845;
+	public static final int ARM64_SYSREG_TRCCNTVR1 = 0x884D;
+	public static final int ARM64_SYSREG_TRCCNTVR2 = 0x8855;
+	public static final int ARM64_SYSREG_TRCCNTVR3 = 0x885D;
+	public static final int ARM64_SYSREG_TRCIMSPEC0 = 0x8807;
+	public static final int ARM64_SYSREG_TRCIMSPEC1 = 0x880F;
+	public static final int ARM64_SYSREG_TRCIMSPEC2 = 0x8817;
+	public static final int ARM64_SYSREG_TRCIMSPEC3 = 0x881F;
+	public static final int ARM64_SYSREG_TRCIMSPEC4 = 0x8827;
+	public static final int ARM64_SYSREG_TRCIMSPEC5 = 0x882F;
+	public static final int ARM64_SYSREG_TRCIMSPEC6 = 0x8837;
+	public static final int ARM64_SYSREG_TRCIMSPEC7 = 0x883F;
+	public static final int ARM64_SYSREG_TRCRSCTLR2 = 0x8890;
+	public static final int ARM64_SYSREG_TRCRSCTLR3 = 0x8898;
+	public static final int ARM64_SYSREG_TRCRSCTLR4 = 0x88A0;
+	public static final int ARM64_SYSREG_TRCRSCTLR5 = 0x88A8;
+	public static final int ARM64_SYSREG_TRCRSCTLR6 = 0x88B0;
+	public static final int ARM64_SYSREG_TRCRSCTLR7 = 0x88B8;
+	public static final int ARM64_SYSREG_TRCRSCTLR8 = 0x88C0;
+	public static final int ARM64_SYSREG_TRCRSCTLR9 = 0x88C8;
+	public static final int ARM64_SYSREG_TRCRSCTLR10 = 0x88D0;
+	public static final int ARM64_SYSREG_TRCRSCTLR11 = 0x88D8;
+	public static final int ARM64_SYSREG_TRCRSCTLR12 = 0x88E0;
+	public static final int ARM64_SYSREG_TRCRSCTLR13 = 0x88E8;
+	public static final int ARM64_SYSREG_TRCRSCTLR14 = 0x88F0;
+	public static final int ARM64_SYSREG_TRCRSCTLR15 = 0x88F8;
+	public static final int ARM64_SYSREG_TRCRSCTLR16 = 0x8881;
+	public static final int ARM64_SYSREG_TRCRSCTLR17 = 0x8889;
+	public static final int ARM64_SYSREG_TRCRSCTLR18 = 0x8891;
+	public static final int ARM64_SYSREG_TRCRSCTLR19 = 0x8899;
+	public static final int ARM64_SYSREG_TRCRSCTLR20 = 0x88A1;
+	public static final int ARM64_SYSREG_TRCRSCTLR21 = 0x88A9;
+	public static final int ARM64_SYSREG_TRCRSCTLR22 = 0x88B1;
+	public static final int ARM64_SYSREG_TRCRSCTLR23 = 0x88B9;
+	public static final int ARM64_SYSREG_TRCRSCTLR24 = 0x88C1;
+	public static final int ARM64_SYSREG_TRCRSCTLR25 = 0x88C9;
+	public static final int ARM64_SYSREG_TRCRSCTLR26 = 0x88D1;
+	public static final int ARM64_SYSREG_TRCRSCTLR27 = 0x88D9;
+	public static final int ARM64_SYSREG_TRCRSCTLR28 = 0x88E1;
+	public static final int ARM64_SYSREG_TRCRSCTLR29 = 0x88E9;
+	public static final int ARM64_SYSREG_TRCRSCTLR30 = 0x88F1;
+	public static final int ARM64_SYSREG_TRCRSCTLR31 = 0x88F9;
+	public static final int ARM64_SYSREG_TRCSSCCR0 = 0x8882;
+	public static final int ARM64_SYSREG_TRCSSCCR1 = 0x888A;
+	public static final int ARM64_SYSREG_TRCSSCCR2 = 0x8892;
+	public static final int ARM64_SYSREG_TRCSSCCR3 = 0x889A;
+	public static final int ARM64_SYSREG_TRCSSCCR4 = 0x88A2;
+	public static final int ARM64_SYSREG_TRCSSCCR5 = 0x88AA;
+	public static final int ARM64_SYSREG_TRCSSCCR6 = 0x88B2;
+	public static final int ARM64_SYSREG_TRCSSCCR7 = 0x88BA;
+	public static final int ARM64_SYSREG_TRCSSCSR0 = 0x88C2;
+	public static final int ARM64_SYSREG_TRCSSCSR1 = 0x88CA;
+	public static final int ARM64_SYSREG_TRCSSCSR2 = 0x88D2;
+	public static final int ARM64_SYSREG_TRCSSCSR3 = 0x88DA;
+	public static final int ARM64_SYSREG_TRCSSCSR4 = 0x88E2;
+	public static final int ARM64_SYSREG_TRCSSCSR5 = 0x88EA;
+	public static final int ARM64_SYSREG_TRCSSCSR6 = 0x88F2;
+	public static final int ARM64_SYSREG_TRCSSCSR7 = 0x88FA;
+	public static final int ARM64_SYSREG_TRCSSPCICR0 = 0x8883;
+	public static final int ARM64_SYSREG_TRCSSPCICR1 = 0x888B;
+	public static final int ARM64_SYSREG_TRCSSPCICR2 = 0x8893;
+	public static final int ARM64_SYSREG_TRCSSPCICR3 = 0x889B;
+	public static final int ARM64_SYSREG_TRCSSPCICR4 = 0x88A3;
+	public static final int ARM64_SYSREG_TRCSSPCICR5 = 0x88AB;
+	public static final int ARM64_SYSREG_TRCSSPCICR6 = 0x88B3;
+	public static final int ARM64_SYSREG_TRCSSPCICR7 = 0x88BB;
+	public static final int ARM64_SYSREG_TRCPDCR = 0x88A4;
+	public static final int ARM64_SYSREG_TRCACVR0 = 0x8900;
+	public static final int ARM64_SYSREG_TRCACVR1 = 0x8910;
+	public static final int ARM64_SYSREG_TRCACVR2 = 0x8920;
+	public static final int ARM64_SYSREG_TRCACVR3 = 0x8930;
+	public static final int ARM64_SYSREG_TRCACVR4 = 0x8940;
+	public static final int ARM64_SYSREG_TRCACVR5 = 0x8950;
+	public static final int ARM64_SYSREG_TRCACVR6 = 0x8960;
+	public static final int ARM64_SYSREG_TRCACVR7 = 0x8970;
+	public static final int ARM64_SYSREG_TRCACVR8 = 0x8901;
+	public static final int ARM64_SYSREG_TRCACVR9 = 0x8911;
+	public static final int ARM64_SYSREG_TRCACVR10 = 0x8921;
+	public static final int ARM64_SYSREG_TRCACVR11 = 0x8931;
+	public static final int ARM64_SYSREG_TRCACVR12 = 0x8941;
+	public static final int ARM64_SYSREG_TRCACVR13 = 0x8951;
+	public static final int ARM64_SYSREG_TRCACVR14 = 0x8961;
+	public static final int ARM64_SYSREG_TRCACVR15 = 0x8971;
+	public static final int ARM64_SYSREG_TRCACATR0 = 0x8902;
+	public static final int ARM64_SYSREG_TRCACATR1 = 0x8912;
+	public static final int ARM64_SYSREG_TRCACATR2 = 0x8922;
+	public static final int ARM64_SYSREG_TRCACATR3 = 0x8932;
+	public static final int ARM64_SYSREG_TRCACATR4 = 0x8942;
+	public static final int ARM64_SYSREG_TRCACATR5 = 0x8952;
+	public static final int ARM64_SYSREG_TRCACATR6 = 0x8962;
+	public static final int ARM64_SYSREG_TRCACATR7 = 0x8972;
+	public static final int ARM64_SYSREG_TRCACATR8 = 0x8903;
+	public static final int ARM64_SYSREG_TRCACATR9 = 0x8913;
+	public static final int ARM64_SYSREG_TRCACATR10 = 0x8923;
+	public static final int ARM64_SYSREG_TRCACATR11 = 0x8933;
+	public static final int ARM64_SYSREG_TRCACATR12 = 0x8943;
+	public static final int ARM64_SYSREG_TRCACATR13 = 0x8953;
+	public static final int ARM64_SYSREG_TRCACATR14 = 0x8963;
+	public static final int ARM64_SYSREG_TRCACATR15 = 0x8973;
+	public static final int ARM64_SYSREG_TRCDVCVR0 = 0x8904;
+	public static final int ARM64_SYSREG_TRCDVCVR1 = 0x8924;
+	public static final int ARM64_SYSREG_TRCDVCVR2 = 0x8944;
+	public static final int ARM64_SYSREG_TRCDVCVR3 = 0x8964;
+	public static final int ARM64_SYSREG_TRCDVCVR4 = 0x8905;
+	public static final int ARM64_SYSREG_TRCDVCVR5 = 0x8925;
+	public static final int ARM64_SYSREG_TRCDVCVR6 = 0x8945;
+	public static final int ARM64_SYSREG_TRCDVCVR7 = 0x8965;
+	public static final int ARM64_SYSREG_TRCDVCMR0 = 0x8906;
+	public static final int ARM64_SYSREG_TRCDVCMR1 = 0x8926;
+	public static final int ARM64_SYSREG_TRCDVCMR2 = 0x8946;
+	public static final int ARM64_SYSREG_TRCDVCMR3 = 0x8966;
+	public static final int ARM64_SYSREG_TRCDVCMR4 = 0x8907;
+	public static final int ARM64_SYSREG_TRCDVCMR5 = 0x8927;
+	public static final int ARM64_SYSREG_TRCDVCMR6 = 0x8947;
+	public static final int ARM64_SYSREG_TRCDVCMR7 = 0x8967;
+	public static final int ARM64_SYSREG_TRCCIDCVR0 = 0x8980;
+	public static final int ARM64_SYSREG_TRCCIDCVR1 = 0x8990;
+	public static final int ARM64_SYSREG_TRCCIDCVR2 = 0x89A0;
+	public static final int ARM64_SYSREG_TRCCIDCVR3 = 0x89B0;
+	public static final int ARM64_SYSREG_TRCCIDCVR4 = 0x89C0;
+	public static final int ARM64_SYSREG_TRCCIDCVR5 = 0x89D0;
+	public static final int ARM64_SYSREG_TRCCIDCVR6 = 0x89E0;
+	public static final int ARM64_SYSREG_TRCCIDCVR7 = 0x89F0;
+	public static final int ARM64_SYSREG_TRCVMIDCVR0 = 0x8981;
+	public static final int ARM64_SYSREG_TRCVMIDCVR1 = 0x8991;
+	public static final int ARM64_SYSREG_TRCVMIDCVR2 = 0x89A1;
+	public static final int ARM64_SYSREG_TRCVMIDCVR3 = 0x89B1;
+	public static final int ARM64_SYSREG_TRCVMIDCVR4 = 0x89C1;
+	public static final int ARM64_SYSREG_TRCVMIDCVR5 = 0x89D1;
+	public static final int ARM64_SYSREG_TRCVMIDCVR6 = 0x89E1;
+	public static final int ARM64_SYSREG_TRCVMIDCVR7 = 0x89F1;
+	public static final int ARM64_SYSREG_TRCCIDCCTLR0 = 0x8982;
+	public static final int ARM64_SYSREG_TRCCIDCCTLR1 = 0x898A;
+	public static final int ARM64_SYSREG_TRCVMIDCCTLR0 = 0x8992;
+	public static final int ARM64_SYSREG_TRCVMIDCCTLR1 = 0x899A;
+	public static final int ARM64_SYSREG_TRCITCTRL = 0x8B84;
+	public static final int ARM64_SYSREG_TRCCLAIMSET = 0x8BC6;
+	public static final int ARM64_SYSREG_TRCCLAIMCLR = 0x8BCE;
+	public static final int ARM64_SYSREG_ICC_BPR1_EL1 = 0xC663;
+	public static final int ARM64_SYSREG_ICC_BPR0_EL1 = 0xC643;
+	public static final int ARM64_SYSREG_ICC_PMR_EL1 = 0xC230;
+	public static final int ARM64_SYSREG_ICC_CTLR_EL1 = 0xC664;
+	public static final int ARM64_SYSREG_ICC_CTLR_EL3 = 0xF664;
+	public static final int ARM64_SYSREG_ICC_SRE_EL1 = 0xC665;
+	public static final int ARM64_SYSREG_ICC_SRE_EL2 = 0xE64D;
+	public static final int ARM64_SYSREG_ICC_SRE_EL3 = 0xF665;
+	public static final int ARM64_SYSREG_ICC_IGRPEN0_EL1 = 0xC666;
+	public static final int ARM64_SYSREG_ICC_IGRPEN1_EL1 = 0xC667;
+	public static final int ARM64_SYSREG_ICC_IGRPEN1_EL3 = 0xF667;
+	public static final int ARM64_SYSREG_ICC_SEIEN_EL1 = 0xC668;
+	public static final int ARM64_SYSREG_ICC_AP0R0_EL1 = 0xC644;
+	public static final int ARM64_SYSREG_ICC_AP0R1_EL1 = 0xC645;
+	public static final int ARM64_SYSREG_ICC_AP0R2_EL1 = 0xC646;
+	public static final int ARM64_SYSREG_ICC_AP0R3_EL1 = 0xC647;
+	public static final int ARM64_SYSREG_ICC_AP1R0_EL1 = 0xC648;
+	public static final int ARM64_SYSREG_ICC_AP1R1_EL1 = 0xC649;
+	public static final int ARM64_SYSREG_ICC_AP1R2_EL1 = 0xC64A;
+	public static final int ARM64_SYSREG_ICC_AP1R3_EL1 = 0xC64B;
+	public static final int ARM64_SYSREG_ICH_AP0R0_EL2 = 0xE640;
+	public static final int ARM64_SYSREG_ICH_AP0R1_EL2 = 0xE641;
+	public static final int ARM64_SYSREG_ICH_AP0R2_EL2 = 0xE642;
+	public static final int ARM64_SYSREG_ICH_AP0R3_EL2 = 0xE643;
+	public static final int ARM64_SYSREG_ICH_AP1R0_EL2 = 0xE648;
+	public static final int ARM64_SYSREG_ICH_AP1R1_EL2 = 0xE649;
+	public static final int ARM64_SYSREG_ICH_AP1R2_EL2 = 0xE64A;
+	public static final int ARM64_SYSREG_ICH_AP1R3_EL2 = 0xE64B;
+	public static final int ARM64_SYSREG_ICH_HCR_EL2 = 0xE658;
+	public static final int ARM64_SYSREG_ICH_MISR_EL2 = 0xE65A;
+	public static final int ARM64_SYSREG_ICH_VMCR_EL2 = 0xE65F;
+	public static final int ARM64_SYSREG_ICH_VSEIR_EL2 = 0xE64C;
+	public static final int ARM64_SYSREG_ICH_LR0_EL2 = 0xE660;
+	public static final int ARM64_SYSREG_ICH_LR1_EL2 = 0xE661;
+	public static final int ARM64_SYSREG_ICH_LR2_EL2 = 0xE662;
+	public static final int ARM64_SYSREG_ICH_LR3_EL2 = 0xE663;
+	public static final int ARM64_SYSREG_ICH_LR4_EL2 = 0xE664;
+	public static final int ARM64_SYSREG_ICH_LR5_EL2 = 0xE665;
+	public static final int ARM64_SYSREG_ICH_LR6_EL2 = 0xE666;
+	public static final int ARM64_SYSREG_ICH_LR7_EL2 = 0xE667;
+	public static final int ARM64_SYSREG_ICH_LR8_EL2 = 0xE668;
+	public static final int ARM64_SYSREG_ICH_LR9_EL2 = 0xE669;
+	public static final int ARM64_SYSREG_ICH_LR10_EL2 = 0xE66A;
+	public static final int ARM64_SYSREG_ICH_LR11_EL2 = 0xE66B;
+	public static final int ARM64_SYSREG_ICH_LR12_EL2 = 0xE66C;
+	public static final int ARM64_SYSREG_ICH_LR13_EL2 = 0xE66D;
+	public static final int ARM64_SYSREG_ICH_LR14_EL2 = 0xE66E;
+	public static final int ARM64_SYSREG_ICH_LR15_EL2 = 0xE66F;
+	public static final int ARM64_SYSREG_PAN = 0xC213;
+	public static final int ARM64_SYSREG_LORSA_EL1 = 0xC520;
+	public static final int ARM64_SYSREG_LOREA_EL1 = 0xC521;
+	public static final int ARM64_SYSREG_LORN_EL1 = 0xC522;
+	public static final int ARM64_SYSREG_LORC_EL1 = 0xC523;
+	public static final int ARM64_SYSREG_TTBR1_EL2 = 0xE101;
+	public static final int ARM64_SYSREG_CONTEXTIDR_EL2 = 0xE681;
+	public static final int ARM64_SYSREG_CNTHV_TVAL_EL2 = 0xE718;
+	public static final int ARM64_SYSREG_CNTHV_CVAL_EL2 = 0xE71A;
+	public static final int ARM64_SYSREG_CNTHV_CTL_EL2 = 0xE719;
+	public static final int ARM64_SYSREG_SCTLR_EL12 = 0xE880;
+	public static final int ARM64_SYSREG_CPACR_EL12 = 0xE882;
+	public static final int ARM64_SYSREG_TTBR0_EL12 = 0xE900;
+	public static final int ARM64_SYSREG_TTBR1_EL12 = 0xE901;
+	public static final int ARM64_SYSREG_TCR_EL12 = 0xE902;
+	public static final int ARM64_SYSREG_AFSR0_EL12 = 0xEA88;
+	public static final int ARM64_SYSREG_AFSR1_EL12 = 0xEA89;
+	public static final int ARM64_SYSREG_ESR_EL12 = 0xEA90;
+	public static final int ARM64_SYSREG_FAR_EL12 = 0xEB00;
+	public static final int ARM64_SYSREG_MAIR_EL12 = 0xED10;
+	public static final int ARM64_SYSREG_AMAIR_EL12 = 0xED18;
+	public static final int ARM64_SYSREG_VBAR_EL12 = 0xEE00;
+	public static final int ARM64_SYSREG_CONTEXTIDR_EL12 = 0xEE81;
+	public static final int ARM64_SYSREG_CNTKCTL_EL12 = 0xEF08;
+	public static final int ARM64_SYSREG_CNTP_TVAL_EL02 = 0xEF10;
+	public static final int ARM64_SYSREG_CNTP_CTL_EL02 = 0xEF11;
+	public static final int ARM64_SYSREG_CNTP_CVAL_EL02 = 0xEF12;
+	public static final int ARM64_SYSREG_CNTV_TVAL_EL02 = 0xEF18;
+	public static final int ARM64_SYSREG_CNTV_CTL_EL02 = 0xEF19;
+	public static final int ARM64_SYSREG_CNTV_CVAL_EL02 = 0xEF1A;
+	public static final int ARM64_SYSREG_SPSR_EL12 = 0xEA00;
+	public static final int ARM64_SYSREG_ELR_EL12 = 0xEA01;
+	public static final int ARM64_SYSREG_UAO = 0xC214;
+	public static final int ARM64_SYSREG_PMBLIMITR_EL1 = 0xC4D0;
+	public static final int ARM64_SYSREG_PMBPTR_EL1 = 0xC4D1;
+	public static final int ARM64_SYSREG_PMBSR_EL1 = 0xC4D3;
+	public static final int ARM64_SYSREG_PMBIDR_EL1 = 0xC4D7;
+	public static final int ARM64_SYSREG_PMSCR_EL2 = 0xE4C8;
+	public static final int ARM64_SYSREG_PMSCR_EL12 = 0xECC8;
+	public static final int ARM64_SYSREG_PMSCR_EL1 = 0xC4C8;
+	public static final int ARM64_SYSREG_PMSICR_EL1 = 0xC4CA;
+	public static final int ARM64_SYSREG_PMSIRR_EL1 = 0xC4CB;
+	public static final int ARM64_SYSREG_PMSFCR_EL1 = 0xC4CC;
+	public static final int ARM64_SYSREG_PMSEVFR_EL1 = 0xC4CD;
+	public static final int ARM64_SYSREG_PMSLATFR_EL1 = 0xC4CE;
+	public static final int ARM64_SYSREG_PMSIDR_EL1 = 0xC4CF;
+	public static final int ARM64_SYSREG_ERRSELR_EL1 = 0xC299;
+	public static final int ARM64_SYSREG_ERXCTLR_EL1 = 0xC2A1;
+	public static final int ARM64_SYSREG_ERXSTATUS_EL1 = 0xC2A2;
+	public static final int ARM64_SYSREG_ERXADDR_EL1 = 0xC2A3;
+	public static final int ARM64_SYSREG_ERXMISC0_EL1 = 0xC2A8;
+	public static final int ARM64_SYSREG_ERXMISC1_EL1 = 0xC2A9;
+	public static final int ARM64_SYSREG_DISR_EL1 = 0xC609;
+	public static final int ARM64_SYSREG_VDISR_EL2 = 0xE609;
+	public static final int ARM64_SYSREG_VSESR_EL2 = 0xE293;
+	public static final int ARM64_SYSREG_APIAKEYLO_EL1 = 0xC108;
+	public static final int ARM64_SYSREG_APIAKEYHI_EL1 = 0xC109;
+	public static final int ARM64_SYSREG_APIBKEYLO_EL1 = 0xC10A;
+	public static final int ARM64_SYSREG_APIBKEYHI_EL1 = 0xC10B;
+	public static final int ARM64_SYSREG_APDAKEYLO_EL1 = 0xC110;
+	public static final int ARM64_SYSREG_APDAKEYHI_EL1 = 0xC111;
+	public static final int ARM64_SYSREG_APDBKEYLO_EL1 = 0xC112;
+	public static final int ARM64_SYSREG_APDBKEYHI_EL1 = 0xC113;
+	public static final int ARM64_SYSREG_APGAKEYLO_EL1 = 0xC118;
+	public static final int ARM64_SYSREG_APGAKEYHI_EL1 = 0xC119;
+	public static final int ARM64_SYSREG_VSTCR_EL2 = 0xE132;
+	public static final int ARM64_SYSREG_VSTTBR_EL2 = 0xE130;
+	public static final int ARM64_SYSREG_CNTHVS_TVAL_EL2 = 0xE720;
+	public static final int ARM64_SYSREG_CNTHVS_CVAL_EL2 = 0xE722;
+	public static final int ARM64_SYSREG_CNTHVS_CTL_EL2 = 0xE721;
+	public static final int ARM64_SYSREG_CNTHPS_TVAL_EL2 = 0xE728;
+	public static final int ARM64_SYSREG_CNTHPS_CVAL_EL2 = 0xE72A;
+	public static final int ARM64_SYSREG_CNTHPS_CTL_EL2 = 0xE729;
+	public static final int ARM64_SYSREG_SDER32_EL2 = 0xE099;
+	public static final int ARM64_SYSREG_ERXPFGCTL_EL1 = 0xC2A5;
+	public static final int ARM64_SYSREG_ERXPFGCDN_EL1 = 0xC2A6;
+	public static final int ARM64_SYSREG_ERXTS_EL1 = 0xC2AF;
+	public static final int ARM64_SYSREG_ERXMISC2_EL1 = 0xC2AA;
+	public static final int ARM64_SYSREG_ERXMISC3_EL1 = 0xC2AB;
+	public static final int ARM64_SYSREG_ERXPFGF_EL1 = 0xC2A4;
+	public static final int ARM64_SYSREG_MPAM0_EL1 = 0xC529;
+	public static final int ARM64_SYSREG_MPAM1_EL1 = 0xC528;
+	public static final int ARM64_SYSREG_MPAM2_EL2 = 0xE528;
+	public static final int ARM64_SYSREG_MPAM3_EL3 = 0xF528;
+	public static final int ARM64_SYSREG_MPAM1_EL12 = 0xED28;
+	public static final int ARM64_SYSREG_MPAMHCR_EL2 = 0xE520;
+	public static final int ARM64_SYSREG_MPAMVPMV_EL2 = 0xE521;
+	public static final int ARM64_SYSREG_MPAMVPM0_EL2 = 0xE530;
+	public static final int ARM64_SYSREG_MPAMVPM1_EL2 = 0xE531;
+	public static final int ARM64_SYSREG_MPAMVPM2_EL2 = 0xE532;
+	public static final int ARM64_SYSREG_MPAMVPM3_EL2 = 0xE533;
+	public static final int ARM64_SYSREG_MPAMVPM4_EL2 = 0xE534;
+	public static final int ARM64_SYSREG_MPAMVPM5_EL2 = 0xE535;
+	public static final int ARM64_SYSREG_MPAMVPM6_EL2 = 0xE536;
+	public static final int ARM64_SYSREG_MPAMVPM7_EL2 = 0xE537;
+	public static final int ARM64_SYSREG_MPAMIDR_EL1 = 0xC524;
+	public static final int ARM64_SYSREG_AMCR_EL0 = 0xDE90;
+	public static final int ARM64_SYSREG_AMCFGR_EL0 = 0xDE91;
+	public static final int ARM64_SYSREG_AMCGCR_EL0 = 0xDE92;
+	public static final int ARM64_SYSREG_AMUSERENR_EL0 = 0xDE93;
+	public static final int ARM64_SYSREG_AMCNTENCLR0_EL0 = 0xDE94;
+	public static final int ARM64_SYSREG_AMCNTENSET0_EL0 = 0xDE95;
+	public static final int ARM64_SYSREG_AMEVCNTR00_EL0 = 0xDEA0;
+	public static final int ARM64_SYSREG_AMEVCNTR01_EL0 = 0xDEA1;
+	public static final int ARM64_SYSREG_AMEVCNTR02_EL0 = 0xDEA2;
+	public static final int ARM64_SYSREG_AMEVCNTR03_EL0 = 0xDEA3;
+	public static final int ARM64_SYSREG_AMEVTYPER00_EL0 = 0xDEB0;
+	public static final int ARM64_SYSREG_AMEVTYPER01_EL0 = 0xDEB1;
+	public static final int ARM64_SYSREG_AMEVTYPER02_EL0 = 0xDEB2;
+	public static final int ARM64_SYSREG_AMEVTYPER03_EL0 = 0xDEB3;
+	public static final int ARM64_SYSREG_AMCNTENCLR1_EL0 = 0xDE98;
+	public static final int ARM64_SYSREG_AMCNTENSET1_EL0 = 0xDE99;
+	public static final int ARM64_SYSREG_AMEVCNTR10_EL0 = 0xDEE0;
+	public static final int ARM64_SYSREG_AMEVCNTR11_EL0 = 0xDEE1;
+	public static final int ARM64_SYSREG_AMEVCNTR12_EL0 = 0xDEE2;
+	public static final int ARM64_SYSREG_AMEVCNTR13_EL0 = 0xDEE3;
+	public static final int ARM64_SYSREG_AMEVCNTR14_EL0 = 0xDEE4;
+	public static final int ARM64_SYSREG_AMEVCNTR15_EL0 = 0xDEE5;
+	public static final int ARM64_SYSREG_AMEVCNTR16_EL0 = 0xDEE6;
+	public static final int ARM64_SYSREG_AMEVCNTR17_EL0 = 0xDEE7;
+	public static final int ARM64_SYSREG_AMEVCNTR18_EL0 = 0xDEE8;
+	public static final int ARM64_SYSREG_AMEVCNTR19_EL0 = 0xDEE9;
+	public static final int ARM64_SYSREG_AMEVCNTR110_EL0 = 0xDEEA;
+	public static final int ARM64_SYSREG_AMEVCNTR111_EL0 = 0xDEEB;
+	public static final int ARM64_SYSREG_AMEVCNTR112_EL0 = 0xDEEC;
+	public static final int ARM64_SYSREG_AMEVCNTR113_EL0 = 0xDEED;
+	public static final int ARM64_SYSREG_AMEVCNTR114_EL0 = 0xDEEE;
+	public static final int ARM64_SYSREG_AMEVCNTR115_EL0 = 0xDEEF;
+	public static final int ARM64_SYSREG_AMEVTYPER10_EL0 = 0xDEF0;
+	public static final int ARM64_SYSREG_AMEVTYPER11_EL0 = 0xDEF1;
+	public static final int ARM64_SYSREG_AMEVTYPER12_EL0 = 0xDEF2;
+	public static final int ARM64_SYSREG_AMEVTYPER13_EL0 = 0xDEF3;
+	public static final int ARM64_SYSREG_AMEVTYPER14_EL0 = 0xDEF4;
+	public static final int ARM64_SYSREG_AMEVTYPER15_EL0 = 0xDEF5;
+	public static final int ARM64_SYSREG_AMEVTYPER16_EL0 = 0xDEF6;
+	public static final int ARM64_SYSREG_AMEVTYPER17_EL0 = 0xDEF7;
+	public static final int ARM64_SYSREG_AMEVTYPER18_EL0 = 0xDEF8;
+	public static final int ARM64_SYSREG_AMEVTYPER19_EL0 = 0xDEF9;
+	public static final int ARM64_SYSREG_AMEVTYPER110_EL0 = 0xDEFA;
+	public static final int ARM64_SYSREG_AMEVTYPER111_EL0 = 0xDEFB;
+	public static final int ARM64_SYSREG_AMEVTYPER112_EL0 = 0xDEFC;
+	public static final int ARM64_SYSREG_AMEVTYPER113_EL0 = 0xDEFD;
+	public static final int ARM64_SYSREG_AMEVTYPER114_EL0 = 0xDEFE;
+	public static final int ARM64_SYSREG_AMEVTYPER115_EL0 = 0xDEFF;
+	public static final int ARM64_SYSREG_TRFCR_EL1 = 0xC091;
+	public static final int ARM64_SYSREG_TRFCR_EL2 = 0xE091;
+	public static final int ARM64_SYSREG_TRFCR_EL12 = 0xE891;
+	public static final int ARM64_SYSREG_DIT = 0xDA15;
+	public static final int ARM64_SYSREG_VNCR_EL2 = 0xE110;
+	public static final int ARM64_SYSREG_ZCR_EL1 = 0xC090;
+	public static final int ARM64_SYSREG_ZCR_EL2 = 0xE090;
+	public static final int ARM64_SYSREG_ZCR_EL3 = 0xF090;
+	public static final int ARM64_SYSREG_ZCR_EL12 = 0xE890;
+	public static final int ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90;
+
+	public static final int ARM64_PSTATE_INVALID = 0;
+	public static final int ARM64_PSTATE_SPSEL = 0x05;
+	public static final int ARM64_PSTATE_DAIFSET = 0x1e;
+	public static final int ARM64_PSTATE_DAIFCLR = 0x1f;
+	public static final int ARM64_PSTATE_PAN = 0x4;
+	public static final int ARM64_PSTATE_UAO = 0x3;
+	public static final int ARM64_PSTATE_DIT = 0x1a;
+
+	public static final int ARM64_VAS_INVALID = 0;
+	public static final int ARM64_VAS_16B = 1;
+	public static final int ARM64_VAS_8B = 2;
+	public static final int ARM64_VAS_4B = 3;
+	public static final int ARM64_VAS_1B = 4;
+	public static final int ARM64_VAS_8H = 5;
+	public static final int ARM64_VAS_4H = 6;
+	public static final int ARM64_VAS_2H = 7;
+	public static final int ARM64_VAS_1H = 8;
+	public static final int ARM64_VAS_4S = 9;
+	public static final int ARM64_VAS_2S = 10;
+	public static final int ARM64_VAS_1S = 11;
+	public static final int ARM64_VAS_2D = 12;
+	public static final int ARM64_VAS_1D = 13;
+	public static final int ARM64_VAS_1Q = 14;
+
+	public static final int ARM64_BARRIER_INVALID = 0;
+	public static final int ARM64_BARRIER_OSHLD = 0x1;
+	public static final int ARM64_BARRIER_OSHST = 0x2;
+	public static final int ARM64_BARRIER_OSH = 0x3;
+	public static final int ARM64_BARRIER_NSHLD = 0x5;
+	public static final int ARM64_BARRIER_NSHST = 0x6;
+	public static final int ARM64_BARRIER_NSH = 0x7;
+	public static final int ARM64_BARRIER_ISHLD = 0x9;
+	public static final int ARM64_BARRIER_ISHST = 0xa;
+	public static final int ARM64_BARRIER_ISH = 0xb;
+	public static final int ARM64_BARRIER_LD = 0xd;
+	public static final int ARM64_BARRIER_ST = 0xe;
+	public static final int ARM64_BARRIER_SY = 0xf;
+
+	public static final int ARM64_OP_INVALID = 0;
+	public static final int ARM64_OP_REG = 1;
+	public static final int ARM64_OP_IMM = 2;
+	public static final int ARM64_OP_MEM = 3;
+	public static final int ARM64_OP_FP = 4;
+	public static final int ARM64_OP_CIMM = 64;
+	public static final int ARM64_OP_REG_MRS = 65;
+	public static final int ARM64_OP_REG_MSR = 66;
+	public static final int ARM64_OP_PSTATE = 67;
+	public static final int ARM64_OP_SYS = 68;
+	public static final int ARM64_OP_PREFETCH = 69;
+	public static final int ARM64_OP_BARRIER = 70;
+
+	public static final int ARM64_TLBI_INVALID = 0;
+	public static final int ARM64_TLBI_IPAS2E1IS = 1;
+	public static final int ARM64_TLBI_IPAS2LE1IS = 2;
+	public static final int ARM64_TLBI_VMALLE1IS = 3;
+	public static final int ARM64_TLBI_ALLE2IS = 4;
+	public static final int ARM64_TLBI_ALLE3IS = 5;
+	public static final int ARM64_TLBI_VAE1IS = 6;
+	public static final int ARM64_TLBI_VAE2IS = 7;
+	public static final int ARM64_TLBI_VAE3IS = 8;
+	public static final int ARM64_TLBI_ASIDE1IS = 9;
+	public static final int ARM64_TLBI_VAAE1IS = 10;
+	public static final int ARM64_TLBI_ALLE1IS = 11;
+	public static final int ARM64_TLBI_VALE1IS = 12;
+	public static final int ARM64_TLBI_VALE2IS = 13;
+	public static final int ARM64_TLBI_VALE3IS = 14;
+	public static final int ARM64_TLBI_VMALLS12E1IS = 15;
+	public static final int ARM64_TLBI_VAALE1IS = 16;
+	public static final int ARM64_TLBI_IPAS2E1 = 17;
+	public static final int ARM64_TLBI_IPAS2LE1 = 18;
+	public static final int ARM64_TLBI_VMALLE1 = 19;
+	public static final int ARM64_TLBI_ALLE2 = 20;
+	public static final int ARM64_TLBI_ALLE3 = 21;
+	public static final int ARM64_TLBI_VAE1 = 22;
+	public static final int ARM64_TLBI_VAE2 = 23;
+	public static final int ARM64_TLBI_VAE3 = 24;
+	public static final int ARM64_TLBI_ASIDE1 = 25;
+	public static final int ARM64_TLBI_VAAE1 = 26;
+	public static final int ARM64_TLBI_ALLE1 = 27;
+	public static final int ARM64_TLBI_VALE1 = 28;
+	public static final int ARM64_TLBI_VALE2 = 29;
+	public static final int ARM64_TLBI_VALE3 = 30;
+	public static final int ARM64_TLBI_VMALLS12E1 = 31;
+	public static final int ARM64_TLBI_VAALE1 = 32;
+	public static final int ARM64_TLBI_VMALLE1OS = 33;
+	public static final int ARM64_TLBI_VAE1OS = 34;
+	public static final int ARM64_TLBI_ASIDE1OS = 35;
+	public static final int ARM64_TLBI_VAAE1OS = 36;
+	public static final int ARM64_TLBI_VALE1OS = 37;
+	public static final int ARM64_TLBI_VAALE1OS = 38;
+	public static final int ARM64_TLBI_IPAS2E1OS = 39;
+	public static final int ARM64_TLBI_IPAS2LE1OS = 40;
+	public static final int ARM64_TLBI_VAE2OS = 41;
+	public static final int ARM64_TLBI_VALE2OS = 42;
+	public static final int ARM64_TLBI_VMALLS12E1OS = 43;
+	public static final int ARM64_TLBI_VAE3OS = 44;
+	public static final int ARM64_TLBI_VALE3OS = 45;
+	public static final int ARM64_TLBI_ALLE2OS = 46;
+	public static final int ARM64_TLBI_ALLE1OS = 47;
+	public static final int ARM64_TLBI_ALLE3OS = 48;
+	public static final int ARM64_TLBI_RVAE1 = 49;
+	public static final int ARM64_TLBI_RVAAE1 = 50;
+	public static final int ARM64_TLBI_RVALE1 = 51;
+	public static final int ARM64_TLBI_RVAALE1 = 52;
+	public static final int ARM64_TLBI_RVAE1IS = 53;
+	public static final int ARM64_TLBI_RVAAE1IS = 54;
+	public static final int ARM64_TLBI_RVALE1IS = 55;
+	public static final int ARM64_TLBI_RVAALE1IS = 56;
+	public static final int ARM64_TLBI_RVAE1OS = 57;
+	public static final int ARM64_TLBI_RVAAE1OS = 58;
+	public static final int ARM64_TLBI_RVALE1OS = 59;
+	public static final int ARM64_TLBI_RVAALE1OS = 60;
+	public static final int ARM64_TLBI_RIPAS2E1IS = 61;
+	public static final int ARM64_TLBI_RIPAS2LE1IS = 62;
+	public static final int ARM64_TLBI_RIPAS2E1 = 63;
+	public static final int ARM64_TLBI_RIPAS2LE1 = 64;
+	public static final int ARM64_TLBI_RIPAS2E1OS = 65;
+	public static final int ARM64_TLBI_RIPAS2LE1OS = 66;
+	public static final int ARM64_TLBI_RVAE2 = 67;
+	public static final int ARM64_TLBI_RVALE2 = 68;
+	public static final int ARM64_TLBI_RVAE2IS = 69;
+	public static final int ARM64_TLBI_RVALE2IS = 70;
+	public static final int ARM64_TLBI_RVAE2OS = 71;
+	public static final int ARM64_TLBI_RVALE2OS = 72;
+	public static final int ARM64_TLBI_RVAE3 = 73;
+	public static final int ARM64_TLBI_RVALE3 = 74;
+	public static final int ARM64_TLBI_RVAE3IS = 75;
+	public static final int ARM64_TLBI_RVALE3IS = 76;
+	public static final int ARM64_TLBI_RVAE3OS = 77;
+	public static final int ARM64_TLBI_RVALE3OS = 78;
+	public static final int ARM64_AT_S1E1R = 79;
+	public static final int ARM64_AT_S1E2R = 80;
+	public static final int ARM64_AT_S1E3R = 81;
+	public static final int ARM64_AT_S1E1W = 82;
+	public static final int ARM64_AT_S1E2W = 83;
+	public static final int ARM64_AT_S1E3W = 84;
+	public static final int ARM64_AT_S1E0R = 85;
+	public static final int ARM64_AT_S1E0W = 86;
+	public static final int ARM64_AT_S12E1R = 87;
+	public static final int ARM64_AT_S12E1W = 88;
+	public static final int ARM64_AT_S12E0R = 89;
+	public static final int ARM64_AT_S12E0W = 90;
+	public static final int ARM64_AT_S1E1RP = 91;
+	public static final int ARM64_AT_S1E1WP = 92;
+
+	public static final int ARM64_DC_INVALID = 0;
+	public static final int ARM64_DC_ZVA = 1;
+	public static final int ARM64_DC_IVAC = 2;
+	public static final int ARM64_DC_ISW = 3;
+	public static final int ARM64_DC_CVAC = 4;
+	public static final int ARM64_DC_CSW = 5;
+	public static final int ARM64_DC_CVAU = 6;
+	public static final int ARM64_DC_CIVAC = 7;
+	public static final int ARM64_DC_CISW = 8;
+	public static final int ARM64_DC_CVAP = 9;
+
+	public static final int ARM64_IC_INVALID = 0;
+	public static final int ARM64_IC_IALLUIS = 1;
+	public static final int ARM64_IC_IALLU = 2;
+	public static final int ARM64_IC_IVAU = 3;
+
+	public static final int ARM64_PRFM_INVALID = 0;
+	public static final int ARM64_PRFM_PLDL1KEEP = 0x00+1;
+	public static final int ARM64_PRFM_PLDL1STRM = 0x01+1;
+	public static final int ARM64_PRFM_PLDL2KEEP = 0x02+1;
+	public static final int ARM64_PRFM_PLDL2STRM = 0x03+1;
+	public static final int ARM64_PRFM_PLDL3KEEP = 0x04+1;
+	public static final int ARM64_PRFM_PLDL3STRM = 0x05+1;
+	public static final int ARM64_PRFM_PLIL1KEEP = 0x08+1;
+	public static final int ARM64_PRFM_PLIL1STRM = 0x09+1;
+	public static final int ARM64_PRFM_PLIL2KEEP = 0x0a+1;
+	public static final int ARM64_PRFM_PLIL2STRM = 0x0b+1;
+	public static final int ARM64_PRFM_PLIL3KEEP = 0x0c+1;
+	public static final int ARM64_PRFM_PLIL3STRM = 0x0d+1;
+	public static final int ARM64_PRFM_PSTL1KEEP = 0x10+1;
+	public static final int ARM64_PRFM_PSTL1STRM = 0x11+1;
+	public static final int ARM64_PRFM_PSTL2KEEP = 0x12+1;
+	public static final int ARM64_PRFM_PSTL2STRM = 0x13+1;
+	public static final int ARM64_PRFM_PSTL3KEEP = 0x14+1;
+	public static final int ARM64_PRFM_PSTL3STRM = 0x15+1;
+
+	public static final int ARM64_REG_INVALID = 0;
+	public static final int ARM64_REG_FFR = 1;
+	public static final int ARM64_REG_FP = 2;
+	public static final int ARM64_REG_LR = 3;
+	public static final int ARM64_REG_NZCV = 4;
+	public static final int ARM64_REG_SP = 5;
+	public static final int ARM64_REG_WSP = 6;
+	public static final int ARM64_REG_WZR = 7;
+	public static final int ARM64_REG_XZR = 8;
+	public static final int ARM64_REG_B0 = 9;
+	public static final int ARM64_REG_B1 = 10;
+	public static final int ARM64_REG_B2 = 11;
+	public static final int ARM64_REG_B3 = 12;
+	public static final int ARM64_REG_B4 = 13;
+	public static final int ARM64_REG_B5 = 14;
+	public static final int ARM64_REG_B6 = 15;
+	public static final int ARM64_REG_B7 = 16;
+	public static final int ARM64_REG_B8 = 17;
+	public static final int ARM64_REG_B9 = 18;
+	public static final int ARM64_REG_B10 = 19;
+	public static final int ARM64_REG_B11 = 20;
+	public static final int ARM64_REG_B12 = 21;
+	public static final int ARM64_REG_B13 = 22;
+	public static final int ARM64_REG_B14 = 23;
+	public static final int ARM64_REG_B15 = 24;
+	public static final int ARM64_REG_B16 = 25;
+	public static final int ARM64_REG_B17 = 26;
+	public static final int ARM64_REG_B18 = 27;
+	public static final int ARM64_REG_B19 = 28;
+	public static final int ARM64_REG_B20 = 29;
+	public static final int ARM64_REG_B21 = 30;
+	public static final int ARM64_REG_B22 = 31;
+	public static final int ARM64_REG_B23 = 32;
+	public static final int ARM64_REG_B24 = 33;
+	public static final int ARM64_REG_B25 = 34;
+	public static final int ARM64_REG_B26 = 35;
+	public static final int ARM64_REG_B27 = 36;
+	public static final int ARM64_REG_B28 = 37;
+	public static final int ARM64_REG_B29 = 38;
+	public static final int ARM64_REG_B30 = 39;
+	public static final int ARM64_REG_B31 = 40;
+	public static final int ARM64_REG_D0 = 41;
+	public static final int ARM64_REG_D1 = 42;
+	public static final int ARM64_REG_D2 = 43;
+	public static final int ARM64_REG_D3 = 44;
+	public static final int ARM64_REG_D4 = 45;
+	public static final int ARM64_REG_D5 = 46;
+	public static final int ARM64_REG_D6 = 47;
+	public static final int ARM64_REG_D7 = 48;
+	public static final int ARM64_REG_D8 = 49;
+	public static final int ARM64_REG_D9 = 50;
+	public static final int ARM64_REG_D10 = 51;
+	public static final int ARM64_REG_D11 = 52;
+	public static final int ARM64_REG_D12 = 53;
+	public static final int ARM64_REG_D13 = 54;
+	public static final int ARM64_REG_D14 = 55;
+	public static final int ARM64_REG_D15 = 56;
+	public static final int ARM64_REG_D16 = 57;
+	public static final int ARM64_REG_D17 = 58;
+	public static final int ARM64_REG_D18 = 59;
+	public static final int ARM64_REG_D19 = 60;
+	public static final int ARM64_REG_D20 = 61;
+	public static final int ARM64_REG_D21 = 62;
+	public static final int ARM64_REG_D22 = 63;
+	public static final int ARM64_REG_D23 = 64;
+	public static final int ARM64_REG_D24 = 65;
+	public static final int ARM64_REG_D25 = 66;
+	public static final int ARM64_REG_D26 = 67;
+	public static final int ARM64_REG_D27 = 68;
+	public static final int ARM64_REG_D28 = 69;
+	public static final int ARM64_REG_D29 = 70;
+	public static final int ARM64_REG_D30 = 71;
+	public static final int ARM64_REG_D31 = 72;
+	public static final int ARM64_REG_H0 = 73;
+	public static final int ARM64_REG_H1 = 74;
+	public static final int ARM64_REG_H2 = 75;
+	public static final int ARM64_REG_H3 = 76;
+	public static final int ARM64_REG_H4 = 77;
+	public static final int ARM64_REG_H5 = 78;
+	public static final int ARM64_REG_H6 = 79;
+	public static final int ARM64_REG_H7 = 80;
+	public static final int ARM64_REG_H8 = 81;
+	public static final int ARM64_REG_H9 = 82;
+	public static final int ARM64_REG_H10 = 83;
+	public static final int ARM64_REG_H11 = 84;
+	public static final int ARM64_REG_H12 = 85;
+	public static final int ARM64_REG_H13 = 86;
+	public static final int ARM64_REG_H14 = 87;
+	public static final int ARM64_REG_H15 = 88;
+	public static final int ARM64_REG_H16 = 89;
+	public static final int ARM64_REG_H17 = 90;
+	public static final int ARM64_REG_H18 = 91;
+	public static final int ARM64_REG_H19 = 92;
+	public static final int ARM64_REG_H20 = 93;
+	public static final int ARM64_REG_H21 = 94;
+	public static final int ARM64_REG_H22 = 95;
+	public static final int ARM64_REG_H23 = 96;
+	public static final int ARM64_REG_H24 = 97;
+	public static final int ARM64_REG_H25 = 98;
+	public static final int ARM64_REG_H26 = 99;
+	public static final int ARM64_REG_H27 = 100;
+	public static final int ARM64_REG_H28 = 101;
+	public static final int ARM64_REG_H29 = 102;
+	public static final int ARM64_REG_H30 = 103;
+	public static final int ARM64_REG_H31 = 104;
+	public static final int ARM64_REG_P0 = 105;
+	public static final int ARM64_REG_P1 = 106;
+	public static final int ARM64_REG_P2 = 107;
+	public static final int ARM64_REG_P3 = 108;
+	public static final int ARM64_REG_P4 = 109;
+	public static final int ARM64_REG_P5 = 110;
+	public static final int ARM64_REG_P6 = 111;
+	public static final int ARM64_REG_P7 = 112;
+	public static final int ARM64_REG_P8 = 113;
+	public static final int ARM64_REG_P9 = 114;
+	public static final int ARM64_REG_P10 = 115;
+	public static final int ARM64_REG_P11 = 116;
+	public static final int ARM64_REG_P12 = 117;
+	public static final int ARM64_REG_P13 = 118;
+	public static final int ARM64_REG_P14 = 119;
+	public static final int ARM64_REG_P15 = 120;
+	public static final int ARM64_REG_Q0 = 121;
+	public static final int ARM64_REG_Q1 = 122;
+	public static final int ARM64_REG_Q2 = 123;
+	public static final int ARM64_REG_Q3 = 124;
+	public static final int ARM64_REG_Q4 = 125;
+	public static final int ARM64_REG_Q5 = 126;
+	public static final int ARM64_REG_Q6 = 127;
+	public static final int ARM64_REG_Q7 = 128;
+	public static final int ARM64_REG_Q8 = 129;
+	public static final int ARM64_REG_Q9 = 130;
+	public static final int ARM64_REG_Q10 = 131;
+	public static final int ARM64_REG_Q11 = 132;
+	public static final int ARM64_REG_Q12 = 133;
+	public static final int ARM64_REG_Q13 = 134;
+	public static final int ARM64_REG_Q14 = 135;
+	public static final int ARM64_REG_Q15 = 136;
+	public static final int ARM64_REG_Q16 = 137;
+	public static final int ARM64_REG_Q17 = 138;
+	public static final int ARM64_REG_Q18 = 139;
+	public static final int ARM64_REG_Q19 = 140;
+	public static final int ARM64_REG_Q20 = 141;
+	public static final int ARM64_REG_Q21 = 142;
+	public static final int ARM64_REG_Q22 = 143;
+	public static final int ARM64_REG_Q23 = 144;
+	public static final int ARM64_REG_Q24 = 145;
+	public static final int ARM64_REG_Q25 = 146;
+	public static final int ARM64_REG_Q26 = 147;
+	public static final int ARM64_REG_Q27 = 148;
+	public static final int ARM64_REG_Q28 = 149;
+	public static final int ARM64_REG_Q29 = 150;
+	public static final int ARM64_REG_Q30 = 151;
+	public static final int ARM64_REG_Q31 = 152;
+	public static final int ARM64_REG_S0 = 153;
+	public static final int ARM64_REG_S1 = 154;
+	public static final int ARM64_REG_S2 = 155;
+	public static final int ARM64_REG_S3 = 156;
+	public static final int ARM64_REG_S4 = 157;
+	public static final int ARM64_REG_S5 = 158;
+	public static final int ARM64_REG_S6 = 159;
+	public static final int ARM64_REG_S7 = 160;
+	public static final int ARM64_REG_S8 = 161;
+	public static final int ARM64_REG_S9 = 162;
+	public static final int ARM64_REG_S10 = 163;
+	public static final int ARM64_REG_S11 = 164;
+	public static final int ARM64_REG_S12 = 165;
+	public static final int ARM64_REG_S13 = 166;
+	public static final int ARM64_REG_S14 = 167;
+	public static final int ARM64_REG_S15 = 168;
+	public static final int ARM64_REG_S16 = 169;
+	public static final int ARM64_REG_S17 = 170;
+	public static final int ARM64_REG_S18 = 171;
+	public static final int ARM64_REG_S19 = 172;
+	public static final int ARM64_REG_S20 = 173;
+	public static final int ARM64_REG_S21 = 174;
+	public static final int ARM64_REG_S22 = 175;
+	public static final int ARM64_REG_S23 = 176;
+	public static final int ARM64_REG_S24 = 177;
+	public static final int ARM64_REG_S25 = 178;
+	public static final int ARM64_REG_S26 = 179;
+	public static final int ARM64_REG_S27 = 180;
+	public static final int ARM64_REG_S28 = 181;
+	public static final int ARM64_REG_S29 = 182;
+	public static final int ARM64_REG_S30 = 183;
+	public static final int ARM64_REG_S31 = 184;
+	public static final int ARM64_REG_W0 = 185;
+	public static final int ARM64_REG_W1 = 186;
+	public static final int ARM64_REG_W2 = 187;
+	public static final int ARM64_REG_W3 = 188;
+	public static final int ARM64_REG_W4 = 189;
+	public static final int ARM64_REG_W5 = 190;
+	public static final int ARM64_REG_W6 = 191;
+	public static final int ARM64_REG_W7 = 192;
+	public static final int ARM64_REG_W8 = 193;
+	public static final int ARM64_REG_W9 = 194;
+	public static final int ARM64_REG_W10 = 195;
+	public static final int ARM64_REG_W11 = 196;
+	public static final int ARM64_REG_W12 = 197;
+	public static final int ARM64_REG_W13 = 198;
+	public static final int ARM64_REG_W14 = 199;
+	public static final int ARM64_REG_W15 = 200;
+	public static final int ARM64_REG_W16 = 201;
+	public static final int ARM64_REG_W17 = 202;
+	public static final int ARM64_REG_W18 = 203;
+	public static final int ARM64_REG_W19 = 204;
+	public static final int ARM64_REG_W20 = 205;
+	public static final int ARM64_REG_W21 = 206;
+	public static final int ARM64_REG_W22 = 207;
+	public static final int ARM64_REG_W23 = 208;
+	public static final int ARM64_REG_W24 = 209;
+	public static final int ARM64_REG_W25 = 210;
+	public static final int ARM64_REG_W26 = 211;
+	public static final int ARM64_REG_W27 = 212;
+	public static final int ARM64_REG_W28 = 213;
+	public static final int ARM64_REG_W29 = 214;
+	public static final int ARM64_REG_W30 = 215;
+	public static final int ARM64_REG_X0 = 216;
+	public static final int ARM64_REG_X1 = 217;
+	public static final int ARM64_REG_X2 = 218;
+	public static final int ARM64_REG_X3 = 219;
+	public static final int ARM64_REG_X4 = 220;
+	public static final int ARM64_REG_X5 = 221;
+	public static final int ARM64_REG_X6 = 222;
+	public static final int ARM64_REG_X7 = 223;
+	public static final int ARM64_REG_X8 = 224;
+	public static final int ARM64_REG_X9 = 225;
+	public static final int ARM64_REG_X10 = 226;
+	public static final int ARM64_REG_X11 = 227;
+	public static final int ARM64_REG_X12 = 228;
+	public static final int ARM64_REG_X13 = 229;
+	public static final int ARM64_REG_X14 = 230;
+	public static final int ARM64_REG_X15 = 231;
+	public static final int ARM64_REG_X16 = 232;
+	public static final int ARM64_REG_X17 = 233;
+	public static final int ARM64_REG_X18 = 234;
+	public static final int ARM64_REG_X19 = 235;
+	public static final int ARM64_REG_X20 = 236;
+	public static final int ARM64_REG_X21 = 237;
+	public static final int ARM64_REG_X22 = 238;
+	public static final int ARM64_REG_X23 = 239;
+	public static final int ARM64_REG_X24 = 240;
+	public static final int ARM64_REG_X25 = 241;
+	public static final int ARM64_REG_X26 = 242;
+	public static final int ARM64_REG_X27 = 243;
+	public static final int ARM64_REG_X28 = 244;
+	public static final int ARM64_REG_Z0 = 245;
+	public static final int ARM64_REG_Z1 = 246;
+	public static final int ARM64_REG_Z2 = 247;
+	public static final int ARM64_REG_Z3 = 248;
+	public static final int ARM64_REG_Z4 = 249;
+	public static final int ARM64_REG_Z5 = 250;
+	public static final int ARM64_REG_Z6 = 251;
+	public static final int ARM64_REG_Z7 = 252;
+	public static final int ARM64_REG_Z8 = 253;
+	public static final int ARM64_REG_Z9 = 254;
+	public static final int ARM64_REG_Z10 = 255;
+	public static final int ARM64_REG_Z11 = 256;
+	public static final int ARM64_REG_Z12 = 257;
+	public static final int ARM64_REG_Z13 = 258;
+	public static final int ARM64_REG_Z14 = 259;
+	public static final int ARM64_REG_Z15 = 260;
+	public static final int ARM64_REG_Z16 = 261;
+	public static final int ARM64_REG_Z17 = 262;
+	public static final int ARM64_REG_Z18 = 263;
+	public static final int ARM64_REG_Z19 = 264;
+	public static final int ARM64_REG_Z20 = 265;
+	public static final int ARM64_REG_Z21 = 266;
+	public static final int ARM64_REG_Z22 = 267;
+	public static final int ARM64_REG_Z23 = 268;
+	public static final int ARM64_REG_Z24 = 269;
+	public static final int ARM64_REG_Z25 = 270;
+	public static final int ARM64_REG_Z26 = 271;
+	public static final int ARM64_REG_Z27 = 272;
+	public static final int ARM64_REG_Z28 = 273;
+	public static final int ARM64_REG_Z29 = 274;
+	public static final int ARM64_REG_Z30 = 275;
+	public static final int ARM64_REG_Z31 = 276;
+	public static final int ARM64_REG_V0 = 277;
+	public static final int ARM64_REG_V1 = 278;
+	public static final int ARM64_REG_V2 = 279;
+	public static final int ARM64_REG_V3 = 280;
+	public static final int ARM64_REG_V4 = 281;
+	public static final int ARM64_REG_V5 = 282;
+	public static final int ARM64_REG_V6 = 283;
+	public static final int ARM64_REG_V7 = 284;
+	public static final int ARM64_REG_V8 = 285;
+	public static final int ARM64_REG_V9 = 286;
+	public static final int ARM64_REG_V10 = 287;
+	public static final int ARM64_REG_V11 = 288;
+	public static final int ARM64_REG_V12 = 289;
+	public static final int ARM64_REG_V13 = 290;
+	public static final int ARM64_REG_V14 = 291;
+	public static final int ARM64_REG_V15 = 292;
+	public static final int ARM64_REG_V16 = 293;
+	public static final int ARM64_REG_V17 = 294;
+	public static final int ARM64_REG_V18 = 295;
+	public static final int ARM64_REG_V19 = 296;
+	public static final int ARM64_REG_V20 = 297;
+	public static final int ARM64_REG_V21 = 298;
+	public static final int ARM64_REG_V22 = 299;
+	public static final int ARM64_REG_V23 = 300;
+	public static final int ARM64_REG_V24 = 301;
+	public static final int ARM64_REG_V25 = 302;
+	public static final int ARM64_REG_V26 = 303;
+	public static final int ARM64_REG_V27 = 304;
+	public static final int ARM64_REG_V28 = 305;
+	public static final int ARM64_REG_V29 = 306;
+	public static final int ARM64_REG_V30 = 307;
+	public static final int ARM64_REG_V31 = 308;
+	public static final int ARM64_REG_ENDING = 309;
+	public static final int ARM64_REG_IP0 = ARM64_REG_X16;
+	public static final int ARM64_REG_IP1 = ARM64_REG_X17;
+	public static final int ARM64_REG_X29 = ARM64_REG_FP;
+	public static final int ARM64_REG_X30 = ARM64_REG_LR;
+
+	public static final int ARM64_INS_INVALID = 0;
+	public static final int ARM64_INS_ABS = 1;
+	public static final int ARM64_INS_ADC = 2;
+	public static final int ARM64_INS_ADCS = 3;
+	public static final int ARM64_INS_ADD = 4;
+	public static final int ARM64_INS_ADDHN = 5;
+	public static final int ARM64_INS_ADDHN2 = 6;
+	public static final int ARM64_INS_ADDP = 7;
+	public static final int ARM64_INS_ADDPL = 8;
+	public static final int ARM64_INS_ADDS = 9;
+	public static final int ARM64_INS_ADDV = 10;
+	public static final int ARM64_INS_ADDVL = 11;
+	public static final int ARM64_INS_ADR = 12;
+	public static final int ARM64_INS_ADRP = 13;
+	public static final int ARM64_INS_AESD = 14;
+	public static final int ARM64_INS_AESE = 15;
+	public static final int ARM64_INS_AESIMC = 16;
+	public static final int ARM64_INS_AESMC = 17;
+	public static final int ARM64_INS_AND = 18;
+	public static final int ARM64_INS_ANDS = 19;
+	public static final int ARM64_INS_ANDV = 20;
+	public static final int ARM64_INS_ASR = 21;
+	public static final int ARM64_INS_ASRD = 22;
+	public static final int ARM64_INS_ASRR = 23;
+	public static final int ARM64_INS_ASRV = 24;
+	public static final int ARM64_INS_AUTDA = 25;
+	public static final int ARM64_INS_AUTDB = 26;
+	public static final int ARM64_INS_AUTDZA = 27;
+	public static final int ARM64_INS_AUTDZB = 28;
+	public static final int ARM64_INS_AUTIA = 29;
+	public static final int ARM64_INS_AUTIA1716 = 30;
+	public static final int ARM64_INS_AUTIASP = 31;
+	public static final int ARM64_INS_AUTIAZ = 32;
+	public static final int ARM64_INS_AUTIB = 33;
+	public static final int ARM64_INS_AUTIB1716 = 34;
+	public static final int ARM64_INS_AUTIBSP = 35;
+	public static final int ARM64_INS_AUTIBZ = 36;
+	public static final int ARM64_INS_AUTIZA = 37;
+	public static final int ARM64_INS_AUTIZB = 38;
+	public static final int ARM64_INS_B = 39;
+	public static final int ARM64_INS_BCAX = 40;
+	public static final int ARM64_INS_BFM = 41;
+	public static final int ARM64_INS_BIC = 42;
+	public static final int ARM64_INS_BICS = 43;
+	public static final int ARM64_INS_BIF = 44;
+	public static final int ARM64_INS_BIT = 45;
+	public static final int ARM64_INS_BL = 46;
+	public static final int ARM64_INS_BLR = 47;
+	public static final int ARM64_INS_BLRAA = 48;
+	public static final int ARM64_INS_BLRAAZ = 49;
+	public static final int ARM64_INS_BLRAB = 50;
+	public static final int ARM64_INS_BLRABZ = 51;
+	public static final int ARM64_INS_BR = 52;
+	public static final int ARM64_INS_BRAA = 53;
+	public static final int ARM64_INS_BRAAZ = 54;
+	public static final int ARM64_INS_BRAB = 55;
+	public static final int ARM64_INS_BRABZ = 56;
+	public static final int ARM64_INS_BRK = 57;
+	public static final int ARM64_INS_BRKA = 58;
+	public static final int ARM64_INS_BRKAS = 59;
+	public static final int ARM64_INS_BRKB = 60;
+	public static final int ARM64_INS_BRKBS = 61;
+	public static final int ARM64_INS_BRKN = 62;
+	public static final int ARM64_INS_BRKNS = 63;
+	public static final int ARM64_INS_BRKPA = 64;
+	public static final int ARM64_INS_BRKPAS = 65;
+	public static final int ARM64_INS_BRKPB = 66;
+	public static final int ARM64_INS_BRKPBS = 67;
+	public static final int ARM64_INS_BSL = 68;
+	public static final int ARM64_INS_CAS = 69;
+	public static final int ARM64_INS_CASA = 70;
+	public static final int ARM64_INS_CASAB = 71;
+	public static final int ARM64_INS_CASAH = 72;
+	public static final int ARM64_INS_CASAL = 73;
+	public static final int ARM64_INS_CASALB = 74;
+	public static final int ARM64_INS_CASALH = 75;
+	public static final int ARM64_INS_CASB = 76;
+	public static final int ARM64_INS_CASH = 77;
+	public static final int ARM64_INS_CASL = 78;
+	public static final int ARM64_INS_CASLB = 79;
+	public static final int ARM64_INS_CASLH = 80;
+	public static final int ARM64_INS_CASP = 81;
+	public static final int ARM64_INS_CASPA = 82;
+	public static final int ARM64_INS_CASPAL = 83;
+	public static final int ARM64_INS_CASPL = 84;
+	public static final int ARM64_INS_CBNZ = 85;
+	public static final int ARM64_INS_CBZ = 86;
+	public static final int ARM64_INS_CCMN = 87;
+	public static final int ARM64_INS_CCMP = 88;
+	public static final int ARM64_INS_CFINV = 89;
+	public static final int ARM64_INS_CINC = 90;
+	public static final int ARM64_INS_CINV = 91;
+	public static final int ARM64_INS_CLASTA = 92;
+	public static final int ARM64_INS_CLASTB = 93;
+	public static final int ARM64_INS_CLREX = 94;
+	public static final int ARM64_INS_CLS = 95;
+	public static final int ARM64_INS_CLZ = 96;
+	public static final int ARM64_INS_CMEQ = 97;
+	public static final int ARM64_INS_CMGE = 98;
+	public static final int ARM64_INS_CMGT = 99;
+	public static final int ARM64_INS_CMHI = 100;
+	public static final int ARM64_INS_CMHS = 101;
+	public static final int ARM64_INS_CMLE = 102;
+	public static final int ARM64_INS_CMLO = 103;
+	public static final int ARM64_INS_CMLS = 104;
+	public static final int ARM64_INS_CMLT = 105;
+	public static final int ARM64_INS_CMN = 106;
+	public static final int ARM64_INS_CMP = 107;
+	public static final int ARM64_INS_CMPEQ = 108;
+	public static final int ARM64_INS_CMPGE = 109;
+	public static final int ARM64_INS_CMPGT = 110;
+	public static final int ARM64_INS_CMPHI = 111;
+	public static final int ARM64_INS_CMPHS = 112;
+	public static final int ARM64_INS_CMPLE = 113;
+	public static final int ARM64_INS_CMPLO = 114;
+	public static final int ARM64_INS_CMPLS = 115;
+	public static final int ARM64_INS_CMPLT = 116;
+	public static final int ARM64_INS_CMPNE = 117;
+	public static final int ARM64_INS_CMTST = 118;
+	public static final int ARM64_INS_CNEG = 119;
+	public static final int ARM64_INS_CNOT = 120;
+	public static final int ARM64_INS_CNT = 121;
+	public static final int ARM64_INS_CNTB = 122;
+	public static final int ARM64_INS_CNTD = 123;
+	public static final int ARM64_INS_CNTH = 124;
+	public static final int ARM64_INS_CNTP = 125;
+	public static final int ARM64_INS_CNTW = 126;
+	public static final int ARM64_INS_COMPACT = 127;
+	public static final int ARM64_INS_CPY = 128;
+	public static final int ARM64_INS_CRC32B = 129;
+	public static final int ARM64_INS_CRC32CB = 130;
+	public static final int ARM64_INS_CRC32CH = 131;
+	public static final int ARM64_INS_CRC32CW = 132;
+	public static final int ARM64_INS_CRC32CX = 133;
+	public static final int ARM64_INS_CRC32H = 134;
+	public static final int ARM64_INS_CRC32W = 135;
+	public static final int ARM64_INS_CRC32X = 136;
+	public static final int ARM64_INS_CSDB = 137;
+	public static final int ARM64_INS_CSEL = 138;
+	public static final int ARM64_INS_CSET = 139;
+	public static final int ARM64_INS_CSETM = 140;
+	public static final int ARM64_INS_CSINC = 141;
+	public static final int ARM64_INS_CSINV = 142;
+	public static final int ARM64_INS_CSNEG = 143;
+	public static final int ARM64_INS_CTERMEQ = 144;
+	public static final int ARM64_INS_CTERMNE = 145;
+	public static final int ARM64_INS_DCPS1 = 146;
+	public static final int ARM64_INS_DCPS2 = 147;
+	public static final int ARM64_INS_DCPS3 = 148;
+	public static final int ARM64_INS_DECB = 149;
+	public static final int ARM64_INS_DECD = 150;
+	public static final int ARM64_INS_DECH = 151;
+	public static final int ARM64_INS_DECP = 152;
+	public static final int ARM64_INS_DECW = 153;
+	public static final int ARM64_INS_DMB = 154;
+	public static final int ARM64_INS_DRPS = 155;
+	public static final int ARM64_INS_DSB = 156;
+	public static final int ARM64_INS_DUP = 157;
+	public static final int ARM64_INS_DUPM = 158;
+	public static final int ARM64_INS_EON = 159;
+	public static final int ARM64_INS_EOR = 160;
+	public static final int ARM64_INS_EOR3 = 161;
+	public static final int ARM64_INS_EORS = 162;
+	public static final int ARM64_INS_EORV = 163;
+	public static final int ARM64_INS_ERET = 164;
+	public static final int ARM64_INS_ERETAA = 165;
+	public static final int ARM64_INS_ERETAB = 166;
+	public static final int ARM64_INS_ESB = 167;
+	public static final int ARM64_INS_EXT = 168;
+	public static final int ARM64_INS_EXTR = 169;
+	public static final int ARM64_INS_FABD = 170;
+	public static final int ARM64_INS_FABS = 171;
+	public static final int ARM64_INS_FACGE = 172;
+	public static final int ARM64_INS_FACGT = 173;
+	public static final int ARM64_INS_FACLE = 174;
+	public static final int ARM64_INS_FACLT = 175;
+	public static final int ARM64_INS_FADD = 176;
+	public static final int ARM64_INS_FADDA = 177;
+	public static final int ARM64_INS_FADDP = 178;
+	public static final int ARM64_INS_FADDV = 179;
+	public static final int ARM64_INS_FCADD = 180;
+	public static final int ARM64_INS_FCCMP = 181;
+	public static final int ARM64_INS_FCCMPE = 182;
+	public static final int ARM64_INS_FCMEQ = 183;
+	public static final int ARM64_INS_FCMGE = 184;
+	public static final int ARM64_INS_FCMGT = 185;
+	public static final int ARM64_INS_FCMLA = 186;
+	public static final int ARM64_INS_FCMLE = 187;
+	public static final int ARM64_INS_FCMLT = 188;
+	public static final int ARM64_INS_FCMNE = 189;
+	public static final int ARM64_INS_FCMP = 190;
+	public static final int ARM64_INS_FCMPE = 191;
+	public static final int ARM64_INS_FCMUO = 192;
+	public static final int ARM64_INS_FCPY = 193;
+	public static final int ARM64_INS_FCSEL = 194;
+	public static final int ARM64_INS_FCVT = 195;
+	public static final int ARM64_INS_FCVTAS = 196;
+	public static final int ARM64_INS_FCVTAU = 197;
+	public static final int ARM64_INS_FCVTL = 198;
+	public static final int ARM64_INS_FCVTL2 = 199;
+	public static final int ARM64_INS_FCVTMS = 200;
+	public static final int ARM64_INS_FCVTMU = 201;
+	public static final int ARM64_INS_FCVTN = 202;
+	public static final int ARM64_INS_FCVTN2 = 203;
+	public static final int ARM64_INS_FCVTNS = 204;
+	public static final int ARM64_INS_FCVTNU = 205;
+	public static final int ARM64_INS_FCVTPS = 206;
+	public static final int ARM64_INS_FCVTPU = 207;
+	public static final int ARM64_INS_FCVTXN = 208;
+	public static final int ARM64_INS_FCVTXN2 = 209;
+	public static final int ARM64_INS_FCVTZS = 210;
+	public static final int ARM64_INS_FCVTZU = 211;
+	public static final int ARM64_INS_FDIV = 212;
+	public static final int ARM64_INS_FDIVR = 213;
+	public static final int ARM64_INS_FDUP = 214;
+	public static final int ARM64_INS_FEXPA = 215;
+	public static final int ARM64_INS_FJCVTZS = 216;
+	public static final int ARM64_INS_FMAD = 217;
+	public static final int ARM64_INS_FMADD = 218;
+	public static final int ARM64_INS_FMAX = 219;
+	public static final int ARM64_INS_FMAXNM = 220;
+	public static final int ARM64_INS_FMAXNMP = 221;
+	public static final int ARM64_INS_FMAXNMV = 222;
+	public static final int ARM64_INS_FMAXP = 223;
+	public static final int ARM64_INS_FMAXV = 224;
+	public static final int ARM64_INS_FMIN = 225;
+	public static final int ARM64_INS_FMINNM = 226;
+	public static final int ARM64_INS_FMINNMP = 227;
+	public static final int ARM64_INS_FMINNMV = 228;
+	public static final int ARM64_INS_FMINP = 229;
+	public static final int ARM64_INS_FMINV = 230;
+	public static final int ARM64_INS_FMLA = 231;
+	public static final int ARM64_INS_FMLS = 232;
+	public static final int ARM64_INS_FMOV = 233;
+	public static final int ARM64_INS_FMSB = 234;
+	public static final int ARM64_INS_FMSUB = 235;
+	public static final int ARM64_INS_FMUL = 236;
+	public static final int ARM64_INS_FMULX = 237;
+	public static final int ARM64_INS_FNEG = 238;
+	public static final int ARM64_INS_FNMAD = 239;
+	public static final int ARM64_INS_FNMADD = 240;
+	public static final int ARM64_INS_FNMLA = 241;
+	public static final int ARM64_INS_FNMLS = 242;
+	public static final int ARM64_INS_FNMSB = 243;
+	public static final int ARM64_INS_FNMSUB = 244;
+	public static final int ARM64_INS_FNMUL = 245;
+	public static final int ARM64_INS_FRECPE = 246;
+	public static final int ARM64_INS_FRECPS = 247;
+	public static final int ARM64_INS_FRECPX = 248;
+	public static final int ARM64_INS_FRINTA = 249;
+	public static final int ARM64_INS_FRINTI = 250;
+	public static final int ARM64_INS_FRINTM = 251;
+	public static final int ARM64_INS_FRINTN = 252;
+	public static final int ARM64_INS_FRINTP = 253;
+	public static final int ARM64_INS_FRINTX = 254;
+	public static final int ARM64_INS_FRINTZ = 255;
+	public static final int ARM64_INS_FRSQRTE = 256;
+	public static final int ARM64_INS_FRSQRTS = 257;
+	public static final int ARM64_INS_FSCALE = 258;
+	public static final int ARM64_INS_FSQRT = 259;
+	public static final int ARM64_INS_FSUB = 260;
+	public static final int ARM64_INS_FSUBR = 261;
+	public static final int ARM64_INS_FTMAD = 262;
+	public static final int ARM64_INS_FTSMUL = 263;
+	public static final int ARM64_INS_FTSSEL = 264;
+	public static final int ARM64_INS_HINT = 265;
+	public static final int ARM64_INS_HLT = 266;
+	public static final int ARM64_INS_HVC = 267;
+	public static final int ARM64_INS_INCB = 268;
+	public static final int ARM64_INS_INCD = 269;
+	public static final int ARM64_INS_INCH = 270;
+	public static final int ARM64_INS_INCP = 271;
+	public static final int ARM64_INS_INCW = 272;
+	public static final int ARM64_INS_INDEX = 273;
+	public static final int ARM64_INS_INS = 274;
+	public static final int ARM64_INS_INSR = 275;
+	public static final int ARM64_INS_ISB = 276;
+	public static final int ARM64_INS_LASTA = 277;
+	public static final int ARM64_INS_LASTB = 278;
+	public static final int ARM64_INS_LD1 = 279;
+	public static final int ARM64_INS_LD1B = 280;
+	public static final int ARM64_INS_LD1D = 281;
+	public static final int ARM64_INS_LD1H = 282;
+	public static final int ARM64_INS_LD1R = 283;
+	public static final int ARM64_INS_LD1RB = 284;
+	public static final int ARM64_INS_LD1RD = 285;
+	public static final int ARM64_INS_LD1RH = 286;
+	public static final int ARM64_INS_LD1RQB = 287;
+	public static final int ARM64_INS_LD1RQD = 288;
+	public static final int ARM64_INS_LD1RQH = 289;
+	public static final int ARM64_INS_LD1RQW = 290;
+	public static final int ARM64_INS_LD1RSB = 291;
+	public static final int ARM64_INS_LD1RSH = 292;
+	public static final int ARM64_INS_LD1RSW = 293;
+	public static final int ARM64_INS_LD1RW = 294;
+	public static final int ARM64_INS_LD1SB = 295;
+	public static final int ARM64_INS_LD1SH = 296;
+	public static final int ARM64_INS_LD1SW = 297;
+	public static final int ARM64_INS_LD1W = 298;
+	public static final int ARM64_INS_LD2 = 299;
+	public static final int ARM64_INS_LD2B = 300;
+	public static final int ARM64_INS_LD2D = 301;
+	public static final int ARM64_INS_LD2H = 302;
+	public static final int ARM64_INS_LD2R = 303;
+	public static final int ARM64_INS_LD2W = 304;
+	public static final int ARM64_INS_LD3 = 305;
+	public static final int ARM64_INS_LD3B = 306;
+	public static final int ARM64_INS_LD3D = 307;
+	public static final int ARM64_INS_LD3H = 308;
+	public static final int ARM64_INS_LD3R = 309;
+	public static final int ARM64_INS_LD3W = 310;
+	public static final int ARM64_INS_LD4 = 311;
+	public static final int ARM64_INS_LD4B = 312;
+	public static final int ARM64_INS_LD4D = 313;
+	public static final int ARM64_INS_LD4H = 314;
+	public static final int ARM64_INS_LD4R = 315;
+	public static final int ARM64_INS_LD4W = 316;
+	public static final int ARM64_INS_LDADD = 317;
+	public static final int ARM64_INS_LDADDA = 318;
+	public static final int ARM64_INS_LDADDAB = 319;
+	public static final int ARM64_INS_LDADDAH = 320;
+	public static final int ARM64_INS_LDADDAL = 321;
+	public static final int ARM64_INS_LDADDALB = 322;
+	public static final int ARM64_INS_LDADDALH = 323;
+	public static final int ARM64_INS_LDADDB = 324;
+	public static final int ARM64_INS_LDADDH = 325;
+	public static final int ARM64_INS_LDADDL = 326;
+	public static final int ARM64_INS_LDADDLB = 327;
+	public static final int ARM64_INS_LDADDLH = 328;
+	public static final int ARM64_INS_LDAPR = 329;
+	public static final int ARM64_INS_LDAPRB = 330;
+	public static final int ARM64_INS_LDAPRH = 331;
+	public static final int ARM64_INS_LDAPUR = 332;
+	public static final int ARM64_INS_LDAPURB = 333;
+	public static final int ARM64_INS_LDAPURH = 334;
+	public static final int ARM64_INS_LDAPURSB = 335;
+	public static final int ARM64_INS_LDAPURSH = 336;
+	public static final int ARM64_INS_LDAPURSW = 337;
+	public static final int ARM64_INS_LDAR = 338;
+	public static final int ARM64_INS_LDARB = 339;
+	public static final int ARM64_INS_LDARH = 340;
+	public static final int ARM64_INS_LDAXP = 341;
+	public static final int ARM64_INS_LDAXR = 342;
+	public static final int ARM64_INS_LDAXRB = 343;
+	public static final int ARM64_INS_LDAXRH = 344;
+	public static final int ARM64_INS_LDCLR = 345;
+	public static final int ARM64_INS_LDCLRA = 346;
+	public static final int ARM64_INS_LDCLRAB = 347;
+	public static final int ARM64_INS_LDCLRAH = 348;
+	public static final int ARM64_INS_LDCLRAL = 349;
+	public static final int ARM64_INS_LDCLRALB = 350;
+	public static final int ARM64_INS_LDCLRALH = 351;
+	public static final int ARM64_INS_LDCLRB = 352;
+	public static final int ARM64_INS_LDCLRH = 353;
+	public static final int ARM64_INS_LDCLRL = 354;
+	public static final int ARM64_INS_LDCLRLB = 355;
+	public static final int ARM64_INS_LDCLRLH = 356;
+	public static final int ARM64_INS_LDEOR = 357;
+	public static final int ARM64_INS_LDEORA = 358;
+	public static final int ARM64_INS_LDEORAB = 359;
+	public static final int ARM64_INS_LDEORAH = 360;
+	public static final int ARM64_INS_LDEORAL = 361;
+	public static final int ARM64_INS_LDEORALB = 362;
+	public static final int ARM64_INS_LDEORALH = 363;
+	public static final int ARM64_INS_LDEORB = 364;
+	public static final int ARM64_INS_LDEORH = 365;
+	public static final int ARM64_INS_LDEORL = 366;
+	public static final int ARM64_INS_LDEORLB = 367;
+	public static final int ARM64_INS_LDEORLH = 368;
+	public static final int ARM64_INS_LDFF1B = 369;
+	public static final int ARM64_INS_LDFF1D = 370;
+	public static final int ARM64_INS_LDFF1H = 371;
+	public static final int ARM64_INS_LDFF1SB = 372;
+	public static final int ARM64_INS_LDFF1SH = 373;
+	public static final int ARM64_INS_LDFF1SW = 374;
+	public static final int ARM64_INS_LDFF1W = 375;
+	public static final int ARM64_INS_LDLAR = 376;
+	public static final int ARM64_INS_LDLARB = 377;
+	public static final int ARM64_INS_LDLARH = 378;
+	public static final int ARM64_INS_LDNF1B = 379;
+	public static final int ARM64_INS_LDNF1D = 380;
+	public static final int ARM64_INS_LDNF1H = 381;
+	public static final int ARM64_INS_LDNF1SB = 382;
+	public static final int ARM64_INS_LDNF1SH = 383;
+	public static final int ARM64_INS_LDNF1SW = 384;
+	public static final int ARM64_INS_LDNF1W = 385;
+	public static final int ARM64_INS_LDNP = 386;
+	public static final int ARM64_INS_LDNT1B = 387;
+	public static final int ARM64_INS_LDNT1D = 388;
+	public static final int ARM64_INS_LDNT1H = 389;
+	public static final int ARM64_INS_LDNT1W = 390;
+	public static final int ARM64_INS_LDP = 391;
+	public static final int ARM64_INS_LDPSW = 392;
+	public static final int ARM64_INS_LDR = 393;
+	public static final int ARM64_INS_LDRAA = 394;
+	public static final int ARM64_INS_LDRAB = 395;
+	public static final int ARM64_INS_LDRB = 396;
+	public static final int ARM64_INS_LDRH = 397;
+	public static final int ARM64_INS_LDRSB = 398;
+	public static final int ARM64_INS_LDRSH = 399;
+	public static final int ARM64_INS_LDRSW = 400;
+	public static final int ARM64_INS_LDSET = 401;
+	public static final int ARM64_INS_LDSETA = 402;
+	public static final int ARM64_INS_LDSETAB = 403;
+	public static final int ARM64_INS_LDSETAH = 404;
+	public static final int ARM64_INS_LDSETAL = 405;
+	public static final int ARM64_INS_LDSETALB = 406;
+	public static final int ARM64_INS_LDSETALH = 407;
+	public static final int ARM64_INS_LDSETB = 408;
+	public static final int ARM64_INS_LDSETH = 409;
+	public static final int ARM64_INS_LDSETL = 410;
+	public static final int ARM64_INS_LDSETLB = 411;
+	public static final int ARM64_INS_LDSETLH = 412;
+	public static final int ARM64_INS_LDSMAX = 413;
+	public static final int ARM64_INS_LDSMAXA = 414;
+	public static final int ARM64_INS_LDSMAXAB = 415;
+	public static final int ARM64_INS_LDSMAXAH = 416;
+	public static final int ARM64_INS_LDSMAXAL = 417;
+	public static final int ARM64_INS_LDSMAXALB = 418;
+	public static final int ARM64_INS_LDSMAXALH = 419;
+	public static final int ARM64_INS_LDSMAXB = 420;
+	public static final int ARM64_INS_LDSMAXH = 421;
+	public static final int ARM64_INS_LDSMAXL = 422;
+	public static final int ARM64_INS_LDSMAXLB = 423;
+	public static final int ARM64_INS_LDSMAXLH = 424;
+	public static final int ARM64_INS_LDSMIN = 425;
+	public static final int ARM64_INS_LDSMINA = 426;
+	public static final int ARM64_INS_LDSMINAB = 427;
+	public static final int ARM64_INS_LDSMINAH = 428;
+	public static final int ARM64_INS_LDSMINAL = 429;
+	public static final int ARM64_INS_LDSMINALB = 430;
+	public static final int ARM64_INS_LDSMINALH = 431;
+	public static final int ARM64_INS_LDSMINB = 432;
+	public static final int ARM64_INS_LDSMINH = 433;
+	public static final int ARM64_INS_LDSMINL = 434;
+	public static final int ARM64_INS_LDSMINLB = 435;
+	public static final int ARM64_INS_LDSMINLH = 436;
+	public static final int ARM64_INS_LDTR = 437;
+	public static final int ARM64_INS_LDTRB = 438;
+	public static final int ARM64_INS_LDTRH = 439;
+	public static final int ARM64_INS_LDTRSB = 440;
+	public static final int ARM64_INS_LDTRSH = 441;
+	public static final int ARM64_INS_LDTRSW = 442;
+	public static final int ARM64_INS_LDUMAX = 443;
+	public static final int ARM64_INS_LDUMAXA = 444;
+	public static final int ARM64_INS_LDUMAXAB = 445;
+	public static final int ARM64_INS_LDUMAXAH = 446;
+	public static final int ARM64_INS_LDUMAXAL = 447;
+	public static final int ARM64_INS_LDUMAXALB = 448;
+	public static final int ARM64_INS_LDUMAXALH = 449;
+	public static final int ARM64_INS_LDUMAXB = 450;
+	public static final int ARM64_INS_LDUMAXH = 451;
+	public static final int ARM64_INS_LDUMAXL = 452;
+	public static final int ARM64_INS_LDUMAXLB = 453;
+	public static final int ARM64_INS_LDUMAXLH = 454;
+	public static final int ARM64_INS_LDUMIN = 455;
+	public static final int ARM64_INS_LDUMINA = 456;
+	public static final int ARM64_INS_LDUMINAB = 457;
+	public static final int ARM64_INS_LDUMINAH = 458;
+	public static final int ARM64_INS_LDUMINAL = 459;
+	public static final int ARM64_INS_LDUMINALB = 460;
+	public static final int ARM64_INS_LDUMINALH = 461;
+	public static final int ARM64_INS_LDUMINB = 462;
+	public static final int ARM64_INS_LDUMINH = 463;
+	public static final int ARM64_INS_LDUMINL = 464;
+	public static final int ARM64_INS_LDUMINLB = 465;
+	public static final int ARM64_INS_LDUMINLH = 466;
+	public static final int ARM64_INS_LDUR = 467;
+	public static final int ARM64_INS_LDURB = 468;
+	public static final int ARM64_INS_LDURH = 469;
+	public static final int ARM64_INS_LDURSB = 470;
+	public static final int ARM64_INS_LDURSH = 471;
+	public static final int ARM64_INS_LDURSW = 472;
+	public static final int ARM64_INS_LDXP = 473;
+	public static final int ARM64_INS_LDXR = 474;
+	public static final int ARM64_INS_LDXRB = 475;
+	public static final int ARM64_INS_LDXRH = 476;
+	public static final int ARM64_INS_LSL = 477;
+	public static final int ARM64_INS_LSLR = 478;
+	public static final int ARM64_INS_LSLV = 479;
+	public static final int ARM64_INS_LSR = 480;
+	public static final int ARM64_INS_LSRR = 481;
+	public static final int ARM64_INS_LSRV = 482;
+	public static final int ARM64_INS_MAD = 483;
+	public static final int ARM64_INS_MADD = 484;
+	public static final int ARM64_INS_MLA = 485;
+	public static final int ARM64_INS_MLS = 486;
+	public static final int ARM64_INS_MNEG = 487;
+	public static final int ARM64_INS_MOV = 488;
+	public static final int ARM64_INS_MOVI = 489;
+	public static final int ARM64_INS_MOVK = 490;
+	public static final int ARM64_INS_MOVN = 491;
+	public static final int ARM64_INS_MOVPRFX = 492;
+	public static final int ARM64_INS_MOVS = 493;
+	public static final int ARM64_INS_MOVZ = 494;
+	public static final int ARM64_INS_MRS = 495;
+	public static final int ARM64_INS_MSB = 496;
+	public static final int ARM64_INS_MSR = 497;
+	public static final int ARM64_INS_MSUB = 498;
+	public static final int ARM64_INS_MUL = 499;
+	public static final int ARM64_INS_MVN = 500;
+	public static final int ARM64_INS_MVNI = 501;
+	public static final int ARM64_INS_NAND = 502;
+	public static final int ARM64_INS_NANDS = 503;
+	public static final int ARM64_INS_NEG = 504;
+	public static final int ARM64_INS_NEGS = 505;
+	public static final int ARM64_INS_NGC = 506;
+	public static final int ARM64_INS_NGCS = 507;
+	public static final int ARM64_INS_NOP = 508;
+	public static final int ARM64_INS_NOR = 509;
+	public static final int ARM64_INS_NORS = 510;
+	public static final int ARM64_INS_NOT = 511;
+	public static final int ARM64_INS_NOTS = 512;
+	public static final int ARM64_INS_ORN = 513;
+	public static final int ARM64_INS_ORNS = 514;
+	public static final int ARM64_INS_ORR = 515;
+	public static final int ARM64_INS_ORRS = 516;
+	public static final int ARM64_INS_ORV = 517;
+	public static final int ARM64_INS_PACDA = 518;
+	public static final int ARM64_INS_PACDB = 519;
+	public static final int ARM64_INS_PACDZA = 520;
+	public static final int ARM64_INS_PACDZB = 521;
+	public static final int ARM64_INS_PACGA = 522;
+	public static final int ARM64_INS_PACIA = 523;
+	public static final int ARM64_INS_PACIA1716 = 524;
+	public static final int ARM64_INS_PACIASP = 525;
+	public static final int ARM64_INS_PACIAZ = 526;
+	public static final int ARM64_INS_PACIB = 527;
+	public static final int ARM64_INS_PACIB1716 = 528;
+	public static final int ARM64_INS_PACIBSP = 529;
+	public static final int ARM64_INS_PACIBZ = 530;
+	public static final int ARM64_INS_PACIZA = 531;
+	public static final int ARM64_INS_PACIZB = 532;
+	public static final int ARM64_INS_PFALSE = 533;
+	public static final int ARM64_INS_PFIRST = 534;
+	public static final int ARM64_INS_PMUL = 535;
+	public static final int ARM64_INS_PMULL = 536;
+	public static final int ARM64_INS_PMULL2 = 537;
+	public static final int ARM64_INS_PNEXT = 538;
+	public static final int ARM64_INS_PRFB = 539;
+	public static final int ARM64_INS_PRFD = 540;
+	public static final int ARM64_INS_PRFH = 541;
+	public static final int ARM64_INS_PRFM = 542;
+	public static final int ARM64_INS_PRFUM = 543;
+	public static final int ARM64_INS_PRFW = 544;
+	public static final int ARM64_INS_PSB = 545;
+	public static final int ARM64_INS_PTEST = 546;
+	public static final int ARM64_INS_PTRUE = 547;
+	public static final int ARM64_INS_PTRUES = 548;
+	public static final int ARM64_INS_PUNPKHI = 549;
+	public static final int ARM64_INS_PUNPKLO = 550;
+	public static final int ARM64_INS_RADDHN = 551;
+	public static final int ARM64_INS_RADDHN2 = 552;
+	public static final int ARM64_INS_RAX1 = 553;
+	public static final int ARM64_INS_RBIT = 554;
+	public static final int ARM64_INS_RDFFR = 555;
+	public static final int ARM64_INS_RDFFRS = 556;
+	public static final int ARM64_INS_RDVL = 557;
+	public static final int ARM64_INS_RET = 558;
+	public static final int ARM64_INS_RETAA = 559;
+	public static final int ARM64_INS_RETAB = 560;
+	public static final int ARM64_INS_REV = 561;
+	public static final int ARM64_INS_REV16 = 562;
+	public static final int ARM64_INS_REV32 = 563;
+	public static final int ARM64_INS_REV64 = 564;
+	public static final int ARM64_INS_REVB = 565;
+	public static final int ARM64_INS_REVH = 566;
+	public static final int ARM64_INS_REVW = 567;
+	public static final int ARM64_INS_RMIF = 568;
+	public static final int ARM64_INS_ROR = 569;
+	public static final int ARM64_INS_RORV = 570;
+	public static final int ARM64_INS_RSHRN = 571;
+	public static final int ARM64_INS_RSHRN2 = 572;
+	public static final int ARM64_INS_RSUBHN = 573;
+	public static final int ARM64_INS_RSUBHN2 = 574;
+	public static final int ARM64_INS_SABA = 575;
+	public static final int ARM64_INS_SABAL = 576;
+	public static final int ARM64_INS_SABAL2 = 577;
+	public static final int ARM64_INS_SABD = 578;
+	public static final int ARM64_INS_SABDL = 579;
+	public static final int ARM64_INS_SABDL2 = 580;
+	public static final int ARM64_INS_SADALP = 581;
+	public static final int ARM64_INS_SADDL = 582;
+	public static final int ARM64_INS_SADDL2 = 583;
+	public static final int ARM64_INS_SADDLP = 584;
+	public static final int ARM64_INS_SADDLV = 585;
+	public static final int ARM64_INS_SADDV = 586;
+	public static final int ARM64_INS_SADDW = 587;
+	public static final int ARM64_INS_SADDW2 = 588;
+	public static final int ARM64_INS_SBC = 589;
+	public static final int ARM64_INS_SBCS = 590;
+	public static final int ARM64_INS_SBFM = 591;
+	public static final int ARM64_INS_SCVTF = 592;
+	public static final int ARM64_INS_SDIV = 593;
+	public static final int ARM64_INS_SDIVR = 594;
+	public static final int ARM64_INS_SDOT = 595;
+	public static final int ARM64_INS_SEL = 596;
+	public static final int ARM64_INS_SETF16 = 597;
+	public static final int ARM64_INS_SETF8 = 598;
+	public static final int ARM64_INS_SETFFR = 599;
+	public static final int ARM64_INS_SEV = 600;
+	public static final int ARM64_INS_SEVL = 601;
+	public static final int ARM64_INS_SHA1C = 602;
+	public static final int ARM64_INS_SHA1H = 603;
+	public static final int ARM64_INS_SHA1M = 604;
+	public static final int ARM64_INS_SHA1P = 605;
+	public static final int ARM64_INS_SHA1SU0 = 606;
+	public static final int ARM64_INS_SHA1SU1 = 607;
+	public static final int ARM64_INS_SHA256H = 608;
+	public static final int ARM64_INS_SHA256H2 = 609;
+	public static final int ARM64_INS_SHA256SU0 = 610;
+	public static final int ARM64_INS_SHA256SU1 = 611;
+	public static final int ARM64_INS_SHA512H = 612;
+	public static final int ARM64_INS_SHA512H2 = 613;
+	public static final int ARM64_INS_SHA512SU0 = 614;
+	public static final int ARM64_INS_SHA512SU1 = 615;
+	public static final int ARM64_INS_SHADD = 616;
+	public static final int ARM64_INS_SHL = 617;
+	public static final int ARM64_INS_SHLL = 618;
+	public static final int ARM64_INS_SHLL2 = 619;
+	public static final int ARM64_INS_SHRN = 620;
+	public static final int ARM64_INS_SHRN2 = 621;
+	public static final int ARM64_INS_SHSUB = 622;
+	public static final int ARM64_INS_SLI = 623;
+	public static final int ARM64_INS_SM3PARTW1 = 624;
+	public static final int ARM64_INS_SM3PARTW2 = 625;
+	public static final int ARM64_INS_SM3SS1 = 626;
+	public static final int ARM64_INS_SM3TT1A = 627;
+	public static final int ARM64_INS_SM3TT1B = 628;
+	public static final int ARM64_INS_SM3TT2A = 629;
+	public static final int ARM64_INS_SM3TT2B = 630;
+	public static final int ARM64_INS_SM4E = 631;
+	public static final int ARM64_INS_SM4EKEY = 632;
+	public static final int ARM64_INS_SMADDL = 633;
+	public static final int ARM64_INS_SMAX = 634;
+	public static final int ARM64_INS_SMAXP = 635;
+	public static final int ARM64_INS_SMAXV = 636;
+	public static final int ARM64_INS_SMC = 637;
+	public static final int ARM64_INS_SMIN = 638;
+	public static final int ARM64_INS_SMINP = 639;
+	public static final int ARM64_INS_SMINV = 640;
+	public static final int ARM64_INS_SMLAL = 641;
+	public static final int ARM64_INS_SMLAL2 = 642;
+	public static final int ARM64_INS_SMLSL = 643;
+	public static final int ARM64_INS_SMLSL2 = 644;
+	public static final int ARM64_INS_SMNEGL = 645;
+	public static final int ARM64_INS_SMOV = 646;
+	public static final int ARM64_INS_SMSUBL = 647;
+	public static final int ARM64_INS_SMULH = 648;
+	public static final int ARM64_INS_SMULL = 649;
+	public static final int ARM64_INS_SMULL2 = 650;
+	public static final int ARM64_INS_SPLICE = 651;
+	public static final int ARM64_INS_SQABS = 652;
+	public static final int ARM64_INS_SQADD = 653;
+	public static final int ARM64_INS_SQDECB = 654;
+	public static final int ARM64_INS_SQDECD = 655;
+	public static final int ARM64_INS_SQDECH = 656;
+	public static final int ARM64_INS_SQDECP = 657;
+	public static final int ARM64_INS_SQDECW = 658;
+	public static final int ARM64_INS_SQDMLAL = 659;
+	public static final int ARM64_INS_SQDMLAL2 = 660;
+	public static final int ARM64_INS_SQDMLSL = 661;
+	public static final int ARM64_INS_SQDMLSL2 = 662;
+	public static final int ARM64_INS_SQDMULH = 663;
+	public static final int ARM64_INS_SQDMULL = 664;
+	public static final int ARM64_INS_SQDMULL2 = 665;
+	public static final int ARM64_INS_SQINCB = 666;
+	public static final int ARM64_INS_SQINCD = 667;
+	public static final int ARM64_INS_SQINCH = 668;
+	public static final int ARM64_INS_SQINCP = 669;
+	public static final int ARM64_INS_SQINCW = 670;
+	public static final int ARM64_INS_SQNEG = 671;
+	public static final int ARM64_INS_SQRDMLAH = 672;
+	public static final int ARM64_INS_SQRDMLSH = 673;
+	public static final int ARM64_INS_SQRDMULH = 674;
+	public static final int ARM64_INS_SQRSHL = 675;
+	public static final int ARM64_INS_SQRSHRN = 676;
+	public static final int ARM64_INS_SQRSHRN2 = 677;
+	public static final int ARM64_INS_SQRSHRUN = 678;
+	public static final int ARM64_INS_SQRSHRUN2 = 679;
+	public static final int ARM64_INS_SQSHL = 680;
+	public static final int ARM64_INS_SQSHLU = 681;
+	public static final int ARM64_INS_SQSHRN = 682;
+	public static final int ARM64_INS_SQSHRN2 = 683;
+	public static final int ARM64_INS_SQSHRUN = 684;
+	public static final int ARM64_INS_SQSHRUN2 = 685;
+	public static final int ARM64_INS_SQSUB = 686;
+	public static final int ARM64_INS_SQXTN = 687;
+	public static final int ARM64_INS_SQXTN2 = 688;
+	public static final int ARM64_INS_SQXTUN = 689;
+	public static final int ARM64_INS_SQXTUN2 = 690;
+	public static final int ARM64_INS_SRHADD = 691;
+	public static final int ARM64_INS_SRI = 692;
+	public static final int ARM64_INS_SRSHL = 693;
+	public static final int ARM64_INS_SRSHR = 694;
+	public static final int ARM64_INS_SRSRA = 695;
+	public static final int ARM64_INS_SSHL = 696;
+	public static final int ARM64_INS_SSHLL = 697;
+	public static final int ARM64_INS_SSHLL2 = 698;
+	public static final int ARM64_INS_SSHR = 699;
+	public static final int ARM64_INS_SSRA = 700;
+	public static final int ARM64_INS_SSUBL = 701;
+	public static final int ARM64_INS_SSUBL2 = 702;
+	public static final int ARM64_INS_SSUBW = 703;
+	public static final int ARM64_INS_SSUBW2 = 704;
+	public static final int ARM64_INS_ST1 = 705;
+	public static final int ARM64_INS_ST1B = 706;
+	public static final int ARM64_INS_ST1D = 707;
+	public static final int ARM64_INS_ST1H = 708;
+	public static final int ARM64_INS_ST1W = 709;
+	public static final int ARM64_INS_ST2 = 710;
+	public static final int ARM64_INS_ST2B = 711;
+	public static final int ARM64_INS_ST2D = 712;
+	public static final int ARM64_INS_ST2H = 713;
+	public static final int ARM64_INS_ST2W = 714;
+	public static final int ARM64_INS_ST3 = 715;
+	public static final int ARM64_INS_ST3B = 716;
+	public static final int ARM64_INS_ST3D = 717;
+	public static final int ARM64_INS_ST3H = 718;
+	public static final int ARM64_INS_ST3W = 719;
+	public static final int ARM64_INS_ST4 = 720;
+	public static final int ARM64_INS_ST4B = 721;
+	public static final int ARM64_INS_ST4D = 722;
+	public static final int ARM64_INS_ST4H = 723;
+	public static final int ARM64_INS_ST4W = 724;
+	public static final int ARM64_INS_STADD = 725;
+	public static final int ARM64_INS_STADDB = 726;
+	public static final int ARM64_INS_STADDH = 727;
+	public static final int ARM64_INS_STADDL = 728;
+	public static final int ARM64_INS_STADDLB = 729;
+	public static final int ARM64_INS_STADDLH = 730;
+	public static final int ARM64_INS_STCLR = 731;
+	public static final int ARM64_INS_STCLRB = 732;
+	public static final int ARM64_INS_STCLRH = 733;
+	public static final int ARM64_INS_STCLRL = 734;
+	public static final int ARM64_INS_STCLRLB = 735;
+	public static final int ARM64_INS_STCLRLH = 736;
+	public static final int ARM64_INS_STEOR = 737;
+	public static final int ARM64_INS_STEORB = 738;
+	public static final int ARM64_INS_STEORH = 739;
+	public static final int ARM64_INS_STEORL = 740;
+	public static final int ARM64_INS_STEORLB = 741;
+	public static final int ARM64_INS_STEORLH = 742;
+	public static final int ARM64_INS_STLLR = 743;
+	public static final int ARM64_INS_STLLRB = 744;
+	public static final int ARM64_INS_STLLRH = 745;
+	public static final int ARM64_INS_STLR = 746;
+	public static final int ARM64_INS_STLRB = 747;
+	public static final int ARM64_INS_STLRH = 748;
+	public static final int ARM64_INS_STLUR = 749;
+	public static final int ARM64_INS_STLURB = 750;
+	public static final int ARM64_INS_STLURH = 751;
+	public static final int ARM64_INS_STLXP = 752;
+	public static final int ARM64_INS_STLXR = 753;
+	public static final int ARM64_INS_STLXRB = 754;
+	public static final int ARM64_INS_STLXRH = 755;
+	public static final int ARM64_INS_STNP = 756;
+	public static final int ARM64_INS_STNT1B = 757;
+	public static final int ARM64_INS_STNT1D = 758;
+	public static final int ARM64_INS_STNT1H = 759;
+	public static final int ARM64_INS_STNT1W = 760;
+	public static final int ARM64_INS_STP = 761;
+	public static final int ARM64_INS_STR = 762;
+	public static final int ARM64_INS_STRB = 763;
+	public static final int ARM64_INS_STRH = 764;
+	public static final int ARM64_INS_STSET = 765;
+	public static final int ARM64_INS_STSETB = 766;
+	public static final int ARM64_INS_STSETH = 767;
+	public static final int ARM64_INS_STSETL = 768;
+	public static final int ARM64_INS_STSETLB = 769;
+	public static final int ARM64_INS_STSETLH = 770;
+	public static final int ARM64_INS_STSMAX = 771;
+	public static final int ARM64_INS_STSMAXB = 772;
+	public static final int ARM64_INS_STSMAXH = 773;
+	public static final int ARM64_INS_STSMAXL = 774;
+	public static final int ARM64_INS_STSMAXLB = 775;
+	public static final int ARM64_INS_STSMAXLH = 776;
+	public static final int ARM64_INS_STSMIN = 777;
+	public static final int ARM64_INS_STSMINB = 778;
+	public static final int ARM64_INS_STSMINH = 779;
+	public static final int ARM64_INS_STSMINL = 780;
+	public static final int ARM64_INS_STSMINLB = 781;
+	public static final int ARM64_INS_STSMINLH = 782;
+	public static final int ARM64_INS_STTR = 783;
+	public static final int ARM64_INS_STTRB = 784;
+	public static final int ARM64_INS_STTRH = 785;
+	public static final int ARM64_INS_STUMAX = 786;
+	public static final int ARM64_INS_STUMAXB = 787;
+	public static final int ARM64_INS_STUMAXH = 788;
+	public static final int ARM64_INS_STUMAXL = 789;
+	public static final int ARM64_INS_STUMAXLB = 790;
+	public static final int ARM64_INS_STUMAXLH = 791;
+	public static final int ARM64_INS_STUMIN = 792;
+	public static final int ARM64_INS_STUMINB = 793;
+	public static final int ARM64_INS_STUMINH = 794;
+	public static final int ARM64_INS_STUMINL = 795;
+	public static final int ARM64_INS_STUMINLB = 796;
+	public static final int ARM64_INS_STUMINLH = 797;
+	public static final int ARM64_INS_STUR = 798;
+	public static final int ARM64_INS_STURB = 799;
+	public static final int ARM64_INS_STURH = 800;
+	public static final int ARM64_INS_STXP = 801;
+	public static final int ARM64_INS_STXR = 802;
+	public static final int ARM64_INS_STXRB = 803;
+	public static final int ARM64_INS_STXRH = 804;
+	public static final int ARM64_INS_SUB = 805;
+	public static final int ARM64_INS_SUBHN = 806;
+	public static final int ARM64_INS_SUBHN2 = 807;
+	public static final int ARM64_INS_SUBR = 808;
+	public static final int ARM64_INS_SUBS = 809;
+	public static final int ARM64_INS_SUNPKHI = 810;
+	public static final int ARM64_INS_SUNPKLO = 811;
+	public static final int ARM64_INS_SUQADD = 812;
+	public static final int ARM64_INS_SVC = 813;
+	public static final int ARM64_INS_SWP = 814;
+	public static final int ARM64_INS_SWPA = 815;
+	public static final int ARM64_INS_SWPAB = 816;
+	public static final int ARM64_INS_SWPAH = 817;
+	public static final int ARM64_INS_SWPAL = 818;
+	public static final int ARM64_INS_SWPALB = 819;
+	public static final int ARM64_INS_SWPALH = 820;
+	public static final int ARM64_INS_SWPB = 821;
+	public static final int ARM64_INS_SWPH = 822;
+	public static final int ARM64_INS_SWPL = 823;
+	public static final int ARM64_INS_SWPLB = 824;
+	public static final int ARM64_INS_SWPLH = 825;
+	public static final int ARM64_INS_SXTB = 826;
+	public static final int ARM64_INS_SXTH = 827;
+	public static final int ARM64_INS_SXTL = 828;
+	public static final int ARM64_INS_SXTL2 = 829;
+	public static final int ARM64_INS_SXTW = 830;
+	public static final int ARM64_INS_SYS = 831;
+	public static final int ARM64_INS_SYSL = 832;
+	public static final int ARM64_INS_TBL = 833;
+	public static final int ARM64_INS_TBNZ = 834;
+	public static final int ARM64_INS_TBX = 835;
+	public static final int ARM64_INS_TBZ = 836;
+	public static final int ARM64_INS_TRN1 = 837;
+	public static final int ARM64_INS_TRN2 = 838;
+	public static final int ARM64_INS_TSB = 839;
+	public static final int ARM64_INS_TST = 840;
+	public static final int ARM64_INS_UABA = 841;
+	public static final int ARM64_INS_UABAL = 842;
+	public static final int ARM64_INS_UABAL2 = 843;
+	public static final int ARM64_INS_UABD = 844;
+	public static final int ARM64_INS_UABDL = 845;
+	public static final int ARM64_INS_UABDL2 = 846;
+	public static final int ARM64_INS_UADALP = 847;
+	public static final int ARM64_INS_UADDL = 848;
+	public static final int ARM64_INS_UADDL2 = 849;
+	public static final int ARM64_INS_UADDLP = 850;
+	public static final int ARM64_INS_UADDLV = 851;
+	public static final int ARM64_INS_UADDV = 852;
+	public static final int ARM64_INS_UADDW = 853;
+	public static final int ARM64_INS_UADDW2 = 854;
+	public static final int ARM64_INS_UBFM = 855;
+	public static final int ARM64_INS_UCVTF = 856;
+	public static final int ARM64_INS_UDIV = 857;
+	public static final int ARM64_INS_UDIVR = 858;
+	public static final int ARM64_INS_UDOT = 859;
+	public static final int ARM64_INS_UHADD = 860;
+	public static final int ARM64_INS_UHSUB = 861;
+	public static final int ARM64_INS_UMADDL = 862;
+	public static final int ARM64_INS_UMAX = 863;
+	public static final int ARM64_INS_UMAXP = 864;
+	public static final int ARM64_INS_UMAXV = 865;
+	public static final int ARM64_INS_UMIN = 866;
+	public static final int ARM64_INS_UMINP = 867;
+	public static final int ARM64_INS_UMINV = 868;
+	public static final int ARM64_INS_UMLAL = 869;
+	public static final int ARM64_INS_UMLAL2 = 870;
+	public static final int ARM64_INS_UMLSL = 871;
+	public static final int ARM64_INS_UMLSL2 = 872;
+	public static final int ARM64_INS_UMNEGL = 873;
+	public static final int ARM64_INS_UMOV = 874;
+	public static final int ARM64_INS_UMSUBL = 875;
+	public static final int ARM64_INS_UMULH = 876;
+	public static final int ARM64_INS_UMULL = 877;
+	public static final int ARM64_INS_UMULL2 = 878;
+	public static final int ARM64_INS_UQADD = 879;
+	public static final int ARM64_INS_UQDECB = 880;
+	public static final int ARM64_INS_UQDECD = 881;
+	public static final int ARM64_INS_UQDECH = 882;
+	public static final int ARM64_INS_UQDECP = 883;
+	public static final int ARM64_INS_UQDECW = 884;
+	public static final int ARM64_INS_UQINCB = 885;
+	public static final int ARM64_INS_UQINCD = 886;
+	public static final int ARM64_INS_UQINCH = 887;
+	public static final int ARM64_INS_UQINCP = 888;
+	public static final int ARM64_INS_UQINCW = 889;
+	public static final int ARM64_INS_UQRSHL = 890;
+	public static final int ARM64_INS_UQRSHRN = 891;
+	public static final int ARM64_INS_UQRSHRN2 = 892;
+	public static final int ARM64_INS_UQSHL = 893;
+	public static final int ARM64_INS_UQSHRN = 894;
+	public static final int ARM64_INS_UQSHRN2 = 895;
+	public static final int ARM64_INS_UQSUB = 896;
+	public static final int ARM64_INS_UQXTN = 897;
+	public static final int ARM64_INS_UQXTN2 = 898;
+	public static final int ARM64_INS_URECPE = 899;
+	public static final int ARM64_INS_URHADD = 900;
+	public static final int ARM64_INS_URSHL = 901;
+	public static final int ARM64_INS_URSHR = 902;
+	public static final int ARM64_INS_URSQRTE = 903;
+	public static final int ARM64_INS_URSRA = 904;
+	public static final int ARM64_INS_USHL = 905;
+	public static final int ARM64_INS_USHLL = 906;
+	public static final int ARM64_INS_USHLL2 = 907;
+	public static final int ARM64_INS_USHR = 908;
+	public static final int ARM64_INS_USQADD = 909;
+	public static final int ARM64_INS_USRA = 910;
+	public static final int ARM64_INS_USUBL = 911;
+	public static final int ARM64_INS_USUBL2 = 912;
+	public static final int ARM64_INS_USUBW = 913;
+	public static final int ARM64_INS_USUBW2 = 914;
+	public static final int ARM64_INS_UUNPKHI = 915;
+	public static final int ARM64_INS_UUNPKLO = 916;
+	public static final int ARM64_INS_UXTB = 917;
+	public static final int ARM64_INS_UXTH = 918;
+	public static final int ARM64_INS_UXTL = 919;
+	public static final int ARM64_INS_UXTL2 = 920;
+	public static final int ARM64_INS_UXTW = 921;
+	public static final int ARM64_INS_UZP1 = 922;
+	public static final int ARM64_INS_UZP2 = 923;
+	public static final int ARM64_INS_WFE = 924;
+	public static final int ARM64_INS_WFI = 925;
+	public static final int ARM64_INS_WHILELE = 926;
+	public static final int ARM64_INS_WHILELO = 927;
+	public static final int ARM64_INS_WHILELS = 928;
+	public static final int ARM64_INS_WHILELT = 929;
+	public static final int ARM64_INS_WRFFR = 930;
+	public static final int ARM64_INS_XAR = 931;
+	public static final int ARM64_INS_XPACD = 932;
+	public static final int ARM64_INS_XPACI = 933;
+	public static final int ARM64_INS_XPACLRI = 934;
+	public static final int ARM64_INS_XTN = 935;
+	public static final int ARM64_INS_XTN2 = 936;
+	public static final int ARM64_INS_YIELD = 937;
+	public static final int ARM64_INS_ZIP1 = 938;
+	public static final int ARM64_INS_ZIP2 = 939;
+	public static final int ARM64_INS_SBFIZ = 940;
+	public static final int ARM64_INS_UBFIZ = 941;
+	public static final int ARM64_INS_SBFX = 942;
+	public static final int ARM64_INS_UBFX = 943;
+	public static final int ARM64_INS_BFI = 944;
+	public static final int ARM64_INS_BFXIL = 945;
+	public static final int ARM64_INS_IC = 946;
+	public static final int ARM64_INS_DC = 947;
+	public static final int ARM64_INS_AT = 948;
+	public static final int ARM64_INS_TLBI = 949;
+	public static final int ARM64_INS_ENDING = 950;
+
+	public static final int ARM64_GRP_INVALID = 0;
+	public static final int ARM64_GRP_JUMP = 1;
+	public static final int ARM64_GRP_CALL = 2;
+	public static final int ARM64_GRP_RET = 3;
+	public static final int ARM64_GRP_INT = 4;
+	public static final int ARM64_GRP_PRIVILEGE = 6;
+	public static final int ARM64_GRP_BRANCH_RELATIVE = 7;
+	public static final int ARM64_GRP_CRYPTO = 128;
+	public static final int ARM64_GRP_FPARMV8 = 129;
+	public static final int ARM64_GRP_NEON = 130;
+	public static final int ARM64_GRP_CRC = 131;
+	public static final int ARM64_GRP_AES = 132;
+	public static final int ARM64_GRP_DOTPROD = 133;
+	public static final int ARM64_GRP_FULLFP16 = 134;
+	public static final int ARM64_GRP_LSE = 135;
+	public static final int ARM64_GRP_RCPC = 136;
+	public static final int ARM64_GRP_RDM = 137;
+	public static final int ARM64_GRP_SHA2 = 138;
+	public static final int ARM64_GRP_SHA3 = 139;
+	public static final int ARM64_GRP_SM4 = 140;
+	public static final int ARM64_GRP_SVE = 141;
+	public static final int ARM64_GRP_V8_1A = 142;
+	public static final int ARM64_GRP_V8_3A = 143;
+	public static final int ARM64_GRP_V8_4A = 144;
+	public static final int ARM64_GRP_ENDING = 145;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Arm_const.java b/capstone/bindings/java/capstone/Arm_const.java
new file mode 100644
index 000000000..90af472bd
--- /dev/null
+++ b/capstone/bindings/java/capstone/Arm_const.java
@@ -0,0 +1,834 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Arm_const {
+
+	public static final int ARM_SFT_INVALID = 0;
+	public static final int ARM_SFT_ASR = 1;
+	public static final int ARM_SFT_LSL = 2;
+	public static final int ARM_SFT_LSR = 3;
+	public static final int ARM_SFT_ROR = 4;
+	public static final int ARM_SFT_RRX = 5;
+	public static final int ARM_SFT_ASR_REG = 6;
+	public static final int ARM_SFT_LSL_REG = 7;
+	public static final int ARM_SFT_LSR_REG = 8;
+	public static final int ARM_SFT_ROR_REG = 9;
+	public static final int ARM_SFT_RRX_REG = 10;
+
+	public static final int ARM_CC_INVALID = 0;
+	public static final int ARM_CC_EQ = 1;
+	public static final int ARM_CC_NE = 2;
+	public static final int ARM_CC_HS = 3;
+	public static final int ARM_CC_LO = 4;
+	public static final int ARM_CC_MI = 5;
+	public static final int ARM_CC_PL = 6;
+	public static final int ARM_CC_VS = 7;
+	public static final int ARM_CC_VC = 8;
+	public static final int ARM_CC_HI = 9;
+	public static final int ARM_CC_LS = 10;
+	public static final int ARM_CC_GE = 11;
+	public static final int ARM_CC_LT = 12;
+	public static final int ARM_CC_GT = 13;
+	public static final int ARM_CC_LE = 14;
+	public static final int ARM_CC_AL = 15;
+
+	public static final int ARM_SYSREG_INVALID = 0;
+	public static final int ARM_SYSREG_SPSR_C = 1;
+	public static final int ARM_SYSREG_SPSR_X = 2;
+	public static final int ARM_SYSREG_SPSR_S = 4;
+	public static final int ARM_SYSREG_SPSR_F = 8;
+	public static final int ARM_SYSREG_CPSR_C = 16;
+	public static final int ARM_SYSREG_CPSR_X = 32;
+	public static final int ARM_SYSREG_CPSR_S = 64;
+	public static final int ARM_SYSREG_CPSR_F = 128;
+	public static final int ARM_SYSREG_APSR = 256;
+	public static final int ARM_SYSREG_APSR_G = 257;
+	public static final int ARM_SYSREG_APSR_NZCVQ = 258;
+	public static final int ARM_SYSREG_APSR_NZCVQG = 259;
+	public static final int ARM_SYSREG_IAPSR = 260;
+	public static final int ARM_SYSREG_IAPSR_G = 261;
+	public static final int ARM_SYSREG_IAPSR_NZCVQG = 262;
+	public static final int ARM_SYSREG_IAPSR_NZCVQ = 263;
+	public static final int ARM_SYSREG_EAPSR = 264;
+	public static final int ARM_SYSREG_EAPSR_G = 265;
+	public static final int ARM_SYSREG_EAPSR_NZCVQG = 266;
+	public static final int ARM_SYSREG_EAPSR_NZCVQ = 267;
+	public static final int ARM_SYSREG_XPSR = 268;
+	public static final int ARM_SYSREG_XPSR_G = 269;
+	public static final int ARM_SYSREG_XPSR_NZCVQG = 270;
+	public static final int ARM_SYSREG_XPSR_NZCVQ = 271;
+	public static final int ARM_SYSREG_IPSR = 272;
+	public static final int ARM_SYSREG_EPSR = 273;
+	public static final int ARM_SYSREG_IEPSR = 274;
+	public static final int ARM_SYSREG_MSP = 275;
+	public static final int ARM_SYSREG_PSP = 276;
+	public static final int ARM_SYSREG_PRIMASK = 277;
+	public static final int ARM_SYSREG_BASEPRI = 278;
+	public static final int ARM_SYSREG_BASEPRI_MAX = 279;
+	public static final int ARM_SYSREG_FAULTMASK = 280;
+	public static final int ARM_SYSREG_CONTROL = 281;
+	public static final int ARM_SYSREG_MSPLIM = 282;
+	public static final int ARM_SYSREG_PSPLIM = 283;
+	public static final int ARM_SYSREG_MSP_NS = 284;
+	public static final int ARM_SYSREG_PSP_NS = 285;
+	public static final int ARM_SYSREG_MSPLIM_NS = 286;
+	public static final int ARM_SYSREG_PSPLIM_NS = 287;
+	public static final int ARM_SYSREG_PRIMASK_NS = 288;
+	public static final int ARM_SYSREG_BASEPRI_NS = 289;
+	public static final int ARM_SYSREG_FAULTMASK_NS = 290;
+	public static final int ARM_SYSREG_CONTROL_NS = 291;
+	public static final int ARM_SYSREG_SP_NS = 292;
+	public static final int ARM_SYSREG_R8_USR = 293;
+	public static final int ARM_SYSREG_R9_USR = 294;
+	public static final int ARM_SYSREG_R10_USR = 295;
+	public static final int ARM_SYSREG_R11_USR = 296;
+	public static final int ARM_SYSREG_R12_USR = 297;
+	public static final int ARM_SYSREG_SP_USR = 298;
+	public static final int ARM_SYSREG_LR_USR = 299;
+	public static final int ARM_SYSREG_R8_FIQ = 300;
+	public static final int ARM_SYSREG_R9_FIQ = 301;
+	public static final int ARM_SYSREG_R10_FIQ = 302;
+	public static final int ARM_SYSREG_R11_FIQ = 303;
+	public static final int ARM_SYSREG_R12_FIQ = 304;
+	public static final int ARM_SYSREG_SP_FIQ = 305;
+	public static final int ARM_SYSREG_LR_FIQ = 306;
+	public static final int ARM_SYSREG_LR_IRQ = 307;
+	public static final int ARM_SYSREG_SP_IRQ = 308;
+	public static final int ARM_SYSREG_LR_SVC = 309;
+	public static final int ARM_SYSREG_SP_SVC = 310;
+	public static final int ARM_SYSREG_LR_ABT = 311;
+	public static final int ARM_SYSREG_SP_ABT = 312;
+	public static final int ARM_SYSREG_LR_UND = 313;
+	public static final int ARM_SYSREG_SP_UND = 314;
+	public static final int ARM_SYSREG_LR_MON = 315;
+	public static final int ARM_SYSREG_SP_MON = 316;
+	public static final int ARM_SYSREG_ELR_HYP = 317;
+	public static final int ARM_SYSREG_SP_HYP = 318;
+	public static final int ARM_SYSREG_SPSR_FIQ = 319;
+	public static final int ARM_SYSREG_SPSR_IRQ = 320;
+	public static final int ARM_SYSREG_SPSR_SVC = 321;
+	public static final int ARM_SYSREG_SPSR_ABT = 322;
+	public static final int ARM_SYSREG_SPSR_UND = 323;
+	public static final int ARM_SYSREG_SPSR_MON = 324;
+	public static final int ARM_SYSREG_SPSR_HYP = 325;
+
+	public static final int ARM_MB_INVALID = 0;
+	public static final int ARM_MB_RESERVED_0 = 1;
+	public static final int ARM_MB_OSHLD = 2;
+	public static final int ARM_MB_OSHST = 3;
+	public static final int ARM_MB_OSH = 4;
+	public static final int ARM_MB_RESERVED_4 = 5;
+	public static final int ARM_MB_NSHLD = 6;
+	public static final int ARM_MB_NSHST = 7;
+	public static final int ARM_MB_NSH = 8;
+	public static final int ARM_MB_RESERVED_8 = 9;
+	public static final int ARM_MB_ISHLD = 10;
+	public static final int ARM_MB_ISHST = 11;
+	public static final int ARM_MB_ISH = 12;
+	public static final int ARM_MB_RESERVED_12 = 13;
+	public static final int ARM_MB_LD = 14;
+	public static final int ARM_MB_ST = 15;
+	public static final int ARM_MB_SY = 16;
+
+	public static final int ARM_OP_INVALID = 0;
+	public static final int ARM_OP_REG = 1;
+	public static final int ARM_OP_IMM = 2;
+	public static final int ARM_OP_MEM = 3;
+	public static final int ARM_OP_FP = 4;
+	public static final int ARM_OP_CIMM = 64;
+	public static final int ARM_OP_PIMM = 65;
+	public static final int ARM_OP_SETEND = 66;
+	public static final int ARM_OP_SYSREG = 67;
+
+	public static final int ARM_SETEND_INVALID = 0;
+	public static final int ARM_SETEND_BE = 1;
+	public static final int ARM_SETEND_LE = 2;
+
+	public static final int ARM_CPSMODE_INVALID = 0;
+	public static final int ARM_CPSMODE_IE = 2;
+	public static final int ARM_CPSMODE_ID = 3;
+
+	public static final int ARM_CPSFLAG_INVALID = 0;
+	public static final int ARM_CPSFLAG_F = 1;
+	public static final int ARM_CPSFLAG_I = 2;
+	public static final int ARM_CPSFLAG_A = 4;
+	public static final int ARM_CPSFLAG_NONE = 16;
+
+	public static final int ARM_VECTORDATA_INVALID = 0;
+	public static final int ARM_VECTORDATA_I8 = 1;
+	public static final int ARM_VECTORDATA_I16 = 2;
+	public static final int ARM_VECTORDATA_I32 = 3;
+	public static final int ARM_VECTORDATA_I64 = 4;
+	public static final int ARM_VECTORDATA_S8 = 5;
+	public static final int ARM_VECTORDATA_S16 = 6;
+	public static final int ARM_VECTORDATA_S32 = 7;
+	public static final int ARM_VECTORDATA_S64 = 8;
+	public static final int ARM_VECTORDATA_U8 = 9;
+	public static final int ARM_VECTORDATA_U16 = 10;
+	public static final int ARM_VECTORDATA_U32 = 11;
+	public static final int ARM_VECTORDATA_U64 = 12;
+	public static final int ARM_VECTORDATA_P8 = 13;
+	public static final int ARM_VECTORDATA_F16 = 14;
+	public static final int ARM_VECTORDATA_F32 = 15;
+	public static final int ARM_VECTORDATA_F64 = 16;
+	public static final int ARM_VECTORDATA_F16F64 = 17;
+	public static final int ARM_VECTORDATA_F64F16 = 18;
+	public static final int ARM_VECTORDATA_F32F16 = 19;
+	public static final int ARM_VECTORDATA_F16F32 = 20;
+	public static final int ARM_VECTORDATA_F64F32 = 21;
+	public static final int ARM_VECTORDATA_F32F64 = 22;
+	public static final int ARM_VECTORDATA_S32F32 = 23;
+	public static final int ARM_VECTORDATA_U32F32 = 24;
+	public static final int ARM_VECTORDATA_F32S32 = 25;
+	public static final int ARM_VECTORDATA_F32U32 = 26;
+	public static final int ARM_VECTORDATA_F64S16 = 27;
+	public static final int ARM_VECTORDATA_F32S16 = 28;
+	public static final int ARM_VECTORDATA_F64S32 = 29;
+	public static final int ARM_VECTORDATA_S16F64 = 30;
+	public static final int ARM_VECTORDATA_S16F32 = 31;
+	public static final int ARM_VECTORDATA_S32F64 = 32;
+	public static final int ARM_VECTORDATA_U16F64 = 33;
+	public static final int ARM_VECTORDATA_U16F32 = 34;
+	public static final int ARM_VECTORDATA_U32F64 = 35;
+	public static final int ARM_VECTORDATA_F64U16 = 36;
+	public static final int ARM_VECTORDATA_F32U16 = 37;
+	public static final int ARM_VECTORDATA_F64U32 = 38;
+	public static final int ARM_VECTORDATA_F16U16 = 39;
+	public static final int ARM_VECTORDATA_U16F16 = 40;
+	public static final int ARM_VECTORDATA_F16U32 = 41;
+	public static final int ARM_VECTORDATA_U32F16 = 42;
+
+	public static final int ARM_REG_INVALID = 0;
+	public static final int ARM_REG_APSR = 1;
+	public static final int ARM_REG_APSR_NZCV = 2;
+	public static final int ARM_REG_CPSR = 3;
+	public static final int ARM_REG_FPEXC = 4;
+	public static final int ARM_REG_FPINST = 5;
+	public static final int ARM_REG_FPSCR = 6;
+	public static final int ARM_REG_FPSCR_NZCV = 7;
+	public static final int ARM_REG_FPSID = 8;
+	public static final int ARM_REG_ITSTATE = 9;
+	public static final int ARM_REG_LR = 10;
+	public static final int ARM_REG_PC = 11;
+	public static final int ARM_REG_SP = 12;
+	public static final int ARM_REG_SPSR = 13;
+	public static final int ARM_REG_D0 = 14;
+	public static final int ARM_REG_D1 = 15;
+	public static final int ARM_REG_D2 = 16;
+	public static final int ARM_REG_D3 = 17;
+	public static final int ARM_REG_D4 = 18;
+	public static final int ARM_REG_D5 = 19;
+	public static final int ARM_REG_D6 = 20;
+	public static final int ARM_REG_D7 = 21;
+	public static final int ARM_REG_D8 = 22;
+	public static final int ARM_REG_D9 = 23;
+	public static final int ARM_REG_D10 = 24;
+	public static final int ARM_REG_D11 = 25;
+	public static final int ARM_REG_D12 = 26;
+	public static final int ARM_REG_D13 = 27;
+	public static final int ARM_REG_D14 = 28;
+	public static final int ARM_REG_D15 = 29;
+	public static final int ARM_REG_D16 = 30;
+	public static final int ARM_REG_D17 = 31;
+	public static final int ARM_REG_D18 = 32;
+	public static final int ARM_REG_D19 = 33;
+	public static final int ARM_REG_D20 = 34;
+	public static final int ARM_REG_D21 = 35;
+	public static final int ARM_REG_D22 = 36;
+	public static final int ARM_REG_D23 = 37;
+	public static final int ARM_REG_D24 = 38;
+	public static final int ARM_REG_D25 = 39;
+	public static final int ARM_REG_D26 = 40;
+	public static final int ARM_REG_D27 = 41;
+	public static final int ARM_REG_D28 = 42;
+	public static final int ARM_REG_D29 = 43;
+	public static final int ARM_REG_D30 = 44;
+	public static final int ARM_REG_D31 = 45;
+	public static final int ARM_REG_FPINST2 = 46;
+	public static final int ARM_REG_MVFR0 = 47;
+	public static final int ARM_REG_MVFR1 = 48;
+	public static final int ARM_REG_MVFR2 = 49;
+	public static final int ARM_REG_Q0 = 50;
+	public static final int ARM_REG_Q1 = 51;
+	public static final int ARM_REG_Q2 = 52;
+	public static final int ARM_REG_Q3 = 53;
+	public static final int ARM_REG_Q4 = 54;
+	public static final int ARM_REG_Q5 = 55;
+	public static final int ARM_REG_Q6 = 56;
+	public static final int ARM_REG_Q7 = 57;
+	public static final int ARM_REG_Q8 = 58;
+	public static final int ARM_REG_Q9 = 59;
+	public static final int ARM_REG_Q10 = 60;
+	public static final int ARM_REG_Q11 = 61;
+	public static final int ARM_REG_Q12 = 62;
+	public static final int ARM_REG_Q13 = 63;
+	public static final int ARM_REG_Q14 = 64;
+	public static final int ARM_REG_Q15 = 65;
+	public static final int ARM_REG_R0 = 66;
+	public static final int ARM_REG_R1 = 67;
+	public static final int ARM_REG_R2 = 68;
+	public static final int ARM_REG_R3 = 69;
+	public static final int ARM_REG_R4 = 70;
+	public static final int ARM_REG_R5 = 71;
+	public static final int ARM_REG_R6 = 72;
+	public static final int ARM_REG_R7 = 73;
+	public static final int ARM_REG_R8 = 74;
+	public static final int ARM_REG_R9 = 75;
+	public static final int ARM_REG_R10 = 76;
+	public static final int ARM_REG_R11 = 77;
+	public static final int ARM_REG_R12 = 78;
+	public static final int ARM_REG_S0 = 79;
+	public static final int ARM_REG_S1 = 80;
+	public static final int ARM_REG_S2 = 81;
+	public static final int ARM_REG_S3 = 82;
+	public static final int ARM_REG_S4 = 83;
+	public static final int ARM_REG_S5 = 84;
+	public static final int ARM_REG_S6 = 85;
+	public static final int ARM_REG_S7 = 86;
+	public static final int ARM_REG_S8 = 87;
+	public static final int ARM_REG_S9 = 88;
+	public static final int ARM_REG_S10 = 89;
+	public static final int ARM_REG_S11 = 90;
+	public static final int ARM_REG_S12 = 91;
+	public static final int ARM_REG_S13 = 92;
+	public static final int ARM_REG_S14 = 93;
+	public static final int ARM_REG_S15 = 94;
+	public static final int ARM_REG_S16 = 95;
+	public static final int ARM_REG_S17 = 96;
+	public static final int ARM_REG_S18 = 97;
+	public static final int ARM_REG_S19 = 98;
+	public static final int ARM_REG_S20 = 99;
+	public static final int ARM_REG_S21 = 100;
+	public static final int ARM_REG_S22 = 101;
+	public static final int ARM_REG_S23 = 102;
+	public static final int ARM_REG_S24 = 103;
+	public static final int ARM_REG_S25 = 104;
+	public static final int ARM_REG_S26 = 105;
+	public static final int ARM_REG_S27 = 106;
+	public static final int ARM_REG_S28 = 107;
+	public static final int ARM_REG_S29 = 108;
+	public static final int ARM_REG_S30 = 109;
+	public static final int ARM_REG_S31 = 110;
+	public static final int ARM_REG_ENDING = 111;
+	public static final int ARM_REG_R13 = ARM_REG_SP;
+	public static final int ARM_REG_R14 = ARM_REG_LR;
+	public static final int ARM_REG_R15 = ARM_REG_PC;
+	public static final int ARM_REG_SB = ARM_REG_R9;
+	public static final int ARM_REG_SL = ARM_REG_R10;
+	public static final int ARM_REG_FP = ARM_REG_R11;
+	public static final int ARM_REG_IP = ARM_REG_R12;
+
+	public static final int ARM_INS_INVALID = 0;
+	public static final int ARM_INS_ADC = 1;
+	public static final int ARM_INS_ADD = 2;
+	public static final int ARM_INS_ADDW = 3;
+	public static final int ARM_INS_ADR = 4;
+	public static final int ARM_INS_AESD = 5;
+	public static final int ARM_INS_AESE = 6;
+	public static final int ARM_INS_AESIMC = 7;
+	public static final int ARM_INS_AESMC = 8;
+	public static final int ARM_INS_AND = 9;
+	public static final int ARM_INS_ASR = 10;
+	public static final int ARM_INS_B = 11;
+	public static final int ARM_INS_BFC = 12;
+	public static final int ARM_INS_BFI = 13;
+	public static final int ARM_INS_BIC = 14;
+	public static final int ARM_INS_BKPT = 15;
+	public static final int ARM_INS_BL = 16;
+	public static final int ARM_INS_BLX = 17;
+	public static final int ARM_INS_BLXNS = 18;
+	public static final int ARM_INS_BX = 19;
+	public static final int ARM_INS_BXJ = 20;
+	public static final int ARM_INS_BXNS = 21;
+	public static final int ARM_INS_CBNZ = 22;
+	public static final int ARM_INS_CBZ = 23;
+	public static final int ARM_INS_CDP = 24;
+	public static final int ARM_INS_CDP2 = 25;
+	public static final int ARM_INS_CLREX = 26;
+	public static final int ARM_INS_CLZ = 27;
+	public static final int ARM_INS_CMN = 28;
+	public static final int ARM_INS_CMP = 29;
+	public static final int ARM_INS_CPS = 30;
+	public static final int ARM_INS_CRC32B = 31;
+	public static final int ARM_INS_CRC32CB = 32;
+	public static final int ARM_INS_CRC32CH = 33;
+	public static final int ARM_INS_CRC32CW = 34;
+	public static final int ARM_INS_CRC32H = 35;
+	public static final int ARM_INS_CRC32W = 36;
+	public static final int ARM_INS_CSDB = 37;
+	public static final int ARM_INS_DBG = 38;
+	public static final int ARM_INS_DCPS1 = 39;
+	public static final int ARM_INS_DCPS2 = 40;
+	public static final int ARM_INS_DCPS3 = 41;
+	public static final int ARM_INS_DFB = 42;
+	public static final int ARM_INS_DMB = 43;
+	public static final int ARM_INS_DSB = 44;
+	public static final int ARM_INS_EOR = 45;
+	public static final int ARM_INS_ERET = 46;
+	public static final int ARM_INS_ESB = 47;
+	public static final int ARM_INS_FADDD = 48;
+	public static final int ARM_INS_FADDS = 49;
+	public static final int ARM_INS_FCMPZD = 50;
+	public static final int ARM_INS_FCMPZS = 51;
+	public static final int ARM_INS_FCONSTD = 52;
+	public static final int ARM_INS_FCONSTS = 53;
+	public static final int ARM_INS_FLDMDBX = 54;
+	public static final int ARM_INS_FLDMIAX = 55;
+	public static final int ARM_INS_FMDHR = 56;
+	public static final int ARM_INS_FMDLR = 57;
+	public static final int ARM_INS_FMSTAT = 58;
+	public static final int ARM_INS_FSTMDBX = 59;
+	public static final int ARM_INS_FSTMIAX = 60;
+	public static final int ARM_INS_FSUBD = 61;
+	public static final int ARM_INS_FSUBS = 62;
+	public static final int ARM_INS_HINT = 63;
+	public static final int ARM_INS_HLT = 64;
+	public static final int ARM_INS_HVC = 65;
+	public static final int ARM_INS_ISB = 66;
+	public static final int ARM_INS_IT = 67;
+	public static final int ARM_INS_LDA = 68;
+	public static final int ARM_INS_LDAB = 69;
+	public static final int ARM_INS_LDAEX = 70;
+	public static final int ARM_INS_LDAEXB = 71;
+	public static final int ARM_INS_LDAEXD = 72;
+	public static final int ARM_INS_LDAEXH = 73;
+	public static final int ARM_INS_LDAH = 74;
+	public static final int ARM_INS_LDC = 75;
+	public static final int ARM_INS_LDC2 = 76;
+	public static final int ARM_INS_LDC2L = 77;
+	public static final int ARM_INS_LDCL = 78;
+	public static final int ARM_INS_LDM = 79;
+	public static final int ARM_INS_LDMDA = 80;
+	public static final int ARM_INS_LDMDB = 81;
+	public static final int ARM_INS_LDMIB = 82;
+	public static final int ARM_INS_LDR = 83;
+	public static final int ARM_INS_LDRB = 84;
+	public static final int ARM_INS_LDRBT = 85;
+	public static final int ARM_INS_LDRD = 86;
+	public static final int ARM_INS_LDREX = 87;
+	public static final int ARM_INS_LDREXB = 88;
+	public static final int ARM_INS_LDREXD = 89;
+	public static final int ARM_INS_LDREXH = 90;
+	public static final int ARM_INS_LDRH = 91;
+	public static final int ARM_INS_LDRHT = 92;
+	public static final int ARM_INS_LDRSB = 93;
+	public static final int ARM_INS_LDRSBT = 94;
+	public static final int ARM_INS_LDRSH = 95;
+	public static final int ARM_INS_LDRSHT = 96;
+	public static final int ARM_INS_LDRT = 97;
+	public static final int ARM_INS_LSL = 98;
+	public static final int ARM_INS_LSR = 99;
+	public static final int ARM_INS_MCR = 100;
+	public static final int ARM_INS_MCR2 = 101;
+	public static final int ARM_INS_MCRR = 102;
+	public static final int ARM_INS_MCRR2 = 103;
+	public static final int ARM_INS_MLA = 104;
+	public static final int ARM_INS_MLS = 105;
+	public static final int ARM_INS_MOV = 106;
+	public static final int ARM_INS_MOVS = 107;
+	public static final int ARM_INS_MOVT = 108;
+	public static final int ARM_INS_MOVW = 109;
+	public static final int ARM_INS_MRC = 110;
+	public static final int ARM_INS_MRC2 = 111;
+	public static final int ARM_INS_MRRC = 112;
+	public static final int ARM_INS_MRRC2 = 113;
+	public static final int ARM_INS_MRS = 114;
+	public static final int ARM_INS_MSR = 115;
+	public static final int ARM_INS_MUL = 116;
+	public static final int ARM_INS_MVN = 117;
+	public static final int ARM_INS_NEG = 118;
+	public static final int ARM_INS_NOP = 119;
+	public static final int ARM_INS_ORN = 120;
+	public static final int ARM_INS_ORR = 121;
+	public static final int ARM_INS_PKHBT = 122;
+	public static final int ARM_INS_PKHTB = 123;
+	public static final int ARM_INS_PLD = 124;
+	public static final int ARM_INS_PLDW = 125;
+	public static final int ARM_INS_PLI = 126;
+	public static final int ARM_INS_POP = 127;
+	public static final int ARM_INS_PUSH = 128;
+	public static final int ARM_INS_QADD = 129;
+	public static final int ARM_INS_QADD16 = 130;
+	public static final int ARM_INS_QADD8 = 131;
+	public static final int ARM_INS_QASX = 132;
+	public static final int ARM_INS_QDADD = 133;
+	public static final int ARM_INS_QDSUB = 134;
+	public static final int ARM_INS_QSAX = 135;
+	public static final int ARM_INS_QSUB = 136;
+	public static final int ARM_INS_QSUB16 = 137;
+	public static final int ARM_INS_QSUB8 = 138;
+	public static final int ARM_INS_RBIT = 139;
+	public static final int ARM_INS_REV = 140;
+	public static final int ARM_INS_REV16 = 141;
+	public static final int ARM_INS_REVSH = 142;
+	public static final int ARM_INS_RFEDA = 143;
+	public static final int ARM_INS_RFEDB = 144;
+	public static final int ARM_INS_RFEIA = 145;
+	public static final int ARM_INS_RFEIB = 146;
+	public static final int ARM_INS_ROR = 147;
+	public static final int ARM_INS_RRX = 148;
+	public static final int ARM_INS_RSB = 149;
+	public static final int ARM_INS_RSC = 150;
+	public static final int ARM_INS_SADD16 = 151;
+	public static final int ARM_INS_SADD8 = 152;
+	public static final int ARM_INS_SASX = 153;
+	public static final int ARM_INS_SBC = 154;
+	public static final int ARM_INS_SBFX = 155;
+	public static final int ARM_INS_SDIV = 156;
+	public static final int ARM_INS_SEL = 157;
+	public static final int ARM_INS_SETEND = 158;
+	public static final int ARM_INS_SETPAN = 159;
+	public static final int ARM_INS_SEV = 160;
+	public static final int ARM_INS_SEVL = 161;
+	public static final int ARM_INS_SG = 162;
+	public static final int ARM_INS_SHA1C = 163;
+	public static final int ARM_INS_SHA1H = 164;
+	public static final int ARM_INS_SHA1M = 165;
+	public static final int ARM_INS_SHA1P = 166;
+	public static final int ARM_INS_SHA1SU0 = 167;
+	public static final int ARM_INS_SHA1SU1 = 168;
+	public static final int ARM_INS_SHA256H = 169;
+	public static final int ARM_INS_SHA256H2 = 170;
+	public static final int ARM_INS_SHA256SU0 = 171;
+	public static final int ARM_INS_SHA256SU1 = 172;
+	public static final int ARM_INS_SHADD16 = 173;
+	public static final int ARM_INS_SHADD8 = 174;
+	public static final int ARM_INS_SHASX = 175;
+	public static final int ARM_INS_SHSAX = 176;
+	public static final int ARM_INS_SHSUB16 = 177;
+	public static final int ARM_INS_SHSUB8 = 178;
+	public static final int ARM_INS_SMC = 179;
+	public static final int ARM_INS_SMLABB = 180;
+	public static final int ARM_INS_SMLABT = 181;
+	public static final int ARM_INS_SMLAD = 182;
+	public static final int ARM_INS_SMLADX = 183;
+	public static final int ARM_INS_SMLAL = 184;
+	public static final int ARM_INS_SMLALBB = 185;
+	public static final int ARM_INS_SMLALBT = 186;
+	public static final int ARM_INS_SMLALD = 187;
+	public static final int ARM_INS_SMLALDX = 188;
+	public static final int ARM_INS_SMLALTB = 189;
+	public static final int ARM_INS_SMLALTT = 190;
+	public static final int ARM_INS_SMLATB = 191;
+	public static final int ARM_INS_SMLATT = 192;
+	public static final int ARM_INS_SMLAWB = 193;
+	public static final int ARM_INS_SMLAWT = 194;
+	public static final int ARM_INS_SMLSD = 195;
+	public static final int ARM_INS_SMLSDX = 196;
+	public static final int ARM_INS_SMLSLD = 197;
+	public static final int ARM_INS_SMLSLDX = 198;
+	public static final int ARM_INS_SMMLA = 199;
+	public static final int ARM_INS_SMMLAR = 200;
+	public static final int ARM_INS_SMMLS = 201;
+	public static final int ARM_INS_SMMLSR = 202;
+	public static final int ARM_INS_SMMUL = 203;
+	public static final int ARM_INS_SMMULR = 204;
+	public static final int ARM_INS_SMUAD = 205;
+	public static final int ARM_INS_SMUADX = 206;
+	public static final int ARM_INS_SMULBB = 207;
+	public static final int ARM_INS_SMULBT = 208;
+	public static final int ARM_INS_SMULL = 209;
+	public static final int ARM_INS_SMULTB = 210;
+	public static final int ARM_INS_SMULTT = 211;
+	public static final int ARM_INS_SMULWB = 212;
+	public static final int ARM_INS_SMULWT = 213;
+	public static final int ARM_INS_SMUSD = 214;
+	public static final int ARM_INS_SMUSDX = 215;
+	public static final int ARM_INS_SRSDA = 216;
+	public static final int ARM_INS_SRSDB = 217;
+	public static final int ARM_INS_SRSIA = 218;
+	public static final int ARM_INS_SRSIB = 219;
+	public static final int ARM_INS_SSAT = 220;
+	public static final int ARM_INS_SSAT16 = 221;
+	public static final int ARM_INS_SSAX = 222;
+	public static final int ARM_INS_SSUB16 = 223;
+	public static final int ARM_INS_SSUB8 = 224;
+	public static final int ARM_INS_STC = 225;
+	public static final int ARM_INS_STC2 = 226;
+	public static final int ARM_INS_STC2L = 227;
+	public static final int ARM_INS_STCL = 228;
+	public static final int ARM_INS_STL = 229;
+	public static final int ARM_INS_STLB = 230;
+	public static final int ARM_INS_STLEX = 231;
+	public static final int ARM_INS_STLEXB = 232;
+	public static final int ARM_INS_STLEXD = 233;
+	public static final int ARM_INS_STLEXH = 234;
+	public static final int ARM_INS_STLH = 235;
+	public static final int ARM_INS_STM = 236;
+	public static final int ARM_INS_STMDA = 237;
+	public static final int ARM_INS_STMDB = 238;
+	public static final int ARM_INS_STMIB = 239;
+	public static final int ARM_INS_STR = 240;
+	public static final int ARM_INS_STRB = 241;
+	public static final int ARM_INS_STRBT = 242;
+	public static final int ARM_INS_STRD = 243;
+	public static final int ARM_INS_STREX = 244;
+	public static final int ARM_INS_STREXB = 245;
+	public static final int ARM_INS_STREXD = 246;
+	public static final int ARM_INS_STREXH = 247;
+	public static final int ARM_INS_STRH = 248;
+	public static final int ARM_INS_STRHT = 249;
+	public static final int ARM_INS_STRT = 250;
+	public static final int ARM_INS_SUB = 251;
+	public static final int ARM_INS_SUBS = 252;
+	public static final int ARM_INS_SUBW = 253;
+	public static final int ARM_INS_SVC = 254;
+	public static final int ARM_INS_SWP = 255;
+	public static final int ARM_INS_SWPB = 256;
+	public static final int ARM_INS_SXTAB = 257;
+	public static final int ARM_INS_SXTAB16 = 258;
+	public static final int ARM_INS_SXTAH = 259;
+	public static final int ARM_INS_SXTB = 260;
+	public static final int ARM_INS_SXTB16 = 261;
+	public static final int ARM_INS_SXTH = 262;
+	public static final int ARM_INS_TBB = 263;
+	public static final int ARM_INS_TBH = 264;
+	public static final int ARM_INS_TEQ = 265;
+	public static final int ARM_INS_TRAP = 266;
+	public static final int ARM_INS_TSB = 267;
+	public static final int ARM_INS_TST = 268;
+	public static final int ARM_INS_TT = 269;
+	public static final int ARM_INS_TTA = 270;
+	public static final int ARM_INS_TTAT = 271;
+	public static final int ARM_INS_TTT = 272;
+	public static final int ARM_INS_UADD16 = 273;
+	public static final int ARM_INS_UADD8 = 274;
+	public static final int ARM_INS_UASX = 275;
+	public static final int ARM_INS_UBFX = 276;
+	public static final int ARM_INS_UDF = 277;
+	public static final int ARM_INS_UDIV = 278;
+	public static final int ARM_INS_UHADD16 = 279;
+	public static final int ARM_INS_UHADD8 = 280;
+	public static final int ARM_INS_UHASX = 281;
+	public static final int ARM_INS_UHSAX = 282;
+	public static final int ARM_INS_UHSUB16 = 283;
+	public static final int ARM_INS_UHSUB8 = 284;
+	public static final int ARM_INS_UMAAL = 285;
+	public static final int ARM_INS_UMLAL = 286;
+	public static final int ARM_INS_UMULL = 287;
+	public static final int ARM_INS_UQADD16 = 288;
+	public static final int ARM_INS_UQADD8 = 289;
+	public static final int ARM_INS_UQASX = 290;
+	public static final int ARM_INS_UQSAX = 291;
+	public static final int ARM_INS_UQSUB16 = 292;
+	public static final int ARM_INS_UQSUB8 = 293;
+	public static final int ARM_INS_USAD8 = 294;
+	public static final int ARM_INS_USADA8 = 295;
+	public static final int ARM_INS_USAT = 296;
+	public static final int ARM_INS_USAT16 = 297;
+	public static final int ARM_INS_USAX = 298;
+	public static final int ARM_INS_USUB16 = 299;
+	public static final int ARM_INS_USUB8 = 300;
+	public static final int ARM_INS_UXTAB = 301;
+	public static final int ARM_INS_UXTAB16 = 302;
+	public static final int ARM_INS_UXTAH = 303;
+	public static final int ARM_INS_UXTB = 304;
+	public static final int ARM_INS_UXTB16 = 305;
+	public static final int ARM_INS_UXTH = 306;
+	public static final int ARM_INS_VABA = 307;
+	public static final int ARM_INS_VABAL = 308;
+	public static final int ARM_INS_VABD = 309;
+	public static final int ARM_INS_VABDL = 310;
+	public static final int ARM_INS_VABS = 311;
+	public static final int ARM_INS_VACGE = 312;
+	public static final int ARM_INS_VACGT = 313;
+	public static final int ARM_INS_VACLE = 314;
+	public static final int ARM_INS_VACLT = 315;
+	public static final int ARM_INS_VADD = 316;
+	public static final int ARM_INS_VADDHN = 317;
+	public static final int ARM_INS_VADDL = 318;
+	public static final int ARM_INS_VADDW = 319;
+	public static final int ARM_INS_VAND = 320;
+	public static final int ARM_INS_VBIC = 321;
+	public static final int ARM_INS_VBIF = 322;
+	public static final int ARM_INS_VBIT = 323;
+	public static final int ARM_INS_VBSL = 324;
+	public static final int ARM_INS_VCADD = 325;
+	public static final int ARM_INS_VCEQ = 326;
+	public static final int ARM_INS_VCGE = 327;
+	public static final int ARM_INS_VCGT = 328;
+	public static final int ARM_INS_VCLE = 329;
+	public static final int ARM_INS_VCLS = 330;
+	public static final int ARM_INS_VCLT = 331;
+	public static final int ARM_INS_VCLZ = 332;
+	public static final int ARM_INS_VCMLA = 333;
+	public static final int ARM_INS_VCMP = 334;
+	public static final int ARM_INS_VCMPE = 335;
+	public static final int ARM_INS_VCNT = 336;
+	public static final int ARM_INS_VCVT = 337;
+	public static final int ARM_INS_VCVTA = 338;
+	public static final int ARM_INS_VCVTB = 339;
+	public static final int ARM_INS_VCVTM = 340;
+	public static final int ARM_INS_VCVTN = 341;
+	public static final int ARM_INS_VCVTP = 342;
+	public static final int ARM_INS_VCVTR = 343;
+	public static final int ARM_INS_VCVTT = 344;
+	public static final int ARM_INS_VDIV = 345;
+	public static final int ARM_INS_VDUP = 346;
+	public static final int ARM_INS_VEOR = 347;
+	public static final int ARM_INS_VEXT = 348;
+	public static final int ARM_INS_VFMA = 349;
+	public static final int ARM_INS_VFMS = 350;
+	public static final int ARM_INS_VFNMA = 351;
+	public static final int ARM_INS_VFNMS = 352;
+	public static final int ARM_INS_VHADD = 353;
+	public static final int ARM_INS_VHSUB = 354;
+	public static final int ARM_INS_VINS = 355;
+	public static final int ARM_INS_VJCVT = 356;
+	public static final int ARM_INS_VLD1 = 357;
+	public static final int ARM_INS_VLD2 = 358;
+	public static final int ARM_INS_VLD3 = 359;
+	public static final int ARM_INS_VLD4 = 360;
+	public static final int ARM_INS_VLDMDB = 361;
+	public static final int ARM_INS_VLDMIA = 362;
+	public static final int ARM_INS_VLDR = 363;
+	public static final int ARM_INS_VLLDM = 364;
+	public static final int ARM_INS_VLSTM = 365;
+	public static final int ARM_INS_VMAX = 366;
+	public static final int ARM_INS_VMAXNM = 367;
+	public static final int ARM_INS_VMIN = 368;
+	public static final int ARM_INS_VMINNM = 369;
+	public static final int ARM_INS_VMLA = 370;
+	public static final int ARM_INS_VMLAL = 371;
+	public static final int ARM_INS_VMLS = 372;
+	public static final int ARM_INS_VMLSL = 373;
+	public static final int ARM_INS_VMOV = 374;
+	public static final int ARM_INS_VMOVL = 375;
+	public static final int ARM_INS_VMOVN = 376;
+	public static final int ARM_INS_VMOVX = 377;
+	public static final int ARM_INS_VMRS = 378;
+	public static final int ARM_INS_VMSR = 379;
+	public static final int ARM_INS_VMUL = 380;
+	public static final int ARM_INS_VMULL = 381;
+	public static final int ARM_INS_VMVN = 382;
+	public static final int ARM_INS_VNEG = 383;
+	public static final int ARM_INS_VNMLA = 384;
+	public static final int ARM_INS_VNMLS = 385;
+	public static final int ARM_INS_VNMUL = 386;
+	public static final int ARM_INS_VORN = 387;
+	public static final int ARM_INS_VORR = 388;
+	public static final int ARM_INS_VPADAL = 389;
+	public static final int ARM_INS_VPADD = 390;
+	public static final int ARM_INS_VPADDL = 391;
+	public static final int ARM_INS_VPMAX = 392;
+	public static final int ARM_INS_VPMIN = 393;
+	public static final int ARM_INS_VPOP = 394;
+	public static final int ARM_INS_VPUSH = 395;
+	public static final int ARM_INS_VQABS = 396;
+	public static final int ARM_INS_VQADD = 397;
+	public static final int ARM_INS_VQDMLAL = 398;
+	public static final int ARM_INS_VQDMLSL = 399;
+	public static final int ARM_INS_VQDMULH = 400;
+	public static final int ARM_INS_VQDMULL = 401;
+	public static final int ARM_INS_VQMOVN = 402;
+	public static final int ARM_INS_VQMOVUN = 403;
+	public static final int ARM_INS_VQNEG = 404;
+	public static final int ARM_INS_VQRDMLAH = 405;
+	public static final int ARM_INS_VQRDMLSH = 406;
+	public static final int ARM_INS_VQRDMULH = 407;
+	public static final int ARM_INS_VQRSHL = 408;
+	public static final int ARM_INS_VQRSHRN = 409;
+	public static final int ARM_INS_VQRSHRUN = 410;
+	public static final int ARM_INS_VQSHL = 411;
+	public static final int ARM_INS_VQSHLU = 412;
+	public static final int ARM_INS_VQSHRN = 413;
+	public static final int ARM_INS_VQSHRUN = 414;
+	public static final int ARM_INS_VQSUB = 415;
+	public static final int ARM_INS_VRADDHN = 416;
+	public static final int ARM_INS_VRECPE = 417;
+	public static final int ARM_INS_VRECPS = 418;
+	public static final int ARM_INS_VREV16 = 419;
+	public static final int ARM_INS_VREV32 = 420;
+	public static final int ARM_INS_VREV64 = 421;
+	public static final int ARM_INS_VRHADD = 422;
+	public static final int ARM_INS_VRINTA = 423;
+	public static final int ARM_INS_VRINTM = 424;
+	public static final int ARM_INS_VRINTN = 425;
+	public static final int ARM_INS_VRINTP = 426;
+	public static final int ARM_INS_VRINTR = 427;
+	public static final int ARM_INS_VRINTX = 428;
+	public static final int ARM_INS_VRINTZ = 429;
+	public static final int ARM_INS_VRSHL = 430;
+	public static final int ARM_INS_VRSHR = 431;
+	public static final int ARM_INS_VRSHRN = 432;
+	public static final int ARM_INS_VRSQRTE = 433;
+	public static final int ARM_INS_VRSQRTS = 434;
+	public static final int ARM_INS_VRSRA = 435;
+	public static final int ARM_INS_VRSUBHN = 436;
+	public static final int ARM_INS_VSDOT = 437;
+	public static final int ARM_INS_VSELEQ = 438;
+	public static final int ARM_INS_VSELGE = 439;
+	public static final int ARM_INS_VSELGT = 440;
+	public static final int ARM_INS_VSELVS = 441;
+	public static final int ARM_INS_VSHL = 442;
+	public static final int ARM_INS_VSHLL = 443;
+	public static final int ARM_INS_VSHR = 444;
+	public static final int ARM_INS_VSHRN = 445;
+	public static final int ARM_INS_VSLI = 446;
+	public static final int ARM_INS_VSQRT = 447;
+	public static final int ARM_INS_VSRA = 448;
+	public static final int ARM_INS_VSRI = 449;
+	public static final int ARM_INS_VST1 = 450;
+	public static final int ARM_INS_VST2 = 451;
+	public static final int ARM_INS_VST3 = 452;
+	public static final int ARM_INS_VST4 = 453;
+	public static final int ARM_INS_VSTMDB = 454;
+	public static final int ARM_INS_VSTMIA = 455;
+	public static final int ARM_INS_VSTR = 456;
+	public static final int ARM_INS_VSUB = 457;
+	public static final int ARM_INS_VSUBHN = 458;
+	public static final int ARM_INS_VSUBL = 459;
+	public static final int ARM_INS_VSUBW = 460;
+	public static final int ARM_INS_VSWP = 461;
+	public static final int ARM_INS_VTBL = 462;
+	public static final int ARM_INS_VTBX = 463;
+	public static final int ARM_INS_VTRN = 464;
+	public static final int ARM_INS_VTST = 465;
+	public static final int ARM_INS_VUDOT = 466;
+	public static final int ARM_INS_VUZP = 467;
+	public static final int ARM_INS_VZIP = 468;
+	public static final int ARM_INS_WFE = 469;
+	public static final int ARM_INS_WFI = 470;
+	public static final int ARM_INS_YIELD = 471;
+	public static final int ARM_INS_ENDING = 472;
+
+	public static final int ARM_GRP_INVALID = 0;
+	public static final int ARM_GRP_JUMP = 1;
+	public static final int ARM_GRP_CALL = 2;
+	public static final int ARM_GRP_INT = 4;
+	public static final int ARM_GRP_PRIVILEGE = 6;
+	public static final int ARM_GRP_BRANCH_RELATIVE = 7;
+	public static final int ARM_GRP_CRYPTO = 128;
+	public static final int ARM_GRP_DATABARRIER = 129;
+	public static final int ARM_GRP_DIVIDE = 130;
+	public static final int ARM_GRP_FPARMV8 = 131;
+	public static final int ARM_GRP_MULTPRO = 132;
+	public static final int ARM_GRP_NEON = 133;
+	public static final int ARM_GRP_T2EXTRACTPACK = 134;
+	public static final int ARM_GRP_THUMB2DSP = 135;
+	public static final int ARM_GRP_TRUSTZONE = 136;
+	public static final int ARM_GRP_V4T = 137;
+	public static final int ARM_GRP_V5T = 138;
+	public static final int ARM_GRP_V5TE = 139;
+	public static final int ARM_GRP_V6 = 140;
+	public static final int ARM_GRP_V6T2 = 141;
+	public static final int ARM_GRP_V7 = 142;
+	public static final int ARM_GRP_V8 = 143;
+	public static final int ARM_GRP_VFP2 = 144;
+	public static final int ARM_GRP_VFP3 = 145;
+	public static final int ARM_GRP_VFP4 = 146;
+	public static final int ARM_GRP_ARM = 147;
+	public static final int ARM_GRP_MCLASS = 148;
+	public static final int ARM_GRP_NOTMCLASS = 149;
+	public static final int ARM_GRP_THUMB = 150;
+	public static final int ARM_GRP_THUMB1ONLY = 151;
+	public static final int ARM_GRP_THUMB2 = 152;
+	public static final int ARM_GRP_PREV8 = 153;
+	public static final int ARM_GRP_FPVMLX = 154;
+	public static final int ARM_GRP_MULOPS = 155;
+	public static final int ARM_GRP_CRC = 156;
+	public static final int ARM_GRP_DPVFP = 157;
+	public static final int ARM_GRP_V6M = 158;
+	public static final int ARM_GRP_VIRTUALIZATION = 159;
+	public static final int ARM_GRP_ENDING = 160;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Capstone.java b/capstone/bindings/java/capstone/Capstone.java
new file mode 100644
index 000000000..040c79e2b
--- /dev/null
+++ b/capstone/bindings/java/capstone/Capstone.java
@@ -0,0 +1,546 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Library;
+import com.sun.jna.Memory;
+import com.sun.jna.Native;
+import com.sun.jna.NativeLong;
+import com.sun.jna.ptr.ByteByReference;
+import com.sun.jna.ptr.NativeLongByReference;
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+import com.sun.jna.Pointer;
+import com.sun.jna.ptr.PointerByReference;
+import com.sun.jna.ptr.IntByReference;
+
+import java.util.List;
+import java.util.Arrays;
+import java.lang.RuntimeException;
+
+public class Capstone {
+
+  protected static abstract class OpInfo {};
+  protected static abstract class UnionOpInfo extends Structure {};
+
+  public static class UnionArch extends Union {
+    public static class ByValue extends UnionArch implements Union.ByValue {};
+
+    public Arm.UnionOpInfo arm;
+    public Arm64.UnionOpInfo arm64;
+    public X86.UnionOpInfo x86;
+    public Mips.UnionOpInfo mips;
+    public Ppc.UnionOpInfo ppc;
+    public Sparc.UnionOpInfo sparc;
+    public Systemz.UnionOpInfo sysz;
+    public Xcore.UnionOpInfo xcore;
+    public M680x.UnionOpInfo m680x;
+  }
+
+  protected static class _cs_insn extends Structure {
+    // instruction ID.
+    public int id;
+    // instruction address.
+    public long address;
+    // instruction size.
+    public short size;
+    // machine bytes of instruction.
+    public byte[] bytes;
+    // instruction mnemonic. NOTE: irrelevant for diet engine.
+    public byte[] mnemonic;
+    // instruction operands. NOTE: irrelevant for diet engine.
+    public byte[] op_str;
+    // detail information of instruction.
+    public _cs_detail.ByReference cs_detail;
+
+    public _cs_insn() {
+      bytes = new byte[24];
+      mnemonic = new byte[32];
+      op_str = new byte[160];
+      java.util.Arrays.fill(mnemonic, (byte) 0);
+      java.util.Arrays.fill(op_str, (byte) 0);
+    }
+
+    public _cs_insn(Pointer p) {
+      this();
+      useMemory(p);
+      read();
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("id", "address", "size", "bytes", "mnemonic", "op_str", "cs_detail");
+    }
+  }
+
+  protected static class _cs_detail extends Structure {
+    public static class ByReference extends _cs_detail implements Structure.ByReference {};
+
+    // list of all implicit registers being read.
+    public short[] regs_read = new short[16];
+    public byte regs_read_count;
+    // list of all implicit registers being written.
+    public short[] regs_write = new short[20];
+    public byte regs_write_count;
+    // list of semantic groups this instruction belongs to.
+    public byte[] groups = new byte[8];
+    public byte groups_count;
+
+    public UnionArch arch;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("regs_read", "regs_read_count", "regs_write", "regs_write_count", "groups", "groups_count", "arch");
+    }
+  }
+
+  public static class CsInsn {
+    private Pointer csh;
+    private CS cs;
+    private _cs_insn raw;
+    private int arch;
+
+    // instruction ID.
+    public int id;
+    // instruction address.
+    public long address;
+    // instruction size.
+    public short size;
+    // Machine bytes of this instruction, with number of bytes indicated by size above
+    public byte[] bytes;
+    // instruction mnemonic. NOTE: irrelevant for diet engine.
+    public String mnemonic;
+    // instruction operands. NOTE: irrelevant for diet engine.
+    public String opStr;
+    // list of all implicit registers being read.
+    public short[] regsRead;
+    // list of all implicit registers being written.
+    public short[] regsWrite;
+    // list of semantic groups this instruction belongs to.
+    public byte[] groups;
+    public OpInfo operands;
+
+    public CsInsn (_cs_insn insn, int _arch, Pointer _csh, CS _cs, boolean diet) {
+      id = insn.id;
+      address = insn.address;
+      size = insn.size;
+
+      if (!diet) {
+        int lm = 0;
+        while (insn.mnemonic[lm++] != 0);
+        int lo = 0;
+        while (insn.op_str[lo++] != 0);
+        mnemonic = new String(insn.mnemonic, 0, lm-1);
+        opStr = new String(insn.op_str, 0, lo-1);
+        bytes = Arrays.copyOf(insn.bytes, insn.size);
+      }
+
+      cs = _cs;
+      arch = _arch;
+      raw = insn;
+      csh = _csh;
+
+      if (insn.cs_detail != null) {
+        if (!diet) {
+          regsRead = new short[insn.cs_detail.regs_read_count];
+          for (int i=0; i<regsRead.length; i++)
+            regsRead[i] = insn.cs_detail.regs_read[i];
+          regsWrite = new short[insn.cs_detail.regs_write_count];
+          for (int i=0; i<regsWrite.length; i++)
+            regsWrite[i] = insn.cs_detail.regs_write[i];
+          groups = new byte[insn.cs_detail.groups_count];
+          for (int i=0; i<groups.length; i++)
+            groups[i] = insn.cs_detail.groups[i];
+        }
+
+        operands = getOptInfo(insn.cs_detail);
+      }
+    }
+
+    private OpInfo getOptInfo(_cs_detail detail) {
+      OpInfo op_info = null;
+
+      switch (this.arch) {
+        case CS_ARCH_ARM:
+          detail.arch.setType(Arm.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Arm.OpInfo((Arm.UnionOpInfo) detail.arch.arm);
+          break;
+        case CS_ARCH_ARM64:
+          detail.arch.setType(Arm64.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Arm64.OpInfo((Arm64.UnionOpInfo) detail.arch.arm64);
+          break;
+        case CS_ARCH_MIPS:
+          detail.arch.setType(Mips.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Mips.OpInfo((Mips.UnionOpInfo) detail.arch.mips);
+          break;
+        case CS_ARCH_X86:
+          detail.arch.setType(X86.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new X86.OpInfo((X86.UnionOpInfo) detail.arch.x86);
+          break;
+        case CS_ARCH_SPARC:
+          detail.arch.setType(Sparc.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Sparc.OpInfo((Sparc.UnionOpInfo) detail.arch.sparc);
+          break;
+        case CS_ARCH_SYSZ:
+          detail.arch.setType(Systemz.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Systemz.OpInfo((Systemz.UnionOpInfo) detail.arch.sysz);
+          break;
+        case CS_ARCH_PPC:
+          detail.arch.setType(Ppc.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Ppc.OpInfo((Ppc.UnionOpInfo) detail.arch.ppc);
+          break;
+        case CS_ARCH_XCORE:
+          detail.arch.setType(Xcore.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new Xcore.OpInfo((Xcore.UnionOpInfo) detail.arch.xcore);
+          break;
+        case CS_ARCH_M680X:
+          detail.arch.setType(M680x.UnionOpInfo.class);
+          detail.arch.read();
+          op_info = new M680x.OpInfo((M680x.UnionOpInfo) detail.arch.m680x);
+          break;
+        default:
+      }
+
+      return op_info;
+    }
+
+    public int opCount(int type) {
+      return cs.cs_op_count(csh, raw.getPointer(), type);
+    }
+
+    public int opIndex(int type, int index) {
+      return cs.cs_op_index(csh, raw.getPointer(), type, index);
+    }
+
+    public boolean regRead(int reg_id) {
+      return cs.cs_reg_read(csh, raw.getPointer(), reg_id) != 0;
+    }
+
+    public boolean regWrite(int reg_id) {
+      return cs.cs_reg_write(csh, raw.getPointer(), reg_id) != 0;
+    }
+
+    public int errno() {
+      return cs.cs_errno(csh);
+    }
+
+    public String regName(int reg_id) {
+      return cs.cs_reg_name(csh, reg_id);
+    }
+
+    public String insnName() {
+      return cs.cs_insn_name(csh, id);
+    }
+
+    public String groupName(int id) {
+      return cs.cs_group_name(csh, id);
+    }
+
+    public boolean group(int gid) {
+      return cs.cs_insn_group(csh, raw.getPointer(), gid) != 0;
+    }
+
+    public CsRegsAccess regsAccess() {
+      Memory regsReadMemory = new Memory(64*2);
+      ByteByReference regsReadCountRef = new ByteByReference();
+      Memory regsWriteMemory = new Memory(64*2);
+      ByteByReference regsWriteCountRef = new ByteByReference();
+
+      int c = cs.cs_regs_access(csh, raw.getPointer(), regsReadMemory, regsReadCountRef, regsWriteMemory, regsWriteCountRef);
+      if (c != CS_ERR_OK) {
+        return null;
+      }
+
+      byte regsReadCount = regsReadCountRef.getValue();
+      byte regsWriteCount = regsWriteCountRef.getValue();
+
+      short[] regsRead = new short[regsReadCount];
+      regsReadMemory.read(0, regsRead, 0, regsReadCount);
+
+      short[] regsWrite = new short[regsWriteCount];
+      regsWriteMemory.read(0, regsWrite, 0, regsWriteCount);
+
+      return new CsRegsAccess(regsRead, regsWrite);
+    }
+  }
+
+  public static class CsRegsAccess {
+    public short[] regsRead;
+    public short[] regsWrite;
+
+    public CsRegsAccess(short[] regsRead, short[] regsWrite) {
+      this.regsRead = regsRead;
+      this.regsWrite = regsWrite;
+    }
+  }
+
+  private CsInsn[] fromArrayRaw(_cs_insn[] arr_raw) {
+    CsInsn[] arr = new CsInsn[arr_raw.length];
+
+    for (int i = 0; i < arr_raw.length; i++) {
+      arr[i] = new CsInsn(arr_raw[i], this.arch, ns.csh, cs, this.diet);
+    }
+
+    return arr;
+  }
+
+  private interface CS extends Library {
+    public int cs_open(int arch, int mode, PointerByReference handle);
+    public NativeLong cs_disasm(Pointer handle, byte[] code, NativeLong code_len,
+        long addr, NativeLong count, PointerByReference insn);
+    public void cs_free(Pointer p, NativeLong count);
+    public int cs_close(PointerByReference handle);
+    public int cs_option(Pointer handle, int option, NativeLong optionValue);
+
+    public String cs_reg_name(Pointer csh, int id);
+    public int cs_op_count(Pointer csh, Pointer insn, int type);
+    public int cs_op_index(Pointer csh, Pointer insn, int type, int index);
+
+    public String cs_insn_name(Pointer csh, int id);
+    public String cs_group_name(Pointer csh, int id);
+    public byte cs_insn_group(Pointer csh, Pointer insn, int id);
+    public byte cs_reg_read(Pointer csh, Pointer insn, int id);
+    public byte cs_reg_write(Pointer csh, Pointer insn, int id);
+    public int cs_errno(Pointer csh);
+    public int cs_version(IntByReference major, IntByReference minor);
+    public boolean cs_support(int query);
+    public String cs_strerror(int code);
+    public int cs_regs_access(Pointer handle, Pointer insn, Pointer regs_read, ByteByReference regs_read_count, Pointer regs_write, ByteByReference regs_write_count);
+  }
+
+  // Capstone API version
+  public static final int CS_API_MAJOR = 5;
+  public static final int CS_API_MINOR = 0;
+
+  // architectures
+  public static final int CS_ARCH_ARM = 0;
+  public static final int CS_ARCH_ARM64 = 1;
+  public static final int CS_ARCH_MIPS = 2;
+  public static final int CS_ARCH_X86 = 3;
+  public static final int CS_ARCH_PPC = 4;
+  public static final int CS_ARCH_SPARC = 5;
+  public static final int CS_ARCH_SYSZ = 6;
+  public static final int CS_ARCH_XCORE = 7;
+  public static final int CS_ARCH_M68K = 8;
+  public static final int CS_ARCH_TMS320C64X = 9;
+  public static final int CS_ARCH_M680X = 10;
+  public static final int CS_ARCH_MAX = 11;
+  public static final int CS_ARCH_ALL = 0xFFFF; // query id for cs_support()
+
+  // disasm mode
+  public static final int CS_MODE_LITTLE_ENDIAN = 0;  // little-endian mode (default mode)
+  public static final int CS_MODE_ARM = 0;	          // 32-bit ARM
+  public static final int CS_MODE_16 = 1 << 1;		// 16-bit mode for X86
+  public static final int CS_MODE_32 = 1 << 2;		// 32-bit mode for X86
+  public static final int CS_MODE_64 = 1 << 3;		// 64-bit mode for X86, PPC
+  public static final int CS_MODE_THUMB = 1 << 4;	  // ARM's Thumb mode, including Thumb-2
+  public static final int CS_MODE_MCLASS = 1 << 5;	  // ARM's Cortex-M series
+  public static final int CS_MODE_V8 = 1 << 6;	      // ARMv8 A32 encodings for ARM
+  public static final int CS_MODE_MICRO = 1 << 4;	  // MicroMips mode (Mips arch)
+  public static final int CS_MODE_MIPS3 = 1 << 5;     // Mips III ISA
+  public static final int CS_MODE_MIPS32R6 = 1 << 6;  // Mips32r6 ISA
+  public static final int CS_MODE_MIPS2 = 1 << 7;  // Mips II ISA
+  public static final int CS_MODE_BIG_ENDIAN = 1 << 31; // big-endian mode
+  public static final int CS_MODE_V9 = 1 << 4;	      // SparcV9 mode (Sparc arch)
+  public static final int CS_MODE_MIPS32 = CS_MODE_32; // Mips32 ISA
+  public static final int CS_MODE_MIPS64 = CS_MODE_64; // Mips64 ISA
+  public static final int CS_MODE_QPX = 1 << 4; // Quad Processing eXtensions mode (PPC)
+  public static final int CS_MODE_M680X_6301 = 1 << 1; // M680X Hitachi 6301,6303 mode
+  public static final int CS_MODE_M680X_6309 = 1 << 2; // M680X Hitachi 6309 mode
+  public static final int CS_MODE_M680X_6800 = 1 << 3; // M680X Motorola 6800,6802 mode
+  public static final int CS_MODE_M680X_6801 = 1 << 4; // M680X Motorola 6801,6803 mode
+  public static final int CS_MODE_M680X_6805 = 1 << 5; // M680X Motorola 6805 mode
+  public static final int CS_MODE_M680X_6808 = 1 << 6; // M680X Motorola 6808 mode
+  public static final int CS_MODE_M680X_6809 = 1 << 7; // M680X Motorola 6809 mode
+  public static final int CS_MODE_M680X_6811 = 1 << 8; // M680X Motorola/Freescale 68HC11 mode
+  public static final int CS_MODE_M680X_CPU12 = 1 << 9; // M680X Motorola/Freescale/NXP CPU12 mode
+  public static final int CS_MODE_M680X_HCS08 = 1 << 10; // M680X Freescale HCS08 mode
+
+  // Capstone error
+  public static final int CS_ERR_OK = 0;
+  public static final int CS_ERR_MEM = 1;	    // Out-Of-Memory error
+  public static final int CS_ERR_ARCH = 2;	  // Unsupported architecture
+  public static final int CS_ERR_HANDLE = 3;	// Invalid handle
+  public static final int CS_ERR_CSH = 4;	    // Invalid csh argument
+  public static final int CS_ERR_MODE = 5;	  // Invalid/unsupported mode
+  public static final int CS_ERR_OPTION = 6;  // Invalid/unsupported option: cs_option()
+  public static final int CS_ERR_DETAIL = 7;  // Invalid/unsupported option: cs_option()
+  public static final int CS_ERR_MEMSETUP = 8;
+  public static final int CS_ERR_VERSION = 9;  //Unsupported version (bindings)
+  public static final int CS_ERR_DIET = 10;  //Information irrelevant in diet engine
+  public static final int CS_ERR_SKIPDATA = 11;  //Access irrelevant data for "data" instruction in SKIPDATA mode
+  public static final int CS_ERR_X86_ATT = 12;  //X86 AT&T syntax is unsupported (opt-out at compile time)
+  public static final int CS_ERR_X86_INTEL = 13;  //X86 Intel syntax is unsupported (opt-out at compile time)
+
+  // Capstone option type
+  public static final int CS_OPT_SYNTAX = 1;  // Intel X86 asm syntax (CS_ARCH_X86 arch)
+  public static final int CS_OPT_DETAIL = 2;  // Break down instruction structure into details
+  public static final int CS_OPT_MODE = 3;  // Change engine's mode at run-time
+
+  // Capstone option value
+  public static final int CS_OPT_OFF = 0;  // Turn OFF an option - default option of CS_OPT_DETAIL
+  public static final int CS_OPT_SYNTAX_INTEL = 1;  // Intel X86 asm syntax - default syntax on X86 (CS_OPT_SYNTAX,  CS_ARCH_X86)
+  public static final int CS_OPT_SYNTAX_ATT = 2;    // ATT asm syntax (CS_OPT_SYNTAX, CS_ARCH_X86)
+  public static final int CS_OPT_ON = 3;  // Turn ON an option (CS_OPT_DETAIL)
+  public static final int CS_OPT_SYNTAX_NOREGNAME = 3; // PPC asm syntax: Prints register name with only number (CS_OPT_SYNTAX)
+
+  // Common instruction operand types - to be consistent across all architectures.
+  public static final int CS_OP_INVALID = 0;
+  public static final int CS_OP_REG = 1;
+  public static final int CS_OP_IMM = 2;
+  public static final int CS_OP_MEM = 3;
+  public static final int CS_OP_FP  = 4;
+
+  // Common instruction operand access types - to be consistent across all architectures.
+  // It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
+  public static final int CS_AC_INVALID = 0;
+  public static final int CS_AC_READ = 1 << 0;
+  public static final int CS_AC_WRITE = 1 << 1;
+
+  // Common instruction groups - to be consistent across all architectures.
+  public static final int CS_GRP_INVALID = 0;  // uninitialized/invalid group.
+  public static final int CS_GRP_JUMP    = 1;  // all jump instructions (conditional+direct+indirect jumps)
+  public static final int CS_GRP_CALL    = 2;  // all call instructions
+  public static final int CS_GRP_RET     = 3;  // all return instructions
+  public static final int CS_GRP_INT     = 4;  // all interrupt instructions (int+syscall)
+  public static final int CS_GRP_IRET    = 5;  // all interrupt return instructions
+  public static final int CS_GRP_PRIVILEGE = 6;  // all privileged instructions
+
+  // Query id for cs_support()
+  public static final int CS_SUPPORT_DIET = CS_ARCH_ALL+1;	  // diet mode
+  public static final int CS_SUPPORT_X86_REDUCE = CS_ARCH_ALL+2;  // X86 reduce mode
+
+  protected class NativeStruct {
+      private Pointer csh;
+      private PointerByReference handleRef;
+  }
+
+  private static final CsInsn[] EMPTY_INSN = new CsInsn[0];
+
+  protected NativeStruct ns; // for memory retention
+  private CS cs;
+  public int arch;
+  public int mode;
+  private int syntax;
+  private int detail;
+  private boolean diet;
+
+  public Capstone(int arch, int mode) {
+    cs = (CS)Native.loadLibrary("capstone", CS.class);
+    int coreVersion = cs.cs_version(null, null);
+    int bindingVersion = (CS_API_MAJOR << 8) + CS_API_MINOR;
+    if (coreVersion != bindingVersion) {
+      throw  new RuntimeException("Different API version between core " + coreVersion +
+              " & binding " + bindingVersion + " (CS_ERR_VERSION)");
+    }
+
+    this.arch = arch;
+    this.mode = mode;
+    ns = new NativeStruct();
+    ns.handleRef = new PointerByReference();
+    if (cs.cs_open(arch, mode, ns.handleRef) != CS_ERR_OK) {
+      throw new RuntimeException("ERROR: Wrong arch or mode");
+    }
+    ns.csh = ns.handleRef.getValue();
+    this.detail = CS_OPT_OFF;
+	this.diet = cs.cs_support(CS_SUPPORT_DIET);
+  }
+
+  // return combined API version
+  public int version() {
+    return cs.cs_version(null, null);
+  }
+
+  // set Assembly syntax
+  public void setSyntax(int syntax) {
+    if (cs.cs_option(ns.csh, CS_OPT_SYNTAX, new NativeLong(syntax)) == CS_ERR_OK) {
+      this.syntax = syntax;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set assembly syntax");
+    }
+  }
+
+  // set detail option at run-time
+  public void setDetail(int opt) {
+    if (cs.cs_option(ns.csh, CS_OPT_DETAIL, new NativeLong(opt)) == CS_ERR_OK) {
+      this.detail = opt;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set detail option");
+    }
+  }
+
+  // set mode option at run-time
+  public void setMode(int opt) {
+    if (cs.cs_option(ns.csh, CS_OPT_MODE, new NativeLong(opt)) == CS_ERR_OK) {
+      this.mode = opt;
+    } else {
+      throw new RuntimeException("ERROR: Failed to set mode option");
+    }
+  }
+
+  // destructor automatically caled at destroyed time.
+  protected void finalize() {
+    // FIXME: crashed on Ubuntu 14.04 64bit, OpenJDK java 1.6.0_33
+    // cs.cs_close(ns.handleRef);
+  }
+
+  // destructor automatically caled at destroyed time.
+  public int close() {
+    return cs.cs_close(ns.handleRef);
+  }
+
+  /**
+   * Disassemble instructions from @code assumed to be located at @address,
+   * stop when encountering first broken instruction.
+   * 
+   * @param code The source machine code bytes.
+   * @param address The address of the first machine code byte.
+   * @return the array of successfully disassembled instructions, empty if no instruction could be disassembled.
+   */
+  public CsInsn[] disasm(byte[] code, long address) {
+    return disasm(code, address, 0);
+  }
+
+  /**
+   * Disassemble up to @count instructions from @code assumed to be located at @address,
+   * stop when encountering first broken instruction.
+   * 
+   * @param code The source machine code bytes.
+   * @param address The address of the first machine code byte.
+   * @param count The maximum number of instructions to disassemble, 0 for no maximum.
+   * @return the array of successfully disassembled instructions, empty if no instruction could be disassembled.
+   */
+  public CsInsn[] disasm(byte[] code, long address, long count) {
+    PointerByReference insnRef = new PointerByReference();
+
+    NativeLong c = cs.cs_disasm(ns.csh, code, new NativeLong(code.length), address, new NativeLong(count), insnRef);
+    
+    if (0 == c.intValue()) {
+    	return EMPTY_INSN;
+    }
+    
+    Pointer p = insnRef.getValue();
+    _cs_insn byref = new _cs_insn(p);
+
+    CsInsn[] allInsn = fromArrayRaw((_cs_insn[]) byref.toArray(c.intValue()));
+
+    // free allocated memory
+    // cs.cs_free(p, c);
+    // FIXME(danghvu): Can't free because memory is still inside CsInsn
+
+    return allInsn;
+  }
+
+  public String strerror(int code) {
+    return cs.cs_strerror(code);
+  }
+}
diff --git a/capstone/bindings/java/capstone/Evm_const.java b/capstone/bindings/java/capstone/Evm_const.java
new file mode 100644
index 000000000..db7c47a0a
--- /dev/null
+++ b/capstone/bindings/java/capstone/Evm_const.java
@@ -0,0 +1,155 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Evm_const {
+
+	public static final int EVM_INS_STOP = 0;
+	public static final int EVM_INS_ADD = 1;
+	public static final int EVM_INS_MUL = 2;
+	public static final int EVM_INS_SUB = 3;
+	public static final int EVM_INS_DIV = 4;
+	public static final int EVM_INS_SDIV = 5;
+	public static final int EVM_INS_MOD = 6;
+	public static final int EVM_INS_SMOD = 7;
+	public static final int EVM_INS_ADDMOD = 8;
+	public static final int EVM_INS_MULMOD = 9;
+	public static final int EVM_INS_EXP = 10;
+	public static final int EVM_INS_SIGNEXTEND = 11;
+	public static final int EVM_INS_LT = 16;
+	public static final int EVM_INS_GT = 17;
+	public static final int EVM_INS_SLT = 18;
+	public static final int EVM_INS_SGT = 19;
+	public static final int EVM_INS_EQ = 20;
+	public static final int EVM_INS_ISZERO = 21;
+	public static final int EVM_INS_AND = 22;
+	public static final int EVM_INS_OR = 23;
+	public static final int EVM_INS_XOR = 24;
+	public static final int EVM_INS_NOT = 25;
+	public static final int EVM_INS_BYTE = 26;
+	public static final int EVM_INS_SHA3 = 32;
+	public static final int EVM_INS_ADDRESS = 48;
+	public static final int EVM_INS_BALANCE = 49;
+	public static final int EVM_INS_ORIGIN = 50;
+	public static final int EVM_INS_CALLER = 51;
+	public static final int EVM_INS_CALLVALUE = 52;
+	public static final int EVM_INS_CALLDATALOAD = 53;
+	public static final int EVM_INS_CALLDATASIZE = 54;
+	public static final int EVM_INS_CALLDATACOPY = 55;
+	public static final int EVM_INS_CODESIZE = 56;
+	public static final int EVM_INS_CODECOPY = 57;
+	public static final int EVM_INS_GASPRICE = 58;
+	public static final int EVM_INS_EXTCODESIZE = 59;
+	public static final int EVM_INS_EXTCODECOPY = 60;
+	public static final int EVM_INS_RETURNDATASIZE = 61;
+	public static final int EVM_INS_RETURNDATACOPY = 62;
+	public static final int EVM_INS_BLOCKHASH = 64;
+	public static final int EVM_INS_COINBASE = 65;
+	public static final int EVM_INS_TIMESTAMP = 66;
+	public static final int EVM_INS_NUMBER = 67;
+	public static final int EVM_INS_DIFFICULTY = 68;
+	public static final int EVM_INS_GASLIMIT = 69;
+	public static final int EVM_INS_POP = 80;
+	public static final int EVM_INS_MLOAD = 81;
+	public static final int EVM_INS_MSTORE = 82;
+	public static final int EVM_INS_MSTORE8 = 83;
+	public static final int EVM_INS_SLOAD = 84;
+	public static final int EVM_INS_SSTORE = 85;
+	public static final int EVM_INS_JUMP = 86;
+	public static final int EVM_INS_JUMPI = 87;
+	public static final int EVM_INS_PC = 88;
+	public static final int EVM_INS_MSIZE = 89;
+	public static final int EVM_INS_GAS = 90;
+	public static final int EVM_INS_JUMPDEST = 91;
+	public static final int EVM_INS_PUSH1 = 96;
+	public static final int EVM_INS_PUSH2 = 97;
+	public static final int EVM_INS_PUSH3 = 98;
+	public static final int EVM_INS_PUSH4 = 99;
+	public static final int EVM_INS_PUSH5 = 100;
+	public static final int EVM_INS_PUSH6 = 101;
+	public static final int EVM_INS_PUSH7 = 102;
+	public static final int EVM_INS_PUSH8 = 103;
+	public static final int EVM_INS_PUSH9 = 104;
+	public static final int EVM_INS_PUSH10 = 105;
+	public static final int EVM_INS_PUSH11 = 106;
+	public static final int EVM_INS_PUSH12 = 107;
+	public static final int EVM_INS_PUSH13 = 108;
+	public static final int EVM_INS_PUSH14 = 109;
+	public static final int EVM_INS_PUSH15 = 110;
+	public static final int EVM_INS_PUSH16 = 111;
+	public static final int EVM_INS_PUSH17 = 112;
+	public static final int EVM_INS_PUSH18 = 113;
+	public static final int EVM_INS_PUSH19 = 114;
+	public static final int EVM_INS_PUSH20 = 115;
+	public static final int EVM_INS_PUSH21 = 116;
+	public static final int EVM_INS_PUSH22 = 117;
+	public static final int EVM_INS_PUSH23 = 118;
+	public static final int EVM_INS_PUSH24 = 119;
+	public static final int EVM_INS_PUSH25 = 120;
+	public static final int EVM_INS_PUSH26 = 121;
+	public static final int EVM_INS_PUSH27 = 122;
+	public static final int EVM_INS_PUSH28 = 123;
+	public static final int EVM_INS_PUSH29 = 124;
+	public static final int EVM_INS_PUSH30 = 125;
+	public static final int EVM_INS_PUSH31 = 126;
+	public static final int EVM_INS_PUSH32 = 127;
+	public static final int EVM_INS_DUP1 = 128;
+	public static final int EVM_INS_DUP2 = 129;
+	public static final int EVM_INS_DUP3 = 130;
+	public static final int EVM_INS_DUP4 = 131;
+	public static final int EVM_INS_DUP5 = 132;
+	public static final int EVM_INS_DUP6 = 133;
+	public static final int EVM_INS_DUP7 = 134;
+	public static final int EVM_INS_DUP8 = 135;
+	public static final int EVM_INS_DUP9 = 136;
+	public static final int EVM_INS_DUP10 = 137;
+	public static final int EVM_INS_DUP11 = 138;
+	public static final int EVM_INS_DUP12 = 139;
+	public static final int EVM_INS_DUP13 = 140;
+	public static final int EVM_INS_DUP14 = 141;
+	public static final int EVM_INS_DUP15 = 142;
+	public static final int EVM_INS_DUP16 = 143;
+	public static final int EVM_INS_SWAP1 = 144;
+	public static final int EVM_INS_SWAP2 = 145;
+	public static final int EVM_INS_SWAP3 = 146;
+	public static final int EVM_INS_SWAP4 = 147;
+	public static final int EVM_INS_SWAP5 = 148;
+	public static final int EVM_INS_SWAP6 = 149;
+	public static final int EVM_INS_SWAP7 = 150;
+	public static final int EVM_INS_SWAP8 = 151;
+	public static final int EVM_INS_SWAP9 = 152;
+	public static final int EVM_INS_SWAP10 = 153;
+	public static final int EVM_INS_SWAP11 = 154;
+	public static final int EVM_INS_SWAP12 = 155;
+	public static final int EVM_INS_SWAP13 = 156;
+	public static final int EVM_INS_SWAP14 = 157;
+	public static final int EVM_INS_SWAP15 = 158;
+	public static final int EVM_INS_SWAP16 = 159;
+	public static final int EVM_INS_LOG0 = 160;
+	public static final int EVM_INS_LOG1 = 161;
+	public static final int EVM_INS_LOG2 = 162;
+	public static final int EVM_INS_LOG3 = 163;
+	public static final int EVM_INS_LOG4 = 164;
+	public static final int EVM_INS_CREATE = 240;
+	public static final int EVM_INS_CALL = 241;
+	public static final int EVM_INS_CALLCODE = 242;
+	public static final int EVM_INS_RETURN = 243;
+	public static final int EVM_INS_DELEGATECALL = 244;
+	public static final int EVM_INS_CALLBLACKBOX = 245;
+	public static final int EVM_INS_STATICCALL = 250;
+	public static final int EVM_INS_REVERT = 253;
+	public static final int EVM_INS_SUICIDE = 255;
+	public static final int EVM_INS_INVALID = 512;
+	public static final int EVM_INS_ENDING = 513;
+
+	public static final int EVM_GRP_INVALID = 0;
+	public static final int EVM_GRP_JUMP = 1;
+	public static final int EVM_GRP_MATH = 8;
+	public static final int EVM_GRP_STACK_WRITE = 9;
+	public static final int EVM_GRP_STACK_READ = 10;
+	public static final int EVM_GRP_MEM_WRITE = 11;
+	public static final int EVM_GRP_MEM_READ = 12;
+	public static final int EVM_GRP_STORE_WRITE = 13;
+	public static final int EVM_GRP_STORE_READ = 14;
+	public static final int EVM_GRP_HALT = 15;
+	public static final int EVM_GRP_ENDING = 16;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/M680x.java b/capstone/bindings/java/capstone/M680x.java
new file mode 100644
index 000000000..f15857bc4
--- /dev/null
+++ b/capstone/bindings/java/capstone/M680x.java
@@ -0,0 +1,132 @@
+// Capstone Java binding
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.M680x_const.*;
+
+public class M680x {
+
+  public static class OpIndexed extends Structure {
+    public int base_reg;
+    public int offset_reg;
+    public short offset;
+    public short offset_addr;
+    public byte offset_bits;
+    public byte inc_dec;
+    public byte flags;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base_reg", "offset_reg", "offset", "offset_addr", "offset_bits", "inc_dec", "flags");
+    }
+  }
+
+  public static class OpRelative extends Structure {
+    public short address;
+    public short offset;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("address", "offset");
+    }
+  }
+
+  public static class OpExtended extends Structure {
+    public short address;
+    public byte indirect;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("address", "indirect");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int imm;
+    public int reg;
+    public OpIndexed idx;
+    public OpRelative rel;
+    public OpExtended ext;
+    public byte direct_addr;
+    public byte const_val;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("imm", "reg", "idx", "rel", "ext", "direct_addr", "const_val");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+    public byte size;
+    public byte access;
+
+    public void read() {
+      readField("type");
+      if (type == M680X_OP_IMMEDIATE)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_REGISTER)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_INDEXED)
+        value.setType(OpIndexed.class);
+      if (type == M680X_OP_RELATIVE)
+        value.setType(OpRelative.class);
+      if (type == M680X_OP_EXTENDED)
+        value.setType(OpExtended.class);
+      if (type == M680X_OP_DIRECT)
+        value.setType(Integer.TYPE);
+      if (type == M680X_OP_INVALID)
+        return;
+      readField("value");
+      readField("size");
+      readField("access");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value", "size", "access");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte flags;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[9];
+    }
+
+    public void read() {
+      readField("flags");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("flags", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public byte flags;
+    public Operand [] op = null;
+
+    public OpInfo(UnionOpInfo op_info) {
+      flags = op_info.flags;
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/M680x_const.java b/capstone/bindings/java/capstone/M680x_const.java
new file mode 100644
index 000000000..29eca2838
--- /dev/null
+++ b/capstone/bindings/java/capstone/M680x_const.java
@@ -0,0 +1,419 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class M680x_const {
+	public static final int M680X_OPERAND_COUNT = 9;
+
+	public static final int M680X_REG_INVALID = 0;
+	public static final int M680X_REG_A = 1;
+	public static final int M680X_REG_B = 2;
+	public static final int M680X_REG_E = 3;
+	public static final int M680X_REG_F = 4;
+	public static final int M680X_REG_0 = 5;
+	public static final int M680X_REG_D = 6;
+	public static final int M680X_REG_W = 7;
+	public static final int M680X_REG_CC = 8;
+	public static final int M680X_REG_DP = 9;
+	public static final int M680X_REG_MD = 10;
+	public static final int M680X_REG_HX = 11;
+	public static final int M680X_REG_H = 12;
+	public static final int M680X_REG_X = 13;
+	public static final int M680X_REG_Y = 14;
+	public static final int M680X_REG_S = 15;
+	public static final int M680X_REG_U = 16;
+	public static final int M680X_REG_V = 17;
+	public static final int M680X_REG_Q = 18;
+	public static final int M680X_REG_PC = 19;
+	public static final int M680X_REG_TMP2 = 20;
+	public static final int M680X_REG_TMP3 = 21;
+	public static final int M680X_REG_ENDING = 22;
+
+	public static final int M680X_OP_INVALID = 0;
+	public static final int M680X_OP_REGISTER = 1;
+	public static final int M680X_OP_IMMEDIATE = 2;
+	public static final int M680X_OP_INDEXED = 3;
+	public static final int M680X_OP_EXTENDED = 4;
+	public static final int M680X_OP_DIRECT = 5;
+	public static final int M680X_OP_RELATIVE = 6;
+	public static final int M680X_OP_CONSTANT = 7;
+
+	public static final int M680X_OFFSET_NONE = 0;
+	public static final int M680X_OFFSET_BITS_5 = 5;
+	public static final int M680X_OFFSET_BITS_8 = 8;
+	public static final int M680X_OFFSET_BITS_9 = 9;
+	public static final int M680X_OFFSET_BITS_16 = 16;
+	public static final int M680X_IDX_INDIRECT = 1;
+	public static final int M680X_IDX_NO_COMMA = 2;
+	public static final int M680X_IDX_POST_INC_DEC = 4;
+
+	public static final int M680X_GRP_INVALID = 0;
+	public static final int M680X_GRP_JUMP = 1;
+	public static final int M680X_GRP_CALL = 2;
+	public static final int M680X_GRP_RET = 3;
+	public static final int M680X_GRP_INT = 4;
+	public static final int M680X_GRP_IRET = 5;
+	public static final int M680X_GRP_PRIV = 6;
+	public static final int M680X_GRP_BRAREL = 7;
+	public static final int M680X_GRP_ENDING = 8;
+	public static final int M680X_FIRST_OP_IN_MNEM = 1;
+	public static final int M680X_SECOND_OP_IN_MNEM = 2;
+
+	public static final int M680X_INS_INVLD = 0;
+	public static final int M680X_INS_ABA = 1;
+	public static final int M680X_INS_ABX = 2;
+	public static final int M680X_INS_ABY = 3;
+	public static final int M680X_INS_ADC = 4;
+	public static final int M680X_INS_ADCA = 5;
+	public static final int M680X_INS_ADCB = 6;
+	public static final int M680X_INS_ADCD = 7;
+	public static final int M680X_INS_ADCR = 8;
+	public static final int M680X_INS_ADD = 9;
+	public static final int M680X_INS_ADDA = 10;
+	public static final int M680X_INS_ADDB = 11;
+	public static final int M680X_INS_ADDD = 12;
+	public static final int M680X_INS_ADDE = 13;
+	public static final int M680X_INS_ADDF = 14;
+	public static final int M680X_INS_ADDR = 15;
+	public static final int M680X_INS_ADDW = 16;
+	public static final int M680X_INS_AIM = 17;
+	public static final int M680X_INS_AIS = 18;
+	public static final int M680X_INS_AIX = 19;
+	public static final int M680X_INS_AND = 20;
+	public static final int M680X_INS_ANDA = 21;
+	public static final int M680X_INS_ANDB = 22;
+	public static final int M680X_INS_ANDCC = 23;
+	public static final int M680X_INS_ANDD = 24;
+	public static final int M680X_INS_ANDR = 25;
+	public static final int M680X_INS_ASL = 26;
+	public static final int M680X_INS_ASLA = 27;
+	public static final int M680X_INS_ASLB = 28;
+	public static final int M680X_INS_ASLD = 29;
+	public static final int M680X_INS_ASR = 30;
+	public static final int M680X_INS_ASRA = 31;
+	public static final int M680X_INS_ASRB = 32;
+	public static final int M680X_INS_ASRD = 33;
+	public static final int M680X_INS_ASRX = 34;
+	public static final int M680X_INS_BAND = 35;
+	public static final int M680X_INS_BCC = 36;
+	public static final int M680X_INS_BCLR = 37;
+	public static final int M680X_INS_BCS = 38;
+	public static final int M680X_INS_BEOR = 39;
+	public static final int M680X_INS_BEQ = 40;
+	public static final int M680X_INS_BGE = 41;
+	public static final int M680X_INS_BGND = 42;
+	public static final int M680X_INS_BGT = 43;
+	public static final int M680X_INS_BHCC = 44;
+	public static final int M680X_INS_BHCS = 45;
+	public static final int M680X_INS_BHI = 46;
+	public static final int M680X_INS_BIAND = 47;
+	public static final int M680X_INS_BIEOR = 48;
+	public static final int M680X_INS_BIH = 49;
+	public static final int M680X_INS_BIL = 50;
+	public static final int M680X_INS_BIOR = 51;
+	public static final int M680X_INS_BIT = 52;
+	public static final int M680X_INS_BITA = 53;
+	public static final int M680X_INS_BITB = 54;
+	public static final int M680X_INS_BITD = 55;
+	public static final int M680X_INS_BITMD = 56;
+	public static final int M680X_INS_BLE = 57;
+	public static final int M680X_INS_BLS = 58;
+	public static final int M680X_INS_BLT = 59;
+	public static final int M680X_INS_BMC = 60;
+	public static final int M680X_INS_BMI = 61;
+	public static final int M680X_INS_BMS = 62;
+	public static final int M680X_INS_BNE = 63;
+	public static final int M680X_INS_BOR = 64;
+	public static final int M680X_INS_BPL = 65;
+	public static final int M680X_INS_BRCLR = 66;
+	public static final int M680X_INS_BRSET = 67;
+	public static final int M680X_INS_BRA = 68;
+	public static final int M680X_INS_BRN = 69;
+	public static final int M680X_INS_BSET = 70;
+	public static final int M680X_INS_BSR = 71;
+	public static final int M680X_INS_BVC = 72;
+	public static final int M680X_INS_BVS = 73;
+	public static final int M680X_INS_CALL = 74;
+	public static final int M680X_INS_CBA = 75;
+	public static final int M680X_INS_CBEQ = 76;
+	public static final int M680X_INS_CBEQA = 77;
+	public static final int M680X_INS_CBEQX = 78;
+	public static final int M680X_INS_CLC = 79;
+	public static final int M680X_INS_CLI = 80;
+	public static final int M680X_INS_CLR = 81;
+	public static final int M680X_INS_CLRA = 82;
+	public static final int M680X_INS_CLRB = 83;
+	public static final int M680X_INS_CLRD = 84;
+	public static final int M680X_INS_CLRE = 85;
+	public static final int M680X_INS_CLRF = 86;
+	public static final int M680X_INS_CLRH = 87;
+	public static final int M680X_INS_CLRW = 88;
+	public static final int M680X_INS_CLRX = 89;
+	public static final int M680X_INS_CLV = 90;
+	public static final int M680X_INS_CMP = 91;
+	public static final int M680X_INS_CMPA = 92;
+	public static final int M680X_INS_CMPB = 93;
+	public static final int M680X_INS_CMPD = 94;
+	public static final int M680X_INS_CMPE = 95;
+	public static final int M680X_INS_CMPF = 96;
+	public static final int M680X_INS_CMPR = 97;
+	public static final int M680X_INS_CMPS = 98;
+	public static final int M680X_INS_CMPU = 99;
+	public static final int M680X_INS_CMPW = 100;
+	public static final int M680X_INS_CMPX = 101;
+	public static final int M680X_INS_CMPY = 102;
+	public static final int M680X_INS_COM = 103;
+	public static final int M680X_INS_COMA = 104;
+	public static final int M680X_INS_COMB = 105;
+	public static final int M680X_INS_COMD = 106;
+	public static final int M680X_INS_COME = 107;
+	public static final int M680X_INS_COMF = 108;
+	public static final int M680X_INS_COMW = 109;
+	public static final int M680X_INS_COMX = 110;
+	public static final int M680X_INS_CPD = 111;
+	public static final int M680X_INS_CPHX = 112;
+	public static final int M680X_INS_CPS = 113;
+	public static final int M680X_INS_CPX = 114;
+	public static final int M680X_INS_CPY = 115;
+	public static final int M680X_INS_CWAI = 116;
+	public static final int M680X_INS_DAA = 117;
+	public static final int M680X_INS_DBEQ = 118;
+	public static final int M680X_INS_DBNE = 119;
+	public static final int M680X_INS_DBNZ = 120;
+	public static final int M680X_INS_DBNZA = 121;
+	public static final int M680X_INS_DBNZX = 122;
+	public static final int M680X_INS_DEC = 123;
+	public static final int M680X_INS_DECA = 124;
+	public static final int M680X_INS_DECB = 125;
+	public static final int M680X_INS_DECD = 126;
+	public static final int M680X_INS_DECE = 127;
+	public static final int M680X_INS_DECF = 128;
+	public static final int M680X_INS_DECW = 129;
+	public static final int M680X_INS_DECX = 130;
+	public static final int M680X_INS_DES = 131;
+	public static final int M680X_INS_DEX = 132;
+	public static final int M680X_INS_DEY = 133;
+	public static final int M680X_INS_DIV = 134;
+	public static final int M680X_INS_DIVD = 135;
+	public static final int M680X_INS_DIVQ = 136;
+	public static final int M680X_INS_EDIV = 137;
+	public static final int M680X_INS_EDIVS = 138;
+	public static final int M680X_INS_EIM = 139;
+	public static final int M680X_INS_EMACS = 140;
+	public static final int M680X_INS_EMAXD = 141;
+	public static final int M680X_INS_EMAXM = 142;
+	public static final int M680X_INS_EMIND = 143;
+	public static final int M680X_INS_EMINM = 144;
+	public static final int M680X_INS_EMUL = 145;
+	public static final int M680X_INS_EMULS = 146;
+	public static final int M680X_INS_EOR = 147;
+	public static final int M680X_INS_EORA = 148;
+	public static final int M680X_INS_EORB = 149;
+	public static final int M680X_INS_EORD = 150;
+	public static final int M680X_INS_EORR = 151;
+	public static final int M680X_INS_ETBL = 152;
+	public static final int M680X_INS_EXG = 153;
+	public static final int M680X_INS_FDIV = 154;
+	public static final int M680X_INS_IBEQ = 155;
+	public static final int M680X_INS_IBNE = 156;
+	public static final int M680X_INS_IDIV = 157;
+	public static final int M680X_INS_IDIVS = 158;
+	public static final int M680X_INS_ILLGL = 159;
+	public static final int M680X_INS_INC = 160;
+	public static final int M680X_INS_INCA = 161;
+	public static final int M680X_INS_INCB = 162;
+	public static final int M680X_INS_INCD = 163;
+	public static final int M680X_INS_INCE = 164;
+	public static final int M680X_INS_INCF = 165;
+	public static final int M680X_INS_INCW = 166;
+	public static final int M680X_INS_INCX = 167;
+	public static final int M680X_INS_INS = 168;
+	public static final int M680X_INS_INX = 169;
+	public static final int M680X_INS_INY = 170;
+	public static final int M680X_INS_JMP = 171;
+	public static final int M680X_INS_JSR = 172;
+	public static final int M680X_INS_LBCC = 173;
+	public static final int M680X_INS_LBCS = 174;
+	public static final int M680X_INS_LBEQ = 175;
+	public static final int M680X_INS_LBGE = 176;
+	public static final int M680X_INS_LBGT = 177;
+	public static final int M680X_INS_LBHI = 178;
+	public static final int M680X_INS_LBLE = 179;
+	public static final int M680X_INS_LBLS = 180;
+	public static final int M680X_INS_LBLT = 181;
+	public static final int M680X_INS_LBMI = 182;
+	public static final int M680X_INS_LBNE = 183;
+	public static final int M680X_INS_LBPL = 184;
+	public static final int M680X_INS_LBRA = 185;
+	public static final int M680X_INS_LBRN = 186;
+	public static final int M680X_INS_LBSR = 187;
+	public static final int M680X_INS_LBVC = 188;
+	public static final int M680X_INS_LBVS = 189;
+	public static final int M680X_INS_LDA = 190;
+	public static final int M680X_INS_LDAA = 191;
+	public static final int M680X_INS_LDAB = 192;
+	public static final int M680X_INS_LDB = 193;
+	public static final int M680X_INS_LDBT = 194;
+	public static final int M680X_INS_LDD = 195;
+	public static final int M680X_INS_LDE = 196;
+	public static final int M680X_INS_LDF = 197;
+	public static final int M680X_INS_LDHX = 198;
+	public static final int M680X_INS_LDMD = 199;
+	public static final int M680X_INS_LDQ = 200;
+	public static final int M680X_INS_LDS = 201;
+	public static final int M680X_INS_LDU = 202;
+	public static final int M680X_INS_LDW = 203;
+	public static final int M680X_INS_LDX = 204;
+	public static final int M680X_INS_LDY = 205;
+	public static final int M680X_INS_LEAS = 206;
+	public static final int M680X_INS_LEAU = 207;
+	public static final int M680X_INS_LEAX = 208;
+	public static final int M680X_INS_LEAY = 209;
+	public static final int M680X_INS_LSL = 210;
+	public static final int M680X_INS_LSLA = 211;
+	public static final int M680X_INS_LSLB = 212;
+	public static final int M680X_INS_LSLD = 213;
+	public static final int M680X_INS_LSLX = 214;
+	public static final int M680X_INS_LSR = 215;
+	public static final int M680X_INS_LSRA = 216;
+	public static final int M680X_INS_LSRB = 217;
+	public static final int M680X_INS_LSRD = 218;
+	public static final int M680X_INS_LSRW = 219;
+	public static final int M680X_INS_LSRX = 220;
+	public static final int M680X_INS_MAXA = 221;
+	public static final int M680X_INS_MAXM = 222;
+	public static final int M680X_INS_MEM = 223;
+	public static final int M680X_INS_MINA = 224;
+	public static final int M680X_INS_MINM = 225;
+	public static final int M680X_INS_MOV = 226;
+	public static final int M680X_INS_MOVB = 227;
+	public static final int M680X_INS_MOVW = 228;
+	public static final int M680X_INS_MUL = 229;
+	public static final int M680X_INS_MULD = 230;
+	public static final int M680X_INS_NEG = 231;
+	public static final int M680X_INS_NEGA = 232;
+	public static final int M680X_INS_NEGB = 233;
+	public static final int M680X_INS_NEGD = 234;
+	public static final int M680X_INS_NEGX = 235;
+	public static final int M680X_INS_NOP = 236;
+	public static final int M680X_INS_NSA = 237;
+	public static final int M680X_INS_OIM = 238;
+	public static final int M680X_INS_ORA = 239;
+	public static final int M680X_INS_ORAA = 240;
+	public static final int M680X_INS_ORAB = 241;
+	public static final int M680X_INS_ORB = 242;
+	public static final int M680X_INS_ORCC = 243;
+	public static final int M680X_INS_ORD = 244;
+	public static final int M680X_INS_ORR = 245;
+	public static final int M680X_INS_PSHA = 246;
+	public static final int M680X_INS_PSHB = 247;
+	public static final int M680X_INS_PSHC = 248;
+	public static final int M680X_INS_PSHD = 249;
+	public static final int M680X_INS_PSHH = 250;
+	public static final int M680X_INS_PSHS = 251;
+	public static final int M680X_INS_PSHSW = 252;
+	public static final int M680X_INS_PSHU = 253;
+	public static final int M680X_INS_PSHUW = 254;
+	public static final int M680X_INS_PSHX = 255;
+	public static final int M680X_INS_PSHY = 256;
+	public static final int M680X_INS_PULA = 257;
+	public static final int M680X_INS_PULB = 258;
+	public static final int M680X_INS_PULC = 259;
+	public static final int M680X_INS_PULD = 260;
+	public static final int M680X_INS_PULH = 261;
+	public static final int M680X_INS_PULS = 262;
+	public static final int M680X_INS_PULSW = 263;
+	public static final int M680X_INS_PULU = 264;
+	public static final int M680X_INS_PULUW = 265;
+	public static final int M680X_INS_PULX = 266;
+	public static final int M680X_INS_PULY = 267;
+	public static final int M680X_INS_REV = 268;
+	public static final int M680X_INS_REVW = 269;
+	public static final int M680X_INS_ROL = 270;
+	public static final int M680X_INS_ROLA = 271;
+	public static final int M680X_INS_ROLB = 272;
+	public static final int M680X_INS_ROLD = 273;
+	public static final int M680X_INS_ROLW = 274;
+	public static final int M680X_INS_ROLX = 275;
+	public static final int M680X_INS_ROR = 276;
+	public static final int M680X_INS_RORA = 277;
+	public static final int M680X_INS_RORB = 278;
+	public static final int M680X_INS_RORD = 279;
+	public static final int M680X_INS_RORW = 280;
+	public static final int M680X_INS_RORX = 281;
+	public static final int M680X_INS_RSP = 282;
+	public static final int M680X_INS_RTC = 283;
+	public static final int M680X_INS_RTI = 284;
+	public static final int M680X_INS_RTS = 285;
+	public static final int M680X_INS_SBA = 286;
+	public static final int M680X_INS_SBC = 287;
+	public static final int M680X_INS_SBCA = 288;
+	public static final int M680X_INS_SBCB = 289;
+	public static final int M680X_INS_SBCD = 290;
+	public static final int M680X_INS_SBCR = 291;
+	public static final int M680X_INS_SEC = 292;
+	public static final int M680X_INS_SEI = 293;
+	public static final int M680X_INS_SEV = 294;
+	public static final int M680X_INS_SEX = 295;
+	public static final int M680X_INS_SEXW = 296;
+	public static final int M680X_INS_SLP = 297;
+	public static final int M680X_INS_STA = 298;
+	public static final int M680X_INS_STAA = 299;
+	public static final int M680X_INS_STAB = 300;
+	public static final int M680X_INS_STB = 301;
+	public static final int M680X_INS_STBT = 302;
+	public static final int M680X_INS_STD = 303;
+	public static final int M680X_INS_STE = 304;
+	public static final int M680X_INS_STF = 305;
+	public static final int M680X_INS_STOP = 306;
+	public static final int M680X_INS_STHX = 307;
+	public static final int M680X_INS_STQ = 308;
+	public static final int M680X_INS_STS = 309;
+	public static final int M680X_INS_STU = 310;
+	public static final int M680X_INS_STW = 311;
+	public static final int M680X_INS_STX = 312;
+	public static final int M680X_INS_STY = 313;
+	public static final int M680X_INS_SUB = 314;
+	public static final int M680X_INS_SUBA = 315;
+	public static final int M680X_INS_SUBB = 316;
+	public static final int M680X_INS_SUBD = 317;
+	public static final int M680X_INS_SUBE = 318;
+	public static final int M680X_INS_SUBF = 319;
+	public static final int M680X_INS_SUBR = 320;
+	public static final int M680X_INS_SUBW = 321;
+	public static final int M680X_INS_SWI = 322;
+	public static final int M680X_INS_SWI2 = 323;
+	public static final int M680X_INS_SWI3 = 324;
+	public static final int M680X_INS_SYNC = 325;
+	public static final int M680X_INS_TAB = 326;
+	public static final int M680X_INS_TAP = 327;
+	public static final int M680X_INS_TAX = 328;
+	public static final int M680X_INS_TBA = 329;
+	public static final int M680X_INS_TBEQ = 330;
+	public static final int M680X_INS_TBL = 331;
+	public static final int M680X_INS_TBNE = 332;
+	public static final int M680X_INS_TEST = 333;
+	public static final int M680X_INS_TFM = 334;
+	public static final int M680X_INS_TFR = 335;
+	public static final int M680X_INS_TIM = 336;
+	public static final int M680X_INS_TPA = 337;
+	public static final int M680X_INS_TST = 338;
+	public static final int M680X_INS_TSTA = 339;
+	public static final int M680X_INS_TSTB = 340;
+	public static final int M680X_INS_TSTD = 341;
+	public static final int M680X_INS_TSTE = 342;
+	public static final int M680X_INS_TSTF = 343;
+	public static final int M680X_INS_TSTW = 344;
+	public static final int M680X_INS_TSTX = 345;
+	public static final int M680X_INS_TSX = 346;
+	public static final int M680X_INS_TSY = 347;
+	public static final int M680X_INS_TXA = 348;
+	public static final int M680X_INS_TXS = 349;
+	public static final int M680X_INS_TYS = 350;
+	public static final int M680X_INS_WAI = 351;
+	public static final int M680X_INS_WAIT = 352;
+	public static final int M680X_INS_WAV = 353;
+	public static final int M680X_INS_WAVR = 354;
+	public static final int M680X_INS_XGDX = 355;
+	public static final int M680X_INS_XGDY = 356;
+	public static final int M680X_INS_ENDING = 357;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/M68k_const.java b/capstone/bindings/java/capstone/M68k_const.java
new file mode 100644
index 000000000..74cd8f9b9
--- /dev/null
+++ b/capstone/bindings/java/capstone/M68k_const.java
@@ -0,0 +1,489 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class M68k_const {
+	public static final int M68K_OPERAND_COUNT = 4;
+
+	public static final int M68K_REG_INVALID = 0;
+	public static final int M68K_REG_D0 = 1;
+	public static final int M68K_REG_D1 = 2;
+	public static final int M68K_REG_D2 = 3;
+	public static final int M68K_REG_D3 = 4;
+	public static final int M68K_REG_D4 = 5;
+	public static final int M68K_REG_D5 = 6;
+	public static final int M68K_REG_D6 = 7;
+	public static final int M68K_REG_D7 = 8;
+	public static final int M68K_REG_A0 = 9;
+	public static final int M68K_REG_A1 = 10;
+	public static final int M68K_REG_A2 = 11;
+	public static final int M68K_REG_A3 = 12;
+	public static final int M68K_REG_A4 = 13;
+	public static final int M68K_REG_A5 = 14;
+	public static final int M68K_REG_A6 = 15;
+	public static final int M68K_REG_A7 = 16;
+	public static final int M68K_REG_FP0 = 17;
+	public static final int M68K_REG_FP1 = 18;
+	public static final int M68K_REG_FP2 = 19;
+	public static final int M68K_REG_FP3 = 20;
+	public static final int M68K_REG_FP4 = 21;
+	public static final int M68K_REG_FP5 = 22;
+	public static final int M68K_REG_FP6 = 23;
+	public static final int M68K_REG_FP7 = 24;
+	public static final int M68K_REG_PC = 25;
+	public static final int M68K_REG_SR = 26;
+	public static final int M68K_REG_CCR = 27;
+	public static final int M68K_REG_SFC = 28;
+	public static final int M68K_REG_DFC = 29;
+	public static final int M68K_REG_USP = 30;
+	public static final int M68K_REG_VBR = 31;
+	public static final int M68K_REG_CACR = 32;
+	public static final int M68K_REG_CAAR = 33;
+	public static final int M68K_REG_MSP = 34;
+	public static final int M68K_REG_ISP = 35;
+	public static final int M68K_REG_TC = 36;
+	public static final int M68K_REG_ITT0 = 37;
+	public static final int M68K_REG_ITT1 = 38;
+	public static final int M68K_REG_DTT0 = 39;
+	public static final int M68K_REG_DTT1 = 40;
+	public static final int M68K_REG_MMUSR = 41;
+	public static final int M68K_REG_URP = 42;
+	public static final int M68K_REG_SRP = 43;
+	public static final int M68K_REG_FPCR = 44;
+	public static final int M68K_REG_FPSR = 45;
+	public static final int M68K_REG_FPIAR = 46;
+	public static final int M68K_REG_ENDING = 47;
+
+	public static final int M68K_AM_NONE = 0;
+	public static final int M68K_AM_REG_DIRECT_DATA = 1;
+	public static final int M68K_AM_REG_DIRECT_ADDR = 2;
+	public static final int M68K_AM_REGI_ADDR = 3;
+	public static final int M68K_AM_REGI_ADDR_POST_INC = 4;
+	public static final int M68K_AM_REGI_ADDR_PRE_DEC = 5;
+	public static final int M68K_AM_REGI_ADDR_DISP = 6;
+	public static final int M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;
+	public static final int M68K_AM_AREGI_INDEX_BASE_DISP = 8;
+	public static final int M68K_AM_MEMI_POST_INDEX = 9;
+	public static final int M68K_AM_MEMI_PRE_INDEX = 10;
+	public static final int M68K_AM_PCI_DISP = 11;
+	public static final int M68K_AM_PCI_INDEX_8_BIT_DISP = 12;
+	public static final int M68K_AM_PCI_INDEX_BASE_DISP = 13;
+	public static final int M68K_AM_PC_MEMI_POST_INDEX = 14;
+	public static final int M68K_AM_PC_MEMI_PRE_INDEX = 15;
+	public static final int M68K_AM_ABSOLUTE_DATA_SHORT = 16;
+	public static final int M68K_AM_ABSOLUTE_DATA_LONG = 17;
+	public static final int M68K_AM_IMMEDIATE = 18;
+	public static final int M68K_AM_BRANCH_DISPLACEMENT = 19;
+
+	public static final int M68K_OP_INVALID = 0;
+	public static final int M68K_OP_REG = 1;
+	public static final int M68K_OP_IMM = 2;
+	public static final int M68K_OP_MEM = 3;
+	public static final int M68K_OP_FP_SINGLE = 4;
+	public static final int M68K_OP_FP_DOUBLE = 5;
+	public static final int M68K_OP_REG_BITS = 6;
+	public static final int M68K_OP_REG_PAIR = 7;
+	public static final int M68K_OP_BR_DISP = 8;
+
+	public static final int M68K_OP_BR_DISP_SIZE_INVALID = 0;
+	public static final int M68K_OP_BR_DISP_SIZE_BYTE = 1;
+	public static final int M68K_OP_BR_DISP_SIZE_WORD = 2;
+	public static final int M68K_OP_BR_DISP_SIZE_LONG = 4;
+
+	public static final int M68K_CPU_SIZE_NONE = 0;
+	public static final int M68K_CPU_SIZE_BYTE = 1;
+	public static final int M68K_CPU_SIZE_WORD = 2;
+	public static final int M68K_CPU_SIZE_LONG = 4;
+
+	public static final int M68K_FPU_SIZE_NONE = 0;
+	public static final int M68K_FPU_SIZE_SINGLE = 4;
+	public static final int M68K_FPU_SIZE_DOUBLE = 8;
+	public static final int M68K_FPU_SIZE_EXTENDED = 12;
+
+	public static final int M68K_SIZE_TYPE_INVALID = 0;
+	public static final int M68K_SIZE_TYPE_CPU = 1;
+	public static final int M68K_SIZE_TYPE_FPU = 2;
+
+	public static final int M68K_INS_INVALID = 0;
+	public static final int M68K_INS_ABCD = 1;
+	public static final int M68K_INS_ADD = 2;
+	public static final int M68K_INS_ADDA = 3;
+	public static final int M68K_INS_ADDI = 4;
+	public static final int M68K_INS_ADDQ = 5;
+	public static final int M68K_INS_ADDX = 6;
+	public static final int M68K_INS_AND = 7;
+	public static final int M68K_INS_ANDI = 8;
+	public static final int M68K_INS_ASL = 9;
+	public static final int M68K_INS_ASR = 10;
+	public static final int M68K_INS_BHS = 11;
+	public static final int M68K_INS_BLO = 12;
+	public static final int M68K_INS_BHI = 13;
+	public static final int M68K_INS_BLS = 14;
+	public static final int M68K_INS_BCC = 15;
+	public static final int M68K_INS_BCS = 16;
+	public static final int M68K_INS_BNE = 17;
+	public static final int M68K_INS_BEQ = 18;
+	public static final int M68K_INS_BVC = 19;
+	public static final int M68K_INS_BVS = 20;
+	public static final int M68K_INS_BPL = 21;
+	public static final int M68K_INS_BMI = 22;
+	public static final int M68K_INS_BGE = 23;
+	public static final int M68K_INS_BLT = 24;
+	public static final int M68K_INS_BGT = 25;
+	public static final int M68K_INS_BLE = 26;
+	public static final int M68K_INS_BRA = 27;
+	public static final int M68K_INS_BSR = 28;
+	public static final int M68K_INS_BCHG = 29;
+	public static final int M68K_INS_BCLR = 30;
+	public static final int M68K_INS_BSET = 31;
+	public static final int M68K_INS_BTST = 32;
+	public static final int M68K_INS_BFCHG = 33;
+	public static final int M68K_INS_BFCLR = 34;
+	public static final int M68K_INS_BFEXTS = 35;
+	public static final int M68K_INS_BFEXTU = 36;
+	public static final int M68K_INS_BFFFO = 37;
+	public static final int M68K_INS_BFINS = 38;
+	public static final int M68K_INS_BFSET = 39;
+	public static final int M68K_INS_BFTST = 40;
+	public static final int M68K_INS_BKPT = 41;
+	public static final int M68K_INS_CALLM = 42;
+	public static final int M68K_INS_CAS = 43;
+	public static final int M68K_INS_CAS2 = 44;
+	public static final int M68K_INS_CHK = 45;
+	public static final int M68K_INS_CHK2 = 46;
+	public static final int M68K_INS_CLR = 47;
+	public static final int M68K_INS_CMP = 48;
+	public static final int M68K_INS_CMPA = 49;
+	public static final int M68K_INS_CMPI = 50;
+	public static final int M68K_INS_CMPM = 51;
+	public static final int M68K_INS_CMP2 = 52;
+	public static final int M68K_INS_CINVL = 53;
+	public static final int M68K_INS_CINVP = 54;
+	public static final int M68K_INS_CINVA = 55;
+	public static final int M68K_INS_CPUSHL = 56;
+	public static final int M68K_INS_CPUSHP = 57;
+	public static final int M68K_INS_CPUSHA = 58;
+	public static final int M68K_INS_DBT = 59;
+	public static final int M68K_INS_DBF = 60;
+	public static final int M68K_INS_DBHI = 61;
+	public static final int M68K_INS_DBLS = 62;
+	public static final int M68K_INS_DBCC = 63;
+	public static final int M68K_INS_DBCS = 64;
+	public static final int M68K_INS_DBNE = 65;
+	public static final int M68K_INS_DBEQ = 66;
+	public static final int M68K_INS_DBVC = 67;
+	public static final int M68K_INS_DBVS = 68;
+	public static final int M68K_INS_DBPL = 69;
+	public static final int M68K_INS_DBMI = 70;
+	public static final int M68K_INS_DBGE = 71;
+	public static final int M68K_INS_DBLT = 72;
+	public static final int M68K_INS_DBGT = 73;
+	public static final int M68K_INS_DBLE = 74;
+	public static final int M68K_INS_DBRA = 75;
+	public static final int M68K_INS_DIVS = 76;
+	public static final int M68K_INS_DIVSL = 77;
+	public static final int M68K_INS_DIVU = 78;
+	public static final int M68K_INS_DIVUL = 79;
+	public static final int M68K_INS_EOR = 80;
+	public static final int M68K_INS_EORI = 81;
+	public static final int M68K_INS_EXG = 82;
+	public static final int M68K_INS_EXT = 83;
+	public static final int M68K_INS_EXTB = 84;
+	public static final int M68K_INS_FABS = 85;
+	public static final int M68K_INS_FSABS = 86;
+	public static final int M68K_INS_FDABS = 87;
+	public static final int M68K_INS_FACOS = 88;
+	public static final int M68K_INS_FADD = 89;
+	public static final int M68K_INS_FSADD = 90;
+	public static final int M68K_INS_FDADD = 91;
+	public static final int M68K_INS_FASIN = 92;
+	public static final int M68K_INS_FATAN = 93;
+	public static final int M68K_INS_FATANH = 94;
+	public static final int M68K_INS_FBF = 95;
+	public static final int M68K_INS_FBEQ = 96;
+	public static final int M68K_INS_FBOGT = 97;
+	public static final int M68K_INS_FBOGE = 98;
+	public static final int M68K_INS_FBOLT = 99;
+	public static final int M68K_INS_FBOLE = 100;
+	public static final int M68K_INS_FBOGL = 101;
+	public static final int M68K_INS_FBOR = 102;
+	public static final int M68K_INS_FBUN = 103;
+	public static final int M68K_INS_FBUEQ = 104;
+	public static final int M68K_INS_FBUGT = 105;
+	public static final int M68K_INS_FBUGE = 106;
+	public static final int M68K_INS_FBULT = 107;
+	public static final int M68K_INS_FBULE = 108;
+	public static final int M68K_INS_FBNE = 109;
+	public static final int M68K_INS_FBT = 110;
+	public static final int M68K_INS_FBSF = 111;
+	public static final int M68K_INS_FBSEQ = 112;
+	public static final int M68K_INS_FBGT = 113;
+	public static final int M68K_INS_FBGE = 114;
+	public static final int M68K_INS_FBLT = 115;
+	public static final int M68K_INS_FBLE = 116;
+	public static final int M68K_INS_FBGL = 117;
+	public static final int M68K_INS_FBGLE = 118;
+	public static final int M68K_INS_FBNGLE = 119;
+	public static final int M68K_INS_FBNGL = 120;
+	public static final int M68K_INS_FBNLE = 121;
+	public static final int M68K_INS_FBNLT = 122;
+	public static final int M68K_INS_FBNGE = 123;
+	public static final int M68K_INS_FBNGT = 124;
+	public static final int M68K_INS_FBSNE = 125;
+	public static final int M68K_INS_FBST = 126;
+	public static final int M68K_INS_FCMP = 127;
+	public static final int M68K_INS_FCOS = 128;
+	public static final int M68K_INS_FCOSH = 129;
+	public static final int M68K_INS_FDBF = 130;
+	public static final int M68K_INS_FDBEQ = 131;
+	public static final int M68K_INS_FDBOGT = 132;
+	public static final int M68K_INS_FDBOGE = 133;
+	public static final int M68K_INS_FDBOLT = 134;
+	public static final int M68K_INS_FDBOLE = 135;
+	public static final int M68K_INS_FDBOGL = 136;
+	public static final int M68K_INS_FDBOR = 137;
+	public static final int M68K_INS_FDBUN = 138;
+	public static final int M68K_INS_FDBUEQ = 139;
+	public static final int M68K_INS_FDBUGT = 140;
+	public static final int M68K_INS_FDBUGE = 141;
+	public static final int M68K_INS_FDBULT = 142;
+	public static final int M68K_INS_FDBULE = 143;
+	public static final int M68K_INS_FDBNE = 144;
+	public static final int M68K_INS_FDBT = 145;
+	public static final int M68K_INS_FDBSF = 146;
+	public static final int M68K_INS_FDBSEQ = 147;
+	public static final int M68K_INS_FDBGT = 148;
+	public static final int M68K_INS_FDBGE = 149;
+	public static final int M68K_INS_FDBLT = 150;
+	public static final int M68K_INS_FDBLE = 151;
+	public static final int M68K_INS_FDBGL = 152;
+	public static final int M68K_INS_FDBGLE = 153;
+	public static final int M68K_INS_FDBNGLE = 154;
+	public static final int M68K_INS_FDBNGL = 155;
+	public static final int M68K_INS_FDBNLE = 156;
+	public static final int M68K_INS_FDBNLT = 157;
+	public static final int M68K_INS_FDBNGE = 158;
+	public static final int M68K_INS_FDBNGT = 159;
+	public static final int M68K_INS_FDBSNE = 160;
+	public static final int M68K_INS_FDBST = 161;
+	public static final int M68K_INS_FDIV = 162;
+	public static final int M68K_INS_FSDIV = 163;
+	public static final int M68K_INS_FDDIV = 164;
+	public static final int M68K_INS_FETOX = 165;
+	public static final int M68K_INS_FETOXM1 = 166;
+	public static final int M68K_INS_FGETEXP = 167;
+	public static final int M68K_INS_FGETMAN = 168;
+	public static final int M68K_INS_FINT = 169;
+	public static final int M68K_INS_FINTRZ = 170;
+	public static final int M68K_INS_FLOG10 = 171;
+	public static final int M68K_INS_FLOG2 = 172;
+	public static final int M68K_INS_FLOGN = 173;
+	public static final int M68K_INS_FLOGNP1 = 174;
+	public static final int M68K_INS_FMOD = 175;
+	public static final int M68K_INS_FMOVE = 176;
+	public static final int M68K_INS_FSMOVE = 177;
+	public static final int M68K_INS_FDMOVE = 178;
+	public static final int M68K_INS_FMOVECR = 179;
+	public static final int M68K_INS_FMOVEM = 180;
+	public static final int M68K_INS_FMUL = 181;
+	public static final int M68K_INS_FSMUL = 182;
+	public static final int M68K_INS_FDMUL = 183;
+	public static final int M68K_INS_FNEG = 184;
+	public static final int M68K_INS_FSNEG = 185;
+	public static final int M68K_INS_FDNEG = 186;
+	public static final int M68K_INS_FNOP = 187;
+	public static final int M68K_INS_FREM = 188;
+	public static final int M68K_INS_FRESTORE = 189;
+	public static final int M68K_INS_FSAVE = 190;
+	public static final int M68K_INS_FSCALE = 191;
+	public static final int M68K_INS_FSGLDIV = 192;
+	public static final int M68K_INS_FSGLMUL = 193;
+	public static final int M68K_INS_FSIN = 194;
+	public static final int M68K_INS_FSINCOS = 195;
+	public static final int M68K_INS_FSINH = 196;
+	public static final int M68K_INS_FSQRT = 197;
+	public static final int M68K_INS_FSSQRT = 198;
+	public static final int M68K_INS_FDSQRT = 199;
+	public static final int M68K_INS_FSF = 200;
+	public static final int M68K_INS_FSBEQ = 201;
+	public static final int M68K_INS_FSOGT = 202;
+	public static final int M68K_INS_FSOGE = 203;
+	public static final int M68K_INS_FSOLT = 204;
+	public static final int M68K_INS_FSOLE = 205;
+	public static final int M68K_INS_FSOGL = 206;
+	public static final int M68K_INS_FSOR = 207;
+	public static final int M68K_INS_FSUN = 208;
+	public static final int M68K_INS_FSUEQ = 209;
+	public static final int M68K_INS_FSUGT = 210;
+	public static final int M68K_INS_FSUGE = 211;
+	public static final int M68K_INS_FSULT = 212;
+	public static final int M68K_INS_FSULE = 213;
+	public static final int M68K_INS_FSNE = 214;
+	public static final int M68K_INS_FST = 215;
+	public static final int M68K_INS_FSSF = 216;
+	public static final int M68K_INS_FSSEQ = 217;
+	public static final int M68K_INS_FSGT = 218;
+	public static final int M68K_INS_FSGE = 219;
+	public static final int M68K_INS_FSLT = 220;
+	public static final int M68K_INS_FSLE = 221;
+	public static final int M68K_INS_FSGL = 222;
+	public static final int M68K_INS_FSGLE = 223;
+	public static final int M68K_INS_FSNGLE = 224;
+	public static final int M68K_INS_FSNGL = 225;
+	public static final int M68K_INS_FSNLE = 226;
+	public static final int M68K_INS_FSNLT = 227;
+	public static final int M68K_INS_FSNGE = 228;
+	public static final int M68K_INS_FSNGT = 229;
+	public static final int M68K_INS_FSSNE = 230;
+	public static final int M68K_INS_FSST = 231;
+	public static final int M68K_INS_FSUB = 232;
+	public static final int M68K_INS_FSSUB = 233;
+	public static final int M68K_INS_FDSUB = 234;
+	public static final int M68K_INS_FTAN = 235;
+	public static final int M68K_INS_FTANH = 236;
+	public static final int M68K_INS_FTENTOX = 237;
+	public static final int M68K_INS_FTRAPF = 238;
+	public static final int M68K_INS_FTRAPEQ = 239;
+	public static final int M68K_INS_FTRAPOGT = 240;
+	public static final int M68K_INS_FTRAPOGE = 241;
+	public static final int M68K_INS_FTRAPOLT = 242;
+	public static final int M68K_INS_FTRAPOLE = 243;
+	public static final int M68K_INS_FTRAPOGL = 244;
+	public static final int M68K_INS_FTRAPOR = 245;
+	public static final int M68K_INS_FTRAPUN = 246;
+	public static final int M68K_INS_FTRAPUEQ = 247;
+	public static final int M68K_INS_FTRAPUGT = 248;
+	public static final int M68K_INS_FTRAPUGE = 249;
+	public static final int M68K_INS_FTRAPULT = 250;
+	public static final int M68K_INS_FTRAPULE = 251;
+	public static final int M68K_INS_FTRAPNE = 252;
+	public static final int M68K_INS_FTRAPT = 253;
+	public static final int M68K_INS_FTRAPSF = 254;
+	public static final int M68K_INS_FTRAPSEQ = 255;
+	public static final int M68K_INS_FTRAPGT = 256;
+	public static final int M68K_INS_FTRAPGE = 257;
+	public static final int M68K_INS_FTRAPLT = 258;
+	public static final int M68K_INS_FTRAPLE = 259;
+	public static final int M68K_INS_FTRAPGL = 260;
+	public static final int M68K_INS_FTRAPGLE = 261;
+	public static final int M68K_INS_FTRAPNGLE = 262;
+	public static final int M68K_INS_FTRAPNGL = 263;
+	public static final int M68K_INS_FTRAPNLE = 264;
+	public static final int M68K_INS_FTRAPNLT = 265;
+	public static final int M68K_INS_FTRAPNGE = 266;
+	public static final int M68K_INS_FTRAPNGT = 267;
+	public static final int M68K_INS_FTRAPSNE = 268;
+	public static final int M68K_INS_FTRAPST = 269;
+	public static final int M68K_INS_FTST = 270;
+	public static final int M68K_INS_FTWOTOX = 271;
+	public static final int M68K_INS_HALT = 272;
+	public static final int M68K_INS_ILLEGAL = 273;
+	public static final int M68K_INS_JMP = 274;
+	public static final int M68K_INS_JSR = 275;
+	public static final int M68K_INS_LEA = 276;
+	public static final int M68K_INS_LINK = 277;
+	public static final int M68K_INS_LPSTOP = 278;
+	public static final int M68K_INS_LSL = 279;
+	public static final int M68K_INS_LSR = 280;
+	public static final int M68K_INS_MOVE = 281;
+	public static final int M68K_INS_MOVEA = 282;
+	public static final int M68K_INS_MOVEC = 283;
+	public static final int M68K_INS_MOVEM = 284;
+	public static final int M68K_INS_MOVEP = 285;
+	public static final int M68K_INS_MOVEQ = 286;
+	public static final int M68K_INS_MOVES = 287;
+	public static final int M68K_INS_MOVE16 = 288;
+	public static final int M68K_INS_MULS = 289;
+	public static final int M68K_INS_MULU = 290;
+	public static final int M68K_INS_NBCD = 291;
+	public static final int M68K_INS_NEG = 292;
+	public static final int M68K_INS_NEGX = 293;
+	public static final int M68K_INS_NOP = 294;
+	public static final int M68K_INS_NOT = 295;
+	public static final int M68K_INS_OR = 296;
+	public static final int M68K_INS_ORI = 297;
+	public static final int M68K_INS_PACK = 298;
+	public static final int M68K_INS_PEA = 299;
+	public static final int M68K_INS_PFLUSH = 300;
+	public static final int M68K_INS_PFLUSHA = 301;
+	public static final int M68K_INS_PFLUSHAN = 302;
+	public static final int M68K_INS_PFLUSHN = 303;
+	public static final int M68K_INS_PLOADR = 304;
+	public static final int M68K_INS_PLOADW = 305;
+	public static final int M68K_INS_PLPAR = 306;
+	public static final int M68K_INS_PLPAW = 307;
+	public static final int M68K_INS_PMOVE = 308;
+	public static final int M68K_INS_PMOVEFD = 309;
+	public static final int M68K_INS_PTESTR = 310;
+	public static final int M68K_INS_PTESTW = 311;
+	public static final int M68K_INS_PULSE = 312;
+	public static final int M68K_INS_REMS = 313;
+	public static final int M68K_INS_REMU = 314;
+	public static final int M68K_INS_RESET = 315;
+	public static final int M68K_INS_ROL = 316;
+	public static final int M68K_INS_ROR = 317;
+	public static final int M68K_INS_ROXL = 318;
+	public static final int M68K_INS_ROXR = 319;
+	public static final int M68K_INS_RTD = 320;
+	public static final int M68K_INS_RTE = 321;
+	public static final int M68K_INS_RTM = 322;
+	public static final int M68K_INS_RTR = 323;
+	public static final int M68K_INS_RTS = 324;
+	public static final int M68K_INS_SBCD = 325;
+	public static final int M68K_INS_ST = 326;
+	public static final int M68K_INS_SF = 327;
+	public static final int M68K_INS_SHI = 328;
+	public static final int M68K_INS_SLS = 329;
+	public static final int M68K_INS_SCC = 330;
+	public static final int M68K_INS_SHS = 331;
+	public static final int M68K_INS_SCS = 332;
+	public static final int M68K_INS_SLO = 333;
+	public static final int M68K_INS_SNE = 334;
+	public static final int M68K_INS_SEQ = 335;
+	public static final int M68K_INS_SVC = 336;
+	public static final int M68K_INS_SVS = 337;
+	public static final int M68K_INS_SPL = 338;
+	public static final int M68K_INS_SMI = 339;
+	public static final int M68K_INS_SGE = 340;
+	public static final int M68K_INS_SLT = 341;
+	public static final int M68K_INS_SGT = 342;
+	public static final int M68K_INS_SLE = 343;
+	public static final int M68K_INS_STOP = 344;
+	public static final int M68K_INS_SUB = 345;
+	public static final int M68K_INS_SUBA = 346;
+	public static final int M68K_INS_SUBI = 347;
+	public static final int M68K_INS_SUBQ = 348;
+	public static final int M68K_INS_SUBX = 349;
+	public static final int M68K_INS_SWAP = 350;
+	public static final int M68K_INS_TAS = 351;
+	public static final int M68K_INS_TRAP = 352;
+	public static final int M68K_INS_TRAPV = 353;
+	public static final int M68K_INS_TRAPT = 354;
+	public static final int M68K_INS_TRAPF = 355;
+	public static final int M68K_INS_TRAPHI = 356;
+	public static final int M68K_INS_TRAPLS = 357;
+	public static final int M68K_INS_TRAPCC = 358;
+	public static final int M68K_INS_TRAPHS = 359;
+	public static final int M68K_INS_TRAPCS = 360;
+	public static final int M68K_INS_TRAPLO = 361;
+	public static final int M68K_INS_TRAPNE = 362;
+	public static final int M68K_INS_TRAPEQ = 363;
+	public static final int M68K_INS_TRAPVC = 364;
+	public static final int M68K_INS_TRAPVS = 365;
+	public static final int M68K_INS_TRAPPL = 366;
+	public static final int M68K_INS_TRAPMI = 367;
+	public static final int M68K_INS_TRAPGE = 368;
+	public static final int M68K_INS_TRAPLT = 369;
+	public static final int M68K_INS_TRAPGT = 370;
+	public static final int M68K_INS_TRAPLE = 371;
+	public static final int M68K_INS_TST = 372;
+	public static final int M68K_INS_UNLK = 373;
+	public static final int M68K_INS_UNPK = 374;
+	public static final int M68K_INS_ENDING = 375;
+
+	public static final int M68K_GRP_INVALID = 0;
+	public static final int M68K_GRP_JUMP = 1;
+	public static final int M68K_GRP_RET = 3;
+	public static final int M68K_GRP_IRET = 5;
+	public static final int M68K_GRP_BRANCH_RELATIVE = 7;
+	public static final int M68K_GRP_ENDING = 8;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Mips.java b/capstone/bindings/java/capstone/Mips.java
new file mode 100644
index 000000000..9bea79a2c
--- /dev/null
+++ b/capstone/bindings/java/capstone/Mips.java
@@ -0,0 +1,88 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Mips_const.*;
+
+public class Mips {
+
+  public static class MemType extends Structure {
+    public int base;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "mem");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      super.read();
+      if (type == MIPS_OP_MEM)
+        value.setType(MemType.class);
+      if (type == MIPS_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == MIPS_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == MIPS_OP_INVALID)
+        return;
+      readField("value");
+    }
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte op_count;
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[10];
+    }
+
+    public void read() {
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo e) {
+      op = e.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Mips_const.java b/capstone/bindings/java/capstone/Mips_const.java
new file mode 100644
index 000000000..01f637f80
--- /dev/null
+++ b/capstone/bindings/java/capstone/Mips_const.java
@@ -0,0 +1,865 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Mips_const {
+
+	public static final int MIPS_OP_INVALID = 0;
+	public static final int MIPS_OP_REG = 1;
+	public static final int MIPS_OP_IMM = 2;
+	public static final int MIPS_OP_MEM = 3;
+
+	public static final int MIPS_REG_INVALID = 0;
+	public static final int MIPS_REG_PC = 1;
+	public static final int MIPS_REG_0 = 2;
+	public static final int MIPS_REG_1 = 3;
+	public static final int MIPS_REG_2 = 4;
+	public static final int MIPS_REG_3 = 5;
+	public static final int MIPS_REG_4 = 6;
+	public static final int MIPS_REG_5 = 7;
+	public static final int MIPS_REG_6 = 8;
+	public static final int MIPS_REG_7 = 9;
+	public static final int MIPS_REG_8 = 10;
+	public static final int MIPS_REG_9 = 11;
+	public static final int MIPS_REG_10 = 12;
+	public static final int MIPS_REG_11 = 13;
+	public static final int MIPS_REG_12 = 14;
+	public static final int MIPS_REG_13 = 15;
+	public static final int MIPS_REG_14 = 16;
+	public static final int MIPS_REG_15 = 17;
+	public static final int MIPS_REG_16 = 18;
+	public static final int MIPS_REG_17 = 19;
+	public static final int MIPS_REG_18 = 20;
+	public static final int MIPS_REG_19 = 21;
+	public static final int MIPS_REG_20 = 22;
+	public static final int MIPS_REG_21 = 23;
+	public static final int MIPS_REG_22 = 24;
+	public static final int MIPS_REG_23 = 25;
+	public static final int MIPS_REG_24 = 26;
+	public static final int MIPS_REG_25 = 27;
+	public static final int MIPS_REG_26 = 28;
+	public static final int MIPS_REG_27 = 29;
+	public static final int MIPS_REG_28 = 30;
+	public static final int MIPS_REG_29 = 31;
+	public static final int MIPS_REG_30 = 32;
+	public static final int MIPS_REG_31 = 33;
+	public static final int MIPS_REG_DSPCCOND = 34;
+	public static final int MIPS_REG_DSPCARRY = 35;
+	public static final int MIPS_REG_DSPEFI = 36;
+	public static final int MIPS_REG_DSPOUTFLAG = 37;
+	public static final int MIPS_REG_DSPOUTFLAG16_19 = 38;
+	public static final int MIPS_REG_DSPOUTFLAG20 = 39;
+	public static final int MIPS_REG_DSPOUTFLAG21 = 40;
+	public static final int MIPS_REG_DSPOUTFLAG22 = 41;
+	public static final int MIPS_REG_DSPOUTFLAG23 = 42;
+	public static final int MIPS_REG_DSPPOS = 43;
+	public static final int MIPS_REG_DSPSCOUNT = 44;
+	public static final int MIPS_REG_AC0 = 45;
+	public static final int MIPS_REG_AC1 = 46;
+	public static final int MIPS_REG_AC2 = 47;
+	public static final int MIPS_REG_AC3 = 48;
+	public static final int MIPS_REG_CC0 = 49;
+	public static final int MIPS_REG_CC1 = 50;
+	public static final int MIPS_REG_CC2 = 51;
+	public static final int MIPS_REG_CC3 = 52;
+	public static final int MIPS_REG_CC4 = 53;
+	public static final int MIPS_REG_CC5 = 54;
+	public static final int MIPS_REG_CC6 = 55;
+	public static final int MIPS_REG_CC7 = 56;
+	public static final int MIPS_REG_F0 = 57;
+	public static final int MIPS_REG_F1 = 58;
+	public static final int MIPS_REG_F2 = 59;
+	public static final int MIPS_REG_F3 = 60;
+	public static final int MIPS_REG_F4 = 61;
+	public static final int MIPS_REG_F5 = 62;
+	public static final int MIPS_REG_F6 = 63;
+	public static final int MIPS_REG_F7 = 64;
+	public static final int MIPS_REG_F8 = 65;
+	public static final int MIPS_REG_F9 = 66;
+	public static final int MIPS_REG_F10 = 67;
+	public static final int MIPS_REG_F11 = 68;
+	public static final int MIPS_REG_F12 = 69;
+	public static final int MIPS_REG_F13 = 70;
+	public static final int MIPS_REG_F14 = 71;
+	public static final int MIPS_REG_F15 = 72;
+	public static final int MIPS_REG_F16 = 73;
+	public static final int MIPS_REG_F17 = 74;
+	public static final int MIPS_REG_F18 = 75;
+	public static final int MIPS_REG_F19 = 76;
+	public static final int MIPS_REG_F20 = 77;
+	public static final int MIPS_REG_F21 = 78;
+	public static final int MIPS_REG_F22 = 79;
+	public static final int MIPS_REG_F23 = 80;
+	public static final int MIPS_REG_F24 = 81;
+	public static final int MIPS_REG_F25 = 82;
+	public static final int MIPS_REG_F26 = 83;
+	public static final int MIPS_REG_F27 = 84;
+	public static final int MIPS_REG_F28 = 85;
+	public static final int MIPS_REG_F29 = 86;
+	public static final int MIPS_REG_F30 = 87;
+	public static final int MIPS_REG_F31 = 88;
+	public static final int MIPS_REG_FCC0 = 89;
+	public static final int MIPS_REG_FCC1 = 90;
+	public static final int MIPS_REG_FCC2 = 91;
+	public static final int MIPS_REG_FCC3 = 92;
+	public static final int MIPS_REG_FCC4 = 93;
+	public static final int MIPS_REG_FCC5 = 94;
+	public static final int MIPS_REG_FCC6 = 95;
+	public static final int MIPS_REG_FCC7 = 96;
+	public static final int MIPS_REG_W0 = 97;
+	public static final int MIPS_REG_W1 = 98;
+	public static final int MIPS_REG_W2 = 99;
+	public static final int MIPS_REG_W3 = 100;
+	public static final int MIPS_REG_W4 = 101;
+	public static final int MIPS_REG_W5 = 102;
+	public static final int MIPS_REG_W6 = 103;
+	public static final int MIPS_REG_W7 = 104;
+	public static final int MIPS_REG_W8 = 105;
+	public static final int MIPS_REG_W9 = 106;
+	public static final int MIPS_REG_W10 = 107;
+	public static final int MIPS_REG_W11 = 108;
+	public static final int MIPS_REG_W12 = 109;
+	public static final int MIPS_REG_W13 = 110;
+	public static final int MIPS_REG_W14 = 111;
+	public static final int MIPS_REG_W15 = 112;
+	public static final int MIPS_REG_W16 = 113;
+	public static final int MIPS_REG_W17 = 114;
+	public static final int MIPS_REG_W18 = 115;
+	public static final int MIPS_REG_W19 = 116;
+	public static final int MIPS_REG_W20 = 117;
+	public static final int MIPS_REG_W21 = 118;
+	public static final int MIPS_REG_W22 = 119;
+	public static final int MIPS_REG_W23 = 120;
+	public static final int MIPS_REG_W24 = 121;
+	public static final int MIPS_REG_W25 = 122;
+	public static final int MIPS_REG_W26 = 123;
+	public static final int MIPS_REG_W27 = 124;
+	public static final int MIPS_REG_W28 = 125;
+	public static final int MIPS_REG_W29 = 126;
+	public static final int MIPS_REG_W30 = 127;
+	public static final int MIPS_REG_W31 = 128;
+	public static final int MIPS_REG_HI = 129;
+	public static final int MIPS_REG_LO = 130;
+	public static final int MIPS_REG_P0 = 131;
+	public static final int MIPS_REG_P1 = 132;
+	public static final int MIPS_REG_P2 = 133;
+	public static final int MIPS_REG_MPL0 = 134;
+	public static final int MIPS_REG_MPL1 = 135;
+	public static final int MIPS_REG_MPL2 = 136;
+	public static final int MIPS_REG_ENDING = 137;
+	public static final int MIPS_REG_ZERO = MIPS_REG_0;
+	public static final int MIPS_REG_AT = MIPS_REG_1;
+	public static final int MIPS_REG_V0 = MIPS_REG_2;
+	public static final int MIPS_REG_V1 = MIPS_REG_3;
+	public static final int MIPS_REG_A0 = MIPS_REG_4;
+	public static final int MIPS_REG_A1 = MIPS_REG_5;
+	public static final int MIPS_REG_A2 = MIPS_REG_6;
+	public static final int MIPS_REG_A3 = MIPS_REG_7;
+	public static final int MIPS_REG_T0 = MIPS_REG_8;
+	public static final int MIPS_REG_T1 = MIPS_REG_9;
+	public static final int MIPS_REG_T2 = MIPS_REG_10;
+	public static final int MIPS_REG_T3 = MIPS_REG_11;
+	public static final int MIPS_REG_T4 = MIPS_REG_12;
+	public static final int MIPS_REG_T5 = MIPS_REG_13;
+	public static final int MIPS_REG_T6 = MIPS_REG_14;
+	public static final int MIPS_REG_T7 = MIPS_REG_15;
+	public static final int MIPS_REG_S0 = MIPS_REG_16;
+	public static final int MIPS_REG_S1 = MIPS_REG_17;
+	public static final int MIPS_REG_S2 = MIPS_REG_18;
+	public static final int MIPS_REG_S3 = MIPS_REG_19;
+	public static final int MIPS_REG_S4 = MIPS_REG_20;
+	public static final int MIPS_REG_S5 = MIPS_REG_21;
+	public static final int MIPS_REG_S6 = MIPS_REG_22;
+	public static final int MIPS_REG_S7 = MIPS_REG_23;
+	public static final int MIPS_REG_T8 = MIPS_REG_24;
+	public static final int MIPS_REG_T9 = MIPS_REG_25;
+	public static final int MIPS_REG_K0 = MIPS_REG_26;
+	public static final int MIPS_REG_K1 = MIPS_REG_27;
+	public static final int MIPS_REG_GP = MIPS_REG_28;
+	public static final int MIPS_REG_SP = MIPS_REG_29;
+	public static final int MIPS_REG_FP = MIPS_REG_30;
+	public static final int MIPS_REG_S8 = MIPS_REG_30;
+	public static final int MIPS_REG_RA = MIPS_REG_31;
+	public static final int MIPS_REG_HI0 = MIPS_REG_AC0;
+	public static final int MIPS_REG_HI1 = MIPS_REG_AC1;
+	public static final int MIPS_REG_HI2 = MIPS_REG_AC2;
+	public static final int MIPS_REG_HI3 = MIPS_REG_AC3;
+	public static final int MIPS_REG_LO0 = MIPS_REG_HI0;
+	public static final int MIPS_REG_LO1 = MIPS_REG_HI1;
+	public static final int MIPS_REG_LO2 = MIPS_REG_HI2;
+	public static final int MIPS_REG_LO3 = MIPS_REG_HI3;
+
+	public static final int MIPS_INS_INVALID = 0;
+	public static final int MIPS_INS_ABSQ_S = 1;
+	public static final int MIPS_INS_ADD = 2;
+	public static final int MIPS_INS_ADDIUPC = 3;
+	public static final int MIPS_INS_ADDIUR1SP = 4;
+	public static final int MIPS_INS_ADDIUR2 = 5;
+	public static final int MIPS_INS_ADDIUS5 = 6;
+	public static final int MIPS_INS_ADDIUSP = 7;
+	public static final int MIPS_INS_ADDQH = 8;
+	public static final int MIPS_INS_ADDQH_R = 9;
+	public static final int MIPS_INS_ADDQ = 10;
+	public static final int MIPS_INS_ADDQ_S = 11;
+	public static final int MIPS_INS_ADDSC = 12;
+	public static final int MIPS_INS_ADDS_A = 13;
+	public static final int MIPS_INS_ADDS_S = 14;
+	public static final int MIPS_INS_ADDS_U = 15;
+	public static final int MIPS_INS_ADDU16 = 16;
+	public static final int MIPS_INS_ADDUH = 17;
+	public static final int MIPS_INS_ADDUH_R = 18;
+	public static final int MIPS_INS_ADDU = 19;
+	public static final int MIPS_INS_ADDU_S = 20;
+	public static final int MIPS_INS_ADDVI = 21;
+	public static final int MIPS_INS_ADDV = 22;
+	public static final int MIPS_INS_ADDWC = 23;
+	public static final int MIPS_INS_ADD_A = 24;
+	public static final int MIPS_INS_ADDI = 25;
+	public static final int MIPS_INS_ADDIU = 26;
+	public static final int MIPS_INS_ALIGN = 27;
+	public static final int MIPS_INS_ALUIPC = 28;
+	public static final int MIPS_INS_AND = 29;
+	public static final int MIPS_INS_AND16 = 30;
+	public static final int MIPS_INS_ANDI16 = 31;
+	public static final int MIPS_INS_ANDI = 32;
+	public static final int MIPS_INS_APPEND = 33;
+	public static final int MIPS_INS_ASUB_S = 34;
+	public static final int MIPS_INS_ASUB_U = 35;
+	public static final int MIPS_INS_AUI = 36;
+	public static final int MIPS_INS_AUIPC = 37;
+	public static final int MIPS_INS_AVER_S = 38;
+	public static final int MIPS_INS_AVER_U = 39;
+	public static final int MIPS_INS_AVE_S = 40;
+	public static final int MIPS_INS_AVE_U = 41;
+	public static final int MIPS_INS_B16 = 42;
+	public static final int MIPS_INS_BADDU = 43;
+	public static final int MIPS_INS_BAL = 44;
+	public static final int MIPS_INS_BALC = 45;
+	public static final int MIPS_INS_BALIGN = 46;
+	public static final int MIPS_INS_BBIT0 = 47;
+	public static final int MIPS_INS_BBIT032 = 48;
+	public static final int MIPS_INS_BBIT1 = 49;
+	public static final int MIPS_INS_BBIT132 = 50;
+	public static final int MIPS_INS_BC = 51;
+	public static final int MIPS_INS_BC0F = 52;
+	public static final int MIPS_INS_BC0FL = 53;
+	public static final int MIPS_INS_BC0T = 54;
+	public static final int MIPS_INS_BC0TL = 55;
+	public static final int MIPS_INS_BC1EQZ = 56;
+	public static final int MIPS_INS_BC1F = 57;
+	public static final int MIPS_INS_BC1FL = 58;
+	public static final int MIPS_INS_BC1NEZ = 59;
+	public static final int MIPS_INS_BC1T = 60;
+	public static final int MIPS_INS_BC1TL = 61;
+	public static final int MIPS_INS_BC2EQZ = 62;
+	public static final int MIPS_INS_BC2F = 63;
+	public static final int MIPS_INS_BC2FL = 64;
+	public static final int MIPS_INS_BC2NEZ = 65;
+	public static final int MIPS_INS_BC2T = 66;
+	public static final int MIPS_INS_BC2TL = 67;
+	public static final int MIPS_INS_BC3F = 68;
+	public static final int MIPS_INS_BC3FL = 69;
+	public static final int MIPS_INS_BC3T = 70;
+	public static final int MIPS_INS_BC3TL = 71;
+	public static final int MIPS_INS_BCLRI = 72;
+	public static final int MIPS_INS_BCLR = 73;
+	public static final int MIPS_INS_BEQ = 74;
+	public static final int MIPS_INS_BEQC = 75;
+	public static final int MIPS_INS_BEQL = 76;
+	public static final int MIPS_INS_BEQZ16 = 77;
+	public static final int MIPS_INS_BEQZALC = 78;
+	public static final int MIPS_INS_BEQZC = 79;
+	public static final int MIPS_INS_BGEC = 80;
+	public static final int MIPS_INS_BGEUC = 81;
+	public static final int MIPS_INS_BGEZ = 82;
+	public static final int MIPS_INS_BGEZAL = 83;
+	public static final int MIPS_INS_BGEZALC = 84;
+	public static final int MIPS_INS_BGEZALL = 85;
+	public static final int MIPS_INS_BGEZALS = 86;
+	public static final int MIPS_INS_BGEZC = 87;
+	public static final int MIPS_INS_BGEZL = 88;
+	public static final int MIPS_INS_BGTZ = 89;
+	public static final int MIPS_INS_BGTZALC = 90;
+	public static final int MIPS_INS_BGTZC = 91;
+	public static final int MIPS_INS_BGTZL = 92;
+	public static final int MIPS_INS_BINSLI = 93;
+	public static final int MIPS_INS_BINSL = 94;
+	public static final int MIPS_INS_BINSRI = 95;
+	public static final int MIPS_INS_BINSR = 96;
+	public static final int MIPS_INS_BITREV = 97;
+	public static final int MIPS_INS_BITSWAP = 98;
+	public static final int MIPS_INS_BLEZ = 99;
+	public static final int MIPS_INS_BLEZALC = 100;
+	public static final int MIPS_INS_BLEZC = 101;
+	public static final int MIPS_INS_BLEZL = 102;
+	public static final int MIPS_INS_BLTC = 103;
+	public static final int MIPS_INS_BLTUC = 104;
+	public static final int MIPS_INS_BLTZ = 105;
+	public static final int MIPS_INS_BLTZAL = 106;
+	public static final int MIPS_INS_BLTZALC = 107;
+	public static final int MIPS_INS_BLTZALL = 108;
+	public static final int MIPS_INS_BLTZALS = 109;
+	public static final int MIPS_INS_BLTZC = 110;
+	public static final int MIPS_INS_BLTZL = 111;
+	public static final int MIPS_INS_BMNZI = 112;
+	public static final int MIPS_INS_BMNZ = 113;
+	public static final int MIPS_INS_BMZI = 114;
+	public static final int MIPS_INS_BMZ = 115;
+	public static final int MIPS_INS_BNE = 116;
+	public static final int MIPS_INS_BNEC = 117;
+	public static final int MIPS_INS_BNEGI = 118;
+	public static final int MIPS_INS_BNEG = 119;
+	public static final int MIPS_INS_BNEL = 120;
+	public static final int MIPS_INS_BNEZ16 = 121;
+	public static final int MIPS_INS_BNEZALC = 122;
+	public static final int MIPS_INS_BNEZC = 123;
+	public static final int MIPS_INS_BNVC = 124;
+	public static final int MIPS_INS_BNZ = 125;
+	public static final int MIPS_INS_BOVC = 126;
+	public static final int MIPS_INS_BPOSGE32 = 127;
+	public static final int MIPS_INS_BREAK = 128;
+	public static final int MIPS_INS_BREAK16 = 129;
+	public static final int MIPS_INS_BSELI = 130;
+	public static final int MIPS_INS_BSEL = 131;
+	public static final int MIPS_INS_BSETI = 132;
+	public static final int MIPS_INS_BSET = 133;
+	public static final int MIPS_INS_BZ = 134;
+	public static final int MIPS_INS_BEQZ = 135;
+	public static final int MIPS_INS_B = 136;
+	public static final int MIPS_INS_BNEZ = 137;
+	public static final int MIPS_INS_BTEQZ = 138;
+	public static final int MIPS_INS_BTNEZ = 139;
+	public static final int MIPS_INS_CACHE = 140;
+	public static final int MIPS_INS_CEIL = 141;
+	public static final int MIPS_INS_CEQI = 142;
+	public static final int MIPS_INS_CEQ = 143;
+	public static final int MIPS_INS_CFC1 = 144;
+	public static final int MIPS_INS_CFCMSA = 145;
+	public static final int MIPS_INS_CINS = 146;
+	public static final int MIPS_INS_CINS32 = 147;
+	public static final int MIPS_INS_CLASS = 148;
+	public static final int MIPS_INS_CLEI_S = 149;
+	public static final int MIPS_INS_CLEI_U = 150;
+	public static final int MIPS_INS_CLE_S = 151;
+	public static final int MIPS_INS_CLE_U = 152;
+	public static final int MIPS_INS_CLO = 153;
+	public static final int MIPS_INS_CLTI_S = 154;
+	public static final int MIPS_INS_CLTI_U = 155;
+	public static final int MIPS_INS_CLT_S = 156;
+	public static final int MIPS_INS_CLT_U = 157;
+	public static final int MIPS_INS_CLZ = 158;
+	public static final int MIPS_INS_CMPGDU = 159;
+	public static final int MIPS_INS_CMPGU = 160;
+	public static final int MIPS_INS_CMPU = 161;
+	public static final int MIPS_INS_CMP = 162;
+	public static final int MIPS_INS_COPY_S = 163;
+	public static final int MIPS_INS_COPY_U = 164;
+	public static final int MIPS_INS_CTC1 = 165;
+	public static final int MIPS_INS_CTCMSA = 166;
+	public static final int MIPS_INS_CVT = 167;
+	public static final int MIPS_INS_C = 168;
+	public static final int MIPS_INS_CMPI = 169;
+	public static final int MIPS_INS_DADD = 170;
+	public static final int MIPS_INS_DADDI = 171;
+	public static final int MIPS_INS_DADDIU = 172;
+	public static final int MIPS_INS_DADDU = 173;
+	public static final int MIPS_INS_DAHI = 174;
+	public static final int MIPS_INS_DALIGN = 175;
+	public static final int MIPS_INS_DATI = 176;
+	public static final int MIPS_INS_DAUI = 177;
+	public static final int MIPS_INS_DBITSWAP = 178;
+	public static final int MIPS_INS_DCLO = 179;
+	public static final int MIPS_INS_DCLZ = 180;
+	public static final int MIPS_INS_DDIV = 181;
+	public static final int MIPS_INS_DDIVU = 182;
+	public static final int MIPS_INS_DERET = 183;
+	public static final int MIPS_INS_DEXT = 184;
+	public static final int MIPS_INS_DEXTM = 185;
+	public static final int MIPS_INS_DEXTU = 186;
+	public static final int MIPS_INS_DI = 187;
+	public static final int MIPS_INS_DINS = 188;
+	public static final int MIPS_INS_DINSM = 189;
+	public static final int MIPS_INS_DINSU = 190;
+	public static final int MIPS_INS_DIV = 191;
+	public static final int MIPS_INS_DIVU = 192;
+	public static final int MIPS_INS_DIV_S = 193;
+	public static final int MIPS_INS_DIV_U = 194;
+	public static final int MIPS_INS_DLSA = 195;
+	public static final int MIPS_INS_DMFC0 = 196;
+	public static final int MIPS_INS_DMFC1 = 197;
+	public static final int MIPS_INS_DMFC2 = 198;
+	public static final int MIPS_INS_DMOD = 199;
+	public static final int MIPS_INS_DMODU = 200;
+	public static final int MIPS_INS_DMTC0 = 201;
+	public static final int MIPS_INS_DMTC1 = 202;
+	public static final int MIPS_INS_DMTC2 = 203;
+	public static final int MIPS_INS_DMUH = 204;
+	public static final int MIPS_INS_DMUHU = 205;
+	public static final int MIPS_INS_DMUL = 206;
+	public static final int MIPS_INS_DMULT = 207;
+	public static final int MIPS_INS_DMULTU = 208;
+	public static final int MIPS_INS_DMULU = 209;
+	public static final int MIPS_INS_DOTP_S = 210;
+	public static final int MIPS_INS_DOTP_U = 211;
+	public static final int MIPS_INS_DPADD_S = 212;
+	public static final int MIPS_INS_DPADD_U = 213;
+	public static final int MIPS_INS_DPAQX_SA = 214;
+	public static final int MIPS_INS_DPAQX_S = 215;
+	public static final int MIPS_INS_DPAQ_SA = 216;
+	public static final int MIPS_INS_DPAQ_S = 217;
+	public static final int MIPS_INS_DPAU = 218;
+	public static final int MIPS_INS_DPAX = 219;
+	public static final int MIPS_INS_DPA = 220;
+	public static final int MIPS_INS_DPOP = 221;
+	public static final int MIPS_INS_DPSQX_SA = 222;
+	public static final int MIPS_INS_DPSQX_S = 223;
+	public static final int MIPS_INS_DPSQ_SA = 224;
+	public static final int MIPS_INS_DPSQ_S = 225;
+	public static final int MIPS_INS_DPSUB_S = 226;
+	public static final int MIPS_INS_DPSUB_U = 227;
+	public static final int MIPS_INS_DPSU = 228;
+	public static final int MIPS_INS_DPSX = 229;
+	public static final int MIPS_INS_DPS = 230;
+	public static final int MIPS_INS_DROTR = 231;
+	public static final int MIPS_INS_DROTR32 = 232;
+	public static final int MIPS_INS_DROTRV = 233;
+	public static final int MIPS_INS_DSBH = 234;
+	public static final int MIPS_INS_DSHD = 235;
+	public static final int MIPS_INS_DSLL = 236;
+	public static final int MIPS_INS_DSLL32 = 237;
+	public static final int MIPS_INS_DSLLV = 238;
+	public static final int MIPS_INS_DSRA = 239;
+	public static final int MIPS_INS_DSRA32 = 240;
+	public static final int MIPS_INS_DSRAV = 241;
+	public static final int MIPS_INS_DSRL = 242;
+	public static final int MIPS_INS_DSRL32 = 243;
+	public static final int MIPS_INS_DSRLV = 244;
+	public static final int MIPS_INS_DSUB = 245;
+	public static final int MIPS_INS_DSUBU = 246;
+	public static final int MIPS_INS_EHB = 247;
+	public static final int MIPS_INS_EI = 248;
+	public static final int MIPS_INS_ERET = 249;
+	public static final int MIPS_INS_EXT = 250;
+	public static final int MIPS_INS_EXTP = 251;
+	public static final int MIPS_INS_EXTPDP = 252;
+	public static final int MIPS_INS_EXTPDPV = 253;
+	public static final int MIPS_INS_EXTPV = 254;
+	public static final int MIPS_INS_EXTRV_RS = 255;
+	public static final int MIPS_INS_EXTRV_R = 256;
+	public static final int MIPS_INS_EXTRV_S = 257;
+	public static final int MIPS_INS_EXTRV = 258;
+	public static final int MIPS_INS_EXTR_RS = 259;
+	public static final int MIPS_INS_EXTR_R = 260;
+	public static final int MIPS_INS_EXTR_S = 261;
+	public static final int MIPS_INS_EXTR = 262;
+	public static final int MIPS_INS_EXTS = 263;
+	public static final int MIPS_INS_EXTS32 = 264;
+	public static final int MIPS_INS_ABS = 265;
+	public static final int MIPS_INS_FADD = 266;
+	public static final int MIPS_INS_FCAF = 267;
+	public static final int MIPS_INS_FCEQ = 268;
+	public static final int MIPS_INS_FCLASS = 269;
+	public static final int MIPS_INS_FCLE = 270;
+	public static final int MIPS_INS_FCLT = 271;
+	public static final int MIPS_INS_FCNE = 272;
+	public static final int MIPS_INS_FCOR = 273;
+	public static final int MIPS_INS_FCUEQ = 274;
+	public static final int MIPS_INS_FCULE = 275;
+	public static final int MIPS_INS_FCULT = 276;
+	public static final int MIPS_INS_FCUNE = 277;
+	public static final int MIPS_INS_FCUN = 278;
+	public static final int MIPS_INS_FDIV = 279;
+	public static final int MIPS_INS_FEXDO = 280;
+	public static final int MIPS_INS_FEXP2 = 281;
+	public static final int MIPS_INS_FEXUPL = 282;
+	public static final int MIPS_INS_FEXUPR = 283;
+	public static final int MIPS_INS_FFINT_S = 284;
+	public static final int MIPS_INS_FFINT_U = 285;
+	public static final int MIPS_INS_FFQL = 286;
+	public static final int MIPS_INS_FFQR = 287;
+	public static final int MIPS_INS_FILL = 288;
+	public static final int MIPS_INS_FLOG2 = 289;
+	public static final int MIPS_INS_FLOOR = 290;
+	public static final int MIPS_INS_FMADD = 291;
+	public static final int MIPS_INS_FMAX_A = 292;
+	public static final int MIPS_INS_FMAX = 293;
+	public static final int MIPS_INS_FMIN_A = 294;
+	public static final int MIPS_INS_FMIN = 295;
+	public static final int MIPS_INS_MOV = 296;
+	public static final int MIPS_INS_FMSUB = 297;
+	public static final int MIPS_INS_FMUL = 298;
+	public static final int MIPS_INS_MUL = 299;
+	public static final int MIPS_INS_NEG = 300;
+	public static final int MIPS_INS_FRCP = 301;
+	public static final int MIPS_INS_FRINT = 302;
+	public static final int MIPS_INS_FRSQRT = 303;
+	public static final int MIPS_INS_FSAF = 304;
+	public static final int MIPS_INS_FSEQ = 305;
+	public static final int MIPS_INS_FSLE = 306;
+	public static final int MIPS_INS_FSLT = 307;
+	public static final int MIPS_INS_FSNE = 308;
+	public static final int MIPS_INS_FSOR = 309;
+	public static final int MIPS_INS_FSQRT = 310;
+	public static final int MIPS_INS_SQRT = 311;
+	public static final int MIPS_INS_FSUB = 312;
+	public static final int MIPS_INS_SUB = 313;
+	public static final int MIPS_INS_FSUEQ = 314;
+	public static final int MIPS_INS_FSULE = 315;
+	public static final int MIPS_INS_FSULT = 316;
+	public static final int MIPS_INS_FSUNE = 317;
+	public static final int MIPS_INS_FSUN = 318;
+	public static final int MIPS_INS_FTINT_S = 319;
+	public static final int MIPS_INS_FTINT_U = 320;
+	public static final int MIPS_INS_FTQ = 321;
+	public static final int MIPS_INS_FTRUNC_S = 322;
+	public static final int MIPS_INS_FTRUNC_U = 323;
+	public static final int MIPS_INS_HADD_S = 324;
+	public static final int MIPS_INS_HADD_U = 325;
+	public static final int MIPS_INS_HSUB_S = 326;
+	public static final int MIPS_INS_HSUB_U = 327;
+	public static final int MIPS_INS_ILVEV = 328;
+	public static final int MIPS_INS_ILVL = 329;
+	public static final int MIPS_INS_ILVOD = 330;
+	public static final int MIPS_INS_ILVR = 331;
+	public static final int MIPS_INS_INS = 332;
+	public static final int MIPS_INS_INSERT = 333;
+	public static final int MIPS_INS_INSV = 334;
+	public static final int MIPS_INS_INSVE = 335;
+	public static final int MIPS_INS_J = 336;
+	public static final int MIPS_INS_JAL = 337;
+	public static final int MIPS_INS_JALR = 338;
+	public static final int MIPS_INS_JALRS16 = 339;
+	public static final int MIPS_INS_JALRS = 340;
+	public static final int MIPS_INS_JALS = 341;
+	public static final int MIPS_INS_JALX = 342;
+	public static final int MIPS_INS_JIALC = 343;
+	public static final int MIPS_INS_JIC = 344;
+	public static final int MIPS_INS_JR = 345;
+	public static final int MIPS_INS_JR16 = 346;
+	public static final int MIPS_INS_JRADDIUSP = 347;
+	public static final int MIPS_INS_JRC = 348;
+	public static final int MIPS_INS_JALRC = 349;
+	public static final int MIPS_INS_LB = 350;
+	public static final int MIPS_INS_LBU16 = 351;
+	public static final int MIPS_INS_LBUX = 352;
+	public static final int MIPS_INS_LBU = 353;
+	public static final int MIPS_INS_LD = 354;
+	public static final int MIPS_INS_LDC1 = 355;
+	public static final int MIPS_INS_LDC2 = 356;
+	public static final int MIPS_INS_LDC3 = 357;
+	public static final int MIPS_INS_LDI = 358;
+	public static final int MIPS_INS_LDL = 359;
+	public static final int MIPS_INS_LDPC = 360;
+	public static final int MIPS_INS_LDR = 361;
+	public static final int MIPS_INS_LDXC1 = 362;
+	public static final int MIPS_INS_LH = 363;
+	public static final int MIPS_INS_LHU16 = 364;
+	public static final int MIPS_INS_LHX = 365;
+	public static final int MIPS_INS_LHU = 366;
+	public static final int MIPS_INS_LI16 = 367;
+	public static final int MIPS_INS_LL = 368;
+	public static final int MIPS_INS_LLD = 369;
+	public static final int MIPS_INS_LSA = 370;
+	public static final int MIPS_INS_LUXC1 = 371;
+	public static final int MIPS_INS_LUI = 372;
+	public static final int MIPS_INS_LW = 373;
+	public static final int MIPS_INS_LW16 = 374;
+	public static final int MIPS_INS_LWC1 = 375;
+	public static final int MIPS_INS_LWC2 = 376;
+	public static final int MIPS_INS_LWC3 = 377;
+	public static final int MIPS_INS_LWL = 378;
+	public static final int MIPS_INS_LWM16 = 379;
+	public static final int MIPS_INS_LWM32 = 380;
+	public static final int MIPS_INS_LWPC = 381;
+	public static final int MIPS_INS_LWP = 382;
+	public static final int MIPS_INS_LWR = 383;
+	public static final int MIPS_INS_LWUPC = 384;
+	public static final int MIPS_INS_LWU = 385;
+	public static final int MIPS_INS_LWX = 386;
+	public static final int MIPS_INS_LWXC1 = 387;
+	public static final int MIPS_INS_LWXS = 388;
+	public static final int MIPS_INS_LI = 389;
+	public static final int MIPS_INS_MADD = 390;
+	public static final int MIPS_INS_MADDF = 391;
+	public static final int MIPS_INS_MADDR_Q = 392;
+	public static final int MIPS_INS_MADDU = 393;
+	public static final int MIPS_INS_MADDV = 394;
+	public static final int MIPS_INS_MADD_Q = 395;
+	public static final int MIPS_INS_MAQ_SA = 396;
+	public static final int MIPS_INS_MAQ_S = 397;
+	public static final int MIPS_INS_MAXA = 398;
+	public static final int MIPS_INS_MAXI_S = 399;
+	public static final int MIPS_INS_MAXI_U = 400;
+	public static final int MIPS_INS_MAX_A = 401;
+	public static final int MIPS_INS_MAX = 402;
+	public static final int MIPS_INS_MAX_S = 403;
+	public static final int MIPS_INS_MAX_U = 404;
+	public static final int MIPS_INS_MFC0 = 405;
+	public static final int MIPS_INS_MFC1 = 406;
+	public static final int MIPS_INS_MFC2 = 407;
+	public static final int MIPS_INS_MFHC1 = 408;
+	public static final int MIPS_INS_MFHI = 409;
+	public static final int MIPS_INS_MFLO = 410;
+	public static final int MIPS_INS_MINA = 411;
+	public static final int MIPS_INS_MINI_S = 412;
+	public static final int MIPS_INS_MINI_U = 413;
+	public static final int MIPS_INS_MIN_A = 414;
+	public static final int MIPS_INS_MIN = 415;
+	public static final int MIPS_INS_MIN_S = 416;
+	public static final int MIPS_INS_MIN_U = 417;
+	public static final int MIPS_INS_MOD = 418;
+	public static final int MIPS_INS_MODSUB = 419;
+	public static final int MIPS_INS_MODU = 420;
+	public static final int MIPS_INS_MOD_S = 421;
+	public static final int MIPS_INS_MOD_U = 422;
+	public static final int MIPS_INS_MOVE = 423;
+	public static final int MIPS_INS_MOVEP = 424;
+	public static final int MIPS_INS_MOVF = 425;
+	public static final int MIPS_INS_MOVN = 426;
+	public static final int MIPS_INS_MOVT = 427;
+	public static final int MIPS_INS_MOVZ = 428;
+	public static final int MIPS_INS_MSUB = 429;
+	public static final int MIPS_INS_MSUBF = 430;
+	public static final int MIPS_INS_MSUBR_Q = 431;
+	public static final int MIPS_INS_MSUBU = 432;
+	public static final int MIPS_INS_MSUBV = 433;
+	public static final int MIPS_INS_MSUB_Q = 434;
+	public static final int MIPS_INS_MTC0 = 435;
+	public static final int MIPS_INS_MTC1 = 436;
+	public static final int MIPS_INS_MTC2 = 437;
+	public static final int MIPS_INS_MTHC1 = 438;
+	public static final int MIPS_INS_MTHI = 439;
+	public static final int MIPS_INS_MTHLIP = 440;
+	public static final int MIPS_INS_MTLO = 441;
+	public static final int MIPS_INS_MTM0 = 442;
+	public static final int MIPS_INS_MTM1 = 443;
+	public static final int MIPS_INS_MTM2 = 444;
+	public static final int MIPS_INS_MTP0 = 445;
+	public static final int MIPS_INS_MTP1 = 446;
+	public static final int MIPS_INS_MTP2 = 447;
+	public static final int MIPS_INS_MUH = 448;
+	public static final int MIPS_INS_MUHU = 449;
+	public static final int MIPS_INS_MULEQ_S = 450;
+	public static final int MIPS_INS_MULEU_S = 451;
+	public static final int MIPS_INS_MULQ_RS = 452;
+	public static final int MIPS_INS_MULQ_S = 453;
+	public static final int MIPS_INS_MULR_Q = 454;
+	public static final int MIPS_INS_MULSAQ_S = 455;
+	public static final int MIPS_INS_MULSA = 456;
+	public static final int MIPS_INS_MULT = 457;
+	public static final int MIPS_INS_MULTU = 458;
+	public static final int MIPS_INS_MULU = 459;
+	public static final int MIPS_INS_MULV = 460;
+	public static final int MIPS_INS_MUL_Q = 461;
+	public static final int MIPS_INS_MUL_S = 462;
+	public static final int MIPS_INS_NLOC = 463;
+	public static final int MIPS_INS_NLZC = 464;
+	public static final int MIPS_INS_NMADD = 465;
+	public static final int MIPS_INS_NMSUB = 466;
+	public static final int MIPS_INS_NOR = 467;
+	public static final int MIPS_INS_NORI = 468;
+	public static final int MIPS_INS_NOT16 = 469;
+	public static final int MIPS_INS_NOT = 470;
+	public static final int MIPS_INS_OR = 471;
+	public static final int MIPS_INS_OR16 = 472;
+	public static final int MIPS_INS_ORI = 473;
+	public static final int MIPS_INS_PACKRL = 474;
+	public static final int MIPS_INS_PAUSE = 475;
+	public static final int MIPS_INS_PCKEV = 476;
+	public static final int MIPS_INS_PCKOD = 477;
+	public static final int MIPS_INS_PCNT = 478;
+	public static final int MIPS_INS_PICK = 479;
+	public static final int MIPS_INS_POP = 480;
+	public static final int MIPS_INS_PRECEQU = 481;
+	public static final int MIPS_INS_PRECEQ = 482;
+	public static final int MIPS_INS_PRECEU = 483;
+	public static final int MIPS_INS_PRECRQU_S = 484;
+	public static final int MIPS_INS_PRECRQ = 485;
+	public static final int MIPS_INS_PRECRQ_RS = 486;
+	public static final int MIPS_INS_PRECR = 487;
+	public static final int MIPS_INS_PRECR_SRA = 488;
+	public static final int MIPS_INS_PRECR_SRA_R = 489;
+	public static final int MIPS_INS_PREF = 490;
+	public static final int MIPS_INS_PREPEND = 491;
+	public static final int MIPS_INS_RADDU = 492;
+	public static final int MIPS_INS_RDDSP = 493;
+	public static final int MIPS_INS_RDHWR = 494;
+	public static final int MIPS_INS_REPLV = 495;
+	public static final int MIPS_INS_REPL = 496;
+	public static final int MIPS_INS_RINT = 497;
+	public static final int MIPS_INS_ROTR = 498;
+	public static final int MIPS_INS_ROTRV = 499;
+	public static final int MIPS_INS_ROUND = 500;
+	public static final int MIPS_INS_SAT_S = 501;
+	public static final int MIPS_INS_SAT_U = 502;
+	public static final int MIPS_INS_SB = 503;
+	public static final int MIPS_INS_SB16 = 504;
+	public static final int MIPS_INS_SC = 505;
+	public static final int MIPS_INS_SCD = 506;
+	public static final int MIPS_INS_SD = 507;
+	public static final int MIPS_INS_SDBBP = 508;
+	public static final int MIPS_INS_SDBBP16 = 509;
+	public static final int MIPS_INS_SDC1 = 510;
+	public static final int MIPS_INS_SDC2 = 511;
+	public static final int MIPS_INS_SDC3 = 512;
+	public static final int MIPS_INS_SDL = 513;
+	public static final int MIPS_INS_SDR = 514;
+	public static final int MIPS_INS_SDXC1 = 515;
+	public static final int MIPS_INS_SEB = 516;
+	public static final int MIPS_INS_SEH = 517;
+	public static final int MIPS_INS_SELEQZ = 518;
+	public static final int MIPS_INS_SELNEZ = 519;
+	public static final int MIPS_INS_SEL = 520;
+	public static final int MIPS_INS_SEQ = 521;
+	public static final int MIPS_INS_SEQI = 522;
+	public static final int MIPS_INS_SH = 523;
+	public static final int MIPS_INS_SH16 = 524;
+	public static final int MIPS_INS_SHF = 525;
+	public static final int MIPS_INS_SHILO = 526;
+	public static final int MIPS_INS_SHILOV = 527;
+	public static final int MIPS_INS_SHLLV = 528;
+	public static final int MIPS_INS_SHLLV_S = 529;
+	public static final int MIPS_INS_SHLL = 530;
+	public static final int MIPS_INS_SHLL_S = 531;
+	public static final int MIPS_INS_SHRAV = 532;
+	public static final int MIPS_INS_SHRAV_R = 533;
+	public static final int MIPS_INS_SHRA = 534;
+	public static final int MIPS_INS_SHRA_R = 535;
+	public static final int MIPS_INS_SHRLV = 536;
+	public static final int MIPS_INS_SHRL = 537;
+	public static final int MIPS_INS_SLDI = 538;
+	public static final int MIPS_INS_SLD = 539;
+	public static final int MIPS_INS_SLL = 540;
+	public static final int MIPS_INS_SLL16 = 541;
+	public static final int MIPS_INS_SLLI = 542;
+	public static final int MIPS_INS_SLLV = 543;
+	public static final int MIPS_INS_SLT = 544;
+	public static final int MIPS_INS_SLTI = 545;
+	public static final int MIPS_INS_SLTIU = 546;
+	public static final int MIPS_INS_SLTU = 547;
+	public static final int MIPS_INS_SNE = 548;
+	public static final int MIPS_INS_SNEI = 549;
+	public static final int MIPS_INS_SPLATI = 550;
+	public static final int MIPS_INS_SPLAT = 551;
+	public static final int MIPS_INS_SRA = 552;
+	public static final int MIPS_INS_SRAI = 553;
+	public static final int MIPS_INS_SRARI = 554;
+	public static final int MIPS_INS_SRAR = 555;
+	public static final int MIPS_INS_SRAV = 556;
+	public static final int MIPS_INS_SRL = 557;
+	public static final int MIPS_INS_SRL16 = 558;
+	public static final int MIPS_INS_SRLI = 559;
+	public static final int MIPS_INS_SRLRI = 560;
+	public static final int MIPS_INS_SRLR = 561;
+	public static final int MIPS_INS_SRLV = 562;
+	public static final int MIPS_INS_SSNOP = 563;
+	public static final int MIPS_INS_ST = 564;
+	public static final int MIPS_INS_SUBQH = 565;
+	public static final int MIPS_INS_SUBQH_R = 566;
+	public static final int MIPS_INS_SUBQ = 567;
+	public static final int MIPS_INS_SUBQ_S = 568;
+	public static final int MIPS_INS_SUBSUS_U = 569;
+	public static final int MIPS_INS_SUBSUU_S = 570;
+	public static final int MIPS_INS_SUBS_S = 571;
+	public static final int MIPS_INS_SUBS_U = 572;
+	public static final int MIPS_INS_SUBU16 = 573;
+	public static final int MIPS_INS_SUBUH = 574;
+	public static final int MIPS_INS_SUBUH_R = 575;
+	public static final int MIPS_INS_SUBU = 576;
+	public static final int MIPS_INS_SUBU_S = 577;
+	public static final int MIPS_INS_SUBVI = 578;
+	public static final int MIPS_INS_SUBV = 579;
+	public static final int MIPS_INS_SUXC1 = 580;
+	public static final int MIPS_INS_SW = 581;
+	public static final int MIPS_INS_SW16 = 582;
+	public static final int MIPS_INS_SWC1 = 583;
+	public static final int MIPS_INS_SWC2 = 584;
+	public static final int MIPS_INS_SWC3 = 585;
+	public static final int MIPS_INS_SWL = 586;
+	public static final int MIPS_INS_SWM16 = 587;
+	public static final int MIPS_INS_SWM32 = 588;
+	public static final int MIPS_INS_SWP = 589;
+	public static final int MIPS_INS_SWR = 590;
+	public static final int MIPS_INS_SWXC1 = 591;
+	public static final int MIPS_INS_SYNC = 592;
+	public static final int MIPS_INS_SYNCI = 593;
+	public static final int MIPS_INS_SYSCALL = 594;
+	public static final int MIPS_INS_TEQ = 595;
+	public static final int MIPS_INS_TEQI = 596;
+	public static final int MIPS_INS_TGE = 597;
+	public static final int MIPS_INS_TGEI = 598;
+	public static final int MIPS_INS_TGEIU = 599;
+	public static final int MIPS_INS_TGEU = 600;
+	public static final int MIPS_INS_TLBP = 601;
+	public static final int MIPS_INS_TLBR = 602;
+	public static final int MIPS_INS_TLBWI = 603;
+	public static final int MIPS_INS_TLBWR = 604;
+	public static final int MIPS_INS_TLT = 605;
+	public static final int MIPS_INS_TLTI = 606;
+	public static final int MIPS_INS_TLTIU = 607;
+	public static final int MIPS_INS_TLTU = 608;
+	public static final int MIPS_INS_TNE = 609;
+	public static final int MIPS_INS_TNEI = 610;
+	public static final int MIPS_INS_TRUNC = 611;
+	public static final int MIPS_INS_V3MULU = 612;
+	public static final int MIPS_INS_VMM0 = 613;
+	public static final int MIPS_INS_VMULU = 614;
+	public static final int MIPS_INS_VSHF = 615;
+	public static final int MIPS_INS_WAIT = 616;
+	public static final int MIPS_INS_WRDSP = 617;
+	public static final int MIPS_INS_WSBH = 618;
+	public static final int MIPS_INS_XOR = 619;
+	public static final int MIPS_INS_XOR16 = 620;
+	public static final int MIPS_INS_XORI = 621;
+
+	// some alias instructions
+	public static final int MIPS_INS_NOP = 622;
+	public static final int MIPS_INS_NEGU = 623;
+
+	// special instructions
+	public static final int MIPS_INS_JALR_HB = 624;
+	public static final int MIPS_INS_JR_HB = 625;
+	public static final int MIPS_INS_ENDING = 626;
+
+	public static final int MIPS_GRP_INVALID = 0;
+	public static final int MIPS_GRP_JUMP = 1;
+	public static final int MIPS_GRP_CALL = 2;
+	public static final int MIPS_GRP_RET = 3;
+	public static final int MIPS_GRP_INT = 4;
+	public static final int MIPS_GRP_IRET = 5;
+	public static final int MIPS_GRP_PRIVILEGE = 6;
+	public static final int MIPS_GRP_BRANCH_RELATIVE = 7;
+	public static final int MIPS_GRP_BITCOUNT = 128;
+	public static final int MIPS_GRP_DSP = 129;
+	public static final int MIPS_GRP_DSPR2 = 130;
+	public static final int MIPS_GRP_FPIDX = 131;
+	public static final int MIPS_GRP_MSA = 132;
+	public static final int MIPS_GRP_MIPS32R2 = 133;
+	public static final int MIPS_GRP_MIPS64 = 134;
+	public static final int MIPS_GRP_MIPS64R2 = 135;
+	public static final int MIPS_GRP_SEINREG = 136;
+	public static final int MIPS_GRP_STDENC = 137;
+	public static final int MIPS_GRP_SWAP = 138;
+	public static final int MIPS_GRP_MICROMIPS = 139;
+	public static final int MIPS_GRP_MIPS16MODE = 140;
+	public static final int MIPS_GRP_FP64BIT = 141;
+	public static final int MIPS_GRP_NONANSFPMATH = 142;
+	public static final int MIPS_GRP_NOTFP64BIT = 143;
+	public static final int MIPS_GRP_NOTINMICROMIPS = 144;
+	public static final int MIPS_GRP_NOTNACL = 145;
+	public static final int MIPS_GRP_NOTMIPS32R6 = 146;
+	public static final int MIPS_GRP_NOTMIPS64R6 = 147;
+	public static final int MIPS_GRP_CNMIPS = 148;
+	public static final int MIPS_GRP_MIPS32 = 149;
+	public static final int MIPS_GRP_MIPS32R6 = 150;
+	public static final int MIPS_GRP_MIPS64R6 = 151;
+	public static final int MIPS_GRP_MIPS2 = 152;
+	public static final int MIPS_GRP_MIPS3 = 153;
+	public static final int MIPS_GRP_MIPS3_32 = 154;
+	public static final int MIPS_GRP_MIPS3_32R2 = 155;
+	public static final int MIPS_GRP_MIPS4_32 = 156;
+	public static final int MIPS_GRP_MIPS4_32R2 = 157;
+	public static final int MIPS_GRP_MIPS5_32R2 = 158;
+	public static final int MIPS_GRP_GP32BIT = 159;
+	public static final int MIPS_GRP_GP64BIT = 160;
+	public static final int MIPS_GRP_ENDING = 161;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Ppc.java b/capstone/bindings/java/capstone/Ppc.java
new file mode 100644
index 000000000..128667a09
--- /dev/null
+++ b/capstone/bindings/java/capstone/Ppc.java
@@ -0,0 +1,109 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Ppc_const.*;
+
+public class Ppc {
+
+  public static class MemType extends Structure {
+    public int base;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "disp");
+    }
+  }
+
+  public static class CrxType extends Structure {
+    public int scale;
+    public int reg;
+    public int cond;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("scale", "reg", "cond");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+    public CrxType crx;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == PPC_OP_MEM)
+        value.setType(MemType.class);
+      if (type == PPC_OP_CRX)
+        value.setType(CrxType.class);
+      if (type == PPC_OP_IMM || type == PPC_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == PPC_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int bc;
+    public int bh;
+    public byte update_cr0;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("bc");
+      readField("bh");
+      readField("update_cr0");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("bc", "bh", "update_cr0", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int bc;
+    public int bh;
+    public boolean updateCr0;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      bc = op_info.bc;
+      bh = op_info.bh;
+      updateCr0 = (op_info.update_cr0 > 0);
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Ppc_const.java b/capstone/bindings/java/capstone/Ppc_const.java
new file mode 100644
index 000000000..51fea3066
--- /dev/null
+++ b/capstone/bindings/java/capstone/Ppc_const.java
@@ -0,0 +1,1980 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Ppc_const {
+
+	public static final int PPC_BC_INVALID = 0;
+	public static final int PPC_BC_LT = (0<<5)|12;
+	public static final int PPC_BC_LE = (1<<5)|4;
+	public static final int PPC_BC_EQ = (2<<5)|12;
+	public static final int PPC_BC_GE = (0<<5)|4;
+	public static final int PPC_BC_GT = (1<<5)|12;
+	public static final int PPC_BC_NE = (2<<5)|4;
+	public static final int PPC_BC_UN = (3<<5)|12;
+	public static final int PPC_BC_NU = (3<<5)|4;
+	public static final int PPC_BC_SO = (4<<5)|12;
+	public static final int PPC_BC_NS = (4<<5)|4;
+
+	public static final int PPC_BH_INVALID = 0;
+	public static final int PPC_BH_PLUS = 1;
+	public static final int PPC_BH_MINUS = 2;
+
+	public static final int PPC_OP_INVALID = 0;
+	public static final int PPC_OP_REG = 1;
+	public static final int PPC_OP_IMM = 2;
+	public static final int PPC_OP_MEM = 3;
+	public static final int PPC_OP_CRX = 64;
+
+	public static final int PPC_REG_INVALID = 0;
+	public static final int PPC_REG_CARRY = 2;
+	public static final int PPC_REG_CTR = 3;
+	public static final int PPC_REG_LR = 5;
+	public static final int PPC_REG_RM = 6;
+	public static final int PPC_REG_VRSAVE = 8;
+	public static final int PPC_REG_XER = 9;
+	public static final int PPC_REG_ZERO = 10;
+	public static final int PPC_REG_CR0 = 12;
+	public static final int PPC_REG_CR1 = 13;
+	public static final int PPC_REG_CR2 = 14;
+	public static final int PPC_REG_CR3 = 15;
+	public static final int PPC_REG_CR4 = 16;
+	public static final int PPC_REG_CR5 = 17;
+	public static final int PPC_REG_CR6 = 18;
+	public static final int PPC_REG_CR7 = 19;
+	public static final int PPC_REG_CTR8 = 20;
+	public static final int PPC_REG_F0 = 21;
+	public static final int PPC_REG_F1 = 22;
+	public static final int PPC_REG_F2 = 23;
+	public static final int PPC_REG_F3 = 24;
+	public static final int PPC_REG_F4 = 25;
+	public static final int PPC_REG_F5 = 26;
+	public static final int PPC_REG_F6 = 27;
+	public static final int PPC_REG_F7 = 28;
+	public static final int PPC_REG_F8 = 29;
+	public static final int PPC_REG_F9 = 30;
+	public static final int PPC_REG_F10 = 31;
+	public static final int PPC_REG_F11 = 32;
+	public static final int PPC_REG_F12 = 33;
+	public static final int PPC_REG_F13 = 34;
+	public static final int PPC_REG_F14 = 35;
+	public static final int PPC_REG_F15 = 36;
+	public static final int PPC_REG_F16 = 37;
+	public static final int PPC_REG_F17 = 38;
+	public static final int PPC_REG_F18 = 39;
+	public static final int PPC_REG_F19 = 40;
+	public static final int PPC_REG_F20 = 41;
+	public static final int PPC_REG_F21 = 42;
+	public static final int PPC_REG_F22 = 43;
+	public static final int PPC_REG_F23 = 44;
+	public static final int PPC_REG_F24 = 45;
+	public static final int PPC_REG_F25 = 46;
+	public static final int PPC_REG_F26 = 47;
+	public static final int PPC_REG_F27 = 48;
+	public static final int PPC_REG_F28 = 49;
+	public static final int PPC_REG_F29 = 50;
+	public static final int PPC_REG_F30 = 51;
+	public static final int PPC_REG_F31 = 52;
+	public static final int PPC_REG_LR8 = 54;
+	public static final int PPC_REG_Q0 = 55;
+	public static final int PPC_REG_Q1 = 56;
+	public static final int PPC_REG_Q2 = 57;
+	public static final int PPC_REG_Q3 = 58;
+	public static final int PPC_REG_Q4 = 59;
+	public static final int PPC_REG_Q5 = 60;
+	public static final int PPC_REG_Q6 = 61;
+	public static final int PPC_REG_Q7 = 62;
+	public static final int PPC_REG_Q8 = 63;
+	public static final int PPC_REG_Q9 = 64;
+	public static final int PPC_REG_Q10 = 65;
+	public static final int PPC_REG_Q11 = 66;
+	public static final int PPC_REG_Q12 = 67;
+	public static final int PPC_REG_Q13 = 68;
+	public static final int PPC_REG_Q14 = 69;
+	public static final int PPC_REG_Q15 = 70;
+	public static final int PPC_REG_Q16 = 71;
+	public static final int PPC_REG_Q17 = 72;
+	public static final int PPC_REG_Q18 = 73;
+	public static final int PPC_REG_Q19 = 74;
+	public static final int PPC_REG_Q20 = 75;
+	public static final int PPC_REG_Q21 = 76;
+	public static final int PPC_REG_Q22 = 77;
+	public static final int PPC_REG_Q23 = 78;
+	public static final int PPC_REG_Q24 = 79;
+	public static final int PPC_REG_Q25 = 80;
+	public static final int PPC_REG_Q26 = 81;
+	public static final int PPC_REG_Q27 = 82;
+	public static final int PPC_REG_Q28 = 83;
+	public static final int PPC_REG_Q29 = 84;
+	public static final int PPC_REG_Q30 = 85;
+	public static final int PPC_REG_Q31 = 86;
+	public static final int PPC_REG_R0 = 87;
+	public static final int PPC_REG_R1 = 88;
+	public static final int PPC_REG_R2 = 89;
+	public static final int PPC_REG_R3 = 90;
+	public static final int PPC_REG_R4 = 91;
+	public static final int PPC_REG_R5 = 92;
+	public static final int PPC_REG_R6 = 93;
+	public static final int PPC_REG_R7 = 94;
+	public static final int PPC_REG_R8 = 95;
+	public static final int PPC_REG_R9 = 96;
+	public static final int PPC_REG_R10 = 97;
+	public static final int PPC_REG_R11 = 98;
+	public static final int PPC_REG_R12 = 99;
+	public static final int PPC_REG_R13 = 100;
+	public static final int PPC_REG_R14 = 101;
+	public static final int PPC_REG_R15 = 102;
+	public static final int PPC_REG_R16 = 103;
+	public static final int PPC_REG_R17 = 104;
+	public static final int PPC_REG_R18 = 105;
+	public static final int PPC_REG_R19 = 106;
+	public static final int PPC_REG_R20 = 107;
+	public static final int PPC_REG_R21 = 108;
+	public static final int PPC_REG_R22 = 109;
+	public static final int PPC_REG_R23 = 110;
+	public static final int PPC_REG_R24 = 111;
+	public static final int PPC_REG_R25 = 112;
+	public static final int PPC_REG_R26 = 113;
+	public static final int PPC_REG_R27 = 114;
+	public static final int PPC_REG_R28 = 115;
+	public static final int PPC_REG_R29 = 116;
+	public static final int PPC_REG_R30 = 117;
+	public static final int PPC_REG_R31 = 118;
+	public static final int PPC_REG_V0 = 151;
+	public static final int PPC_REG_V1 = 152;
+	public static final int PPC_REG_V2 = 153;
+	public static final int PPC_REG_V3 = 154;
+	public static final int PPC_REG_V4 = 155;
+	public static final int PPC_REG_V5 = 156;
+	public static final int PPC_REG_V6 = 157;
+	public static final int PPC_REG_V7 = 158;
+	public static final int PPC_REG_V8 = 159;
+	public static final int PPC_REG_V9 = 160;
+	public static final int PPC_REG_V10 = 161;
+	public static final int PPC_REG_V11 = 162;
+	public static final int PPC_REG_V12 = 163;
+	public static final int PPC_REG_V13 = 164;
+	public static final int PPC_REG_V14 = 165;
+	public static final int PPC_REG_V15 = 166;
+	public static final int PPC_REG_V16 = 167;
+	public static final int PPC_REG_V17 = 168;
+	public static final int PPC_REG_V18 = 169;
+	public static final int PPC_REG_V19 = 170;
+	public static final int PPC_REG_V20 = 171;
+	public static final int PPC_REG_V21 = 172;
+	public static final int PPC_REG_V22 = 173;
+	public static final int PPC_REG_V23 = 174;
+	public static final int PPC_REG_V24 = 175;
+	public static final int PPC_REG_V25 = 176;
+	public static final int PPC_REG_V26 = 177;
+	public static final int PPC_REG_V27 = 178;
+	public static final int PPC_REG_V28 = 179;
+	public static final int PPC_REG_V29 = 180;
+	public static final int PPC_REG_V30 = 181;
+	public static final int PPC_REG_V31 = 182;
+	public static final int PPC_REG_VS0 = 215;
+	public static final int PPC_REG_VS1 = 216;
+	public static final int PPC_REG_VS2 = 217;
+	public static final int PPC_REG_VS3 = 218;
+	public static final int PPC_REG_VS4 = 219;
+	public static final int PPC_REG_VS5 = 220;
+	public static final int PPC_REG_VS6 = 221;
+	public static final int PPC_REG_VS7 = 222;
+	public static final int PPC_REG_VS8 = 223;
+	public static final int PPC_REG_VS9 = 224;
+	public static final int PPC_REG_VS10 = 225;
+	public static final int PPC_REG_VS11 = 226;
+	public static final int PPC_REG_VS12 = 227;
+	public static final int PPC_REG_VS13 = 228;
+	public static final int PPC_REG_VS14 = 229;
+	public static final int PPC_REG_VS15 = 230;
+	public static final int PPC_REG_VS16 = 231;
+	public static final int PPC_REG_VS17 = 232;
+	public static final int PPC_REG_VS18 = 233;
+	public static final int PPC_REG_VS19 = 234;
+	public static final int PPC_REG_VS20 = 235;
+	public static final int PPC_REG_VS21 = 236;
+	public static final int PPC_REG_VS22 = 237;
+	public static final int PPC_REG_VS23 = 238;
+	public static final int PPC_REG_VS24 = 239;
+	public static final int PPC_REG_VS25 = 240;
+	public static final int PPC_REG_VS26 = 241;
+	public static final int PPC_REG_VS27 = 242;
+	public static final int PPC_REG_VS28 = 243;
+	public static final int PPC_REG_VS29 = 244;
+	public static final int PPC_REG_VS30 = 245;
+	public static final int PPC_REG_VS31 = 246;
+	public static final int PPC_REG_VS32 = 247;
+	public static final int PPC_REG_VS33 = 248;
+	public static final int PPC_REG_VS34 = 249;
+	public static final int PPC_REG_VS35 = 250;
+	public static final int PPC_REG_VS36 = 251;
+	public static final int PPC_REG_VS37 = 252;
+	public static final int PPC_REG_VS38 = 253;
+	public static final int PPC_REG_VS39 = 254;
+	public static final int PPC_REG_VS40 = 255;
+	public static final int PPC_REG_VS41 = 256;
+	public static final int PPC_REG_VS42 = 257;
+	public static final int PPC_REG_VS43 = 258;
+	public static final int PPC_REG_VS44 = 259;
+	public static final int PPC_REG_VS45 = 260;
+	public static final int PPC_REG_VS46 = 261;
+	public static final int PPC_REG_VS47 = 262;
+	public static final int PPC_REG_VS48 = 263;
+	public static final int PPC_REG_VS49 = 264;
+	public static final int PPC_REG_VS50 = 265;
+	public static final int PPC_REG_VS51 = 266;
+	public static final int PPC_REG_VS52 = 267;
+	public static final int PPC_REG_VS53 = 268;
+	public static final int PPC_REG_VS54 = 269;
+	public static final int PPC_REG_VS55 = 270;
+	public static final int PPC_REG_VS56 = 271;
+	public static final int PPC_REG_VS57 = 272;
+	public static final int PPC_REG_VS58 = 273;
+	public static final int PPC_REG_VS59 = 274;
+	public static final int PPC_REG_VS60 = 275;
+	public static final int PPC_REG_VS61 = 276;
+	public static final int PPC_REG_VS62 = 277;
+	public static final int PPC_REG_VS63 = 278;
+	public static final int PPC_REG_CR0EQ = 312;
+	public static final int PPC_REG_CR1EQ = 313;
+	public static final int PPC_REG_CR2EQ = 314;
+	public static final int PPC_REG_CR3EQ = 315;
+	public static final int PPC_REG_CR4EQ = 316;
+	public static final int PPC_REG_CR5EQ = 317;
+	public static final int PPC_REG_CR6EQ = 318;
+	public static final int PPC_REG_CR7EQ = 319;
+	public static final int PPC_REG_CR0GT = 320;
+	public static final int PPC_REG_CR1GT = 321;
+	public static final int PPC_REG_CR2GT = 322;
+	public static final int PPC_REG_CR3GT = 323;
+	public static final int PPC_REG_CR4GT = 324;
+	public static final int PPC_REG_CR5GT = 325;
+	public static final int PPC_REG_CR6GT = 326;
+	public static final int PPC_REG_CR7GT = 327;
+	public static final int PPC_REG_CR0LT = 328;
+	public static final int PPC_REG_CR1LT = 329;
+	public static final int PPC_REG_CR2LT = 330;
+	public static final int PPC_REG_CR3LT = 331;
+	public static final int PPC_REG_CR4LT = 332;
+	public static final int PPC_REG_CR5LT = 333;
+	public static final int PPC_REG_CR6LT = 334;
+	public static final int PPC_REG_CR7LT = 335;
+	public static final int PPC_REG_CR0UN = 336;
+	public static final int PPC_REG_CR1UN = 337;
+	public static final int PPC_REG_CR2UN = 338;
+	public static final int PPC_REG_CR3UN = 339;
+	public static final int PPC_REG_CR4UN = 340;
+	public static final int PPC_REG_CR5UN = 341;
+	public static final int PPC_REG_CR6UN = 342;
+	public static final int PPC_REG_CR7UN = 343;
+	public static final int PPC_REG_ENDING = 344;
+
+	public static final int PPC_INS_INVALID = 0;
+	public static final int PPC_INS_ADD = 1;
+	public static final int PPC_INS_ADDC = 2;
+	public static final int PPC_INS_ADDE = 3;
+	public static final int PPC_INS_ADDI = 4;
+	public static final int PPC_INS_ADDIC = 5;
+	public static final int PPC_INS_ADDIS = 6;
+	public static final int PPC_INS_ADDME = 7;
+	public static final int PPC_INS_ADDPCIS = 8;
+	public static final int PPC_INS_ADDZE = 9;
+	public static final int PPC_INS_AND = 10;
+	public static final int PPC_INS_ANDC = 11;
+	public static final int PPC_INS_ANDI = 12;
+	public static final int PPC_INS_ANDIS = 13;
+	public static final int PPC_INS_ATTN = 14;
+	public static final int PPC_INS_B = 15;
+	public static final int PPC_INS_BA = 16;
+	public static final int PPC_INS_BC = 17;
+	public static final int PPC_INS_BCA = 18;
+	public static final int PPC_INS_BCCTR = 19;
+	public static final int PPC_INS_BCCTRL = 20;
+	public static final int PPC_INS_BCDCFN = 21;
+	public static final int PPC_INS_BCDCFSQ = 22;
+	public static final int PPC_INS_BCDCFZ = 23;
+	public static final int PPC_INS_BCDCPSGN = 24;
+	public static final int PPC_INS_BCDCTN = 25;
+	public static final int PPC_INS_BCDCTSQ = 26;
+	public static final int PPC_INS_BCDCTZ = 27;
+	public static final int PPC_INS_BCDS = 28;
+	public static final int PPC_INS_BCDSETSGN = 29;
+	public static final int PPC_INS_BCDSR = 30;
+	public static final int PPC_INS_BCDTRUNC = 31;
+	public static final int PPC_INS_BCDUS = 32;
+	public static final int PPC_INS_BCDUTRUNC = 33;
+	public static final int PPC_INS_BCL = 34;
+	public static final int PPC_INS_BCLA = 35;
+	public static final int PPC_INS_BCLR = 36;
+	public static final int PPC_INS_BCLRL = 37;
+	public static final int PPC_INS_BCTR = 38;
+	public static final int PPC_INS_BCTRL = 39;
+	public static final int PPC_INS_BDNZ = 40;
+	public static final int PPC_INS_BDNZA = 41;
+	public static final int PPC_INS_BDNZF = 42;
+	public static final int PPC_INS_BDNZFA = 43;
+	public static final int PPC_INS_BDNZFL = 44;
+	public static final int PPC_INS_BDNZFLA = 45;
+	public static final int PPC_INS_BDNZFLR = 46;
+	public static final int PPC_INS_BDNZFLRL = 47;
+	public static final int PPC_INS_BDNZL = 48;
+	public static final int PPC_INS_BDNZLA = 49;
+	public static final int PPC_INS_BDNZLR = 50;
+	public static final int PPC_INS_BDNZLRL = 51;
+	public static final int PPC_INS_BDNZT = 52;
+	public static final int PPC_INS_BDNZTA = 53;
+	public static final int PPC_INS_BDNZTL = 54;
+	public static final int PPC_INS_BDNZTLA = 55;
+	public static final int PPC_INS_BDNZTLR = 56;
+	public static final int PPC_INS_BDNZTLRL = 57;
+	public static final int PPC_INS_BDZ = 58;
+	public static final int PPC_INS_BDZA = 59;
+	public static final int PPC_INS_BDZF = 60;
+	public static final int PPC_INS_BDZFA = 61;
+	public static final int PPC_INS_BDZFL = 62;
+	public static final int PPC_INS_BDZFLA = 63;
+	public static final int PPC_INS_BDZFLR = 64;
+	public static final int PPC_INS_BDZFLRL = 65;
+	public static final int PPC_INS_BDZL = 66;
+	public static final int PPC_INS_BDZLA = 67;
+	public static final int PPC_INS_BDZLR = 68;
+	public static final int PPC_INS_BDZLRL = 69;
+	public static final int PPC_INS_BDZT = 70;
+	public static final int PPC_INS_BDZTA = 71;
+	public static final int PPC_INS_BDZTL = 72;
+	public static final int PPC_INS_BDZTLA = 73;
+	public static final int PPC_INS_BDZTLR = 74;
+	public static final int PPC_INS_BDZTLRL = 75;
+	public static final int PPC_INS_BEQ = 76;
+	public static final int PPC_INS_BEQA = 77;
+	public static final int PPC_INS_BEQCTR = 78;
+	public static final int PPC_INS_BEQCTRL = 79;
+	public static final int PPC_INS_BEQL = 80;
+	public static final int PPC_INS_BEQLA = 81;
+	public static final int PPC_INS_BEQLR = 82;
+	public static final int PPC_INS_BEQLRL = 83;
+	public static final int PPC_INS_BF = 84;
+	public static final int PPC_INS_BFA = 85;
+	public static final int PPC_INS_BFCTR = 86;
+	public static final int PPC_INS_BFCTRL = 87;
+	public static final int PPC_INS_BFL = 88;
+	public static final int PPC_INS_BFLA = 89;
+	public static final int PPC_INS_BFLR = 90;
+	public static final int PPC_INS_BFLRL = 91;
+	public static final int PPC_INS_BGE = 92;
+	public static final int PPC_INS_BGEA = 93;
+	public static final int PPC_INS_BGECTR = 94;
+	public static final int PPC_INS_BGECTRL = 95;
+	public static final int PPC_INS_BGEL = 96;
+	public static final int PPC_INS_BGELA = 97;
+	public static final int PPC_INS_BGELR = 98;
+	public static final int PPC_INS_BGELRL = 99;
+	public static final int PPC_INS_BGT = 100;
+	public static final int PPC_INS_BGTA = 101;
+	public static final int PPC_INS_BGTCTR = 102;
+	public static final int PPC_INS_BGTCTRL = 103;
+	public static final int PPC_INS_BGTL = 104;
+	public static final int PPC_INS_BGTLA = 105;
+	public static final int PPC_INS_BGTLR = 106;
+	public static final int PPC_INS_BGTLRL = 107;
+	public static final int PPC_INS_BL = 108;
+	public static final int PPC_INS_BLA = 109;
+	public static final int PPC_INS_BLE = 110;
+	public static final int PPC_INS_BLEA = 111;
+	public static final int PPC_INS_BLECTR = 112;
+	public static final int PPC_INS_BLECTRL = 113;
+	public static final int PPC_INS_BLEL = 114;
+	public static final int PPC_INS_BLELA = 115;
+	public static final int PPC_INS_BLELR = 116;
+	public static final int PPC_INS_BLELRL = 117;
+	public static final int PPC_INS_BLR = 118;
+	public static final int PPC_INS_BLRL = 119;
+	public static final int PPC_INS_BLT = 120;
+	public static final int PPC_INS_BLTA = 121;
+	public static final int PPC_INS_BLTCTR = 122;
+	public static final int PPC_INS_BLTCTRL = 123;
+	public static final int PPC_INS_BLTL = 124;
+	public static final int PPC_INS_BLTLA = 125;
+	public static final int PPC_INS_BLTLR = 126;
+	public static final int PPC_INS_BLTLRL = 127;
+	public static final int PPC_INS_BNE = 128;
+	public static final int PPC_INS_BNEA = 129;
+	public static final int PPC_INS_BNECTR = 130;
+	public static final int PPC_INS_BNECTRL = 131;
+	public static final int PPC_INS_BNEL = 132;
+	public static final int PPC_INS_BNELA = 133;
+	public static final int PPC_INS_BNELR = 134;
+	public static final int PPC_INS_BNELRL = 135;
+	public static final int PPC_INS_BNG = 136;
+	public static final int PPC_INS_BNGA = 137;
+	public static final int PPC_INS_BNGCTR = 138;
+	public static final int PPC_INS_BNGCTRL = 139;
+	public static final int PPC_INS_BNGL = 140;
+	public static final int PPC_INS_BNGLA = 141;
+	public static final int PPC_INS_BNGLR = 142;
+	public static final int PPC_INS_BNGLRL = 143;
+	public static final int PPC_INS_BNL = 144;
+	public static final int PPC_INS_BNLA = 145;
+	public static final int PPC_INS_BNLCTR = 146;
+	public static final int PPC_INS_BNLCTRL = 147;
+	public static final int PPC_INS_BNLL = 148;
+	public static final int PPC_INS_BNLLA = 149;
+	public static final int PPC_INS_BNLLR = 150;
+	public static final int PPC_INS_BNLLRL = 151;
+	public static final int PPC_INS_BNS = 152;
+	public static final int PPC_INS_BNSA = 153;
+	public static final int PPC_INS_BNSCTR = 154;
+	public static final int PPC_INS_BNSCTRL = 155;
+	public static final int PPC_INS_BNSL = 156;
+	public static final int PPC_INS_BNSLA = 157;
+	public static final int PPC_INS_BNSLR = 158;
+	public static final int PPC_INS_BNSLRL = 159;
+	public static final int PPC_INS_BNU = 160;
+	public static final int PPC_INS_BNUA = 161;
+	public static final int PPC_INS_BNUCTR = 162;
+	public static final int PPC_INS_BNUCTRL = 163;
+	public static final int PPC_INS_BNUL = 164;
+	public static final int PPC_INS_BNULA = 165;
+	public static final int PPC_INS_BNULR = 166;
+	public static final int PPC_INS_BNULRL = 167;
+	public static final int PPC_INS_BPERMD = 168;
+	public static final int PPC_INS_BRINC = 169;
+	public static final int PPC_INS_BSO = 170;
+	public static final int PPC_INS_BSOA = 171;
+	public static final int PPC_INS_BSOCTR = 172;
+	public static final int PPC_INS_BSOCTRL = 173;
+	public static final int PPC_INS_BSOL = 174;
+	public static final int PPC_INS_BSOLA = 175;
+	public static final int PPC_INS_BSOLR = 176;
+	public static final int PPC_INS_BSOLRL = 177;
+	public static final int PPC_INS_BT = 178;
+	public static final int PPC_INS_BTA = 179;
+	public static final int PPC_INS_BTCTR = 180;
+	public static final int PPC_INS_BTCTRL = 181;
+	public static final int PPC_INS_BTL = 182;
+	public static final int PPC_INS_BTLA = 183;
+	public static final int PPC_INS_BTLR = 184;
+	public static final int PPC_INS_BTLRL = 185;
+	public static final int PPC_INS_BUN = 186;
+	public static final int PPC_INS_BUNA = 187;
+	public static final int PPC_INS_BUNCTR = 188;
+	public static final int PPC_INS_BUNCTRL = 189;
+	public static final int PPC_INS_BUNL = 190;
+	public static final int PPC_INS_BUNLA = 191;
+	public static final int PPC_INS_BUNLR = 192;
+	public static final int PPC_INS_BUNLRL = 193;
+	public static final int PPC_INS_CLRBHRB = 194;
+	public static final int PPC_INS_CLRLDI = 195;
+	public static final int PPC_INS_CLRLSLDI = 196;
+	public static final int PPC_INS_CLRLSLWI = 197;
+	public static final int PPC_INS_CLRLWI = 198;
+	public static final int PPC_INS_CLRRDI = 199;
+	public static final int PPC_INS_CLRRWI = 200;
+	public static final int PPC_INS_CMP = 201;
+	public static final int PPC_INS_CMPB = 202;
+	public static final int PPC_INS_CMPD = 203;
+	public static final int PPC_INS_CMPDI = 204;
+	public static final int PPC_INS_CMPEQB = 205;
+	public static final int PPC_INS_CMPI = 206;
+	public static final int PPC_INS_CMPL = 207;
+	public static final int PPC_INS_CMPLD = 208;
+	public static final int PPC_INS_CMPLDI = 209;
+	public static final int PPC_INS_CMPLI = 210;
+	public static final int PPC_INS_CMPLW = 211;
+	public static final int PPC_INS_CMPLWI = 212;
+	public static final int PPC_INS_CMPRB = 213;
+	public static final int PPC_INS_CMPW = 214;
+	public static final int PPC_INS_CMPWI = 215;
+	public static final int PPC_INS_CNTLZD = 216;
+	public static final int PPC_INS_CNTLZW = 217;
+	public static final int PPC_INS_CNTTZD = 218;
+	public static final int PPC_INS_CNTTZW = 219;
+	public static final int PPC_INS_COPY = 220;
+	public static final int PPC_INS_COPY_FIRST = 221;
+	public static final int PPC_INS_CP_ABORT = 222;
+	public static final int PPC_INS_CRAND = 223;
+	public static final int PPC_INS_CRANDC = 224;
+	public static final int PPC_INS_CRCLR = 225;
+	public static final int PPC_INS_CREQV = 226;
+	public static final int PPC_INS_CRMOVE = 227;
+	public static final int PPC_INS_CRNAND = 228;
+	public static final int PPC_INS_CRNOR = 229;
+	public static final int PPC_INS_CRNOT = 230;
+	public static final int PPC_INS_CROR = 231;
+	public static final int PPC_INS_CRORC = 232;
+	public static final int PPC_INS_CRSET = 233;
+	public static final int PPC_INS_CRXOR = 234;
+	public static final int PPC_INS_DARN = 235;
+	public static final int PPC_INS_DCBA = 236;
+	public static final int PPC_INS_DCBF = 237;
+	public static final int PPC_INS_DCBFEP = 238;
+	public static final int PPC_INS_DCBFL = 239;
+	public static final int PPC_INS_DCBFLP = 240;
+	public static final int PPC_INS_DCBI = 241;
+	public static final int PPC_INS_DCBST = 242;
+	public static final int PPC_INS_DCBSTEP = 243;
+	public static final int PPC_INS_DCBT = 244;
+	public static final int PPC_INS_DCBTCT = 245;
+	public static final int PPC_INS_DCBTDS = 246;
+	public static final int PPC_INS_DCBTEP = 247;
+	public static final int PPC_INS_DCBTST = 248;
+	public static final int PPC_INS_DCBTSTCT = 249;
+	public static final int PPC_INS_DCBTSTDS = 250;
+	public static final int PPC_INS_DCBTSTEP = 251;
+	public static final int PPC_INS_DCBTSTT = 252;
+	public static final int PPC_INS_DCBTT = 253;
+	public static final int PPC_INS_DCBZ = 254;
+	public static final int PPC_INS_DCBZEP = 255;
+	public static final int PPC_INS_DCBZL = 256;
+	public static final int PPC_INS_DCBZLEP = 257;
+	public static final int PPC_INS_DCCCI = 258;
+	public static final int PPC_INS_DCI = 259;
+	public static final int PPC_INS_DIVD = 260;
+	public static final int PPC_INS_DIVDE = 261;
+	public static final int PPC_INS_DIVDEU = 262;
+	public static final int PPC_INS_DIVDU = 263;
+	public static final int PPC_INS_DIVW = 264;
+	public static final int PPC_INS_DIVWE = 265;
+	public static final int PPC_INS_DIVWEU = 266;
+	public static final int PPC_INS_DIVWU = 267;
+	public static final int PPC_INS_DSS = 268;
+	public static final int PPC_INS_DSSALL = 269;
+	public static final int PPC_INS_DST = 270;
+	public static final int PPC_INS_DSTST = 271;
+	public static final int PPC_INS_DSTSTT = 272;
+	public static final int PPC_INS_DSTT = 273;
+	public static final int PPC_INS_EFDABS = 274;
+	public static final int PPC_INS_EFDADD = 275;
+	public static final int PPC_INS_EFDCFS = 276;
+	public static final int PPC_INS_EFDCFSF = 277;
+	public static final int PPC_INS_EFDCFSI = 278;
+	public static final int PPC_INS_EFDCFSID = 279;
+	public static final int PPC_INS_EFDCFUF = 280;
+	public static final int PPC_INS_EFDCFUI = 281;
+	public static final int PPC_INS_EFDCFUID = 282;
+	public static final int PPC_INS_EFDCMPEQ = 283;
+	public static final int PPC_INS_EFDCMPGT = 284;
+	public static final int PPC_INS_EFDCMPLT = 285;
+	public static final int PPC_INS_EFDCTSF = 286;
+	public static final int PPC_INS_EFDCTSI = 287;
+	public static final int PPC_INS_EFDCTSIDZ = 288;
+	public static final int PPC_INS_EFDCTSIZ = 289;
+	public static final int PPC_INS_EFDCTUF = 290;
+	public static final int PPC_INS_EFDCTUI = 291;
+	public static final int PPC_INS_EFDCTUIDZ = 292;
+	public static final int PPC_INS_EFDCTUIZ = 293;
+	public static final int PPC_INS_EFDDIV = 294;
+	public static final int PPC_INS_EFDMUL = 295;
+	public static final int PPC_INS_EFDNABS = 296;
+	public static final int PPC_INS_EFDNEG = 297;
+	public static final int PPC_INS_EFDSUB = 298;
+	public static final int PPC_INS_EFDTSTEQ = 299;
+	public static final int PPC_INS_EFDTSTGT = 300;
+	public static final int PPC_INS_EFDTSTLT = 301;
+	public static final int PPC_INS_EFSABS = 302;
+	public static final int PPC_INS_EFSADD = 303;
+	public static final int PPC_INS_EFSCFD = 304;
+	public static final int PPC_INS_EFSCFSF = 305;
+	public static final int PPC_INS_EFSCFSI = 306;
+	public static final int PPC_INS_EFSCFUF = 307;
+	public static final int PPC_INS_EFSCFUI = 308;
+	public static final int PPC_INS_EFSCMPEQ = 309;
+	public static final int PPC_INS_EFSCMPGT = 310;
+	public static final int PPC_INS_EFSCMPLT = 311;
+	public static final int PPC_INS_EFSCTSF = 312;
+	public static final int PPC_INS_EFSCTSI = 313;
+	public static final int PPC_INS_EFSCTSIZ = 314;
+	public static final int PPC_INS_EFSCTUF = 315;
+	public static final int PPC_INS_EFSCTUI = 316;
+	public static final int PPC_INS_EFSCTUIZ = 317;
+	public static final int PPC_INS_EFSDIV = 318;
+	public static final int PPC_INS_EFSMUL = 319;
+	public static final int PPC_INS_EFSNABS = 320;
+	public static final int PPC_INS_EFSNEG = 321;
+	public static final int PPC_INS_EFSSUB = 322;
+	public static final int PPC_INS_EFSTSTEQ = 323;
+	public static final int PPC_INS_EFSTSTGT = 324;
+	public static final int PPC_INS_EFSTSTLT = 325;
+	public static final int PPC_INS_EIEIO = 326;
+	public static final int PPC_INS_EQV = 327;
+	public static final int PPC_INS_EVABS = 328;
+	public static final int PPC_INS_EVADDIW = 329;
+	public static final int PPC_INS_EVADDSMIAAW = 330;
+	public static final int PPC_INS_EVADDSSIAAW = 331;
+	public static final int PPC_INS_EVADDUMIAAW = 332;
+	public static final int PPC_INS_EVADDUSIAAW = 333;
+	public static final int PPC_INS_EVADDW = 334;
+	public static final int PPC_INS_EVAND = 335;
+	public static final int PPC_INS_EVANDC = 336;
+	public static final int PPC_INS_EVCMPEQ = 337;
+	public static final int PPC_INS_EVCMPGTS = 338;
+	public static final int PPC_INS_EVCMPGTU = 339;
+	public static final int PPC_INS_EVCMPLTS = 340;
+	public static final int PPC_INS_EVCMPLTU = 341;
+	public static final int PPC_INS_EVCNTLSW = 342;
+	public static final int PPC_INS_EVCNTLZW = 343;
+	public static final int PPC_INS_EVDIVWS = 344;
+	public static final int PPC_INS_EVDIVWU = 345;
+	public static final int PPC_INS_EVEQV = 346;
+	public static final int PPC_INS_EVEXTSB = 347;
+	public static final int PPC_INS_EVEXTSH = 348;
+	public static final int PPC_INS_EVFSABS = 349;
+	public static final int PPC_INS_EVFSADD = 350;
+	public static final int PPC_INS_EVFSCFSF = 351;
+	public static final int PPC_INS_EVFSCFSI = 352;
+	public static final int PPC_INS_EVFSCFUF = 353;
+	public static final int PPC_INS_EVFSCFUI = 354;
+	public static final int PPC_INS_EVFSCMPEQ = 355;
+	public static final int PPC_INS_EVFSCMPGT = 356;
+	public static final int PPC_INS_EVFSCMPLT = 357;
+	public static final int PPC_INS_EVFSCTSF = 358;
+	public static final int PPC_INS_EVFSCTSI = 359;
+	public static final int PPC_INS_EVFSCTSIZ = 360;
+	public static final int PPC_INS_EVFSCTUI = 361;
+	public static final int PPC_INS_EVFSDIV = 362;
+	public static final int PPC_INS_EVFSMUL = 363;
+	public static final int PPC_INS_EVFSNABS = 364;
+	public static final int PPC_INS_EVFSNEG = 365;
+	public static final int PPC_INS_EVFSSUB = 366;
+	public static final int PPC_INS_EVFSTSTEQ = 367;
+	public static final int PPC_INS_EVFSTSTGT = 368;
+	public static final int PPC_INS_EVFSTSTLT = 369;
+	public static final int PPC_INS_EVLDD = 370;
+	public static final int PPC_INS_EVLDDX = 371;
+	public static final int PPC_INS_EVLDH = 372;
+	public static final int PPC_INS_EVLDHX = 373;
+	public static final int PPC_INS_EVLDW = 374;
+	public static final int PPC_INS_EVLDWX = 375;
+	public static final int PPC_INS_EVLHHESPLAT = 376;
+	public static final int PPC_INS_EVLHHESPLATX = 377;
+	public static final int PPC_INS_EVLHHOSSPLAT = 378;
+	public static final int PPC_INS_EVLHHOSSPLATX = 379;
+	public static final int PPC_INS_EVLHHOUSPLAT = 380;
+	public static final int PPC_INS_EVLHHOUSPLATX = 381;
+	public static final int PPC_INS_EVLWHE = 382;
+	public static final int PPC_INS_EVLWHEX = 383;
+	public static final int PPC_INS_EVLWHOS = 384;
+	public static final int PPC_INS_EVLWHOSX = 385;
+	public static final int PPC_INS_EVLWHOU = 386;
+	public static final int PPC_INS_EVLWHOUX = 387;
+	public static final int PPC_INS_EVLWHSPLAT = 388;
+	public static final int PPC_INS_EVLWHSPLATX = 389;
+	public static final int PPC_INS_EVLWWSPLAT = 390;
+	public static final int PPC_INS_EVLWWSPLATX = 391;
+	public static final int PPC_INS_EVMERGEHI = 392;
+	public static final int PPC_INS_EVMERGEHILO = 393;
+	public static final int PPC_INS_EVMERGELO = 394;
+	public static final int PPC_INS_EVMERGELOHI = 395;
+	public static final int PPC_INS_EVMHEGSMFAA = 396;
+	public static final int PPC_INS_EVMHEGSMFAN = 397;
+	public static final int PPC_INS_EVMHEGSMIAA = 398;
+	public static final int PPC_INS_EVMHEGSMIAN = 399;
+	public static final int PPC_INS_EVMHEGUMIAA = 400;
+	public static final int PPC_INS_EVMHEGUMIAN = 401;
+	public static final int PPC_INS_EVMHESMF = 402;
+	public static final int PPC_INS_EVMHESMFA = 403;
+	public static final int PPC_INS_EVMHESMFAAW = 404;
+	public static final int PPC_INS_EVMHESMFANW = 405;
+	public static final int PPC_INS_EVMHESMI = 406;
+	public static final int PPC_INS_EVMHESMIA = 407;
+	public static final int PPC_INS_EVMHESMIAAW = 408;
+	public static final int PPC_INS_EVMHESMIANW = 409;
+	public static final int PPC_INS_EVMHESSF = 410;
+	public static final int PPC_INS_EVMHESSFA = 411;
+	public static final int PPC_INS_EVMHESSFAAW = 412;
+	public static final int PPC_INS_EVMHESSFANW = 413;
+	public static final int PPC_INS_EVMHESSIAAW = 414;
+	public static final int PPC_INS_EVMHESSIANW = 415;
+	public static final int PPC_INS_EVMHEUMI = 416;
+	public static final int PPC_INS_EVMHEUMIA = 417;
+	public static final int PPC_INS_EVMHEUMIAAW = 418;
+	public static final int PPC_INS_EVMHEUMIANW = 419;
+	public static final int PPC_INS_EVMHEUSIAAW = 420;
+	public static final int PPC_INS_EVMHEUSIANW = 421;
+	public static final int PPC_INS_EVMHOGSMFAA = 422;
+	public static final int PPC_INS_EVMHOGSMFAN = 423;
+	public static final int PPC_INS_EVMHOGSMIAA = 424;
+	public static final int PPC_INS_EVMHOGSMIAN = 425;
+	public static final int PPC_INS_EVMHOGUMIAA = 426;
+	public static final int PPC_INS_EVMHOGUMIAN = 427;
+	public static final int PPC_INS_EVMHOSMF = 428;
+	public static final int PPC_INS_EVMHOSMFA = 429;
+	public static final int PPC_INS_EVMHOSMFAAW = 430;
+	public static final int PPC_INS_EVMHOSMFANW = 431;
+	public static final int PPC_INS_EVMHOSMI = 432;
+	public static final int PPC_INS_EVMHOSMIA = 433;
+	public static final int PPC_INS_EVMHOSMIAAW = 434;
+	public static final int PPC_INS_EVMHOSMIANW = 435;
+	public static final int PPC_INS_EVMHOSSF = 436;
+	public static final int PPC_INS_EVMHOSSFA = 437;
+	public static final int PPC_INS_EVMHOSSFAAW = 438;
+	public static final int PPC_INS_EVMHOSSFANW = 439;
+	public static final int PPC_INS_EVMHOSSIAAW = 440;
+	public static final int PPC_INS_EVMHOSSIANW = 441;
+	public static final int PPC_INS_EVMHOUMI = 442;
+	public static final int PPC_INS_EVMHOUMIA = 443;
+	public static final int PPC_INS_EVMHOUMIAAW = 444;
+	public static final int PPC_INS_EVMHOUMIANW = 445;
+	public static final int PPC_INS_EVMHOUSIAAW = 446;
+	public static final int PPC_INS_EVMHOUSIANW = 447;
+	public static final int PPC_INS_EVMRA = 448;
+	public static final int PPC_INS_EVMWHSMF = 449;
+	public static final int PPC_INS_EVMWHSMFA = 450;
+	public static final int PPC_INS_EVMWHSMI = 451;
+	public static final int PPC_INS_EVMWHSMIA = 452;
+	public static final int PPC_INS_EVMWHSSF = 453;
+	public static final int PPC_INS_EVMWHSSFA = 454;
+	public static final int PPC_INS_EVMWHUMI = 455;
+	public static final int PPC_INS_EVMWHUMIA = 456;
+	public static final int PPC_INS_EVMWLSMIAAW = 457;
+	public static final int PPC_INS_EVMWLSMIANW = 458;
+	public static final int PPC_INS_EVMWLSSIAAW = 459;
+	public static final int PPC_INS_EVMWLSSIANW = 460;
+	public static final int PPC_INS_EVMWLUMI = 461;
+	public static final int PPC_INS_EVMWLUMIA = 462;
+	public static final int PPC_INS_EVMWLUMIAAW = 463;
+	public static final int PPC_INS_EVMWLUMIANW = 464;
+	public static final int PPC_INS_EVMWLUSIAAW = 465;
+	public static final int PPC_INS_EVMWLUSIANW = 466;
+	public static final int PPC_INS_EVMWSMF = 467;
+	public static final int PPC_INS_EVMWSMFA = 468;
+	public static final int PPC_INS_EVMWSMFAA = 469;
+	public static final int PPC_INS_EVMWSMFAN = 470;
+	public static final int PPC_INS_EVMWSMI = 471;
+	public static final int PPC_INS_EVMWSMIA = 472;
+	public static final int PPC_INS_EVMWSMIAA = 473;
+	public static final int PPC_INS_EVMWSMIAN = 474;
+	public static final int PPC_INS_EVMWSSF = 475;
+	public static final int PPC_INS_EVMWSSFA = 476;
+	public static final int PPC_INS_EVMWSSFAA = 477;
+	public static final int PPC_INS_EVMWSSFAN = 478;
+	public static final int PPC_INS_EVMWUMI = 479;
+	public static final int PPC_INS_EVMWUMIA = 480;
+	public static final int PPC_INS_EVMWUMIAA = 481;
+	public static final int PPC_INS_EVMWUMIAN = 482;
+	public static final int PPC_INS_EVNAND = 483;
+	public static final int PPC_INS_EVNEG = 484;
+	public static final int PPC_INS_EVNOR = 485;
+	public static final int PPC_INS_EVOR = 486;
+	public static final int PPC_INS_EVORC = 487;
+	public static final int PPC_INS_EVRLW = 488;
+	public static final int PPC_INS_EVRLWI = 489;
+	public static final int PPC_INS_EVRNDW = 490;
+	public static final int PPC_INS_EVSEL = 491;
+	public static final int PPC_INS_EVSLW = 492;
+	public static final int PPC_INS_EVSLWI = 493;
+	public static final int PPC_INS_EVSPLATFI = 494;
+	public static final int PPC_INS_EVSPLATI = 495;
+	public static final int PPC_INS_EVSRWIS = 496;
+	public static final int PPC_INS_EVSRWIU = 497;
+	public static final int PPC_INS_EVSRWS = 498;
+	public static final int PPC_INS_EVSRWU = 499;
+	public static final int PPC_INS_EVSTDD = 500;
+	public static final int PPC_INS_EVSTDDX = 501;
+	public static final int PPC_INS_EVSTDH = 502;
+	public static final int PPC_INS_EVSTDHX = 503;
+	public static final int PPC_INS_EVSTDW = 504;
+	public static final int PPC_INS_EVSTDWX = 505;
+	public static final int PPC_INS_EVSTWHE = 506;
+	public static final int PPC_INS_EVSTWHEX = 507;
+	public static final int PPC_INS_EVSTWHO = 508;
+	public static final int PPC_INS_EVSTWHOX = 509;
+	public static final int PPC_INS_EVSTWWE = 510;
+	public static final int PPC_INS_EVSTWWEX = 511;
+	public static final int PPC_INS_EVSTWWO = 512;
+	public static final int PPC_INS_EVSTWWOX = 513;
+	public static final int PPC_INS_EVSUBFSMIAAW = 514;
+	public static final int PPC_INS_EVSUBFSSIAAW = 515;
+	public static final int PPC_INS_EVSUBFUMIAAW = 516;
+	public static final int PPC_INS_EVSUBFUSIAAW = 517;
+	public static final int PPC_INS_EVSUBFW = 518;
+	public static final int PPC_INS_EVSUBIFW = 519;
+	public static final int PPC_INS_EVXOR = 520;
+	public static final int PPC_INS_EXTLDI = 521;
+	public static final int PPC_INS_EXTLWI = 522;
+	public static final int PPC_INS_EXTRDI = 523;
+	public static final int PPC_INS_EXTRWI = 524;
+	public static final int PPC_INS_EXTSB = 525;
+	public static final int PPC_INS_EXTSH = 526;
+	public static final int PPC_INS_EXTSW = 527;
+	public static final int PPC_INS_EXTSWSLI = 528;
+	public static final int PPC_INS_FABS = 529;
+	public static final int PPC_INS_FADD = 530;
+	public static final int PPC_INS_FADDS = 531;
+	public static final int PPC_INS_FCFID = 532;
+	public static final int PPC_INS_FCFIDS = 533;
+	public static final int PPC_INS_FCFIDU = 534;
+	public static final int PPC_INS_FCFIDUS = 535;
+	public static final int PPC_INS_FCMPU = 536;
+	public static final int PPC_INS_FCPSGN = 537;
+	public static final int PPC_INS_FCTID = 538;
+	public static final int PPC_INS_FCTIDU = 539;
+	public static final int PPC_INS_FCTIDUZ = 540;
+	public static final int PPC_INS_FCTIDZ = 541;
+	public static final int PPC_INS_FCTIW = 542;
+	public static final int PPC_INS_FCTIWU = 543;
+	public static final int PPC_INS_FCTIWUZ = 544;
+	public static final int PPC_INS_FCTIWZ = 545;
+	public static final int PPC_INS_FDIV = 546;
+	public static final int PPC_INS_FDIVS = 547;
+	public static final int PPC_INS_FMADD = 548;
+	public static final int PPC_INS_FMADDS = 549;
+	public static final int PPC_INS_FMR = 550;
+	public static final int PPC_INS_FMSUB = 551;
+	public static final int PPC_INS_FMSUBS = 552;
+	public static final int PPC_INS_FMUL = 553;
+	public static final int PPC_INS_FMULS = 554;
+	public static final int PPC_INS_FNABS = 555;
+	public static final int PPC_INS_FNEG = 556;
+	public static final int PPC_INS_FNMADD = 557;
+	public static final int PPC_INS_FNMADDS = 558;
+	public static final int PPC_INS_FNMSUB = 559;
+	public static final int PPC_INS_FNMSUBS = 560;
+	public static final int PPC_INS_FRE = 561;
+	public static final int PPC_INS_FRES = 562;
+	public static final int PPC_INS_FRIM = 563;
+	public static final int PPC_INS_FRIN = 564;
+	public static final int PPC_INS_FRIP = 565;
+	public static final int PPC_INS_FRIZ = 566;
+	public static final int PPC_INS_FRSP = 567;
+	public static final int PPC_INS_FRSQRTE = 568;
+	public static final int PPC_INS_FRSQRTES = 569;
+	public static final int PPC_INS_FSEL = 570;
+	public static final int PPC_INS_FSQRT = 571;
+	public static final int PPC_INS_FSQRTS = 572;
+	public static final int PPC_INS_FSUB = 573;
+	public static final int PPC_INS_FSUBS = 574;
+	public static final int PPC_INS_FTDIV = 575;
+	public static final int PPC_INS_FTSQRT = 576;
+	public static final int PPC_INS_HRFID = 577;
+	public static final int PPC_INS_ICBI = 578;
+	public static final int PPC_INS_ICBIEP = 579;
+	public static final int PPC_INS_ICBLC = 580;
+	public static final int PPC_INS_ICBLQ = 581;
+	public static final int PPC_INS_ICBT = 582;
+	public static final int PPC_INS_ICBTLS = 583;
+	public static final int PPC_INS_ICCCI = 584;
+	public static final int PPC_INS_ICI = 585;
+	public static final int PPC_INS_INSLWI = 586;
+	public static final int PPC_INS_INSRDI = 587;
+	public static final int PPC_INS_INSRWI = 588;
+	public static final int PPC_INS_ISEL = 589;
+	public static final int PPC_INS_ISYNC = 590;
+	public static final int PPC_INS_LA = 591;
+	public static final int PPC_INS_LBARX = 592;
+	public static final int PPC_INS_LBEPX = 593;
+	public static final int PPC_INS_LBZ = 594;
+	public static final int PPC_INS_LBZCIX = 595;
+	public static final int PPC_INS_LBZU = 596;
+	public static final int PPC_INS_LBZUX = 597;
+	public static final int PPC_INS_LBZX = 598;
+	public static final int PPC_INS_LD = 599;
+	public static final int PPC_INS_LDARX = 600;
+	public static final int PPC_INS_LDAT = 601;
+	public static final int PPC_INS_LDBRX = 602;
+	public static final int PPC_INS_LDCIX = 603;
+	public static final int PPC_INS_LDMX = 604;
+	public static final int PPC_INS_LDU = 605;
+	public static final int PPC_INS_LDUX = 606;
+	public static final int PPC_INS_LDX = 607;
+	public static final int PPC_INS_LFD = 608;
+	public static final int PPC_INS_LFDEPX = 609;
+	public static final int PPC_INS_LFDU = 610;
+	public static final int PPC_INS_LFDUX = 611;
+	public static final int PPC_INS_LFDX = 612;
+	public static final int PPC_INS_LFIWAX = 613;
+	public static final int PPC_INS_LFIWZX = 614;
+	public static final int PPC_INS_LFS = 615;
+	public static final int PPC_INS_LFSU = 616;
+	public static final int PPC_INS_LFSUX = 617;
+	public static final int PPC_INS_LFSX = 618;
+	public static final int PPC_INS_LHA = 619;
+	public static final int PPC_INS_LHARX = 620;
+	public static final int PPC_INS_LHAU = 621;
+	public static final int PPC_INS_LHAUX = 622;
+	public static final int PPC_INS_LHAX = 623;
+	public static final int PPC_INS_LHBRX = 624;
+	public static final int PPC_INS_LHEPX = 625;
+	public static final int PPC_INS_LHZ = 626;
+	public static final int PPC_INS_LHZCIX = 627;
+	public static final int PPC_INS_LHZU = 628;
+	public static final int PPC_INS_LHZUX = 629;
+	public static final int PPC_INS_LHZX = 630;
+	public static final int PPC_INS_LI = 631;
+	public static final int PPC_INS_LIS = 632;
+	public static final int PPC_INS_LMW = 633;
+	public static final int PPC_INS_LNIA = 634;
+	public static final int PPC_INS_LSWI = 635;
+	public static final int PPC_INS_LVEBX = 636;
+	public static final int PPC_INS_LVEHX = 637;
+	public static final int PPC_INS_LVEWX = 638;
+	public static final int PPC_INS_LVSL = 639;
+	public static final int PPC_INS_LVSR = 640;
+	public static final int PPC_INS_LVX = 641;
+	public static final int PPC_INS_LVXL = 642;
+	public static final int PPC_INS_LWA = 643;
+	public static final int PPC_INS_LWARX = 644;
+	public static final int PPC_INS_LWAT = 645;
+	public static final int PPC_INS_LWAUX = 646;
+	public static final int PPC_INS_LWAX = 647;
+	public static final int PPC_INS_LWBRX = 648;
+	public static final int PPC_INS_LWEPX = 649;
+	public static final int PPC_INS_LWSYNC = 650;
+	public static final int PPC_INS_LWZ = 651;
+	public static final int PPC_INS_LWZCIX = 652;
+	public static final int PPC_INS_LWZU = 653;
+	public static final int PPC_INS_LWZUX = 654;
+	public static final int PPC_INS_LWZX = 655;
+	public static final int PPC_INS_LXSD = 656;
+	public static final int PPC_INS_LXSDX = 657;
+	public static final int PPC_INS_LXSIBZX = 658;
+	public static final int PPC_INS_LXSIHZX = 659;
+	public static final int PPC_INS_LXSIWAX = 660;
+	public static final int PPC_INS_LXSIWZX = 661;
+	public static final int PPC_INS_LXSSP = 662;
+	public static final int PPC_INS_LXSSPX = 663;
+	public static final int PPC_INS_LXV = 664;
+	public static final int PPC_INS_LXVB16X = 665;
+	public static final int PPC_INS_LXVD2X = 666;
+	public static final int PPC_INS_LXVDSX = 667;
+	public static final int PPC_INS_LXVH8X = 668;
+	public static final int PPC_INS_LXVL = 669;
+	public static final int PPC_INS_LXVLL = 670;
+	public static final int PPC_INS_LXVW4X = 671;
+	public static final int PPC_INS_LXVWSX = 672;
+	public static final int PPC_INS_LXVX = 673;
+	public static final int PPC_INS_MADDHD = 674;
+	public static final int PPC_INS_MADDHDU = 675;
+	public static final int PPC_INS_MADDLD = 676;
+	public static final int PPC_INS_MBAR = 677;
+	public static final int PPC_INS_MCRF = 678;
+	public static final int PPC_INS_MCRFS = 679;
+	public static final int PPC_INS_MCRXRX = 680;
+	public static final int PPC_INS_MFAMR = 681;
+	public static final int PPC_INS_MFASR = 682;
+	public static final int PPC_INS_MFBHRBE = 683;
+	public static final int PPC_INS_MFBR0 = 684;
+	public static final int PPC_INS_MFBR1 = 685;
+	public static final int PPC_INS_MFBR2 = 686;
+	public static final int PPC_INS_MFBR3 = 687;
+	public static final int PPC_INS_MFBR4 = 688;
+	public static final int PPC_INS_MFBR5 = 689;
+	public static final int PPC_INS_MFBR6 = 690;
+	public static final int PPC_INS_MFBR7 = 691;
+	public static final int PPC_INS_MFCFAR = 692;
+	public static final int PPC_INS_MFCR = 693;
+	public static final int PPC_INS_MFCTR = 694;
+	public static final int PPC_INS_MFDAR = 695;
+	public static final int PPC_INS_MFDBATL = 696;
+	public static final int PPC_INS_MFDBATU = 697;
+	public static final int PPC_INS_MFDCCR = 698;
+	public static final int PPC_INS_MFDCR = 699;
+	public static final int PPC_INS_MFDEAR = 700;
+	public static final int PPC_INS_MFDEC = 701;
+	public static final int PPC_INS_MFDSCR = 702;
+	public static final int PPC_INS_MFDSISR = 703;
+	public static final int PPC_INS_MFESR = 704;
+	public static final int PPC_INS_MFFPRD = 705;
+	public static final int PPC_INS_MFFS = 706;
+	public static final int PPC_INS_MFFSCDRN = 707;
+	public static final int PPC_INS_MFFSCDRNI = 708;
+	public static final int PPC_INS_MFFSCE = 709;
+	public static final int PPC_INS_MFFSCRN = 710;
+	public static final int PPC_INS_MFFSCRNI = 711;
+	public static final int PPC_INS_MFFSL = 712;
+	public static final int PPC_INS_MFIBATL = 713;
+	public static final int PPC_INS_MFIBATU = 714;
+	public static final int PPC_INS_MFICCR = 715;
+	public static final int PPC_INS_MFLR = 716;
+	public static final int PPC_INS_MFMSR = 717;
+	public static final int PPC_INS_MFOCRF = 718;
+	public static final int PPC_INS_MFPID = 719;
+	public static final int PPC_INS_MFPMR = 720;
+	public static final int PPC_INS_MFPVR = 721;
+	public static final int PPC_INS_MFRTCL = 722;
+	public static final int PPC_INS_MFRTCU = 723;
+	public static final int PPC_INS_MFSDR1 = 724;
+	public static final int PPC_INS_MFSPEFSCR = 725;
+	public static final int PPC_INS_MFSPR = 726;
+	public static final int PPC_INS_MFSPRG = 727;
+	public static final int PPC_INS_MFSPRG0 = 728;
+	public static final int PPC_INS_MFSPRG1 = 729;
+	public static final int PPC_INS_MFSPRG2 = 730;
+	public static final int PPC_INS_MFSPRG3 = 731;
+	public static final int PPC_INS_MFSPRG4 = 732;
+	public static final int PPC_INS_MFSPRG5 = 733;
+	public static final int PPC_INS_MFSPRG6 = 734;
+	public static final int PPC_INS_MFSPRG7 = 735;
+	public static final int PPC_INS_MFSR = 736;
+	public static final int PPC_INS_MFSRIN = 737;
+	public static final int PPC_INS_MFSRR0 = 738;
+	public static final int PPC_INS_MFSRR1 = 739;
+	public static final int PPC_INS_MFSRR2 = 740;
+	public static final int PPC_INS_MFSRR3 = 741;
+	public static final int PPC_INS_MFTB = 742;
+	public static final int PPC_INS_MFTBHI = 743;
+	public static final int PPC_INS_MFTBL = 744;
+	public static final int PPC_INS_MFTBLO = 745;
+	public static final int PPC_INS_MFTBU = 746;
+	public static final int PPC_INS_MFTCR = 747;
+	public static final int PPC_INS_MFVRD = 748;
+	public static final int PPC_INS_MFVRSAVE = 749;
+	public static final int PPC_INS_MFVSCR = 750;
+	public static final int PPC_INS_MFVSRD = 751;
+	public static final int PPC_INS_MFVSRLD = 752;
+	public static final int PPC_INS_MFVSRWZ = 753;
+	public static final int PPC_INS_MFXER = 754;
+	public static final int PPC_INS_MODSD = 755;
+	public static final int PPC_INS_MODSW = 756;
+	public static final int PPC_INS_MODUD = 757;
+	public static final int PPC_INS_MODUW = 758;
+	public static final int PPC_INS_MR = 759;
+	public static final int PPC_INS_MSGSYNC = 760;
+	public static final int PPC_INS_MSYNC = 761;
+	public static final int PPC_INS_MTAMR = 762;
+	public static final int PPC_INS_MTASR = 763;
+	public static final int PPC_INS_MTBR0 = 764;
+	public static final int PPC_INS_MTBR1 = 765;
+	public static final int PPC_INS_MTBR2 = 766;
+	public static final int PPC_INS_MTBR3 = 767;
+	public static final int PPC_INS_MTBR4 = 768;
+	public static final int PPC_INS_MTBR5 = 769;
+	public static final int PPC_INS_MTBR6 = 770;
+	public static final int PPC_INS_MTBR7 = 771;
+	public static final int PPC_INS_MTCFAR = 772;
+	public static final int PPC_INS_MTCR = 773;
+	public static final int PPC_INS_MTCRF = 774;
+	public static final int PPC_INS_MTCTR = 775;
+	public static final int PPC_INS_MTDAR = 776;
+	public static final int PPC_INS_MTDBATL = 777;
+	public static final int PPC_INS_MTDBATU = 778;
+	public static final int PPC_INS_MTDCCR = 779;
+	public static final int PPC_INS_MTDCR = 780;
+	public static final int PPC_INS_MTDEAR = 781;
+	public static final int PPC_INS_MTDEC = 782;
+	public static final int PPC_INS_MTDSCR = 783;
+	public static final int PPC_INS_MTDSISR = 784;
+	public static final int PPC_INS_MTESR = 785;
+	public static final int PPC_INS_MTFSB0 = 786;
+	public static final int PPC_INS_MTFSB1 = 787;
+	public static final int PPC_INS_MTFSF = 788;
+	public static final int PPC_INS_MTFSFI = 789;
+	public static final int PPC_INS_MTIBATL = 790;
+	public static final int PPC_INS_MTIBATU = 791;
+	public static final int PPC_INS_MTICCR = 792;
+	public static final int PPC_INS_MTLR = 793;
+	public static final int PPC_INS_MTMSR = 794;
+	public static final int PPC_INS_MTMSRD = 795;
+	public static final int PPC_INS_MTOCRF = 796;
+	public static final int PPC_INS_MTPID = 797;
+	public static final int PPC_INS_MTPMR = 798;
+	public static final int PPC_INS_MTSDR1 = 799;
+	public static final int PPC_INS_MTSPEFSCR = 800;
+	public static final int PPC_INS_MTSPR = 801;
+	public static final int PPC_INS_MTSPRG = 802;
+	public static final int PPC_INS_MTSPRG0 = 803;
+	public static final int PPC_INS_MTSPRG1 = 804;
+	public static final int PPC_INS_MTSPRG2 = 805;
+	public static final int PPC_INS_MTSPRG3 = 806;
+	public static final int PPC_INS_MTSPRG4 = 807;
+	public static final int PPC_INS_MTSPRG5 = 808;
+	public static final int PPC_INS_MTSPRG6 = 809;
+	public static final int PPC_INS_MTSPRG7 = 810;
+	public static final int PPC_INS_MTSR = 811;
+	public static final int PPC_INS_MTSRIN = 812;
+	public static final int PPC_INS_MTSRR0 = 813;
+	public static final int PPC_INS_MTSRR1 = 814;
+	public static final int PPC_INS_MTSRR2 = 815;
+	public static final int PPC_INS_MTSRR3 = 816;
+	public static final int PPC_INS_MTTBHI = 817;
+	public static final int PPC_INS_MTTBL = 818;
+	public static final int PPC_INS_MTTBLO = 819;
+	public static final int PPC_INS_MTTBU = 820;
+	public static final int PPC_INS_MTTCR = 821;
+	public static final int PPC_INS_MTVRSAVE = 822;
+	public static final int PPC_INS_MTVSCR = 823;
+	public static final int PPC_INS_MTVSRD = 824;
+	public static final int PPC_INS_MTVSRDD = 825;
+	public static final int PPC_INS_MTVSRWA = 826;
+	public static final int PPC_INS_MTVSRWS = 827;
+	public static final int PPC_INS_MTVSRWZ = 828;
+	public static final int PPC_INS_MTXER = 829;
+	public static final int PPC_INS_MULHD = 830;
+	public static final int PPC_INS_MULHDU = 831;
+	public static final int PPC_INS_MULHW = 832;
+	public static final int PPC_INS_MULHWU = 833;
+	public static final int PPC_INS_MULLD = 834;
+	public static final int PPC_INS_MULLI = 835;
+	public static final int PPC_INS_MULLW = 836;
+	public static final int PPC_INS_NAND = 837;
+	public static final int PPC_INS_NAP = 838;
+	public static final int PPC_INS_NEG = 839;
+	public static final int PPC_INS_NOP = 840;
+	public static final int PPC_INS_NOR = 841;
+	public static final int PPC_INS_NOT = 842;
+	public static final int PPC_INS_OR = 843;
+	public static final int PPC_INS_ORC = 844;
+	public static final int PPC_INS_ORI = 845;
+	public static final int PPC_INS_ORIS = 846;
+	public static final int PPC_INS_PASTE = 847;
+	public static final int PPC_INS_PASTE_LAST = 848;
+	public static final int PPC_INS_POPCNTB = 849;
+	public static final int PPC_INS_POPCNTD = 850;
+	public static final int PPC_INS_POPCNTW = 851;
+	public static final int PPC_INS_PTESYNC = 852;
+	public static final int PPC_INS_QVALIGNI = 853;
+	public static final int PPC_INS_QVESPLATI = 854;
+	public static final int PPC_INS_QVFABS = 855;
+	public static final int PPC_INS_QVFADD = 856;
+	public static final int PPC_INS_QVFADDS = 857;
+	public static final int PPC_INS_QVFAND = 858;
+	public static final int PPC_INS_QVFANDC = 859;
+	public static final int PPC_INS_QVFCFID = 860;
+	public static final int PPC_INS_QVFCFIDS = 861;
+	public static final int PPC_INS_QVFCFIDU = 862;
+	public static final int PPC_INS_QVFCFIDUS = 863;
+	public static final int PPC_INS_QVFCLR = 864;
+	public static final int PPC_INS_QVFCMPEQ = 865;
+	public static final int PPC_INS_QVFCMPGT = 866;
+	public static final int PPC_INS_QVFCMPLT = 867;
+	public static final int PPC_INS_QVFCPSGN = 868;
+	public static final int PPC_INS_QVFCTFB = 869;
+	public static final int PPC_INS_QVFCTID = 870;
+	public static final int PPC_INS_QVFCTIDU = 871;
+	public static final int PPC_INS_QVFCTIDUZ = 872;
+	public static final int PPC_INS_QVFCTIDZ = 873;
+	public static final int PPC_INS_QVFCTIW = 874;
+	public static final int PPC_INS_QVFCTIWU = 875;
+	public static final int PPC_INS_QVFCTIWUZ = 876;
+	public static final int PPC_INS_QVFCTIWZ = 877;
+	public static final int PPC_INS_QVFEQU = 878;
+	public static final int PPC_INS_QVFLOGICAL = 879;
+	public static final int PPC_INS_QVFMADD = 880;
+	public static final int PPC_INS_QVFMADDS = 881;
+	public static final int PPC_INS_QVFMR = 882;
+	public static final int PPC_INS_QVFMSUB = 883;
+	public static final int PPC_INS_QVFMSUBS = 884;
+	public static final int PPC_INS_QVFMUL = 885;
+	public static final int PPC_INS_QVFMULS = 886;
+	public static final int PPC_INS_QVFNABS = 887;
+	public static final int PPC_INS_QVFNAND = 888;
+	public static final int PPC_INS_QVFNEG = 889;
+	public static final int PPC_INS_QVFNMADD = 890;
+	public static final int PPC_INS_QVFNMADDS = 891;
+	public static final int PPC_INS_QVFNMSUB = 892;
+	public static final int PPC_INS_QVFNMSUBS = 893;
+	public static final int PPC_INS_QVFNOR = 894;
+	public static final int PPC_INS_QVFNOT = 895;
+	public static final int PPC_INS_QVFOR = 896;
+	public static final int PPC_INS_QVFORC = 897;
+	public static final int PPC_INS_QVFPERM = 898;
+	public static final int PPC_INS_QVFRE = 899;
+	public static final int PPC_INS_QVFRES = 900;
+	public static final int PPC_INS_QVFRIM = 901;
+	public static final int PPC_INS_QVFRIN = 902;
+	public static final int PPC_INS_QVFRIP = 903;
+	public static final int PPC_INS_QVFRIZ = 904;
+	public static final int PPC_INS_QVFRSP = 905;
+	public static final int PPC_INS_QVFRSQRTE = 906;
+	public static final int PPC_INS_QVFRSQRTES = 907;
+	public static final int PPC_INS_QVFSEL = 908;
+	public static final int PPC_INS_QVFSET = 909;
+	public static final int PPC_INS_QVFSUB = 910;
+	public static final int PPC_INS_QVFSUBS = 911;
+	public static final int PPC_INS_QVFTSTNAN = 912;
+	public static final int PPC_INS_QVFXMADD = 913;
+	public static final int PPC_INS_QVFXMADDS = 914;
+	public static final int PPC_INS_QVFXMUL = 915;
+	public static final int PPC_INS_QVFXMULS = 916;
+	public static final int PPC_INS_QVFXOR = 917;
+	public static final int PPC_INS_QVFXXCPNMADD = 918;
+	public static final int PPC_INS_QVFXXCPNMADDS = 919;
+	public static final int PPC_INS_QVFXXMADD = 920;
+	public static final int PPC_INS_QVFXXMADDS = 921;
+	public static final int PPC_INS_QVFXXNPMADD = 922;
+	public static final int PPC_INS_QVFXXNPMADDS = 923;
+	public static final int PPC_INS_QVGPCI = 924;
+	public static final int PPC_INS_QVLFCDUX = 925;
+	public static final int PPC_INS_QVLFCDUXA = 926;
+	public static final int PPC_INS_QVLFCDX = 927;
+	public static final int PPC_INS_QVLFCDXA = 928;
+	public static final int PPC_INS_QVLFCSUX = 929;
+	public static final int PPC_INS_QVLFCSUXA = 930;
+	public static final int PPC_INS_QVLFCSX = 931;
+	public static final int PPC_INS_QVLFCSXA = 932;
+	public static final int PPC_INS_QVLFDUX = 933;
+	public static final int PPC_INS_QVLFDUXA = 934;
+	public static final int PPC_INS_QVLFDX = 935;
+	public static final int PPC_INS_QVLFDXA = 936;
+	public static final int PPC_INS_QVLFIWAX = 937;
+	public static final int PPC_INS_QVLFIWAXA = 938;
+	public static final int PPC_INS_QVLFIWZX = 939;
+	public static final int PPC_INS_QVLFIWZXA = 940;
+	public static final int PPC_INS_QVLFSUX = 941;
+	public static final int PPC_INS_QVLFSUXA = 942;
+	public static final int PPC_INS_QVLFSX = 943;
+	public static final int PPC_INS_QVLFSXA = 944;
+	public static final int PPC_INS_QVLPCLDX = 945;
+	public static final int PPC_INS_QVLPCLSX = 946;
+	public static final int PPC_INS_QVLPCRDX = 947;
+	public static final int PPC_INS_QVLPCRSX = 948;
+	public static final int PPC_INS_QVSTFCDUX = 949;
+	public static final int PPC_INS_QVSTFCDUXA = 950;
+	public static final int PPC_INS_QVSTFCDUXI = 951;
+	public static final int PPC_INS_QVSTFCDUXIA = 952;
+	public static final int PPC_INS_QVSTFCDX = 953;
+	public static final int PPC_INS_QVSTFCDXA = 954;
+	public static final int PPC_INS_QVSTFCDXI = 955;
+	public static final int PPC_INS_QVSTFCDXIA = 956;
+	public static final int PPC_INS_QVSTFCSUX = 957;
+	public static final int PPC_INS_QVSTFCSUXA = 958;
+	public static final int PPC_INS_QVSTFCSUXI = 959;
+	public static final int PPC_INS_QVSTFCSUXIA = 960;
+	public static final int PPC_INS_QVSTFCSX = 961;
+	public static final int PPC_INS_QVSTFCSXA = 962;
+	public static final int PPC_INS_QVSTFCSXI = 963;
+	public static final int PPC_INS_QVSTFCSXIA = 964;
+	public static final int PPC_INS_QVSTFDUX = 965;
+	public static final int PPC_INS_QVSTFDUXA = 966;
+	public static final int PPC_INS_QVSTFDUXI = 967;
+	public static final int PPC_INS_QVSTFDUXIA = 968;
+	public static final int PPC_INS_QVSTFDX = 969;
+	public static final int PPC_INS_QVSTFDXA = 970;
+	public static final int PPC_INS_QVSTFDXI = 971;
+	public static final int PPC_INS_QVSTFDXIA = 972;
+	public static final int PPC_INS_QVSTFIWX = 973;
+	public static final int PPC_INS_QVSTFIWXA = 974;
+	public static final int PPC_INS_QVSTFSUX = 975;
+	public static final int PPC_INS_QVSTFSUXA = 976;
+	public static final int PPC_INS_QVSTFSUXI = 977;
+	public static final int PPC_INS_QVSTFSUXIA = 978;
+	public static final int PPC_INS_QVSTFSX = 979;
+	public static final int PPC_INS_QVSTFSXA = 980;
+	public static final int PPC_INS_QVSTFSXI = 981;
+	public static final int PPC_INS_QVSTFSXIA = 982;
+	public static final int PPC_INS_RFCI = 983;
+	public static final int PPC_INS_RFDI = 984;
+	public static final int PPC_INS_RFEBB = 985;
+	public static final int PPC_INS_RFI = 986;
+	public static final int PPC_INS_RFID = 987;
+	public static final int PPC_INS_RFMCI = 988;
+	public static final int PPC_INS_RLDCL = 989;
+	public static final int PPC_INS_RLDCR = 990;
+	public static final int PPC_INS_RLDIC = 991;
+	public static final int PPC_INS_RLDICL = 992;
+	public static final int PPC_INS_RLDICR = 993;
+	public static final int PPC_INS_RLDIMI = 994;
+	public static final int PPC_INS_RLWIMI = 995;
+	public static final int PPC_INS_RLWINM = 996;
+	public static final int PPC_INS_RLWNM = 997;
+	public static final int PPC_INS_ROTLD = 998;
+	public static final int PPC_INS_ROTLDI = 999;
+	public static final int PPC_INS_ROTLW = 1000;
+	public static final int PPC_INS_ROTLWI = 1001;
+	public static final int PPC_INS_ROTRDI = 1002;
+	public static final int PPC_INS_ROTRWI = 1003;
+	public static final int PPC_INS_SC = 1004;
+	public static final int PPC_INS_SETB = 1005;
+	public static final int PPC_INS_SLBIA = 1006;
+	public static final int PPC_INS_SLBIE = 1007;
+	public static final int PPC_INS_SLBIEG = 1008;
+	public static final int PPC_INS_SLBMFEE = 1009;
+	public static final int PPC_INS_SLBMFEV = 1010;
+	public static final int PPC_INS_SLBMTE = 1011;
+	public static final int PPC_INS_SLBSYNC = 1012;
+	public static final int PPC_INS_SLD = 1013;
+	public static final int PPC_INS_SLDI = 1014;
+	public static final int PPC_INS_SLW = 1015;
+	public static final int PPC_INS_SLWI = 1016;
+	public static final int PPC_INS_SRAD = 1017;
+	public static final int PPC_INS_SRADI = 1018;
+	public static final int PPC_INS_SRAW = 1019;
+	public static final int PPC_INS_SRAWI = 1020;
+	public static final int PPC_INS_SRD = 1021;
+	public static final int PPC_INS_SRDI = 1022;
+	public static final int PPC_INS_SRW = 1023;
+	public static final int PPC_INS_SRWI = 1024;
+	public static final int PPC_INS_STB = 1025;
+	public static final int PPC_INS_STBCIX = 1026;
+	public static final int PPC_INS_STBCX = 1027;
+	public static final int PPC_INS_STBEPX = 1028;
+	public static final int PPC_INS_STBU = 1029;
+	public static final int PPC_INS_STBUX = 1030;
+	public static final int PPC_INS_STBX = 1031;
+	public static final int PPC_INS_STD = 1032;
+	public static final int PPC_INS_STDAT = 1033;
+	public static final int PPC_INS_STDBRX = 1034;
+	public static final int PPC_INS_STDCIX = 1035;
+	public static final int PPC_INS_STDCX = 1036;
+	public static final int PPC_INS_STDU = 1037;
+	public static final int PPC_INS_STDUX = 1038;
+	public static final int PPC_INS_STDX = 1039;
+	public static final int PPC_INS_STFD = 1040;
+	public static final int PPC_INS_STFDEPX = 1041;
+	public static final int PPC_INS_STFDU = 1042;
+	public static final int PPC_INS_STFDUX = 1043;
+	public static final int PPC_INS_STFDX = 1044;
+	public static final int PPC_INS_STFIWX = 1045;
+	public static final int PPC_INS_STFS = 1046;
+	public static final int PPC_INS_STFSU = 1047;
+	public static final int PPC_INS_STFSUX = 1048;
+	public static final int PPC_INS_STFSX = 1049;
+	public static final int PPC_INS_STH = 1050;
+	public static final int PPC_INS_STHBRX = 1051;
+	public static final int PPC_INS_STHCIX = 1052;
+	public static final int PPC_INS_STHCX = 1053;
+	public static final int PPC_INS_STHEPX = 1054;
+	public static final int PPC_INS_STHU = 1055;
+	public static final int PPC_INS_STHUX = 1056;
+	public static final int PPC_INS_STHX = 1057;
+	public static final int PPC_INS_STMW = 1058;
+	public static final int PPC_INS_STOP = 1059;
+	public static final int PPC_INS_STSWI = 1060;
+	public static final int PPC_INS_STVEBX = 1061;
+	public static final int PPC_INS_STVEHX = 1062;
+	public static final int PPC_INS_STVEWX = 1063;
+	public static final int PPC_INS_STVX = 1064;
+	public static final int PPC_INS_STVXL = 1065;
+	public static final int PPC_INS_STW = 1066;
+	public static final int PPC_INS_STWAT = 1067;
+	public static final int PPC_INS_STWBRX = 1068;
+	public static final int PPC_INS_STWCIX = 1069;
+	public static final int PPC_INS_STWCX = 1070;
+	public static final int PPC_INS_STWEPX = 1071;
+	public static final int PPC_INS_STWU = 1072;
+	public static final int PPC_INS_STWUX = 1073;
+	public static final int PPC_INS_STWX = 1074;
+	public static final int PPC_INS_STXSD = 1075;
+	public static final int PPC_INS_STXSDX = 1076;
+	public static final int PPC_INS_STXSIBX = 1077;
+	public static final int PPC_INS_STXSIHX = 1078;
+	public static final int PPC_INS_STXSIWX = 1079;
+	public static final int PPC_INS_STXSSP = 1080;
+	public static final int PPC_INS_STXSSPX = 1081;
+	public static final int PPC_INS_STXV = 1082;
+	public static final int PPC_INS_STXVB16X = 1083;
+	public static final int PPC_INS_STXVD2X = 1084;
+	public static final int PPC_INS_STXVH8X = 1085;
+	public static final int PPC_INS_STXVL = 1086;
+	public static final int PPC_INS_STXVLL = 1087;
+	public static final int PPC_INS_STXVW4X = 1088;
+	public static final int PPC_INS_STXVX = 1089;
+	public static final int PPC_INS_SUB = 1090;
+	public static final int PPC_INS_SUBC = 1091;
+	public static final int PPC_INS_SUBF = 1092;
+	public static final int PPC_INS_SUBFC = 1093;
+	public static final int PPC_INS_SUBFE = 1094;
+	public static final int PPC_INS_SUBFIC = 1095;
+	public static final int PPC_INS_SUBFME = 1096;
+	public static final int PPC_INS_SUBFZE = 1097;
+	public static final int PPC_INS_SUBI = 1098;
+	public static final int PPC_INS_SUBIC = 1099;
+	public static final int PPC_INS_SUBIS = 1100;
+	public static final int PPC_INS_SUBPCIS = 1101;
+	public static final int PPC_INS_SYNC = 1102;
+	public static final int PPC_INS_TABORT = 1103;
+	public static final int PPC_INS_TABORTDC = 1104;
+	public static final int PPC_INS_TABORTDCI = 1105;
+	public static final int PPC_INS_TABORTWC = 1106;
+	public static final int PPC_INS_TABORTWCI = 1107;
+	public static final int PPC_INS_TBEGIN = 1108;
+	public static final int PPC_INS_TCHECK = 1109;
+	public static final int PPC_INS_TD = 1110;
+	public static final int PPC_INS_TDEQ = 1111;
+	public static final int PPC_INS_TDEQI = 1112;
+	public static final int PPC_INS_TDGE = 1113;
+	public static final int PPC_INS_TDGEI = 1114;
+	public static final int PPC_INS_TDGT = 1115;
+	public static final int PPC_INS_TDGTI = 1116;
+	public static final int PPC_INS_TDI = 1117;
+	public static final int PPC_INS_TDLE = 1118;
+	public static final int PPC_INS_TDLEI = 1119;
+	public static final int PPC_INS_TDLGE = 1120;
+	public static final int PPC_INS_TDLGEI = 1121;
+	public static final int PPC_INS_TDLGT = 1122;
+	public static final int PPC_INS_TDLGTI = 1123;
+	public static final int PPC_INS_TDLLE = 1124;
+	public static final int PPC_INS_TDLLEI = 1125;
+	public static final int PPC_INS_TDLLT = 1126;
+	public static final int PPC_INS_TDLLTI = 1127;
+	public static final int PPC_INS_TDLNG = 1128;
+	public static final int PPC_INS_TDLNGI = 1129;
+	public static final int PPC_INS_TDLNL = 1130;
+	public static final int PPC_INS_TDLNLI = 1131;
+	public static final int PPC_INS_TDLT = 1132;
+	public static final int PPC_INS_TDLTI = 1133;
+	public static final int PPC_INS_TDNE = 1134;
+	public static final int PPC_INS_TDNEI = 1135;
+	public static final int PPC_INS_TDNG = 1136;
+	public static final int PPC_INS_TDNGI = 1137;
+	public static final int PPC_INS_TDNL = 1138;
+	public static final int PPC_INS_TDNLI = 1139;
+	public static final int PPC_INS_TDU = 1140;
+	public static final int PPC_INS_TDUI = 1141;
+	public static final int PPC_INS_TEND = 1142;
+	public static final int PPC_INS_TLBIA = 1143;
+	public static final int PPC_INS_TLBIE = 1144;
+	public static final int PPC_INS_TLBIEL = 1145;
+	public static final int PPC_INS_TLBIVAX = 1146;
+	public static final int PPC_INS_TLBLD = 1147;
+	public static final int PPC_INS_TLBLI = 1148;
+	public static final int PPC_INS_TLBRE = 1149;
+	public static final int PPC_INS_TLBREHI = 1150;
+	public static final int PPC_INS_TLBRELO = 1151;
+	public static final int PPC_INS_TLBSX = 1152;
+	public static final int PPC_INS_TLBSYNC = 1153;
+	public static final int PPC_INS_TLBWE = 1154;
+	public static final int PPC_INS_TLBWEHI = 1155;
+	public static final int PPC_INS_TLBWELO = 1156;
+	public static final int PPC_INS_TRAP = 1157;
+	public static final int PPC_INS_TRECHKPT = 1158;
+	public static final int PPC_INS_TRECLAIM = 1159;
+	public static final int PPC_INS_TSR = 1160;
+	public static final int PPC_INS_TW = 1161;
+	public static final int PPC_INS_TWEQ = 1162;
+	public static final int PPC_INS_TWEQI = 1163;
+	public static final int PPC_INS_TWGE = 1164;
+	public static final int PPC_INS_TWGEI = 1165;
+	public static final int PPC_INS_TWGT = 1166;
+	public static final int PPC_INS_TWGTI = 1167;
+	public static final int PPC_INS_TWI = 1168;
+	public static final int PPC_INS_TWLE = 1169;
+	public static final int PPC_INS_TWLEI = 1170;
+	public static final int PPC_INS_TWLGE = 1171;
+	public static final int PPC_INS_TWLGEI = 1172;
+	public static final int PPC_INS_TWLGT = 1173;
+	public static final int PPC_INS_TWLGTI = 1174;
+	public static final int PPC_INS_TWLLE = 1175;
+	public static final int PPC_INS_TWLLEI = 1176;
+	public static final int PPC_INS_TWLLT = 1177;
+	public static final int PPC_INS_TWLLTI = 1178;
+	public static final int PPC_INS_TWLNG = 1179;
+	public static final int PPC_INS_TWLNGI = 1180;
+	public static final int PPC_INS_TWLNL = 1181;
+	public static final int PPC_INS_TWLNLI = 1182;
+	public static final int PPC_INS_TWLT = 1183;
+	public static final int PPC_INS_TWLTI = 1184;
+	public static final int PPC_INS_TWNE = 1185;
+	public static final int PPC_INS_TWNEI = 1186;
+	public static final int PPC_INS_TWNG = 1187;
+	public static final int PPC_INS_TWNGI = 1188;
+	public static final int PPC_INS_TWNL = 1189;
+	public static final int PPC_INS_TWNLI = 1190;
+	public static final int PPC_INS_TWU = 1191;
+	public static final int PPC_INS_TWUI = 1192;
+	public static final int PPC_INS_VABSDUB = 1193;
+	public static final int PPC_INS_VABSDUH = 1194;
+	public static final int PPC_INS_VABSDUW = 1195;
+	public static final int PPC_INS_VADDCUQ = 1196;
+	public static final int PPC_INS_VADDCUW = 1197;
+	public static final int PPC_INS_VADDECUQ = 1198;
+	public static final int PPC_INS_VADDEUQM = 1199;
+	public static final int PPC_INS_VADDFP = 1200;
+	public static final int PPC_INS_VADDSBS = 1201;
+	public static final int PPC_INS_VADDSHS = 1202;
+	public static final int PPC_INS_VADDSWS = 1203;
+	public static final int PPC_INS_VADDUBM = 1204;
+	public static final int PPC_INS_VADDUBS = 1205;
+	public static final int PPC_INS_VADDUDM = 1206;
+	public static final int PPC_INS_VADDUHM = 1207;
+	public static final int PPC_INS_VADDUHS = 1208;
+	public static final int PPC_INS_VADDUQM = 1209;
+	public static final int PPC_INS_VADDUWM = 1210;
+	public static final int PPC_INS_VADDUWS = 1211;
+	public static final int PPC_INS_VAND = 1212;
+	public static final int PPC_INS_VANDC = 1213;
+	public static final int PPC_INS_VAVGSB = 1214;
+	public static final int PPC_INS_VAVGSH = 1215;
+	public static final int PPC_INS_VAVGSW = 1216;
+	public static final int PPC_INS_VAVGUB = 1217;
+	public static final int PPC_INS_VAVGUH = 1218;
+	public static final int PPC_INS_VAVGUW = 1219;
+	public static final int PPC_INS_VBPERMD = 1220;
+	public static final int PPC_INS_VBPERMQ = 1221;
+	public static final int PPC_INS_VCFSX = 1222;
+	public static final int PPC_INS_VCFUX = 1223;
+	public static final int PPC_INS_VCIPHER = 1224;
+	public static final int PPC_INS_VCIPHERLAST = 1225;
+	public static final int PPC_INS_VCLZB = 1226;
+	public static final int PPC_INS_VCLZD = 1227;
+	public static final int PPC_INS_VCLZH = 1228;
+	public static final int PPC_INS_VCLZLSBB = 1229;
+	public static final int PPC_INS_VCLZW = 1230;
+	public static final int PPC_INS_VCMPBFP = 1231;
+	public static final int PPC_INS_VCMPEQFP = 1232;
+	public static final int PPC_INS_VCMPEQUB = 1233;
+	public static final int PPC_INS_VCMPEQUD = 1234;
+	public static final int PPC_INS_VCMPEQUH = 1235;
+	public static final int PPC_INS_VCMPEQUW = 1236;
+	public static final int PPC_INS_VCMPGEFP = 1237;
+	public static final int PPC_INS_VCMPGTFP = 1238;
+	public static final int PPC_INS_VCMPGTSB = 1239;
+	public static final int PPC_INS_VCMPGTSD = 1240;
+	public static final int PPC_INS_VCMPGTSH = 1241;
+	public static final int PPC_INS_VCMPGTSW = 1242;
+	public static final int PPC_INS_VCMPGTUB = 1243;
+	public static final int PPC_INS_VCMPGTUD = 1244;
+	public static final int PPC_INS_VCMPGTUH = 1245;
+	public static final int PPC_INS_VCMPGTUW = 1246;
+	public static final int PPC_INS_VCMPNEB = 1247;
+	public static final int PPC_INS_VCMPNEH = 1248;
+	public static final int PPC_INS_VCMPNEW = 1249;
+	public static final int PPC_INS_VCMPNEZB = 1250;
+	public static final int PPC_INS_VCMPNEZH = 1251;
+	public static final int PPC_INS_VCMPNEZW = 1252;
+	public static final int PPC_INS_VCTSXS = 1253;
+	public static final int PPC_INS_VCTUXS = 1254;
+	public static final int PPC_INS_VCTZB = 1255;
+	public static final int PPC_INS_VCTZD = 1256;
+	public static final int PPC_INS_VCTZH = 1257;
+	public static final int PPC_INS_VCTZLSBB = 1258;
+	public static final int PPC_INS_VCTZW = 1259;
+	public static final int PPC_INS_VEQV = 1260;
+	public static final int PPC_INS_VEXPTEFP = 1261;
+	public static final int PPC_INS_VEXTRACTD = 1262;
+	public static final int PPC_INS_VEXTRACTUB = 1263;
+	public static final int PPC_INS_VEXTRACTUH = 1264;
+	public static final int PPC_INS_VEXTRACTUW = 1265;
+	public static final int PPC_INS_VEXTSB2D = 1266;
+	public static final int PPC_INS_VEXTSB2W = 1267;
+	public static final int PPC_INS_VEXTSH2D = 1268;
+	public static final int PPC_INS_VEXTSH2W = 1269;
+	public static final int PPC_INS_VEXTSW2D = 1270;
+	public static final int PPC_INS_VEXTUBLX = 1271;
+	public static final int PPC_INS_VEXTUBRX = 1272;
+	public static final int PPC_INS_VEXTUHLX = 1273;
+	public static final int PPC_INS_VEXTUHRX = 1274;
+	public static final int PPC_INS_VEXTUWLX = 1275;
+	public static final int PPC_INS_VEXTUWRX = 1276;
+	public static final int PPC_INS_VGBBD = 1277;
+	public static final int PPC_INS_VINSERTB = 1278;
+	public static final int PPC_INS_VINSERTD = 1279;
+	public static final int PPC_INS_VINSERTH = 1280;
+	public static final int PPC_INS_VINSERTW = 1281;
+	public static final int PPC_INS_VLOGEFP = 1282;
+	public static final int PPC_INS_VMADDFP = 1283;
+	public static final int PPC_INS_VMAXFP = 1284;
+	public static final int PPC_INS_VMAXSB = 1285;
+	public static final int PPC_INS_VMAXSD = 1286;
+	public static final int PPC_INS_VMAXSH = 1287;
+	public static final int PPC_INS_VMAXSW = 1288;
+	public static final int PPC_INS_VMAXUB = 1289;
+	public static final int PPC_INS_VMAXUD = 1290;
+	public static final int PPC_INS_VMAXUH = 1291;
+	public static final int PPC_INS_VMAXUW = 1292;
+	public static final int PPC_INS_VMHADDSHS = 1293;
+	public static final int PPC_INS_VMHRADDSHS = 1294;
+	public static final int PPC_INS_VMINFP = 1295;
+	public static final int PPC_INS_VMINSB = 1296;
+	public static final int PPC_INS_VMINSD = 1297;
+	public static final int PPC_INS_VMINSH = 1298;
+	public static final int PPC_INS_VMINSW = 1299;
+	public static final int PPC_INS_VMINUB = 1300;
+	public static final int PPC_INS_VMINUD = 1301;
+	public static final int PPC_INS_VMINUH = 1302;
+	public static final int PPC_INS_VMINUW = 1303;
+	public static final int PPC_INS_VMLADDUHM = 1304;
+	public static final int PPC_INS_VMR = 1305;
+	public static final int PPC_INS_VMRGEW = 1306;
+	public static final int PPC_INS_VMRGHB = 1307;
+	public static final int PPC_INS_VMRGHH = 1308;
+	public static final int PPC_INS_VMRGHW = 1309;
+	public static final int PPC_INS_VMRGLB = 1310;
+	public static final int PPC_INS_VMRGLH = 1311;
+	public static final int PPC_INS_VMRGLW = 1312;
+	public static final int PPC_INS_VMRGOW = 1313;
+	public static final int PPC_INS_VMSUMMBM = 1314;
+	public static final int PPC_INS_VMSUMSHM = 1315;
+	public static final int PPC_INS_VMSUMSHS = 1316;
+	public static final int PPC_INS_VMSUMUBM = 1317;
+	public static final int PPC_INS_VMSUMUHM = 1318;
+	public static final int PPC_INS_VMSUMUHS = 1319;
+	public static final int PPC_INS_VMUL10CUQ = 1320;
+	public static final int PPC_INS_VMUL10ECUQ = 1321;
+	public static final int PPC_INS_VMUL10EUQ = 1322;
+	public static final int PPC_INS_VMUL10UQ = 1323;
+	public static final int PPC_INS_VMULESB = 1324;
+	public static final int PPC_INS_VMULESH = 1325;
+	public static final int PPC_INS_VMULESW = 1326;
+	public static final int PPC_INS_VMULEUB = 1327;
+	public static final int PPC_INS_VMULEUH = 1328;
+	public static final int PPC_INS_VMULEUW = 1329;
+	public static final int PPC_INS_VMULOSB = 1330;
+	public static final int PPC_INS_VMULOSH = 1331;
+	public static final int PPC_INS_VMULOSW = 1332;
+	public static final int PPC_INS_VMULOUB = 1333;
+	public static final int PPC_INS_VMULOUH = 1334;
+	public static final int PPC_INS_VMULOUW = 1335;
+	public static final int PPC_INS_VMULUWM = 1336;
+	public static final int PPC_INS_VNAND = 1337;
+	public static final int PPC_INS_VNCIPHER = 1338;
+	public static final int PPC_INS_VNCIPHERLAST = 1339;
+	public static final int PPC_INS_VNEGD = 1340;
+	public static final int PPC_INS_VNEGW = 1341;
+	public static final int PPC_INS_VNMSUBFP = 1342;
+	public static final int PPC_INS_VNOR = 1343;
+	public static final int PPC_INS_VNOT = 1344;
+	public static final int PPC_INS_VOR = 1345;
+	public static final int PPC_INS_VORC = 1346;
+	public static final int PPC_INS_VPERM = 1347;
+	public static final int PPC_INS_VPERMR = 1348;
+	public static final int PPC_INS_VPERMXOR = 1349;
+	public static final int PPC_INS_VPKPX = 1350;
+	public static final int PPC_INS_VPKSDSS = 1351;
+	public static final int PPC_INS_VPKSDUS = 1352;
+	public static final int PPC_INS_VPKSHSS = 1353;
+	public static final int PPC_INS_VPKSHUS = 1354;
+	public static final int PPC_INS_VPKSWSS = 1355;
+	public static final int PPC_INS_VPKSWUS = 1356;
+	public static final int PPC_INS_VPKUDUM = 1357;
+	public static final int PPC_INS_VPKUDUS = 1358;
+	public static final int PPC_INS_VPKUHUM = 1359;
+	public static final int PPC_INS_VPKUHUS = 1360;
+	public static final int PPC_INS_VPKUWUM = 1361;
+	public static final int PPC_INS_VPKUWUS = 1362;
+	public static final int PPC_INS_VPMSUMB = 1363;
+	public static final int PPC_INS_VPMSUMD = 1364;
+	public static final int PPC_INS_VPMSUMH = 1365;
+	public static final int PPC_INS_VPMSUMW = 1366;
+	public static final int PPC_INS_VPOPCNTB = 1367;
+	public static final int PPC_INS_VPOPCNTD = 1368;
+	public static final int PPC_INS_VPOPCNTH = 1369;
+	public static final int PPC_INS_VPOPCNTW = 1370;
+	public static final int PPC_INS_VPRTYBD = 1371;
+	public static final int PPC_INS_VPRTYBQ = 1372;
+	public static final int PPC_INS_VPRTYBW = 1373;
+	public static final int PPC_INS_VREFP = 1374;
+	public static final int PPC_INS_VRFIM = 1375;
+	public static final int PPC_INS_VRFIN = 1376;
+	public static final int PPC_INS_VRFIP = 1377;
+	public static final int PPC_INS_VRFIZ = 1378;
+	public static final int PPC_INS_VRLB = 1379;
+	public static final int PPC_INS_VRLD = 1380;
+	public static final int PPC_INS_VRLDMI = 1381;
+	public static final int PPC_INS_VRLDNM = 1382;
+	public static final int PPC_INS_VRLH = 1383;
+	public static final int PPC_INS_VRLW = 1384;
+	public static final int PPC_INS_VRLWMI = 1385;
+	public static final int PPC_INS_VRLWNM = 1386;
+	public static final int PPC_INS_VRSQRTEFP = 1387;
+	public static final int PPC_INS_VSBOX = 1388;
+	public static final int PPC_INS_VSEL = 1389;
+	public static final int PPC_INS_VSHASIGMAD = 1390;
+	public static final int PPC_INS_VSHASIGMAW = 1391;
+	public static final int PPC_INS_VSL = 1392;
+	public static final int PPC_INS_VSLB = 1393;
+	public static final int PPC_INS_VSLD = 1394;
+	public static final int PPC_INS_VSLDOI = 1395;
+	public static final int PPC_INS_VSLH = 1396;
+	public static final int PPC_INS_VSLO = 1397;
+	public static final int PPC_INS_VSLV = 1398;
+	public static final int PPC_INS_VSLW = 1399;
+	public static final int PPC_INS_VSPLTB = 1400;
+	public static final int PPC_INS_VSPLTH = 1401;
+	public static final int PPC_INS_VSPLTISB = 1402;
+	public static final int PPC_INS_VSPLTISH = 1403;
+	public static final int PPC_INS_VSPLTISW = 1404;
+	public static final int PPC_INS_VSPLTW = 1405;
+	public static final int PPC_INS_VSR = 1406;
+	public static final int PPC_INS_VSRAB = 1407;
+	public static final int PPC_INS_VSRAD = 1408;
+	public static final int PPC_INS_VSRAH = 1409;
+	public static final int PPC_INS_VSRAW = 1410;
+	public static final int PPC_INS_VSRB = 1411;
+	public static final int PPC_INS_VSRD = 1412;
+	public static final int PPC_INS_VSRH = 1413;
+	public static final int PPC_INS_VSRO = 1414;
+	public static final int PPC_INS_VSRV = 1415;
+	public static final int PPC_INS_VSRW = 1416;
+	public static final int PPC_INS_VSUBCUQ = 1417;
+	public static final int PPC_INS_VSUBCUW = 1418;
+	public static final int PPC_INS_VSUBECUQ = 1419;
+	public static final int PPC_INS_VSUBEUQM = 1420;
+	public static final int PPC_INS_VSUBFP = 1421;
+	public static final int PPC_INS_VSUBSBS = 1422;
+	public static final int PPC_INS_VSUBSHS = 1423;
+	public static final int PPC_INS_VSUBSWS = 1424;
+	public static final int PPC_INS_VSUBUBM = 1425;
+	public static final int PPC_INS_VSUBUBS = 1426;
+	public static final int PPC_INS_VSUBUDM = 1427;
+	public static final int PPC_INS_VSUBUHM = 1428;
+	public static final int PPC_INS_VSUBUHS = 1429;
+	public static final int PPC_INS_VSUBUQM = 1430;
+	public static final int PPC_INS_VSUBUWM = 1431;
+	public static final int PPC_INS_VSUBUWS = 1432;
+	public static final int PPC_INS_VSUM2SWS = 1433;
+	public static final int PPC_INS_VSUM4SBS = 1434;
+	public static final int PPC_INS_VSUM4SHS = 1435;
+	public static final int PPC_INS_VSUM4UBS = 1436;
+	public static final int PPC_INS_VSUMSWS = 1437;
+	public static final int PPC_INS_VUPKHPX = 1438;
+	public static final int PPC_INS_VUPKHSB = 1439;
+	public static final int PPC_INS_VUPKHSH = 1440;
+	public static final int PPC_INS_VUPKHSW = 1441;
+	public static final int PPC_INS_VUPKLPX = 1442;
+	public static final int PPC_INS_VUPKLSB = 1443;
+	public static final int PPC_INS_VUPKLSH = 1444;
+	public static final int PPC_INS_VUPKLSW = 1445;
+	public static final int PPC_INS_VXOR = 1446;
+	public static final int PPC_INS_WAIT = 1447;
+	public static final int PPC_INS_WAITIMPL = 1448;
+	public static final int PPC_INS_WAITRSV = 1449;
+	public static final int PPC_INS_WRTEE = 1450;
+	public static final int PPC_INS_WRTEEI = 1451;
+	public static final int PPC_INS_XNOP = 1452;
+	public static final int PPC_INS_XOR = 1453;
+	public static final int PPC_INS_XORI = 1454;
+	public static final int PPC_INS_XORIS = 1455;
+	public static final int PPC_INS_XSABSDP = 1456;
+	public static final int PPC_INS_XSABSQP = 1457;
+	public static final int PPC_INS_XSADDDP = 1458;
+	public static final int PPC_INS_XSADDQP = 1459;
+	public static final int PPC_INS_XSADDQPO = 1460;
+	public static final int PPC_INS_XSADDSP = 1461;
+	public static final int PPC_INS_XSCMPEQDP = 1462;
+	public static final int PPC_INS_XSCMPEXPDP = 1463;
+	public static final int PPC_INS_XSCMPEXPQP = 1464;
+	public static final int PPC_INS_XSCMPGEDP = 1465;
+	public static final int PPC_INS_XSCMPGTDP = 1466;
+	public static final int PPC_INS_XSCMPODP = 1467;
+	public static final int PPC_INS_XSCMPOQP = 1468;
+	public static final int PPC_INS_XSCMPUDP = 1469;
+	public static final int PPC_INS_XSCMPUQP = 1470;
+	public static final int PPC_INS_XSCPSGNDP = 1471;
+	public static final int PPC_INS_XSCPSGNQP = 1472;
+	public static final int PPC_INS_XSCVDPHP = 1473;
+	public static final int PPC_INS_XSCVDPQP = 1474;
+	public static final int PPC_INS_XSCVDPSP = 1475;
+	public static final int PPC_INS_XSCVDPSPN = 1476;
+	public static final int PPC_INS_XSCVDPSXDS = 1477;
+	public static final int PPC_INS_XSCVDPSXWS = 1478;
+	public static final int PPC_INS_XSCVDPUXDS = 1479;
+	public static final int PPC_INS_XSCVDPUXWS = 1480;
+	public static final int PPC_INS_XSCVHPDP = 1481;
+	public static final int PPC_INS_XSCVQPDP = 1482;
+	public static final int PPC_INS_XSCVQPDPO = 1483;
+	public static final int PPC_INS_XSCVQPSDZ = 1484;
+	public static final int PPC_INS_XSCVQPSWZ = 1485;
+	public static final int PPC_INS_XSCVQPUDZ = 1486;
+	public static final int PPC_INS_XSCVQPUWZ = 1487;
+	public static final int PPC_INS_XSCVSDQP = 1488;
+	public static final int PPC_INS_XSCVSPDP = 1489;
+	public static final int PPC_INS_XSCVSPDPN = 1490;
+	public static final int PPC_INS_XSCVSXDDP = 1491;
+	public static final int PPC_INS_XSCVSXDSP = 1492;
+	public static final int PPC_INS_XSCVUDQP = 1493;
+	public static final int PPC_INS_XSCVUXDDP = 1494;
+	public static final int PPC_INS_XSCVUXDSP = 1495;
+	public static final int PPC_INS_XSDIVDP = 1496;
+	public static final int PPC_INS_XSDIVQP = 1497;
+	public static final int PPC_INS_XSDIVQPO = 1498;
+	public static final int PPC_INS_XSDIVSP = 1499;
+	public static final int PPC_INS_XSIEXPDP = 1500;
+	public static final int PPC_INS_XSIEXPQP = 1501;
+	public static final int PPC_INS_XSMADDADP = 1502;
+	public static final int PPC_INS_XSMADDASP = 1503;
+	public static final int PPC_INS_XSMADDMDP = 1504;
+	public static final int PPC_INS_XSMADDMSP = 1505;
+	public static final int PPC_INS_XSMADDQP = 1506;
+	public static final int PPC_INS_XSMADDQPO = 1507;
+	public static final int PPC_INS_XSMAXCDP = 1508;
+	public static final int PPC_INS_XSMAXDP = 1509;
+	public static final int PPC_INS_XSMAXJDP = 1510;
+	public static final int PPC_INS_XSMINCDP = 1511;
+	public static final int PPC_INS_XSMINDP = 1512;
+	public static final int PPC_INS_XSMINJDP = 1513;
+	public static final int PPC_INS_XSMSUBADP = 1514;
+	public static final int PPC_INS_XSMSUBASP = 1515;
+	public static final int PPC_INS_XSMSUBMDP = 1516;
+	public static final int PPC_INS_XSMSUBMSP = 1517;
+	public static final int PPC_INS_XSMSUBQP = 1518;
+	public static final int PPC_INS_XSMSUBQPO = 1519;
+	public static final int PPC_INS_XSMULDP = 1520;
+	public static final int PPC_INS_XSMULQP = 1521;
+	public static final int PPC_INS_XSMULQPO = 1522;
+	public static final int PPC_INS_XSMULSP = 1523;
+	public static final int PPC_INS_XSNABSDP = 1524;
+	public static final int PPC_INS_XSNABSQP = 1525;
+	public static final int PPC_INS_XSNEGDP = 1526;
+	public static final int PPC_INS_XSNEGQP = 1527;
+	public static final int PPC_INS_XSNMADDADP = 1528;
+	public static final int PPC_INS_XSNMADDASP = 1529;
+	public static final int PPC_INS_XSNMADDMDP = 1530;
+	public static final int PPC_INS_XSNMADDMSP = 1531;
+	public static final int PPC_INS_XSNMADDQP = 1532;
+	public static final int PPC_INS_XSNMADDQPO = 1533;
+	public static final int PPC_INS_XSNMSUBADP = 1534;
+	public static final int PPC_INS_XSNMSUBASP = 1535;
+	public static final int PPC_INS_XSNMSUBMDP = 1536;
+	public static final int PPC_INS_XSNMSUBMSP = 1537;
+	public static final int PPC_INS_XSNMSUBQP = 1538;
+	public static final int PPC_INS_XSNMSUBQPO = 1539;
+	public static final int PPC_INS_XSRDPI = 1540;
+	public static final int PPC_INS_XSRDPIC = 1541;
+	public static final int PPC_INS_XSRDPIM = 1542;
+	public static final int PPC_INS_XSRDPIP = 1543;
+	public static final int PPC_INS_XSRDPIZ = 1544;
+	public static final int PPC_INS_XSREDP = 1545;
+	public static final int PPC_INS_XSRESP = 1546;
+	public static final int PPC_INS_XSRQPI = 1547;
+	public static final int PPC_INS_XSRQPIX = 1548;
+	public static final int PPC_INS_XSRQPXP = 1549;
+	public static final int PPC_INS_XSRSP = 1550;
+	public static final int PPC_INS_XSRSQRTEDP = 1551;
+	public static final int PPC_INS_XSRSQRTESP = 1552;
+	public static final int PPC_INS_XSSQRTDP = 1553;
+	public static final int PPC_INS_XSSQRTQP = 1554;
+	public static final int PPC_INS_XSSQRTQPO = 1555;
+	public static final int PPC_INS_XSSQRTSP = 1556;
+	public static final int PPC_INS_XSSUBDP = 1557;
+	public static final int PPC_INS_XSSUBQP = 1558;
+	public static final int PPC_INS_XSSUBQPO = 1559;
+	public static final int PPC_INS_XSSUBSP = 1560;
+	public static final int PPC_INS_XSTDIVDP = 1561;
+	public static final int PPC_INS_XSTSQRTDP = 1562;
+	public static final int PPC_INS_XSTSTDCDP = 1563;
+	public static final int PPC_INS_XSTSTDCQP = 1564;
+	public static final int PPC_INS_XSTSTDCSP = 1565;
+	public static final int PPC_INS_XSXEXPDP = 1566;
+	public static final int PPC_INS_XSXEXPQP = 1567;
+	public static final int PPC_INS_XSXSIGDP = 1568;
+	public static final int PPC_INS_XSXSIGQP = 1569;
+	public static final int PPC_INS_XVABSDP = 1570;
+	public static final int PPC_INS_XVABSSP = 1571;
+	public static final int PPC_INS_XVADDDP = 1572;
+	public static final int PPC_INS_XVADDSP = 1573;
+	public static final int PPC_INS_XVCMPEQDP = 1574;
+	public static final int PPC_INS_XVCMPEQSP = 1575;
+	public static final int PPC_INS_XVCMPGEDP = 1576;
+	public static final int PPC_INS_XVCMPGESP = 1577;
+	public static final int PPC_INS_XVCMPGTDP = 1578;
+	public static final int PPC_INS_XVCMPGTSP = 1579;
+	public static final int PPC_INS_XVCPSGNDP = 1580;
+	public static final int PPC_INS_XVCPSGNSP = 1581;
+	public static final int PPC_INS_XVCVDPSP = 1582;
+	public static final int PPC_INS_XVCVDPSXDS = 1583;
+	public static final int PPC_INS_XVCVDPSXWS = 1584;
+	public static final int PPC_INS_XVCVDPUXDS = 1585;
+	public static final int PPC_INS_XVCVDPUXWS = 1586;
+	public static final int PPC_INS_XVCVHPSP = 1587;
+	public static final int PPC_INS_XVCVSPDP = 1588;
+	public static final int PPC_INS_XVCVSPHP = 1589;
+	public static final int PPC_INS_XVCVSPSXDS = 1590;
+	public static final int PPC_INS_XVCVSPSXWS = 1591;
+	public static final int PPC_INS_XVCVSPUXDS = 1592;
+	public static final int PPC_INS_XVCVSPUXWS = 1593;
+	public static final int PPC_INS_XVCVSXDDP = 1594;
+	public static final int PPC_INS_XVCVSXDSP = 1595;
+	public static final int PPC_INS_XVCVSXWDP = 1596;
+	public static final int PPC_INS_XVCVSXWSP = 1597;
+	public static final int PPC_INS_XVCVUXDDP = 1598;
+	public static final int PPC_INS_XVCVUXDSP = 1599;
+	public static final int PPC_INS_XVCVUXWDP = 1600;
+	public static final int PPC_INS_XVCVUXWSP = 1601;
+	public static final int PPC_INS_XVDIVDP = 1602;
+	public static final int PPC_INS_XVDIVSP = 1603;
+	public static final int PPC_INS_XVIEXPDP = 1604;
+	public static final int PPC_INS_XVIEXPSP = 1605;
+	public static final int PPC_INS_XVMADDADP = 1606;
+	public static final int PPC_INS_XVMADDASP = 1607;
+	public static final int PPC_INS_XVMADDMDP = 1608;
+	public static final int PPC_INS_XVMADDMSP = 1609;
+	public static final int PPC_INS_XVMAXDP = 1610;
+	public static final int PPC_INS_XVMAXSP = 1611;
+	public static final int PPC_INS_XVMINDP = 1612;
+	public static final int PPC_INS_XVMINSP = 1613;
+	public static final int PPC_INS_XVMOVDP = 1614;
+	public static final int PPC_INS_XVMOVSP = 1615;
+	public static final int PPC_INS_XVMSUBADP = 1616;
+	public static final int PPC_INS_XVMSUBASP = 1617;
+	public static final int PPC_INS_XVMSUBMDP = 1618;
+	public static final int PPC_INS_XVMSUBMSP = 1619;
+	public static final int PPC_INS_XVMULDP = 1620;
+	public static final int PPC_INS_XVMULSP = 1621;
+	public static final int PPC_INS_XVNABSDP = 1622;
+	public static final int PPC_INS_XVNABSSP = 1623;
+	public static final int PPC_INS_XVNEGDP = 1624;
+	public static final int PPC_INS_XVNEGSP = 1625;
+	public static final int PPC_INS_XVNMADDADP = 1626;
+	public static final int PPC_INS_XVNMADDASP = 1627;
+	public static final int PPC_INS_XVNMADDMDP = 1628;
+	public static final int PPC_INS_XVNMADDMSP = 1629;
+	public static final int PPC_INS_XVNMSUBADP = 1630;
+	public static final int PPC_INS_XVNMSUBASP = 1631;
+	public static final int PPC_INS_XVNMSUBMDP = 1632;
+	public static final int PPC_INS_XVNMSUBMSP = 1633;
+	public static final int PPC_INS_XVRDPI = 1634;
+	public static final int PPC_INS_XVRDPIC = 1635;
+	public static final int PPC_INS_XVRDPIM = 1636;
+	public static final int PPC_INS_XVRDPIP = 1637;
+	public static final int PPC_INS_XVRDPIZ = 1638;
+	public static final int PPC_INS_XVREDP = 1639;
+	public static final int PPC_INS_XVRESP = 1640;
+	public static final int PPC_INS_XVRSPI = 1641;
+	public static final int PPC_INS_XVRSPIC = 1642;
+	public static final int PPC_INS_XVRSPIM = 1643;
+	public static final int PPC_INS_XVRSPIP = 1644;
+	public static final int PPC_INS_XVRSPIZ = 1645;
+	public static final int PPC_INS_XVRSQRTEDP = 1646;
+	public static final int PPC_INS_XVRSQRTESP = 1647;
+	public static final int PPC_INS_XVSQRTDP = 1648;
+	public static final int PPC_INS_XVSQRTSP = 1649;
+	public static final int PPC_INS_XVSUBDP = 1650;
+	public static final int PPC_INS_XVSUBSP = 1651;
+	public static final int PPC_INS_XVTDIVDP = 1652;
+	public static final int PPC_INS_XVTDIVSP = 1653;
+	public static final int PPC_INS_XVTSQRTDP = 1654;
+	public static final int PPC_INS_XVTSQRTSP = 1655;
+	public static final int PPC_INS_XVTSTDCDP = 1656;
+	public static final int PPC_INS_XVTSTDCSP = 1657;
+	public static final int PPC_INS_XVXEXPDP = 1658;
+	public static final int PPC_INS_XVXEXPSP = 1659;
+	public static final int PPC_INS_XVXSIGDP = 1660;
+	public static final int PPC_INS_XVXSIGSP = 1661;
+	public static final int PPC_INS_XXBRD = 1662;
+	public static final int PPC_INS_XXBRH = 1663;
+	public static final int PPC_INS_XXBRQ = 1664;
+	public static final int PPC_INS_XXBRW = 1665;
+	public static final int PPC_INS_XXEXTRACTUW = 1666;
+	public static final int PPC_INS_XXINSERTW = 1667;
+	public static final int PPC_INS_XXLAND = 1668;
+	public static final int PPC_INS_XXLANDC = 1669;
+	public static final int PPC_INS_XXLEQV = 1670;
+	public static final int PPC_INS_XXLNAND = 1671;
+	public static final int PPC_INS_XXLNOR = 1672;
+	public static final int PPC_INS_XXLOR = 1673;
+	public static final int PPC_INS_XXLORC = 1674;
+	public static final int PPC_INS_XXLXOR = 1675;
+	public static final int PPC_INS_XXMRGHD = 1676;
+	public static final int PPC_INS_XXMRGHW = 1677;
+	public static final int PPC_INS_XXMRGLD = 1678;
+	public static final int PPC_INS_XXMRGLW = 1679;
+	public static final int PPC_INS_XXPERM = 1680;
+	public static final int PPC_INS_XXPERMDI = 1681;
+	public static final int PPC_INS_XXPERMR = 1682;
+	public static final int PPC_INS_XXSEL = 1683;
+	public static final int PPC_INS_XXSLDWI = 1684;
+	public static final int PPC_INS_XXSPLTD = 1685;
+	public static final int PPC_INS_XXSPLTIB = 1686;
+	public static final int PPC_INS_XXSPLTW = 1687;
+	public static final int PPC_INS_XXSWAPD = 1688;
+	public static final int PPC_INS_ENDING = 1689;
+
+	public static final int PPC_GRP_INVALID = 0;
+	public static final int PPC_GRP_JUMP = 1;
+	public static final int PPC_GRP_ALTIVEC = 128;
+	public static final int PPC_GRP_MODE32 = 129;
+	public static final int PPC_GRP_MODE64 = 130;
+	public static final int PPC_GRP_BOOKE = 131;
+	public static final int PPC_GRP_NOTBOOKE = 132;
+	public static final int PPC_GRP_SPE = 133;
+	public static final int PPC_GRP_VSX = 134;
+	public static final int PPC_GRP_E500 = 135;
+	public static final int PPC_GRP_PPC4XX = 136;
+	public static final int PPC_GRP_PPC6XX = 137;
+	public static final int PPC_GRP_ICBT = 138;
+	public static final int PPC_GRP_P8ALTIVEC = 139;
+	public static final int PPC_GRP_P8VECTOR = 140;
+	public static final int PPC_GRP_QPX = 141;
+	public static final int PPC_GRP_ENDING = 142;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Sparc.java b/capstone/bindings/java/capstone/Sparc.java
new file mode 100644
index 000000000..9a8ca32d1
--- /dev/null
+++ b/capstone/bindings/java/capstone/Sparc.java
@@ -0,0 +1,92 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Sparc_const.*;
+
+public class Sparc {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public int disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == SPARC_OP_MEM)
+        value.setType(MemType.class);
+      if (type == SPARC_OP_IMM || type == SPARC_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == SPARC_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public int hint;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[4];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("hint");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "hint", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+    public int hint;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      hint = op_info.hint;
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Sparc_const.java b/capstone/bindings/java/capstone/Sparc_const.java
new file mode 100644
index 000000000..31bd2c679
--- /dev/null
+++ b/capstone/bindings/java/capstone/Sparc_const.java
@@ -0,0 +1,433 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Sparc_const {
+
+	public static final int SPARC_CC_INVALID = 0;
+	public static final int SPARC_CC_ICC_A = 8+256;
+	public static final int SPARC_CC_ICC_N = 0+256;
+	public static final int SPARC_CC_ICC_NE = 9+256;
+	public static final int SPARC_CC_ICC_E = 1+256;
+	public static final int SPARC_CC_ICC_G = 10+256;
+	public static final int SPARC_CC_ICC_LE = 2+256;
+	public static final int SPARC_CC_ICC_GE = 11+256;
+	public static final int SPARC_CC_ICC_L = 3+256;
+	public static final int SPARC_CC_ICC_GU = 12+256;
+	public static final int SPARC_CC_ICC_LEU = 4+256;
+	public static final int SPARC_CC_ICC_CC = 13+256;
+	public static final int SPARC_CC_ICC_CS = 5+256;
+	public static final int SPARC_CC_ICC_POS = 14+256;
+	public static final int SPARC_CC_ICC_NEG = 6+256;
+	public static final int SPARC_CC_ICC_VC = 15+256;
+	public static final int SPARC_CC_ICC_VS = 7+256;
+	public static final int SPARC_CC_FCC_A = 8+16+256;
+	public static final int SPARC_CC_FCC_N = 0+16+256;
+	public static final int SPARC_CC_FCC_U = 7+16+256;
+	public static final int SPARC_CC_FCC_G = 6+16+256;
+	public static final int SPARC_CC_FCC_UG = 5+16+256;
+	public static final int SPARC_CC_FCC_L = 4+16+256;
+	public static final int SPARC_CC_FCC_UL = 3+16+256;
+	public static final int SPARC_CC_FCC_LG = 2+16+256;
+	public static final int SPARC_CC_FCC_NE = 1+16+256;
+	public static final int SPARC_CC_FCC_E = 9+16+256;
+	public static final int SPARC_CC_FCC_UE = 10+16+256;
+	public static final int SPARC_CC_FCC_GE = 11+16+256;
+	public static final int SPARC_CC_FCC_UGE = 12+16+256;
+	public static final int SPARC_CC_FCC_LE = 13+16+256;
+	public static final int SPARC_CC_FCC_ULE = 14+16+256;
+	public static final int SPARC_CC_FCC_O = 15+16+256;
+
+	public static final int SPARC_HINT_INVALID = 0;
+	public static final int SPARC_HINT_A = 1<<0;
+	public static final int SPARC_HINT_PT = 1<<1;
+	public static final int SPARC_HINT_PN = 1<<2;
+
+	public static final int SPARC_OP_INVALID = 0;
+	public static final int SPARC_OP_REG = 1;
+	public static final int SPARC_OP_IMM = 2;
+	public static final int SPARC_OP_MEM = 3;
+
+	public static final int SPARC_REG_INVALID = 0;
+	public static final int SPARC_REG_F0 = 1;
+	public static final int SPARC_REG_F1 = 2;
+	public static final int SPARC_REG_F2 = 3;
+	public static final int SPARC_REG_F3 = 4;
+	public static final int SPARC_REG_F4 = 5;
+	public static final int SPARC_REG_F5 = 6;
+	public static final int SPARC_REG_F6 = 7;
+	public static final int SPARC_REG_F7 = 8;
+	public static final int SPARC_REG_F8 = 9;
+	public static final int SPARC_REG_F9 = 10;
+	public static final int SPARC_REG_F10 = 11;
+	public static final int SPARC_REG_F11 = 12;
+	public static final int SPARC_REG_F12 = 13;
+	public static final int SPARC_REG_F13 = 14;
+	public static final int SPARC_REG_F14 = 15;
+	public static final int SPARC_REG_F15 = 16;
+	public static final int SPARC_REG_F16 = 17;
+	public static final int SPARC_REG_F17 = 18;
+	public static final int SPARC_REG_F18 = 19;
+	public static final int SPARC_REG_F19 = 20;
+	public static final int SPARC_REG_F20 = 21;
+	public static final int SPARC_REG_F21 = 22;
+	public static final int SPARC_REG_F22 = 23;
+	public static final int SPARC_REG_F23 = 24;
+	public static final int SPARC_REG_F24 = 25;
+	public static final int SPARC_REG_F25 = 26;
+	public static final int SPARC_REG_F26 = 27;
+	public static final int SPARC_REG_F27 = 28;
+	public static final int SPARC_REG_F28 = 29;
+	public static final int SPARC_REG_F29 = 30;
+	public static final int SPARC_REG_F30 = 31;
+	public static final int SPARC_REG_F31 = 32;
+	public static final int SPARC_REG_F32 = 33;
+	public static final int SPARC_REG_F34 = 34;
+	public static final int SPARC_REG_F36 = 35;
+	public static final int SPARC_REG_F38 = 36;
+	public static final int SPARC_REG_F40 = 37;
+	public static final int SPARC_REG_F42 = 38;
+	public static final int SPARC_REG_F44 = 39;
+	public static final int SPARC_REG_F46 = 40;
+	public static final int SPARC_REG_F48 = 41;
+	public static final int SPARC_REG_F50 = 42;
+	public static final int SPARC_REG_F52 = 43;
+	public static final int SPARC_REG_F54 = 44;
+	public static final int SPARC_REG_F56 = 45;
+	public static final int SPARC_REG_F58 = 46;
+	public static final int SPARC_REG_F60 = 47;
+	public static final int SPARC_REG_F62 = 48;
+	public static final int SPARC_REG_FCC0 = 49;
+	public static final int SPARC_REG_FCC1 = 50;
+	public static final int SPARC_REG_FCC2 = 51;
+	public static final int SPARC_REG_FCC3 = 52;
+	public static final int SPARC_REG_FP = 53;
+	public static final int SPARC_REG_G0 = 54;
+	public static final int SPARC_REG_G1 = 55;
+	public static final int SPARC_REG_G2 = 56;
+	public static final int SPARC_REG_G3 = 57;
+	public static final int SPARC_REG_G4 = 58;
+	public static final int SPARC_REG_G5 = 59;
+	public static final int SPARC_REG_G6 = 60;
+	public static final int SPARC_REG_G7 = 61;
+	public static final int SPARC_REG_I0 = 62;
+	public static final int SPARC_REG_I1 = 63;
+	public static final int SPARC_REG_I2 = 64;
+	public static final int SPARC_REG_I3 = 65;
+	public static final int SPARC_REG_I4 = 66;
+	public static final int SPARC_REG_I5 = 67;
+	public static final int SPARC_REG_I7 = 68;
+	public static final int SPARC_REG_ICC = 69;
+	public static final int SPARC_REG_L0 = 70;
+	public static final int SPARC_REG_L1 = 71;
+	public static final int SPARC_REG_L2 = 72;
+	public static final int SPARC_REG_L3 = 73;
+	public static final int SPARC_REG_L4 = 74;
+	public static final int SPARC_REG_L5 = 75;
+	public static final int SPARC_REG_L6 = 76;
+	public static final int SPARC_REG_L7 = 77;
+	public static final int SPARC_REG_O0 = 78;
+	public static final int SPARC_REG_O1 = 79;
+	public static final int SPARC_REG_O2 = 80;
+	public static final int SPARC_REG_O3 = 81;
+	public static final int SPARC_REG_O4 = 82;
+	public static final int SPARC_REG_O5 = 83;
+	public static final int SPARC_REG_O7 = 84;
+	public static final int SPARC_REG_SP = 85;
+	public static final int SPARC_REG_Y = 86;
+	public static final int SPARC_REG_XCC = 87;
+	public static final int SPARC_REG_ENDING = 88;
+	public static final int SPARC_REG_O6 = SPARC_REG_SP;
+	public static final int SPARC_REG_I6 = SPARC_REG_FP;
+
+	public static final int SPARC_INS_INVALID = 0;
+	public static final int SPARC_INS_ADDCC = 1;
+	public static final int SPARC_INS_ADDX = 2;
+	public static final int SPARC_INS_ADDXCC = 3;
+	public static final int SPARC_INS_ADDXC = 4;
+	public static final int SPARC_INS_ADDXCCC = 5;
+	public static final int SPARC_INS_ADD = 6;
+	public static final int SPARC_INS_ALIGNADDR = 7;
+	public static final int SPARC_INS_ALIGNADDRL = 8;
+	public static final int SPARC_INS_ANDCC = 9;
+	public static final int SPARC_INS_ANDNCC = 10;
+	public static final int SPARC_INS_ANDN = 11;
+	public static final int SPARC_INS_AND = 12;
+	public static final int SPARC_INS_ARRAY16 = 13;
+	public static final int SPARC_INS_ARRAY32 = 14;
+	public static final int SPARC_INS_ARRAY8 = 15;
+	public static final int SPARC_INS_B = 16;
+	public static final int SPARC_INS_JMP = 17;
+	public static final int SPARC_INS_BMASK = 18;
+	public static final int SPARC_INS_FB = 19;
+	public static final int SPARC_INS_BRGEZ = 20;
+	public static final int SPARC_INS_BRGZ = 21;
+	public static final int SPARC_INS_BRLEZ = 22;
+	public static final int SPARC_INS_BRLZ = 23;
+	public static final int SPARC_INS_BRNZ = 24;
+	public static final int SPARC_INS_BRZ = 25;
+	public static final int SPARC_INS_BSHUFFLE = 26;
+	public static final int SPARC_INS_CALL = 27;
+	public static final int SPARC_INS_CASX = 28;
+	public static final int SPARC_INS_CAS = 29;
+	public static final int SPARC_INS_CMASK16 = 30;
+	public static final int SPARC_INS_CMASK32 = 31;
+	public static final int SPARC_INS_CMASK8 = 32;
+	public static final int SPARC_INS_CMP = 33;
+	public static final int SPARC_INS_EDGE16 = 34;
+	public static final int SPARC_INS_EDGE16L = 35;
+	public static final int SPARC_INS_EDGE16LN = 36;
+	public static final int SPARC_INS_EDGE16N = 37;
+	public static final int SPARC_INS_EDGE32 = 38;
+	public static final int SPARC_INS_EDGE32L = 39;
+	public static final int SPARC_INS_EDGE32LN = 40;
+	public static final int SPARC_INS_EDGE32N = 41;
+	public static final int SPARC_INS_EDGE8 = 42;
+	public static final int SPARC_INS_EDGE8L = 43;
+	public static final int SPARC_INS_EDGE8LN = 44;
+	public static final int SPARC_INS_EDGE8N = 45;
+	public static final int SPARC_INS_FABSD = 46;
+	public static final int SPARC_INS_FABSQ = 47;
+	public static final int SPARC_INS_FABSS = 48;
+	public static final int SPARC_INS_FADDD = 49;
+	public static final int SPARC_INS_FADDQ = 50;
+	public static final int SPARC_INS_FADDS = 51;
+	public static final int SPARC_INS_FALIGNDATA = 52;
+	public static final int SPARC_INS_FAND = 53;
+	public static final int SPARC_INS_FANDNOT1 = 54;
+	public static final int SPARC_INS_FANDNOT1S = 55;
+	public static final int SPARC_INS_FANDNOT2 = 56;
+	public static final int SPARC_INS_FANDNOT2S = 57;
+	public static final int SPARC_INS_FANDS = 58;
+	public static final int SPARC_INS_FCHKSM16 = 59;
+	public static final int SPARC_INS_FCMPD = 60;
+	public static final int SPARC_INS_FCMPEQ16 = 61;
+	public static final int SPARC_INS_FCMPEQ32 = 62;
+	public static final int SPARC_INS_FCMPGT16 = 63;
+	public static final int SPARC_INS_FCMPGT32 = 64;
+	public static final int SPARC_INS_FCMPLE16 = 65;
+	public static final int SPARC_INS_FCMPLE32 = 66;
+	public static final int SPARC_INS_FCMPNE16 = 67;
+	public static final int SPARC_INS_FCMPNE32 = 68;
+	public static final int SPARC_INS_FCMPQ = 69;
+	public static final int SPARC_INS_FCMPS = 70;
+	public static final int SPARC_INS_FDIVD = 71;
+	public static final int SPARC_INS_FDIVQ = 72;
+	public static final int SPARC_INS_FDIVS = 73;
+	public static final int SPARC_INS_FDMULQ = 74;
+	public static final int SPARC_INS_FDTOI = 75;
+	public static final int SPARC_INS_FDTOQ = 76;
+	public static final int SPARC_INS_FDTOS = 77;
+	public static final int SPARC_INS_FDTOX = 78;
+	public static final int SPARC_INS_FEXPAND = 79;
+	public static final int SPARC_INS_FHADDD = 80;
+	public static final int SPARC_INS_FHADDS = 81;
+	public static final int SPARC_INS_FHSUBD = 82;
+	public static final int SPARC_INS_FHSUBS = 83;
+	public static final int SPARC_INS_FITOD = 84;
+	public static final int SPARC_INS_FITOQ = 85;
+	public static final int SPARC_INS_FITOS = 86;
+	public static final int SPARC_INS_FLCMPD = 87;
+	public static final int SPARC_INS_FLCMPS = 88;
+	public static final int SPARC_INS_FLUSHW = 89;
+	public static final int SPARC_INS_FMEAN16 = 90;
+	public static final int SPARC_INS_FMOVD = 91;
+	public static final int SPARC_INS_FMOVQ = 92;
+	public static final int SPARC_INS_FMOVRDGEZ = 93;
+	public static final int SPARC_INS_FMOVRQGEZ = 94;
+	public static final int SPARC_INS_FMOVRSGEZ = 95;
+	public static final int SPARC_INS_FMOVRDGZ = 96;
+	public static final int SPARC_INS_FMOVRQGZ = 97;
+	public static final int SPARC_INS_FMOVRSGZ = 98;
+	public static final int SPARC_INS_FMOVRDLEZ = 99;
+	public static final int SPARC_INS_FMOVRQLEZ = 100;
+	public static final int SPARC_INS_FMOVRSLEZ = 101;
+	public static final int SPARC_INS_FMOVRDLZ = 102;
+	public static final int SPARC_INS_FMOVRQLZ = 103;
+	public static final int SPARC_INS_FMOVRSLZ = 104;
+	public static final int SPARC_INS_FMOVRDNZ = 105;
+	public static final int SPARC_INS_FMOVRQNZ = 106;
+	public static final int SPARC_INS_FMOVRSNZ = 107;
+	public static final int SPARC_INS_FMOVRDZ = 108;
+	public static final int SPARC_INS_FMOVRQZ = 109;
+	public static final int SPARC_INS_FMOVRSZ = 110;
+	public static final int SPARC_INS_FMOVS = 111;
+	public static final int SPARC_INS_FMUL8SUX16 = 112;
+	public static final int SPARC_INS_FMUL8ULX16 = 113;
+	public static final int SPARC_INS_FMUL8X16 = 114;
+	public static final int SPARC_INS_FMUL8X16AL = 115;
+	public static final int SPARC_INS_FMUL8X16AU = 116;
+	public static final int SPARC_INS_FMULD = 117;
+	public static final int SPARC_INS_FMULD8SUX16 = 118;
+	public static final int SPARC_INS_FMULD8ULX16 = 119;
+	public static final int SPARC_INS_FMULQ = 120;
+	public static final int SPARC_INS_FMULS = 121;
+	public static final int SPARC_INS_FNADDD = 122;
+	public static final int SPARC_INS_FNADDS = 123;
+	public static final int SPARC_INS_FNAND = 124;
+	public static final int SPARC_INS_FNANDS = 125;
+	public static final int SPARC_INS_FNEGD = 126;
+	public static final int SPARC_INS_FNEGQ = 127;
+	public static final int SPARC_INS_FNEGS = 128;
+	public static final int SPARC_INS_FNHADDD = 129;
+	public static final int SPARC_INS_FNHADDS = 130;
+	public static final int SPARC_INS_FNOR = 131;
+	public static final int SPARC_INS_FNORS = 132;
+	public static final int SPARC_INS_FNOT1 = 133;
+	public static final int SPARC_INS_FNOT1S = 134;
+	public static final int SPARC_INS_FNOT2 = 135;
+	public static final int SPARC_INS_FNOT2S = 136;
+	public static final int SPARC_INS_FONE = 137;
+	public static final int SPARC_INS_FONES = 138;
+	public static final int SPARC_INS_FOR = 139;
+	public static final int SPARC_INS_FORNOT1 = 140;
+	public static final int SPARC_INS_FORNOT1S = 141;
+	public static final int SPARC_INS_FORNOT2 = 142;
+	public static final int SPARC_INS_FORNOT2S = 143;
+	public static final int SPARC_INS_FORS = 144;
+	public static final int SPARC_INS_FPACK16 = 145;
+	public static final int SPARC_INS_FPACK32 = 146;
+	public static final int SPARC_INS_FPACKFIX = 147;
+	public static final int SPARC_INS_FPADD16 = 148;
+	public static final int SPARC_INS_FPADD16S = 149;
+	public static final int SPARC_INS_FPADD32 = 150;
+	public static final int SPARC_INS_FPADD32S = 151;
+	public static final int SPARC_INS_FPADD64 = 152;
+	public static final int SPARC_INS_FPMERGE = 153;
+	public static final int SPARC_INS_FPSUB16 = 154;
+	public static final int SPARC_INS_FPSUB16S = 155;
+	public static final int SPARC_INS_FPSUB32 = 156;
+	public static final int SPARC_INS_FPSUB32S = 157;
+	public static final int SPARC_INS_FQTOD = 158;
+	public static final int SPARC_INS_FQTOI = 159;
+	public static final int SPARC_INS_FQTOS = 160;
+	public static final int SPARC_INS_FQTOX = 161;
+	public static final int SPARC_INS_FSLAS16 = 162;
+	public static final int SPARC_INS_FSLAS32 = 163;
+	public static final int SPARC_INS_FSLL16 = 164;
+	public static final int SPARC_INS_FSLL32 = 165;
+	public static final int SPARC_INS_FSMULD = 166;
+	public static final int SPARC_INS_FSQRTD = 167;
+	public static final int SPARC_INS_FSQRTQ = 168;
+	public static final int SPARC_INS_FSQRTS = 169;
+	public static final int SPARC_INS_FSRA16 = 170;
+	public static final int SPARC_INS_FSRA32 = 171;
+	public static final int SPARC_INS_FSRC1 = 172;
+	public static final int SPARC_INS_FSRC1S = 173;
+	public static final int SPARC_INS_FSRC2 = 174;
+	public static final int SPARC_INS_FSRC2S = 175;
+	public static final int SPARC_INS_FSRL16 = 176;
+	public static final int SPARC_INS_FSRL32 = 177;
+	public static final int SPARC_INS_FSTOD = 178;
+	public static final int SPARC_INS_FSTOI = 179;
+	public static final int SPARC_INS_FSTOQ = 180;
+	public static final int SPARC_INS_FSTOX = 181;
+	public static final int SPARC_INS_FSUBD = 182;
+	public static final int SPARC_INS_FSUBQ = 183;
+	public static final int SPARC_INS_FSUBS = 184;
+	public static final int SPARC_INS_FXNOR = 185;
+	public static final int SPARC_INS_FXNORS = 186;
+	public static final int SPARC_INS_FXOR = 187;
+	public static final int SPARC_INS_FXORS = 188;
+	public static final int SPARC_INS_FXTOD = 189;
+	public static final int SPARC_INS_FXTOQ = 190;
+	public static final int SPARC_INS_FXTOS = 191;
+	public static final int SPARC_INS_FZERO = 192;
+	public static final int SPARC_INS_FZEROS = 193;
+	public static final int SPARC_INS_JMPL = 194;
+	public static final int SPARC_INS_LDD = 195;
+	public static final int SPARC_INS_LD = 196;
+	public static final int SPARC_INS_LDQ = 197;
+	public static final int SPARC_INS_LDSB = 198;
+	public static final int SPARC_INS_LDSH = 199;
+	public static final int SPARC_INS_LDSW = 200;
+	public static final int SPARC_INS_LDUB = 201;
+	public static final int SPARC_INS_LDUH = 202;
+	public static final int SPARC_INS_LDX = 203;
+	public static final int SPARC_INS_LZCNT = 204;
+	public static final int SPARC_INS_MEMBAR = 205;
+	public static final int SPARC_INS_MOVDTOX = 206;
+	public static final int SPARC_INS_MOV = 207;
+	public static final int SPARC_INS_MOVRGEZ = 208;
+	public static final int SPARC_INS_MOVRGZ = 209;
+	public static final int SPARC_INS_MOVRLEZ = 210;
+	public static final int SPARC_INS_MOVRLZ = 211;
+	public static final int SPARC_INS_MOVRNZ = 212;
+	public static final int SPARC_INS_MOVRZ = 213;
+	public static final int SPARC_INS_MOVSTOSW = 214;
+	public static final int SPARC_INS_MOVSTOUW = 215;
+	public static final int SPARC_INS_MULX = 216;
+	public static final int SPARC_INS_NOP = 217;
+	public static final int SPARC_INS_ORCC = 218;
+	public static final int SPARC_INS_ORNCC = 219;
+	public static final int SPARC_INS_ORN = 220;
+	public static final int SPARC_INS_OR = 221;
+	public static final int SPARC_INS_PDIST = 222;
+	public static final int SPARC_INS_PDISTN = 223;
+	public static final int SPARC_INS_POPC = 224;
+	public static final int SPARC_INS_RD = 225;
+	public static final int SPARC_INS_RESTORE = 226;
+	public static final int SPARC_INS_RETT = 227;
+	public static final int SPARC_INS_SAVE = 228;
+	public static final int SPARC_INS_SDIVCC = 229;
+	public static final int SPARC_INS_SDIVX = 230;
+	public static final int SPARC_INS_SDIV = 231;
+	public static final int SPARC_INS_SETHI = 232;
+	public static final int SPARC_INS_SHUTDOWN = 233;
+	public static final int SPARC_INS_SIAM = 234;
+	public static final int SPARC_INS_SLLX = 235;
+	public static final int SPARC_INS_SLL = 236;
+	public static final int SPARC_INS_SMULCC = 237;
+	public static final int SPARC_INS_SMUL = 238;
+	public static final int SPARC_INS_SRAX = 239;
+	public static final int SPARC_INS_SRA = 240;
+	public static final int SPARC_INS_SRLX = 241;
+	public static final int SPARC_INS_SRL = 242;
+	public static final int SPARC_INS_STBAR = 243;
+	public static final int SPARC_INS_STB = 244;
+	public static final int SPARC_INS_STD = 245;
+	public static final int SPARC_INS_ST = 246;
+	public static final int SPARC_INS_STH = 247;
+	public static final int SPARC_INS_STQ = 248;
+	public static final int SPARC_INS_STX = 249;
+	public static final int SPARC_INS_SUBCC = 250;
+	public static final int SPARC_INS_SUBX = 251;
+	public static final int SPARC_INS_SUBXCC = 252;
+	public static final int SPARC_INS_SUB = 253;
+	public static final int SPARC_INS_SWAP = 254;
+	public static final int SPARC_INS_TADDCCTV = 255;
+	public static final int SPARC_INS_TADDCC = 256;
+	public static final int SPARC_INS_T = 257;
+	public static final int SPARC_INS_TSUBCCTV = 258;
+	public static final int SPARC_INS_TSUBCC = 259;
+	public static final int SPARC_INS_UDIVCC = 260;
+	public static final int SPARC_INS_UDIVX = 261;
+	public static final int SPARC_INS_UDIV = 262;
+	public static final int SPARC_INS_UMULCC = 263;
+	public static final int SPARC_INS_UMULXHI = 264;
+	public static final int SPARC_INS_UMUL = 265;
+	public static final int SPARC_INS_UNIMP = 266;
+	public static final int SPARC_INS_FCMPED = 267;
+	public static final int SPARC_INS_FCMPEQ = 268;
+	public static final int SPARC_INS_FCMPES = 269;
+	public static final int SPARC_INS_WR = 270;
+	public static final int SPARC_INS_XMULX = 271;
+	public static final int SPARC_INS_XMULXHI = 272;
+	public static final int SPARC_INS_XNORCC = 273;
+	public static final int SPARC_INS_XNOR = 274;
+	public static final int SPARC_INS_XORCC = 275;
+	public static final int SPARC_INS_XOR = 276;
+	public static final int SPARC_INS_RET = 277;
+	public static final int SPARC_INS_RETL = 278;
+	public static final int SPARC_INS_ENDING = 279;
+
+	public static final int SPARC_GRP_INVALID = 0;
+	public static final int SPARC_GRP_JUMP = 1;
+	public static final int SPARC_GRP_HARDQUAD = 128;
+	public static final int SPARC_GRP_V9 = 129;
+	public static final int SPARC_GRP_VIS = 130;
+	public static final int SPARC_GRP_VIS2 = 131;
+	public static final int SPARC_GRP_VIS3 = 132;
+	public static final int SPARC_GRP_32BIT = 133;
+	public static final int SPARC_GRP_64BIT = 134;
+	public static final int SPARC_GRP_ENDING = 135;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Systemz.java b/capstone/bindings/java/capstone/Systemz.java
new file mode 100644
index 000000000..1bc5ed709
--- /dev/null
+++ b/capstone/bindings/java/capstone/Systemz.java
@@ -0,0 +1,91 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Sysz_const.*;
+
+public class Systemz {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public long length;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "length", "disp");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == SYSZ_OP_MEM)
+        value.setType(MemType.class);
+      if (type == SYSZ_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == SYSZ_OP_REG || type == SYSZ_OP_ACREG)
+        value.setType(Integer.TYPE);
+      if (type == SYSZ_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public int cc;
+    public byte op_count;
+
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[6];
+    }
+
+    public void read() {
+      readField("cc");
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("cc", "op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public int cc;
+
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      cc = op_info.cc;
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Sysz_const.java b/capstone/bindings/java/capstone/Sysz_const.java
new file mode 100644
index 000000000..87e771a40
--- /dev/null
+++ b/capstone/bindings/java/capstone/Sysz_const.java
@@ -0,0 +1,2527 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Sysz_const {
+
+	public static final int SYSZ_CC_INVALID = 0;
+	public static final int SYSZ_CC_O = 1;
+	public static final int SYSZ_CC_H = 2;
+	public static final int SYSZ_CC_NLE = 3;
+	public static final int SYSZ_CC_L = 4;
+	public static final int SYSZ_CC_NHE = 5;
+	public static final int SYSZ_CC_LH = 6;
+	public static final int SYSZ_CC_NE = 7;
+	public static final int SYSZ_CC_E = 8;
+	public static final int SYSZ_CC_NLH = 9;
+	public static final int SYSZ_CC_HE = 10;
+	public static final int SYSZ_CC_NL = 11;
+	public static final int SYSZ_CC_LE = 12;
+	public static final int SYSZ_CC_NH = 13;
+	public static final int SYSZ_CC_NO = 14;
+
+	public static final int SYSZ_OP_INVALID = 0;
+	public static final int SYSZ_OP_REG = 1;
+	public static final int SYSZ_OP_IMM = 2;
+	public static final int SYSZ_OP_MEM = 3;
+	public static final int SYSZ_OP_ACREG = 64;
+
+	public static final int SYSZ_REG_INVALID = 0;
+	public static final int SYSZ_REG_0 = 1;
+	public static final int SYSZ_REG_1 = 2;
+	public static final int SYSZ_REG_2 = 3;
+	public static final int SYSZ_REG_3 = 4;
+	public static final int SYSZ_REG_4 = 5;
+	public static final int SYSZ_REG_5 = 6;
+	public static final int SYSZ_REG_6 = 7;
+	public static final int SYSZ_REG_7 = 8;
+	public static final int SYSZ_REG_8 = 9;
+	public static final int SYSZ_REG_9 = 10;
+	public static final int SYSZ_REG_10 = 11;
+	public static final int SYSZ_REG_11 = 12;
+	public static final int SYSZ_REG_12 = 13;
+	public static final int SYSZ_REG_13 = 14;
+	public static final int SYSZ_REG_14 = 15;
+	public static final int SYSZ_REG_15 = 16;
+	public static final int SYSZ_REG_CC = 17;
+	public static final int SYSZ_REG_F0 = 18;
+	public static final int SYSZ_REG_F1 = 19;
+	public static final int SYSZ_REG_F2 = 20;
+	public static final int SYSZ_REG_F3 = 21;
+	public static final int SYSZ_REG_F4 = 22;
+	public static final int SYSZ_REG_F5 = 23;
+	public static final int SYSZ_REG_F6 = 24;
+	public static final int SYSZ_REG_F7 = 25;
+	public static final int SYSZ_REG_F8 = 26;
+	public static final int SYSZ_REG_F9 = 27;
+	public static final int SYSZ_REG_F10 = 28;
+	public static final int SYSZ_REG_F11 = 29;
+	public static final int SYSZ_REG_F12 = 30;
+	public static final int SYSZ_REG_F13 = 31;
+	public static final int SYSZ_REG_F14 = 32;
+	public static final int SYSZ_REG_F15 = 33;
+	public static final int SYSZ_REG_R0L = 34;
+	public static final int SYSZ_REG_A0 = 35;
+	public static final int SYSZ_REG_A1 = 36;
+	public static final int SYSZ_REG_A2 = 37;
+	public static final int SYSZ_REG_A3 = 38;
+	public static final int SYSZ_REG_A4 = 39;
+	public static final int SYSZ_REG_A5 = 40;
+	public static final int SYSZ_REG_A6 = 41;
+	public static final int SYSZ_REG_A7 = 42;
+	public static final int SYSZ_REG_A8 = 43;
+	public static final int SYSZ_REG_A9 = 44;
+	public static final int SYSZ_REG_A10 = 45;
+	public static final int SYSZ_REG_A11 = 46;
+	public static final int SYSZ_REG_A12 = 47;
+	public static final int SYSZ_REG_A13 = 48;
+	public static final int SYSZ_REG_A14 = 49;
+	public static final int SYSZ_REG_A15 = 50;
+	public static final int SYSZ_REG_C0 = 51;
+	public static final int SYSZ_REG_C1 = 52;
+	public static final int SYSZ_REG_C2 = 53;
+	public static final int SYSZ_REG_C3 = 54;
+	public static final int SYSZ_REG_C4 = 55;
+	public static final int SYSZ_REG_C5 = 56;
+	public static final int SYSZ_REG_C6 = 57;
+	public static final int SYSZ_REG_C7 = 58;
+	public static final int SYSZ_REG_C8 = 59;
+	public static final int SYSZ_REG_C9 = 60;
+	public static final int SYSZ_REG_C10 = 61;
+	public static final int SYSZ_REG_C11 = 62;
+	public static final int SYSZ_REG_C12 = 63;
+	public static final int SYSZ_REG_C13 = 64;
+	public static final int SYSZ_REG_C14 = 65;
+	public static final int SYSZ_REG_C15 = 66;
+	public static final int SYSZ_REG_V0 = 67;
+	public static final int SYSZ_REG_V1 = 68;
+	public static final int SYSZ_REG_V2 = 69;
+	public static final int SYSZ_REG_V3 = 70;
+	public static final int SYSZ_REG_V4 = 71;
+	public static final int SYSZ_REG_V5 = 72;
+	public static final int SYSZ_REG_V6 = 73;
+	public static final int SYSZ_REG_V7 = 74;
+	public static final int SYSZ_REG_V8 = 75;
+	public static final int SYSZ_REG_V9 = 76;
+	public static final int SYSZ_REG_V10 = 77;
+	public static final int SYSZ_REG_V11 = 78;
+	public static final int SYSZ_REG_V12 = 79;
+	public static final int SYSZ_REG_V13 = 80;
+	public static final int SYSZ_REG_V14 = 81;
+	public static final int SYSZ_REG_V15 = 82;
+	public static final int SYSZ_REG_V16 = 83;
+	public static final int SYSZ_REG_V17 = 84;
+	public static final int SYSZ_REG_V18 = 85;
+	public static final int SYSZ_REG_V19 = 86;
+	public static final int SYSZ_REG_V20 = 87;
+	public static final int SYSZ_REG_V21 = 88;
+	public static final int SYSZ_REG_V22 = 89;
+	public static final int SYSZ_REG_V23 = 90;
+	public static final int SYSZ_REG_V24 = 91;
+	public static final int SYSZ_REG_V25 = 92;
+	public static final int SYSZ_REG_V26 = 93;
+	public static final int SYSZ_REG_V27 = 94;
+	public static final int SYSZ_REG_V28 = 95;
+	public static final int SYSZ_REG_V29 = 96;
+	public static final int SYSZ_REG_V30 = 97;
+	public static final int SYSZ_REG_V31 = 98;
+	public static final int SYSZ_REG_F16 = 99;
+	public static final int SYSZ_REG_F17 = 100;
+	public static final int SYSZ_REG_F18 = 101;
+	public static final int SYSZ_REG_F19 = 102;
+	public static final int SYSZ_REG_F20 = 103;
+	public static final int SYSZ_REG_F21 = 104;
+	public static final int SYSZ_REG_F22 = 105;
+	public static final int SYSZ_REG_F23 = 106;
+	public static final int SYSZ_REG_F24 = 107;
+	public static final int SYSZ_REG_F25 = 108;
+	public static final int SYSZ_REG_F26 = 109;
+	public static final int SYSZ_REG_F27 = 110;
+	public static final int SYSZ_REG_F28 = 111;
+	public static final int SYSZ_REG_F29 = 112;
+	public static final int SYSZ_REG_F30 = 113;
+	public static final int SYSZ_REG_F31 = 114;
+	public static final int SYSZ_REG_F0Q = 115;
+	public static final int SYSZ_REG_F4Q = 116;
+	public static final int SYSZ_REG_ENDING = 117;
+
+	public static final int SYSZ_INS_INVALID = 0;
+	public static final int SYSZ_INS_A = 1;
+	public static final int SYSZ_INS_ADB = 2;
+	public static final int SYSZ_INS_ADBR = 3;
+	public static final int SYSZ_INS_AEB = 4;
+	public static final int SYSZ_INS_AEBR = 5;
+	public static final int SYSZ_INS_AFI = 6;
+	public static final int SYSZ_INS_AG = 7;
+	public static final int SYSZ_INS_AGF = 8;
+	public static final int SYSZ_INS_AGFI = 9;
+	public static final int SYSZ_INS_AGFR = 10;
+	public static final int SYSZ_INS_AGHI = 11;
+	public static final int SYSZ_INS_AGHIK = 12;
+	public static final int SYSZ_INS_AGR = 13;
+	public static final int SYSZ_INS_AGRK = 14;
+	public static final int SYSZ_INS_AGSI = 15;
+	public static final int SYSZ_INS_AH = 16;
+	public static final int SYSZ_INS_AHI = 17;
+	public static final int SYSZ_INS_AHIK = 18;
+	public static final int SYSZ_INS_AHY = 19;
+	public static final int SYSZ_INS_AIH = 20;
+	public static final int SYSZ_INS_AL = 21;
+	public static final int SYSZ_INS_ALC = 22;
+	public static final int SYSZ_INS_ALCG = 23;
+	public static final int SYSZ_INS_ALCGR = 24;
+	public static final int SYSZ_INS_ALCR = 25;
+	public static final int SYSZ_INS_ALFI = 26;
+	public static final int SYSZ_INS_ALG = 27;
+	public static final int SYSZ_INS_ALGF = 28;
+	public static final int SYSZ_INS_ALGFI = 29;
+	public static final int SYSZ_INS_ALGFR = 30;
+	public static final int SYSZ_INS_ALGHSIK = 31;
+	public static final int SYSZ_INS_ALGR = 32;
+	public static final int SYSZ_INS_ALGRK = 33;
+	public static final int SYSZ_INS_ALHSIK = 34;
+	public static final int SYSZ_INS_ALR = 35;
+	public static final int SYSZ_INS_ALRK = 36;
+	public static final int SYSZ_INS_ALY = 37;
+	public static final int SYSZ_INS_AR = 38;
+	public static final int SYSZ_INS_ARK = 39;
+	public static final int SYSZ_INS_ASI = 40;
+	public static final int SYSZ_INS_AXBR = 41;
+	public static final int SYSZ_INS_AY = 42;
+	public static final int SYSZ_INS_BCR = 43;
+	public static final int SYSZ_INS_BRC = 44;
+	public static final int SYSZ_INS_BRCL = 45;
+	public static final int SYSZ_INS_CGIJ = 46;
+	public static final int SYSZ_INS_CGRJ = 47;
+	public static final int SYSZ_INS_CIJ = 48;
+	public static final int SYSZ_INS_CLGIJ = 49;
+	public static final int SYSZ_INS_CLGRJ = 50;
+	public static final int SYSZ_INS_CLIJ = 51;
+	public static final int SYSZ_INS_CLRJ = 52;
+	public static final int SYSZ_INS_CRJ = 53;
+	public static final int SYSZ_INS_BER = 54;
+	public static final int SYSZ_INS_JE = 55;
+	public static final int SYSZ_INS_JGE = 56;
+	public static final int SYSZ_INS_LOCE = 57;
+	public static final int SYSZ_INS_LOCGE = 58;
+	public static final int SYSZ_INS_LOCGRE = 59;
+	public static final int SYSZ_INS_LOCRE = 60;
+	public static final int SYSZ_INS_STOCE = 61;
+	public static final int SYSZ_INS_STOCGE = 62;
+	public static final int SYSZ_INS_BHR = 63;
+	public static final int SYSZ_INS_BHER = 64;
+	public static final int SYSZ_INS_JHE = 65;
+	public static final int SYSZ_INS_JGHE = 66;
+	public static final int SYSZ_INS_LOCHE = 67;
+	public static final int SYSZ_INS_LOCGHE = 68;
+	public static final int SYSZ_INS_LOCGRHE = 69;
+	public static final int SYSZ_INS_LOCRHE = 70;
+	public static final int SYSZ_INS_STOCHE = 71;
+	public static final int SYSZ_INS_STOCGHE = 72;
+	public static final int SYSZ_INS_JH = 73;
+	public static final int SYSZ_INS_JGH = 74;
+	public static final int SYSZ_INS_LOCH = 75;
+	public static final int SYSZ_INS_LOCGH = 76;
+	public static final int SYSZ_INS_LOCGRH = 77;
+	public static final int SYSZ_INS_LOCRH = 78;
+	public static final int SYSZ_INS_STOCH = 79;
+	public static final int SYSZ_INS_STOCGH = 80;
+	public static final int SYSZ_INS_CGIJNLH = 81;
+	public static final int SYSZ_INS_CGRJNLH = 82;
+	public static final int SYSZ_INS_CIJNLH = 83;
+	public static final int SYSZ_INS_CLGIJNLH = 84;
+	public static final int SYSZ_INS_CLGRJNLH = 85;
+	public static final int SYSZ_INS_CLIJNLH = 86;
+	public static final int SYSZ_INS_CLRJNLH = 87;
+	public static final int SYSZ_INS_CRJNLH = 88;
+	public static final int SYSZ_INS_CGIJE = 89;
+	public static final int SYSZ_INS_CGRJE = 90;
+	public static final int SYSZ_INS_CIJE = 91;
+	public static final int SYSZ_INS_CLGIJE = 92;
+	public static final int SYSZ_INS_CLGRJE = 93;
+	public static final int SYSZ_INS_CLIJE = 94;
+	public static final int SYSZ_INS_CLRJE = 95;
+	public static final int SYSZ_INS_CRJE = 96;
+	public static final int SYSZ_INS_CGIJNLE = 97;
+	public static final int SYSZ_INS_CGRJNLE = 98;
+	public static final int SYSZ_INS_CIJNLE = 99;
+	public static final int SYSZ_INS_CLGIJNLE = 100;
+	public static final int SYSZ_INS_CLGRJNLE = 101;
+	public static final int SYSZ_INS_CLIJNLE = 102;
+	public static final int SYSZ_INS_CLRJNLE = 103;
+	public static final int SYSZ_INS_CRJNLE = 104;
+	public static final int SYSZ_INS_CGIJH = 105;
+	public static final int SYSZ_INS_CGRJH = 106;
+	public static final int SYSZ_INS_CIJH = 107;
+	public static final int SYSZ_INS_CLGIJH = 108;
+	public static final int SYSZ_INS_CLGRJH = 109;
+	public static final int SYSZ_INS_CLIJH = 110;
+	public static final int SYSZ_INS_CLRJH = 111;
+	public static final int SYSZ_INS_CRJH = 112;
+	public static final int SYSZ_INS_CGIJNL = 113;
+	public static final int SYSZ_INS_CGRJNL = 114;
+	public static final int SYSZ_INS_CIJNL = 115;
+	public static final int SYSZ_INS_CLGIJNL = 116;
+	public static final int SYSZ_INS_CLGRJNL = 117;
+	public static final int SYSZ_INS_CLIJNL = 118;
+	public static final int SYSZ_INS_CLRJNL = 119;
+	public static final int SYSZ_INS_CRJNL = 120;
+	public static final int SYSZ_INS_CGIJHE = 121;
+	public static final int SYSZ_INS_CGRJHE = 122;
+	public static final int SYSZ_INS_CIJHE = 123;
+	public static final int SYSZ_INS_CLGIJHE = 124;
+	public static final int SYSZ_INS_CLGRJHE = 125;
+	public static final int SYSZ_INS_CLIJHE = 126;
+	public static final int SYSZ_INS_CLRJHE = 127;
+	public static final int SYSZ_INS_CRJHE = 128;
+	public static final int SYSZ_INS_CGIJNHE = 129;
+	public static final int SYSZ_INS_CGRJNHE = 130;
+	public static final int SYSZ_INS_CIJNHE = 131;
+	public static final int SYSZ_INS_CLGIJNHE = 132;
+	public static final int SYSZ_INS_CLGRJNHE = 133;
+	public static final int SYSZ_INS_CLIJNHE = 134;
+	public static final int SYSZ_INS_CLRJNHE = 135;
+	public static final int SYSZ_INS_CRJNHE = 136;
+	public static final int SYSZ_INS_CGIJL = 137;
+	public static final int SYSZ_INS_CGRJL = 138;
+	public static final int SYSZ_INS_CIJL = 139;
+	public static final int SYSZ_INS_CLGIJL = 140;
+	public static final int SYSZ_INS_CLGRJL = 141;
+	public static final int SYSZ_INS_CLIJL = 142;
+	public static final int SYSZ_INS_CLRJL = 143;
+	public static final int SYSZ_INS_CRJL = 144;
+	public static final int SYSZ_INS_CGIJNH = 145;
+	public static final int SYSZ_INS_CGRJNH = 146;
+	public static final int SYSZ_INS_CIJNH = 147;
+	public static final int SYSZ_INS_CLGIJNH = 148;
+	public static final int SYSZ_INS_CLGRJNH = 149;
+	public static final int SYSZ_INS_CLIJNH = 150;
+	public static final int SYSZ_INS_CLRJNH = 151;
+	public static final int SYSZ_INS_CRJNH = 152;
+	public static final int SYSZ_INS_CGIJLE = 153;
+	public static final int SYSZ_INS_CGRJLE = 154;
+	public static final int SYSZ_INS_CIJLE = 155;
+	public static final int SYSZ_INS_CLGIJLE = 156;
+	public static final int SYSZ_INS_CLGRJLE = 157;
+	public static final int SYSZ_INS_CLIJLE = 158;
+	public static final int SYSZ_INS_CLRJLE = 159;
+	public static final int SYSZ_INS_CRJLE = 160;
+	public static final int SYSZ_INS_CGIJNE = 161;
+	public static final int SYSZ_INS_CGRJNE = 162;
+	public static final int SYSZ_INS_CIJNE = 163;
+	public static final int SYSZ_INS_CLGIJNE = 164;
+	public static final int SYSZ_INS_CLGRJNE = 165;
+	public static final int SYSZ_INS_CLIJNE = 166;
+	public static final int SYSZ_INS_CLRJNE = 167;
+	public static final int SYSZ_INS_CRJNE = 168;
+	public static final int SYSZ_INS_CGIJLH = 169;
+	public static final int SYSZ_INS_CGRJLH = 170;
+	public static final int SYSZ_INS_CIJLH = 171;
+	public static final int SYSZ_INS_CLGIJLH = 172;
+	public static final int SYSZ_INS_CLGRJLH = 173;
+	public static final int SYSZ_INS_CLIJLH = 174;
+	public static final int SYSZ_INS_CLRJLH = 175;
+	public static final int SYSZ_INS_CRJLH = 176;
+	public static final int SYSZ_INS_BLR = 177;
+	public static final int SYSZ_INS_BLER = 178;
+	public static final int SYSZ_INS_JLE = 179;
+	public static final int SYSZ_INS_JGLE = 180;
+	public static final int SYSZ_INS_LOCLE = 181;
+	public static final int SYSZ_INS_LOCGLE = 182;
+	public static final int SYSZ_INS_LOCGRLE = 183;
+	public static final int SYSZ_INS_LOCRLE = 184;
+	public static final int SYSZ_INS_STOCLE = 185;
+	public static final int SYSZ_INS_STOCGLE = 186;
+	public static final int SYSZ_INS_BLHR = 187;
+	public static final int SYSZ_INS_JLH = 188;
+	public static final int SYSZ_INS_JGLH = 189;
+	public static final int SYSZ_INS_LOCLH = 190;
+	public static final int SYSZ_INS_LOCGLH = 191;
+	public static final int SYSZ_INS_LOCGRLH = 192;
+	public static final int SYSZ_INS_LOCRLH = 193;
+	public static final int SYSZ_INS_STOCLH = 194;
+	public static final int SYSZ_INS_STOCGLH = 195;
+	public static final int SYSZ_INS_JL = 196;
+	public static final int SYSZ_INS_JGL = 197;
+	public static final int SYSZ_INS_LOCL = 198;
+	public static final int SYSZ_INS_LOCGL = 199;
+	public static final int SYSZ_INS_LOCGRL = 200;
+	public static final int SYSZ_INS_LOCRL = 201;
+	public static final int SYSZ_INS_LOC = 202;
+	public static final int SYSZ_INS_LOCG = 203;
+	public static final int SYSZ_INS_LOCGR = 204;
+	public static final int SYSZ_INS_LOCR = 205;
+	public static final int SYSZ_INS_STOCL = 206;
+	public static final int SYSZ_INS_STOCGL = 207;
+	public static final int SYSZ_INS_BNER = 208;
+	public static final int SYSZ_INS_JNE = 209;
+	public static final int SYSZ_INS_JGNE = 210;
+	public static final int SYSZ_INS_LOCNE = 211;
+	public static final int SYSZ_INS_LOCGNE = 212;
+	public static final int SYSZ_INS_LOCGRNE = 213;
+	public static final int SYSZ_INS_LOCRNE = 214;
+	public static final int SYSZ_INS_STOCNE = 215;
+	public static final int SYSZ_INS_STOCGNE = 216;
+	public static final int SYSZ_INS_BNHR = 217;
+	public static final int SYSZ_INS_BNHER = 218;
+	public static final int SYSZ_INS_JNHE = 219;
+	public static final int SYSZ_INS_JGNHE = 220;
+	public static final int SYSZ_INS_LOCNHE = 221;
+	public static final int SYSZ_INS_LOCGNHE = 222;
+	public static final int SYSZ_INS_LOCGRNHE = 223;
+	public static final int SYSZ_INS_LOCRNHE = 224;
+	public static final int SYSZ_INS_STOCNHE = 225;
+	public static final int SYSZ_INS_STOCGNHE = 226;
+	public static final int SYSZ_INS_JNH = 227;
+	public static final int SYSZ_INS_JGNH = 228;
+	public static final int SYSZ_INS_LOCNH = 229;
+	public static final int SYSZ_INS_LOCGNH = 230;
+	public static final int SYSZ_INS_LOCGRNH = 231;
+	public static final int SYSZ_INS_LOCRNH = 232;
+	public static final int SYSZ_INS_STOCNH = 233;
+	public static final int SYSZ_INS_STOCGNH = 234;
+	public static final int SYSZ_INS_BNLR = 235;
+	public static final int SYSZ_INS_BNLER = 236;
+	public static final int SYSZ_INS_JNLE = 237;
+	public static final int SYSZ_INS_JGNLE = 238;
+	public static final int SYSZ_INS_LOCNLE = 239;
+	public static final int SYSZ_INS_LOCGNLE = 240;
+	public static final int SYSZ_INS_LOCGRNLE = 241;
+	public static final int SYSZ_INS_LOCRNLE = 242;
+	public static final int SYSZ_INS_STOCNLE = 243;
+	public static final int SYSZ_INS_STOCGNLE = 244;
+	public static final int SYSZ_INS_BNLHR = 245;
+	public static final int SYSZ_INS_JNLH = 246;
+	public static final int SYSZ_INS_JGNLH = 247;
+	public static final int SYSZ_INS_LOCNLH = 248;
+	public static final int SYSZ_INS_LOCGNLH = 249;
+	public static final int SYSZ_INS_LOCGRNLH = 250;
+	public static final int SYSZ_INS_LOCRNLH = 251;
+	public static final int SYSZ_INS_STOCNLH = 252;
+	public static final int SYSZ_INS_STOCGNLH = 253;
+	public static final int SYSZ_INS_JNL = 254;
+	public static final int SYSZ_INS_JGNL = 255;
+	public static final int SYSZ_INS_LOCNL = 256;
+	public static final int SYSZ_INS_LOCGNL = 257;
+	public static final int SYSZ_INS_LOCGRNL = 258;
+	public static final int SYSZ_INS_LOCRNL = 259;
+	public static final int SYSZ_INS_STOCNL = 260;
+	public static final int SYSZ_INS_STOCGNL = 261;
+	public static final int SYSZ_INS_BNOR = 262;
+	public static final int SYSZ_INS_JNO = 263;
+	public static final int SYSZ_INS_JGNO = 264;
+	public static final int SYSZ_INS_LOCNO = 265;
+	public static final int SYSZ_INS_LOCGNO = 266;
+	public static final int SYSZ_INS_LOCGRNO = 267;
+	public static final int SYSZ_INS_LOCRNO = 268;
+	public static final int SYSZ_INS_STOCNO = 269;
+	public static final int SYSZ_INS_STOCGNO = 270;
+	public static final int SYSZ_INS_BOR = 271;
+	public static final int SYSZ_INS_JO = 272;
+	public static final int SYSZ_INS_JGO = 273;
+	public static final int SYSZ_INS_LOCO = 274;
+	public static final int SYSZ_INS_LOCGO = 275;
+	public static final int SYSZ_INS_LOCGRO = 276;
+	public static final int SYSZ_INS_LOCRO = 277;
+	public static final int SYSZ_INS_STOCO = 278;
+	public static final int SYSZ_INS_STOCGO = 279;
+	public static final int SYSZ_INS_STOC = 280;
+	public static final int SYSZ_INS_STOCG = 281;
+	public static final int SYSZ_INS_BASR = 282;
+	public static final int SYSZ_INS_BR = 283;
+	public static final int SYSZ_INS_BRAS = 284;
+	public static final int SYSZ_INS_BRASL = 285;
+	public static final int SYSZ_INS_J = 286;
+	public static final int SYSZ_INS_JG = 287;
+	public static final int SYSZ_INS_BRCT = 288;
+	public static final int SYSZ_INS_BRCTG = 289;
+	public static final int SYSZ_INS_C = 290;
+	public static final int SYSZ_INS_CDB = 291;
+	public static final int SYSZ_INS_CDBR = 292;
+	public static final int SYSZ_INS_CDFBR = 293;
+	public static final int SYSZ_INS_CDGBR = 294;
+	public static final int SYSZ_INS_CDLFBR = 295;
+	public static final int SYSZ_INS_CDLGBR = 296;
+	public static final int SYSZ_INS_CEB = 297;
+	public static final int SYSZ_INS_CEBR = 298;
+	public static final int SYSZ_INS_CEFBR = 299;
+	public static final int SYSZ_INS_CEGBR = 300;
+	public static final int SYSZ_INS_CELFBR = 301;
+	public static final int SYSZ_INS_CELGBR = 302;
+	public static final int SYSZ_INS_CFDBR = 303;
+	public static final int SYSZ_INS_CFEBR = 304;
+	public static final int SYSZ_INS_CFI = 305;
+	public static final int SYSZ_INS_CFXBR = 306;
+	public static final int SYSZ_INS_CG = 307;
+	public static final int SYSZ_INS_CGDBR = 308;
+	public static final int SYSZ_INS_CGEBR = 309;
+	public static final int SYSZ_INS_CGF = 310;
+	public static final int SYSZ_INS_CGFI = 311;
+	public static final int SYSZ_INS_CGFR = 312;
+	public static final int SYSZ_INS_CGFRL = 313;
+	public static final int SYSZ_INS_CGH = 314;
+	public static final int SYSZ_INS_CGHI = 315;
+	public static final int SYSZ_INS_CGHRL = 316;
+	public static final int SYSZ_INS_CGHSI = 317;
+	public static final int SYSZ_INS_CGR = 318;
+	public static final int SYSZ_INS_CGRL = 319;
+	public static final int SYSZ_INS_CGXBR = 320;
+	public static final int SYSZ_INS_CH = 321;
+	public static final int SYSZ_INS_CHF = 322;
+	public static final int SYSZ_INS_CHHSI = 323;
+	public static final int SYSZ_INS_CHI = 324;
+	public static final int SYSZ_INS_CHRL = 325;
+	public static final int SYSZ_INS_CHSI = 326;
+	public static final int SYSZ_INS_CHY = 327;
+	public static final int SYSZ_INS_CIH = 328;
+	public static final int SYSZ_INS_CL = 329;
+	public static final int SYSZ_INS_CLC = 330;
+	public static final int SYSZ_INS_CLFDBR = 331;
+	public static final int SYSZ_INS_CLFEBR = 332;
+	public static final int SYSZ_INS_CLFHSI = 333;
+	public static final int SYSZ_INS_CLFI = 334;
+	public static final int SYSZ_INS_CLFXBR = 335;
+	public static final int SYSZ_INS_CLG = 336;
+	public static final int SYSZ_INS_CLGDBR = 337;
+	public static final int SYSZ_INS_CLGEBR = 338;
+	public static final int SYSZ_INS_CLGF = 339;
+	public static final int SYSZ_INS_CLGFI = 340;
+	public static final int SYSZ_INS_CLGFR = 341;
+	public static final int SYSZ_INS_CLGFRL = 342;
+	public static final int SYSZ_INS_CLGHRL = 343;
+	public static final int SYSZ_INS_CLGHSI = 344;
+	public static final int SYSZ_INS_CLGR = 345;
+	public static final int SYSZ_INS_CLGRL = 346;
+	public static final int SYSZ_INS_CLGXBR = 347;
+	public static final int SYSZ_INS_CLHF = 348;
+	public static final int SYSZ_INS_CLHHSI = 349;
+	public static final int SYSZ_INS_CLHRL = 350;
+	public static final int SYSZ_INS_CLI = 351;
+	public static final int SYSZ_INS_CLIH = 352;
+	public static final int SYSZ_INS_CLIY = 353;
+	public static final int SYSZ_INS_CLR = 354;
+	public static final int SYSZ_INS_CLRL = 355;
+	public static final int SYSZ_INS_CLST = 356;
+	public static final int SYSZ_INS_CLY = 357;
+	public static final int SYSZ_INS_CPSDR = 358;
+	public static final int SYSZ_INS_CR = 359;
+	public static final int SYSZ_INS_CRL = 360;
+	public static final int SYSZ_INS_CS = 361;
+	public static final int SYSZ_INS_CSG = 362;
+	public static final int SYSZ_INS_CSY = 363;
+	public static final int SYSZ_INS_CXBR = 364;
+	public static final int SYSZ_INS_CXFBR = 365;
+	public static final int SYSZ_INS_CXGBR = 366;
+	public static final int SYSZ_INS_CXLFBR = 367;
+	public static final int SYSZ_INS_CXLGBR = 368;
+	public static final int SYSZ_INS_CY = 369;
+	public static final int SYSZ_INS_DDB = 370;
+	public static final int SYSZ_INS_DDBR = 371;
+	public static final int SYSZ_INS_DEB = 372;
+	public static final int SYSZ_INS_DEBR = 373;
+	public static final int SYSZ_INS_DL = 374;
+	public static final int SYSZ_INS_DLG = 375;
+	public static final int SYSZ_INS_DLGR = 376;
+	public static final int SYSZ_INS_DLR = 377;
+	public static final int SYSZ_INS_DSG = 378;
+	public static final int SYSZ_INS_DSGF = 379;
+	public static final int SYSZ_INS_DSGFR = 380;
+	public static final int SYSZ_INS_DSGR = 381;
+	public static final int SYSZ_INS_DXBR = 382;
+	public static final int SYSZ_INS_EAR = 383;
+	public static final int SYSZ_INS_FIDBR = 384;
+	public static final int SYSZ_INS_FIDBRA = 385;
+	public static final int SYSZ_INS_FIEBR = 386;
+	public static final int SYSZ_INS_FIEBRA = 387;
+	public static final int SYSZ_INS_FIXBR = 388;
+	public static final int SYSZ_INS_FIXBRA = 389;
+	public static final int SYSZ_INS_FLOGR = 390;
+	public static final int SYSZ_INS_IC = 391;
+	public static final int SYSZ_INS_ICY = 392;
+	public static final int SYSZ_INS_IIHF = 393;
+	public static final int SYSZ_INS_IIHH = 394;
+	public static final int SYSZ_INS_IIHL = 395;
+	public static final int SYSZ_INS_IILF = 396;
+	public static final int SYSZ_INS_IILH = 397;
+	public static final int SYSZ_INS_IILL = 398;
+	public static final int SYSZ_INS_IPM = 399;
+	public static final int SYSZ_INS_L = 400;
+	public static final int SYSZ_INS_LA = 401;
+	public static final int SYSZ_INS_LAA = 402;
+	public static final int SYSZ_INS_LAAG = 403;
+	public static final int SYSZ_INS_LAAL = 404;
+	public static final int SYSZ_INS_LAALG = 405;
+	public static final int SYSZ_INS_LAN = 406;
+	public static final int SYSZ_INS_LANG = 407;
+	public static final int SYSZ_INS_LAO = 408;
+	public static final int SYSZ_INS_LAOG = 409;
+	public static final int SYSZ_INS_LARL = 410;
+	public static final int SYSZ_INS_LAX = 411;
+	public static final int SYSZ_INS_LAXG = 412;
+	public static final int SYSZ_INS_LAY = 413;
+	public static final int SYSZ_INS_LB = 414;
+	public static final int SYSZ_INS_LBH = 415;
+	public static final int SYSZ_INS_LBR = 416;
+	public static final int SYSZ_INS_LCDBR = 417;
+	public static final int SYSZ_INS_LCEBR = 418;
+	public static final int SYSZ_INS_LCGFR = 419;
+	public static final int SYSZ_INS_LCGR = 420;
+	public static final int SYSZ_INS_LCR = 421;
+	public static final int SYSZ_INS_LCXBR = 422;
+	public static final int SYSZ_INS_LD = 423;
+	public static final int SYSZ_INS_LDEB = 424;
+	public static final int SYSZ_INS_LDEBR = 425;
+	public static final int SYSZ_INS_LDGR = 426;
+	public static final int SYSZ_INS_LDR = 427;
+	public static final int SYSZ_INS_LDXBR = 428;
+	public static final int SYSZ_INS_LDXBRA = 429;
+	public static final int SYSZ_INS_LDY = 430;
+	public static final int SYSZ_INS_LE = 431;
+	public static final int SYSZ_INS_LEDBR = 432;
+	public static final int SYSZ_INS_LEDBRA = 433;
+	public static final int SYSZ_INS_LER = 434;
+	public static final int SYSZ_INS_LEXBR = 435;
+	public static final int SYSZ_INS_LEXBRA = 436;
+	public static final int SYSZ_INS_LEY = 437;
+	public static final int SYSZ_INS_LFH = 438;
+	public static final int SYSZ_INS_LG = 439;
+	public static final int SYSZ_INS_LGB = 440;
+	public static final int SYSZ_INS_LGBR = 441;
+	public static final int SYSZ_INS_LGDR = 442;
+	public static final int SYSZ_INS_LGF = 443;
+	public static final int SYSZ_INS_LGFI = 444;
+	public static final int SYSZ_INS_LGFR = 445;
+	public static final int SYSZ_INS_LGFRL = 446;
+	public static final int SYSZ_INS_LGH = 447;
+	public static final int SYSZ_INS_LGHI = 448;
+	public static final int SYSZ_INS_LGHR = 449;
+	public static final int SYSZ_INS_LGHRL = 450;
+	public static final int SYSZ_INS_LGR = 451;
+	public static final int SYSZ_INS_LGRL = 452;
+	public static final int SYSZ_INS_LH = 453;
+	public static final int SYSZ_INS_LHH = 454;
+	public static final int SYSZ_INS_LHI = 455;
+	public static final int SYSZ_INS_LHR = 456;
+	public static final int SYSZ_INS_LHRL = 457;
+	public static final int SYSZ_INS_LHY = 458;
+	public static final int SYSZ_INS_LLC = 459;
+	public static final int SYSZ_INS_LLCH = 460;
+	public static final int SYSZ_INS_LLCR = 461;
+	public static final int SYSZ_INS_LLGC = 462;
+	public static final int SYSZ_INS_LLGCR = 463;
+	public static final int SYSZ_INS_LLGF = 464;
+	public static final int SYSZ_INS_LLGFR = 465;
+	public static final int SYSZ_INS_LLGFRL = 466;
+	public static final int SYSZ_INS_LLGH = 467;
+	public static final int SYSZ_INS_LLGHR = 468;
+	public static final int SYSZ_INS_LLGHRL = 469;
+	public static final int SYSZ_INS_LLH = 470;
+	public static final int SYSZ_INS_LLHH = 471;
+	public static final int SYSZ_INS_LLHR = 472;
+	public static final int SYSZ_INS_LLHRL = 473;
+	public static final int SYSZ_INS_LLIHF = 474;
+	public static final int SYSZ_INS_LLIHH = 475;
+	public static final int SYSZ_INS_LLIHL = 476;
+	public static final int SYSZ_INS_LLILF = 477;
+	public static final int SYSZ_INS_LLILH = 478;
+	public static final int SYSZ_INS_LLILL = 479;
+	public static final int SYSZ_INS_LMG = 480;
+	public static final int SYSZ_INS_LNDBR = 481;
+	public static final int SYSZ_INS_LNEBR = 482;
+	public static final int SYSZ_INS_LNGFR = 483;
+	public static final int SYSZ_INS_LNGR = 484;
+	public static final int SYSZ_INS_LNR = 485;
+	public static final int SYSZ_INS_LNXBR = 486;
+	public static final int SYSZ_INS_LPDBR = 487;
+	public static final int SYSZ_INS_LPEBR = 488;
+	public static final int SYSZ_INS_LPGFR = 489;
+	public static final int SYSZ_INS_LPGR = 490;
+	public static final int SYSZ_INS_LPR = 491;
+	public static final int SYSZ_INS_LPXBR = 492;
+	public static final int SYSZ_INS_LR = 493;
+	public static final int SYSZ_INS_LRL = 494;
+	public static final int SYSZ_INS_LRV = 495;
+	public static final int SYSZ_INS_LRVG = 496;
+	public static final int SYSZ_INS_LRVGR = 497;
+	public static final int SYSZ_INS_LRVR = 498;
+	public static final int SYSZ_INS_LT = 499;
+	public static final int SYSZ_INS_LTDBR = 500;
+	public static final int SYSZ_INS_LTEBR = 501;
+	public static final int SYSZ_INS_LTG = 502;
+	public static final int SYSZ_INS_LTGF = 503;
+	public static final int SYSZ_INS_LTGFR = 504;
+	public static final int SYSZ_INS_LTGR = 505;
+	public static final int SYSZ_INS_LTR = 506;
+	public static final int SYSZ_INS_LTXBR = 507;
+	public static final int SYSZ_INS_LXDB = 508;
+	public static final int SYSZ_INS_LXDBR = 509;
+	public static final int SYSZ_INS_LXEB = 510;
+	public static final int SYSZ_INS_LXEBR = 511;
+	public static final int SYSZ_INS_LXR = 512;
+	public static final int SYSZ_INS_LY = 513;
+	public static final int SYSZ_INS_LZDR = 514;
+	public static final int SYSZ_INS_LZER = 515;
+	public static final int SYSZ_INS_LZXR = 516;
+	public static final int SYSZ_INS_MADB = 517;
+	public static final int SYSZ_INS_MADBR = 518;
+	public static final int SYSZ_INS_MAEB = 519;
+	public static final int SYSZ_INS_MAEBR = 520;
+	public static final int SYSZ_INS_MDB = 521;
+	public static final int SYSZ_INS_MDBR = 522;
+	public static final int SYSZ_INS_MDEB = 523;
+	public static final int SYSZ_INS_MDEBR = 524;
+	public static final int SYSZ_INS_MEEB = 525;
+	public static final int SYSZ_INS_MEEBR = 526;
+	public static final int SYSZ_INS_MGHI = 527;
+	public static final int SYSZ_INS_MH = 528;
+	public static final int SYSZ_INS_MHI = 529;
+	public static final int SYSZ_INS_MHY = 530;
+	public static final int SYSZ_INS_MLG = 531;
+	public static final int SYSZ_INS_MLGR = 532;
+	public static final int SYSZ_INS_MS = 533;
+	public static final int SYSZ_INS_MSDB = 534;
+	public static final int SYSZ_INS_MSDBR = 535;
+	public static final int SYSZ_INS_MSEB = 536;
+	public static final int SYSZ_INS_MSEBR = 537;
+	public static final int SYSZ_INS_MSFI = 538;
+	public static final int SYSZ_INS_MSG = 539;
+	public static final int SYSZ_INS_MSGF = 540;
+	public static final int SYSZ_INS_MSGFI = 541;
+	public static final int SYSZ_INS_MSGFR = 542;
+	public static final int SYSZ_INS_MSGR = 543;
+	public static final int SYSZ_INS_MSR = 544;
+	public static final int SYSZ_INS_MSY = 545;
+	public static final int SYSZ_INS_MVC = 546;
+	public static final int SYSZ_INS_MVGHI = 547;
+	public static final int SYSZ_INS_MVHHI = 548;
+	public static final int SYSZ_INS_MVHI = 549;
+	public static final int SYSZ_INS_MVI = 550;
+	public static final int SYSZ_INS_MVIY = 551;
+	public static final int SYSZ_INS_MVST = 552;
+	public static final int SYSZ_INS_MXBR = 553;
+	public static final int SYSZ_INS_MXDB = 554;
+	public static final int SYSZ_INS_MXDBR = 555;
+	public static final int SYSZ_INS_N = 556;
+	public static final int SYSZ_INS_NC = 557;
+	public static final int SYSZ_INS_NG = 558;
+	public static final int SYSZ_INS_NGR = 559;
+	public static final int SYSZ_INS_NGRK = 560;
+	public static final int SYSZ_INS_NI = 561;
+	public static final int SYSZ_INS_NIHF = 562;
+	public static final int SYSZ_INS_NIHH = 563;
+	public static final int SYSZ_INS_NIHL = 564;
+	public static final int SYSZ_INS_NILF = 565;
+	public static final int SYSZ_INS_NILH = 566;
+	public static final int SYSZ_INS_NILL = 567;
+	public static final int SYSZ_INS_NIY = 568;
+	public static final int SYSZ_INS_NR = 569;
+	public static final int SYSZ_INS_NRK = 570;
+	public static final int SYSZ_INS_NY = 571;
+	public static final int SYSZ_INS_O = 572;
+	public static final int SYSZ_INS_OC = 573;
+	public static final int SYSZ_INS_OG = 574;
+	public static final int SYSZ_INS_OGR = 575;
+	public static final int SYSZ_INS_OGRK = 576;
+	public static final int SYSZ_INS_OI = 577;
+	public static final int SYSZ_INS_OIHF = 578;
+	public static final int SYSZ_INS_OIHH = 579;
+	public static final int SYSZ_INS_OIHL = 580;
+	public static final int SYSZ_INS_OILF = 581;
+	public static final int SYSZ_INS_OILH = 582;
+	public static final int SYSZ_INS_OILL = 583;
+	public static final int SYSZ_INS_OIY = 584;
+	public static final int SYSZ_INS_OR = 585;
+	public static final int SYSZ_INS_ORK = 586;
+	public static final int SYSZ_INS_OY = 587;
+	public static final int SYSZ_INS_PFD = 588;
+	public static final int SYSZ_INS_PFDRL = 589;
+	public static final int SYSZ_INS_RISBG = 590;
+	public static final int SYSZ_INS_RISBHG = 591;
+	public static final int SYSZ_INS_RISBLG = 592;
+	public static final int SYSZ_INS_RLL = 593;
+	public static final int SYSZ_INS_RLLG = 594;
+	public static final int SYSZ_INS_RNSBG = 595;
+	public static final int SYSZ_INS_ROSBG = 596;
+	public static final int SYSZ_INS_RXSBG = 597;
+	public static final int SYSZ_INS_S = 598;
+	public static final int SYSZ_INS_SDB = 599;
+	public static final int SYSZ_INS_SDBR = 600;
+	public static final int SYSZ_INS_SEB = 601;
+	public static final int SYSZ_INS_SEBR = 602;
+	public static final int SYSZ_INS_SG = 603;
+	public static final int SYSZ_INS_SGF = 604;
+	public static final int SYSZ_INS_SGFR = 605;
+	public static final int SYSZ_INS_SGR = 606;
+	public static final int SYSZ_INS_SGRK = 607;
+	public static final int SYSZ_INS_SH = 608;
+	public static final int SYSZ_INS_SHY = 609;
+	public static final int SYSZ_INS_SL = 610;
+	public static final int SYSZ_INS_SLB = 611;
+	public static final int SYSZ_INS_SLBG = 612;
+	public static final int SYSZ_INS_SLBR = 613;
+	public static final int SYSZ_INS_SLFI = 614;
+	public static final int SYSZ_INS_SLG = 615;
+	public static final int SYSZ_INS_SLBGR = 616;
+	public static final int SYSZ_INS_SLGF = 617;
+	public static final int SYSZ_INS_SLGFI = 618;
+	public static final int SYSZ_INS_SLGFR = 619;
+	public static final int SYSZ_INS_SLGR = 620;
+	public static final int SYSZ_INS_SLGRK = 621;
+	public static final int SYSZ_INS_SLL = 622;
+	public static final int SYSZ_INS_SLLG = 623;
+	public static final int SYSZ_INS_SLLK = 624;
+	public static final int SYSZ_INS_SLR = 625;
+	public static final int SYSZ_INS_SLRK = 626;
+	public static final int SYSZ_INS_SLY = 627;
+	public static final int SYSZ_INS_SQDB = 628;
+	public static final int SYSZ_INS_SQDBR = 629;
+	public static final int SYSZ_INS_SQEB = 630;
+	public static final int SYSZ_INS_SQEBR = 631;
+	public static final int SYSZ_INS_SQXBR = 632;
+	public static final int SYSZ_INS_SR = 633;
+	public static final int SYSZ_INS_SRA = 634;
+	public static final int SYSZ_INS_SRAG = 635;
+	public static final int SYSZ_INS_SRAK = 636;
+	public static final int SYSZ_INS_SRK = 637;
+	public static final int SYSZ_INS_SRL = 638;
+	public static final int SYSZ_INS_SRLG = 639;
+	public static final int SYSZ_INS_SRLK = 640;
+	public static final int SYSZ_INS_SRST = 641;
+	public static final int SYSZ_INS_ST = 642;
+	public static final int SYSZ_INS_STC = 643;
+	public static final int SYSZ_INS_STCH = 644;
+	public static final int SYSZ_INS_STCY = 645;
+	public static final int SYSZ_INS_STD = 646;
+	public static final int SYSZ_INS_STDY = 647;
+	public static final int SYSZ_INS_STE = 648;
+	public static final int SYSZ_INS_STEY = 649;
+	public static final int SYSZ_INS_STFH = 650;
+	public static final int SYSZ_INS_STG = 651;
+	public static final int SYSZ_INS_STGRL = 652;
+	public static final int SYSZ_INS_STH = 653;
+	public static final int SYSZ_INS_STHH = 654;
+	public static final int SYSZ_INS_STHRL = 655;
+	public static final int SYSZ_INS_STHY = 656;
+	public static final int SYSZ_INS_STMG = 657;
+	public static final int SYSZ_INS_STRL = 658;
+	public static final int SYSZ_INS_STRV = 659;
+	public static final int SYSZ_INS_STRVG = 660;
+	public static final int SYSZ_INS_STY = 661;
+	public static final int SYSZ_INS_SXBR = 662;
+	public static final int SYSZ_INS_SY = 663;
+	public static final int SYSZ_INS_TM = 664;
+	public static final int SYSZ_INS_TMHH = 665;
+	public static final int SYSZ_INS_TMHL = 666;
+	public static final int SYSZ_INS_TMLH = 667;
+	public static final int SYSZ_INS_TMLL = 668;
+	public static final int SYSZ_INS_TMY = 669;
+	public static final int SYSZ_INS_X = 670;
+	public static final int SYSZ_INS_XC = 671;
+	public static final int SYSZ_INS_XG = 672;
+	public static final int SYSZ_INS_XGR = 673;
+	public static final int SYSZ_INS_XGRK = 674;
+	public static final int SYSZ_INS_XI = 675;
+	public static final int SYSZ_INS_XIHF = 676;
+	public static final int SYSZ_INS_XILF = 677;
+	public static final int SYSZ_INS_XIY = 678;
+	public static final int SYSZ_INS_XR = 679;
+	public static final int SYSZ_INS_XRK = 680;
+	public static final int SYSZ_INS_XY = 681;
+	public static final int SYSZ_INS_AD = 682;
+	public static final int SYSZ_INS_ADR = 683;
+	public static final int SYSZ_INS_ADTR = 684;
+	public static final int SYSZ_INS_ADTRA = 685;
+	public static final int SYSZ_INS_AE = 686;
+	public static final int SYSZ_INS_AER = 687;
+	public static final int SYSZ_INS_AGH = 688;
+	public static final int SYSZ_INS_AHHHR = 689;
+	public static final int SYSZ_INS_AHHLR = 690;
+	public static final int SYSZ_INS_ALGSI = 691;
+	public static final int SYSZ_INS_ALHHHR = 692;
+	public static final int SYSZ_INS_ALHHLR = 693;
+	public static final int SYSZ_INS_ALSI = 694;
+	public static final int SYSZ_INS_ALSIH = 695;
+	public static final int SYSZ_INS_ALSIHN = 696;
+	public static final int SYSZ_INS_AP = 697;
+	public static final int SYSZ_INS_AU = 698;
+	public static final int SYSZ_INS_AUR = 699;
+	public static final int SYSZ_INS_AW = 700;
+	public static final int SYSZ_INS_AWR = 701;
+	public static final int SYSZ_INS_AXR = 702;
+	public static final int SYSZ_INS_AXTR = 703;
+	public static final int SYSZ_INS_AXTRA = 704;
+	public static final int SYSZ_INS_B = 705;
+	public static final int SYSZ_INS_BAKR = 706;
+	public static final int SYSZ_INS_BAL = 707;
+	public static final int SYSZ_INS_BALR = 708;
+	public static final int SYSZ_INS_BAS = 709;
+	public static final int SYSZ_INS_BASSM = 710;
+	public static final int SYSZ_INS_BC = 711;
+	public static final int SYSZ_INS_BCT = 712;
+	public static final int SYSZ_INS_BCTG = 713;
+	public static final int SYSZ_INS_BCTGR = 714;
+	public static final int SYSZ_INS_BCTR = 715;
+	public static final int SYSZ_INS_BE = 716;
+	public static final int SYSZ_INS_BH = 717;
+	public static final int SYSZ_INS_BHE = 718;
+	public static final int SYSZ_INS_BI = 719;
+	public static final int SYSZ_INS_BIC = 720;
+	public static final int SYSZ_INS_BIE = 721;
+	public static final int SYSZ_INS_BIH = 722;
+	public static final int SYSZ_INS_BIHE = 723;
+	public static final int SYSZ_INS_BIL = 724;
+	public static final int SYSZ_INS_BILE = 725;
+	public static final int SYSZ_INS_BILH = 726;
+	public static final int SYSZ_INS_BIM = 727;
+	public static final int SYSZ_INS_BINE = 728;
+	public static final int SYSZ_INS_BINH = 729;
+	public static final int SYSZ_INS_BINHE = 730;
+	public static final int SYSZ_INS_BINL = 731;
+	public static final int SYSZ_INS_BINLE = 732;
+	public static final int SYSZ_INS_BINLH = 733;
+	public static final int SYSZ_INS_BINM = 734;
+	public static final int SYSZ_INS_BINO = 735;
+	public static final int SYSZ_INS_BINP = 736;
+	public static final int SYSZ_INS_BINZ = 737;
+	public static final int SYSZ_INS_BIO = 738;
+	public static final int SYSZ_INS_BIP = 739;
+	public static final int SYSZ_INS_BIZ = 740;
+	public static final int SYSZ_INS_BL = 741;
+	public static final int SYSZ_INS_BLE = 742;
+	public static final int SYSZ_INS_BLH = 743;
+	public static final int SYSZ_INS_BM = 744;
+	public static final int SYSZ_INS_BMR = 745;
+	public static final int SYSZ_INS_BNE = 746;
+	public static final int SYSZ_INS_BNH = 747;
+	public static final int SYSZ_INS_BNHE = 748;
+	public static final int SYSZ_INS_BNL = 749;
+	public static final int SYSZ_INS_BNLE = 750;
+	public static final int SYSZ_INS_BNLH = 751;
+	public static final int SYSZ_INS_BNM = 752;
+	public static final int SYSZ_INS_BNMR = 753;
+	public static final int SYSZ_INS_BNO = 754;
+	public static final int SYSZ_INS_BNP = 755;
+	public static final int SYSZ_INS_BNPR = 756;
+	public static final int SYSZ_INS_BNZ = 757;
+	public static final int SYSZ_INS_BNZR = 758;
+	public static final int SYSZ_INS_BO = 759;
+	public static final int SYSZ_INS_BP = 760;
+	public static final int SYSZ_INS_BPP = 761;
+	public static final int SYSZ_INS_BPR = 762;
+	public static final int SYSZ_INS_BPRP = 763;
+	public static final int SYSZ_INS_BRCTH = 764;
+	public static final int SYSZ_INS_BRXH = 765;
+	public static final int SYSZ_INS_BRXHG = 766;
+	public static final int SYSZ_INS_BRXLE = 767;
+	public static final int SYSZ_INS_BRXLG = 768;
+	public static final int SYSZ_INS_BSA = 769;
+	public static final int SYSZ_INS_BSG = 770;
+	public static final int SYSZ_INS_BSM = 771;
+	public static final int SYSZ_INS_BXH = 772;
+	public static final int SYSZ_INS_BXHG = 773;
+	public static final int SYSZ_INS_BXLE = 774;
+	public static final int SYSZ_INS_BXLEG = 775;
+	public static final int SYSZ_INS_BZ = 776;
+	public static final int SYSZ_INS_BZR = 777;
+	public static final int SYSZ_INS_CD = 778;
+	public static final int SYSZ_INS_CDFBRA = 779;
+	public static final int SYSZ_INS_CDFR = 780;
+	public static final int SYSZ_INS_CDFTR = 781;
+	public static final int SYSZ_INS_CDGBRA = 782;
+	public static final int SYSZ_INS_CDGR = 783;
+	public static final int SYSZ_INS_CDGTR = 784;
+	public static final int SYSZ_INS_CDGTRA = 785;
+	public static final int SYSZ_INS_CDLFTR = 786;
+	public static final int SYSZ_INS_CDLGTR = 787;
+	public static final int SYSZ_INS_CDPT = 788;
+	public static final int SYSZ_INS_CDR = 789;
+	public static final int SYSZ_INS_CDS = 790;
+	public static final int SYSZ_INS_CDSG = 791;
+	public static final int SYSZ_INS_CDSTR = 792;
+	public static final int SYSZ_INS_CDSY = 793;
+	public static final int SYSZ_INS_CDTR = 794;
+	public static final int SYSZ_INS_CDUTR = 795;
+	public static final int SYSZ_INS_CDZT = 796;
+	public static final int SYSZ_INS_CE = 797;
+	public static final int SYSZ_INS_CEDTR = 798;
+	public static final int SYSZ_INS_CEFBRA = 799;
+	public static final int SYSZ_INS_CEFR = 800;
+	public static final int SYSZ_INS_CEGBRA = 801;
+	public static final int SYSZ_INS_CEGR = 802;
+	public static final int SYSZ_INS_CER = 803;
+	public static final int SYSZ_INS_CEXTR = 804;
+	public static final int SYSZ_INS_CFC = 805;
+	public static final int SYSZ_INS_CFDBRA = 806;
+	public static final int SYSZ_INS_CFDR = 807;
+	public static final int SYSZ_INS_CFDTR = 808;
+	public static final int SYSZ_INS_CFEBRA = 809;
+	public static final int SYSZ_INS_CFER = 810;
+	public static final int SYSZ_INS_CFXBRA = 811;
+	public static final int SYSZ_INS_CFXR = 812;
+	public static final int SYSZ_INS_CFXTR = 813;
+	public static final int SYSZ_INS_CGDBRA = 814;
+	public static final int SYSZ_INS_CGDR = 815;
+	public static final int SYSZ_INS_CGDTR = 816;
+	public static final int SYSZ_INS_CGDTRA = 817;
+	public static final int SYSZ_INS_CGEBRA = 818;
+	public static final int SYSZ_INS_CGER = 819;
+	public static final int SYSZ_INS_CGIB = 820;
+	public static final int SYSZ_INS_CGIBE = 821;
+	public static final int SYSZ_INS_CGIBH = 822;
+	public static final int SYSZ_INS_CGIBHE = 823;
+	public static final int SYSZ_INS_CGIBL = 824;
+	public static final int SYSZ_INS_CGIBLE = 825;
+	public static final int SYSZ_INS_CGIBLH = 826;
+	public static final int SYSZ_INS_CGIBNE = 827;
+	public static final int SYSZ_INS_CGIBNH = 828;
+	public static final int SYSZ_INS_CGIBNHE = 829;
+	public static final int SYSZ_INS_CGIBNL = 830;
+	public static final int SYSZ_INS_CGIBNLE = 831;
+	public static final int SYSZ_INS_CGIBNLH = 832;
+	public static final int SYSZ_INS_CGIT = 833;
+	public static final int SYSZ_INS_CGITE = 834;
+	public static final int SYSZ_INS_CGITH = 835;
+	public static final int SYSZ_INS_CGITHE = 836;
+	public static final int SYSZ_INS_CGITL = 837;
+	public static final int SYSZ_INS_CGITLE = 838;
+	public static final int SYSZ_INS_CGITLH = 839;
+	public static final int SYSZ_INS_CGITNE = 840;
+	public static final int SYSZ_INS_CGITNH = 841;
+	public static final int SYSZ_INS_CGITNHE = 842;
+	public static final int SYSZ_INS_CGITNL = 843;
+	public static final int SYSZ_INS_CGITNLE = 844;
+	public static final int SYSZ_INS_CGITNLH = 845;
+	public static final int SYSZ_INS_CGRB = 846;
+	public static final int SYSZ_INS_CGRBE = 847;
+	public static final int SYSZ_INS_CGRBH = 848;
+	public static final int SYSZ_INS_CGRBHE = 849;
+	public static final int SYSZ_INS_CGRBL = 850;
+	public static final int SYSZ_INS_CGRBLE = 851;
+	public static final int SYSZ_INS_CGRBLH = 852;
+	public static final int SYSZ_INS_CGRBNE = 853;
+	public static final int SYSZ_INS_CGRBNH = 854;
+	public static final int SYSZ_INS_CGRBNHE = 855;
+	public static final int SYSZ_INS_CGRBNL = 856;
+	public static final int SYSZ_INS_CGRBNLE = 857;
+	public static final int SYSZ_INS_CGRBNLH = 858;
+	public static final int SYSZ_INS_CGRT = 859;
+	public static final int SYSZ_INS_CGRTE = 860;
+	public static final int SYSZ_INS_CGRTH = 861;
+	public static final int SYSZ_INS_CGRTHE = 862;
+	public static final int SYSZ_INS_CGRTL = 863;
+	public static final int SYSZ_INS_CGRTLE = 864;
+	public static final int SYSZ_INS_CGRTLH = 865;
+	public static final int SYSZ_INS_CGRTNE = 866;
+	public static final int SYSZ_INS_CGRTNH = 867;
+	public static final int SYSZ_INS_CGRTNHE = 868;
+	public static final int SYSZ_INS_CGRTNL = 869;
+	public static final int SYSZ_INS_CGRTNLE = 870;
+	public static final int SYSZ_INS_CGRTNLH = 871;
+	public static final int SYSZ_INS_CGXBRA = 872;
+	public static final int SYSZ_INS_CGXR = 873;
+	public static final int SYSZ_INS_CGXTR = 874;
+	public static final int SYSZ_INS_CGXTRA = 875;
+	public static final int SYSZ_INS_CHHR = 876;
+	public static final int SYSZ_INS_CHLR = 877;
+	public static final int SYSZ_INS_CIB = 878;
+	public static final int SYSZ_INS_CIBE = 879;
+	public static final int SYSZ_INS_CIBH = 880;
+	public static final int SYSZ_INS_CIBHE = 881;
+	public static final int SYSZ_INS_CIBL = 882;
+	public static final int SYSZ_INS_CIBLE = 883;
+	public static final int SYSZ_INS_CIBLH = 884;
+	public static final int SYSZ_INS_CIBNE = 885;
+	public static final int SYSZ_INS_CIBNH = 886;
+	public static final int SYSZ_INS_CIBNHE = 887;
+	public static final int SYSZ_INS_CIBNL = 888;
+	public static final int SYSZ_INS_CIBNLE = 889;
+	public static final int SYSZ_INS_CIBNLH = 890;
+	public static final int SYSZ_INS_CIT = 891;
+	public static final int SYSZ_INS_CITE = 892;
+	public static final int SYSZ_INS_CITH = 893;
+	public static final int SYSZ_INS_CITHE = 894;
+	public static final int SYSZ_INS_CITL = 895;
+	public static final int SYSZ_INS_CITLE = 896;
+	public static final int SYSZ_INS_CITLH = 897;
+	public static final int SYSZ_INS_CITNE = 898;
+	public static final int SYSZ_INS_CITNH = 899;
+	public static final int SYSZ_INS_CITNHE = 900;
+	public static final int SYSZ_INS_CITNL = 901;
+	public static final int SYSZ_INS_CITNLE = 902;
+	public static final int SYSZ_INS_CITNLH = 903;
+	public static final int SYSZ_INS_CKSM = 904;
+	public static final int SYSZ_INS_CLCL = 905;
+	public static final int SYSZ_INS_CLCLE = 906;
+	public static final int SYSZ_INS_CLCLU = 907;
+	public static final int SYSZ_INS_CLFDTR = 908;
+	public static final int SYSZ_INS_CLFIT = 909;
+	public static final int SYSZ_INS_CLFITE = 910;
+	public static final int SYSZ_INS_CLFITH = 911;
+	public static final int SYSZ_INS_CLFITHE = 912;
+	public static final int SYSZ_INS_CLFITL = 913;
+	public static final int SYSZ_INS_CLFITLE = 914;
+	public static final int SYSZ_INS_CLFITLH = 915;
+	public static final int SYSZ_INS_CLFITNE = 916;
+	public static final int SYSZ_INS_CLFITNH = 917;
+	public static final int SYSZ_INS_CLFITNHE = 918;
+	public static final int SYSZ_INS_CLFITNL = 919;
+	public static final int SYSZ_INS_CLFITNLE = 920;
+	public static final int SYSZ_INS_CLFITNLH = 921;
+	public static final int SYSZ_INS_CLFXTR = 922;
+	public static final int SYSZ_INS_CLGDTR = 923;
+	public static final int SYSZ_INS_CLGIB = 924;
+	public static final int SYSZ_INS_CLGIBE = 925;
+	public static final int SYSZ_INS_CLGIBH = 926;
+	public static final int SYSZ_INS_CLGIBHE = 927;
+	public static final int SYSZ_INS_CLGIBL = 928;
+	public static final int SYSZ_INS_CLGIBLE = 929;
+	public static final int SYSZ_INS_CLGIBLH = 930;
+	public static final int SYSZ_INS_CLGIBNE = 931;
+	public static final int SYSZ_INS_CLGIBNH = 932;
+	public static final int SYSZ_INS_CLGIBNHE = 933;
+	public static final int SYSZ_INS_CLGIBNL = 934;
+	public static final int SYSZ_INS_CLGIBNLE = 935;
+	public static final int SYSZ_INS_CLGIBNLH = 936;
+	public static final int SYSZ_INS_CLGIT = 937;
+	public static final int SYSZ_INS_CLGITE = 938;
+	public static final int SYSZ_INS_CLGITH = 939;
+	public static final int SYSZ_INS_CLGITHE = 940;
+	public static final int SYSZ_INS_CLGITL = 941;
+	public static final int SYSZ_INS_CLGITLE = 942;
+	public static final int SYSZ_INS_CLGITLH = 943;
+	public static final int SYSZ_INS_CLGITNE = 944;
+	public static final int SYSZ_INS_CLGITNH = 945;
+	public static final int SYSZ_INS_CLGITNHE = 946;
+	public static final int SYSZ_INS_CLGITNL = 947;
+	public static final int SYSZ_INS_CLGITNLE = 948;
+	public static final int SYSZ_INS_CLGITNLH = 949;
+	public static final int SYSZ_INS_CLGRB = 950;
+	public static final int SYSZ_INS_CLGRBE = 951;
+	public static final int SYSZ_INS_CLGRBH = 952;
+	public static final int SYSZ_INS_CLGRBHE = 953;
+	public static final int SYSZ_INS_CLGRBL = 954;
+	public static final int SYSZ_INS_CLGRBLE = 955;
+	public static final int SYSZ_INS_CLGRBLH = 956;
+	public static final int SYSZ_INS_CLGRBNE = 957;
+	public static final int SYSZ_INS_CLGRBNH = 958;
+	public static final int SYSZ_INS_CLGRBNHE = 959;
+	public static final int SYSZ_INS_CLGRBNL = 960;
+	public static final int SYSZ_INS_CLGRBNLE = 961;
+	public static final int SYSZ_INS_CLGRBNLH = 962;
+	public static final int SYSZ_INS_CLGRT = 963;
+	public static final int SYSZ_INS_CLGRTE = 964;
+	public static final int SYSZ_INS_CLGRTH = 965;
+	public static final int SYSZ_INS_CLGRTHE = 966;
+	public static final int SYSZ_INS_CLGRTL = 967;
+	public static final int SYSZ_INS_CLGRTLE = 968;
+	public static final int SYSZ_INS_CLGRTLH = 969;
+	public static final int SYSZ_INS_CLGRTNE = 970;
+	public static final int SYSZ_INS_CLGRTNH = 971;
+	public static final int SYSZ_INS_CLGRTNHE = 972;
+	public static final int SYSZ_INS_CLGRTNL = 973;
+	public static final int SYSZ_INS_CLGRTNLE = 974;
+	public static final int SYSZ_INS_CLGRTNLH = 975;
+	public static final int SYSZ_INS_CLGT = 976;
+	public static final int SYSZ_INS_CLGTE = 977;
+	public static final int SYSZ_INS_CLGTH = 978;
+	public static final int SYSZ_INS_CLGTHE = 979;
+	public static final int SYSZ_INS_CLGTL = 980;
+	public static final int SYSZ_INS_CLGTLE = 981;
+	public static final int SYSZ_INS_CLGTLH = 982;
+	public static final int SYSZ_INS_CLGTNE = 983;
+	public static final int SYSZ_INS_CLGTNH = 984;
+	public static final int SYSZ_INS_CLGTNHE = 985;
+	public static final int SYSZ_INS_CLGTNL = 986;
+	public static final int SYSZ_INS_CLGTNLE = 987;
+	public static final int SYSZ_INS_CLGTNLH = 988;
+	public static final int SYSZ_INS_CLGXTR = 989;
+	public static final int SYSZ_INS_CLHHR = 990;
+	public static final int SYSZ_INS_CLHLR = 991;
+	public static final int SYSZ_INS_CLIB = 992;
+	public static final int SYSZ_INS_CLIBE = 993;
+	public static final int SYSZ_INS_CLIBH = 994;
+	public static final int SYSZ_INS_CLIBHE = 995;
+	public static final int SYSZ_INS_CLIBL = 996;
+	public static final int SYSZ_INS_CLIBLE = 997;
+	public static final int SYSZ_INS_CLIBLH = 998;
+	public static final int SYSZ_INS_CLIBNE = 999;
+	public static final int SYSZ_INS_CLIBNH = 1000;
+	public static final int SYSZ_INS_CLIBNHE = 1001;
+	public static final int SYSZ_INS_CLIBNL = 1002;
+	public static final int SYSZ_INS_CLIBNLE = 1003;
+	public static final int SYSZ_INS_CLIBNLH = 1004;
+	public static final int SYSZ_INS_CLM = 1005;
+	public static final int SYSZ_INS_CLMH = 1006;
+	public static final int SYSZ_INS_CLMY = 1007;
+	public static final int SYSZ_INS_CLRB = 1008;
+	public static final int SYSZ_INS_CLRBE = 1009;
+	public static final int SYSZ_INS_CLRBH = 1010;
+	public static final int SYSZ_INS_CLRBHE = 1011;
+	public static final int SYSZ_INS_CLRBL = 1012;
+	public static final int SYSZ_INS_CLRBLE = 1013;
+	public static final int SYSZ_INS_CLRBLH = 1014;
+	public static final int SYSZ_INS_CLRBNE = 1015;
+	public static final int SYSZ_INS_CLRBNH = 1016;
+	public static final int SYSZ_INS_CLRBNHE = 1017;
+	public static final int SYSZ_INS_CLRBNL = 1018;
+	public static final int SYSZ_INS_CLRBNLE = 1019;
+	public static final int SYSZ_INS_CLRBNLH = 1020;
+	public static final int SYSZ_INS_CLRT = 1021;
+	public static final int SYSZ_INS_CLRTE = 1022;
+	public static final int SYSZ_INS_CLRTH = 1023;
+	public static final int SYSZ_INS_CLRTHE = 1024;
+	public static final int SYSZ_INS_CLRTL = 1025;
+	public static final int SYSZ_INS_CLRTLE = 1026;
+	public static final int SYSZ_INS_CLRTLH = 1027;
+	public static final int SYSZ_INS_CLRTNE = 1028;
+	public static final int SYSZ_INS_CLRTNH = 1029;
+	public static final int SYSZ_INS_CLRTNHE = 1030;
+	public static final int SYSZ_INS_CLRTNL = 1031;
+	public static final int SYSZ_INS_CLRTNLE = 1032;
+	public static final int SYSZ_INS_CLRTNLH = 1033;
+	public static final int SYSZ_INS_CLT = 1034;
+	public static final int SYSZ_INS_CLTE = 1035;
+	public static final int SYSZ_INS_CLTH = 1036;
+	public static final int SYSZ_INS_CLTHE = 1037;
+	public static final int SYSZ_INS_CLTL = 1038;
+	public static final int SYSZ_INS_CLTLE = 1039;
+	public static final int SYSZ_INS_CLTLH = 1040;
+	public static final int SYSZ_INS_CLTNE = 1041;
+	public static final int SYSZ_INS_CLTNH = 1042;
+	public static final int SYSZ_INS_CLTNHE = 1043;
+	public static final int SYSZ_INS_CLTNL = 1044;
+	public static final int SYSZ_INS_CLTNLE = 1045;
+	public static final int SYSZ_INS_CLTNLH = 1046;
+	public static final int SYSZ_INS_CMPSC = 1047;
+	public static final int SYSZ_INS_CP = 1048;
+	public static final int SYSZ_INS_CPDT = 1049;
+	public static final int SYSZ_INS_CPXT = 1050;
+	public static final int SYSZ_INS_CPYA = 1051;
+	public static final int SYSZ_INS_CRB = 1052;
+	public static final int SYSZ_INS_CRBE = 1053;
+	public static final int SYSZ_INS_CRBH = 1054;
+	public static final int SYSZ_INS_CRBHE = 1055;
+	public static final int SYSZ_INS_CRBL = 1056;
+	public static final int SYSZ_INS_CRBLE = 1057;
+	public static final int SYSZ_INS_CRBLH = 1058;
+	public static final int SYSZ_INS_CRBNE = 1059;
+	public static final int SYSZ_INS_CRBNH = 1060;
+	public static final int SYSZ_INS_CRBNHE = 1061;
+	public static final int SYSZ_INS_CRBNL = 1062;
+	public static final int SYSZ_INS_CRBNLE = 1063;
+	public static final int SYSZ_INS_CRBNLH = 1064;
+	public static final int SYSZ_INS_CRDTE = 1065;
+	public static final int SYSZ_INS_CRT = 1066;
+	public static final int SYSZ_INS_CRTE = 1067;
+	public static final int SYSZ_INS_CRTH = 1068;
+	public static final int SYSZ_INS_CRTHE = 1069;
+	public static final int SYSZ_INS_CRTL = 1070;
+	public static final int SYSZ_INS_CRTLE = 1071;
+	public static final int SYSZ_INS_CRTLH = 1072;
+	public static final int SYSZ_INS_CRTNE = 1073;
+	public static final int SYSZ_INS_CRTNH = 1074;
+	public static final int SYSZ_INS_CRTNHE = 1075;
+	public static final int SYSZ_INS_CRTNL = 1076;
+	public static final int SYSZ_INS_CRTNLE = 1077;
+	public static final int SYSZ_INS_CRTNLH = 1078;
+	public static final int SYSZ_INS_CSCH = 1079;
+	public static final int SYSZ_INS_CSDTR = 1080;
+	public static final int SYSZ_INS_CSP = 1081;
+	public static final int SYSZ_INS_CSPG = 1082;
+	public static final int SYSZ_INS_CSST = 1083;
+	public static final int SYSZ_INS_CSXTR = 1084;
+	public static final int SYSZ_INS_CU12 = 1085;
+	public static final int SYSZ_INS_CU14 = 1086;
+	public static final int SYSZ_INS_CU21 = 1087;
+	public static final int SYSZ_INS_CU24 = 1088;
+	public static final int SYSZ_INS_CU41 = 1089;
+	public static final int SYSZ_INS_CU42 = 1090;
+	public static final int SYSZ_INS_CUDTR = 1091;
+	public static final int SYSZ_INS_CUSE = 1092;
+	public static final int SYSZ_INS_CUTFU = 1093;
+	public static final int SYSZ_INS_CUUTF = 1094;
+	public static final int SYSZ_INS_CUXTR = 1095;
+	public static final int SYSZ_INS_CVB = 1096;
+	public static final int SYSZ_INS_CVBG = 1097;
+	public static final int SYSZ_INS_CVBY = 1098;
+	public static final int SYSZ_INS_CVD = 1099;
+	public static final int SYSZ_INS_CVDG = 1100;
+	public static final int SYSZ_INS_CVDY = 1101;
+	public static final int SYSZ_INS_CXFBRA = 1102;
+	public static final int SYSZ_INS_CXFR = 1103;
+	public static final int SYSZ_INS_CXFTR = 1104;
+	public static final int SYSZ_INS_CXGBRA = 1105;
+	public static final int SYSZ_INS_CXGR = 1106;
+	public static final int SYSZ_INS_CXGTR = 1107;
+	public static final int SYSZ_INS_CXGTRA = 1108;
+	public static final int SYSZ_INS_CXLFTR = 1109;
+	public static final int SYSZ_INS_CXLGTR = 1110;
+	public static final int SYSZ_INS_CXPT = 1111;
+	public static final int SYSZ_INS_CXR = 1112;
+	public static final int SYSZ_INS_CXSTR = 1113;
+	public static final int SYSZ_INS_CXTR = 1114;
+	public static final int SYSZ_INS_CXUTR = 1115;
+	public static final int SYSZ_INS_CXZT = 1116;
+	public static final int SYSZ_INS_CZDT = 1117;
+	public static final int SYSZ_INS_CZXT = 1118;
+	public static final int SYSZ_INS_D = 1119;
+	public static final int SYSZ_INS_DD = 1120;
+	public static final int SYSZ_INS_DDR = 1121;
+	public static final int SYSZ_INS_DDTR = 1122;
+	public static final int SYSZ_INS_DDTRA = 1123;
+	public static final int SYSZ_INS_DE = 1124;
+	public static final int SYSZ_INS_DER = 1125;
+	public static final int SYSZ_INS_DIAG = 1126;
+	public static final int SYSZ_INS_DIDBR = 1127;
+	public static final int SYSZ_INS_DIEBR = 1128;
+	public static final int SYSZ_INS_DP = 1129;
+	public static final int SYSZ_INS_DR = 1130;
+	public static final int SYSZ_INS_DXR = 1131;
+	public static final int SYSZ_INS_DXTR = 1132;
+	public static final int SYSZ_INS_DXTRA = 1133;
+	public static final int SYSZ_INS_ECAG = 1134;
+	public static final int SYSZ_INS_ECCTR = 1135;
+	public static final int SYSZ_INS_ECPGA = 1136;
+	public static final int SYSZ_INS_ECTG = 1137;
+	public static final int SYSZ_INS_ED = 1138;
+	public static final int SYSZ_INS_EDMK = 1139;
+	public static final int SYSZ_INS_EEDTR = 1140;
+	public static final int SYSZ_INS_EEXTR = 1141;
+	public static final int SYSZ_INS_EFPC = 1142;
+	public static final int SYSZ_INS_EPAIR = 1143;
+	public static final int SYSZ_INS_EPAR = 1144;
+	public static final int SYSZ_INS_EPCTR = 1145;
+	public static final int SYSZ_INS_EPSW = 1146;
+	public static final int SYSZ_INS_EREG = 1147;
+	public static final int SYSZ_INS_EREGG = 1148;
+	public static final int SYSZ_INS_ESAIR = 1149;
+	public static final int SYSZ_INS_ESAR = 1150;
+	public static final int SYSZ_INS_ESDTR = 1151;
+	public static final int SYSZ_INS_ESEA = 1152;
+	public static final int SYSZ_INS_ESTA = 1153;
+	public static final int SYSZ_INS_ESXTR = 1154;
+	public static final int SYSZ_INS_ETND = 1155;
+	public static final int SYSZ_INS_EX = 1156;
+	public static final int SYSZ_INS_EXRL = 1157;
+	public static final int SYSZ_INS_FIDR = 1158;
+	public static final int SYSZ_INS_FIDTR = 1159;
+	public static final int SYSZ_INS_FIER = 1160;
+	public static final int SYSZ_INS_FIXR = 1161;
+	public static final int SYSZ_INS_FIXTR = 1162;
+	public static final int SYSZ_INS_HDR = 1163;
+	public static final int SYSZ_INS_HER = 1164;
+	public static final int SYSZ_INS_HSCH = 1165;
+	public static final int SYSZ_INS_IAC = 1166;
+	public static final int SYSZ_INS_ICM = 1167;
+	public static final int SYSZ_INS_ICMH = 1168;
+	public static final int SYSZ_INS_ICMY = 1169;
+	public static final int SYSZ_INS_IDTE = 1170;
+	public static final int SYSZ_INS_IEDTR = 1171;
+	public static final int SYSZ_INS_IEXTR = 1172;
+	public static final int SYSZ_INS_IPK = 1173;
+	public static final int SYSZ_INS_IPTE = 1174;
+	public static final int SYSZ_INS_IRBM = 1175;
+	public static final int SYSZ_INS_ISKE = 1176;
+	public static final int SYSZ_INS_IVSK = 1177;
+	public static final int SYSZ_INS_JGM = 1178;
+	public static final int SYSZ_INS_JGNM = 1179;
+	public static final int SYSZ_INS_JGNP = 1180;
+	public static final int SYSZ_INS_JGNZ = 1181;
+	public static final int SYSZ_INS_JGP = 1182;
+	public static final int SYSZ_INS_JGZ = 1183;
+	public static final int SYSZ_INS_JM = 1184;
+	public static final int SYSZ_INS_JNM = 1185;
+	public static final int SYSZ_INS_JNP = 1186;
+	public static final int SYSZ_INS_JNZ = 1187;
+	public static final int SYSZ_INS_JP = 1188;
+	public static final int SYSZ_INS_JZ = 1189;
+	public static final int SYSZ_INS_KDB = 1190;
+	public static final int SYSZ_INS_KDBR = 1191;
+	public static final int SYSZ_INS_KDTR = 1192;
+	public static final int SYSZ_INS_KEB = 1193;
+	public static final int SYSZ_INS_KEBR = 1194;
+	public static final int SYSZ_INS_KIMD = 1195;
+	public static final int SYSZ_INS_KLMD = 1196;
+	public static final int SYSZ_INS_KM = 1197;
+	public static final int SYSZ_INS_KMA = 1198;
+	public static final int SYSZ_INS_KMAC = 1199;
+	public static final int SYSZ_INS_KMC = 1200;
+	public static final int SYSZ_INS_KMCTR = 1201;
+	public static final int SYSZ_INS_KMF = 1202;
+	public static final int SYSZ_INS_KMO = 1203;
+	public static final int SYSZ_INS_KXBR = 1204;
+	public static final int SYSZ_INS_KXTR = 1205;
+	public static final int SYSZ_INS_LAE = 1206;
+	public static final int SYSZ_INS_LAEY = 1207;
+	public static final int SYSZ_INS_LAM = 1208;
+	public static final int SYSZ_INS_LAMY = 1209;
+	public static final int SYSZ_INS_LASP = 1210;
+	public static final int SYSZ_INS_LAT = 1211;
+	public static final int SYSZ_INS_LCBB = 1212;
+	public static final int SYSZ_INS_LCCTL = 1213;
+	public static final int SYSZ_INS_LCDFR = 1214;
+	public static final int SYSZ_INS_LCDR = 1215;
+	public static final int SYSZ_INS_LCER = 1216;
+	public static final int SYSZ_INS_LCTL = 1217;
+	public static final int SYSZ_INS_LCTLG = 1218;
+	public static final int SYSZ_INS_LCXR = 1219;
+	public static final int SYSZ_INS_LDE = 1220;
+	public static final int SYSZ_INS_LDER = 1221;
+	public static final int SYSZ_INS_LDETR = 1222;
+	public static final int SYSZ_INS_LDXR = 1223;
+	public static final int SYSZ_INS_LDXTR = 1224;
+	public static final int SYSZ_INS_LEDR = 1225;
+	public static final int SYSZ_INS_LEDTR = 1226;
+	public static final int SYSZ_INS_LEXR = 1227;
+	public static final int SYSZ_INS_LFAS = 1228;
+	public static final int SYSZ_INS_LFHAT = 1229;
+	public static final int SYSZ_INS_LFPC = 1230;
+	public static final int SYSZ_INS_LGAT = 1231;
+	public static final int SYSZ_INS_LGG = 1232;
+	public static final int SYSZ_INS_LGSC = 1233;
+	public static final int SYSZ_INS_LLGFAT = 1234;
+	public static final int SYSZ_INS_LLGFSG = 1235;
+	public static final int SYSZ_INS_LLGT = 1236;
+	public static final int SYSZ_INS_LLGTAT = 1237;
+	public static final int SYSZ_INS_LLGTR = 1238;
+	public static final int SYSZ_INS_LLZRGF = 1239;
+	public static final int SYSZ_INS_LM = 1240;
+	public static final int SYSZ_INS_LMD = 1241;
+	public static final int SYSZ_INS_LMH = 1242;
+	public static final int SYSZ_INS_LMY = 1243;
+	public static final int SYSZ_INS_LNDFR = 1244;
+	public static final int SYSZ_INS_LNDR = 1245;
+	public static final int SYSZ_INS_LNER = 1246;
+	public static final int SYSZ_INS_LNXR = 1247;
+	public static final int SYSZ_INS_LOCFH = 1248;
+	public static final int SYSZ_INS_LOCFHE = 1249;
+	public static final int SYSZ_INS_LOCFHH = 1250;
+	public static final int SYSZ_INS_LOCFHHE = 1251;
+	public static final int SYSZ_INS_LOCFHL = 1252;
+	public static final int SYSZ_INS_LOCFHLE = 1253;
+	public static final int SYSZ_INS_LOCFHLH = 1254;
+	public static final int SYSZ_INS_LOCFHM = 1255;
+	public static final int SYSZ_INS_LOCFHNE = 1256;
+	public static final int SYSZ_INS_LOCFHNH = 1257;
+	public static final int SYSZ_INS_LOCFHNHE = 1258;
+	public static final int SYSZ_INS_LOCFHNL = 1259;
+	public static final int SYSZ_INS_LOCFHNLE = 1260;
+	public static final int SYSZ_INS_LOCFHNLH = 1261;
+	public static final int SYSZ_INS_LOCFHNM = 1262;
+	public static final int SYSZ_INS_LOCFHNO = 1263;
+	public static final int SYSZ_INS_LOCFHNP = 1264;
+	public static final int SYSZ_INS_LOCFHNZ = 1265;
+	public static final int SYSZ_INS_LOCFHO = 1266;
+	public static final int SYSZ_INS_LOCFHP = 1267;
+	public static final int SYSZ_INS_LOCFHR = 1268;
+	public static final int SYSZ_INS_LOCFHRE = 1269;
+	public static final int SYSZ_INS_LOCFHRH = 1270;
+	public static final int SYSZ_INS_LOCFHRHE = 1271;
+	public static final int SYSZ_INS_LOCFHRL = 1272;
+	public static final int SYSZ_INS_LOCFHRLE = 1273;
+	public static final int SYSZ_INS_LOCFHRLH = 1274;
+	public static final int SYSZ_INS_LOCFHRM = 1275;
+	public static final int SYSZ_INS_LOCFHRNE = 1276;
+	public static final int SYSZ_INS_LOCFHRNH = 1277;
+	public static final int SYSZ_INS_LOCFHRNHE = 1278;
+	public static final int SYSZ_INS_LOCFHRNL = 1279;
+	public static final int SYSZ_INS_LOCFHRNLE = 1280;
+	public static final int SYSZ_INS_LOCFHRNLH = 1281;
+	public static final int SYSZ_INS_LOCFHRNM = 1282;
+	public static final int SYSZ_INS_LOCFHRNO = 1283;
+	public static final int SYSZ_INS_LOCFHRNP = 1284;
+	public static final int SYSZ_INS_LOCFHRNZ = 1285;
+	public static final int SYSZ_INS_LOCFHRO = 1286;
+	public static final int SYSZ_INS_LOCFHRP = 1287;
+	public static final int SYSZ_INS_LOCFHRZ = 1288;
+	public static final int SYSZ_INS_LOCFHZ = 1289;
+	public static final int SYSZ_INS_LOCGHI = 1290;
+	public static final int SYSZ_INS_LOCGHIE = 1291;
+	public static final int SYSZ_INS_LOCGHIH = 1292;
+	public static final int SYSZ_INS_LOCGHIHE = 1293;
+	public static final int SYSZ_INS_LOCGHIL = 1294;
+	public static final int SYSZ_INS_LOCGHILE = 1295;
+	public static final int SYSZ_INS_LOCGHILH = 1296;
+	public static final int SYSZ_INS_LOCGHIM = 1297;
+	public static final int SYSZ_INS_LOCGHINE = 1298;
+	public static final int SYSZ_INS_LOCGHINH = 1299;
+	public static final int SYSZ_INS_LOCGHINHE = 1300;
+	public static final int SYSZ_INS_LOCGHINL = 1301;
+	public static final int SYSZ_INS_LOCGHINLE = 1302;
+	public static final int SYSZ_INS_LOCGHINLH = 1303;
+	public static final int SYSZ_INS_LOCGHINM = 1304;
+	public static final int SYSZ_INS_LOCGHINO = 1305;
+	public static final int SYSZ_INS_LOCGHINP = 1306;
+	public static final int SYSZ_INS_LOCGHINZ = 1307;
+	public static final int SYSZ_INS_LOCGHIO = 1308;
+	public static final int SYSZ_INS_LOCGHIP = 1309;
+	public static final int SYSZ_INS_LOCGHIZ = 1310;
+	public static final int SYSZ_INS_LOCGM = 1311;
+	public static final int SYSZ_INS_LOCGNM = 1312;
+	public static final int SYSZ_INS_LOCGNP = 1313;
+	public static final int SYSZ_INS_LOCGNZ = 1314;
+	public static final int SYSZ_INS_LOCGP = 1315;
+	public static final int SYSZ_INS_LOCGRM = 1316;
+	public static final int SYSZ_INS_LOCGRNM = 1317;
+	public static final int SYSZ_INS_LOCGRNP = 1318;
+	public static final int SYSZ_INS_LOCGRNZ = 1319;
+	public static final int SYSZ_INS_LOCGRP = 1320;
+	public static final int SYSZ_INS_LOCGRZ = 1321;
+	public static final int SYSZ_INS_LOCGZ = 1322;
+	public static final int SYSZ_INS_LOCHHI = 1323;
+	public static final int SYSZ_INS_LOCHHIE = 1324;
+	public static final int SYSZ_INS_LOCHHIH = 1325;
+	public static final int SYSZ_INS_LOCHHIHE = 1326;
+	public static final int SYSZ_INS_LOCHHIL = 1327;
+	public static final int SYSZ_INS_LOCHHILE = 1328;
+	public static final int SYSZ_INS_LOCHHILH = 1329;
+	public static final int SYSZ_INS_LOCHHIM = 1330;
+	public static final int SYSZ_INS_LOCHHINE = 1331;
+	public static final int SYSZ_INS_LOCHHINH = 1332;
+	public static final int SYSZ_INS_LOCHHINHE = 1333;
+	public static final int SYSZ_INS_LOCHHINL = 1334;
+	public static final int SYSZ_INS_LOCHHINLE = 1335;
+	public static final int SYSZ_INS_LOCHHINLH = 1336;
+	public static final int SYSZ_INS_LOCHHINM = 1337;
+	public static final int SYSZ_INS_LOCHHINO = 1338;
+	public static final int SYSZ_INS_LOCHHINP = 1339;
+	public static final int SYSZ_INS_LOCHHINZ = 1340;
+	public static final int SYSZ_INS_LOCHHIO = 1341;
+	public static final int SYSZ_INS_LOCHHIP = 1342;
+	public static final int SYSZ_INS_LOCHHIZ = 1343;
+	public static final int SYSZ_INS_LOCHI = 1344;
+	public static final int SYSZ_INS_LOCHIE = 1345;
+	public static final int SYSZ_INS_LOCHIH = 1346;
+	public static final int SYSZ_INS_LOCHIHE = 1347;
+	public static final int SYSZ_INS_LOCHIL = 1348;
+	public static final int SYSZ_INS_LOCHILE = 1349;
+	public static final int SYSZ_INS_LOCHILH = 1350;
+	public static final int SYSZ_INS_LOCHIM = 1351;
+	public static final int SYSZ_INS_LOCHINE = 1352;
+	public static final int SYSZ_INS_LOCHINH = 1353;
+	public static final int SYSZ_INS_LOCHINHE = 1354;
+	public static final int SYSZ_INS_LOCHINL = 1355;
+	public static final int SYSZ_INS_LOCHINLE = 1356;
+	public static final int SYSZ_INS_LOCHINLH = 1357;
+	public static final int SYSZ_INS_LOCHINM = 1358;
+	public static final int SYSZ_INS_LOCHINO = 1359;
+	public static final int SYSZ_INS_LOCHINP = 1360;
+	public static final int SYSZ_INS_LOCHINZ = 1361;
+	public static final int SYSZ_INS_LOCHIO = 1362;
+	public static final int SYSZ_INS_LOCHIP = 1363;
+	public static final int SYSZ_INS_LOCHIZ = 1364;
+	public static final int SYSZ_INS_LOCM = 1365;
+	public static final int SYSZ_INS_LOCNM = 1366;
+	public static final int SYSZ_INS_LOCNP = 1367;
+	public static final int SYSZ_INS_LOCNZ = 1368;
+	public static final int SYSZ_INS_LOCP = 1369;
+	public static final int SYSZ_INS_LOCRM = 1370;
+	public static final int SYSZ_INS_LOCRNM = 1371;
+	public static final int SYSZ_INS_LOCRNP = 1372;
+	public static final int SYSZ_INS_LOCRNZ = 1373;
+	public static final int SYSZ_INS_LOCRP = 1374;
+	public static final int SYSZ_INS_LOCRZ = 1375;
+	public static final int SYSZ_INS_LOCZ = 1376;
+	public static final int SYSZ_INS_LPCTL = 1377;
+	public static final int SYSZ_INS_LPD = 1378;
+	public static final int SYSZ_INS_LPDFR = 1379;
+	public static final int SYSZ_INS_LPDG = 1380;
+	public static final int SYSZ_INS_LPDR = 1381;
+	public static final int SYSZ_INS_LPER = 1382;
+	public static final int SYSZ_INS_LPP = 1383;
+	public static final int SYSZ_INS_LPQ = 1384;
+	public static final int SYSZ_INS_LPSW = 1385;
+	public static final int SYSZ_INS_LPSWE = 1386;
+	public static final int SYSZ_INS_LPTEA = 1387;
+	public static final int SYSZ_INS_LPXR = 1388;
+	public static final int SYSZ_INS_LRA = 1389;
+	public static final int SYSZ_INS_LRAG = 1390;
+	public static final int SYSZ_INS_LRAY = 1391;
+	public static final int SYSZ_INS_LRDR = 1392;
+	public static final int SYSZ_INS_LRER = 1393;
+	public static final int SYSZ_INS_LRVH = 1394;
+	public static final int SYSZ_INS_LSCTL = 1395;
+	public static final int SYSZ_INS_LTDR = 1396;
+	public static final int SYSZ_INS_LTDTR = 1397;
+	public static final int SYSZ_INS_LTER = 1398;
+	public static final int SYSZ_INS_LTXR = 1399;
+	public static final int SYSZ_INS_LTXTR = 1400;
+	public static final int SYSZ_INS_LURA = 1401;
+	public static final int SYSZ_INS_LURAG = 1402;
+	public static final int SYSZ_INS_LXD = 1403;
+	public static final int SYSZ_INS_LXDR = 1404;
+	public static final int SYSZ_INS_LXDTR = 1405;
+	public static final int SYSZ_INS_LXE = 1406;
+	public static final int SYSZ_INS_LXER = 1407;
+	public static final int SYSZ_INS_LZRF = 1408;
+	public static final int SYSZ_INS_LZRG = 1409;
+	public static final int SYSZ_INS_M = 1410;
+	public static final int SYSZ_INS_MAD = 1411;
+	public static final int SYSZ_INS_MADR = 1412;
+	public static final int SYSZ_INS_MAE = 1413;
+	public static final int SYSZ_INS_MAER = 1414;
+	public static final int SYSZ_INS_MAY = 1415;
+	public static final int SYSZ_INS_MAYH = 1416;
+	public static final int SYSZ_INS_MAYHR = 1417;
+	public static final int SYSZ_INS_MAYL = 1418;
+	public static final int SYSZ_INS_MAYLR = 1419;
+	public static final int SYSZ_INS_MAYR = 1420;
+	public static final int SYSZ_INS_MC = 1421;
+	public static final int SYSZ_INS_MD = 1422;
+	public static final int SYSZ_INS_MDE = 1423;
+	public static final int SYSZ_INS_MDER = 1424;
+	public static final int SYSZ_INS_MDR = 1425;
+	public static final int SYSZ_INS_MDTR = 1426;
+	public static final int SYSZ_INS_MDTRA = 1427;
+	public static final int SYSZ_INS_ME = 1428;
+	public static final int SYSZ_INS_MEE = 1429;
+	public static final int SYSZ_INS_MEER = 1430;
+	public static final int SYSZ_INS_MER = 1431;
+	public static final int SYSZ_INS_MFY = 1432;
+	public static final int SYSZ_INS_MG = 1433;
+	public static final int SYSZ_INS_MGH = 1434;
+	public static final int SYSZ_INS_MGRK = 1435;
+	public static final int SYSZ_INS_ML = 1436;
+	public static final int SYSZ_INS_MLR = 1437;
+	public static final int SYSZ_INS_MP = 1438;
+	public static final int SYSZ_INS_MR = 1439;
+	public static final int SYSZ_INS_MSC = 1440;
+	public static final int SYSZ_INS_MSCH = 1441;
+	public static final int SYSZ_INS_MSD = 1442;
+	public static final int SYSZ_INS_MSDR = 1443;
+	public static final int SYSZ_INS_MSE = 1444;
+	public static final int SYSZ_INS_MSER = 1445;
+	public static final int SYSZ_INS_MSGC = 1446;
+	public static final int SYSZ_INS_MSGRKC = 1447;
+	public static final int SYSZ_INS_MSRKC = 1448;
+	public static final int SYSZ_INS_MSTA = 1449;
+	public static final int SYSZ_INS_MVCDK = 1450;
+	public static final int SYSZ_INS_MVCIN = 1451;
+	public static final int SYSZ_INS_MVCK = 1452;
+	public static final int SYSZ_INS_MVCL = 1453;
+	public static final int SYSZ_INS_MVCLE = 1454;
+	public static final int SYSZ_INS_MVCLU = 1455;
+	public static final int SYSZ_INS_MVCOS = 1456;
+	public static final int SYSZ_INS_MVCP = 1457;
+	public static final int SYSZ_INS_MVCS = 1458;
+	public static final int SYSZ_INS_MVCSK = 1459;
+	public static final int SYSZ_INS_MVN = 1460;
+	public static final int SYSZ_INS_MVO = 1461;
+	public static final int SYSZ_INS_MVPG = 1462;
+	public static final int SYSZ_INS_MVZ = 1463;
+	public static final int SYSZ_INS_MXD = 1464;
+	public static final int SYSZ_INS_MXDR = 1465;
+	public static final int SYSZ_INS_MXR = 1466;
+	public static final int SYSZ_INS_MXTR = 1467;
+	public static final int SYSZ_INS_MXTRA = 1468;
+	public static final int SYSZ_INS_MY = 1469;
+	public static final int SYSZ_INS_MYH = 1470;
+	public static final int SYSZ_INS_MYHR = 1471;
+	public static final int SYSZ_INS_MYL = 1472;
+	public static final int SYSZ_INS_MYLR = 1473;
+	public static final int SYSZ_INS_MYR = 1474;
+	public static final int SYSZ_INS_NIAI = 1475;
+	public static final int SYSZ_INS_NTSTG = 1476;
+	public static final int SYSZ_INS_PACK = 1477;
+	public static final int SYSZ_INS_PALB = 1478;
+	public static final int SYSZ_INS_PC = 1479;
+	public static final int SYSZ_INS_PCC = 1480;
+	public static final int SYSZ_INS_PCKMO = 1481;
+	public static final int SYSZ_INS_PFMF = 1482;
+	public static final int SYSZ_INS_PFPO = 1483;
+	public static final int SYSZ_INS_PGIN = 1484;
+	public static final int SYSZ_INS_PGOUT = 1485;
+	public static final int SYSZ_INS_PKA = 1486;
+	public static final int SYSZ_INS_PKU = 1487;
+	public static final int SYSZ_INS_PLO = 1488;
+	public static final int SYSZ_INS_POPCNT = 1489;
+	public static final int SYSZ_INS_PPA = 1490;
+	public static final int SYSZ_INS_PPNO = 1491;
+	public static final int SYSZ_INS_PR = 1492;
+	public static final int SYSZ_INS_PRNO = 1493;
+	public static final int SYSZ_INS_PT = 1494;
+	public static final int SYSZ_INS_PTF = 1495;
+	public static final int SYSZ_INS_PTFF = 1496;
+	public static final int SYSZ_INS_PTI = 1497;
+	public static final int SYSZ_INS_PTLB = 1498;
+	public static final int SYSZ_INS_QADTR = 1499;
+	public static final int SYSZ_INS_QAXTR = 1500;
+	public static final int SYSZ_INS_QCTRI = 1501;
+	public static final int SYSZ_INS_QSI = 1502;
+	public static final int SYSZ_INS_RCHP = 1503;
+	public static final int SYSZ_INS_RISBGN = 1504;
+	public static final int SYSZ_INS_RP = 1505;
+	public static final int SYSZ_INS_RRBE = 1506;
+	public static final int SYSZ_INS_RRBM = 1507;
+	public static final int SYSZ_INS_RRDTR = 1508;
+	public static final int SYSZ_INS_RRXTR = 1509;
+	public static final int SYSZ_INS_RSCH = 1510;
+	public static final int SYSZ_INS_SAC = 1511;
+	public static final int SYSZ_INS_SACF = 1512;
+	public static final int SYSZ_INS_SAL = 1513;
+	public static final int SYSZ_INS_SAM24 = 1514;
+	public static final int SYSZ_INS_SAM31 = 1515;
+	public static final int SYSZ_INS_SAM64 = 1516;
+	public static final int SYSZ_INS_SAR = 1517;
+	public static final int SYSZ_INS_SCCTR = 1518;
+	public static final int SYSZ_INS_SCHM = 1519;
+	public static final int SYSZ_INS_SCK = 1520;
+	public static final int SYSZ_INS_SCKC = 1521;
+	public static final int SYSZ_INS_SCKPF = 1522;
+	public static final int SYSZ_INS_SD = 1523;
+	public static final int SYSZ_INS_SDR = 1524;
+	public static final int SYSZ_INS_SDTR = 1525;
+	public static final int SYSZ_INS_SDTRA = 1526;
+	public static final int SYSZ_INS_SE = 1527;
+	public static final int SYSZ_INS_SER = 1528;
+	public static final int SYSZ_INS_SFASR = 1529;
+	public static final int SYSZ_INS_SFPC = 1530;
+	public static final int SYSZ_INS_SGH = 1531;
+	public static final int SYSZ_INS_SHHHR = 1532;
+	public static final int SYSZ_INS_SHHLR = 1533;
+	public static final int SYSZ_INS_SIE = 1534;
+	public static final int SYSZ_INS_SIGA = 1535;
+	public static final int SYSZ_INS_SIGP = 1536;
+	public static final int SYSZ_INS_SLA = 1537;
+	public static final int SYSZ_INS_SLAG = 1538;
+	public static final int SYSZ_INS_SLAK = 1539;
+	public static final int SYSZ_INS_SLDA = 1540;
+	public static final int SYSZ_INS_SLDL = 1541;
+	public static final int SYSZ_INS_SLDT = 1542;
+	public static final int SYSZ_INS_SLHHHR = 1543;
+	public static final int SYSZ_INS_SLHHLR = 1544;
+	public static final int SYSZ_INS_SLXT = 1545;
+	public static final int SYSZ_INS_SP = 1546;
+	public static final int SYSZ_INS_SPCTR = 1547;
+	public static final int SYSZ_INS_SPKA = 1548;
+	public static final int SYSZ_INS_SPM = 1549;
+	public static final int SYSZ_INS_SPT = 1550;
+	public static final int SYSZ_INS_SPX = 1551;
+	public static final int SYSZ_INS_SQD = 1552;
+	public static final int SYSZ_INS_SQDR = 1553;
+	public static final int SYSZ_INS_SQE = 1554;
+	public static final int SYSZ_INS_SQER = 1555;
+	public static final int SYSZ_INS_SQXR = 1556;
+	public static final int SYSZ_INS_SRDA = 1557;
+	public static final int SYSZ_INS_SRDL = 1558;
+	public static final int SYSZ_INS_SRDT = 1559;
+	public static final int SYSZ_INS_SRNM = 1560;
+	public static final int SYSZ_INS_SRNMB = 1561;
+	public static final int SYSZ_INS_SRNMT = 1562;
+	public static final int SYSZ_INS_SRP = 1563;
+	public static final int SYSZ_INS_SRSTU = 1564;
+	public static final int SYSZ_INS_SRXT = 1565;
+	public static final int SYSZ_INS_SSAIR = 1566;
+	public static final int SYSZ_INS_SSAR = 1567;
+	public static final int SYSZ_INS_SSCH = 1568;
+	public static final int SYSZ_INS_SSKE = 1569;
+	public static final int SYSZ_INS_SSM = 1570;
+	public static final int SYSZ_INS_STAM = 1571;
+	public static final int SYSZ_INS_STAMY = 1572;
+	public static final int SYSZ_INS_STAP = 1573;
+	public static final int SYSZ_INS_STCK = 1574;
+	public static final int SYSZ_INS_STCKC = 1575;
+	public static final int SYSZ_INS_STCKE = 1576;
+	public static final int SYSZ_INS_STCKF = 1577;
+	public static final int SYSZ_INS_STCM = 1578;
+	public static final int SYSZ_INS_STCMH = 1579;
+	public static final int SYSZ_INS_STCMY = 1580;
+	public static final int SYSZ_INS_STCPS = 1581;
+	public static final int SYSZ_INS_STCRW = 1582;
+	public static final int SYSZ_INS_STCTG = 1583;
+	public static final int SYSZ_INS_STCTL = 1584;
+	public static final int SYSZ_INS_STFL = 1585;
+	public static final int SYSZ_INS_STFLE = 1586;
+	public static final int SYSZ_INS_STFPC = 1587;
+	public static final int SYSZ_INS_STGSC = 1588;
+	public static final int SYSZ_INS_STIDP = 1589;
+	public static final int SYSZ_INS_STM = 1590;
+	public static final int SYSZ_INS_STMH = 1591;
+	public static final int SYSZ_INS_STMY = 1592;
+	public static final int SYSZ_INS_STNSM = 1593;
+	public static final int SYSZ_INS_STOCFH = 1594;
+	public static final int SYSZ_INS_STOCFHE = 1595;
+	public static final int SYSZ_INS_STOCFHH = 1596;
+	public static final int SYSZ_INS_STOCFHHE = 1597;
+	public static final int SYSZ_INS_STOCFHL = 1598;
+	public static final int SYSZ_INS_STOCFHLE = 1599;
+	public static final int SYSZ_INS_STOCFHLH = 1600;
+	public static final int SYSZ_INS_STOCFHM = 1601;
+	public static final int SYSZ_INS_STOCFHNE = 1602;
+	public static final int SYSZ_INS_STOCFHNH = 1603;
+	public static final int SYSZ_INS_STOCFHNHE = 1604;
+	public static final int SYSZ_INS_STOCFHNL = 1605;
+	public static final int SYSZ_INS_STOCFHNLE = 1606;
+	public static final int SYSZ_INS_STOCFHNLH = 1607;
+	public static final int SYSZ_INS_STOCFHNM = 1608;
+	public static final int SYSZ_INS_STOCFHNO = 1609;
+	public static final int SYSZ_INS_STOCFHNP = 1610;
+	public static final int SYSZ_INS_STOCFHNZ = 1611;
+	public static final int SYSZ_INS_STOCFHO = 1612;
+	public static final int SYSZ_INS_STOCFHP = 1613;
+	public static final int SYSZ_INS_STOCFHZ = 1614;
+	public static final int SYSZ_INS_STOCGM = 1615;
+	public static final int SYSZ_INS_STOCGNM = 1616;
+	public static final int SYSZ_INS_STOCGNP = 1617;
+	public static final int SYSZ_INS_STOCGNZ = 1618;
+	public static final int SYSZ_INS_STOCGP = 1619;
+	public static final int SYSZ_INS_STOCGZ = 1620;
+	public static final int SYSZ_INS_STOCM = 1621;
+	public static final int SYSZ_INS_STOCNM = 1622;
+	public static final int SYSZ_INS_STOCNP = 1623;
+	public static final int SYSZ_INS_STOCNZ = 1624;
+	public static final int SYSZ_INS_STOCP = 1625;
+	public static final int SYSZ_INS_STOCZ = 1626;
+	public static final int SYSZ_INS_STOSM = 1627;
+	public static final int SYSZ_INS_STPQ = 1628;
+	public static final int SYSZ_INS_STPT = 1629;
+	public static final int SYSZ_INS_STPX = 1630;
+	public static final int SYSZ_INS_STRAG = 1631;
+	public static final int SYSZ_INS_STRVH = 1632;
+	public static final int SYSZ_INS_STSCH = 1633;
+	public static final int SYSZ_INS_STSI = 1634;
+	public static final int SYSZ_INS_STURA = 1635;
+	public static final int SYSZ_INS_STURG = 1636;
+	public static final int SYSZ_INS_SU = 1637;
+	public static final int SYSZ_INS_SUR = 1638;
+	public static final int SYSZ_INS_SVC = 1639;
+	public static final int SYSZ_INS_SW = 1640;
+	public static final int SYSZ_INS_SWR = 1641;
+	public static final int SYSZ_INS_SXR = 1642;
+	public static final int SYSZ_INS_SXTR = 1643;
+	public static final int SYSZ_INS_SXTRA = 1644;
+	public static final int SYSZ_INS_TABORT = 1645;
+	public static final int SYSZ_INS_TAM = 1646;
+	public static final int SYSZ_INS_TAR = 1647;
+	public static final int SYSZ_INS_TB = 1648;
+	public static final int SYSZ_INS_TBDR = 1649;
+	public static final int SYSZ_INS_TBEDR = 1650;
+	public static final int SYSZ_INS_TBEGIN = 1651;
+	public static final int SYSZ_INS_TBEGINC = 1652;
+	public static final int SYSZ_INS_TCDB = 1653;
+	public static final int SYSZ_INS_TCEB = 1654;
+	public static final int SYSZ_INS_TCXB = 1655;
+	public static final int SYSZ_INS_TDCDT = 1656;
+	public static final int SYSZ_INS_TDCET = 1657;
+	public static final int SYSZ_INS_TDCXT = 1658;
+	public static final int SYSZ_INS_TDGDT = 1659;
+	public static final int SYSZ_INS_TDGET = 1660;
+	public static final int SYSZ_INS_TDGXT = 1661;
+	public static final int SYSZ_INS_TEND = 1662;
+	public static final int SYSZ_INS_THDER = 1663;
+	public static final int SYSZ_INS_THDR = 1664;
+	public static final int SYSZ_INS_TP = 1665;
+	public static final int SYSZ_INS_TPI = 1666;
+	public static final int SYSZ_INS_TPROT = 1667;
+	public static final int SYSZ_INS_TR = 1668;
+	public static final int SYSZ_INS_TRACE = 1669;
+	public static final int SYSZ_INS_TRACG = 1670;
+	public static final int SYSZ_INS_TRAP2 = 1671;
+	public static final int SYSZ_INS_TRAP4 = 1672;
+	public static final int SYSZ_INS_TRE = 1673;
+	public static final int SYSZ_INS_TROO = 1674;
+	public static final int SYSZ_INS_TROT = 1675;
+	public static final int SYSZ_INS_TRT = 1676;
+	public static final int SYSZ_INS_TRTE = 1677;
+	public static final int SYSZ_INS_TRTO = 1678;
+	public static final int SYSZ_INS_TRTR = 1679;
+	public static final int SYSZ_INS_TRTRE = 1680;
+	public static final int SYSZ_INS_TRTT = 1681;
+	public static final int SYSZ_INS_TS = 1682;
+	public static final int SYSZ_INS_TSCH = 1683;
+	public static final int SYSZ_INS_UNPK = 1684;
+	public static final int SYSZ_INS_UNPKA = 1685;
+	public static final int SYSZ_INS_UNPKU = 1686;
+	public static final int SYSZ_INS_UPT = 1687;
+	public static final int SYSZ_INS_VA = 1688;
+	public static final int SYSZ_INS_VAB = 1689;
+	public static final int SYSZ_INS_VAC = 1690;
+	public static final int SYSZ_INS_VACC = 1691;
+	public static final int SYSZ_INS_VACCB = 1692;
+	public static final int SYSZ_INS_VACCC = 1693;
+	public static final int SYSZ_INS_VACCCQ = 1694;
+	public static final int SYSZ_INS_VACCF = 1695;
+	public static final int SYSZ_INS_VACCG = 1696;
+	public static final int SYSZ_INS_VACCH = 1697;
+	public static final int SYSZ_INS_VACCQ = 1698;
+	public static final int SYSZ_INS_VACQ = 1699;
+	public static final int SYSZ_INS_VAF = 1700;
+	public static final int SYSZ_INS_VAG = 1701;
+	public static final int SYSZ_INS_VAH = 1702;
+	public static final int SYSZ_INS_VAP = 1703;
+	public static final int SYSZ_INS_VAQ = 1704;
+	public static final int SYSZ_INS_VAVG = 1705;
+	public static final int SYSZ_INS_VAVGB = 1706;
+	public static final int SYSZ_INS_VAVGF = 1707;
+	public static final int SYSZ_INS_VAVGG = 1708;
+	public static final int SYSZ_INS_VAVGH = 1709;
+	public static final int SYSZ_INS_VAVGL = 1710;
+	public static final int SYSZ_INS_VAVGLB = 1711;
+	public static final int SYSZ_INS_VAVGLF = 1712;
+	public static final int SYSZ_INS_VAVGLG = 1713;
+	public static final int SYSZ_INS_VAVGLH = 1714;
+	public static final int SYSZ_INS_VBPERM = 1715;
+	public static final int SYSZ_INS_VCDG = 1716;
+	public static final int SYSZ_INS_VCDGB = 1717;
+	public static final int SYSZ_INS_VCDLG = 1718;
+	public static final int SYSZ_INS_VCDLGB = 1719;
+	public static final int SYSZ_INS_VCEQ = 1720;
+	public static final int SYSZ_INS_VCEQB = 1721;
+	public static final int SYSZ_INS_VCEQBS = 1722;
+	public static final int SYSZ_INS_VCEQF = 1723;
+	public static final int SYSZ_INS_VCEQFS = 1724;
+	public static final int SYSZ_INS_VCEQG = 1725;
+	public static final int SYSZ_INS_VCEQGS = 1726;
+	public static final int SYSZ_INS_VCEQH = 1727;
+	public static final int SYSZ_INS_VCEQHS = 1728;
+	public static final int SYSZ_INS_VCGD = 1729;
+	public static final int SYSZ_INS_VCGDB = 1730;
+	public static final int SYSZ_INS_VCH = 1731;
+	public static final int SYSZ_INS_VCHB = 1732;
+	public static final int SYSZ_INS_VCHBS = 1733;
+	public static final int SYSZ_INS_VCHF = 1734;
+	public static final int SYSZ_INS_VCHFS = 1735;
+	public static final int SYSZ_INS_VCHG = 1736;
+	public static final int SYSZ_INS_VCHGS = 1737;
+	public static final int SYSZ_INS_VCHH = 1738;
+	public static final int SYSZ_INS_VCHHS = 1739;
+	public static final int SYSZ_INS_VCHL = 1740;
+	public static final int SYSZ_INS_VCHLB = 1741;
+	public static final int SYSZ_INS_VCHLBS = 1742;
+	public static final int SYSZ_INS_VCHLF = 1743;
+	public static final int SYSZ_INS_VCHLFS = 1744;
+	public static final int SYSZ_INS_VCHLG = 1745;
+	public static final int SYSZ_INS_VCHLGS = 1746;
+	public static final int SYSZ_INS_VCHLH = 1747;
+	public static final int SYSZ_INS_VCHLHS = 1748;
+	public static final int SYSZ_INS_VCKSM = 1749;
+	public static final int SYSZ_INS_VCLGD = 1750;
+	public static final int SYSZ_INS_VCLGDB = 1751;
+	public static final int SYSZ_INS_VCLZ = 1752;
+	public static final int SYSZ_INS_VCLZB = 1753;
+	public static final int SYSZ_INS_VCLZF = 1754;
+	public static final int SYSZ_INS_VCLZG = 1755;
+	public static final int SYSZ_INS_VCLZH = 1756;
+	public static final int SYSZ_INS_VCP = 1757;
+	public static final int SYSZ_INS_VCTZ = 1758;
+	public static final int SYSZ_INS_VCTZB = 1759;
+	public static final int SYSZ_INS_VCTZF = 1760;
+	public static final int SYSZ_INS_VCTZG = 1761;
+	public static final int SYSZ_INS_VCTZH = 1762;
+	public static final int SYSZ_INS_VCVB = 1763;
+	public static final int SYSZ_INS_VCVBG = 1764;
+	public static final int SYSZ_INS_VCVD = 1765;
+	public static final int SYSZ_INS_VCVDG = 1766;
+	public static final int SYSZ_INS_VDP = 1767;
+	public static final int SYSZ_INS_VEC = 1768;
+	public static final int SYSZ_INS_VECB = 1769;
+	public static final int SYSZ_INS_VECF = 1770;
+	public static final int SYSZ_INS_VECG = 1771;
+	public static final int SYSZ_INS_VECH = 1772;
+	public static final int SYSZ_INS_VECL = 1773;
+	public static final int SYSZ_INS_VECLB = 1774;
+	public static final int SYSZ_INS_VECLF = 1775;
+	public static final int SYSZ_INS_VECLG = 1776;
+	public static final int SYSZ_INS_VECLH = 1777;
+	public static final int SYSZ_INS_VERIM = 1778;
+	public static final int SYSZ_INS_VERIMB = 1779;
+	public static final int SYSZ_INS_VERIMF = 1780;
+	public static final int SYSZ_INS_VERIMG = 1781;
+	public static final int SYSZ_INS_VERIMH = 1782;
+	public static final int SYSZ_INS_VERLL = 1783;
+	public static final int SYSZ_INS_VERLLB = 1784;
+	public static final int SYSZ_INS_VERLLF = 1785;
+	public static final int SYSZ_INS_VERLLG = 1786;
+	public static final int SYSZ_INS_VERLLH = 1787;
+	public static final int SYSZ_INS_VERLLV = 1788;
+	public static final int SYSZ_INS_VERLLVB = 1789;
+	public static final int SYSZ_INS_VERLLVF = 1790;
+	public static final int SYSZ_INS_VERLLVG = 1791;
+	public static final int SYSZ_INS_VERLLVH = 1792;
+	public static final int SYSZ_INS_VESL = 1793;
+	public static final int SYSZ_INS_VESLB = 1794;
+	public static final int SYSZ_INS_VESLF = 1795;
+	public static final int SYSZ_INS_VESLG = 1796;
+	public static final int SYSZ_INS_VESLH = 1797;
+	public static final int SYSZ_INS_VESLV = 1798;
+	public static final int SYSZ_INS_VESLVB = 1799;
+	public static final int SYSZ_INS_VESLVF = 1800;
+	public static final int SYSZ_INS_VESLVG = 1801;
+	public static final int SYSZ_INS_VESLVH = 1802;
+	public static final int SYSZ_INS_VESRA = 1803;
+	public static final int SYSZ_INS_VESRAB = 1804;
+	public static final int SYSZ_INS_VESRAF = 1805;
+	public static final int SYSZ_INS_VESRAG = 1806;
+	public static final int SYSZ_INS_VESRAH = 1807;
+	public static final int SYSZ_INS_VESRAV = 1808;
+	public static final int SYSZ_INS_VESRAVB = 1809;
+	public static final int SYSZ_INS_VESRAVF = 1810;
+	public static final int SYSZ_INS_VESRAVG = 1811;
+	public static final int SYSZ_INS_VESRAVH = 1812;
+	public static final int SYSZ_INS_VESRL = 1813;
+	public static final int SYSZ_INS_VESRLB = 1814;
+	public static final int SYSZ_INS_VESRLF = 1815;
+	public static final int SYSZ_INS_VESRLG = 1816;
+	public static final int SYSZ_INS_VESRLH = 1817;
+	public static final int SYSZ_INS_VESRLV = 1818;
+	public static final int SYSZ_INS_VESRLVB = 1819;
+	public static final int SYSZ_INS_VESRLVF = 1820;
+	public static final int SYSZ_INS_VESRLVG = 1821;
+	public static final int SYSZ_INS_VESRLVH = 1822;
+	public static final int SYSZ_INS_VFA = 1823;
+	public static final int SYSZ_INS_VFADB = 1824;
+	public static final int SYSZ_INS_VFAE = 1825;
+	public static final int SYSZ_INS_VFAEB = 1826;
+	public static final int SYSZ_INS_VFAEBS = 1827;
+	public static final int SYSZ_INS_VFAEF = 1828;
+	public static final int SYSZ_INS_VFAEFS = 1829;
+	public static final int SYSZ_INS_VFAEH = 1830;
+	public static final int SYSZ_INS_VFAEHS = 1831;
+	public static final int SYSZ_INS_VFAEZB = 1832;
+	public static final int SYSZ_INS_VFAEZBS = 1833;
+	public static final int SYSZ_INS_VFAEZF = 1834;
+	public static final int SYSZ_INS_VFAEZFS = 1835;
+	public static final int SYSZ_INS_VFAEZH = 1836;
+	public static final int SYSZ_INS_VFAEZHS = 1837;
+	public static final int SYSZ_INS_VFASB = 1838;
+	public static final int SYSZ_INS_VFCE = 1839;
+	public static final int SYSZ_INS_VFCEDB = 1840;
+	public static final int SYSZ_INS_VFCEDBS = 1841;
+	public static final int SYSZ_INS_VFCESB = 1842;
+	public static final int SYSZ_INS_VFCESBS = 1843;
+	public static final int SYSZ_INS_VFCH = 1844;
+	public static final int SYSZ_INS_VFCHDB = 1845;
+	public static final int SYSZ_INS_VFCHDBS = 1846;
+	public static final int SYSZ_INS_VFCHE = 1847;
+	public static final int SYSZ_INS_VFCHEDB = 1848;
+	public static final int SYSZ_INS_VFCHEDBS = 1849;
+	public static final int SYSZ_INS_VFCHESB = 1850;
+	public static final int SYSZ_INS_VFCHESBS = 1851;
+	public static final int SYSZ_INS_VFCHSB = 1852;
+	public static final int SYSZ_INS_VFCHSBS = 1853;
+	public static final int SYSZ_INS_VFD = 1854;
+	public static final int SYSZ_INS_VFDDB = 1855;
+	public static final int SYSZ_INS_VFDSB = 1856;
+	public static final int SYSZ_INS_VFEE = 1857;
+	public static final int SYSZ_INS_VFEEB = 1858;
+	public static final int SYSZ_INS_VFEEBS = 1859;
+	public static final int SYSZ_INS_VFEEF = 1860;
+	public static final int SYSZ_INS_VFEEFS = 1861;
+	public static final int SYSZ_INS_VFEEH = 1862;
+	public static final int SYSZ_INS_VFEEHS = 1863;
+	public static final int SYSZ_INS_VFEEZB = 1864;
+	public static final int SYSZ_INS_VFEEZBS = 1865;
+	public static final int SYSZ_INS_VFEEZF = 1866;
+	public static final int SYSZ_INS_VFEEZFS = 1867;
+	public static final int SYSZ_INS_VFEEZH = 1868;
+	public static final int SYSZ_INS_VFEEZHS = 1869;
+	public static final int SYSZ_INS_VFENE = 1870;
+	public static final int SYSZ_INS_VFENEB = 1871;
+	public static final int SYSZ_INS_VFENEBS = 1872;
+	public static final int SYSZ_INS_VFENEF = 1873;
+	public static final int SYSZ_INS_VFENEFS = 1874;
+	public static final int SYSZ_INS_VFENEH = 1875;
+	public static final int SYSZ_INS_VFENEHS = 1876;
+	public static final int SYSZ_INS_VFENEZB = 1877;
+	public static final int SYSZ_INS_VFENEZBS = 1878;
+	public static final int SYSZ_INS_VFENEZF = 1879;
+	public static final int SYSZ_INS_VFENEZFS = 1880;
+	public static final int SYSZ_INS_VFENEZH = 1881;
+	public static final int SYSZ_INS_VFENEZHS = 1882;
+	public static final int SYSZ_INS_VFI = 1883;
+	public static final int SYSZ_INS_VFIDB = 1884;
+	public static final int SYSZ_INS_VFISB = 1885;
+	public static final int SYSZ_INS_VFKEDB = 1886;
+	public static final int SYSZ_INS_VFKEDBS = 1887;
+	public static final int SYSZ_INS_VFKESB = 1888;
+	public static final int SYSZ_INS_VFKESBS = 1889;
+	public static final int SYSZ_INS_VFKHDB = 1890;
+	public static final int SYSZ_INS_VFKHDBS = 1891;
+	public static final int SYSZ_INS_VFKHEDB = 1892;
+	public static final int SYSZ_INS_VFKHEDBS = 1893;
+	public static final int SYSZ_INS_VFKHESB = 1894;
+	public static final int SYSZ_INS_VFKHESBS = 1895;
+	public static final int SYSZ_INS_VFKHSB = 1896;
+	public static final int SYSZ_INS_VFKHSBS = 1897;
+	public static final int SYSZ_INS_VFLCDB = 1898;
+	public static final int SYSZ_INS_VFLCSB = 1899;
+	public static final int SYSZ_INS_VFLL = 1900;
+	public static final int SYSZ_INS_VFLLS = 1901;
+	public static final int SYSZ_INS_VFLNDB = 1902;
+	public static final int SYSZ_INS_VFLNSB = 1903;
+	public static final int SYSZ_INS_VFLPDB = 1904;
+	public static final int SYSZ_INS_VFLPSB = 1905;
+	public static final int SYSZ_INS_VFLR = 1906;
+	public static final int SYSZ_INS_VFLRD = 1907;
+	public static final int SYSZ_INS_VFM = 1908;
+	public static final int SYSZ_INS_VFMA = 1909;
+	public static final int SYSZ_INS_VFMADB = 1910;
+	public static final int SYSZ_INS_VFMASB = 1911;
+	public static final int SYSZ_INS_VFMAX = 1912;
+	public static final int SYSZ_INS_VFMAXDB = 1913;
+	public static final int SYSZ_INS_VFMAXSB = 1914;
+	public static final int SYSZ_INS_VFMDB = 1915;
+	public static final int SYSZ_INS_VFMIN = 1916;
+	public static final int SYSZ_INS_VFMINDB = 1917;
+	public static final int SYSZ_INS_VFMINSB = 1918;
+	public static final int SYSZ_INS_VFMS = 1919;
+	public static final int SYSZ_INS_VFMSB = 1920;
+	public static final int SYSZ_INS_VFMSDB = 1921;
+	public static final int SYSZ_INS_VFMSSB = 1922;
+	public static final int SYSZ_INS_VFNMA = 1923;
+	public static final int SYSZ_INS_VFNMADB = 1924;
+	public static final int SYSZ_INS_VFNMASB = 1925;
+	public static final int SYSZ_INS_VFNMS = 1926;
+	public static final int SYSZ_INS_VFNMSDB = 1927;
+	public static final int SYSZ_INS_VFNMSSB = 1928;
+	public static final int SYSZ_INS_VFPSO = 1929;
+	public static final int SYSZ_INS_VFPSODB = 1930;
+	public static final int SYSZ_INS_VFPSOSB = 1931;
+	public static final int SYSZ_INS_VFS = 1932;
+	public static final int SYSZ_INS_VFSDB = 1933;
+	public static final int SYSZ_INS_VFSQ = 1934;
+	public static final int SYSZ_INS_VFSQDB = 1935;
+	public static final int SYSZ_INS_VFSQSB = 1936;
+	public static final int SYSZ_INS_VFSSB = 1937;
+	public static final int SYSZ_INS_VFTCI = 1938;
+	public static final int SYSZ_INS_VFTCIDB = 1939;
+	public static final int SYSZ_INS_VFTCISB = 1940;
+	public static final int SYSZ_INS_VGBM = 1941;
+	public static final int SYSZ_INS_VGEF = 1942;
+	public static final int SYSZ_INS_VGEG = 1943;
+	public static final int SYSZ_INS_VGFM = 1944;
+	public static final int SYSZ_INS_VGFMA = 1945;
+	public static final int SYSZ_INS_VGFMAB = 1946;
+	public static final int SYSZ_INS_VGFMAF = 1947;
+	public static final int SYSZ_INS_VGFMAG = 1948;
+	public static final int SYSZ_INS_VGFMAH = 1949;
+	public static final int SYSZ_INS_VGFMB = 1950;
+	public static final int SYSZ_INS_VGFMF = 1951;
+	public static final int SYSZ_INS_VGFMG = 1952;
+	public static final int SYSZ_INS_VGFMH = 1953;
+	public static final int SYSZ_INS_VGM = 1954;
+	public static final int SYSZ_INS_VGMB = 1955;
+	public static final int SYSZ_INS_VGMF = 1956;
+	public static final int SYSZ_INS_VGMG = 1957;
+	public static final int SYSZ_INS_VGMH = 1958;
+	public static final int SYSZ_INS_VISTR = 1959;
+	public static final int SYSZ_INS_VISTRB = 1960;
+	public static final int SYSZ_INS_VISTRBS = 1961;
+	public static final int SYSZ_INS_VISTRF = 1962;
+	public static final int SYSZ_INS_VISTRFS = 1963;
+	public static final int SYSZ_INS_VISTRH = 1964;
+	public static final int SYSZ_INS_VISTRHS = 1965;
+	public static final int SYSZ_INS_VL = 1966;
+	public static final int SYSZ_INS_VLBB = 1967;
+	public static final int SYSZ_INS_VLC = 1968;
+	public static final int SYSZ_INS_VLCB = 1969;
+	public static final int SYSZ_INS_VLCF = 1970;
+	public static final int SYSZ_INS_VLCG = 1971;
+	public static final int SYSZ_INS_VLCH = 1972;
+	public static final int SYSZ_INS_VLDE = 1973;
+	public static final int SYSZ_INS_VLDEB = 1974;
+	public static final int SYSZ_INS_VLEB = 1975;
+	public static final int SYSZ_INS_VLED = 1976;
+	public static final int SYSZ_INS_VLEDB = 1977;
+	public static final int SYSZ_INS_VLEF = 1978;
+	public static final int SYSZ_INS_VLEG = 1979;
+	public static final int SYSZ_INS_VLEH = 1980;
+	public static final int SYSZ_INS_VLEIB = 1981;
+	public static final int SYSZ_INS_VLEIF = 1982;
+	public static final int SYSZ_INS_VLEIG = 1983;
+	public static final int SYSZ_INS_VLEIH = 1984;
+	public static final int SYSZ_INS_VLGV = 1985;
+	public static final int SYSZ_INS_VLGVB = 1986;
+	public static final int SYSZ_INS_VLGVF = 1987;
+	public static final int SYSZ_INS_VLGVG = 1988;
+	public static final int SYSZ_INS_VLGVH = 1989;
+	public static final int SYSZ_INS_VLIP = 1990;
+	public static final int SYSZ_INS_VLL = 1991;
+	public static final int SYSZ_INS_VLLEZ = 1992;
+	public static final int SYSZ_INS_VLLEZB = 1993;
+	public static final int SYSZ_INS_VLLEZF = 1994;
+	public static final int SYSZ_INS_VLLEZG = 1995;
+	public static final int SYSZ_INS_VLLEZH = 1996;
+	public static final int SYSZ_INS_VLLEZLF = 1997;
+	public static final int SYSZ_INS_VLM = 1998;
+	public static final int SYSZ_INS_VLP = 1999;
+	public static final int SYSZ_INS_VLPB = 2000;
+	public static final int SYSZ_INS_VLPF = 2001;
+	public static final int SYSZ_INS_VLPG = 2002;
+	public static final int SYSZ_INS_VLPH = 2003;
+	public static final int SYSZ_INS_VLR = 2004;
+	public static final int SYSZ_INS_VLREP = 2005;
+	public static final int SYSZ_INS_VLREPB = 2006;
+	public static final int SYSZ_INS_VLREPF = 2007;
+	public static final int SYSZ_INS_VLREPG = 2008;
+	public static final int SYSZ_INS_VLREPH = 2009;
+	public static final int SYSZ_INS_VLRL = 2010;
+	public static final int SYSZ_INS_VLRLR = 2011;
+	public static final int SYSZ_INS_VLVG = 2012;
+	public static final int SYSZ_INS_VLVGB = 2013;
+	public static final int SYSZ_INS_VLVGF = 2014;
+	public static final int SYSZ_INS_VLVGG = 2015;
+	public static final int SYSZ_INS_VLVGH = 2016;
+	public static final int SYSZ_INS_VLVGP = 2017;
+	public static final int SYSZ_INS_VMAE = 2018;
+	public static final int SYSZ_INS_VMAEB = 2019;
+	public static final int SYSZ_INS_VMAEF = 2020;
+	public static final int SYSZ_INS_VMAEH = 2021;
+	public static final int SYSZ_INS_VMAH = 2022;
+	public static final int SYSZ_INS_VMAHB = 2023;
+	public static final int SYSZ_INS_VMAHF = 2024;
+	public static final int SYSZ_INS_VMAHH = 2025;
+	public static final int SYSZ_INS_VMAL = 2026;
+	public static final int SYSZ_INS_VMALB = 2027;
+	public static final int SYSZ_INS_VMALE = 2028;
+	public static final int SYSZ_INS_VMALEB = 2029;
+	public static final int SYSZ_INS_VMALEF = 2030;
+	public static final int SYSZ_INS_VMALEH = 2031;
+	public static final int SYSZ_INS_VMALF = 2032;
+	public static final int SYSZ_INS_VMALH = 2033;
+	public static final int SYSZ_INS_VMALHB = 2034;
+	public static final int SYSZ_INS_VMALHF = 2035;
+	public static final int SYSZ_INS_VMALHH = 2036;
+	public static final int SYSZ_INS_VMALHW = 2037;
+	public static final int SYSZ_INS_VMALO = 2038;
+	public static final int SYSZ_INS_VMALOB = 2039;
+	public static final int SYSZ_INS_VMALOF = 2040;
+	public static final int SYSZ_INS_VMALOH = 2041;
+	public static final int SYSZ_INS_VMAO = 2042;
+	public static final int SYSZ_INS_VMAOB = 2043;
+	public static final int SYSZ_INS_VMAOF = 2044;
+	public static final int SYSZ_INS_VMAOH = 2045;
+	public static final int SYSZ_INS_VME = 2046;
+	public static final int SYSZ_INS_VMEB = 2047;
+	public static final int SYSZ_INS_VMEF = 2048;
+	public static final int SYSZ_INS_VMEH = 2049;
+	public static final int SYSZ_INS_VMH = 2050;
+	public static final int SYSZ_INS_VMHB = 2051;
+	public static final int SYSZ_INS_VMHF = 2052;
+	public static final int SYSZ_INS_VMHH = 2053;
+	public static final int SYSZ_INS_VML = 2054;
+	public static final int SYSZ_INS_VMLB = 2055;
+	public static final int SYSZ_INS_VMLE = 2056;
+	public static final int SYSZ_INS_VMLEB = 2057;
+	public static final int SYSZ_INS_VMLEF = 2058;
+	public static final int SYSZ_INS_VMLEH = 2059;
+	public static final int SYSZ_INS_VMLF = 2060;
+	public static final int SYSZ_INS_VMLH = 2061;
+	public static final int SYSZ_INS_VMLHB = 2062;
+	public static final int SYSZ_INS_VMLHF = 2063;
+	public static final int SYSZ_INS_VMLHH = 2064;
+	public static final int SYSZ_INS_VMLHW = 2065;
+	public static final int SYSZ_INS_VMLO = 2066;
+	public static final int SYSZ_INS_VMLOB = 2067;
+	public static final int SYSZ_INS_VMLOF = 2068;
+	public static final int SYSZ_INS_VMLOH = 2069;
+	public static final int SYSZ_INS_VMN = 2070;
+	public static final int SYSZ_INS_VMNB = 2071;
+	public static final int SYSZ_INS_VMNF = 2072;
+	public static final int SYSZ_INS_VMNG = 2073;
+	public static final int SYSZ_INS_VMNH = 2074;
+	public static final int SYSZ_INS_VMNL = 2075;
+	public static final int SYSZ_INS_VMNLB = 2076;
+	public static final int SYSZ_INS_VMNLF = 2077;
+	public static final int SYSZ_INS_VMNLG = 2078;
+	public static final int SYSZ_INS_VMNLH = 2079;
+	public static final int SYSZ_INS_VMO = 2080;
+	public static final int SYSZ_INS_VMOB = 2081;
+	public static final int SYSZ_INS_VMOF = 2082;
+	public static final int SYSZ_INS_VMOH = 2083;
+	public static final int SYSZ_INS_VMP = 2084;
+	public static final int SYSZ_INS_VMRH = 2085;
+	public static final int SYSZ_INS_VMRHB = 2086;
+	public static final int SYSZ_INS_VMRHF = 2087;
+	public static final int SYSZ_INS_VMRHG = 2088;
+	public static final int SYSZ_INS_VMRHH = 2089;
+	public static final int SYSZ_INS_VMRL = 2090;
+	public static final int SYSZ_INS_VMRLB = 2091;
+	public static final int SYSZ_INS_VMRLF = 2092;
+	public static final int SYSZ_INS_VMRLG = 2093;
+	public static final int SYSZ_INS_VMRLH = 2094;
+	public static final int SYSZ_INS_VMSL = 2095;
+	public static final int SYSZ_INS_VMSLG = 2096;
+	public static final int SYSZ_INS_VMSP = 2097;
+	public static final int SYSZ_INS_VMX = 2098;
+	public static final int SYSZ_INS_VMXB = 2099;
+	public static final int SYSZ_INS_VMXF = 2100;
+	public static final int SYSZ_INS_VMXG = 2101;
+	public static final int SYSZ_INS_VMXH = 2102;
+	public static final int SYSZ_INS_VMXL = 2103;
+	public static final int SYSZ_INS_VMXLB = 2104;
+	public static final int SYSZ_INS_VMXLF = 2105;
+	public static final int SYSZ_INS_VMXLG = 2106;
+	public static final int SYSZ_INS_VMXLH = 2107;
+	public static final int SYSZ_INS_VN = 2108;
+	public static final int SYSZ_INS_VNC = 2109;
+	public static final int SYSZ_INS_VNN = 2110;
+	public static final int SYSZ_INS_VNO = 2111;
+	public static final int SYSZ_INS_VNX = 2112;
+	public static final int SYSZ_INS_VO = 2113;
+	public static final int SYSZ_INS_VOC = 2114;
+	public static final int SYSZ_INS_VONE = 2115;
+	public static final int SYSZ_INS_VPDI = 2116;
+	public static final int SYSZ_INS_VPERM = 2117;
+	public static final int SYSZ_INS_VPK = 2118;
+	public static final int SYSZ_INS_VPKF = 2119;
+	public static final int SYSZ_INS_VPKG = 2120;
+	public static final int SYSZ_INS_VPKH = 2121;
+	public static final int SYSZ_INS_VPKLS = 2122;
+	public static final int SYSZ_INS_VPKLSF = 2123;
+	public static final int SYSZ_INS_VPKLSFS = 2124;
+	public static final int SYSZ_INS_VPKLSG = 2125;
+	public static final int SYSZ_INS_VPKLSGS = 2126;
+	public static final int SYSZ_INS_VPKLSH = 2127;
+	public static final int SYSZ_INS_VPKLSHS = 2128;
+	public static final int SYSZ_INS_VPKS = 2129;
+	public static final int SYSZ_INS_VPKSF = 2130;
+	public static final int SYSZ_INS_VPKSFS = 2131;
+	public static final int SYSZ_INS_VPKSG = 2132;
+	public static final int SYSZ_INS_VPKSGS = 2133;
+	public static final int SYSZ_INS_VPKSH = 2134;
+	public static final int SYSZ_INS_VPKSHS = 2135;
+	public static final int SYSZ_INS_VPKZ = 2136;
+	public static final int SYSZ_INS_VPOPCT = 2137;
+	public static final int SYSZ_INS_VPOPCTB = 2138;
+	public static final int SYSZ_INS_VPOPCTF = 2139;
+	public static final int SYSZ_INS_VPOPCTG = 2140;
+	public static final int SYSZ_INS_VPOPCTH = 2141;
+	public static final int SYSZ_INS_VPSOP = 2142;
+	public static final int SYSZ_INS_VREP = 2143;
+	public static final int SYSZ_INS_VREPB = 2144;
+	public static final int SYSZ_INS_VREPF = 2145;
+	public static final int SYSZ_INS_VREPG = 2146;
+	public static final int SYSZ_INS_VREPH = 2147;
+	public static final int SYSZ_INS_VREPI = 2148;
+	public static final int SYSZ_INS_VREPIB = 2149;
+	public static final int SYSZ_INS_VREPIF = 2150;
+	public static final int SYSZ_INS_VREPIG = 2151;
+	public static final int SYSZ_INS_VREPIH = 2152;
+	public static final int SYSZ_INS_VRP = 2153;
+	public static final int SYSZ_INS_VS = 2154;
+	public static final int SYSZ_INS_VSB = 2155;
+	public static final int SYSZ_INS_VSBCBI = 2156;
+	public static final int SYSZ_INS_VSBCBIQ = 2157;
+	public static final int SYSZ_INS_VSBI = 2158;
+	public static final int SYSZ_INS_VSBIQ = 2159;
+	public static final int SYSZ_INS_VSCBI = 2160;
+	public static final int SYSZ_INS_VSCBIB = 2161;
+	public static final int SYSZ_INS_VSCBIF = 2162;
+	public static final int SYSZ_INS_VSCBIG = 2163;
+	public static final int SYSZ_INS_VSCBIH = 2164;
+	public static final int SYSZ_INS_VSCBIQ = 2165;
+	public static final int SYSZ_INS_VSCEF = 2166;
+	public static final int SYSZ_INS_VSCEG = 2167;
+	public static final int SYSZ_INS_VSDP = 2168;
+	public static final int SYSZ_INS_VSEG = 2169;
+	public static final int SYSZ_INS_VSEGB = 2170;
+	public static final int SYSZ_INS_VSEGF = 2171;
+	public static final int SYSZ_INS_VSEGH = 2172;
+	public static final int SYSZ_INS_VSEL = 2173;
+	public static final int SYSZ_INS_VSF = 2174;
+	public static final int SYSZ_INS_VSG = 2175;
+	public static final int SYSZ_INS_VSH = 2176;
+	public static final int SYSZ_INS_VSL = 2177;
+	public static final int SYSZ_INS_VSLB = 2178;
+	public static final int SYSZ_INS_VSLDB = 2179;
+	public static final int SYSZ_INS_VSP = 2180;
+	public static final int SYSZ_INS_VSQ = 2181;
+	public static final int SYSZ_INS_VSRA = 2182;
+	public static final int SYSZ_INS_VSRAB = 2183;
+	public static final int SYSZ_INS_VSRL = 2184;
+	public static final int SYSZ_INS_VSRLB = 2185;
+	public static final int SYSZ_INS_VSRP = 2186;
+	public static final int SYSZ_INS_VST = 2187;
+	public static final int SYSZ_INS_VSTEB = 2188;
+	public static final int SYSZ_INS_VSTEF = 2189;
+	public static final int SYSZ_INS_VSTEG = 2190;
+	public static final int SYSZ_INS_VSTEH = 2191;
+	public static final int SYSZ_INS_VSTL = 2192;
+	public static final int SYSZ_INS_VSTM = 2193;
+	public static final int SYSZ_INS_VSTRC = 2194;
+	public static final int SYSZ_INS_VSTRCB = 2195;
+	public static final int SYSZ_INS_VSTRCBS = 2196;
+	public static final int SYSZ_INS_VSTRCF = 2197;
+	public static final int SYSZ_INS_VSTRCFS = 2198;
+	public static final int SYSZ_INS_VSTRCH = 2199;
+	public static final int SYSZ_INS_VSTRCHS = 2200;
+	public static final int SYSZ_INS_VSTRCZB = 2201;
+	public static final int SYSZ_INS_VSTRCZBS = 2202;
+	public static final int SYSZ_INS_VSTRCZF = 2203;
+	public static final int SYSZ_INS_VSTRCZFS = 2204;
+	public static final int SYSZ_INS_VSTRCZH = 2205;
+	public static final int SYSZ_INS_VSTRCZHS = 2206;
+	public static final int SYSZ_INS_VSTRL = 2207;
+	public static final int SYSZ_INS_VSTRLR = 2208;
+	public static final int SYSZ_INS_VSUM = 2209;
+	public static final int SYSZ_INS_VSUMB = 2210;
+	public static final int SYSZ_INS_VSUMG = 2211;
+	public static final int SYSZ_INS_VSUMGF = 2212;
+	public static final int SYSZ_INS_VSUMGH = 2213;
+	public static final int SYSZ_INS_VSUMH = 2214;
+	public static final int SYSZ_INS_VSUMQ = 2215;
+	public static final int SYSZ_INS_VSUMQF = 2216;
+	public static final int SYSZ_INS_VSUMQG = 2217;
+	public static final int SYSZ_INS_VTM = 2218;
+	public static final int SYSZ_INS_VTP = 2219;
+	public static final int SYSZ_INS_VUPH = 2220;
+	public static final int SYSZ_INS_VUPHB = 2221;
+	public static final int SYSZ_INS_VUPHF = 2222;
+	public static final int SYSZ_INS_VUPHH = 2223;
+	public static final int SYSZ_INS_VUPKZ = 2224;
+	public static final int SYSZ_INS_VUPL = 2225;
+	public static final int SYSZ_INS_VUPLB = 2226;
+	public static final int SYSZ_INS_VUPLF = 2227;
+	public static final int SYSZ_INS_VUPLH = 2228;
+	public static final int SYSZ_INS_VUPLHB = 2229;
+	public static final int SYSZ_INS_VUPLHF = 2230;
+	public static final int SYSZ_INS_VUPLHH = 2231;
+	public static final int SYSZ_INS_VUPLHW = 2232;
+	public static final int SYSZ_INS_VUPLL = 2233;
+	public static final int SYSZ_INS_VUPLLB = 2234;
+	public static final int SYSZ_INS_VUPLLF = 2235;
+	public static final int SYSZ_INS_VUPLLH = 2236;
+	public static final int SYSZ_INS_VX = 2237;
+	public static final int SYSZ_INS_VZERO = 2238;
+	public static final int SYSZ_INS_WCDGB = 2239;
+	public static final int SYSZ_INS_WCDLGB = 2240;
+	public static final int SYSZ_INS_WCGDB = 2241;
+	public static final int SYSZ_INS_WCLGDB = 2242;
+	public static final int SYSZ_INS_WFADB = 2243;
+	public static final int SYSZ_INS_WFASB = 2244;
+	public static final int SYSZ_INS_WFAXB = 2245;
+	public static final int SYSZ_INS_WFC = 2246;
+	public static final int SYSZ_INS_WFCDB = 2247;
+	public static final int SYSZ_INS_WFCEDB = 2248;
+	public static final int SYSZ_INS_WFCEDBS = 2249;
+	public static final int SYSZ_INS_WFCESB = 2250;
+	public static final int SYSZ_INS_WFCESBS = 2251;
+	public static final int SYSZ_INS_WFCEXB = 2252;
+	public static final int SYSZ_INS_WFCEXBS = 2253;
+	public static final int SYSZ_INS_WFCHDB = 2254;
+	public static final int SYSZ_INS_WFCHDBS = 2255;
+	public static final int SYSZ_INS_WFCHEDB = 2256;
+	public static final int SYSZ_INS_WFCHEDBS = 2257;
+	public static final int SYSZ_INS_WFCHESB = 2258;
+	public static final int SYSZ_INS_WFCHESBS = 2259;
+	public static final int SYSZ_INS_WFCHEXB = 2260;
+	public static final int SYSZ_INS_WFCHEXBS = 2261;
+	public static final int SYSZ_INS_WFCHSB = 2262;
+	public static final int SYSZ_INS_WFCHSBS = 2263;
+	public static final int SYSZ_INS_WFCHXB = 2264;
+	public static final int SYSZ_INS_WFCHXBS = 2265;
+	public static final int SYSZ_INS_WFCSB = 2266;
+	public static final int SYSZ_INS_WFCXB = 2267;
+	public static final int SYSZ_INS_WFDDB = 2268;
+	public static final int SYSZ_INS_WFDSB = 2269;
+	public static final int SYSZ_INS_WFDXB = 2270;
+	public static final int SYSZ_INS_WFIDB = 2271;
+	public static final int SYSZ_INS_WFISB = 2272;
+	public static final int SYSZ_INS_WFIXB = 2273;
+	public static final int SYSZ_INS_WFK = 2274;
+	public static final int SYSZ_INS_WFKDB = 2275;
+	public static final int SYSZ_INS_WFKEDB = 2276;
+	public static final int SYSZ_INS_WFKEDBS = 2277;
+	public static final int SYSZ_INS_WFKESB = 2278;
+	public static final int SYSZ_INS_WFKESBS = 2279;
+	public static final int SYSZ_INS_WFKEXB = 2280;
+	public static final int SYSZ_INS_WFKEXBS = 2281;
+	public static final int SYSZ_INS_WFKHDB = 2282;
+	public static final int SYSZ_INS_WFKHDBS = 2283;
+	public static final int SYSZ_INS_WFKHEDB = 2284;
+	public static final int SYSZ_INS_WFKHEDBS = 2285;
+	public static final int SYSZ_INS_WFKHESB = 2286;
+	public static final int SYSZ_INS_WFKHESBS = 2287;
+	public static final int SYSZ_INS_WFKHEXB = 2288;
+	public static final int SYSZ_INS_WFKHEXBS = 2289;
+	public static final int SYSZ_INS_WFKHSB = 2290;
+	public static final int SYSZ_INS_WFKHSBS = 2291;
+	public static final int SYSZ_INS_WFKHXB = 2292;
+	public static final int SYSZ_INS_WFKHXBS = 2293;
+	public static final int SYSZ_INS_WFKSB = 2294;
+	public static final int SYSZ_INS_WFKXB = 2295;
+	public static final int SYSZ_INS_WFLCDB = 2296;
+	public static final int SYSZ_INS_WFLCSB = 2297;
+	public static final int SYSZ_INS_WFLCXB = 2298;
+	public static final int SYSZ_INS_WFLLD = 2299;
+	public static final int SYSZ_INS_WFLLS = 2300;
+	public static final int SYSZ_INS_WFLNDB = 2301;
+	public static final int SYSZ_INS_WFLNSB = 2302;
+	public static final int SYSZ_INS_WFLNXB = 2303;
+	public static final int SYSZ_INS_WFLPDB = 2304;
+	public static final int SYSZ_INS_WFLPSB = 2305;
+	public static final int SYSZ_INS_WFLPXB = 2306;
+	public static final int SYSZ_INS_WFLRD = 2307;
+	public static final int SYSZ_INS_WFLRX = 2308;
+	public static final int SYSZ_INS_WFMADB = 2309;
+	public static final int SYSZ_INS_WFMASB = 2310;
+	public static final int SYSZ_INS_WFMAXB = 2311;
+	public static final int SYSZ_INS_WFMAXDB = 2312;
+	public static final int SYSZ_INS_WFMAXSB = 2313;
+	public static final int SYSZ_INS_WFMAXXB = 2314;
+	public static final int SYSZ_INS_WFMDB = 2315;
+	public static final int SYSZ_INS_WFMINDB = 2316;
+	public static final int SYSZ_INS_WFMINSB = 2317;
+	public static final int SYSZ_INS_WFMINXB = 2318;
+	public static final int SYSZ_INS_WFMSB = 2319;
+	public static final int SYSZ_INS_WFMSDB = 2320;
+	public static final int SYSZ_INS_WFMSSB = 2321;
+	public static final int SYSZ_INS_WFMSXB = 2322;
+	public static final int SYSZ_INS_WFMXB = 2323;
+	public static final int SYSZ_INS_WFNMADB = 2324;
+	public static final int SYSZ_INS_WFNMASB = 2325;
+	public static final int SYSZ_INS_WFNMAXB = 2326;
+	public static final int SYSZ_INS_WFNMSDB = 2327;
+	public static final int SYSZ_INS_WFNMSSB = 2328;
+	public static final int SYSZ_INS_WFNMSXB = 2329;
+	public static final int SYSZ_INS_WFPSODB = 2330;
+	public static final int SYSZ_INS_WFPSOSB = 2331;
+	public static final int SYSZ_INS_WFPSOXB = 2332;
+	public static final int SYSZ_INS_WFSDB = 2333;
+	public static final int SYSZ_INS_WFSQDB = 2334;
+	public static final int SYSZ_INS_WFSQSB = 2335;
+	public static final int SYSZ_INS_WFSQXB = 2336;
+	public static final int SYSZ_INS_WFSSB = 2337;
+	public static final int SYSZ_INS_WFSXB = 2338;
+	public static final int SYSZ_INS_WFTCIDB = 2339;
+	public static final int SYSZ_INS_WFTCISB = 2340;
+	public static final int SYSZ_INS_WFTCIXB = 2341;
+	public static final int SYSZ_INS_WLDEB = 2342;
+	public static final int SYSZ_INS_WLEDB = 2343;
+	public static final int SYSZ_INS_XSCH = 2344;
+	public static final int SYSZ_INS_ZAP = 2345;
+	public static final int SYSZ_INS_ENDING = 2346;
+
+	public static final int SYSZ_GRP_INVALID = 0;
+	public static final int SYSZ_GRP_JUMP = 1;
+	public static final int SYSZ_GRP_DISTINCTOPS = 128;
+	public static final int SYSZ_GRP_FPEXTENSION = 129;
+	public static final int SYSZ_GRP_HIGHWORD = 130;
+	public static final int SYSZ_GRP_INTERLOCKEDACCESS1 = 131;
+	public static final int SYSZ_GRP_LOADSTOREONCOND = 132;
+	public static final int SYSZ_GRP_DFPPACKEDCONVERSION = 133;
+	public static final int SYSZ_GRP_DFPZONEDCONVERSION = 134;
+	public static final int SYSZ_GRP_ENHANCEDDAT2 = 135;
+	public static final int SYSZ_GRP_EXECUTIONHINT = 136;
+	public static final int SYSZ_GRP_GUARDEDSTORAGE = 137;
+	public static final int SYSZ_GRP_INSERTREFERENCEBITSMULTIPLE = 138;
+	public static final int SYSZ_GRP_LOADANDTRAP = 139;
+	public static final int SYSZ_GRP_LOADANDZERORIGHTMOSTBYTE = 140;
+	public static final int SYSZ_GRP_LOADSTOREONCOND2 = 141;
+	public static final int SYSZ_GRP_MESSAGESECURITYASSIST3 = 142;
+	public static final int SYSZ_GRP_MESSAGESECURITYASSIST4 = 143;
+	public static final int SYSZ_GRP_MESSAGESECURITYASSIST5 = 144;
+	public static final int SYSZ_GRP_MESSAGESECURITYASSIST7 = 145;
+	public static final int SYSZ_GRP_MESSAGESECURITYASSIST8 = 146;
+	public static final int SYSZ_GRP_MISCELLANEOUSEXTENSIONS = 147;
+	public static final int SYSZ_GRP_MISCELLANEOUSEXTENSIONS2 = 148;
+	public static final int SYSZ_GRP_NOVECTOR = 149;
+	public static final int SYSZ_GRP_POPULATIONCOUNT = 150;
+	public static final int SYSZ_GRP_PROCESSORASSIST = 151;
+	public static final int SYSZ_GRP_RESETREFERENCEBITSMULTIPLE = 152;
+	public static final int SYSZ_GRP_TRANSACTIONALEXECUTION = 153;
+	public static final int SYSZ_GRP_VECTOR = 154;
+	public static final int SYSZ_GRP_VECTORENHANCEMENTS1 = 155;
+	public static final int SYSZ_GRP_VECTORPACKEDDECIMAL = 156;
+	public static final int SYSZ_GRP_ENDING = 157;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/TMS320C64x_const.java b/capstone/bindings/java/capstone/TMS320C64x_const.java
new file mode 100644
index 000000000..6e48b41ce
--- /dev/null
+++ b/capstone/bindings/java/capstone/TMS320C64x_const.java
@@ -0,0 +1,281 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class TMS320C64x_const {
+
+	public static final int TMS320C64X_OP_INVALID = 0;
+	public static final int TMS320C64X_OP_REG = 1;
+	public static final int TMS320C64X_OP_IMM = 2;
+	public static final int TMS320C64X_OP_MEM = 3;
+	public static final int TMS320C64X_OP_REGPAIR = 64;
+
+	public static final int TMS320C64X_MEM_DISP_INVALID = 0;
+	public static final int TMS320C64X_MEM_DISP_CONSTANT = 1;
+	public static final int TMS320C64X_MEM_DISP_REGISTER = 2;
+
+	public static final int TMS320C64X_MEM_DIR_INVALID = 0;
+	public static final int TMS320C64X_MEM_DIR_FW = 1;
+	public static final int TMS320C64X_MEM_DIR_BW = 2;
+
+	public static final int TMS320C64X_MEM_MOD_INVALID = 0;
+	public static final int TMS320C64X_MEM_MOD_NO = 1;
+	public static final int TMS320C64X_MEM_MOD_PRE = 2;
+	public static final int TMS320C64X_MEM_MOD_POST = 3;
+
+	public static final int TMS320C64X_REG_INVALID = 0;
+	public static final int TMS320C64X_REG_AMR = 1;
+	public static final int TMS320C64X_REG_CSR = 2;
+	public static final int TMS320C64X_REG_DIER = 3;
+	public static final int TMS320C64X_REG_DNUM = 4;
+	public static final int TMS320C64X_REG_ECR = 5;
+	public static final int TMS320C64X_REG_GFPGFR = 6;
+	public static final int TMS320C64X_REG_GPLYA = 7;
+	public static final int TMS320C64X_REG_GPLYB = 8;
+	public static final int TMS320C64X_REG_ICR = 9;
+	public static final int TMS320C64X_REG_IER = 10;
+	public static final int TMS320C64X_REG_IERR = 11;
+	public static final int TMS320C64X_REG_ILC = 12;
+	public static final int TMS320C64X_REG_IRP = 13;
+	public static final int TMS320C64X_REG_ISR = 14;
+	public static final int TMS320C64X_REG_ISTP = 15;
+	public static final int TMS320C64X_REG_ITSR = 16;
+	public static final int TMS320C64X_REG_NRP = 17;
+	public static final int TMS320C64X_REG_NTSR = 18;
+	public static final int TMS320C64X_REG_REP = 19;
+	public static final int TMS320C64X_REG_RILC = 20;
+	public static final int TMS320C64X_REG_SSR = 21;
+	public static final int TMS320C64X_REG_TSCH = 22;
+	public static final int TMS320C64X_REG_TSCL = 23;
+	public static final int TMS320C64X_REG_TSR = 24;
+	public static final int TMS320C64X_REG_A0 = 25;
+	public static final int TMS320C64X_REG_A1 = 26;
+	public static final int TMS320C64X_REG_A2 = 27;
+	public static final int TMS320C64X_REG_A3 = 28;
+	public static final int TMS320C64X_REG_A4 = 29;
+	public static final int TMS320C64X_REG_A5 = 30;
+	public static final int TMS320C64X_REG_A6 = 31;
+	public static final int TMS320C64X_REG_A7 = 32;
+	public static final int TMS320C64X_REG_A8 = 33;
+	public static final int TMS320C64X_REG_A9 = 34;
+	public static final int TMS320C64X_REG_A10 = 35;
+	public static final int TMS320C64X_REG_A11 = 36;
+	public static final int TMS320C64X_REG_A12 = 37;
+	public static final int TMS320C64X_REG_A13 = 38;
+	public static final int TMS320C64X_REG_A14 = 39;
+	public static final int TMS320C64X_REG_A15 = 40;
+	public static final int TMS320C64X_REG_A16 = 41;
+	public static final int TMS320C64X_REG_A17 = 42;
+	public static final int TMS320C64X_REG_A18 = 43;
+	public static final int TMS320C64X_REG_A19 = 44;
+	public static final int TMS320C64X_REG_A20 = 45;
+	public static final int TMS320C64X_REG_A21 = 46;
+	public static final int TMS320C64X_REG_A22 = 47;
+	public static final int TMS320C64X_REG_A23 = 48;
+	public static final int TMS320C64X_REG_A24 = 49;
+	public static final int TMS320C64X_REG_A25 = 50;
+	public static final int TMS320C64X_REG_A26 = 51;
+	public static final int TMS320C64X_REG_A27 = 52;
+	public static final int TMS320C64X_REG_A28 = 53;
+	public static final int TMS320C64X_REG_A29 = 54;
+	public static final int TMS320C64X_REG_A30 = 55;
+	public static final int TMS320C64X_REG_A31 = 56;
+	public static final int TMS320C64X_REG_B0 = 57;
+	public static final int TMS320C64X_REG_B1 = 58;
+	public static final int TMS320C64X_REG_B2 = 59;
+	public static final int TMS320C64X_REG_B3 = 60;
+	public static final int TMS320C64X_REG_B4 = 61;
+	public static final int TMS320C64X_REG_B5 = 62;
+	public static final int TMS320C64X_REG_B6 = 63;
+	public static final int TMS320C64X_REG_B7 = 64;
+	public static final int TMS320C64X_REG_B8 = 65;
+	public static final int TMS320C64X_REG_B9 = 66;
+	public static final int TMS320C64X_REG_B10 = 67;
+	public static final int TMS320C64X_REG_B11 = 68;
+	public static final int TMS320C64X_REG_B12 = 69;
+	public static final int TMS320C64X_REG_B13 = 70;
+	public static final int TMS320C64X_REG_B14 = 71;
+	public static final int TMS320C64X_REG_B15 = 72;
+	public static final int TMS320C64X_REG_B16 = 73;
+	public static final int TMS320C64X_REG_B17 = 74;
+	public static final int TMS320C64X_REG_B18 = 75;
+	public static final int TMS320C64X_REG_B19 = 76;
+	public static final int TMS320C64X_REG_B20 = 77;
+	public static final int TMS320C64X_REG_B21 = 78;
+	public static final int TMS320C64X_REG_B22 = 79;
+	public static final int TMS320C64X_REG_B23 = 80;
+	public static final int TMS320C64X_REG_B24 = 81;
+	public static final int TMS320C64X_REG_B25 = 82;
+	public static final int TMS320C64X_REG_B26 = 83;
+	public static final int TMS320C64X_REG_B27 = 84;
+	public static final int TMS320C64X_REG_B28 = 85;
+	public static final int TMS320C64X_REG_B29 = 86;
+	public static final int TMS320C64X_REG_B30 = 87;
+	public static final int TMS320C64X_REG_B31 = 88;
+	public static final int TMS320C64X_REG_PCE1 = 89;
+	public static final int TMS320C64X_REG_ENDING = 90;
+	public static final int TMS320C64X_REG_EFR = TMS320C64X_REG_ECR;
+	public static final int TMS320C64X_REG_IFR = TMS320C64X_REG_ISR;
+
+	public static final int TMS320C64X_INS_INVALID = 0;
+	public static final int TMS320C64X_INS_ABS = 1;
+	public static final int TMS320C64X_INS_ABS2 = 2;
+	public static final int TMS320C64X_INS_ADD = 3;
+	public static final int TMS320C64X_INS_ADD2 = 4;
+	public static final int TMS320C64X_INS_ADD4 = 5;
+	public static final int TMS320C64X_INS_ADDAB = 6;
+	public static final int TMS320C64X_INS_ADDAD = 7;
+	public static final int TMS320C64X_INS_ADDAH = 8;
+	public static final int TMS320C64X_INS_ADDAW = 9;
+	public static final int TMS320C64X_INS_ADDK = 10;
+	public static final int TMS320C64X_INS_ADDKPC = 11;
+	public static final int TMS320C64X_INS_ADDU = 12;
+	public static final int TMS320C64X_INS_AND = 13;
+	public static final int TMS320C64X_INS_ANDN = 14;
+	public static final int TMS320C64X_INS_AVG2 = 15;
+	public static final int TMS320C64X_INS_AVGU4 = 16;
+	public static final int TMS320C64X_INS_B = 17;
+	public static final int TMS320C64X_INS_BDEC = 18;
+	public static final int TMS320C64X_INS_BITC4 = 19;
+	public static final int TMS320C64X_INS_BNOP = 20;
+	public static final int TMS320C64X_INS_BPOS = 21;
+	public static final int TMS320C64X_INS_CLR = 22;
+	public static final int TMS320C64X_INS_CMPEQ = 23;
+	public static final int TMS320C64X_INS_CMPEQ2 = 24;
+	public static final int TMS320C64X_INS_CMPEQ4 = 25;
+	public static final int TMS320C64X_INS_CMPGT = 26;
+	public static final int TMS320C64X_INS_CMPGT2 = 27;
+	public static final int TMS320C64X_INS_CMPGTU4 = 28;
+	public static final int TMS320C64X_INS_CMPLT = 29;
+	public static final int TMS320C64X_INS_CMPLTU = 30;
+	public static final int TMS320C64X_INS_DEAL = 31;
+	public static final int TMS320C64X_INS_DOTP2 = 32;
+	public static final int TMS320C64X_INS_DOTPN2 = 33;
+	public static final int TMS320C64X_INS_DOTPNRSU2 = 34;
+	public static final int TMS320C64X_INS_DOTPRSU2 = 35;
+	public static final int TMS320C64X_INS_DOTPSU4 = 36;
+	public static final int TMS320C64X_INS_DOTPU4 = 37;
+	public static final int TMS320C64X_INS_EXT = 38;
+	public static final int TMS320C64X_INS_EXTU = 39;
+	public static final int TMS320C64X_INS_GMPGTU = 40;
+	public static final int TMS320C64X_INS_GMPY4 = 41;
+	public static final int TMS320C64X_INS_LDB = 42;
+	public static final int TMS320C64X_INS_LDBU = 43;
+	public static final int TMS320C64X_INS_LDDW = 44;
+	public static final int TMS320C64X_INS_LDH = 45;
+	public static final int TMS320C64X_INS_LDHU = 46;
+	public static final int TMS320C64X_INS_LDNDW = 47;
+	public static final int TMS320C64X_INS_LDNW = 48;
+	public static final int TMS320C64X_INS_LDW = 49;
+	public static final int TMS320C64X_INS_LMBD = 50;
+	public static final int TMS320C64X_INS_MAX2 = 51;
+	public static final int TMS320C64X_INS_MAXU4 = 52;
+	public static final int TMS320C64X_INS_MIN2 = 53;
+	public static final int TMS320C64X_INS_MINU4 = 54;
+	public static final int TMS320C64X_INS_MPY = 55;
+	public static final int TMS320C64X_INS_MPY2 = 56;
+	public static final int TMS320C64X_INS_MPYH = 57;
+	public static final int TMS320C64X_INS_MPYHI = 58;
+	public static final int TMS320C64X_INS_MPYHIR = 59;
+	public static final int TMS320C64X_INS_MPYHL = 60;
+	public static final int TMS320C64X_INS_MPYHLU = 61;
+	public static final int TMS320C64X_INS_MPYHSLU = 62;
+	public static final int TMS320C64X_INS_MPYHSU = 63;
+	public static final int TMS320C64X_INS_MPYHU = 64;
+	public static final int TMS320C64X_INS_MPYHULS = 65;
+	public static final int TMS320C64X_INS_MPYHUS = 66;
+	public static final int TMS320C64X_INS_MPYLH = 67;
+	public static final int TMS320C64X_INS_MPYLHU = 68;
+	public static final int TMS320C64X_INS_MPYLI = 69;
+	public static final int TMS320C64X_INS_MPYLIR = 70;
+	public static final int TMS320C64X_INS_MPYLSHU = 71;
+	public static final int TMS320C64X_INS_MPYLUHS = 72;
+	public static final int TMS320C64X_INS_MPYSU = 73;
+	public static final int TMS320C64X_INS_MPYSU4 = 74;
+	public static final int TMS320C64X_INS_MPYU = 75;
+	public static final int TMS320C64X_INS_MPYU4 = 76;
+	public static final int TMS320C64X_INS_MPYUS = 77;
+	public static final int TMS320C64X_INS_MVC = 78;
+	public static final int TMS320C64X_INS_MVD = 79;
+	public static final int TMS320C64X_INS_MVK = 80;
+	public static final int TMS320C64X_INS_MVKL = 81;
+	public static final int TMS320C64X_INS_MVKLH = 82;
+	public static final int TMS320C64X_INS_NOP = 83;
+	public static final int TMS320C64X_INS_NORM = 84;
+	public static final int TMS320C64X_INS_OR = 85;
+	public static final int TMS320C64X_INS_PACK2 = 86;
+	public static final int TMS320C64X_INS_PACKH2 = 87;
+	public static final int TMS320C64X_INS_PACKH4 = 88;
+	public static final int TMS320C64X_INS_PACKHL2 = 89;
+	public static final int TMS320C64X_INS_PACKL4 = 90;
+	public static final int TMS320C64X_INS_PACKLH2 = 91;
+	public static final int TMS320C64X_INS_ROTL = 92;
+	public static final int TMS320C64X_INS_SADD = 93;
+	public static final int TMS320C64X_INS_SADD2 = 94;
+	public static final int TMS320C64X_INS_SADDU4 = 95;
+	public static final int TMS320C64X_INS_SADDUS2 = 96;
+	public static final int TMS320C64X_INS_SAT = 97;
+	public static final int TMS320C64X_INS_SET = 98;
+	public static final int TMS320C64X_INS_SHFL = 99;
+	public static final int TMS320C64X_INS_SHL = 100;
+	public static final int TMS320C64X_INS_SHLMB = 101;
+	public static final int TMS320C64X_INS_SHR = 102;
+	public static final int TMS320C64X_INS_SHR2 = 103;
+	public static final int TMS320C64X_INS_SHRMB = 104;
+	public static final int TMS320C64X_INS_SHRU = 105;
+	public static final int TMS320C64X_INS_SHRU2 = 106;
+	public static final int TMS320C64X_INS_SMPY = 107;
+	public static final int TMS320C64X_INS_SMPY2 = 108;
+	public static final int TMS320C64X_INS_SMPYH = 109;
+	public static final int TMS320C64X_INS_SMPYHL = 110;
+	public static final int TMS320C64X_INS_SMPYLH = 111;
+	public static final int TMS320C64X_INS_SPACK2 = 112;
+	public static final int TMS320C64X_INS_SPACKU4 = 113;
+	public static final int TMS320C64X_INS_SSHL = 114;
+	public static final int TMS320C64X_INS_SSHVL = 115;
+	public static final int TMS320C64X_INS_SSHVR = 116;
+	public static final int TMS320C64X_INS_SSUB = 117;
+	public static final int TMS320C64X_INS_STB = 118;
+	public static final int TMS320C64X_INS_STDW = 119;
+	public static final int TMS320C64X_INS_STH = 120;
+	public static final int TMS320C64X_INS_STNDW = 121;
+	public static final int TMS320C64X_INS_STNW = 122;
+	public static final int TMS320C64X_INS_STW = 123;
+	public static final int TMS320C64X_INS_SUB = 124;
+	public static final int TMS320C64X_INS_SUB2 = 125;
+	public static final int TMS320C64X_INS_SUB4 = 126;
+	public static final int TMS320C64X_INS_SUBAB = 127;
+	public static final int TMS320C64X_INS_SUBABS4 = 128;
+	public static final int TMS320C64X_INS_SUBAH = 129;
+	public static final int TMS320C64X_INS_SUBAW = 130;
+	public static final int TMS320C64X_INS_SUBC = 131;
+	public static final int TMS320C64X_INS_SUBU = 132;
+	public static final int TMS320C64X_INS_SWAP4 = 133;
+	public static final int TMS320C64X_INS_UNPKHU4 = 134;
+	public static final int TMS320C64X_INS_UNPKLU4 = 135;
+	public static final int TMS320C64X_INS_XOR = 136;
+	public static final int TMS320C64X_INS_XPND2 = 137;
+	public static final int TMS320C64X_INS_XPND4 = 138;
+	public static final int TMS320C64X_INS_IDLE = 139;
+	public static final int TMS320C64X_INS_MV = 140;
+	public static final int TMS320C64X_INS_NEG = 141;
+	public static final int TMS320C64X_INS_NOT = 142;
+	public static final int TMS320C64X_INS_SWAP2 = 143;
+	public static final int TMS320C64X_INS_ZERO = 144;
+	public static final int TMS320C64X_INS_ENDING = 145;
+
+	public static final int TMS320C64X_GRP_INVALID = 0;
+	public static final int TMS320C64X_GRP_JUMP = 1;
+	public static final int TMS320C64X_GRP_FUNIT_D = 128;
+	public static final int TMS320C64X_GRP_FUNIT_L = 129;
+	public static final int TMS320C64X_GRP_FUNIT_M = 130;
+	public static final int TMS320C64X_GRP_FUNIT_S = 131;
+	public static final int TMS320C64X_GRP_FUNIT_NO = 132;
+	public static final int TMS320C64X_GRP_ENDING = 133;
+
+	public static final int TMS320C64X_FUNIT_INVALID = 0;
+	public static final int TMS320C64X_FUNIT_D = 1;
+	public static final int TMS320C64X_FUNIT_L = 2;
+	public static final int TMS320C64X_FUNIT_M = 3;
+	public static final int TMS320C64X_FUNIT_S = 4;
+	public static final int TMS320C64X_FUNIT_NO = 5;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Wasm_const.java b/capstone/bindings/java/capstone/Wasm_const.java
new file mode 100644
index 000000000..4b28c672b
--- /dev/null
+++ b/capstone/bindings/java/capstone/Wasm_const.java
@@ -0,0 +1,195 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Wasm_const {
+
+	public static final int WASM_OP_INVALID = 0;
+	public static final int WASM_OP_NONE = 1;
+	public static final int WASM_OP_INT7 = 2;
+	public static final int WASM_OP_VARUINT32 = 3;
+	public static final int WASM_OP_VARUINT64 = 4;
+	public static final int WASM_OP_UINT32 = 5;
+	public static final int WASM_OP_UINT64 = 6;
+	public static final int WASM_OP_IMM = 7;
+	public static final int WASM_OP_BRTABLE = 8;
+	public static final int WASM_INS_UNREACHABLE = 0x0;
+	public static final int WASM_INS_NOP = 0x1;
+	public static final int WASM_INS_BLOCK = 0x2;
+	public static final int WASM_INS_LOOP = 0x3;
+	public static final int WASM_INS_IF = 0x4;
+	public static final int WASM_INS_ELSE = 0x5;
+	public static final int WASM_INS_END = 0xb;
+	public static final int WASM_INS_BR = 0xc;
+	public static final int WASM_INS_BR_IF = 0xd;
+	public static final int WASM_INS_BR_TABLE = 0xe;
+	public static final int WASM_INS_RETURN = 0xf;
+	public static final int WASM_INS_CALL = 0x10;
+	public static final int WASM_INS_CALL_INDIRECT = 0x11;
+	public static final int WASM_INS_DROP = 0x1a;
+	public static final int WASM_INS_SELECT = 0x1b;
+	public static final int WASM_INS_GET_LOCAL = 0x20;
+	public static final int WASM_INS_SET_LOCAL = 0x21;
+	public static final int WASM_INS_TEE_LOCAL = 0x22;
+	public static final int WASM_INS_GET_GLOBAL = 0x23;
+	public static final int WASM_INS_SET_GLOBAL = 0x24;
+	public static final int WASM_INS_I32_LOAD = 0x28;
+	public static final int WASM_INS_I64_LOAD = 0x29;
+	public static final int WASM_INS_F32_LOAD = 0x2a;
+	public static final int WASM_INS_F64_LOAD = 0x2b;
+	public static final int WASM_INS_I32_LOAD8_S = 0x2c;
+	public static final int WASM_INS_I32_LOAD8_U = 0x2d;
+	public static final int WASM_INS_I32_LOAD16_S = 0x2e;
+	public static final int WASM_INS_I32_LOAD16_U = 0x2f;
+	public static final int WASM_INS_I64_LOAD8_S = 0x30;
+	public static final int WASM_INS_I64_LOAD8_U = 0x31;
+	public static final int WASM_INS_I64_LOAD16_S = 0x32;
+	public static final int WASM_INS_I64_LOAD16_U = 0x33;
+	public static final int WASM_INS_I64_LOAD32_S = 0x34;
+	public static final int WASM_INS_I64_LOAD32_U = 0x35;
+	public static final int WASM_INS_I32_STORE = 0x36;
+	public static final int WASM_INS_I64_STORE = 0x37;
+	public static final int WASM_INS_F32_STORE = 0x38;
+	public static final int WASM_INS_F64_STORE = 0x39;
+	public static final int WASM_INS_I32_STORE8 = 0x3a;
+	public static final int WASM_INS_I32_STORE16 = 0x3b;
+	public static final int WASM_INS_I64_STORE8 = 0x3c;
+	public static final int WASM_INS_I64_STORE16 = 0x3d;
+	public static final int WASM_INS_I64_STORE32 = 0x3e;
+	public static final int WASM_INS_CURRENT_MEMORY = 0x3f;
+	public static final int WASM_INS_GROW_MEMORY = 0x40;
+	public static final int WASM_INS_I32_CONST = 0x41;
+	public static final int WASM_INS_I64_CONST = 0x42;
+	public static final int WASM_INS_F32_CONST = 0x43;
+	public static final int WASM_INS_F64_CONST = 0x44;
+	public static final int WASM_INS_I32_EQZ = 0x45;
+	public static final int WASM_INS_I32_EQ = 0x46;
+	public static final int WASM_INS_I32_NE = 0x47;
+	public static final int WASM_INS_I32_LT_S = 0x48;
+	public static final int WASM_INS_I32_LT_U = 0x49;
+	public static final int WASM_INS_I32_GT_S = 0x4a;
+	public static final int WASM_INS_I32_GT_U = 0x4b;
+	public static final int WASM_INS_I32_LE_S = 0x4c;
+	public static final int WASM_INS_I32_LE_U = 0x4d;
+	public static final int WASM_INS_I32_GE_S = 0x4e;
+	public static final int WASM_INS_I32_GE_U = 0x4f;
+	public static final int WASM_INS_I64_EQZ = 0x50;
+	public static final int WASM_INS_I64_EQ = 0x51;
+	public static final int WASM_INS_I64_NE = 0x52;
+	public static final int WASM_INS_I64_LT_S = 0x53;
+	public static final int WASM_INS_I64_LT_U = 0x54;
+	public static final int WASM_INS_I64_GT_U = 0x56;
+	public static final int WASM_INS_I64_LE_S = 0x57;
+	public static final int WASM_INS_I64_LE_U = 0x58;
+	public static final int WASM_INS_I64_GE_S = 0x59;
+	public static final int WASM_INS_I64_GE_U = 0x5a;
+	public static final int WASM_INS_F32_EQ = 0x5b;
+	public static final int WASM_INS_F32_NE = 0x5c;
+	public static final int WASM_INS_F32_LT = 0x5d;
+	public static final int WASM_INS_F32_GT = 0x5e;
+	public static final int WASM_INS_F32_LE = 0x5f;
+	public static final int WASM_INS_F32_GE = 0x60;
+	public static final int WASM_INS_F64_EQ = 0x61;
+	public static final int WASM_INS_F64_NE = 0x62;
+	public static final int WASM_INS_F64_LT = 0x63;
+	public static final int WASM_INS_F64_GT = 0x64;
+	public static final int WASM_INS_F64_LE = 0x65;
+	public static final int WASM_INS_F64_GE = 0x66;
+	public static final int WASM_INS_I32_CLZ = 0x67;
+	public static final int WASM_INS_I32_CTZ = 0x68;
+	public static final int WASM_INS_I32_POPCNT = 0x69;
+	public static final int WASM_INS_I32_ADD = 0x6a;
+	public static final int WASM_INS_I32_SUB = 0x6b;
+	public static final int WASM_INS_I32_MUL = 0x6c;
+	public static final int WASM_INS_I32_DIV_S = 0x6d;
+	public static final int WASM_INS_I32_DIV_U = 0x6e;
+	public static final int WASM_INS_I32_REM_S = 0x6f;
+	public static final int WASM_INS_I32_REM_U = 0x70;
+	public static final int WASM_INS_I32_AND = 0x71;
+	public static final int WASM_INS_I32_OR = 0x72;
+	public static final int WASM_INS_I32_XOR = 0x73;
+	public static final int WASM_INS_I32_SHL = 0x74;
+	public static final int WASM_INS_I32_SHR_S = 0x75;
+	public static final int WASM_INS_I32_SHR_U = 0x76;
+	public static final int WASM_INS_I32_ROTL = 0x77;
+	public static final int WASM_INS_I32_ROTR = 0x78;
+	public static final int WASM_INS_I64_CLZ = 0x79;
+	public static final int WASM_INS_I64_CTZ = 0x7a;
+	public static final int WASM_INS_I64_POPCNT = 0x7b;
+	public static final int WASM_INS_I64_ADD = 0x7c;
+	public static final int WASM_INS_I64_SUB = 0x7d;
+	public static final int WASM_INS_I64_MUL = 0x7e;
+	public static final int WASM_INS_I64_DIV_S = 0x7f;
+	public static final int WASM_INS_I64_DIV_U = 0x80;
+	public static final int WASM_INS_I64_REM_S = 0x81;
+	public static final int WASM_INS_I64_REM_U = 0x82;
+	public static final int WASM_INS_I64_AND = 0x83;
+	public static final int WASM_INS_I64_OR = 0x84;
+	public static final int WASM_INS_I64_XOR = 0x85;
+	public static final int WASM_INS_I64_SHL = 0x86;
+	public static final int WASM_INS_I64_SHR_S = 0x87;
+	public static final int WASM_INS_I64_SHR_U = 0x88;
+	public static final int WASM_INS_I64_ROTL = 0x89;
+	public static final int WASM_INS_I64_ROTR = 0x8a;
+	public static final int WASM_INS_F32_ABS = 0x8b;
+	public static final int WASM_INS_F32_NEG = 0x8c;
+	public static final int WASM_INS_F32_CEIL = 0x8d;
+	public static final int WASM_INS_F32_FLOOR = 0x8e;
+	public static final int WASM_INS_F32_TRUNC = 0x8f;
+	public static final int WASM_INS_F32_NEAREST = 0x90;
+	public static final int WASM_INS_F32_SQRT = 0x91;
+	public static final int WASM_INS_F32_ADD = 0x92;
+	public static final int WASM_INS_F32_SUB = 0x93;
+	public static final int WASM_INS_F32_MUL = 0x94;
+	public static final int WASM_INS_F32_DIV = 0x95;
+	public static final int WASM_INS_F32_MIN = 0x96;
+	public static final int WASM_INS_F32_MAX = 0x97;
+	public static final int WASM_INS_F32_COPYSIGN = 0x98;
+	public static final int WASM_INS_F64_ABS = 0x99;
+	public static final int WASM_INS_F64_NEG = 0x9a;
+	public static final int WASM_INS_F64_CEIL = 0x9b;
+	public static final int WASM_INS_F64_FLOOR = 0x9c;
+	public static final int WASM_INS_F64_TRUNC = 0x9d;
+	public static final int WASM_INS_F64_NEAREST = 0x9e;
+	public static final int WASM_INS_F64_SQRT = 0x9f;
+	public static final int WASM_INS_F64_ADD = 0xa0;
+	public static final int WASM_INS_F64_SUB = 0xa1;
+	public static final int WASM_INS_F64_MUL = 0xa2;
+	public static final int WASM_INS_F64_DIV = 0xa3;
+	public static final int WASM_INS_F64_MIN = 0xa4;
+	public static final int WASM_INS_F64_MAX = 0xa5;
+	public static final int WASM_INS_F64_COPYSIGN = 0xa6;
+	public static final int WASM_INS_I32_WARP_I64 = 0xa7;
+	public static final int WASM_INS_I32_TRUNC_U_F32 = 0xa9;
+	public static final int WASM_INS_I32_TRUNC_S_F64 = 0xaa;
+	public static final int WASM_INS_I32_TRUNC_U_F64 = 0xab;
+	public static final int WASM_INS_I64_EXTEND_S_I32 = 0xac;
+	public static final int WASM_INS_I64_EXTEND_U_I32 = 0xad;
+	public static final int WASM_INS_I64_TRUNC_S_F32 = 0xae;
+	public static final int WASM_INS_I64_TRUNC_U_F32 = 0xaf;
+	public static final int WASM_INS_I64_TRUNC_S_F64 = 0xb0;
+	public static final int WASM_INS_I64_TRUNC_U_F64 = 0xb1;
+	public static final int WASM_INS_F32_CONVERT_S_I32 = 0xb2;
+	public static final int WASM_INS_F32_CONVERT_U_I32 = 0xb3;
+	public static final int WASM_INS_F32_CONVERT_S_I64 = 0xb4;
+	public static final int WASM_INS_F32_CONVERT_U_I64 = 0xb5;
+	public static final int WASM_INS_F32_DEMOTE_F64 = 0xb6;
+	public static final int WASM_INS_F64_CONVERT_S_I32 = 0xb7;
+	public static final int WASM_INS_F64_CONVERT_U_I32 = 0xb8;
+	public static final int WASM_INS_F64_CONVERT_S_I64 = 0xb9;
+	public static final int WASM_INS_F64_CONVERT_U_I64 = 0xba;
+	public static final int WASM_INS_F64_PROMOTE_F32 = 0xbb;
+	public static final int WASM_INS_I32_REINTERPRET_F32 = 0xbc;
+	public static final int WASM_INS_I64_REINTERPRET_F64 = 0xbd;
+	public static final int WASM_INS_F32_REINTERPRET_I32 = 0xbe;
+	public static final int WASM_INS_F64_REINTERPRET_I64 = 0xbf;
+	public static final int WASM_INS_INVALID = 512;
+	public static final int WASM_INS_ENDING = 513;
+
+	public static final int WASM_GRP_INVALID = 0;
+	public static final int WASM_GRP_NUMBERIC = 8;
+	public static final int WASM_GRP_PARAMETRIC = 9;
+	public static final int WASM_GRP_VARIABLE = 10;
+	public static final int WASM_GRP_MEMORY = 11;
+	public static final int WASM_GRP_CONTROL = 12;
+	public static final int WASM_GRP_ENDING = 13;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/X86.java b/capstone/bindings/java/capstone/X86.java
new file mode 100644
index 000000000..6a8d1ed16
--- /dev/null
+++ b/capstone/bindings/java/capstone/X86.java
@@ -0,0 +1,165 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.X86_const.*;
+
+public class X86 {
+
+  public static class MemType extends Structure {
+    public int segment;
+    public int base;
+    public int index;
+    public int scale;
+    public long disp;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("segment", "base", "index", "scale", "disp");
+    }
+  }
+  
+  public static class Encoding extends Structure {
+    public byte modrmOffset;
+    public byte dispOffset;
+    public byte dispSize;
+    public byte immOffset;
+    public byte immSize;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("modrmOffset", "dispOffset", "dispSize", "immOffset", "immSize");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public long imm;
+    public MemType mem;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("reg", "imm", "mem");
+    }
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+    public byte size;
+    public byte access;
+    public int avx_bcast;
+    public boolean avx_zero_opmask;
+
+    public void read() {
+      super.read();
+      if (type == X86_OP_MEM)
+        value.setType(MemType.class);
+      if (type == X86_OP_IMM)
+        value.setType(Long.TYPE);
+      if (type == X86_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == X86_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value", "size", "access", "avx_bcast", "avx_zero_opmask");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte [] prefix;
+    public byte [] opcode;
+    public byte rex;
+    public byte addr_size;
+    public byte modrm;
+    public byte sib;
+    public long disp;
+    public int sib_index;
+    public byte sib_scale;
+    public int sib_base;
+    public int xop_cc;
+    public int sse_cc;
+    public int avx_cc;
+    public byte avx_sae;
+    public int avx_rm;
+    public long eflags;
+
+    public byte op_count;
+
+    public Operand [] op;
+    
+    public Encoding encoding;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+      opcode = new byte[4];
+      prefix = new byte[4];
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("prefix", "opcode", "rex", "addr_size",
+          "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "xop_cc", "sse_cc", "avx_cc", "avx_sae", "avx_rm", "eflags", "op_count", "op", "encoding");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public byte [] prefix;
+    public byte [] opcode;
+    public byte opSize;
+    public byte rex;
+    public byte addrSize;
+    public byte dispSize;
+    public byte immSize;
+    public byte modrm;
+    public byte sib;
+    public long disp;
+    public int sibIndex;
+    public byte sibScale;
+    public int sibBase;
+    public int xopCC;
+    public int sseCC;
+    public int avxCC;
+    public boolean avxSae;
+    public int avxRm;
+    public long eflags;
+
+    public Operand[] op;
+    
+    public Encoding encoding;
+
+    public OpInfo(UnionOpInfo e) {
+      prefix = e.prefix;
+      opcode = e.opcode;
+      rex = e.rex;
+      addrSize = e.addr_size;
+      modrm = e.modrm;
+      sib = e.sib;
+      disp = e.disp;
+      sibIndex = e.sib_index;
+      sibScale = e.sib_scale;
+      sibBase = e.sib_base;
+      xopCC = e.xop_cc;
+      sseCC = e.sse_cc;
+      avxCC = e.avx_cc;
+      avxSae = e.avx_sae > 0;
+      avxRm = e.avx_rm;
+      eflags = e.eflags;
+      op = new Operand[e.op_count];
+      for (int i=0; i<e.op_count; i++)
+        op[i] = e.op[i];
+      encoding = e.encoding;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/X86_const.java b/capstone/bindings/java/capstone/X86_const.java
new file mode 100644
index 000000000..655852d4d
--- /dev/null
+++ b/capstone/bindings/java/capstone/X86_const.java
@@ -0,0 +1,1993 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class X86_const {
+
+	public static final int X86_REG_INVALID = 0;
+	public static final int X86_REG_AH = 1;
+	public static final int X86_REG_AL = 2;
+	public static final int X86_REG_AX = 3;
+	public static final int X86_REG_BH = 4;
+	public static final int X86_REG_BL = 5;
+	public static final int X86_REG_BP = 6;
+	public static final int X86_REG_BPL = 7;
+	public static final int X86_REG_BX = 8;
+	public static final int X86_REG_CH = 9;
+	public static final int X86_REG_CL = 10;
+	public static final int X86_REG_CS = 11;
+	public static final int X86_REG_CX = 12;
+	public static final int X86_REG_DH = 13;
+	public static final int X86_REG_DI = 14;
+	public static final int X86_REG_DIL = 15;
+	public static final int X86_REG_DL = 16;
+	public static final int X86_REG_DS = 17;
+	public static final int X86_REG_DX = 18;
+	public static final int X86_REG_EAX = 19;
+	public static final int X86_REG_EBP = 20;
+	public static final int X86_REG_EBX = 21;
+	public static final int X86_REG_ECX = 22;
+	public static final int X86_REG_EDI = 23;
+	public static final int X86_REG_EDX = 24;
+	public static final int X86_REG_EFLAGS = 25;
+	public static final int X86_REG_EIP = 26;
+	public static final int X86_REG_EIZ = 27;
+	public static final int X86_REG_ES = 28;
+	public static final int X86_REG_ESI = 29;
+	public static final int X86_REG_ESP = 30;
+	public static final int X86_REG_FPSW = 31;
+	public static final int X86_REG_FS = 32;
+	public static final int X86_REG_GS = 33;
+	public static final int X86_REG_IP = 34;
+	public static final int X86_REG_RAX = 35;
+	public static final int X86_REG_RBP = 36;
+	public static final int X86_REG_RBX = 37;
+	public static final int X86_REG_RCX = 38;
+	public static final int X86_REG_RDI = 39;
+	public static final int X86_REG_RDX = 40;
+	public static final int X86_REG_RIP = 41;
+	public static final int X86_REG_RIZ = 42;
+	public static final int X86_REG_RSI = 43;
+	public static final int X86_REG_RSP = 44;
+	public static final int X86_REG_SI = 45;
+	public static final int X86_REG_SIL = 46;
+	public static final int X86_REG_SP = 47;
+	public static final int X86_REG_SPL = 48;
+	public static final int X86_REG_SS = 49;
+	public static final int X86_REG_CR0 = 50;
+	public static final int X86_REG_CR1 = 51;
+	public static final int X86_REG_CR2 = 52;
+	public static final int X86_REG_CR3 = 53;
+	public static final int X86_REG_CR4 = 54;
+	public static final int X86_REG_CR5 = 55;
+	public static final int X86_REG_CR6 = 56;
+	public static final int X86_REG_CR7 = 57;
+	public static final int X86_REG_CR8 = 58;
+	public static final int X86_REG_CR9 = 59;
+	public static final int X86_REG_CR10 = 60;
+	public static final int X86_REG_CR11 = 61;
+	public static final int X86_REG_CR12 = 62;
+	public static final int X86_REG_CR13 = 63;
+	public static final int X86_REG_CR14 = 64;
+	public static final int X86_REG_CR15 = 65;
+	public static final int X86_REG_DR0 = 66;
+	public static final int X86_REG_DR1 = 67;
+	public static final int X86_REG_DR2 = 68;
+	public static final int X86_REG_DR3 = 69;
+	public static final int X86_REG_DR4 = 70;
+	public static final int X86_REG_DR5 = 71;
+	public static final int X86_REG_DR6 = 72;
+	public static final int X86_REG_DR7 = 73;
+	public static final int X86_REG_DR8 = 74;
+	public static final int X86_REG_DR9 = 75;
+	public static final int X86_REG_DR10 = 76;
+	public static final int X86_REG_DR11 = 77;
+	public static final int X86_REG_DR12 = 78;
+	public static final int X86_REG_DR13 = 79;
+	public static final int X86_REG_DR14 = 80;
+	public static final int X86_REG_DR15 = 81;
+	public static final int X86_REG_FP0 = 82;
+	public static final int X86_REG_FP1 = 83;
+	public static final int X86_REG_FP2 = 84;
+	public static final int X86_REG_FP3 = 85;
+	public static final int X86_REG_FP4 = 86;
+	public static final int X86_REG_FP5 = 87;
+	public static final int X86_REG_FP6 = 88;
+	public static final int X86_REG_FP7 = 89;
+	public static final int X86_REG_K0 = 90;
+	public static final int X86_REG_K1 = 91;
+	public static final int X86_REG_K2 = 92;
+	public static final int X86_REG_K3 = 93;
+	public static final int X86_REG_K4 = 94;
+	public static final int X86_REG_K5 = 95;
+	public static final int X86_REG_K6 = 96;
+	public static final int X86_REG_K7 = 97;
+	public static final int X86_REG_MM0 = 98;
+	public static final int X86_REG_MM1 = 99;
+	public static final int X86_REG_MM2 = 100;
+	public static final int X86_REG_MM3 = 101;
+	public static final int X86_REG_MM4 = 102;
+	public static final int X86_REG_MM5 = 103;
+	public static final int X86_REG_MM6 = 104;
+	public static final int X86_REG_MM7 = 105;
+	public static final int X86_REG_R8 = 106;
+	public static final int X86_REG_R9 = 107;
+	public static final int X86_REG_R10 = 108;
+	public static final int X86_REG_R11 = 109;
+	public static final int X86_REG_R12 = 110;
+	public static final int X86_REG_R13 = 111;
+	public static final int X86_REG_R14 = 112;
+	public static final int X86_REG_R15 = 113;
+	public static final int X86_REG_ST0 = 114;
+	public static final int X86_REG_ST1 = 115;
+	public static final int X86_REG_ST2 = 116;
+	public static final int X86_REG_ST3 = 117;
+	public static final int X86_REG_ST4 = 118;
+	public static final int X86_REG_ST5 = 119;
+	public static final int X86_REG_ST6 = 120;
+	public static final int X86_REG_ST7 = 121;
+	public static final int X86_REG_XMM0 = 122;
+	public static final int X86_REG_XMM1 = 123;
+	public static final int X86_REG_XMM2 = 124;
+	public static final int X86_REG_XMM3 = 125;
+	public static final int X86_REG_XMM4 = 126;
+	public static final int X86_REG_XMM5 = 127;
+	public static final int X86_REG_XMM6 = 128;
+	public static final int X86_REG_XMM7 = 129;
+	public static final int X86_REG_XMM8 = 130;
+	public static final int X86_REG_XMM9 = 131;
+	public static final int X86_REG_XMM10 = 132;
+	public static final int X86_REG_XMM11 = 133;
+	public static final int X86_REG_XMM12 = 134;
+	public static final int X86_REG_XMM13 = 135;
+	public static final int X86_REG_XMM14 = 136;
+	public static final int X86_REG_XMM15 = 137;
+	public static final int X86_REG_XMM16 = 138;
+	public static final int X86_REG_XMM17 = 139;
+	public static final int X86_REG_XMM18 = 140;
+	public static final int X86_REG_XMM19 = 141;
+	public static final int X86_REG_XMM20 = 142;
+	public static final int X86_REG_XMM21 = 143;
+	public static final int X86_REG_XMM22 = 144;
+	public static final int X86_REG_XMM23 = 145;
+	public static final int X86_REG_XMM24 = 146;
+	public static final int X86_REG_XMM25 = 147;
+	public static final int X86_REG_XMM26 = 148;
+	public static final int X86_REG_XMM27 = 149;
+	public static final int X86_REG_XMM28 = 150;
+	public static final int X86_REG_XMM29 = 151;
+	public static final int X86_REG_XMM30 = 152;
+	public static final int X86_REG_XMM31 = 153;
+	public static final int X86_REG_YMM0 = 154;
+	public static final int X86_REG_YMM1 = 155;
+	public static final int X86_REG_YMM2 = 156;
+	public static final int X86_REG_YMM3 = 157;
+	public static final int X86_REG_YMM4 = 158;
+	public static final int X86_REG_YMM5 = 159;
+	public static final int X86_REG_YMM6 = 160;
+	public static final int X86_REG_YMM7 = 161;
+	public static final int X86_REG_YMM8 = 162;
+	public static final int X86_REG_YMM9 = 163;
+	public static final int X86_REG_YMM10 = 164;
+	public static final int X86_REG_YMM11 = 165;
+	public static final int X86_REG_YMM12 = 166;
+	public static final int X86_REG_YMM13 = 167;
+	public static final int X86_REG_YMM14 = 168;
+	public static final int X86_REG_YMM15 = 169;
+	public static final int X86_REG_YMM16 = 170;
+	public static final int X86_REG_YMM17 = 171;
+	public static final int X86_REG_YMM18 = 172;
+	public static final int X86_REG_YMM19 = 173;
+	public static final int X86_REG_YMM20 = 174;
+	public static final int X86_REG_YMM21 = 175;
+	public static final int X86_REG_YMM22 = 176;
+	public static final int X86_REG_YMM23 = 177;
+	public static final int X86_REG_YMM24 = 178;
+	public static final int X86_REG_YMM25 = 179;
+	public static final int X86_REG_YMM26 = 180;
+	public static final int X86_REG_YMM27 = 181;
+	public static final int X86_REG_YMM28 = 182;
+	public static final int X86_REG_YMM29 = 183;
+	public static final int X86_REG_YMM30 = 184;
+	public static final int X86_REG_YMM31 = 185;
+	public static final int X86_REG_ZMM0 = 186;
+	public static final int X86_REG_ZMM1 = 187;
+	public static final int X86_REG_ZMM2 = 188;
+	public static final int X86_REG_ZMM3 = 189;
+	public static final int X86_REG_ZMM4 = 190;
+	public static final int X86_REG_ZMM5 = 191;
+	public static final int X86_REG_ZMM6 = 192;
+	public static final int X86_REG_ZMM7 = 193;
+	public static final int X86_REG_ZMM8 = 194;
+	public static final int X86_REG_ZMM9 = 195;
+	public static final int X86_REG_ZMM10 = 196;
+	public static final int X86_REG_ZMM11 = 197;
+	public static final int X86_REG_ZMM12 = 198;
+	public static final int X86_REG_ZMM13 = 199;
+	public static final int X86_REG_ZMM14 = 200;
+	public static final int X86_REG_ZMM15 = 201;
+	public static final int X86_REG_ZMM16 = 202;
+	public static final int X86_REG_ZMM17 = 203;
+	public static final int X86_REG_ZMM18 = 204;
+	public static final int X86_REG_ZMM19 = 205;
+	public static final int X86_REG_ZMM20 = 206;
+	public static final int X86_REG_ZMM21 = 207;
+	public static final int X86_REG_ZMM22 = 208;
+	public static final int X86_REG_ZMM23 = 209;
+	public static final int X86_REG_ZMM24 = 210;
+	public static final int X86_REG_ZMM25 = 211;
+	public static final int X86_REG_ZMM26 = 212;
+	public static final int X86_REG_ZMM27 = 213;
+	public static final int X86_REG_ZMM28 = 214;
+	public static final int X86_REG_ZMM29 = 215;
+	public static final int X86_REG_ZMM30 = 216;
+	public static final int X86_REG_ZMM31 = 217;
+	public static final int X86_REG_R8B = 218;
+	public static final int X86_REG_R9B = 219;
+	public static final int X86_REG_R10B = 220;
+	public static final int X86_REG_R11B = 221;
+	public static final int X86_REG_R12B = 222;
+	public static final int X86_REG_R13B = 223;
+	public static final int X86_REG_R14B = 224;
+	public static final int X86_REG_R15B = 225;
+	public static final int X86_REG_R8D = 226;
+	public static final int X86_REG_R9D = 227;
+	public static final int X86_REG_R10D = 228;
+	public static final int X86_REG_R11D = 229;
+	public static final int X86_REG_R12D = 230;
+	public static final int X86_REG_R13D = 231;
+	public static final int X86_REG_R14D = 232;
+	public static final int X86_REG_R15D = 233;
+	public static final int X86_REG_R8W = 234;
+	public static final int X86_REG_R9W = 235;
+	public static final int X86_REG_R10W = 236;
+	public static final int X86_REG_R11W = 237;
+	public static final int X86_REG_R12W = 238;
+	public static final int X86_REG_R13W = 239;
+	public static final int X86_REG_R14W = 240;
+	public static final int X86_REG_R15W = 241;
+	public static final int X86_REG_BND0 = 242;
+	public static final int X86_REG_BND1 = 243;
+	public static final int X86_REG_BND2 = 244;
+	public static final int X86_REG_BND3 = 245;
+	public static final int X86_REG_ENDING = 246;
+	public static final int X86_EFLAGS_MODIFY_AF = 1<<0;
+	public static final int X86_EFLAGS_MODIFY_CF = 1<<1;
+	public static final int X86_EFLAGS_MODIFY_SF = 1<<2;
+	public static final int X86_EFLAGS_MODIFY_ZF = 1<<3;
+	public static final int X86_EFLAGS_MODIFY_PF = 1<<4;
+	public static final int X86_EFLAGS_MODIFY_OF = 1<<5;
+	public static final int X86_EFLAGS_MODIFY_TF = 1<<6;
+	public static final int X86_EFLAGS_MODIFY_IF = 1<<7;
+	public static final int X86_EFLAGS_MODIFY_DF = 1<<8;
+	public static final int X86_EFLAGS_MODIFY_NT = 1<<9;
+	public static final int X86_EFLAGS_MODIFY_RF = 1<<10;
+	public static final int X86_EFLAGS_PRIOR_OF = 1<<11;
+	public static final int X86_EFLAGS_PRIOR_SF = 1<<12;
+	public static final int X86_EFLAGS_PRIOR_ZF = 1<<13;
+	public static final int X86_EFLAGS_PRIOR_AF = 1<<14;
+	public static final int X86_EFLAGS_PRIOR_PF = 1<<15;
+	public static final int X86_EFLAGS_PRIOR_CF = 1<<16;
+	public static final int X86_EFLAGS_PRIOR_TF = 1<<17;
+	public static final int X86_EFLAGS_PRIOR_IF = 1<<18;
+	public static final int X86_EFLAGS_PRIOR_DF = 1<<19;
+	public static final int X86_EFLAGS_PRIOR_NT = 1<<20;
+	public static final int X86_EFLAGS_RESET_OF = 1<<21;
+	public static final int X86_EFLAGS_RESET_CF = 1<<22;
+	public static final int X86_EFLAGS_RESET_DF = 1<<23;
+	public static final int X86_EFLAGS_RESET_IF = 1<<24;
+	public static final int X86_EFLAGS_RESET_SF = 1<<25;
+	public static final int X86_EFLAGS_RESET_AF = 1<<26;
+	public static final int X86_EFLAGS_RESET_TF = 1<<27;
+	public static final int X86_EFLAGS_RESET_NT = 1<<28;
+	public static final int X86_EFLAGS_RESET_PF = 1<<29;
+	public static final int X86_EFLAGS_SET_CF = 1<<30;
+	public static final int X86_EFLAGS_SET_DF = 1<<31;
+	public static final int X86_EFLAGS_SET_IF = 1<<32;
+	public static final int X86_EFLAGS_TEST_OF = 1<<33;
+	public static final int X86_EFLAGS_TEST_SF = 1<<34;
+	public static final int X86_EFLAGS_TEST_ZF = 1<<35;
+	public static final int X86_EFLAGS_TEST_PF = 1<<36;
+	public static final int X86_EFLAGS_TEST_CF = 1<<37;
+	public static final int X86_EFLAGS_TEST_NT = 1<<38;
+	public static final int X86_EFLAGS_TEST_DF = 1<<39;
+	public static final int X86_EFLAGS_UNDEFINED_OF = 1<<40;
+	public static final int X86_EFLAGS_UNDEFINED_SF = 1<<41;
+	public static final int X86_EFLAGS_UNDEFINED_ZF = 1<<42;
+	public static final int X86_EFLAGS_UNDEFINED_PF = 1<<43;
+	public static final int X86_EFLAGS_UNDEFINED_AF = 1<<44;
+	public static final int X86_EFLAGS_UNDEFINED_CF = 1<<45;
+	public static final int X86_EFLAGS_RESET_RF = 1<<46;
+	public static final int X86_EFLAGS_TEST_RF = 1<<47;
+	public static final int X86_EFLAGS_TEST_IF = 1<<48;
+	public static final int X86_EFLAGS_TEST_TF = 1<<49;
+	public static final int X86_EFLAGS_TEST_AF = 1<<50;
+	public static final int X86_EFLAGS_RESET_ZF = 1<<51;
+	public static final int X86_EFLAGS_SET_OF = 1<<52;
+	public static final int X86_EFLAGS_SET_SF = 1<<53;
+	public static final int X86_EFLAGS_SET_ZF = 1<<54;
+	public static final int X86_EFLAGS_SET_AF = 1<<55;
+	public static final int X86_EFLAGS_SET_PF = 1<<56;
+	public static final int X86_EFLAGS_RESET_0F = 1<<57;
+	public static final int X86_EFLAGS_RESET_AC = 1<<58;
+	public static final int X86_FPU_FLAGS_MODIFY_C0 = 1<<0;
+	public static final int X86_FPU_FLAGS_MODIFY_C1 = 1<<1;
+	public static final int X86_FPU_FLAGS_MODIFY_C2 = 1<<2;
+	public static final int X86_FPU_FLAGS_MODIFY_C3 = 1<<3;
+	public static final int X86_FPU_FLAGS_RESET_C0 = 1<<4;
+	public static final int X86_FPU_FLAGS_RESET_C1 = 1<<5;
+	public static final int X86_FPU_FLAGS_RESET_C2 = 1<<6;
+	public static final int X86_FPU_FLAGS_RESET_C3 = 1<<7;
+	public static final int X86_FPU_FLAGS_SET_C0 = 1<<8;
+	public static final int X86_FPU_FLAGS_SET_C1 = 1<<9;
+	public static final int X86_FPU_FLAGS_SET_C2 = 1<<10;
+	public static final int X86_FPU_FLAGS_SET_C3 = 1<<11;
+	public static final int X86_FPU_FLAGS_UNDEFINED_C0 = 1<<12;
+	public static final int X86_FPU_FLAGS_UNDEFINED_C1 = 1<<13;
+	public static final int X86_FPU_FLAGS_UNDEFINED_C2 = 1<<14;
+	public static final int X86_FPU_FLAGS_UNDEFINED_C3 = 1<<15;
+	public static final int X86_FPU_FLAGS_TEST_C0 = 1<<16;
+	public static final int X86_FPU_FLAGS_TEST_C1 = 1<<17;
+	public static final int X86_FPU_FLAGS_TEST_C2 = 1<<18;
+	public static final int X86_FPU_FLAGS_TEST_C3 = 1<<19;
+
+	public static final int X86_OP_INVALID = 0;
+	public static final int X86_OP_REG = 1;
+	public static final int X86_OP_IMM = 2;
+	public static final int X86_OP_MEM = 3;
+
+	public static final int X86_XOP_CC_INVALID = 0;
+	public static final int X86_XOP_CC_LT = 1;
+	public static final int X86_XOP_CC_LE = 2;
+	public static final int X86_XOP_CC_GT = 3;
+	public static final int X86_XOP_CC_GE = 4;
+	public static final int X86_XOP_CC_EQ = 5;
+	public static final int X86_XOP_CC_NEQ = 6;
+	public static final int X86_XOP_CC_FALSE = 7;
+	public static final int X86_XOP_CC_TRUE = 8;
+
+	public static final int X86_AVX_BCAST_INVALID = 0;
+	public static final int X86_AVX_BCAST_2 = 1;
+	public static final int X86_AVX_BCAST_4 = 2;
+	public static final int X86_AVX_BCAST_8 = 3;
+	public static final int X86_AVX_BCAST_16 = 4;
+
+	public static final int X86_SSE_CC_INVALID = 0;
+	public static final int X86_SSE_CC_EQ = 1;
+	public static final int X86_SSE_CC_LT = 2;
+	public static final int X86_SSE_CC_LE = 3;
+	public static final int X86_SSE_CC_UNORD = 4;
+	public static final int X86_SSE_CC_NEQ = 5;
+	public static final int X86_SSE_CC_NLT = 6;
+	public static final int X86_SSE_CC_NLE = 7;
+	public static final int X86_SSE_CC_ORD = 8;
+
+	public static final int X86_AVX_CC_INVALID = 0;
+	public static final int X86_AVX_CC_EQ = 1;
+	public static final int X86_AVX_CC_LT = 2;
+	public static final int X86_AVX_CC_LE = 3;
+	public static final int X86_AVX_CC_UNORD = 4;
+	public static final int X86_AVX_CC_NEQ = 5;
+	public static final int X86_AVX_CC_NLT = 6;
+	public static final int X86_AVX_CC_NLE = 7;
+	public static final int X86_AVX_CC_ORD = 8;
+	public static final int X86_AVX_CC_EQ_UQ = 9;
+	public static final int X86_AVX_CC_NGE = 10;
+	public static final int X86_AVX_CC_NGT = 11;
+	public static final int X86_AVX_CC_FALSE = 12;
+	public static final int X86_AVX_CC_NEQ_OQ = 13;
+	public static final int X86_AVX_CC_GE = 14;
+	public static final int X86_AVX_CC_GT = 15;
+	public static final int X86_AVX_CC_TRUE = 16;
+	public static final int X86_AVX_CC_EQ_OS = 17;
+	public static final int X86_AVX_CC_LT_OQ = 18;
+	public static final int X86_AVX_CC_LE_OQ = 19;
+	public static final int X86_AVX_CC_UNORD_S = 20;
+	public static final int X86_AVX_CC_NEQ_US = 21;
+	public static final int X86_AVX_CC_NLT_UQ = 22;
+	public static final int X86_AVX_CC_NLE_UQ = 23;
+	public static final int X86_AVX_CC_ORD_S = 24;
+	public static final int X86_AVX_CC_EQ_US = 25;
+	public static final int X86_AVX_CC_NGE_UQ = 26;
+	public static final int X86_AVX_CC_NGT_UQ = 27;
+	public static final int X86_AVX_CC_FALSE_OS = 28;
+	public static final int X86_AVX_CC_NEQ_OS = 29;
+	public static final int X86_AVX_CC_GE_OQ = 30;
+	public static final int X86_AVX_CC_GT_OQ = 31;
+	public static final int X86_AVX_CC_TRUE_US = 32;
+
+	public static final int X86_AVX_RM_INVALID = 0;
+	public static final int X86_AVX_RM_RN = 1;
+	public static final int X86_AVX_RM_RD = 2;
+	public static final int X86_AVX_RM_RU = 3;
+	public static final int X86_AVX_RM_RZ = 4;
+	public static final int X86_PREFIX_LOCK = 0xf0;
+	public static final int X86_PREFIX_REP = 0xf3;
+	public static final int X86_PREFIX_REPE = 0xf3;
+	public static final int X86_PREFIX_REPNE = 0xf2;
+	public static final int X86_PREFIX_CS = 0x2e;
+	public static final int X86_PREFIX_SS = 0x36;
+	public static final int X86_PREFIX_DS = 0x3e;
+	public static final int X86_PREFIX_ES = 0x26;
+	public static final int X86_PREFIX_FS = 0x64;
+	public static final int X86_PREFIX_GS = 0x65;
+	public static final int X86_PREFIX_OPSIZE = 0x66;
+	public static final int X86_PREFIX_ADDRSIZE = 0x67;
+
+	public static final int X86_INS_INVALID = 0;
+	public static final int X86_INS_AAA = 1;
+	public static final int X86_INS_AAD = 2;
+	public static final int X86_INS_AAM = 3;
+	public static final int X86_INS_AAS = 4;
+	public static final int X86_INS_FABS = 5;
+	public static final int X86_INS_ADC = 6;
+	public static final int X86_INS_ADCX = 7;
+	public static final int X86_INS_ADD = 8;
+	public static final int X86_INS_ADDPD = 9;
+	public static final int X86_INS_ADDPS = 10;
+	public static final int X86_INS_ADDSD = 11;
+	public static final int X86_INS_ADDSS = 12;
+	public static final int X86_INS_ADDSUBPD = 13;
+	public static final int X86_INS_ADDSUBPS = 14;
+	public static final int X86_INS_FADD = 15;
+	public static final int X86_INS_FIADD = 16;
+	public static final int X86_INS_ADOX = 17;
+	public static final int X86_INS_AESDECLAST = 18;
+	public static final int X86_INS_AESDEC = 19;
+	public static final int X86_INS_AESENCLAST = 20;
+	public static final int X86_INS_AESENC = 21;
+	public static final int X86_INS_AESIMC = 22;
+	public static final int X86_INS_AESKEYGENASSIST = 23;
+	public static final int X86_INS_AND = 24;
+	public static final int X86_INS_ANDN = 25;
+	public static final int X86_INS_ANDNPD = 26;
+	public static final int X86_INS_ANDNPS = 27;
+	public static final int X86_INS_ANDPD = 28;
+	public static final int X86_INS_ANDPS = 29;
+	public static final int X86_INS_ARPL = 30;
+	public static final int X86_INS_BEXTR = 31;
+	public static final int X86_INS_BLCFILL = 32;
+	public static final int X86_INS_BLCI = 33;
+	public static final int X86_INS_BLCIC = 34;
+	public static final int X86_INS_BLCMSK = 35;
+	public static final int X86_INS_BLCS = 36;
+	public static final int X86_INS_BLENDPD = 37;
+	public static final int X86_INS_BLENDPS = 38;
+	public static final int X86_INS_BLENDVPD = 39;
+	public static final int X86_INS_BLENDVPS = 40;
+	public static final int X86_INS_BLSFILL = 41;
+	public static final int X86_INS_BLSI = 42;
+	public static final int X86_INS_BLSIC = 43;
+	public static final int X86_INS_BLSMSK = 44;
+	public static final int X86_INS_BLSR = 45;
+	public static final int X86_INS_BNDCL = 46;
+	public static final int X86_INS_BNDCN = 47;
+	public static final int X86_INS_BNDCU = 48;
+	public static final int X86_INS_BNDLDX = 49;
+	public static final int X86_INS_BNDMK = 50;
+	public static final int X86_INS_BNDMOV = 51;
+	public static final int X86_INS_BNDSTX = 52;
+	public static final int X86_INS_BOUND = 53;
+	public static final int X86_INS_BSF = 54;
+	public static final int X86_INS_BSR = 55;
+	public static final int X86_INS_BSWAP = 56;
+	public static final int X86_INS_BT = 57;
+	public static final int X86_INS_BTC = 58;
+	public static final int X86_INS_BTR = 59;
+	public static final int X86_INS_BTS = 60;
+	public static final int X86_INS_BZHI = 61;
+	public static final int X86_INS_CALL = 62;
+	public static final int X86_INS_CBW = 63;
+	public static final int X86_INS_CDQ = 64;
+	public static final int X86_INS_CDQE = 65;
+	public static final int X86_INS_FCHS = 66;
+	public static final int X86_INS_CLAC = 67;
+	public static final int X86_INS_CLC = 68;
+	public static final int X86_INS_CLD = 69;
+	public static final int X86_INS_CLDEMOTE = 70;
+	public static final int X86_INS_CLFLUSH = 71;
+	public static final int X86_INS_CLFLUSHOPT = 72;
+	public static final int X86_INS_CLGI = 73;
+	public static final int X86_INS_CLI = 74;
+	public static final int X86_INS_CLRSSBSY = 75;
+	public static final int X86_INS_CLTS = 76;
+	public static final int X86_INS_CLWB = 77;
+	public static final int X86_INS_CLZERO = 78;
+	public static final int X86_INS_CMC = 79;
+	public static final int X86_INS_CMOVA = 80;
+	public static final int X86_INS_CMOVAE = 81;
+	public static final int X86_INS_CMOVB = 82;
+	public static final int X86_INS_CMOVBE = 83;
+	public static final int X86_INS_FCMOVBE = 84;
+	public static final int X86_INS_FCMOVB = 85;
+	public static final int X86_INS_CMOVE = 86;
+	public static final int X86_INS_FCMOVE = 87;
+	public static final int X86_INS_CMOVG = 88;
+	public static final int X86_INS_CMOVGE = 89;
+	public static final int X86_INS_CMOVL = 90;
+	public static final int X86_INS_CMOVLE = 91;
+	public static final int X86_INS_FCMOVNBE = 92;
+	public static final int X86_INS_FCMOVNB = 93;
+	public static final int X86_INS_CMOVNE = 94;
+	public static final int X86_INS_FCMOVNE = 95;
+	public static final int X86_INS_CMOVNO = 96;
+	public static final int X86_INS_CMOVNP = 97;
+	public static final int X86_INS_FCMOVNU = 98;
+	public static final int X86_INS_FCMOVNP = 99;
+	public static final int X86_INS_CMOVNS = 100;
+	public static final int X86_INS_CMOVO = 101;
+	public static final int X86_INS_CMOVP = 102;
+	public static final int X86_INS_FCMOVU = 103;
+	public static final int X86_INS_CMOVS = 104;
+	public static final int X86_INS_CMP = 105;
+	public static final int X86_INS_CMPPD = 106;
+	public static final int X86_INS_CMPPS = 107;
+	public static final int X86_INS_CMPSB = 108;
+	public static final int X86_INS_CMPSD = 109;
+	public static final int X86_INS_CMPSQ = 110;
+	public static final int X86_INS_CMPSS = 111;
+	public static final int X86_INS_CMPSW = 112;
+	public static final int X86_INS_CMPXCHG16B = 113;
+	public static final int X86_INS_CMPXCHG = 114;
+	public static final int X86_INS_CMPXCHG8B = 115;
+	public static final int X86_INS_COMISD = 116;
+	public static final int X86_INS_COMISS = 117;
+	public static final int X86_INS_FCOMP = 118;
+	public static final int X86_INS_FCOMPI = 119;
+	public static final int X86_INS_FCOMI = 120;
+	public static final int X86_INS_FCOM = 121;
+	public static final int X86_INS_FCOS = 122;
+	public static final int X86_INS_CPUID = 123;
+	public static final int X86_INS_CQO = 124;
+	public static final int X86_INS_CRC32 = 125;
+	public static final int X86_INS_CVTDQ2PD = 126;
+	public static final int X86_INS_CVTDQ2PS = 127;
+	public static final int X86_INS_CVTPD2DQ = 128;
+	public static final int X86_INS_CVTPD2PS = 129;
+	public static final int X86_INS_CVTPS2DQ = 130;
+	public static final int X86_INS_CVTPS2PD = 131;
+	public static final int X86_INS_CVTSD2SI = 132;
+	public static final int X86_INS_CVTSD2SS = 133;
+	public static final int X86_INS_CVTSI2SD = 134;
+	public static final int X86_INS_CVTSI2SS = 135;
+	public static final int X86_INS_CVTSS2SD = 136;
+	public static final int X86_INS_CVTSS2SI = 137;
+	public static final int X86_INS_CVTTPD2DQ = 138;
+	public static final int X86_INS_CVTTPS2DQ = 139;
+	public static final int X86_INS_CVTTSD2SI = 140;
+	public static final int X86_INS_CVTTSS2SI = 141;
+	public static final int X86_INS_CWD = 142;
+	public static final int X86_INS_CWDE = 143;
+	public static final int X86_INS_DAA = 144;
+	public static final int X86_INS_DAS = 145;
+	public static final int X86_INS_DATA16 = 146;
+	public static final int X86_INS_DEC = 147;
+	public static final int X86_INS_DIV = 148;
+	public static final int X86_INS_DIVPD = 149;
+	public static final int X86_INS_DIVPS = 150;
+	public static final int X86_INS_FDIVR = 151;
+	public static final int X86_INS_FIDIVR = 152;
+	public static final int X86_INS_FDIVRP = 153;
+	public static final int X86_INS_DIVSD = 154;
+	public static final int X86_INS_DIVSS = 155;
+	public static final int X86_INS_FDIV = 156;
+	public static final int X86_INS_FIDIV = 157;
+	public static final int X86_INS_FDIVP = 158;
+	public static final int X86_INS_DPPD = 159;
+	public static final int X86_INS_DPPS = 160;
+	public static final int X86_INS_ENCLS = 161;
+	public static final int X86_INS_ENCLU = 162;
+	public static final int X86_INS_ENCLV = 163;
+	public static final int X86_INS_ENDBR32 = 164;
+	public static final int X86_INS_ENDBR64 = 165;
+	public static final int X86_INS_ENTER = 166;
+	public static final int X86_INS_EXTRACTPS = 167;
+	public static final int X86_INS_EXTRQ = 168;
+	public static final int X86_INS_F2XM1 = 169;
+	public static final int X86_INS_LCALL = 170;
+	public static final int X86_INS_LJMP = 171;
+	public static final int X86_INS_JMP = 172;
+	public static final int X86_INS_FBLD = 173;
+	public static final int X86_INS_FBSTP = 174;
+	public static final int X86_INS_FCOMPP = 175;
+	public static final int X86_INS_FDECSTP = 176;
+	public static final int X86_INS_FDISI8087_NOP = 177;
+	public static final int X86_INS_FEMMS = 178;
+	public static final int X86_INS_FENI8087_NOP = 179;
+	public static final int X86_INS_FFREE = 180;
+	public static final int X86_INS_FFREEP = 181;
+	public static final int X86_INS_FICOM = 182;
+	public static final int X86_INS_FICOMP = 183;
+	public static final int X86_INS_FINCSTP = 184;
+	public static final int X86_INS_FLDCW = 185;
+	public static final int X86_INS_FLDENV = 186;
+	public static final int X86_INS_FLDL2E = 187;
+	public static final int X86_INS_FLDL2T = 188;
+	public static final int X86_INS_FLDLG2 = 189;
+	public static final int X86_INS_FLDLN2 = 190;
+	public static final int X86_INS_FLDPI = 191;
+	public static final int X86_INS_FNCLEX = 192;
+	public static final int X86_INS_FNINIT = 193;
+	public static final int X86_INS_FNOP = 194;
+	public static final int X86_INS_FNSTCW = 195;
+	public static final int X86_INS_FNSTSW = 196;
+	public static final int X86_INS_FPATAN = 197;
+	public static final int X86_INS_FSTPNCE = 198;
+	public static final int X86_INS_FPREM = 199;
+	public static final int X86_INS_FPREM1 = 200;
+	public static final int X86_INS_FPTAN = 201;
+	public static final int X86_INS_FRNDINT = 202;
+	public static final int X86_INS_FRSTOR = 203;
+	public static final int X86_INS_FNSAVE = 204;
+	public static final int X86_INS_FSCALE = 205;
+	public static final int X86_INS_FSETPM = 206;
+	public static final int X86_INS_FSINCOS = 207;
+	public static final int X86_INS_FNSTENV = 208;
+	public static final int X86_INS_FXAM = 209;
+	public static final int X86_INS_FXRSTOR = 210;
+	public static final int X86_INS_FXRSTOR64 = 211;
+	public static final int X86_INS_FXSAVE = 212;
+	public static final int X86_INS_FXSAVE64 = 213;
+	public static final int X86_INS_FXTRACT = 214;
+	public static final int X86_INS_FYL2X = 215;
+	public static final int X86_INS_FYL2XP1 = 216;
+	public static final int X86_INS_GETSEC = 217;
+	public static final int X86_INS_GF2P8AFFINEINVQB = 218;
+	public static final int X86_INS_GF2P8AFFINEQB = 219;
+	public static final int X86_INS_GF2P8MULB = 220;
+	public static final int X86_INS_HADDPD = 221;
+	public static final int X86_INS_HADDPS = 222;
+	public static final int X86_INS_HLT = 223;
+	public static final int X86_INS_HSUBPD = 224;
+	public static final int X86_INS_HSUBPS = 225;
+	public static final int X86_INS_IDIV = 226;
+	public static final int X86_INS_FILD = 227;
+	public static final int X86_INS_IMUL = 228;
+	public static final int X86_INS_IN = 229;
+	public static final int X86_INS_INC = 230;
+	public static final int X86_INS_INCSSPD = 231;
+	public static final int X86_INS_INCSSPQ = 232;
+	public static final int X86_INS_INSB = 233;
+	public static final int X86_INS_INSERTPS = 234;
+	public static final int X86_INS_INSERTQ = 235;
+	public static final int X86_INS_INSD = 236;
+	public static final int X86_INS_INSW = 237;
+	public static final int X86_INS_INT = 238;
+	public static final int X86_INS_INT1 = 239;
+	public static final int X86_INS_INT3 = 240;
+	public static final int X86_INS_INTO = 241;
+	public static final int X86_INS_INVD = 242;
+	public static final int X86_INS_INVEPT = 243;
+	public static final int X86_INS_INVLPG = 244;
+	public static final int X86_INS_INVLPGA = 245;
+	public static final int X86_INS_INVPCID = 246;
+	public static final int X86_INS_INVVPID = 247;
+	public static final int X86_INS_IRET = 248;
+	public static final int X86_INS_IRETD = 249;
+	public static final int X86_INS_IRETQ = 250;
+	public static final int X86_INS_FISTTP = 251;
+	public static final int X86_INS_FIST = 252;
+	public static final int X86_INS_FISTP = 253;
+	public static final int X86_INS_JAE = 254;
+	public static final int X86_INS_JA = 255;
+	public static final int X86_INS_JBE = 256;
+	public static final int X86_INS_JB = 257;
+	public static final int X86_INS_JCXZ = 258;
+	public static final int X86_INS_JECXZ = 259;
+	public static final int X86_INS_JE = 260;
+	public static final int X86_INS_JGE = 261;
+	public static final int X86_INS_JG = 262;
+	public static final int X86_INS_JLE = 263;
+	public static final int X86_INS_JL = 264;
+	public static final int X86_INS_JNE = 265;
+	public static final int X86_INS_JNO = 266;
+	public static final int X86_INS_JNP = 267;
+	public static final int X86_INS_JNS = 268;
+	public static final int X86_INS_JO = 269;
+	public static final int X86_INS_JP = 270;
+	public static final int X86_INS_JRCXZ = 271;
+	public static final int X86_INS_JS = 272;
+	public static final int X86_INS_KADDB = 273;
+	public static final int X86_INS_KADDD = 274;
+	public static final int X86_INS_KADDQ = 275;
+	public static final int X86_INS_KADDW = 276;
+	public static final int X86_INS_KANDB = 277;
+	public static final int X86_INS_KANDD = 278;
+	public static final int X86_INS_KANDNB = 279;
+	public static final int X86_INS_KANDND = 280;
+	public static final int X86_INS_KANDNQ = 281;
+	public static final int X86_INS_KANDNW = 282;
+	public static final int X86_INS_KANDQ = 283;
+	public static final int X86_INS_KANDW = 284;
+	public static final int X86_INS_KMOVB = 285;
+	public static final int X86_INS_KMOVD = 286;
+	public static final int X86_INS_KMOVQ = 287;
+	public static final int X86_INS_KMOVW = 288;
+	public static final int X86_INS_KNOTB = 289;
+	public static final int X86_INS_KNOTD = 290;
+	public static final int X86_INS_KNOTQ = 291;
+	public static final int X86_INS_KNOTW = 292;
+	public static final int X86_INS_KORB = 293;
+	public static final int X86_INS_KORD = 294;
+	public static final int X86_INS_KORQ = 295;
+	public static final int X86_INS_KORTESTB = 296;
+	public static final int X86_INS_KORTESTD = 297;
+	public static final int X86_INS_KORTESTQ = 298;
+	public static final int X86_INS_KORTESTW = 299;
+	public static final int X86_INS_KORW = 300;
+	public static final int X86_INS_KSHIFTLB = 301;
+	public static final int X86_INS_KSHIFTLD = 302;
+	public static final int X86_INS_KSHIFTLQ = 303;
+	public static final int X86_INS_KSHIFTLW = 304;
+	public static final int X86_INS_KSHIFTRB = 305;
+	public static final int X86_INS_KSHIFTRD = 306;
+	public static final int X86_INS_KSHIFTRQ = 307;
+	public static final int X86_INS_KSHIFTRW = 308;
+	public static final int X86_INS_KTESTB = 309;
+	public static final int X86_INS_KTESTD = 310;
+	public static final int X86_INS_KTESTQ = 311;
+	public static final int X86_INS_KTESTW = 312;
+	public static final int X86_INS_KUNPCKBW = 313;
+	public static final int X86_INS_KUNPCKDQ = 314;
+	public static final int X86_INS_KUNPCKWD = 315;
+	public static final int X86_INS_KXNORB = 316;
+	public static final int X86_INS_KXNORD = 317;
+	public static final int X86_INS_KXNORQ = 318;
+	public static final int X86_INS_KXNORW = 319;
+	public static final int X86_INS_KXORB = 320;
+	public static final int X86_INS_KXORD = 321;
+	public static final int X86_INS_KXORQ = 322;
+	public static final int X86_INS_KXORW = 323;
+	public static final int X86_INS_LAHF = 324;
+	public static final int X86_INS_LAR = 325;
+	public static final int X86_INS_LDDQU = 326;
+	public static final int X86_INS_LDMXCSR = 327;
+	public static final int X86_INS_LDS = 328;
+	public static final int X86_INS_FLDZ = 329;
+	public static final int X86_INS_FLD1 = 330;
+	public static final int X86_INS_FLD = 331;
+	public static final int X86_INS_LEA = 332;
+	public static final int X86_INS_LEAVE = 333;
+	public static final int X86_INS_LES = 334;
+	public static final int X86_INS_LFENCE = 335;
+	public static final int X86_INS_LFS = 336;
+	public static final int X86_INS_LGDT = 337;
+	public static final int X86_INS_LGS = 338;
+	public static final int X86_INS_LIDT = 339;
+	public static final int X86_INS_LLDT = 340;
+	public static final int X86_INS_LLWPCB = 341;
+	public static final int X86_INS_LMSW = 342;
+	public static final int X86_INS_LOCK = 343;
+	public static final int X86_INS_LODSB = 344;
+	public static final int X86_INS_LODSD = 345;
+	public static final int X86_INS_LODSQ = 346;
+	public static final int X86_INS_LODSW = 347;
+	public static final int X86_INS_LOOP = 348;
+	public static final int X86_INS_LOOPE = 349;
+	public static final int X86_INS_LOOPNE = 350;
+	public static final int X86_INS_RETF = 351;
+	public static final int X86_INS_RETFQ = 352;
+	public static final int X86_INS_LSL = 353;
+	public static final int X86_INS_LSS = 354;
+	public static final int X86_INS_LTR = 355;
+	public static final int X86_INS_LWPINS = 356;
+	public static final int X86_INS_LWPVAL = 357;
+	public static final int X86_INS_LZCNT = 358;
+	public static final int X86_INS_MASKMOVDQU = 359;
+	public static final int X86_INS_MAXPD = 360;
+	public static final int X86_INS_MAXPS = 361;
+	public static final int X86_INS_MAXSD = 362;
+	public static final int X86_INS_MAXSS = 363;
+	public static final int X86_INS_MFENCE = 364;
+	public static final int X86_INS_MINPD = 365;
+	public static final int X86_INS_MINPS = 366;
+	public static final int X86_INS_MINSD = 367;
+	public static final int X86_INS_MINSS = 368;
+	public static final int X86_INS_CVTPD2PI = 369;
+	public static final int X86_INS_CVTPI2PD = 370;
+	public static final int X86_INS_CVTPI2PS = 371;
+	public static final int X86_INS_CVTPS2PI = 372;
+	public static final int X86_INS_CVTTPD2PI = 373;
+	public static final int X86_INS_CVTTPS2PI = 374;
+	public static final int X86_INS_EMMS = 375;
+	public static final int X86_INS_MASKMOVQ = 376;
+	public static final int X86_INS_MOVD = 377;
+	public static final int X86_INS_MOVQ = 378;
+	public static final int X86_INS_MOVDQ2Q = 379;
+	public static final int X86_INS_MOVNTQ = 380;
+	public static final int X86_INS_MOVQ2DQ = 381;
+	public static final int X86_INS_PABSB = 382;
+	public static final int X86_INS_PABSD = 383;
+	public static final int X86_INS_PABSW = 384;
+	public static final int X86_INS_PACKSSDW = 385;
+	public static final int X86_INS_PACKSSWB = 386;
+	public static final int X86_INS_PACKUSWB = 387;
+	public static final int X86_INS_PADDB = 388;
+	public static final int X86_INS_PADDD = 389;
+	public static final int X86_INS_PADDQ = 390;
+	public static final int X86_INS_PADDSB = 391;
+	public static final int X86_INS_PADDSW = 392;
+	public static final int X86_INS_PADDUSB = 393;
+	public static final int X86_INS_PADDUSW = 394;
+	public static final int X86_INS_PADDW = 395;
+	public static final int X86_INS_PALIGNR = 396;
+	public static final int X86_INS_PANDN = 397;
+	public static final int X86_INS_PAND = 398;
+	public static final int X86_INS_PAVGB = 399;
+	public static final int X86_INS_PAVGW = 400;
+	public static final int X86_INS_PCMPEQB = 401;
+	public static final int X86_INS_PCMPEQD = 402;
+	public static final int X86_INS_PCMPEQW = 403;
+	public static final int X86_INS_PCMPGTB = 404;
+	public static final int X86_INS_PCMPGTD = 405;
+	public static final int X86_INS_PCMPGTW = 406;
+	public static final int X86_INS_PEXTRW = 407;
+	public static final int X86_INS_PHADDD = 408;
+	public static final int X86_INS_PHADDSW = 409;
+	public static final int X86_INS_PHADDW = 410;
+	public static final int X86_INS_PHSUBD = 411;
+	public static final int X86_INS_PHSUBSW = 412;
+	public static final int X86_INS_PHSUBW = 413;
+	public static final int X86_INS_PINSRW = 414;
+	public static final int X86_INS_PMADDUBSW = 415;
+	public static final int X86_INS_PMADDWD = 416;
+	public static final int X86_INS_PMAXSW = 417;
+	public static final int X86_INS_PMAXUB = 418;
+	public static final int X86_INS_PMINSW = 419;
+	public static final int X86_INS_PMINUB = 420;
+	public static final int X86_INS_PMOVMSKB = 421;
+	public static final int X86_INS_PMULHRSW = 422;
+	public static final int X86_INS_PMULHUW = 423;
+	public static final int X86_INS_PMULHW = 424;
+	public static final int X86_INS_PMULLW = 425;
+	public static final int X86_INS_PMULUDQ = 426;
+	public static final int X86_INS_POR = 427;
+	public static final int X86_INS_PSADBW = 428;
+	public static final int X86_INS_PSHUFB = 429;
+	public static final int X86_INS_PSHUFW = 430;
+	public static final int X86_INS_PSIGNB = 431;
+	public static final int X86_INS_PSIGND = 432;
+	public static final int X86_INS_PSIGNW = 433;
+	public static final int X86_INS_PSLLD = 434;
+	public static final int X86_INS_PSLLQ = 435;
+	public static final int X86_INS_PSLLW = 436;
+	public static final int X86_INS_PSRAD = 437;
+	public static final int X86_INS_PSRAW = 438;
+	public static final int X86_INS_PSRLD = 439;
+	public static final int X86_INS_PSRLQ = 440;
+	public static final int X86_INS_PSRLW = 441;
+	public static final int X86_INS_PSUBB = 442;
+	public static final int X86_INS_PSUBD = 443;
+	public static final int X86_INS_PSUBQ = 444;
+	public static final int X86_INS_PSUBSB = 445;
+	public static final int X86_INS_PSUBSW = 446;
+	public static final int X86_INS_PSUBUSB = 447;
+	public static final int X86_INS_PSUBUSW = 448;
+	public static final int X86_INS_PSUBW = 449;
+	public static final int X86_INS_PUNPCKHBW = 450;
+	public static final int X86_INS_PUNPCKHDQ = 451;
+	public static final int X86_INS_PUNPCKHWD = 452;
+	public static final int X86_INS_PUNPCKLBW = 453;
+	public static final int X86_INS_PUNPCKLDQ = 454;
+	public static final int X86_INS_PUNPCKLWD = 455;
+	public static final int X86_INS_PXOR = 456;
+	public static final int X86_INS_MONITORX = 457;
+	public static final int X86_INS_MONITOR = 458;
+	public static final int X86_INS_MONTMUL = 459;
+	public static final int X86_INS_MOV = 460;
+	public static final int X86_INS_MOVABS = 461;
+	public static final int X86_INS_MOVAPD = 462;
+	public static final int X86_INS_MOVAPS = 463;
+	public static final int X86_INS_MOVBE = 464;
+	public static final int X86_INS_MOVDDUP = 465;
+	public static final int X86_INS_MOVDIR64B = 466;
+	public static final int X86_INS_MOVDIRI = 467;
+	public static final int X86_INS_MOVDQA = 468;
+	public static final int X86_INS_MOVDQU = 469;
+	public static final int X86_INS_MOVHLPS = 470;
+	public static final int X86_INS_MOVHPD = 471;
+	public static final int X86_INS_MOVHPS = 472;
+	public static final int X86_INS_MOVLHPS = 473;
+	public static final int X86_INS_MOVLPD = 474;
+	public static final int X86_INS_MOVLPS = 475;
+	public static final int X86_INS_MOVMSKPD = 476;
+	public static final int X86_INS_MOVMSKPS = 477;
+	public static final int X86_INS_MOVNTDQA = 478;
+	public static final int X86_INS_MOVNTDQ = 479;
+	public static final int X86_INS_MOVNTI = 480;
+	public static final int X86_INS_MOVNTPD = 481;
+	public static final int X86_INS_MOVNTPS = 482;
+	public static final int X86_INS_MOVNTSD = 483;
+	public static final int X86_INS_MOVNTSS = 484;
+	public static final int X86_INS_MOVSB = 485;
+	public static final int X86_INS_MOVSD = 486;
+	public static final int X86_INS_MOVSHDUP = 487;
+	public static final int X86_INS_MOVSLDUP = 488;
+	public static final int X86_INS_MOVSQ = 489;
+	public static final int X86_INS_MOVSS = 490;
+	public static final int X86_INS_MOVSW = 491;
+	public static final int X86_INS_MOVSX = 492;
+	public static final int X86_INS_MOVSXD = 493;
+	public static final int X86_INS_MOVUPD = 494;
+	public static final int X86_INS_MOVUPS = 495;
+	public static final int X86_INS_MOVZX = 496;
+	public static final int X86_INS_MPSADBW = 497;
+	public static final int X86_INS_MUL = 498;
+	public static final int X86_INS_MULPD = 499;
+	public static final int X86_INS_MULPS = 500;
+	public static final int X86_INS_MULSD = 501;
+	public static final int X86_INS_MULSS = 502;
+	public static final int X86_INS_MULX = 503;
+	public static final int X86_INS_FMUL = 504;
+	public static final int X86_INS_FIMUL = 505;
+	public static final int X86_INS_FMULP = 506;
+	public static final int X86_INS_MWAITX = 507;
+	public static final int X86_INS_MWAIT = 508;
+	public static final int X86_INS_NEG = 509;
+	public static final int X86_INS_NOP = 510;
+	public static final int X86_INS_NOT = 511;
+	public static final int X86_INS_OR = 512;
+	public static final int X86_INS_ORPD = 513;
+	public static final int X86_INS_ORPS = 514;
+	public static final int X86_INS_OUT = 515;
+	public static final int X86_INS_OUTSB = 516;
+	public static final int X86_INS_OUTSD = 517;
+	public static final int X86_INS_OUTSW = 518;
+	public static final int X86_INS_PACKUSDW = 519;
+	public static final int X86_INS_PAUSE = 520;
+	public static final int X86_INS_PAVGUSB = 521;
+	public static final int X86_INS_PBLENDVB = 522;
+	public static final int X86_INS_PBLENDW = 523;
+	public static final int X86_INS_PCLMULQDQ = 524;
+	public static final int X86_INS_PCMPEQQ = 525;
+	public static final int X86_INS_PCMPESTRI = 526;
+	public static final int X86_INS_PCMPESTRM = 527;
+	public static final int X86_INS_PCMPGTQ = 528;
+	public static final int X86_INS_PCMPISTRI = 529;
+	public static final int X86_INS_PCMPISTRM = 530;
+	public static final int X86_INS_PCONFIG = 531;
+	public static final int X86_INS_PDEP = 532;
+	public static final int X86_INS_PEXT = 533;
+	public static final int X86_INS_PEXTRB = 534;
+	public static final int X86_INS_PEXTRD = 535;
+	public static final int X86_INS_PEXTRQ = 536;
+	public static final int X86_INS_PF2ID = 537;
+	public static final int X86_INS_PF2IW = 538;
+	public static final int X86_INS_PFACC = 539;
+	public static final int X86_INS_PFADD = 540;
+	public static final int X86_INS_PFCMPEQ = 541;
+	public static final int X86_INS_PFCMPGE = 542;
+	public static final int X86_INS_PFCMPGT = 543;
+	public static final int X86_INS_PFMAX = 544;
+	public static final int X86_INS_PFMIN = 545;
+	public static final int X86_INS_PFMUL = 546;
+	public static final int X86_INS_PFNACC = 547;
+	public static final int X86_INS_PFPNACC = 548;
+	public static final int X86_INS_PFRCPIT1 = 549;
+	public static final int X86_INS_PFRCPIT2 = 550;
+	public static final int X86_INS_PFRCP = 551;
+	public static final int X86_INS_PFRSQIT1 = 552;
+	public static final int X86_INS_PFRSQRT = 553;
+	public static final int X86_INS_PFSUBR = 554;
+	public static final int X86_INS_PFSUB = 555;
+	public static final int X86_INS_PHMINPOSUW = 556;
+	public static final int X86_INS_PI2FD = 557;
+	public static final int X86_INS_PI2FW = 558;
+	public static final int X86_INS_PINSRB = 559;
+	public static final int X86_INS_PINSRD = 560;
+	public static final int X86_INS_PINSRQ = 561;
+	public static final int X86_INS_PMAXSB = 562;
+	public static final int X86_INS_PMAXSD = 563;
+	public static final int X86_INS_PMAXUD = 564;
+	public static final int X86_INS_PMAXUW = 565;
+	public static final int X86_INS_PMINSB = 566;
+	public static final int X86_INS_PMINSD = 567;
+	public static final int X86_INS_PMINUD = 568;
+	public static final int X86_INS_PMINUW = 569;
+	public static final int X86_INS_PMOVSXBD = 570;
+	public static final int X86_INS_PMOVSXBQ = 571;
+	public static final int X86_INS_PMOVSXBW = 572;
+	public static final int X86_INS_PMOVSXDQ = 573;
+	public static final int X86_INS_PMOVSXWD = 574;
+	public static final int X86_INS_PMOVSXWQ = 575;
+	public static final int X86_INS_PMOVZXBD = 576;
+	public static final int X86_INS_PMOVZXBQ = 577;
+	public static final int X86_INS_PMOVZXBW = 578;
+	public static final int X86_INS_PMOVZXDQ = 579;
+	public static final int X86_INS_PMOVZXWD = 580;
+	public static final int X86_INS_PMOVZXWQ = 581;
+	public static final int X86_INS_PMULDQ = 582;
+	public static final int X86_INS_PMULHRW = 583;
+	public static final int X86_INS_PMULLD = 584;
+	public static final int X86_INS_POP = 585;
+	public static final int X86_INS_POPAW = 586;
+	public static final int X86_INS_POPAL = 587;
+	public static final int X86_INS_POPCNT = 588;
+	public static final int X86_INS_POPF = 589;
+	public static final int X86_INS_POPFD = 590;
+	public static final int X86_INS_POPFQ = 591;
+	public static final int X86_INS_PREFETCH = 592;
+	public static final int X86_INS_PREFETCHNTA = 593;
+	public static final int X86_INS_PREFETCHT0 = 594;
+	public static final int X86_INS_PREFETCHT1 = 595;
+	public static final int X86_INS_PREFETCHT2 = 596;
+	public static final int X86_INS_PREFETCHW = 597;
+	public static final int X86_INS_PREFETCHWT1 = 598;
+	public static final int X86_INS_PSHUFD = 599;
+	public static final int X86_INS_PSHUFHW = 600;
+	public static final int X86_INS_PSHUFLW = 601;
+	public static final int X86_INS_PSLLDQ = 602;
+	public static final int X86_INS_PSRLDQ = 603;
+	public static final int X86_INS_PSWAPD = 604;
+	public static final int X86_INS_PTEST = 605;
+	public static final int X86_INS_PTWRITE = 606;
+	public static final int X86_INS_PUNPCKHQDQ = 607;
+	public static final int X86_INS_PUNPCKLQDQ = 608;
+	public static final int X86_INS_PUSH = 609;
+	public static final int X86_INS_PUSHAW = 610;
+	public static final int X86_INS_PUSHAL = 611;
+	public static final int X86_INS_PUSHF = 612;
+	public static final int X86_INS_PUSHFD = 613;
+	public static final int X86_INS_PUSHFQ = 614;
+	public static final int X86_INS_RCL = 615;
+	public static final int X86_INS_RCPPS = 616;
+	public static final int X86_INS_RCPSS = 617;
+	public static final int X86_INS_RCR = 618;
+	public static final int X86_INS_RDFSBASE = 619;
+	public static final int X86_INS_RDGSBASE = 620;
+	public static final int X86_INS_RDMSR = 621;
+	public static final int X86_INS_RDPID = 622;
+	public static final int X86_INS_RDPKRU = 623;
+	public static final int X86_INS_RDPMC = 624;
+	public static final int X86_INS_RDRAND = 625;
+	public static final int X86_INS_RDSEED = 626;
+	public static final int X86_INS_RDSSPD = 627;
+	public static final int X86_INS_RDSSPQ = 628;
+	public static final int X86_INS_RDTSC = 629;
+	public static final int X86_INS_RDTSCP = 630;
+	public static final int X86_INS_REPNE = 631;
+	public static final int X86_INS_REP = 632;
+	public static final int X86_INS_RET = 633;
+	public static final int X86_INS_REX64 = 634;
+	public static final int X86_INS_ROL = 635;
+	public static final int X86_INS_ROR = 636;
+	public static final int X86_INS_RORX = 637;
+	public static final int X86_INS_ROUNDPD = 638;
+	public static final int X86_INS_ROUNDPS = 639;
+	public static final int X86_INS_ROUNDSD = 640;
+	public static final int X86_INS_ROUNDSS = 641;
+	public static final int X86_INS_RSM = 642;
+	public static final int X86_INS_RSQRTPS = 643;
+	public static final int X86_INS_RSQRTSS = 644;
+	public static final int X86_INS_RSTORSSP = 645;
+	public static final int X86_INS_SAHF = 646;
+	public static final int X86_INS_SAL = 647;
+	public static final int X86_INS_SALC = 648;
+	public static final int X86_INS_SAR = 649;
+	public static final int X86_INS_SARX = 650;
+	public static final int X86_INS_SAVEPREVSSP = 651;
+	public static final int X86_INS_SBB = 652;
+	public static final int X86_INS_SCASB = 653;
+	public static final int X86_INS_SCASD = 654;
+	public static final int X86_INS_SCASQ = 655;
+	public static final int X86_INS_SCASW = 656;
+	public static final int X86_INS_SETAE = 657;
+	public static final int X86_INS_SETA = 658;
+	public static final int X86_INS_SETBE = 659;
+	public static final int X86_INS_SETB = 660;
+	public static final int X86_INS_SETE = 661;
+	public static final int X86_INS_SETGE = 662;
+	public static final int X86_INS_SETG = 663;
+	public static final int X86_INS_SETLE = 664;
+	public static final int X86_INS_SETL = 665;
+	public static final int X86_INS_SETNE = 666;
+	public static final int X86_INS_SETNO = 667;
+	public static final int X86_INS_SETNP = 668;
+	public static final int X86_INS_SETNS = 669;
+	public static final int X86_INS_SETO = 670;
+	public static final int X86_INS_SETP = 671;
+	public static final int X86_INS_SETSSBSY = 672;
+	public static final int X86_INS_SETS = 673;
+	public static final int X86_INS_SFENCE = 674;
+	public static final int X86_INS_SGDT = 675;
+	public static final int X86_INS_SHA1MSG1 = 676;
+	public static final int X86_INS_SHA1MSG2 = 677;
+	public static final int X86_INS_SHA1NEXTE = 678;
+	public static final int X86_INS_SHA1RNDS4 = 679;
+	public static final int X86_INS_SHA256MSG1 = 680;
+	public static final int X86_INS_SHA256MSG2 = 681;
+	public static final int X86_INS_SHA256RNDS2 = 682;
+	public static final int X86_INS_SHL = 683;
+	public static final int X86_INS_SHLD = 684;
+	public static final int X86_INS_SHLX = 685;
+	public static final int X86_INS_SHR = 686;
+	public static final int X86_INS_SHRD = 687;
+	public static final int X86_INS_SHRX = 688;
+	public static final int X86_INS_SHUFPD = 689;
+	public static final int X86_INS_SHUFPS = 690;
+	public static final int X86_INS_SIDT = 691;
+	public static final int X86_INS_FSIN = 692;
+	public static final int X86_INS_SKINIT = 693;
+	public static final int X86_INS_SLDT = 694;
+	public static final int X86_INS_SLWPCB = 695;
+	public static final int X86_INS_SMSW = 696;
+	public static final int X86_INS_SQRTPD = 697;
+	public static final int X86_INS_SQRTPS = 698;
+	public static final int X86_INS_SQRTSD = 699;
+	public static final int X86_INS_SQRTSS = 700;
+	public static final int X86_INS_FSQRT = 701;
+	public static final int X86_INS_STAC = 702;
+	public static final int X86_INS_STC = 703;
+	public static final int X86_INS_STD = 704;
+	public static final int X86_INS_STGI = 705;
+	public static final int X86_INS_STI = 706;
+	public static final int X86_INS_STMXCSR = 707;
+	public static final int X86_INS_STOSB = 708;
+	public static final int X86_INS_STOSD = 709;
+	public static final int X86_INS_STOSQ = 710;
+	public static final int X86_INS_STOSW = 711;
+	public static final int X86_INS_STR = 712;
+	public static final int X86_INS_FST = 713;
+	public static final int X86_INS_FSTP = 714;
+	public static final int X86_INS_SUB = 715;
+	public static final int X86_INS_SUBPD = 716;
+	public static final int X86_INS_SUBPS = 717;
+	public static final int X86_INS_FSUBR = 718;
+	public static final int X86_INS_FISUBR = 719;
+	public static final int X86_INS_FSUBRP = 720;
+	public static final int X86_INS_SUBSD = 721;
+	public static final int X86_INS_SUBSS = 722;
+	public static final int X86_INS_FSUB = 723;
+	public static final int X86_INS_FISUB = 724;
+	public static final int X86_INS_FSUBP = 725;
+	public static final int X86_INS_SWAPGS = 726;
+	public static final int X86_INS_SYSCALL = 727;
+	public static final int X86_INS_SYSENTER = 728;
+	public static final int X86_INS_SYSEXIT = 729;
+	public static final int X86_INS_SYSEXITQ = 730;
+	public static final int X86_INS_SYSRET = 731;
+	public static final int X86_INS_SYSRETQ = 732;
+	public static final int X86_INS_T1MSKC = 733;
+	public static final int X86_INS_TEST = 734;
+	public static final int X86_INS_TPAUSE = 735;
+	public static final int X86_INS_FTST = 736;
+	public static final int X86_INS_TZCNT = 737;
+	public static final int X86_INS_TZMSK = 738;
+	public static final int X86_INS_UCOMISD = 739;
+	public static final int X86_INS_UCOMISS = 740;
+	public static final int X86_INS_FUCOMPI = 741;
+	public static final int X86_INS_FUCOMI = 742;
+	public static final int X86_INS_FUCOMPP = 743;
+	public static final int X86_INS_FUCOMP = 744;
+	public static final int X86_INS_FUCOM = 745;
+	public static final int X86_INS_UD0 = 746;
+	public static final int X86_INS_UD1 = 747;
+	public static final int X86_INS_UD2 = 748;
+	public static final int X86_INS_UMONITOR = 749;
+	public static final int X86_INS_UMWAIT = 750;
+	public static final int X86_INS_UNPCKHPD = 751;
+	public static final int X86_INS_UNPCKHPS = 752;
+	public static final int X86_INS_UNPCKLPD = 753;
+	public static final int X86_INS_UNPCKLPS = 754;
+	public static final int X86_INS_V4FMADDPS = 755;
+	public static final int X86_INS_V4FMADDSS = 756;
+	public static final int X86_INS_V4FNMADDPS = 757;
+	public static final int X86_INS_V4FNMADDSS = 758;
+	public static final int X86_INS_VADDPD = 759;
+	public static final int X86_INS_VADDPS = 760;
+	public static final int X86_INS_VADDSD = 761;
+	public static final int X86_INS_VADDSS = 762;
+	public static final int X86_INS_VADDSUBPD = 763;
+	public static final int X86_INS_VADDSUBPS = 764;
+	public static final int X86_INS_VAESDECLAST = 765;
+	public static final int X86_INS_VAESDEC = 766;
+	public static final int X86_INS_VAESENCLAST = 767;
+	public static final int X86_INS_VAESENC = 768;
+	public static final int X86_INS_VAESIMC = 769;
+	public static final int X86_INS_VAESKEYGENASSIST = 770;
+	public static final int X86_INS_VALIGND = 771;
+	public static final int X86_INS_VALIGNQ = 772;
+	public static final int X86_INS_VANDNPD = 773;
+	public static final int X86_INS_VANDNPS = 774;
+	public static final int X86_INS_VANDPD = 775;
+	public static final int X86_INS_VANDPS = 776;
+	public static final int X86_INS_VBLENDMPD = 777;
+	public static final int X86_INS_VBLENDMPS = 778;
+	public static final int X86_INS_VBLENDPD = 779;
+	public static final int X86_INS_VBLENDPS = 780;
+	public static final int X86_INS_VBLENDVPD = 781;
+	public static final int X86_INS_VBLENDVPS = 782;
+	public static final int X86_INS_VBROADCASTF128 = 783;
+	public static final int X86_INS_VBROADCASTF32X2 = 784;
+	public static final int X86_INS_VBROADCASTF32X4 = 785;
+	public static final int X86_INS_VBROADCASTF32X8 = 786;
+	public static final int X86_INS_VBROADCASTF64X2 = 787;
+	public static final int X86_INS_VBROADCASTF64X4 = 788;
+	public static final int X86_INS_VBROADCASTI128 = 789;
+	public static final int X86_INS_VBROADCASTI32X2 = 790;
+	public static final int X86_INS_VBROADCASTI32X4 = 791;
+	public static final int X86_INS_VBROADCASTI32X8 = 792;
+	public static final int X86_INS_VBROADCASTI64X2 = 793;
+	public static final int X86_INS_VBROADCASTI64X4 = 794;
+	public static final int X86_INS_VBROADCASTSD = 795;
+	public static final int X86_INS_VBROADCASTSS = 796;
+	public static final int X86_INS_VCMP = 797;
+	public static final int X86_INS_VCMPPD = 798;
+	public static final int X86_INS_VCMPPS = 799;
+	public static final int X86_INS_VCMPSD = 800;
+	public static final int X86_INS_VCMPSS = 801;
+	public static final int X86_INS_VCOMISD = 802;
+	public static final int X86_INS_VCOMISS = 803;
+	public static final int X86_INS_VCOMPRESSPD = 804;
+	public static final int X86_INS_VCOMPRESSPS = 805;
+	public static final int X86_INS_VCVTDQ2PD = 806;
+	public static final int X86_INS_VCVTDQ2PS = 807;
+	public static final int X86_INS_VCVTPD2DQ = 808;
+	public static final int X86_INS_VCVTPD2PS = 809;
+	public static final int X86_INS_VCVTPD2QQ = 810;
+	public static final int X86_INS_VCVTPD2UDQ = 811;
+	public static final int X86_INS_VCVTPD2UQQ = 812;
+	public static final int X86_INS_VCVTPH2PS = 813;
+	public static final int X86_INS_VCVTPS2DQ = 814;
+	public static final int X86_INS_VCVTPS2PD = 815;
+	public static final int X86_INS_VCVTPS2PH = 816;
+	public static final int X86_INS_VCVTPS2QQ = 817;
+	public static final int X86_INS_VCVTPS2UDQ = 818;
+	public static final int X86_INS_VCVTPS2UQQ = 819;
+	public static final int X86_INS_VCVTQQ2PD = 820;
+	public static final int X86_INS_VCVTQQ2PS = 821;
+	public static final int X86_INS_VCVTSD2SI = 822;
+	public static final int X86_INS_VCVTSD2SS = 823;
+	public static final int X86_INS_VCVTSD2USI = 824;
+	public static final int X86_INS_VCVTSI2SD = 825;
+	public static final int X86_INS_VCVTSI2SS = 826;
+	public static final int X86_INS_VCVTSS2SD = 827;
+	public static final int X86_INS_VCVTSS2SI = 828;
+	public static final int X86_INS_VCVTSS2USI = 829;
+	public static final int X86_INS_VCVTTPD2DQ = 830;
+	public static final int X86_INS_VCVTTPD2QQ = 831;
+	public static final int X86_INS_VCVTTPD2UDQ = 832;
+	public static final int X86_INS_VCVTTPD2UQQ = 833;
+	public static final int X86_INS_VCVTTPS2DQ = 834;
+	public static final int X86_INS_VCVTTPS2QQ = 835;
+	public static final int X86_INS_VCVTTPS2UDQ = 836;
+	public static final int X86_INS_VCVTTPS2UQQ = 837;
+	public static final int X86_INS_VCVTTSD2SI = 838;
+	public static final int X86_INS_VCVTTSD2USI = 839;
+	public static final int X86_INS_VCVTTSS2SI = 840;
+	public static final int X86_INS_VCVTTSS2USI = 841;
+	public static final int X86_INS_VCVTUDQ2PD = 842;
+	public static final int X86_INS_VCVTUDQ2PS = 843;
+	public static final int X86_INS_VCVTUQQ2PD = 844;
+	public static final int X86_INS_VCVTUQQ2PS = 845;
+	public static final int X86_INS_VCVTUSI2SD = 846;
+	public static final int X86_INS_VCVTUSI2SS = 847;
+	public static final int X86_INS_VDBPSADBW = 848;
+	public static final int X86_INS_VDIVPD = 849;
+	public static final int X86_INS_VDIVPS = 850;
+	public static final int X86_INS_VDIVSD = 851;
+	public static final int X86_INS_VDIVSS = 852;
+	public static final int X86_INS_VDPPD = 853;
+	public static final int X86_INS_VDPPS = 854;
+	public static final int X86_INS_VERR = 855;
+	public static final int X86_INS_VERW = 856;
+	public static final int X86_INS_VEXP2PD = 857;
+	public static final int X86_INS_VEXP2PS = 858;
+	public static final int X86_INS_VEXPANDPD = 859;
+	public static final int X86_INS_VEXPANDPS = 860;
+	public static final int X86_INS_VEXTRACTF128 = 861;
+	public static final int X86_INS_VEXTRACTF32X4 = 862;
+	public static final int X86_INS_VEXTRACTF32X8 = 863;
+	public static final int X86_INS_VEXTRACTF64X2 = 864;
+	public static final int X86_INS_VEXTRACTF64X4 = 865;
+	public static final int X86_INS_VEXTRACTI128 = 866;
+	public static final int X86_INS_VEXTRACTI32X4 = 867;
+	public static final int X86_INS_VEXTRACTI32X8 = 868;
+	public static final int X86_INS_VEXTRACTI64X2 = 869;
+	public static final int X86_INS_VEXTRACTI64X4 = 870;
+	public static final int X86_INS_VEXTRACTPS = 871;
+	public static final int X86_INS_VFIXUPIMMPD = 872;
+	public static final int X86_INS_VFIXUPIMMPS = 873;
+	public static final int X86_INS_VFIXUPIMMSD = 874;
+	public static final int X86_INS_VFIXUPIMMSS = 875;
+	public static final int X86_INS_VFMADD132PD = 876;
+	public static final int X86_INS_VFMADD132PS = 877;
+	public static final int X86_INS_VFMADD132SD = 878;
+	public static final int X86_INS_VFMADD132SS = 879;
+	public static final int X86_INS_VFMADD213PD = 880;
+	public static final int X86_INS_VFMADD213PS = 881;
+	public static final int X86_INS_VFMADD213SD = 882;
+	public static final int X86_INS_VFMADD213SS = 883;
+	public static final int X86_INS_VFMADD231PD = 884;
+	public static final int X86_INS_VFMADD231PS = 885;
+	public static final int X86_INS_VFMADD231SD = 886;
+	public static final int X86_INS_VFMADD231SS = 887;
+	public static final int X86_INS_VFMADDPD = 888;
+	public static final int X86_INS_VFMADDPS = 889;
+	public static final int X86_INS_VFMADDSD = 890;
+	public static final int X86_INS_VFMADDSS = 891;
+	public static final int X86_INS_VFMADDSUB132PD = 892;
+	public static final int X86_INS_VFMADDSUB132PS = 893;
+	public static final int X86_INS_VFMADDSUB213PD = 894;
+	public static final int X86_INS_VFMADDSUB213PS = 895;
+	public static final int X86_INS_VFMADDSUB231PD = 896;
+	public static final int X86_INS_VFMADDSUB231PS = 897;
+	public static final int X86_INS_VFMADDSUBPD = 898;
+	public static final int X86_INS_VFMADDSUBPS = 899;
+	public static final int X86_INS_VFMSUB132PD = 900;
+	public static final int X86_INS_VFMSUB132PS = 901;
+	public static final int X86_INS_VFMSUB132SD = 902;
+	public static final int X86_INS_VFMSUB132SS = 903;
+	public static final int X86_INS_VFMSUB213PD = 904;
+	public static final int X86_INS_VFMSUB213PS = 905;
+	public static final int X86_INS_VFMSUB213SD = 906;
+	public static final int X86_INS_VFMSUB213SS = 907;
+	public static final int X86_INS_VFMSUB231PD = 908;
+	public static final int X86_INS_VFMSUB231PS = 909;
+	public static final int X86_INS_VFMSUB231SD = 910;
+	public static final int X86_INS_VFMSUB231SS = 911;
+	public static final int X86_INS_VFMSUBADD132PD = 912;
+	public static final int X86_INS_VFMSUBADD132PS = 913;
+	public static final int X86_INS_VFMSUBADD213PD = 914;
+	public static final int X86_INS_VFMSUBADD213PS = 915;
+	public static final int X86_INS_VFMSUBADD231PD = 916;
+	public static final int X86_INS_VFMSUBADD231PS = 917;
+	public static final int X86_INS_VFMSUBADDPD = 918;
+	public static final int X86_INS_VFMSUBADDPS = 919;
+	public static final int X86_INS_VFMSUBPD = 920;
+	public static final int X86_INS_VFMSUBPS = 921;
+	public static final int X86_INS_VFMSUBSD = 922;
+	public static final int X86_INS_VFMSUBSS = 923;
+	public static final int X86_INS_VFNMADD132PD = 924;
+	public static final int X86_INS_VFNMADD132PS = 925;
+	public static final int X86_INS_VFNMADD132SD = 926;
+	public static final int X86_INS_VFNMADD132SS = 927;
+	public static final int X86_INS_VFNMADD213PD = 928;
+	public static final int X86_INS_VFNMADD213PS = 929;
+	public static final int X86_INS_VFNMADD213SD = 930;
+	public static final int X86_INS_VFNMADD213SS = 931;
+	public static final int X86_INS_VFNMADD231PD = 932;
+	public static final int X86_INS_VFNMADD231PS = 933;
+	public static final int X86_INS_VFNMADD231SD = 934;
+	public static final int X86_INS_VFNMADD231SS = 935;
+	public static final int X86_INS_VFNMADDPD = 936;
+	public static final int X86_INS_VFNMADDPS = 937;
+	public static final int X86_INS_VFNMADDSD = 938;
+	public static final int X86_INS_VFNMADDSS = 939;
+	public static final int X86_INS_VFNMSUB132PD = 940;
+	public static final int X86_INS_VFNMSUB132PS = 941;
+	public static final int X86_INS_VFNMSUB132SD = 942;
+	public static final int X86_INS_VFNMSUB132SS = 943;
+	public static final int X86_INS_VFNMSUB213PD = 944;
+	public static final int X86_INS_VFNMSUB213PS = 945;
+	public static final int X86_INS_VFNMSUB213SD = 946;
+	public static final int X86_INS_VFNMSUB213SS = 947;
+	public static final int X86_INS_VFNMSUB231PD = 948;
+	public static final int X86_INS_VFNMSUB231PS = 949;
+	public static final int X86_INS_VFNMSUB231SD = 950;
+	public static final int X86_INS_VFNMSUB231SS = 951;
+	public static final int X86_INS_VFNMSUBPD = 952;
+	public static final int X86_INS_VFNMSUBPS = 953;
+	public static final int X86_INS_VFNMSUBSD = 954;
+	public static final int X86_INS_VFNMSUBSS = 955;
+	public static final int X86_INS_VFPCLASSPD = 956;
+	public static final int X86_INS_VFPCLASSPS = 957;
+	public static final int X86_INS_VFPCLASSSD = 958;
+	public static final int X86_INS_VFPCLASSSS = 959;
+	public static final int X86_INS_VFRCZPD = 960;
+	public static final int X86_INS_VFRCZPS = 961;
+	public static final int X86_INS_VFRCZSD = 962;
+	public static final int X86_INS_VFRCZSS = 963;
+	public static final int X86_INS_VGATHERDPD = 964;
+	public static final int X86_INS_VGATHERDPS = 965;
+	public static final int X86_INS_VGATHERPF0DPD = 966;
+	public static final int X86_INS_VGATHERPF0DPS = 967;
+	public static final int X86_INS_VGATHERPF0QPD = 968;
+	public static final int X86_INS_VGATHERPF0QPS = 969;
+	public static final int X86_INS_VGATHERPF1DPD = 970;
+	public static final int X86_INS_VGATHERPF1DPS = 971;
+	public static final int X86_INS_VGATHERPF1QPD = 972;
+	public static final int X86_INS_VGATHERPF1QPS = 973;
+	public static final int X86_INS_VGATHERQPD = 974;
+	public static final int X86_INS_VGATHERQPS = 975;
+	public static final int X86_INS_VGETEXPPD = 976;
+	public static final int X86_INS_VGETEXPPS = 977;
+	public static final int X86_INS_VGETEXPSD = 978;
+	public static final int X86_INS_VGETEXPSS = 979;
+	public static final int X86_INS_VGETMANTPD = 980;
+	public static final int X86_INS_VGETMANTPS = 981;
+	public static final int X86_INS_VGETMANTSD = 982;
+	public static final int X86_INS_VGETMANTSS = 983;
+	public static final int X86_INS_VGF2P8AFFINEINVQB = 984;
+	public static final int X86_INS_VGF2P8AFFINEQB = 985;
+	public static final int X86_INS_VGF2P8MULB = 986;
+	public static final int X86_INS_VHADDPD = 987;
+	public static final int X86_INS_VHADDPS = 988;
+	public static final int X86_INS_VHSUBPD = 989;
+	public static final int X86_INS_VHSUBPS = 990;
+	public static final int X86_INS_VINSERTF128 = 991;
+	public static final int X86_INS_VINSERTF32X4 = 992;
+	public static final int X86_INS_VINSERTF32X8 = 993;
+	public static final int X86_INS_VINSERTF64X2 = 994;
+	public static final int X86_INS_VINSERTF64X4 = 995;
+	public static final int X86_INS_VINSERTI128 = 996;
+	public static final int X86_INS_VINSERTI32X4 = 997;
+	public static final int X86_INS_VINSERTI32X8 = 998;
+	public static final int X86_INS_VINSERTI64X2 = 999;
+	public static final int X86_INS_VINSERTI64X4 = 1000;
+	public static final int X86_INS_VINSERTPS = 1001;
+	public static final int X86_INS_VLDDQU = 1002;
+	public static final int X86_INS_VLDMXCSR = 1003;
+	public static final int X86_INS_VMASKMOVDQU = 1004;
+	public static final int X86_INS_VMASKMOVPD = 1005;
+	public static final int X86_INS_VMASKMOVPS = 1006;
+	public static final int X86_INS_VMAXPD = 1007;
+	public static final int X86_INS_VMAXPS = 1008;
+	public static final int X86_INS_VMAXSD = 1009;
+	public static final int X86_INS_VMAXSS = 1010;
+	public static final int X86_INS_VMCALL = 1011;
+	public static final int X86_INS_VMCLEAR = 1012;
+	public static final int X86_INS_VMFUNC = 1013;
+	public static final int X86_INS_VMINPD = 1014;
+	public static final int X86_INS_VMINPS = 1015;
+	public static final int X86_INS_VMINSD = 1016;
+	public static final int X86_INS_VMINSS = 1017;
+	public static final int X86_INS_VMLAUNCH = 1018;
+	public static final int X86_INS_VMLOAD = 1019;
+	public static final int X86_INS_VMMCALL = 1020;
+	public static final int X86_INS_VMOVQ = 1021;
+	public static final int X86_INS_VMOVAPD = 1022;
+	public static final int X86_INS_VMOVAPS = 1023;
+	public static final int X86_INS_VMOVDDUP = 1024;
+	public static final int X86_INS_VMOVD = 1025;
+	public static final int X86_INS_VMOVDQA32 = 1026;
+	public static final int X86_INS_VMOVDQA64 = 1027;
+	public static final int X86_INS_VMOVDQA = 1028;
+	public static final int X86_INS_VMOVDQU16 = 1029;
+	public static final int X86_INS_VMOVDQU32 = 1030;
+	public static final int X86_INS_VMOVDQU64 = 1031;
+	public static final int X86_INS_VMOVDQU8 = 1032;
+	public static final int X86_INS_VMOVDQU = 1033;
+	public static final int X86_INS_VMOVHLPS = 1034;
+	public static final int X86_INS_VMOVHPD = 1035;
+	public static final int X86_INS_VMOVHPS = 1036;
+	public static final int X86_INS_VMOVLHPS = 1037;
+	public static final int X86_INS_VMOVLPD = 1038;
+	public static final int X86_INS_VMOVLPS = 1039;
+	public static final int X86_INS_VMOVMSKPD = 1040;
+	public static final int X86_INS_VMOVMSKPS = 1041;
+	public static final int X86_INS_VMOVNTDQA = 1042;
+	public static final int X86_INS_VMOVNTDQ = 1043;
+	public static final int X86_INS_VMOVNTPD = 1044;
+	public static final int X86_INS_VMOVNTPS = 1045;
+	public static final int X86_INS_VMOVSD = 1046;
+	public static final int X86_INS_VMOVSHDUP = 1047;
+	public static final int X86_INS_VMOVSLDUP = 1048;
+	public static final int X86_INS_VMOVSS = 1049;
+	public static final int X86_INS_VMOVUPD = 1050;
+	public static final int X86_INS_VMOVUPS = 1051;
+	public static final int X86_INS_VMPSADBW = 1052;
+	public static final int X86_INS_VMPTRLD = 1053;
+	public static final int X86_INS_VMPTRST = 1054;
+	public static final int X86_INS_VMREAD = 1055;
+	public static final int X86_INS_VMRESUME = 1056;
+	public static final int X86_INS_VMRUN = 1057;
+	public static final int X86_INS_VMSAVE = 1058;
+	public static final int X86_INS_VMULPD = 1059;
+	public static final int X86_INS_VMULPS = 1060;
+	public static final int X86_INS_VMULSD = 1061;
+	public static final int X86_INS_VMULSS = 1062;
+	public static final int X86_INS_VMWRITE = 1063;
+	public static final int X86_INS_VMXOFF = 1064;
+	public static final int X86_INS_VMXON = 1065;
+	public static final int X86_INS_VORPD = 1066;
+	public static final int X86_INS_VORPS = 1067;
+	public static final int X86_INS_VP4DPWSSDS = 1068;
+	public static final int X86_INS_VP4DPWSSD = 1069;
+	public static final int X86_INS_VPABSB = 1070;
+	public static final int X86_INS_VPABSD = 1071;
+	public static final int X86_INS_VPABSQ = 1072;
+	public static final int X86_INS_VPABSW = 1073;
+	public static final int X86_INS_VPACKSSDW = 1074;
+	public static final int X86_INS_VPACKSSWB = 1075;
+	public static final int X86_INS_VPACKUSDW = 1076;
+	public static final int X86_INS_VPACKUSWB = 1077;
+	public static final int X86_INS_VPADDB = 1078;
+	public static final int X86_INS_VPADDD = 1079;
+	public static final int X86_INS_VPADDQ = 1080;
+	public static final int X86_INS_VPADDSB = 1081;
+	public static final int X86_INS_VPADDSW = 1082;
+	public static final int X86_INS_VPADDUSB = 1083;
+	public static final int X86_INS_VPADDUSW = 1084;
+	public static final int X86_INS_VPADDW = 1085;
+	public static final int X86_INS_VPALIGNR = 1086;
+	public static final int X86_INS_VPANDD = 1087;
+	public static final int X86_INS_VPANDND = 1088;
+	public static final int X86_INS_VPANDNQ = 1089;
+	public static final int X86_INS_VPANDN = 1090;
+	public static final int X86_INS_VPANDQ = 1091;
+	public static final int X86_INS_VPAND = 1092;
+	public static final int X86_INS_VPAVGB = 1093;
+	public static final int X86_INS_VPAVGW = 1094;
+	public static final int X86_INS_VPBLENDD = 1095;
+	public static final int X86_INS_VPBLENDMB = 1096;
+	public static final int X86_INS_VPBLENDMD = 1097;
+	public static final int X86_INS_VPBLENDMQ = 1098;
+	public static final int X86_INS_VPBLENDMW = 1099;
+	public static final int X86_INS_VPBLENDVB = 1100;
+	public static final int X86_INS_VPBLENDW = 1101;
+	public static final int X86_INS_VPBROADCASTB = 1102;
+	public static final int X86_INS_VPBROADCASTD = 1103;
+	public static final int X86_INS_VPBROADCASTMB2Q = 1104;
+	public static final int X86_INS_VPBROADCASTMW2D = 1105;
+	public static final int X86_INS_VPBROADCASTQ = 1106;
+	public static final int X86_INS_VPBROADCASTW = 1107;
+	public static final int X86_INS_VPCLMULQDQ = 1108;
+	public static final int X86_INS_VPCMOV = 1109;
+	public static final int X86_INS_VPCMP = 1110;
+	public static final int X86_INS_VPCMPB = 1111;
+	public static final int X86_INS_VPCMPD = 1112;
+	public static final int X86_INS_VPCMPEQB = 1113;
+	public static final int X86_INS_VPCMPEQD = 1114;
+	public static final int X86_INS_VPCMPEQQ = 1115;
+	public static final int X86_INS_VPCMPEQW = 1116;
+	public static final int X86_INS_VPCMPESTRI = 1117;
+	public static final int X86_INS_VPCMPESTRM = 1118;
+	public static final int X86_INS_VPCMPGTB = 1119;
+	public static final int X86_INS_VPCMPGTD = 1120;
+	public static final int X86_INS_VPCMPGTQ = 1121;
+	public static final int X86_INS_VPCMPGTW = 1122;
+	public static final int X86_INS_VPCMPISTRI = 1123;
+	public static final int X86_INS_VPCMPISTRM = 1124;
+	public static final int X86_INS_VPCMPQ = 1125;
+	public static final int X86_INS_VPCMPUB = 1126;
+	public static final int X86_INS_VPCMPUD = 1127;
+	public static final int X86_INS_VPCMPUQ = 1128;
+	public static final int X86_INS_VPCMPUW = 1129;
+	public static final int X86_INS_VPCMPW = 1130;
+	public static final int X86_INS_VPCOM = 1131;
+	public static final int X86_INS_VPCOMB = 1132;
+	public static final int X86_INS_VPCOMD = 1133;
+	public static final int X86_INS_VPCOMPRESSB = 1134;
+	public static final int X86_INS_VPCOMPRESSD = 1135;
+	public static final int X86_INS_VPCOMPRESSQ = 1136;
+	public static final int X86_INS_VPCOMPRESSW = 1137;
+	public static final int X86_INS_VPCOMQ = 1138;
+	public static final int X86_INS_VPCOMUB = 1139;
+	public static final int X86_INS_VPCOMUD = 1140;
+	public static final int X86_INS_VPCOMUQ = 1141;
+	public static final int X86_INS_VPCOMUW = 1142;
+	public static final int X86_INS_VPCOMW = 1143;
+	public static final int X86_INS_VPCONFLICTD = 1144;
+	public static final int X86_INS_VPCONFLICTQ = 1145;
+	public static final int X86_INS_VPDPBUSDS = 1146;
+	public static final int X86_INS_VPDPBUSD = 1147;
+	public static final int X86_INS_VPDPWSSDS = 1148;
+	public static final int X86_INS_VPDPWSSD = 1149;
+	public static final int X86_INS_VPERM2F128 = 1150;
+	public static final int X86_INS_VPERM2I128 = 1151;
+	public static final int X86_INS_VPERMB = 1152;
+	public static final int X86_INS_VPERMD = 1153;
+	public static final int X86_INS_VPERMI2B = 1154;
+	public static final int X86_INS_VPERMI2D = 1155;
+	public static final int X86_INS_VPERMI2PD = 1156;
+	public static final int X86_INS_VPERMI2PS = 1157;
+	public static final int X86_INS_VPERMI2Q = 1158;
+	public static final int X86_INS_VPERMI2W = 1159;
+	public static final int X86_INS_VPERMIL2PD = 1160;
+	public static final int X86_INS_VPERMILPD = 1161;
+	public static final int X86_INS_VPERMIL2PS = 1162;
+	public static final int X86_INS_VPERMILPS = 1163;
+	public static final int X86_INS_VPERMPD = 1164;
+	public static final int X86_INS_VPERMPS = 1165;
+	public static final int X86_INS_VPERMQ = 1166;
+	public static final int X86_INS_VPERMT2B = 1167;
+	public static final int X86_INS_VPERMT2D = 1168;
+	public static final int X86_INS_VPERMT2PD = 1169;
+	public static final int X86_INS_VPERMT2PS = 1170;
+	public static final int X86_INS_VPERMT2Q = 1171;
+	public static final int X86_INS_VPERMT2W = 1172;
+	public static final int X86_INS_VPERMW = 1173;
+	public static final int X86_INS_VPEXPANDB = 1174;
+	public static final int X86_INS_VPEXPANDD = 1175;
+	public static final int X86_INS_VPEXPANDQ = 1176;
+	public static final int X86_INS_VPEXPANDW = 1177;
+	public static final int X86_INS_VPEXTRB = 1178;
+	public static final int X86_INS_VPEXTRD = 1179;
+	public static final int X86_INS_VPEXTRQ = 1180;
+	public static final int X86_INS_VPEXTRW = 1181;
+	public static final int X86_INS_VPGATHERDD = 1182;
+	public static final int X86_INS_VPGATHERDQ = 1183;
+	public static final int X86_INS_VPGATHERQD = 1184;
+	public static final int X86_INS_VPGATHERQQ = 1185;
+	public static final int X86_INS_VPHADDBD = 1186;
+	public static final int X86_INS_VPHADDBQ = 1187;
+	public static final int X86_INS_VPHADDBW = 1188;
+	public static final int X86_INS_VPHADDDQ = 1189;
+	public static final int X86_INS_VPHADDD = 1190;
+	public static final int X86_INS_VPHADDSW = 1191;
+	public static final int X86_INS_VPHADDUBD = 1192;
+	public static final int X86_INS_VPHADDUBQ = 1193;
+	public static final int X86_INS_VPHADDUBW = 1194;
+	public static final int X86_INS_VPHADDUDQ = 1195;
+	public static final int X86_INS_VPHADDUWD = 1196;
+	public static final int X86_INS_VPHADDUWQ = 1197;
+	public static final int X86_INS_VPHADDWD = 1198;
+	public static final int X86_INS_VPHADDWQ = 1199;
+	public static final int X86_INS_VPHADDW = 1200;
+	public static final int X86_INS_VPHMINPOSUW = 1201;
+	public static final int X86_INS_VPHSUBBW = 1202;
+	public static final int X86_INS_VPHSUBDQ = 1203;
+	public static final int X86_INS_VPHSUBD = 1204;
+	public static final int X86_INS_VPHSUBSW = 1205;
+	public static final int X86_INS_VPHSUBWD = 1206;
+	public static final int X86_INS_VPHSUBW = 1207;
+	public static final int X86_INS_VPINSRB = 1208;
+	public static final int X86_INS_VPINSRD = 1209;
+	public static final int X86_INS_VPINSRQ = 1210;
+	public static final int X86_INS_VPINSRW = 1211;
+	public static final int X86_INS_VPLZCNTD = 1212;
+	public static final int X86_INS_VPLZCNTQ = 1213;
+	public static final int X86_INS_VPMACSDD = 1214;
+	public static final int X86_INS_VPMACSDQH = 1215;
+	public static final int X86_INS_VPMACSDQL = 1216;
+	public static final int X86_INS_VPMACSSDD = 1217;
+	public static final int X86_INS_VPMACSSDQH = 1218;
+	public static final int X86_INS_VPMACSSDQL = 1219;
+	public static final int X86_INS_VPMACSSWD = 1220;
+	public static final int X86_INS_VPMACSSWW = 1221;
+	public static final int X86_INS_VPMACSWD = 1222;
+	public static final int X86_INS_VPMACSWW = 1223;
+	public static final int X86_INS_VPMADCSSWD = 1224;
+	public static final int X86_INS_VPMADCSWD = 1225;
+	public static final int X86_INS_VPMADD52HUQ = 1226;
+	public static final int X86_INS_VPMADD52LUQ = 1227;
+	public static final int X86_INS_VPMADDUBSW = 1228;
+	public static final int X86_INS_VPMADDWD = 1229;
+	public static final int X86_INS_VPMASKMOVD = 1230;
+	public static final int X86_INS_VPMASKMOVQ = 1231;
+	public static final int X86_INS_VPMAXSB = 1232;
+	public static final int X86_INS_VPMAXSD = 1233;
+	public static final int X86_INS_VPMAXSQ = 1234;
+	public static final int X86_INS_VPMAXSW = 1235;
+	public static final int X86_INS_VPMAXUB = 1236;
+	public static final int X86_INS_VPMAXUD = 1237;
+	public static final int X86_INS_VPMAXUQ = 1238;
+	public static final int X86_INS_VPMAXUW = 1239;
+	public static final int X86_INS_VPMINSB = 1240;
+	public static final int X86_INS_VPMINSD = 1241;
+	public static final int X86_INS_VPMINSQ = 1242;
+	public static final int X86_INS_VPMINSW = 1243;
+	public static final int X86_INS_VPMINUB = 1244;
+	public static final int X86_INS_VPMINUD = 1245;
+	public static final int X86_INS_VPMINUQ = 1246;
+	public static final int X86_INS_VPMINUW = 1247;
+	public static final int X86_INS_VPMOVB2M = 1248;
+	public static final int X86_INS_VPMOVD2M = 1249;
+	public static final int X86_INS_VPMOVDB = 1250;
+	public static final int X86_INS_VPMOVDW = 1251;
+	public static final int X86_INS_VPMOVM2B = 1252;
+	public static final int X86_INS_VPMOVM2D = 1253;
+	public static final int X86_INS_VPMOVM2Q = 1254;
+	public static final int X86_INS_VPMOVM2W = 1255;
+	public static final int X86_INS_VPMOVMSKB = 1256;
+	public static final int X86_INS_VPMOVQ2M = 1257;
+	public static final int X86_INS_VPMOVQB = 1258;
+	public static final int X86_INS_VPMOVQD = 1259;
+	public static final int X86_INS_VPMOVQW = 1260;
+	public static final int X86_INS_VPMOVSDB = 1261;
+	public static final int X86_INS_VPMOVSDW = 1262;
+	public static final int X86_INS_VPMOVSQB = 1263;
+	public static final int X86_INS_VPMOVSQD = 1264;
+	public static final int X86_INS_VPMOVSQW = 1265;
+	public static final int X86_INS_VPMOVSWB = 1266;
+	public static final int X86_INS_VPMOVSXBD = 1267;
+	public static final int X86_INS_VPMOVSXBQ = 1268;
+	public static final int X86_INS_VPMOVSXBW = 1269;
+	public static final int X86_INS_VPMOVSXDQ = 1270;
+	public static final int X86_INS_VPMOVSXWD = 1271;
+	public static final int X86_INS_VPMOVSXWQ = 1272;
+	public static final int X86_INS_VPMOVUSDB = 1273;
+	public static final int X86_INS_VPMOVUSDW = 1274;
+	public static final int X86_INS_VPMOVUSQB = 1275;
+	public static final int X86_INS_VPMOVUSQD = 1276;
+	public static final int X86_INS_VPMOVUSQW = 1277;
+	public static final int X86_INS_VPMOVUSWB = 1278;
+	public static final int X86_INS_VPMOVW2M = 1279;
+	public static final int X86_INS_VPMOVWB = 1280;
+	public static final int X86_INS_VPMOVZXBD = 1281;
+	public static final int X86_INS_VPMOVZXBQ = 1282;
+	public static final int X86_INS_VPMOVZXBW = 1283;
+	public static final int X86_INS_VPMOVZXDQ = 1284;
+	public static final int X86_INS_VPMOVZXWD = 1285;
+	public static final int X86_INS_VPMOVZXWQ = 1286;
+	public static final int X86_INS_VPMULDQ = 1287;
+	public static final int X86_INS_VPMULHRSW = 1288;
+	public static final int X86_INS_VPMULHUW = 1289;
+	public static final int X86_INS_VPMULHW = 1290;
+	public static final int X86_INS_VPMULLD = 1291;
+	public static final int X86_INS_VPMULLQ = 1292;
+	public static final int X86_INS_VPMULLW = 1293;
+	public static final int X86_INS_VPMULTISHIFTQB = 1294;
+	public static final int X86_INS_VPMULUDQ = 1295;
+	public static final int X86_INS_VPOPCNTB = 1296;
+	public static final int X86_INS_VPOPCNTD = 1297;
+	public static final int X86_INS_VPOPCNTQ = 1298;
+	public static final int X86_INS_VPOPCNTW = 1299;
+	public static final int X86_INS_VPORD = 1300;
+	public static final int X86_INS_VPORQ = 1301;
+	public static final int X86_INS_VPOR = 1302;
+	public static final int X86_INS_VPPERM = 1303;
+	public static final int X86_INS_VPROLD = 1304;
+	public static final int X86_INS_VPROLQ = 1305;
+	public static final int X86_INS_VPROLVD = 1306;
+	public static final int X86_INS_VPROLVQ = 1307;
+	public static final int X86_INS_VPRORD = 1308;
+	public static final int X86_INS_VPRORQ = 1309;
+	public static final int X86_INS_VPRORVD = 1310;
+	public static final int X86_INS_VPRORVQ = 1311;
+	public static final int X86_INS_VPROTB = 1312;
+	public static final int X86_INS_VPROTD = 1313;
+	public static final int X86_INS_VPROTQ = 1314;
+	public static final int X86_INS_VPROTW = 1315;
+	public static final int X86_INS_VPSADBW = 1316;
+	public static final int X86_INS_VPSCATTERDD = 1317;
+	public static final int X86_INS_VPSCATTERDQ = 1318;
+	public static final int X86_INS_VPSCATTERQD = 1319;
+	public static final int X86_INS_VPSCATTERQQ = 1320;
+	public static final int X86_INS_VPSHAB = 1321;
+	public static final int X86_INS_VPSHAD = 1322;
+	public static final int X86_INS_VPSHAQ = 1323;
+	public static final int X86_INS_VPSHAW = 1324;
+	public static final int X86_INS_VPSHLB = 1325;
+	public static final int X86_INS_VPSHLDD = 1326;
+	public static final int X86_INS_VPSHLDQ = 1327;
+	public static final int X86_INS_VPSHLDVD = 1328;
+	public static final int X86_INS_VPSHLDVQ = 1329;
+	public static final int X86_INS_VPSHLDVW = 1330;
+	public static final int X86_INS_VPSHLDW = 1331;
+	public static final int X86_INS_VPSHLD = 1332;
+	public static final int X86_INS_VPSHLQ = 1333;
+	public static final int X86_INS_VPSHLW = 1334;
+	public static final int X86_INS_VPSHRDD = 1335;
+	public static final int X86_INS_VPSHRDQ = 1336;
+	public static final int X86_INS_VPSHRDVD = 1337;
+	public static final int X86_INS_VPSHRDVQ = 1338;
+	public static final int X86_INS_VPSHRDVW = 1339;
+	public static final int X86_INS_VPSHRDW = 1340;
+	public static final int X86_INS_VPSHUFBITQMB = 1341;
+	public static final int X86_INS_VPSHUFB = 1342;
+	public static final int X86_INS_VPSHUFD = 1343;
+	public static final int X86_INS_VPSHUFHW = 1344;
+	public static final int X86_INS_VPSHUFLW = 1345;
+	public static final int X86_INS_VPSIGNB = 1346;
+	public static final int X86_INS_VPSIGND = 1347;
+	public static final int X86_INS_VPSIGNW = 1348;
+	public static final int X86_INS_VPSLLDQ = 1349;
+	public static final int X86_INS_VPSLLD = 1350;
+	public static final int X86_INS_VPSLLQ = 1351;
+	public static final int X86_INS_VPSLLVD = 1352;
+	public static final int X86_INS_VPSLLVQ = 1353;
+	public static final int X86_INS_VPSLLVW = 1354;
+	public static final int X86_INS_VPSLLW = 1355;
+	public static final int X86_INS_VPSRAD = 1356;
+	public static final int X86_INS_VPSRAQ = 1357;
+	public static final int X86_INS_VPSRAVD = 1358;
+	public static final int X86_INS_VPSRAVQ = 1359;
+	public static final int X86_INS_VPSRAVW = 1360;
+	public static final int X86_INS_VPSRAW = 1361;
+	public static final int X86_INS_VPSRLDQ = 1362;
+	public static final int X86_INS_VPSRLD = 1363;
+	public static final int X86_INS_VPSRLQ = 1364;
+	public static final int X86_INS_VPSRLVD = 1365;
+	public static final int X86_INS_VPSRLVQ = 1366;
+	public static final int X86_INS_VPSRLVW = 1367;
+	public static final int X86_INS_VPSRLW = 1368;
+	public static final int X86_INS_VPSUBB = 1369;
+	public static final int X86_INS_VPSUBD = 1370;
+	public static final int X86_INS_VPSUBQ = 1371;
+	public static final int X86_INS_VPSUBSB = 1372;
+	public static final int X86_INS_VPSUBSW = 1373;
+	public static final int X86_INS_VPSUBUSB = 1374;
+	public static final int X86_INS_VPSUBUSW = 1375;
+	public static final int X86_INS_VPSUBW = 1376;
+	public static final int X86_INS_VPTERNLOGD = 1377;
+	public static final int X86_INS_VPTERNLOGQ = 1378;
+	public static final int X86_INS_VPTESTMB = 1379;
+	public static final int X86_INS_VPTESTMD = 1380;
+	public static final int X86_INS_VPTESTMQ = 1381;
+	public static final int X86_INS_VPTESTMW = 1382;
+	public static final int X86_INS_VPTESTNMB = 1383;
+	public static final int X86_INS_VPTESTNMD = 1384;
+	public static final int X86_INS_VPTESTNMQ = 1385;
+	public static final int X86_INS_VPTESTNMW = 1386;
+	public static final int X86_INS_VPTEST = 1387;
+	public static final int X86_INS_VPUNPCKHBW = 1388;
+	public static final int X86_INS_VPUNPCKHDQ = 1389;
+	public static final int X86_INS_VPUNPCKHQDQ = 1390;
+	public static final int X86_INS_VPUNPCKHWD = 1391;
+	public static final int X86_INS_VPUNPCKLBW = 1392;
+	public static final int X86_INS_VPUNPCKLDQ = 1393;
+	public static final int X86_INS_VPUNPCKLQDQ = 1394;
+	public static final int X86_INS_VPUNPCKLWD = 1395;
+	public static final int X86_INS_VPXORD = 1396;
+	public static final int X86_INS_VPXORQ = 1397;
+	public static final int X86_INS_VPXOR = 1398;
+	public static final int X86_INS_VRANGEPD = 1399;
+	public static final int X86_INS_VRANGEPS = 1400;
+	public static final int X86_INS_VRANGESD = 1401;
+	public static final int X86_INS_VRANGESS = 1402;
+	public static final int X86_INS_VRCP14PD = 1403;
+	public static final int X86_INS_VRCP14PS = 1404;
+	public static final int X86_INS_VRCP14SD = 1405;
+	public static final int X86_INS_VRCP14SS = 1406;
+	public static final int X86_INS_VRCP28PD = 1407;
+	public static final int X86_INS_VRCP28PS = 1408;
+	public static final int X86_INS_VRCP28SD = 1409;
+	public static final int X86_INS_VRCP28SS = 1410;
+	public static final int X86_INS_VRCPPS = 1411;
+	public static final int X86_INS_VRCPSS = 1412;
+	public static final int X86_INS_VREDUCEPD = 1413;
+	public static final int X86_INS_VREDUCEPS = 1414;
+	public static final int X86_INS_VREDUCESD = 1415;
+	public static final int X86_INS_VREDUCESS = 1416;
+	public static final int X86_INS_VRNDSCALEPD = 1417;
+	public static final int X86_INS_VRNDSCALEPS = 1418;
+	public static final int X86_INS_VRNDSCALESD = 1419;
+	public static final int X86_INS_VRNDSCALESS = 1420;
+	public static final int X86_INS_VROUNDPD = 1421;
+	public static final int X86_INS_VROUNDPS = 1422;
+	public static final int X86_INS_VROUNDSD = 1423;
+	public static final int X86_INS_VROUNDSS = 1424;
+	public static final int X86_INS_VRSQRT14PD = 1425;
+	public static final int X86_INS_VRSQRT14PS = 1426;
+	public static final int X86_INS_VRSQRT14SD = 1427;
+	public static final int X86_INS_VRSQRT14SS = 1428;
+	public static final int X86_INS_VRSQRT28PD = 1429;
+	public static final int X86_INS_VRSQRT28PS = 1430;
+	public static final int X86_INS_VRSQRT28SD = 1431;
+	public static final int X86_INS_VRSQRT28SS = 1432;
+	public static final int X86_INS_VRSQRTPS = 1433;
+	public static final int X86_INS_VRSQRTSS = 1434;
+	public static final int X86_INS_VSCALEFPD = 1435;
+	public static final int X86_INS_VSCALEFPS = 1436;
+	public static final int X86_INS_VSCALEFSD = 1437;
+	public static final int X86_INS_VSCALEFSS = 1438;
+	public static final int X86_INS_VSCATTERDPD = 1439;
+	public static final int X86_INS_VSCATTERDPS = 1440;
+	public static final int X86_INS_VSCATTERPF0DPD = 1441;
+	public static final int X86_INS_VSCATTERPF0DPS = 1442;
+	public static final int X86_INS_VSCATTERPF0QPD = 1443;
+	public static final int X86_INS_VSCATTERPF0QPS = 1444;
+	public static final int X86_INS_VSCATTERPF1DPD = 1445;
+	public static final int X86_INS_VSCATTERPF1DPS = 1446;
+	public static final int X86_INS_VSCATTERPF1QPD = 1447;
+	public static final int X86_INS_VSCATTERPF1QPS = 1448;
+	public static final int X86_INS_VSCATTERQPD = 1449;
+	public static final int X86_INS_VSCATTERQPS = 1450;
+	public static final int X86_INS_VSHUFF32X4 = 1451;
+	public static final int X86_INS_VSHUFF64X2 = 1452;
+	public static final int X86_INS_VSHUFI32X4 = 1453;
+	public static final int X86_INS_VSHUFI64X2 = 1454;
+	public static final int X86_INS_VSHUFPD = 1455;
+	public static final int X86_INS_VSHUFPS = 1456;
+	public static final int X86_INS_VSQRTPD = 1457;
+	public static final int X86_INS_VSQRTPS = 1458;
+	public static final int X86_INS_VSQRTSD = 1459;
+	public static final int X86_INS_VSQRTSS = 1460;
+	public static final int X86_INS_VSTMXCSR = 1461;
+	public static final int X86_INS_VSUBPD = 1462;
+	public static final int X86_INS_VSUBPS = 1463;
+	public static final int X86_INS_VSUBSD = 1464;
+	public static final int X86_INS_VSUBSS = 1465;
+	public static final int X86_INS_VTESTPD = 1466;
+	public static final int X86_INS_VTESTPS = 1467;
+	public static final int X86_INS_VUCOMISD = 1468;
+	public static final int X86_INS_VUCOMISS = 1469;
+	public static final int X86_INS_VUNPCKHPD = 1470;
+	public static final int X86_INS_VUNPCKHPS = 1471;
+	public static final int X86_INS_VUNPCKLPD = 1472;
+	public static final int X86_INS_VUNPCKLPS = 1473;
+	public static final int X86_INS_VXORPD = 1474;
+	public static final int X86_INS_VXORPS = 1475;
+	public static final int X86_INS_VZEROALL = 1476;
+	public static final int X86_INS_VZEROUPPER = 1477;
+	public static final int X86_INS_WAIT = 1478;
+	public static final int X86_INS_WBINVD = 1479;
+	public static final int X86_INS_WBNOINVD = 1480;
+	public static final int X86_INS_WRFSBASE = 1481;
+	public static final int X86_INS_WRGSBASE = 1482;
+	public static final int X86_INS_WRMSR = 1483;
+	public static final int X86_INS_WRPKRU = 1484;
+	public static final int X86_INS_WRSSD = 1485;
+	public static final int X86_INS_WRSSQ = 1486;
+	public static final int X86_INS_WRUSSD = 1487;
+	public static final int X86_INS_WRUSSQ = 1488;
+	public static final int X86_INS_XABORT = 1489;
+	public static final int X86_INS_XACQUIRE = 1490;
+	public static final int X86_INS_XADD = 1491;
+	public static final int X86_INS_XBEGIN = 1492;
+	public static final int X86_INS_XCHG = 1493;
+	public static final int X86_INS_FXCH = 1494;
+	public static final int X86_INS_XCRYPTCBC = 1495;
+	public static final int X86_INS_XCRYPTCFB = 1496;
+	public static final int X86_INS_XCRYPTCTR = 1497;
+	public static final int X86_INS_XCRYPTECB = 1498;
+	public static final int X86_INS_XCRYPTOFB = 1499;
+	public static final int X86_INS_XEND = 1500;
+	public static final int X86_INS_XGETBV = 1501;
+	public static final int X86_INS_XLATB = 1502;
+	public static final int X86_INS_XOR = 1503;
+	public static final int X86_INS_XORPD = 1504;
+	public static final int X86_INS_XORPS = 1505;
+	public static final int X86_INS_XRELEASE = 1506;
+	public static final int X86_INS_XRSTOR = 1507;
+	public static final int X86_INS_XRSTOR64 = 1508;
+	public static final int X86_INS_XRSTORS = 1509;
+	public static final int X86_INS_XRSTORS64 = 1510;
+	public static final int X86_INS_XSAVE = 1511;
+	public static final int X86_INS_XSAVE64 = 1512;
+	public static final int X86_INS_XSAVEC = 1513;
+	public static final int X86_INS_XSAVEC64 = 1514;
+	public static final int X86_INS_XSAVEOPT = 1515;
+	public static final int X86_INS_XSAVEOPT64 = 1516;
+	public static final int X86_INS_XSAVES = 1517;
+	public static final int X86_INS_XSAVES64 = 1518;
+	public static final int X86_INS_XSETBV = 1519;
+	public static final int X86_INS_XSHA1 = 1520;
+	public static final int X86_INS_XSHA256 = 1521;
+	public static final int X86_INS_XSTORE = 1522;
+	public static final int X86_INS_XTEST = 1523;
+	public static final int X86_INS_ENDING = 1524;
+
+	public static final int X86_GRP_INVALID = 0;
+	public static final int X86_GRP_JUMP = 1;
+	public static final int X86_GRP_CALL = 2;
+	public static final int X86_GRP_RET = 3;
+	public static final int X86_GRP_INT = 4;
+	public static final int X86_GRP_IRET = 5;
+	public static final int X86_GRP_PRIVILEGE = 6;
+	public static final int X86_GRP_BRANCH_RELATIVE = 7;
+	public static final int X86_GRP_VM = 128;
+	public static final int X86_GRP_3DNOW = 129;
+	public static final int X86_GRP_AES = 130;
+	public static final int X86_GRP_ADX = 131;
+	public static final int X86_GRP_AVX = 132;
+	public static final int X86_GRP_AVX2 = 133;
+	public static final int X86_GRP_AVX512 = 134;
+	public static final int X86_GRP_BMI = 135;
+	public static final int X86_GRP_BMI2 = 136;
+	public static final int X86_GRP_CMOV = 137;
+	public static final int X86_GRP_F16C = 138;
+	public static final int X86_GRP_FMA = 139;
+	public static final int X86_GRP_FMA4 = 140;
+	public static final int X86_GRP_FSGSBASE = 141;
+	public static final int X86_GRP_HLE = 142;
+	public static final int X86_GRP_MMX = 143;
+	public static final int X86_GRP_MODE32 = 144;
+	public static final int X86_GRP_MODE64 = 145;
+	public static final int X86_GRP_RTM = 146;
+	public static final int X86_GRP_SHA = 147;
+	public static final int X86_GRP_SSE1 = 148;
+	public static final int X86_GRP_SSE2 = 149;
+	public static final int X86_GRP_SSE3 = 150;
+	public static final int X86_GRP_SSE41 = 151;
+	public static final int X86_GRP_SSE42 = 152;
+	public static final int X86_GRP_SSE4A = 153;
+	public static final int X86_GRP_SSSE3 = 154;
+	public static final int X86_GRP_PCLMUL = 155;
+	public static final int X86_GRP_XOP = 156;
+	public static final int X86_GRP_CDI = 157;
+	public static final int X86_GRP_ERI = 158;
+	public static final int X86_GRP_TBM = 159;
+	public static final int X86_GRP_16BITMODE = 160;
+	public static final int X86_GRP_NOT64BITMODE = 161;
+	public static final int X86_GRP_SGX = 162;
+	public static final int X86_GRP_DQI = 163;
+	public static final int X86_GRP_BWI = 164;
+	public static final int X86_GRP_PFI = 165;
+	public static final int X86_GRP_VLX = 166;
+	public static final int X86_GRP_SMAP = 167;
+	public static final int X86_GRP_NOVLX = 168;
+	public static final int X86_GRP_FPU = 169;
+	public static final int X86_GRP_ENDING = 170;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/capstone/Xcore.java b/capstone/bindings/java/capstone/Xcore.java
new file mode 100644
index 000000000..3ab61abdd
--- /dev/null
+++ b/capstone/bindings/java/capstone/Xcore.java
@@ -0,0 +1,83 @@
+// Capstone Java binding
+// By Nguyen Anh Quynh & Dang Hoang Vu,  2013
+
+package capstone;
+
+import com.sun.jna.Structure;
+import com.sun.jna.Union;
+
+import java.util.List;
+import java.util.Arrays;
+
+import static capstone.Xcore_const.*;
+
+public class Xcore {
+
+  public static class MemType extends Structure {
+    public byte base;
+    public byte index;
+    public int disp;
+    public int direct;
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("base", "index", "disp", "direct");
+    }
+  }
+
+  public static class OpValue extends Union {
+    public int reg;
+    public int imm;
+    public MemType mem;
+  }
+
+  public static class Operand extends Structure {
+    public int type;
+    public OpValue value;
+
+    public void read() {
+      readField("type");
+      if (type == XCORE_OP_MEM)
+        value.setType(MemType.class);
+      if (type == XCORE_OP_IMM || type == XCORE_OP_REG)
+        value.setType(Integer.TYPE);
+      if (type == XCORE_OP_INVALID)
+        return;
+      readField("value");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("type", "value");
+    }
+  }
+
+  public static class UnionOpInfo extends Capstone.UnionOpInfo {
+    public byte op_count;
+    public Operand [] op;
+
+    public UnionOpInfo() {
+      op = new Operand[8];
+    }
+
+    public void read() {
+      readField("op_count");
+      op = new Operand[op_count];
+      if (op_count != 0)
+        readField("op");
+    }
+
+    @Override
+    public List getFieldOrder() {
+      return Arrays.asList("op_count", "op");
+    }
+  }
+
+  public static class OpInfo extends Capstone.OpInfo {
+    public Operand [] op;
+
+    public OpInfo(UnionOpInfo op_info) {
+      op = op_info.op;
+    }
+  }
+}
diff --git a/capstone/bindings/java/capstone/Xcore_const.java b/capstone/bindings/java/capstone/Xcore_const.java
new file mode 100644
index 000000000..848e142df
--- /dev/null
+++ b/capstone/bindings/java/capstone/Xcore_const.java
@@ -0,0 +1,165 @@
+// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT
+package capstone;
+
+public class Xcore_const {
+
+	public static final int XCORE_OP_INVALID = 0;
+	public static final int XCORE_OP_REG = 1;
+	public static final int XCORE_OP_IMM = 2;
+	public static final int XCORE_OP_MEM = 3;
+
+	public static final int XCORE_REG_INVALID = 0;
+	public static final int XCORE_REG_CP = 1;
+	public static final int XCORE_REG_DP = 2;
+	public static final int XCORE_REG_LR = 3;
+	public static final int XCORE_REG_SP = 4;
+	public static final int XCORE_REG_R0 = 5;
+	public static final int XCORE_REG_R1 = 6;
+	public static final int XCORE_REG_R2 = 7;
+	public static final int XCORE_REG_R3 = 8;
+	public static final int XCORE_REG_R4 = 9;
+	public static final int XCORE_REG_R5 = 10;
+	public static final int XCORE_REG_R6 = 11;
+	public static final int XCORE_REG_R7 = 12;
+	public static final int XCORE_REG_R8 = 13;
+	public static final int XCORE_REG_R9 = 14;
+	public static final int XCORE_REG_R10 = 15;
+	public static final int XCORE_REG_R11 = 16;
+	public static final int XCORE_REG_PC = 17;
+	public static final int XCORE_REG_SCP = 18;
+	public static final int XCORE_REG_SSR = 19;
+	public static final int XCORE_REG_ET = 20;
+	public static final int XCORE_REG_ED = 21;
+	public static final int XCORE_REG_SED = 22;
+	public static final int XCORE_REG_KEP = 23;
+	public static final int XCORE_REG_KSP = 24;
+	public static final int XCORE_REG_ID = 25;
+	public static final int XCORE_REG_ENDING = 26;
+
+	public static final int XCORE_INS_INVALID = 0;
+	public static final int XCORE_INS_ADD = 1;
+	public static final int XCORE_INS_ANDNOT = 2;
+	public static final int XCORE_INS_AND = 3;
+	public static final int XCORE_INS_ASHR = 4;
+	public static final int XCORE_INS_BAU = 5;
+	public static final int XCORE_INS_BITREV = 6;
+	public static final int XCORE_INS_BLA = 7;
+	public static final int XCORE_INS_BLAT = 8;
+	public static final int XCORE_INS_BL = 9;
+	public static final int XCORE_INS_BF = 10;
+	public static final int XCORE_INS_BT = 11;
+	public static final int XCORE_INS_BU = 12;
+	public static final int XCORE_INS_BRU = 13;
+	public static final int XCORE_INS_BYTEREV = 14;
+	public static final int XCORE_INS_CHKCT = 15;
+	public static final int XCORE_INS_CLRE = 16;
+	public static final int XCORE_INS_CLRPT = 17;
+	public static final int XCORE_INS_CLRSR = 18;
+	public static final int XCORE_INS_CLZ = 19;
+	public static final int XCORE_INS_CRC8 = 20;
+	public static final int XCORE_INS_CRC32 = 21;
+	public static final int XCORE_INS_DCALL = 22;
+	public static final int XCORE_INS_DENTSP = 23;
+	public static final int XCORE_INS_DGETREG = 24;
+	public static final int XCORE_INS_DIVS = 25;
+	public static final int XCORE_INS_DIVU = 26;
+	public static final int XCORE_INS_DRESTSP = 27;
+	public static final int XCORE_INS_DRET = 28;
+	public static final int XCORE_INS_ECALLF = 29;
+	public static final int XCORE_INS_ECALLT = 30;
+	public static final int XCORE_INS_EDU = 31;
+	public static final int XCORE_INS_EEF = 32;
+	public static final int XCORE_INS_EET = 33;
+	public static final int XCORE_INS_EEU = 34;
+	public static final int XCORE_INS_ENDIN = 35;
+	public static final int XCORE_INS_ENTSP = 36;
+	public static final int XCORE_INS_EQ = 37;
+	public static final int XCORE_INS_EXTDP = 38;
+	public static final int XCORE_INS_EXTSP = 39;
+	public static final int XCORE_INS_FREER = 40;
+	public static final int XCORE_INS_FREET = 41;
+	public static final int XCORE_INS_GETD = 42;
+	public static final int XCORE_INS_GET = 43;
+	public static final int XCORE_INS_GETN = 44;
+	public static final int XCORE_INS_GETR = 45;
+	public static final int XCORE_INS_GETSR = 46;
+	public static final int XCORE_INS_GETST = 47;
+	public static final int XCORE_INS_GETTS = 48;
+	public static final int XCORE_INS_INCT = 49;
+	public static final int XCORE_INS_INIT = 50;
+	public static final int XCORE_INS_INPW = 51;
+	public static final int XCORE_INS_INSHR = 52;
+	public static final int XCORE_INS_INT = 53;
+	public static final int XCORE_INS_IN = 54;
+	public static final int XCORE_INS_KCALL = 55;
+	public static final int XCORE_INS_KENTSP = 56;
+	public static final int XCORE_INS_KRESTSP = 57;
+	public static final int XCORE_INS_KRET = 58;
+	public static final int XCORE_INS_LADD = 59;
+	public static final int XCORE_INS_LD16S = 60;
+	public static final int XCORE_INS_LD8U = 61;
+	public static final int XCORE_INS_LDA16 = 62;
+	public static final int XCORE_INS_LDAP = 63;
+	public static final int XCORE_INS_LDAW = 64;
+	public static final int XCORE_INS_LDC = 65;
+	public static final int XCORE_INS_LDW = 66;
+	public static final int XCORE_INS_LDIVU = 67;
+	public static final int XCORE_INS_LMUL = 68;
+	public static final int XCORE_INS_LSS = 69;
+	public static final int XCORE_INS_LSUB = 70;
+	public static final int XCORE_INS_LSU = 71;
+	public static final int XCORE_INS_MACCS = 72;
+	public static final int XCORE_INS_MACCU = 73;
+	public static final int XCORE_INS_MJOIN = 74;
+	public static final int XCORE_INS_MKMSK = 75;
+	public static final int XCORE_INS_MSYNC = 76;
+	public static final int XCORE_INS_MUL = 77;
+	public static final int XCORE_INS_NEG = 78;
+	public static final int XCORE_INS_NOT = 79;
+	public static final int XCORE_INS_OR = 80;
+	public static final int XCORE_INS_OUTCT = 81;
+	public static final int XCORE_INS_OUTPW = 82;
+	public static final int XCORE_INS_OUTSHR = 83;
+	public static final int XCORE_INS_OUTT = 84;
+	public static final int XCORE_INS_OUT = 85;
+	public static final int XCORE_INS_PEEK = 86;
+	public static final int XCORE_INS_REMS = 87;
+	public static final int XCORE_INS_REMU = 88;
+	public static final int XCORE_INS_RETSP = 89;
+	public static final int XCORE_INS_SETCLK = 90;
+	public static final int XCORE_INS_SET = 91;
+	public static final int XCORE_INS_SETC = 92;
+	public static final int XCORE_INS_SETD = 93;
+	public static final int XCORE_INS_SETEV = 94;
+	public static final int XCORE_INS_SETN = 95;
+	public static final int XCORE_INS_SETPSC = 96;
+	public static final int XCORE_INS_SETPT = 97;
+	public static final int XCORE_INS_SETRDY = 98;
+	public static final int XCORE_INS_SETSR = 99;
+	public static final int XCORE_INS_SETTW = 100;
+	public static final int XCORE_INS_SETV = 101;
+	public static final int XCORE_INS_SEXT = 102;
+	public static final int XCORE_INS_SHL = 103;
+	public static final int XCORE_INS_SHR = 104;
+	public static final int XCORE_INS_SSYNC = 105;
+	public static final int XCORE_INS_ST16 = 106;
+	public static final int XCORE_INS_ST8 = 107;
+	public static final int XCORE_INS_STW = 108;
+	public static final int XCORE_INS_SUB = 109;
+	public static final int XCORE_INS_SYNCR = 110;
+	public static final int XCORE_INS_TESTCT = 111;
+	public static final int XCORE_INS_TESTLCL = 112;
+	public static final int XCORE_INS_TESTWCT = 113;
+	public static final int XCORE_INS_TSETMR = 114;
+	public static final int XCORE_INS_START = 115;
+	public static final int XCORE_INS_WAITEF = 116;
+	public static final int XCORE_INS_WAITET = 117;
+	public static final int XCORE_INS_WAITEU = 118;
+	public static final int XCORE_INS_XOR = 119;
+	public static final int XCORE_INS_ZEXT = 120;
+	public static final int XCORE_INS_ENDING = 121;
+
+	public static final int XCORE_GRP_INVALID = 0;
+	public static final int XCORE_GRP_JUMP = 1;
+	public static final int XCORE_GRP_ENDING = 2;
+}
+\ No newline at end of file
diff --git a/capstone/bindings/java/run.sh b/capstone/bindings/java/run.sh
new file mode 100755
index 000000000..1430199d4
--- /dev/null
+++ b/capstone/bindings/java/run.sh
@@ -0,0 +1,26 @@
+#!/bin/sh
+JNA=/usr/share/java/jna.jar
+
+if [ ! -f ${JNA} ]; then
+  if [ ! -f /usr/share/java/jna/jna.jar ]; then
+    echo "*** Unable to find jna.jar *** ";
+    exit;
+  else
+    JNA=/usr/share/java/jna/jna.jar;
+  fi
+fi
+
+case "$1" in
+  "") java -classpath ${JNA}:. TestBasic ;;
+  "testbasic") java -classpath ${JNA}:. TestBasic ;;
+  "arm") java -classpath ${JNA}:. TestArm ;;
+  "arm64") java -classpath ${JNA}:. TestArm64 ;;
+  "mips") java -classpath ${JNA}:. TestMips ;;
+  "x86") java -classpath ${JNA}:. TestX86 ;;
+  "xcore") java -classpath ${JNA}:. TestXcore; ;;
+  "ppc") java -classpath ${JNA}:. TestPpc ;;
+  "sparc") java -classpath ${JNA}:. TestSparc ;;
+  "systemz") java -classpath ${JNA}:. TestSystemz ;;
+  "m680x") java -classpath ${JNA}:. TestM680x ;;
+  * ) echo "Usage: ./run.sh [arm|arm64|m680x|mips|ppc|sparc|systemz|x86]"; exit 1;;
+esac
diff --git a/capstone/bindings/ocaml/Makefile b/capstone/bindings/ocaml/Makefile
new file mode 100644
index 000000000..0ce12a325
--- /dev/null
+++ b/capstone/bindings/ocaml/Makefile
@@ -0,0 +1,299 @@
+# Capstone Disassembler Engine
+# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015
+
+LIB = capstone
+FLAGS = '-Wall -Wextra -Wwrite-strings'
+PYTHON2 ?= python
+
+all: arm_const.cmxa arm64_const.cmxa m680x_const.cmxa mips_const.cmxa ppc_const.cmxa sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa m680x.cmxa mips.cmxa ppc.cmxa x86.cmxa sparc.cmxa systemz.cmxa xcore.cmxa capstone.cmxa test_basic.cmx test_detail.cmx test_x86.cmx test_arm.cmx test_arm64.cmx test_mips.cmx test_ppc.cmx test_sparc.cmx test_systemz.cmx test_xcore.cmx test_m680x.cmx ocaml.o
+	ocamlopt -o test_basic -ccopt $(FLAGS) ocaml.o capstone.cmx test_basic.cmx -cclib -l$(LIB)
+	ocamlopt -o test_detail -ccopt $(FLAGS) capstone.cmx ocaml.o test_detail.cmx -cclib -l$(LIB)
+	ocamlopt -o test_x86 -ccopt $(FLAGS) capstone.cmx ocaml.o x86.cmx x86_const.cmx test_x86.cmx -cclib -l$(LIB)
+	ocamlopt -o test_arm -ccopt $(FLAGS) capstone.cmx ocaml.o arm.cmx arm_const.cmx test_arm.cmx -cclib -l$(LIB)
+	ocamlopt -o test_arm64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_arm64.cmx -cclib -l$(LIB)
+	ocamlopt -o test_mips -ccopt $(FLAGS) capstone.cmx ocaml.o mips.cmx mips_const.cmx test_mips.cmx -cclib -l$(LIB)
+	ocamlopt -o test_ppc -ccopt $(FLAGS) capstone.cmx ocaml.o ppc.cmx ppc_const.cmx test_ppc.cmx -cclib -l$(LIB)
+	ocamlopt -o test_sparc -ccopt $(FLAGS) capstone.cmx ocaml.o sparc.cmx sparc_const.cmx test_sparc.cmx -cclib -l$(LIB)
+	ocamlopt -o test_systemz -ccopt $(FLAGS) capstone.cmx ocaml.o systemz.cmx sysz_const.cmx test_systemz.cmx -cclib -l$(LIB)
+	ocamlopt -o test_xcore -ccopt $(FLAGS) capstone.cmx ocaml.o xcore.cmx xcore_const.cmx test_xcore.cmx -cclib -l$(LIB)
+	ocamlopt -o test_m680x -ccopt $(FLAGS) capstone.cmx ocaml.o m680x.cmx m680x_const.cmx test_m680x.cmx -cclib -l$(LIB)
+
+
+test_basic.cmx: test_basic.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_detail.cmx: test_detail.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_x86.cmx: test_x86.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_arm.cmx: test_arm.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_arm64.cmx: test_arm64.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_mips.cmx: test_mips.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_ppc.cmx: test_ppc.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_sparc.cmx: test_sparc.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_systemz.cmx: test_systemz.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_xcore.cmx: test_xcore.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+test_m680x.cmx: test_m680x.ml
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+ocaml.o: ocaml.c
+	ocamlc -ccopt $(FLAGS) -c $<
+
+capstone.mli: capstone.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+capstone.cmi: capstone.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+capstone.cmx: capstone.ml capstone.cmi
+	ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
+
+capstone.cmxa: capstone.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $< -cclib -lsb_ocaml -cclib -l$(LIB)
+
+x86.mli: x86.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+x86.cmi: x86.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+x86.cmx: x86.ml x86.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+x86.cmxa: x86.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+x86_const.mli: x86_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+x86_const.cmi: x86_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+x86_const.cmx: x86_const.ml x86_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+x86_const.cmxa: x86_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm.mli: arm.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm.cmi: arm.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm.cmx: arm.ml arm.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm.cmxa: arm.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm_const.mli: arm_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm_const.cmi: arm_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm_const.cmx: arm_const.ml arm_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm_const.cmxa: arm_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm64.mli: arm64.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm64.cmi: arm64.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm64.cmx: arm64.ml arm64.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm64.cmxa: arm64.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+arm64_const.mli: arm64_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+arm64_const.cmi: arm64_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+arm64_const.cmx: arm64_const.ml arm64_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+arm64_const.cmxa: arm64_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+m680x.mli: m680x.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+m680x.cmi: m680x.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+m680x.cmx: m680x.ml m680x.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+m680x.cmxa: m680x.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+m680x_const.mli: m680x_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+m680x_const.cmi: m680x_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+m680x_const.cmx: m680x_const.ml m680x_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+m680x_const.cmxa: m680x_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+mips.mli: mips.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+mips.cmi: mips.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+mips.cmx: mips.ml mips.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+mips.cmxa: mips.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+mips_const.mli: mips_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+mips_const.cmi: mips_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+mips_const.cmx: mips_const.ml mips_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+mips_const.cmxa: mips_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+ppc.mli: ppc.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+ppc.cmi: ppc.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+ppc.cmx: ppc.ml ppc.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+ppc.cmxa: ppc.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+ppc_const.mli: ppc_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+ppc_const.cmi: ppc_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+ppc_const.cmx: ppc_const.ml ppc_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+ppc_const.cmxa: ppc_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sparc.mli: sparc.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sparc.cmi: sparc.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sparc.cmx: sparc.ml sparc.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sparc.cmxa: sparc.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sparc_const.mli: sparc_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sparc_const.cmi: sparc_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sparc_const.cmx: sparc_const.ml sparc_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sparc_const.cmxa: sparc_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+systemz.mli: systemz.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+systemz.cmi: systemz.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+systemz.cmx: systemz.ml systemz.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+systemz.cmxa: systemz.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+sysz_const.mli: sysz_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+sysz_const.cmi: sysz_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+sysz_const.cmx: sysz_const.ml sysz_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+sysz_const.cmxa: sysz_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+xcore.mli: xcore.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+xcore.cmi: xcore.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+xcore.cmx: xcore.ml xcore.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+xcore.cmxa: xcore.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+xcore_const.mli: xcore_const.ml
+	ocamlc -ccopt $(FLAGS) -i $< > $@
+
+xcore_const.cmi: xcore_const.mli
+	ocamlc -ccopt $(FLAGS) -c $<
+
+xcore_const.cmx: xcore_const.ml xcore_const.cmi
+	ocamlopt -ccopt $(FLAGS) -c $<
+
+xcore_const.cmxa: xcore_const.cmx
+	ocamlopt -ccopt $(FLAGS) -a -o $@ $<
+
+clean:
+	rm -f *.[oa] *.so *.cm[ixoa] *.cmxa *.mli test_basic test_detail test_x86 test_arm test_arm64 test_mips test_ppc test_sparc test_systemz test_xcore test_m680x
+
+gen_const:
+	cd .. && $(PYTHON2) const_generator.py ocaml
+
+TESTS = test_basic test_detail test_arm test_arm64 test_m680x test_mips test_ppc
+TESTS += test_sparc test_systemz test_x86 test_xcore
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./$$t > /dev/null && echo OK || echo FAILED; \
+	done
+
diff --git a/capstone/bindings/ocaml/README b/capstone/bindings/ocaml/README
new file mode 100644
index 000000000..e395232a5
--- /dev/null
+++ b/capstone/bindings/ocaml/README
@@ -0,0 +1,23 @@
+To compile Ocaml binding, Ocaml toolchain is needed. On Ubuntu Linux,
+you can install Ocaml with:
+
+    $ sudo apt-get install ocaml-nox
+
+To compile Ocaml binding, simply run "make" on the command line.
+
+
+This directory also contains some test code to show how to use Capstone API.
+
+- test_basic.ml
+  This code shows the most simple form of API where we only want to get basic
+  information out of disassembled instruction, such as address, mnemonic and
+  operand string.
+
+- test_detail.ml:
+  This code shows how to access to architecture-neutral information in disassembled
+  instructions, such as implicit registers read/written, or groups of instructions
+  that this instruction belong to.
+
+- test_<arch>.ml
+  These code show how to access architecture-specific information for each
+  architecture.
diff --git a/capstone/bindings/ocaml/arm.ml b/capstone/bindings/ocaml/arm.ml
new file mode 100644
index 000000000..eb2de2758
--- /dev/null
+++ b/capstone/bindings/ocaml/arm.ml
@@ -0,0 +1,55 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm_const
+
+let _CS_OP_ARCH = 5;;
+let _CS_OP_CIMM = _CS_OP_ARCH         (* C-Immediate *)
+let _CS_OP_PIMM = _CS_OP_ARCH + 1     (* P-Immediate *)
+
+
+(* architecture specific info of instruction *)
+type arm_op_shift = {
+	shift_type: int;	(* TODO: covert this to pattern like arm_op_value? *)
+	shift_value: int;
+}
+
+type arm_op_mem = {
+	base: int;
+	index: int;
+	scale: int;
+	disp: int;
+	lshift: int;
+}
+
+type arm_op_value =
+	| ARM_OP_INVALID of int
+	| ARM_OP_REG of int
+	| ARM_OP_CIMM of int
+	| ARM_OP_PIMM of int
+	| ARM_OP_IMM of int
+	| ARM_OP_FP of float
+	| ARM_OP_MEM of arm_op_mem
+	| ARM_OP_SETEND of int
+
+type arm_op = {
+	vector_index: int;
+	shift: arm_op_shift;
+	value: arm_op_value;
+	subtracted: bool;
+	access: int;
+	neon_lane: int;
+}
+
+type cs_arm = {
+	usermode: bool;
+	vector_size: int;
+	vector_data: int;
+	cps_mode: int;
+	cps_flag: int;
+	cc: int;
+	update_flags: bool;
+	writeback: bool;
+	mem_barrier: int;
+	operands: arm_op array;
+}
diff --git a/capstone/bindings/ocaml/arm64.ml b/capstone/bindings/ocaml/arm64.ml
new file mode 100644
index 000000000..20d7030c8
--- /dev/null
+++ b/capstone/bindings/ocaml/arm64.ml
@@ -0,0 +1,45 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm64_const
+
+(* architecture specific info of instruction *)
+type arm64_op_shift = {
+	shift_type: int;
+	shift_value: int;
+}
+
+type arm64_op_mem = {
+	base: int;
+	index: int;
+	disp: int
+}
+
+type arm64_op_value =
+	| ARM64_OP_INVALID of int
+	| ARM64_OP_REG of int
+	| ARM64_OP_CIMM of int
+	| ARM64_OP_IMM of int
+	| ARM64_OP_FP of float
+	| ARM64_OP_MEM of arm64_op_mem
+	| ARM64_OP_REG_MRS of int
+	| ARM64_OP_REG_MSR of int
+	| ARM64_OP_PSTATE of int
+	| ARM64_OP_SYS of int
+	| ARM64_OP_PREFETCH of int
+	| ARM64_OP_BARRIER of int
+
+type arm64_op = {
+	vector_index: int;
+	vas: int;
+	shift: arm64_op_shift;
+	ext: int;
+	value: arm64_op_value;
+}
+
+type cs_arm64 = {
+	cc: int;
+	update_flags: bool;
+	writeback: bool;
+	operands: arm64_op array;
+}
diff --git a/capstone/bindings/ocaml/arm64_const.ml b/capstone/bindings/ocaml/arm64_const.ml
new file mode 100644
index 000000000..a8000311d
--- /dev/null
+++ b/capstone/bindings/ocaml/arm64_const.ml
@@ -0,0 +1,2249 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.ml] *)
+
+let _ARM64_SFT_INVALID = 0;;
+let _ARM64_SFT_LSL = 1;;
+let _ARM64_SFT_MSL = 2;;
+let _ARM64_SFT_LSR = 3;;
+let _ARM64_SFT_ASR = 4;;
+let _ARM64_SFT_ROR = 5;;
+
+let _ARM64_EXT_INVALID = 0;;
+let _ARM64_EXT_UXTB = 1;;
+let _ARM64_EXT_UXTH = 2;;
+let _ARM64_EXT_UXTW = 3;;
+let _ARM64_EXT_UXTX = 4;;
+let _ARM64_EXT_SXTB = 5;;
+let _ARM64_EXT_SXTH = 6;;
+let _ARM64_EXT_SXTW = 7;;
+let _ARM64_EXT_SXTX = 8;;
+
+let _ARM64_CC_INVALID = 0;;
+let _ARM64_CC_EQ = 1;;
+let _ARM64_CC_NE = 2;;
+let _ARM64_CC_HS = 3;;
+let _ARM64_CC_LO = 4;;
+let _ARM64_CC_MI = 5;;
+let _ARM64_CC_PL = 6;;
+let _ARM64_CC_VS = 7;;
+let _ARM64_CC_VC = 8;;
+let _ARM64_CC_HI = 9;;
+let _ARM64_CC_LS = 10;;
+let _ARM64_CC_GE = 11;;
+let _ARM64_CC_LT = 12;;
+let _ARM64_CC_GT = 13;;
+let _ARM64_CC_LE = 14;;
+let _ARM64_CC_AL = 15;;
+let _ARM64_CC_NV = 16;;
+
+let _ARM64_SYSREG_INVALID = 0;;
+let _ARM64_SYSREG_MDCCSR_EL0 = 0x9808;;
+let _ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828;;
+let _ARM64_SYSREG_MDRAR_EL1 = 0x8080;;
+let _ARM64_SYSREG_OSLSR_EL1 = 0x808C;;
+let _ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83F6;;
+let _ARM64_SYSREG_PMCEID0_EL0 = 0xDCE6;;
+let _ARM64_SYSREG_PMCEID1_EL0 = 0xDCE7;;
+let _ARM64_SYSREG_MIDR_EL1 = 0xC000;;
+let _ARM64_SYSREG_CCSIDR_EL1 = 0xC800;;
+let _ARM64_SYSREG_CCSIDR2_EL1 = 0xC802;;
+let _ARM64_SYSREG_CLIDR_EL1 = 0xC801;;
+let _ARM64_SYSREG_CTR_EL0 = 0xD801;;
+let _ARM64_SYSREG_MPIDR_EL1 = 0xC005;;
+let _ARM64_SYSREG_REVIDR_EL1 = 0xC006;;
+let _ARM64_SYSREG_AIDR_EL1 = 0xC807;;
+let _ARM64_SYSREG_DCZID_EL0 = 0xD807;;
+let _ARM64_SYSREG_ID_PFR0_EL1 = 0xC008;;
+let _ARM64_SYSREG_ID_PFR1_EL1 = 0xC009;;
+let _ARM64_SYSREG_ID_DFR0_EL1 = 0xC00A;;
+let _ARM64_SYSREG_ID_AFR0_EL1 = 0xC00B;;
+let _ARM64_SYSREG_ID_MMFR0_EL1 = 0xC00C;;
+let _ARM64_SYSREG_ID_MMFR1_EL1 = 0xC00D;;
+let _ARM64_SYSREG_ID_MMFR2_EL1 = 0xC00E;;
+let _ARM64_SYSREG_ID_MMFR3_EL1 = 0xC00F;;
+let _ARM64_SYSREG_ID_ISAR0_EL1 = 0xC010;;
+let _ARM64_SYSREG_ID_ISAR1_EL1 = 0xC011;;
+let _ARM64_SYSREG_ID_ISAR2_EL1 = 0xC012;;
+let _ARM64_SYSREG_ID_ISAR3_EL1 = 0xC013;;
+let _ARM64_SYSREG_ID_ISAR4_EL1 = 0xC014;;
+let _ARM64_SYSREG_ID_ISAR5_EL1 = 0xC015;;
+let _ARM64_SYSREG_ID_ISAR6_EL1 = 0xC017;;
+let _ARM64_SYSREG_ID_AA64PFR0_EL1 = 0xC020;;
+let _ARM64_SYSREG_ID_AA64PFR1_EL1 = 0xC021;;
+let _ARM64_SYSREG_ID_AA64DFR0_EL1 = 0xC028;;
+let _ARM64_SYSREG_ID_AA64DFR1_EL1 = 0xC029;;
+let _ARM64_SYSREG_ID_AA64AFR0_EL1 = 0xC02C;;
+let _ARM64_SYSREG_ID_AA64AFR1_EL1 = 0xC02D;;
+let _ARM64_SYSREG_ID_AA64ISAR0_EL1 = 0xC030;;
+let _ARM64_SYSREG_ID_AA64ISAR1_EL1 = 0xC031;;
+let _ARM64_SYSREG_ID_AA64MMFR0_EL1 = 0xC038;;
+let _ARM64_SYSREG_ID_AA64MMFR1_EL1 = 0xC039;;
+let _ARM64_SYSREG_ID_AA64MMFR2_EL1 = 0xC03A;;
+let _ARM64_SYSREG_MVFR0_EL1 = 0xC018;;
+let _ARM64_SYSREG_MVFR1_EL1 = 0xC019;;
+let _ARM64_SYSREG_MVFR2_EL1 = 0xC01A;;
+let _ARM64_SYSREG_RVBAR_EL1 = 0xC601;;
+let _ARM64_SYSREG_RVBAR_EL2 = 0xE601;;
+let _ARM64_SYSREG_RVBAR_EL3 = 0xF601;;
+let _ARM64_SYSREG_ISR_EL1 = 0xC608;;
+let _ARM64_SYSREG_CNTPCT_EL0 = 0xDF01;;
+let _ARM64_SYSREG_CNTVCT_EL0 = 0xDF02;;
+let _ARM64_SYSREG_ID_MMFR4_EL1 = 0xC016;;
+let _ARM64_SYSREG_TRCSTATR = 0x8818;;
+let _ARM64_SYSREG_TRCIDR8 = 0x8806;;
+let _ARM64_SYSREG_TRCIDR9 = 0x880E;;
+let _ARM64_SYSREG_TRCIDR10 = 0x8816;;
+let _ARM64_SYSREG_TRCIDR11 = 0x881E;;
+let _ARM64_SYSREG_TRCIDR12 = 0x8826;;
+let _ARM64_SYSREG_TRCIDR13 = 0x882E;;
+let _ARM64_SYSREG_TRCIDR0 = 0x8847;;
+let _ARM64_SYSREG_TRCIDR1 = 0x884F;;
+let _ARM64_SYSREG_TRCIDR2 = 0x8857;;
+let _ARM64_SYSREG_TRCIDR3 = 0x885F;;
+let _ARM64_SYSREG_TRCIDR4 = 0x8867;;
+let _ARM64_SYSREG_TRCIDR5 = 0x886F;;
+let _ARM64_SYSREG_TRCIDR6 = 0x8877;;
+let _ARM64_SYSREG_TRCIDR7 = 0x887F;;
+let _ARM64_SYSREG_TRCOSLSR = 0x888C;;
+let _ARM64_SYSREG_TRCPDSR = 0x88AC;;
+let _ARM64_SYSREG_TRCDEVAFF0 = 0x8BD6;;
+let _ARM64_SYSREG_TRCDEVAFF1 = 0x8BDE;;
+let _ARM64_SYSREG_TRCLSR = 0x8BEE;;
+let _ARM64_SYSREG_TRCAUTHSTATUS = 0x8BF6;;
+let _ARM64_SYSREG_TRCDEVARCH = 0x8BFE;;
+let _ARM64_SYSREG_TRCDEVID = 0x8B97;;
+let _ARM64_SYSREG_TRCDEVTYPE = 0x8B9F;;
+let _ARM64_SYSREG_TRCPIDR4 = 0x8BA7;;
+let _ARM64_SYSREG_TRCPIDR5 = 0x8BAF;;
+let _ARM64_SYSREG_TRCPIDR6 = 0x8BB7;;
+let _ARM64_SYSREG_TRCPIDR7 = 0x8BBF;;
+let _ARM64_SYSREG_TRCPIDR0 = 0x8BC7;;
+let _ARM64_SYSREG_TRCPIDR1 = 0x8BCF;;
+let _ARM64_SYSREG_TRCPIDR2 = 0x8BD7;;
+let _ARM64_SYSREG_TRCPIDR3 = 0x8BDF;;
+let _ARM64_SYSREG_TRCCIDR0 = 0x8BE7;;
+let _ARM64_SYSREG_TRCCIDR1 = 0x8BEF;;
+let _ARM64_SYSREG_TRCCIDR2 = 0x8BF7;;
+let _ARM64_SYSREG_TRCCIDR3 = 0x8BFF;;
+let _ARM64_SYSREG_ICC_IAR1_EL1 = 0xC660;;
+let _ARM64_SYSREG_ICC_IAR0_EL1 = 0xC640;;
+let _ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xC662;;
+let _ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xC642;;
+let _ARM64_SYSREG_ICC_RPR_EL1 = 0xC65B;;
+let _ARM64_SYSREG_ICH_VTR_EL2 = 0xE659;;
+let _ARM64_SYSREG_ICH_EISR_EL2 = 0xE65B;;
+let _ARM64_SYSREG_ICH_ELRSR_EL2 = 0xE65D;;
+let _ARM64_SYSREG_ID_AA64ZFR0_EL1 = 0xC024;;
+let _ARM64_SYSREG_LORID_EL1 = 0xC527;;
+let _ARM64_SYSREG_ERRIDR_EL1 = 0xC298;;
+let _ARM64_SYSREG_ERXFR_EL1 = 0xC2A0;;
+let _ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828;;
+let _ARM64_SYSREG_OSLAR_EL1 = 0x8084;;
+let _ARM64_SYSREG_PMSWINC_EL0 = 0xDCE4;;
+let _ARM64_SYSREG_TRCOSLAR = 0x8884;;
+let _ARM64_SYSREG_TRCLAR = 0x8BE6;;
+let _ARM64_SYSREG_ICC_EOIR1_EL1 = 0xC661;;
+let _ARM64_SYSREG_ICC_EOIR0_EL1 = 0xC641;;
+let _ARM64_SYSREG_ICC_DIR_EL1 = 0xC659;;
+let _ARM64_SYSREG_ICC_SGI1R_EL1 = 0xC65D;;
+let _ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xC65E;;
+let _ARM64_SYSREG_ICC_SGI0R_EL1 = 0xC65F;;
+let _ARM64_SYSREG_OSDTRRX_EL1 = 0x8002;;
+let _ARM64_SYSREG_OSDTRTX_EL1 = 0x801A;;
+let _ARM64_SYSREG_TEECR32_EL1 = 0x9000;;
+let _ARM64_SYSREG_MDCCINT_EL1 = 0x8010;;
+let _ARM64_SYSREG_MDSCR_EL1 = 0x8012;;
+let _ARM64_SYSREG_DBGDTR_EL0 = 0x9820;;
+let _ARM64_SYSREG_OSECCR_EL1 = 0x8032;;
+let _ARM64_SYSREG_DBGVCR32_EL2 = 0xA038;;
+let _ARM64_SYSREG_DBGBVR0_EL1 = 0x8004;;
+let _ARM64_SYSREG_DBGBVR1_EL1 = 0x800C;;
+let _ARM64_SYSREG_DBGBVR2_EL1 = 0x8014;;
+let _ARM64_SYSREG_DBGBVR3_EL1 = 0x801C;;
+let _ARM64_SYSREG_DBGBVR4_EL1 = 0x8024;;
+let _ARM64_SYSREG_DBGBVR5_EL1 = 0x802C;;
+let _ARM64_SYSREG_DBGBVR6_EL1 = 0x8034;;
+let _ARM64_SYSREG_DBGBVR7_EL1 = 0x803C;;
+let _ARM64_SYSREG_DBGBVR8_EL1 = 0x8044;;
+let _ARM64_SYSREG_DBGBVR9_EL1 = 0x804C;;
+let _ARM64_SYSREG_DBGBVR10_EL1 = 0x8054;;
+let _ARM64_SYSREG_DBGBVR11_EL1 = 0x805C;;
+let _ARM64_SYSREG_DBGBVR12_EL1 = 0x8064;;
+let _ARM64_SYSREG_DBGBVR13_EL1 = 0x806C;;
+let _ARM64_SYSREG_DBGBVR14_EL1 = 0x8074;;
+let _ARM64_SYSREG_DBGBVR15_EL1 = 0x807C;;
+let _ARM64_SYSREG_DBGBCR0_EL1 = 0x8005;;
+let _ARM64_SYSREG_DBGBCR1_EL1 = 0x800D;;
+let _ARM64_SYSREG_DBGBCR2_EL1 = 0x8015;;
+let _ARM64_SYSREG_DBGBCR3_EL1 = 0x801D;;
+let _ARM64_SYSREG_DBGBCR4_EL1 = 0x8025;;
+let _ARM64_SYSREG_DBGBCR5_EL1 = 0x802D;;
+let _ARM64_SYSREG_DBGBCR6_EL1 = 0x8035;;
+let _ARM64_SYSREG_DBGBCR7_EL1 = 0x803D;;
+let _ARM64_SYSREG_DBGBCR8_EL1 = 0x8045;;
+let _ARM64_SYSREG_DBGBCR9_EL1 = 0x804D;;
+let _ARM64_SYSREG_DBGBCR10_EL1 = 0x8055;;
+let _ARM64_SYSREG_DBGBCR11_EL1 = 0x805D;;
+let _ARM64_SYSREG_DBGBCR12_EL1 = 0x8065;;
+let _ARM64_SYSREG_DBGBCR13_EL1 = 0x806D;;
+let _ARM64_SYSREG_DBGBCR14_EL1 = 0x8075;;
+let _ARM64_SYSREG_DBGBCR15_EL1 = 0x807D;;
+let _ARM64_SYSREG_DBGWVR0_EL1 = 0x8006;;
+let _ARM64_SYSREG_DBGWVR1_EL1 = 0x800E;;
+let _ARM64_SYSREG_DBGWVR2_EL1 = 0x8016;;
+let _ARM64_SYSREG_DBGWVR3_EL1 = 0x801E;;
+let _ARM64_SYSREG_DBGWVR4_EL1 = 0x8026;;
+let _ARM64_SYSREG_DBGWVR5_EL1 = 0x802E;;
+let _ARM64_SYSREG_DBGWVR6_EL1 = 0x8036;;
+let _ARM64_SYSREG_DBGWVR7_EL1 = 0x803E;;
+let _ARM64_SYSREG_DBGWVR8_EL1 = 0x8046;;
+let _ARM64_SYSREG_DBGWVR9_EL1 = 0x804E;;
+let _ARM64_SYSREG_DBGWVR10_EL1 = 0x8056;;
+let _ARM64_SYSREG_DBGWVR11_EL1 = 0x805E;;
+let _ARM64_SYSREG_DBGWVR12_EL1 = 0x8066;;
+let _ARM64_SYSREG_DBGWVR13_EL1 = 0x806E;;
+let _ARM64_SYSREG_DBGWVR14_EL1 = 0x8076;;
+let _ARM64_SYSREG_DBGWVR15_EL1 = 0x807E;;
+let _ARM64_SYSREG_DBGWCR0_EL1 = 0x8007;;
+let _ARM64_SYSREG_DBGWCR1_EL1 = 0x800F;;
+let _ARM64_SYSREG_DBGWCR2_EL1 = 0x8017;;
+let _ARM64_SYSREG_DBGWCR3_EL1 = 0x801F;;
+let _ARM64_SYSREG_DBGWCR4_EL1 = 0x8027;;
+let _ARM64_SYSREG_DBGWCR5_EL1 = 0x802F;;
+let _ARM64_SYSREG_DBGWCR6_EL1 = 0x8037;;
+let _ARM64_SYSREG_DBGWCR7_EL1 = 0x803F;;
+let _ARM64_SYSREG_DBGWCR8_EL1 = 0x8047;;
+let _ARM64_SYSREG_DBGWCR9_EL1 = 0x804F;;
+let _ARM64_SYSREG_DBGWCR10_EL1 = 0x8057;;
+let _ARM64_SYSREG_DBGWCR11_EL1 = 0x805F;;
+let _ARM64_SYSREG_DBGWCR12_EL1 = 0x8067;;
+let _ARM64_SYSREG_DBGWCR13_EL1 = 0x806F;;
+let _ARM64_SYSREG_DBGWCR14_EL1 = 0x8077;;
+let _ARM64_SYSREG_DBGWCR15_EL1 = 0x807F;;
+let _ARM64_SYSREG_TEEHBR32_EL1 = 0x9080;;
+let _ARM64_SYSREG_OSDLR_EL1 = 0x809C;;
+let _ARM64_SYSREG_DBGPRCR_EL1 = 0x80A4;;
+let _ARM64_SYSREG_DBGCLAIMSET_EL1 = 0x83C6;;
+let _ARM64_SYSREG_DBGCLAIMCLR_EL1 = 0x83CE;;
+let _ARM64_SYSREG_CSSELR_EL1 = 0xD000;;
+let _ARM64_SYSREG_VPIDR_EL2 = 0xE000;;
+let _ARM64_SYSREG_VMPIDR_EL2 = 0xE005;;
+let _ARM64_SYSREG_CPACR_EL1 = 0xC082;;
+let _ARM64_SYSREG_SCTLR_EL1 = 0xC080;;
+let _ARM64_SYSREG_SCTLR_EL2 = 0xE080;;
+let _ARM64_SYSREG_SCTLR_EL3 = 0xF080;;
+let _ARM64_SYSREG_ACTLR_EL1 = 0xC081;;
+let _ARM64_SYSREG_ACTLR_EL2 = 0xE081;;
+let _ARM64_SYSREG_ACTLR_EL3 = 0xF081;;
+let _ARM64_SYSREG_HCR_EL2 = 0xE088;;
+let _ARM64_SYSREG_SCR_EL3 = 0xF088;;
+let _ARM64_SYSREG_MDCR_EL2 = 0xE089;;
+let _ARM64_SYSREG_SDER32_EL3 = 0xF089;;
+let _ARM64_SYSREG_CPTR_EL2 = 0xE08A;;
+let _ARM64_SYSREG_CPTR_EL3 = 0xF08A;;
+let _ARM64_SYSREG_HSTR_EL2 = 0xE08B;;
+let _ARM64_SYSREG_HACR_EL2 = 0xE08F;;
+let _ARM64_SYSREG_MDCR_EL3 = 0xF099;;
+let _ARM64_SYSREG_TTBR0_EL1 = 0xC100;;
+let _ARM64_SYSREG_TTBR0_EL2 = 0xE100;;
+let _ARM64_SYSREG_TTBR0_EL3 = 0xF100;;
+let _ARM64_SYSREG_TTBR1_EL1 = 0xC101;;
+let _ARM64_SYSREG_TCR_EL1 = 0xC102;;
+let _ARM64_SYSREG_TCR_EL2 = 0xE102;;
+let _ARM64_SYSREG_TCR_EL3 = 0xF102;;
+let _ARM64_SYSREG_VTTBR_EL2 = 0xE108;;
+let _ARM64_SYSREG_VTCR_EL2 = 0xE10A;;
+let _ARM64_SYSREG_DACR32_EL2 = 0xE180;;
+let _ARM64_SYSREG_SPSR_EL1 = 0xC200;;
+let _ARM64_SYSREG_SPSR_EL2 = 0xE200;;
+let _ARM64_SYSREG_SPSR_EL3 = 0xF200;;
+let _ARM64_SYSREG_ELR_EL1 = 0xC201;;
+let _ARM64_SYSREG_ELR_EL2 = 0xE201;;
+let _ARM64_SYSREG_ELR_EL3 = 0xF201;;
+let _ARM64_SYSREG_SP_EL0 = 0xC208;;
+let _ARM64_SYSREG_SP_EL1 = 0xE208;;
+let _ARM64_SYSREG_SP_EL2 = 0xF208;;
+let _ARM64_SYSREG_SPSEL = 0xC210;;
+let _ARM64_SYSREG_NZCV = 0xDA10;;
+let _ARM64_SYSREG_DAIF = 0xDA11;;
+let _ARM64_SYSREG_CURRENTEL = 0xC212;;
+let _ARM64_SYSREG_SPSR_IRQ = 0xE218;;
+let _ARM64_SYSREG_SPSR_ABT = 0xE219;;
+let _ARM64_SYSREG_SPSR_UND = 0xE21A;;
+let _ARM64_SYSREG_SPSR_FIQ = 0xE21B;;
+let _ARM64_SYSREG_FPCR = 0xDA20;;
+let _ARM64_SYSREG_FPSR = 0xDA21;;
+let _ARM64_SYSREG_DSPSR_EL0 = 0xDA28;;
+let _ARM64_SYSREG_DLR_EL0 = 0xDA29;;
+let _ARM64_SYSREG_IFSR32_EL2 = 0xE281;;
+let _ARM64_SYSREG_AFSR0_EL1 = 0xC288;;
+let _ARM64_SYSREG_AFSR0_EL2 = 0xE288;;
+let _ARM64_SYSREG_AFSR0_EL3 = 0xF288;;
+let _ARM64_SYSREG_AFSR1_EL1 = 0xC289;;
+let _ARM64_SYSREG_AFSR1_EL2 = 0xE289;;
+let _ARM64_SYSREG_AFSR1_EL3 = 0xF289;;
+let _ARM64_SYSREG_ESR_EL1 = 0xC290;;
+let _ARM64_SYSREG_ESR_EL2 = 0xE290;;
+let _ARM64_SYSREG_ESR_EL3 = 0xF290;;
+let _ARM64_SYSREG_FPEXC32_EL2 = 0xE298;;
+let _ARM64_SYSREG_FAR_EL1 = 0xC300;;
+let _ARM64_SYSREG_FAR_EL2 = 0xE300;;
+let _ARM64_SYSREG_FAR_EL3 = 0xF300;;
+let _ARM64_SYSREG_HPFAR_EL2 = 0xE304;;
+let _ARM64_SYSREG_PAR_EL1 = 0xC3A0;;
+let _ARM64_SYSREG_PMCR_EL0 = 0xDCE0;;
+let _ARM64_SYSREG_PMCNTENSET_EL0 = 0xDCE1;;
+let _ARM64_SYSREG_PMCNTENCLR_EL0 = 0xDCE2;;
+let _ARM64_SYSREG_PMOVSCLR_EL0 = 0xDCE3;;
+let _ARM64_SYSREG_PMSELR_EL0 = 0xDCE5;;
+let _ARM64_SYSREG_PMCCNTR_EL0 = 0xDCE8;;
+let _ARM64_SYSREG_PMXEVTYPER_EL0 = 0xDCE9;;
+let _ARM64_SYSREG_PMXEVCNTR_EL0 = 0xDCEA;;
+let _ARM64_SYSREG_PMUSERENR_EL0 = 0xDCF0;;
+let _ARM64_SYSREG_PMINTENSET_EL1 = 0xC4F1;;
+let _ARM64_SYSREG_PMINTENCLR_EL1 = 0xC4F2;;
+let _ARM64_SYSREG_PMOVSSET_EL0 = 0xDCF3;;
+let _ARM64_SYSREG_MAIR_EL1 = 0xC510;;
+let _ARM64_SYSREG_MAIR_EL2 = 0xE510;;
+let _ARM64_SYSREG_MAIR_EL3 = 0xF510;;
+let _ARM64_SYSREG_AMAIR_EL1 = 0xC518;;
+let _ARM64_SYSREG_AMAIR_EL2 = 0xE518;;
+let _ARM64_SYSREG_AMAIR_EL3 = 0xF518;;
+let _ARM64_SYSREG_VBAR_EL1 = 0xC600;;
+let _ARM64_SYSREG_VBAR_EL2 = 0xE600;;
+let _ARM64_SYSREG_VBAR_EL3 = 0xF600;;
+let _ARM64_SYSREG_RMR_EL1 = 0xC602;;
+let _ARM64_SYSREG_RMR_EL2 = 0xE602;;
+let _ARM64_SYSREG_RMR_EL3 = 0xF602;;
+let _ARM64_SYSREG_CONTEXTIDR_EL1 = 0xC681;;
+let _ARM64_SYSREG_TPIDR_EL0 = 0xDE82;;
+let _ARM64_SYSREG_TPIDR_EL2 = 0xE682;;
+let _ARM64_SYSREG_TPIDR_EL3 = 0xF682;;
+let _ARM64_SYSREG_TPIDRRO_EL0 = 0xDE83;;
+let _ARM64_SYSREG_TPIDR_EL1 = 0xC684;;
+let _ARM64_SYSREG_CNTFRQ_EL0 = 0xDF00;;
+let _ARM64_SYSREG_CNTVOFF_EL2 = 0xE703;;
+let _ARM64_SYSREG_CNTKCTL_EL1 = 0xC708;;
+let _ARM64_SYSREG_CNTHCTL_EL2 = 0xE708;;
+let _ARM64_SYSREG_CNTP_TVAL_EL0 = 0xDF10;;
+let _ARM64_SYSREG_CNTHP_TVAL_EL2 = 0xE710;;
+let _ARM64_SYSREG_CNTPS_TVAL_EL1 = 0xFF10;;
+let _ARM64_SYSREG_CNTP_CTL_EL0 = 0xDF11;;
+let _ARM64_SYSREG_CNTHP_CTL_EL2 = 0xE711;;
+let _ARM64_SYSREG_CNTPS_CTL_EL1 = 0xFF11;;
+let _ARM64_SYSREG_CNTP_CVAL_EL0 = 0xDF12;;
+let _ARM64_SYSREG_CNTHP_CVAL_EL2 = 0xE712;;
+let _ARM64_SYSREG_CNTPS_CVAL_EL1 = 0xFF12;;
+let _ARM64_SYSREG_CNTV_TVAL_EL0 = 0xDF18;;
+let _ARM64_SYSREG_CNTV_CTL_EL0 = 0xDF19;;
+let _ARM64_SYSREG_CNTV_CVAL_EL0 = 0xDF1A;;
+let _ARM64_SYSREG_PMEVCNTR0_EL0 = 0xDF40;;
+let _ARM64_SYSREG_PMEVCNTR1_EL0 = 0xDF41;;
+let _ARM64_SYSREG_PMEVCNTR2_EL0 = 0xDF42;;
+let _ARM64_SYSREG_PMEVCNTR3_EL0 = 0xDF43;;
+let _ARM64_SYSREG_PMEVCNTR4_EL0 = 0xDF44;;
+let _ARM64_SYSREG_PMEVCNTR5_EL0 = 0xDF45;;
+let _ARM64_SYSREG_PMEVCNTR6_EL0 = 0xDF46;;
+let _ARM64_SYSREG_PMEVCNTR7_EL0 = 0xDF47;;
+let _ARM64_SYSREG_PMEVCNTR8_EL0 = 0xDF48;;
+let _ARM64_SYSREG_PMEVCNTR9_EL0 = 0xDF49;;
+let _ARM64_SYSREG_PMEVCNTR10_EL0 = 0xDF4A;;
+let _ARM64_SYSREG_PMEVCNTR11_EL0 = 0xDF4B;;
+let _ARM64_SYSREG_PMEVCNTR12_EL0 = 0xDF4C;;
+let _ARM64_SYSREG_PMEVCNTR13_EL0 = 0xDF4D;;
+let _ARM64_SYSREG_PMEVCNTR14_EL0 = 0xDF4E;;
+let _ARM64_SYSREG_PMEVCNTR15_EL0 = 0xDF4F;;
+let _ARM64_SYSREG_PMEVCNTR16_EL0 = 0xDF50;;
+let _ARM64_SYSREG_PMEVCNTR17_EL0 = 0xDF51;;
+let _ARM64_SYSREG_PMEVCNTR18_EL0 = 0xDF52;;
+let _ARM64_SYSREG_PMEVCNTR19_EL0 = 0xDF53;;
+let _ARM64_SYSREG_PMEVCNTR20_EL0 = 0xDF54;;
+let _ARM64_SYSREG_PMEVCNTR21_EL0 = 0xDF55;;
+let _ARM64_SYSREG_PMEVCNTR22_EL0 = 0xDF56;;
+let _ARM64_SYSREG_PMEVCNTR23_EL0 = 0xDF57;;
+let _ARM64_SYSREG_PMEVCNTR24_EL0 = 0xDF58;;
+let _ARM64_SYSREG_PMEVCNTR25_EL0 = 0xDF59;;
+let _ARM64_SYSREG_PMEVCNTR26_EL0 = 0xDF5A;;
+let _ARM64_SYSREG_PMEVCNTR27_EL0 = 0xDF5B;;
+let _ARM64_SYSREG_PMEVCNTR28_EL0 = 0xDF5C;;
+let _ARM64_SYSREG_PMEVCNTR29_EL0 = 0xDF5D;;
+let _ARM64_SYSREG_PMEVCNTR30_EL0 = 0xDF5E;;
+let _ARM64_SYSREG_PMCCFILTR_EL0 = 0xDF7F;;
+let _ARM64_SYSREG_PMEVTYPER0_EL0 = 0xDF60;;
+let _ARM64_SYSREG_PMEVTYPER1_EL0 = 0xDF61;;
+let _ARM64_SYSREG_PMEVTYPER2_EL0 = 0xDF62;;
+let _ARM64_SYSREG_PMEVTYPER3_EL0 = 0xDF63;;
+let _ARM64_SYSREG_PMEVTYPER4_EL0 = 0xDF64;;
+let _ARM64_SYSREG_PMEVTYPER5_EL0 = 0xDF65;;
+let _ARM64_SYSREG_PMEVTYPER6_EL0 = 0xDF66;;
+let _ARM64_SYSREG_PMEVTYPER7_EL0 = 0xDF67;;
+let _ARM64_SYSREG_PMEVTYPER8_EL0 = 0xDF68;;
+let _ARM64_SYSREG_PMEVTYPER9_EL0 = 0xDF69;;
+let _ARM64_SYSREG_PMEVTYPER10_EL0 = 0xDF6A;;
+let _ARM64_SYSREG_PMEVTYPER11_EL0 = 0xDF6B;;
+let _ARM64_SYSREG_PMEVTYPER12_EL0 = 0xDF6C;;
+let _ARM64_SYSREG_PMEVTYPER13_EL0 = 0xDF6D;;
+let _ARM64_SYSREG_PMEVTYPER14_EL0 = 0xDF6E;;
+let _ARM64_SYSREG_PMEVTYPER15_EL0 = 0xDF6F;;
+let _ARM64_SYSREG_PMEVTYPER16_EL0 = 0xDF70;;
+let _ARM64_SYSREG_PMEVTYPER17_EL0 = 0xDF71;;
+let _ARM64_SYSREG_PMEVTYPER18_EL0 = 0xDF72;;
+let _ARM64_SYSREG_PMEVTYPER19_EL0 = 0xDF73;;
+let _ARM64_SYSREG_PMEVTYPER20_EL0 = 0xDF74;;
+let _ARM64_SYSREG_PMEVTYPER21_EL0 = 0xDF75;;
+let _ARM64_SYSREG_PMEVTYPER22_EL0 = 0xDF76;;
+let _ARM64_SYSREG_PMEVTYPER23_EL0 = 0xDF77;;
+let _ARM64_SYSREG_PMEVTYPER24_EL0 = 0xDF78;;
+let _ARM64_SYSREG_PMEVTYPER25_EL0 = 0xDF79;;
+let _ARM64_SYSREG_PMEVTYPER26_EL0 = 0xDF7A;;
+let _ARM64_SYSREG_PMEVTYPER27_EL0 = 0xDF7B;;
+let _ARM64_SYSREG_PMEVTYPER28_EL0 = 0xDF7C;;
+let _ARM64_SYSREG_PMEVTYPER29_EL0 = 0xDF7D;;
+let _ARM64_SYSREG_PMEVTYPER30_EL0 = 0xDF7E;;
+let _ARM64_SYSREG_TRCPRGCTLR = 0x8808;;
+let _ARM64_SYSREG_TRCPROCSELR = 0x8810;;
+let _ARM64_SYSREG_TRCCONFIGR = 0x8820;;
+let _ARM64_SYSREG_TRCAUXCTLR = 0x8830;;
+let _ARM64_SYSREG_TRCEVENTCTL0R = 0x8840;;
+let _ARM64_SYSREG_TRCEVENTCTL1R = 0x8848;;
+let _ARM64_SYSREG_TRCSTALLCTLR = 0x8858;;
+let _ARM64_SYSREG_TRCTSCTLR = 0x8860;;
+let _ARM64_SYSREG_TRCSYNCPR = 0x8868;;
+let _ARM64_SYSREG_TRCCCCTLR = 0x8870;;
+let _ARM64_SYSREG_TRCBBCTLR = 0x8878;;
+let _ARM64_SYSREG_TRCTRACEIDR = 0x8801;;
+let _ARM64_SYSREG_TRCQCTLR = 0x8809;;
+let _ARM64_SYSREG_TRCVICTLR = 0x8802;;
+let _ARM64_SYSREG_TRCVIIECTLR = 0x880A;;
+let _ARM64_SYSREG_TRCVISSCTLR = 0x8812;;
+let _ARM64_SYSREG_TRCVIPCSSCTLR = 0x881A;;
+let _ARM64_SYSREG_TRCVDCTLR = 0x8842;;
+let _ARM64_SYSREG_TRCVDSACCTLR = 0x884A;;
+let _ARM64_SYSREG_TRCVDARCCTLR = 0x8852;;
+let _ARM64_SYSREG_TRCSEQEVR0 = 0x8804;;
+let _ARM64_SYSREG_TRCSEQEVR1 = 0x880C;;
+let _ARM64_SYSREG_TRCSEQEVR2 = 0x8814;;
+let _ARM64_SYSREG_TRCSEQRSTEVR = 0x8834;;
+let _ARM64_SYSREG_TRCSEQSTR = 0x883C;;
+let _ARM64_SYSREG_TRCEXTINSELR = 0x8844;;
+let _ARM64_SYSREG_TRCCNTRLDVR0 = 0x8805;;
+let _ARM64_SYSREG_TRCCNTRLDVR1 = 0x880D;;
+let _ARM64_SYSREG_TRCCNTRLDVR2 = 0x8815;;
+let _ARM64_SYSREG_TRCCNTRLDVR3 = 0x881D;;
+let _ARM64_SYSREG_TRCCNTCTLR0 = 0x8825;;
+let _ARM64_SYSREG_TRCCNTCTLR1 = 0x882D;;
+let _ARM64_SYSREG_TRCCNTCTLR2 = 0x8835;;
+let _ARM64_SYSREG_TRCCNTCTLR3 = 0x883D;;
+let _ARM64_SYSREG_TRCCNTVR0 = 0x8845;;
+let _ARM64_SYSREG_TRCCNTVR1 = 0x884D;;
+let _ARM64_SYSREG_TRCCNTVR2 = 0x8855;;
+let _ARM64_SYSREG_TRCCNTVR3 = 0x885D;;
+let _ARM64_SYSREG_TRCIMSPEC0 = 0x8807;;
+let _ARM64_SYSREG_TRCIMSPEC1 = 0x880F;;
+let _ARM64_SYSREG_TRCIMSPEC2 = 0x8817;;
+let _ARM64_SYSREG_TRCIMSPEC3 = 0x881F;;
+let _ARM64_SYSREG_TRCIMSPEC4 = 0x8827;;
+let _ARM64_SYSREG_TRCIMSPEC5 = 0x882F;;
+let _ARM64_SYSREG_TRCIMSPEC6 = 0x8837;;
+let _ARM64_SYSREG_TRCIMSPEC7 = 0x883F;;
+let _ARM64_SYSREG_TRCRSCTLR2 = 0x8890;;
+let _ARM64_SYSREG_TRCRSCTLR3 = 0x8898;;
+let _ARM64_SYSREG_TRCRSCTLR4 = 0x88A0;;
+let _ARM64_SYSREG_TRCRSCTLR5 = 0x88A8;;
+let _ARM64_SYSREG_TRCRSCTLR6 = 0x88B0;;
+let _ARM64_SYSREG_TRCRSCTLR7 = 0x88B8;;
+let _ARM64_SYSREG_TRCRSCTLR8 = 0x88C0;;
+let _ARM64_SYSREG_TRCRSCTLR9 = 0x88C8;;
+let _ARM64_SYSREG_TRCRSCTLR10 = 0x88D0;;
+let _ARM64_SYSREG_TRCRSCTLR11 = 0x88D8;;
+let _ARM64_SYSREG_TRCRSCTLR12 = 0x88E0;;
+let _ARM64_SYSREG_TRCRSCTLR13 = 0x88E8;;
+let _ARM64_SYSREG_TRCRSCTLR14 = 0x88F0;;
+let _ARM64_SYSREG_TRCRSCTLR15 = 0x88F8;;
+let _ARM64_SYSREG_TRCRSCTLR16 = 0x8881;;
+let _ARM64_SYSREG_TRCRSCTLR17 = 0x8889;;
+let _ARM64_SYSREG_TRCRSCTLR18 = 0x8891;;
+let _ARM64_SYSREG_TRCRSCTLR19 = 0x8899;;
+let _ARM64_SYSREG_TRCRSCTLR20 = 0x88A1;;
+let _ARM64_SYSREG_TRCRSCTLR21 = 0x88A9;;
+let _ARM64_SYSREG_TRCRSCTLR22 = 0x88B1;;
+let _ARM64_SYSREG_TRCRSCTLR23 = 0x88B9;;
+let _ARM64_SYSREG_TRCRSCTLR24 = 0x88C1;;
+let _ARM64_SYSREG_TRCRSCTLR25 = 0x88C9;;
+let _ARM64_SYSREG_TRCRSCTLR26 = 0x88D1;;
+let _ARM64_SYSREG_TRCRSCTLR27 = 0x88D9;;
+let _ARM64_SYSREG_TRCRSCTLR28 = 0x88E1;;
+let _ARM64_SYSREG_TRCRSCTLR29 = 0x88E9;;
+let _ARM64_SYSREG_TRCRSCTLR30 = 0x88F1;;
+let _ARM64_SYSREG_TRCRSCTLR31 = 0x88F9;;
+let _ARM64_SYSREG_TRCSSCCR0 = 0x8882;;
+let _ARM64_SYSREG_TRCSSCCR1 = 0x888A;;
+let _ARM64_SYSREG_TRCSSCCR2 = 0x8892;;
+let _ARM64_SYSREG_TRCSSCCR3 = 0x889A;;
+let _ARM64_SYSREG_TRCSSCCR4 = 0x88A2;;
+let _ARM64_SYSREG_TRCSSCCR5 = 0x88AA;;
+let _ARM64_SYSREG_TRCSSCCR6 = 0x88B2;;
+let _ARM64_SYSREG_TRCSSCCR7 = 0x88BA;;
+let _ARM64_SYSREG_TRCSSCSR0 = 0x88C2;;
+let _ARM64_SYSREG_TRCSSCSR1 = 0x88CA;;
+let _ARM64_SYSREG_TRCSSCSR2 = 0x88D2;;
+let _ARM64_SYSREG_TRCSSCSR3 = 0x88DA;;
+let _ARM64_SYSREG_TRCSSCSR4 = 0x88E2;;
+let _ARM64_SYSREG_TRCSSCSR5 = 0x88EA;;
+let _ARM64_SYSREG_TRCSSCSR6 = 0x88F2;;
+let _ARM64_SYSREG_TRCSSCSR7 = 0x88FA;;
+let _ARM64_SYSREG_TRCSSPCICR0 = 0x8883;;
+let _ARM64_SYSREG_TRCSSPCICR1 = 0x888B;;
+let _ARM64_SYSREG_TRCSSPCICR2 = 0x8893;;
+let _ARM64_SYSREG_TRCSSPCICR3 = 0x889B;;
+let _ARM64_SYSREG_TRCSSPCICR4 = 0x88A3;;
+let _ARM64_SYSREG_TRCSSPCICR5 = 0x88AB;;
+let _ARM64_SYSREG_TRCSSPCICR6 = 0x88B3;;
+let _ARM64_SYSREG_TRCSSPCICR7 = 0x88BB;;
+let _ARM64_SYSREG_TRCPDCR = 0x88A4;;
+let _ARM64_SYSREG_TRCACVR0 = 0x8900;;
+let _ARM64_SYSREG_TRCACVR1 = 0x8910;;
+let _ARM64_SYSREG_TRCACVR2 = 0x8920;;
+let _ARM64_SYSREG_TRCACVR3 = 0x8930;;
+let _ARM64_SYSREG_TRCACVR4 = 0x8940;;
+let _ARM64_SYSREG_TRCACVR5 = 0x8950;;
+let _ARM64_SYSREG_TRCACVR6 = 0x8960;;
+let _ARM64_SYSREG_TRCACVR7 = 0x8970;;
+let _ARM64_SYSREG_TRCACVR8 = 0x8901;;
+let _ARM64_SYSREG_TRCACVR9 = 0x8911;;
+let _ARM64_SYSREG_TRCACVR10 = 0x8921;;
+let _ARM64_SYSREG_TRCACVR11 = 0x8931;;
+let _ARM64_SYSREG_TRCACVR12 = 0x8941;;
+let _ARM64_SYSREG_TRCACVR13 = 0x8951;;
+let _ARM64_SYSREG_TRCACVR14 = 0x8961;;
+let _ARM64_SYSREG_TRCACVR15 = 0x8971;;
+let _ARM64_SYSREG_TRCACATR0 = 0x8902;;
+let _ARM64_SYSREG_TRCACATR1 = 0x8912;;
+let _ARM64_SYSREG_TRCACATR2 = 0x8922;;
+let _ARM64_SYSREG_TRCACATR3 = 0x8932;;
+let _ARM64_SYSREG_TRCACATR4 = 0x8942;;
+let _ARM64_SYSREG_TRCACATR5 = 0x8952;;
+let _ARM64_SYSREG_TRCACATR6 = 0x8962;;
+let _ARM64_SYSREG_TRCACATR7 = 0x8972;;
+let _ARM64_SYSREG_TRCACATR8 = 0x8903;;
+let _ARM64_SYSREG_TRCACATR9 = 0x8913;;
+let _ARM64_SYSREG_TRCACATR10 = 0x8923;;
+let _ARM64_SYSREG_TRCACATR11 = 0x8933;;
+let _ARM64_SYSREG_TRCACATR12 = 0x8943;;
+let _ARM64_SYSREG_TRCACATR13 = 0x8953;;
+let _ARM64_SYSREG_TRCACATR14 = 0x8963;;
+let _ARM64_SYSREG_TRCACATR15 = 0x8973;;
+let _ARM64_SYSREG_TRCDVCVR0 = 0x8904;;
+let _ARM64_SYSREG_TRCDVCVR1 = 0x8924;;
+let _ARM64_SYSREG_TRCDVCVR2 = 0x8944;;
+let _ARM64_SYSREG_TRCDVCVR3 = 0x8964;;
+let _ARM64_SYSREG_TRCDVCVR4 = 0x8905;;
+let _ARM64_SYSREG_TRCDVCVR5 = 0x8925;;
+let _ARM64_SYSREG_TRCDVCVR6 = 0x8945;;
+let _ARM64_SYSREG_TRCDVCVR7 = 0x8965;;
+let _ARM64_SYSREG_TRCDVCMR0 = 0x8906;;
+let _ARM64_SYSREG_TRCDVCMR1 = 0x8926;;
+let _ARM64_SYSREG_TRCDVCMR2 = 0x8946;;
+let _ARM64_SYSREG_TRCDVCMR3 = 0x8966;;
+let _ARM64_SYSREG_TRCDVCMR4 = 0x8907;;
+let _ARM64_SYSREG_TRCDVCMR5 = 0x8927;;
+let _ARM64_SYSREG_TRCDVCMR6 = 0x8947;;
+let _ARM64_SYSREG_TRCDVCMR7 = 0x8967;;
+let _ARM64_SYSREG_TRCCIDCVR0 = 0x8980;;
+let _ARM64_SYSREG_TRCCIDCVR1 = 0x8990;;
+let _ARM64_SYSREG_TRCCIDCVR2 = 0x89A0;;
+let _ARM64_SYSREG_TRCCIDCVR3 = 0x89B0;;
+let _ARM64_SYSREG_TRCCIDCVR4 = 0x89C0;;
+let _ARM64_SYSREG_TRCCIDCVR5 = 0x89D0;;
+let _ARM64_SYSREG_TRCCIDCVR6 = 0x89E0;;
+let _ARM64_SYSREG_TRCCIDCVR7 = 0x89F0;;
+let _ARM64_SYSREG_TRCVMIDCVR0 = 0x8981;;
+let _ARM64_SYSREG_TRCVMIDCVR1 = 0x8991;;
+let _ARM64_SYSREG_TRCVMIDCVR2 = 0x89A1;;
+let _ARM64_SYSREG_TRCVMIDCVR3 = 0x89B1;;
+let _ARM64_SYSREG_TRCVMIDCVR4 = 0x89C1;;
+let _ARM64_SYSREG_TRCVMIDCVR5 = 0x89D1;;
+let _ARM64_SYSREG_TRCVMIDCVR6 = 0x89E1;;
+let _ARM64_SYSREG_TRCVMIDCVR7 = 0x89F1;;
+let _ARM64_SYSREG_TRCCIDCCTLR0 = 0x8982;;
+let _ARM64_SYSREG_TRCCIDCCTLR1 = 0x898A;;
+let _ARM64_SYSREG_TRCVMIDCCTLR0 = 0x8992;;
+let _ARM64_SYSREG_TRCVMIDCCTLR1 = 0x899A;;
+let _ARM64_SYSREG_TRCITCTRL = 0x8B84;;
+let _ARM64_SYSREG_TRCCLAIMSET = 0x8BC6;;
+let _ARM64_SYSREG_TRCCLAIMCLR = 0x8BCE;;
+let _ARM64_SYSREG_ICC_BPR1_EL1 = 0xC663;;
+let _ARM64_SYSREG_ICC_BPR0_EL1 = 0xC643;;
+let _ARM64_SYSREG_ICC_PMR_EL1 = 0xC230;;
+let _ARM64_SYSREG_ICC_CTLR_EL1 = 0xC664;;
+let _ARM64_SYSREG_ICC_CTLR_EL3 = 0xF664;;
+let _ARM64_SYSREG_ICC_SRE_EL1 = 0xC665;;
+let _ARM64_SYSREG_ICC_SRE_EL2 = 0xE64D;;
+let _ARM64_SYSREG_ICC_SRE_EL3 = 0xF665;;
+let _ARM64_SYSREG_ICC_IGRPEN0_EL1 = 0xC666;;
+let _ARM64_SYSREG_ICC_IGRPEN1_EL1 = 0xC667;;
+let _ARM64_SYSREG_ICC_IGRPEN1_EL3 = 0xF667;;
+let _ARM64_SYSREG_ICC_SEIEN_EL1 = 0xC668;;
+let _ARM64_SYSREG_ICC_AP0R0_EL1 = 0xC644;;
+let _ARM64_SYSREG_ICC_AP0R1_EL1 = 0xC645;;
+let _ARM64_SYSREG_ICC_AP0R2_EL1 = 0xC646;;
+let _ARM64_SYSREG_ICC_AP0R3_EL1 = 0xC647;;
+let _ARM64_SYSREG_ICC_AP1R0_EL1 = 0xC648;;
+let _ARM64_SYSREG_ICC_AP1R1_EL1 = 0xC649;;
+let _ARM64_SYSREG_ICC_AP1R2_EL1 = 0xC64A;;
+let _ARM64_SYSREG_ICC_AP1R3_EL1 = 0xC64B;;
+let _ARM64_SYSREG_ICH_AP0R0_EL2 = 0xE640;;
+let _ARM64_SYSREG_ICH_AP0R1_EL2 = 0xE641;;
+let _ARM64_SYSREG_ICH_AP0R2_EL2 = 0xE642;;
+let _ARM64_SYSREG_ICH_AP0R3_EL2 = 0xE643;;
+let _ARM64_SYSREG_ICH_AP1R0_EL2 = 0xE648;;
+let _ARM64_SYSREG_ICH_AP1R1_EL2 = 0xE649;;
+let _ARM64_SYSREG_ICH_AP1R2_EL2 = 0xE64A;;
+let _ARM64_SYSREG_ICH_AP1R3_EL2 = 0xE64B;;
+let _ARM64_SYSREG_ICH_HCR_EL2 = 0xE658;;
+let _ARM64_SYSREG_ICH_MISR_EL2 = 0xE65A;;
+let _ARM64_SYSREG_ICH_VMCR_EL2 = 0xE65F;;
+let _ARM64_SYSREG_ICH_VSEIR_EL2 = 0xE64C;;
+let _ARM64_SYSREG_ICH_LR0_EL2 = 0xE660;;
+let _ARM64_SYSREG_ICH_LR1_EL2 = 0xE661;;
+let _ARM64_SYSREG_ICH_LR2_EL2 = 0xE662;;
+let _ARM64_SYSREG_ICH_LR3_EL2 = 0xE663;;
+let _ARM64_SYSREG_ICH_LR4_EL2 = 0xE664;;
+let _ARM64_SYSREG_ICH_LR5_EL2 = 0xE665;;
+let _ARM64_SYSREG_ICH_LR6_EL2 = 0xE666;;
+let _ARM64_SYSREG_ICH_LR7_EL2 = 0xE667;;
+let _ARM64_SYSREG_ICH_LR8_EL2 = 0xE668;;
+let _ARM64_SYSREG_ICH_LR9_EL2 = 0xE669;;
+let _ARM64_SYSREG_ICH_LR10_EL2 = 0xE66A;;
+let _ARM64_SYSREG_ICH_LR11_EL2 = 0xE66B;;
+let _ARM64_SYSREG_ICH_LR12_EL2 = 0xE66C;;
+let _ARM64_SYSREG_ICH_LR13_EL2 = 0xE66D;;
+let _ARM64_SYSREG_ICH_LR14_EL2 = 0xE66E;;
+let _ARM64_SYSREG_ICH_LR15_EL2 = 0xE66F;;
+let _ARM64_SYSREG_PAN = 0xC213;;
+let _ARM64_SYSREG_LORSA_EL1 = 0xC520;;
+let _ARM64_SYSREG_LOREA_EL1 = 0xC521;;
+let _ARM64_SYSREG_LORN_EL1 = 0xC522;;
+let _ARM64_SYSREG_LORC_EL1 = 0xC523;;
+let _ARM64_SYSREG_TTBR1_EL2 = 0xE101;;
+let _ARM64_SYSREG_CONTEXTIDR_EL2 = 0xE681;;
+let _ARM64_SYSREG_CNTHV_TVAL_EL2 = 0xE718;;
+let _ARM64_SYSREG_CNTHV_CVAL_EL2 = 0xE71A;;
+let _ARM64_SYSREG_CNTHV_CTL_EL2 = 0xE719;;
+let _ARM64_SYSREG_SCTLR_EL12 = 0xE880;;
+let _ARM64_SYSREG_CPACR_EL12 = 0xE882;;
+let _ARM64_SYSREG_TTBR0_EL12 = 0xE900;;
+let _ARM64_SYSREG_TTBR1_EL12 = 0xE901;;
+let _ARM64_SYSREG_TCR_EL12 = 0xE902;;
+let _ARM64_SYSREG_AFSR0_EL12 = 0xEA88;;
+let _ARM64_SYSREG_AFSR1_EL12 = 0xEA89;;
+let _ARM64_SYSREG_ESR_EL12 = 0xEA90;;
+let _ARM64_SYSREG_FAR_EL12 = 0xEB00;;
+let _ARM64_SYSREG_MAIR_EL12 = 0xED10;;
+let _ARM64_SYSREG_AMAIR_EL12 = 0xED18;;
+let _ARM64_SYSREG_VBAR_EL12 = 0xEE00;;
+let _ARM64_SYSREG_CONTEXTIDR_EL12 = 0xEE81;;
+let _ARM64_SYSREG_CNTKCTL_EL12 = 0xEF08;;
+let _ARM64_SYSREG_CNTP_TVAL_EL02 = 0xEF10;;
+let _ARM64_SYSREG_CNTP_CTL_EL02 = 0xEF11;;
+let _ARM64_SYSREG_CNTP_CVAL_EL02 = 0xEF12;;
+let _ARM64_SYSREG_CNTV_TVAL_EL02 = 0xEF18;;
+let _ARM64_SYSREG_CNTV_CTL_EL02 = 0xEF19;;
+let _ARM64_SYSREG_CNTV_CVAL_EL02 = 0xEF1A;;
+let _ARM64_SYSREG_SPSR_EL12 = 0xEA00;;
+let _ARM64_SYSREG_ELR_EL12 = 0xEA01;;
+let _ARM64_SYSREG_UAO = 0xC214;;
+let _ARM64_SYSREG_PMBLIMITR_EL1 = 0xC4D0;;
+let _ARM64_SYSREG_PMBPTR_EL1 = 0xC4D1;;
+let _ARM64_SYSREG_PMBSR_EL1 = 0xC4D3;;
+let _ARM64_SYSREG_PMBIDR_EL1 = 0xC4D7;;
+let _ARM64_SYSREG_PMSCR_EL2 = 0xE4C8;;
+let _ARM64_SYSREG_PMSCR_EL12 = 0xECC8;;
+let _ARM64_SYSREG_PMSCR_EL1 = 0xC4C8;;
+let _ARM64_SYSREG_PMSICR_EL1 = 0xC4CA;;
+let _ARM64_SYSREG_PMSIRR_EL1 = 0xC4CB;;
+let _ARM64_SYSREG_PMSFCR_EL1 = 0xC4CC;;
+let _ARM64_SYSREG_PMSEVFR_EL1 = 0xC4CD;;
+let _ARM64_SYSREG_PMSLATFR_EL1 = 0xC4CE;;
+let _ARM64_SYSREG_PMSIDR_EL1 = 0xC4CF;;
+let _ARM64_SYSREG_ERRSELR_EL1 = 0xC299;;
+let _ARM64_SYSREG_ERXCTLR_EL1 = 0xC2A1;;
+let _ARM64_SYSREG_ERXSTATUS_EL1 = 0xC2A2;;
+let _ARM64_SYSREG_ERXADDR_EL1 = 0xC2A3;;
+let _ARM64_SYSREG_ERXMISC0_EL1 = 0xC2A8;;
+let _ARM64_SYSREG_ERXMISC1_EL1 = 0xC2A9;;
+let _ARM64_SYSREG_DISR_EL1 = 0xC609;;
+let _ARM64_SYSREG_VDISR_EL2 = 0xE609;;
+let _ARM64_SYSREG_VSESR_EL2 = 0xE293;;
+let _ARM64_SYSREG_APIAKEYLO_EL1 = 0xC108;;
+let _ARM64_SYSREG_APIAKEYHI_EL1 = 0xC109;;
+let _ARM64_SYSREG_APIBKEYLO_EL1 = 0xC10A;;
+let _ARM64_SYSREG_APIBKEYHI_EL1 = 0xC10B;;
+let _ARM64_SYSREG_APDAKEYLO_EL1 = 0xC110;;
+let _ARM64_SYSREG_APDAKEYHI_EL1 = 0xC111;;
+let _ARM64_SYSREG_APDBKEYLO_EL1 = 0xC112;;
+let _ARM64_SYSREG_APDBKEYHI_EL1 = 0xC113;;
+let _ARM64_SYSREG_APGAKEYLO_EL1 = 0xC118;;
+let _ARM64_SYSREG_APGAKEYHI_EL1 = 0xC119;;
+let _ARM64_SYSREG_VSTCR_EL2 = 0xE132;;
+let _ARM64_SYSREG_VSTTBR_EL2 = 0xE130;;
+let _ARM64_SYSREG_CNTHVS_TVAL_EL2 = 0xE720;;
+let _ARM64_SYSREG_CNTHVS_CVAL_EL2 = 0xE722;;
+let _ARM64_SYSREG_CNTHVS_CTL_EL2 = 0xE721;;
+let _ARM64_SYSREG_CNTHPS_TVAL_EL2 = 0xE728;;
+let _ARM64_SYSREG_CNTHPS_CVAL_EL2 = 0xE72A;;
+let _ARM64_SYSREG_CNTHPS_CTL_EL2 = 0xE729;;
+let _ARM64_SYSREG_SDER32_EL2 = 0xE099;;
+let _ARM64_SYSREG_ERXPFGCTL_EL1 = 0xC2A5;;
+let _ARM64_SYSREG_ERXPFGCDN_EL1 = 0xC2A6;;
+let _ARM64_SYSREG_ERXTS_EL1 = 0xC2AF;;
+let _ARM64_SYSREG_ERXMISC2_EL1 = 0xC2AA;;
+let _ARM64_SYSREG_ERXMISC3_EL1 = 0xC2AB;;
+let _ARM64_SYSREG_ERXPFGF_EL1 = 0xC2A4;;
+let _ARM64_SYSREG_MPAM0_EL1 = 0xC529;;
+let _ARM64_SYSREG_MPAM1_EL1 = 0xC528;;
+let _ARM64_SYSREG_MPAM2_EL2 = 0xE528;;
+let _ARM64_SYSREG_MPAM3_EL3 = 0xF528;;
+let _ARM64_SYSREG_MPAM1_EL12 = 0xED28;;
+let _ARM64_SYSREG_MPAMHCR_EL2 = 0xE520;;
+let _ARM64_SYSREG_MPAMVPMV_EL2 = 0xE521;;
+let _ARM64_SYSREG_MPAMVPM0_EL2 = 0xE530;;
+let _ARM64_SYSREG_MPAMVPM1_EL2 = 0xE531;;
+let _ARM64_SYSREG_MPAMVPM2_EL2 = 0xE532;;
+let _ARM64_SYSREG_MPAMVPM3_EL2 = 0xE533;;
+let _ARM64_SYSREG_MPAMVPM4_EL2 = 0xE534;;
+let _ARM64_SYSREG_MPAMVPM5_EL2 = 0xE535;;
+let _ARM64_SYSREG_MPAMVPM6_EL2 = 0xE536;;
+let _ARM64_SYSREG_MPAMVPM7_EL2 = 0xE537;;
+let _ARM64_SYSREG_MPAMIDR_EL1 = 0xC524;;
+let _ARM64_SYSREG_AMCR_EL0 = 0xDE90;;
+let _ARM64_SYSREG_AMCFGR_EL0 = 0xDE91;;
+let _ARM64_SYSREG_AMCGCR_EL0 = 0xDE92;;
+let _ARM64_SYSREG_AMUSERENR_EL0 = 0xDE93;;
+let _ARM64_SYSREG_AMCNTENCLR0_EL0 = 0xDE94;;
+let _ARM64_SYSREG_AMCNTENSET0_EL0 = 0xDE95;;
+let _ARM64_SYSREG_AMEVCNTR00_EL0 = 0xDEA0;;
+let _ARM64_SYSREG_AMEVCNTR01_EL0 = 0xDEA1;;
+let _ARM64_SYSREG_AMEVCNTR02_EL0 = 0xDEA2;;
+let _ARM64_SYSREG_AMEVCNTR03_EL0 = 0xDEA3;;
+let _ARM64_SYSREG_AMEVTYPER00_EL0 = 0xDEB0;;
+let _ARM64_SYSREG_AMEVTYPER01_EL0 = 0xDEB1;;
+let _ARM64_SYSREG_AMEVTYPER02_EL0 = 0xDEB2;;
+let _ARM64_SYSREG_AMEVTYPER03_EL0 = 0xDEB3;;
+let _ARM64_SYSREG_AMCNTENCLR1_EL0 = 0xDE98;;
+let _ARM64_SYSREG_AMCNTENSET1_EL0 = 0xDE99;;
+let _ARM64_SYSREG_AMEVCNTR10_EL0 = 0xDEE0;;
+let _ARM64_SYSREG_AMEVCNTR11_EL0 = 0xDEE1;;
+let _ARM64_SYSREG_AMEVCNTR12_EL0 = 0xDEE2;;
+let _ARM64_SYSREG_AMEVCNTR13_EL0 = 0xDEE3;;
+let _ARM64_SYSREG_AMEVCNTR14_EL0 = 0xDEE4;;
+let _ARM64_SYSREG_AMEVCNTR15_EL0 = 0xDEE5;;
+let _ARM64_SYSREG_AMEVCNTR16_EL0 = 0xDEE6;;
+let _ARM64_SYSREG_AMEVCNTR17_EL0 = 0xDEE7;;
+let _ARM64_SYSREG_AMEVCNTR18_EL0 = 0xDEE8;;
+let _ARM64_SYSREG_AMEVCNTR19_EL0 = 0xDEE9;;
+let _ARM64_SYSREG_AMEVCNTR110_EL0 = 0xDEEA;;
+let _ARM64_SYSREG_AMEVCNTR111_EL0 = 0xDEEB;;
+let _ARM64_SYSREG_AMEVCNTR112_EL0 = 0xDEEC;;
+let _ARM64_SYSREG_AMEVCNTR113_EL0 = 0xDEED;;
+let _ARM64_SYSREG_AMEVCNTR114_EL0 = 0xDEEE;;
+let _ARM64_SYSREG_AMEVCNTR115_EL0 = 0xDEEF;;
+let _ARM64_SYSREG_AMEVTYPER10_EL0 = 0xDEF0;;
+let _ARM64_SYSREG_AMEVTYPER11_EL0 = 0xDEF1;;
+let _ARM64_SYSREG_AMEVTYPER12_EL0 = 0xDEF2;;
+let _ARM64_SYSREG_AMEVTYPER13_EL0 = 0xDEF3;;
+let _ARM64_SYSREG_AMEVTYPER14_EL0 = 0xDEF4;;
+let _ARM64_SYSREG_AMEVTYPER15_EL0 = 0xDEF5;;
+let _ARM64_SYSREG_AMEVTYPER16_EL0 = 0xDEF6;;
+let _ARM64_SYSREG_AMEVTYPER17_EL0 = 0xDEF7;;
+let _ARM64_SYSREG_AMEVTYPER18_EL0 = 0xDEF8;;
+let _ARM64_SYSREG_AMEVTYPER19_EL0 = 0xDEF9;;
+let _ARM64_SYSREG_AMEVTYPER110_EL0 = 0xDEFA;;
+let _ARM64_SYSREG_AMEVTYPER111_EL0 = 0xDEFB;;
+let _ARM64_SYSREG_AMEVTYPER112_EL0 = 0xDEFC;;
+let _ARM64_SYSREG_AMEVTYPER113_EL0 = 0xDEFD;;
+let _ARM64_SYSREG_AMEVTYPER114_EL0 = 0xDEFE;;
+let _ARM64_SYSREG_AMEVTYPER115_EL0 = 0xDEFF;;
+let _ARM64_SYSREG_TRFCR_EL1 = 0xC091;;
+let _ARM64_SYSREG_TRFCR_EL2 = 0xE091;;
+let _ARM64_SYSREG_TRFCR_EL12 = 0xE891;;
+let _ARM64_SYSREG_DIT = 0xDA15;;
+let _ARM64_SYSREG_VNCR_EL2 = 0xE110;;
+let _ARM64_SYSREG_ZCR_EL1 = 0xC090;;
+let _ARM64_SYSREG_ZCR_EL2 = 0xE090;;
+let _ARM64_SYSREG_ZCR_EL3 = 0xF090;;
+let _ARM64_SYSREG_ZCR_EL12 = 0xE890;;
+let _ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90;;
+
+let _ARM64_PSTATE_INVALID = 0;;
+let _ARM64_PSTATE_SPSEL = 0x05;;
+let _ARM64_PSTATE_DAIFSET = 0x1e;;
+let _ARM64_PSTATE_DAIFCLR = 0x1f;;
+let _ARM64_PSTATE_PAN = 0x4;;
+let _ARM64_PSTATE_UAO = 0x3;;
+let _ARM64_PSTATE_DIT = 0x1a;;
+
+let _ARM64_VAS_INVALID = 0;;
+let _ARM64_VAS_16B = 1;;
+let _ARM64_VAS_8B = 2;;
+let _ARM64_VAS_4B = 3;;
+let _ARM64_VAS_1B = 4;;
+let _ARM64_VAS_8H = 5;;
+let _ARM64_VAS_4H = 6;;
+let _ARM64_VAS_2H = 7;;
+let _ARM64_VAS_1H = 8;;
+let _ARM64_VAS_4S = 9;;
+let _ARM64_VAS_2S = 10;;
+let _ARM64_VAS_1S = 11;;
+let _ARM64_VAS_2D = 12;;
+let _ARM64_VAS_1D = 13;;
+let _ARM64_VAS_1Q = 14;;
+
+let _ARM64_BARRIER_INVALID = 0;;
+let _ARM64_BARRIER_OSHLD = 0x1;;
+let _ARM64_BARRIER_OSHST = 0x2;;
+let _ARM64_BARRIER_OSH = 0x3;;
+let _ARM64_BARRIER_NSHLD = 0x5;;
+let _ARM64_BARRIER_NSHST = 0x6;;
+let _ARM64_BARRIER_NSH = 0x7;;
+let _ARM64_BARRIER_ISHLD = 0x9;;
+let _ARM64_BARRIER_ISHST = 0xa;;
+let _ARM64_BARRIER_ISH = 0xb;;
+let _ARM64_BARRIER_LD = 0xd;;
+let _ARM64_BARRIER_ST = 0xe;;
+let _ARM64_BARRIER_SY = 0xf;;
+
+let _ARM64_OP_INVALID = 0;;
+let _ARM64_OP_REG = 1;;
+let _ARM64_OP_IMM = 2;;
+let _ARM64_OP_MEM = 3;;
+let _ARM64_OP_FP = 4;;
+let _ARM64_OP_CIMM = 64;;
+let _ARM64_OP_REG_MRS = 65;;
+let _ARM64_OP_REG_MSR = 66;;
+let _ARM64_OP_PSTATE = 67;;
+let _ARM64_OP_SYS = 68;;
+let _ARM64_OP_PREFETCH = 69;;
+let _ARM64_OP_BARRIER = 70;;
+
+let _ARM64_TLBI_INVALID = 0;;
+let _ARM64_TLBI_IPAS2E1IS = 1;;
+let _ARM64_TLBI_IPAS2LE1IS = 2;;
+let _ARM64_TLBI_VMALLE1IS = 3;;
+let _ARM64_TLBI_ALLE2IS = 4;;
+let _ARM64_TLBI_ALLE3IS = 5;;
+let _ARM64_TLBI_VAE1IS = 6;;
+let _ARM64_TLBI_VAE2IS = 7;;
+let _ARM64_TLBI_VAE3IS = 8;;
+let _ARM64_TLBI_ASIDE1IS = 9;;
+let _ARM64_TLBI_VAAE1IS = 10;;
+let _ARM64_TLBI_ALLE1IS = 11;;
+let _ARM64_TLBI_VALE1IS = 12;;
+let _ARM64_TLBI_VALE2IS = 13;;
+let _ARM64_TLBI_VALE3IS = 14;;
+let _ARM64_TLBI_VMALLS12E1IS = 15;;
+let _ARM64_TLBI_VAALE1IS = 16;;
+let _ARM64_TLBI_IPAS2E1 = 17;;
+let _ARM64_TLBI_IPAS2LE1 = 18;;
+let _ARM64_TLBI_VMALLE1 = 19;;
+let _ARM64_TLBI_ALLE2 = 20;;
+let _ARM64_TLBI_ALLE3 = 21;;
+let _ARM64_TLBI_VAE1 = 22;;
+let _ARM64_TLBI_VAE2 = 23;;
+let _ARM64_TLBI_VAE3 = 24;;
+let _ARM64_TLBI_ASIDE1 = 25;;
+let _ARM64_TLBI_VAAE1 = 26;;
+let _ARM64_TLBI_ALLE1 = 27;;
+let _ARM64_TLBI_VALE1 = 28;;
+let _ARM64_TLBI_VALE2 = 29;;
+let _ARM64_TLBI_VALE3 = 30;;
+let _ARM64_TLBI_VMALLS12E1 = 31;;
+let _ARM64_TLBI_VAALE1 = 32;;
+let _ARM64_TLBI_VMALLE1OS = 33;;
+let _ARM64_TLBI_VAE1OS = 34;;
+let _ARM64_TLBI_ASIDE1OS = 35;;
+let _ARM64_TLBI_VAAE1OS = 36;;
+let _ARM64_TLBI_VALE1OS = 37;;
+let _ARM64_TLBI_VAALE1OS = 38;;
+let _ARM64_TLBI_IPAS2E1OS = 39;;
+let _ARM64_TLBI_IPAS2LE1OS = 40;;
+let _ARM64_TLBI_VAE2OS = 41;;
+let _ARM64_TLBI_VALE2OS = 42;;
+let _ARM64_TLBI_VMALLS12E1OS = 43;;
+let _ARM64_TLBI_VAE3OS = 44;;
+let _ARM64_TLBI_VALE3OS = 45;;
+let _ARM64_TLBI_ALLE2OS = 46;;
+let _ARM64_TLBI_ALLE1OS = 47;;
+let _ARM64_TLBI_ALLE3OS = 48;;
+let _ARM64_TLBI_RVAE1 = 49;;
+let _ARM64_TLBI_RVAAE1 = 50;;
+let _ARM64_TLBI_RVALE1 = 51;;
+let _ARM64_TLBI_RVAALE1 = 52;;
+let _ARM64_TLBI_RVAE1IS = 53;;
+let _ARM64_TLBI_RVAAE1IS = 54;;
+let _ARM64_TLBI_RVALE1IS = 55;;
+let _ARM64_TLBI_RVAALE1IS = 56;;
+let _ARM64_TLBI_RVAE1OS = 57;;
+let _ARM64_TLBI_RVAAE1OS = 58;;
+let _ARM64_TLBI_RVALE1OS = 59;;
+let _ARM64_TLBI_RVAALE1OS = 60;;
+let _ARM64_TLBI_RIPAS2E1IS = 61;;
+let _ARM64_TLBI_RIPAS2LE1IS = 62;;
+let _ARM64_TLBI_RIPAS2E1 = 63;;
+let _ARM64_TLBI_RIPAS2LE1 = 64;;
+let _ARM64_TLBI_RIPAS2E1OS = 65;;
+let _ARM64_TLBI_RIPAS2LE1OS = 66;;
+let _ARM64_TLBI_RVAE2 = 67;;
+let _ARM64_TLBI_RVALE2 = 68;;
+let _ARM64_TLBI_RVAE2IS = 69;;
+let _ARM64_TLBI_RVALE2IS = 70;;
+let _ARM64_TLBI_RVAE2OS = 71;;
+let _ARM64_TLBI_RVALE2OS = 72;;
+let _ARM64_TLBI_RVAE3 = 73;;
+let _ARM64_TLBI_RVALE3 = 74;;
+let _ARM64_TLBI_RVAE3IS = 75;;
+let _ARM64_TLBI_RVALE3IS = 76;;
+let _ARM64_TLBI_RVAE3OS = 77;;
+let _ARM64_TLBI_RVALE3OS = 78;;
+let _ARM64_AT_S1E1R = 79;;
+let _ARM64_AT_S1E2R = 80;;
+let _ARM64_AT_S1E3R = 81;;
+let _ARM64_AT_S1E1W = 82;;
+let _ARM64_AT_S1E2W = 83;;
+let _ARM64_AT_S1E3W = 84;;
+let _ARM64_AT_S1E0R = 85;;
+let _ARM64_AT_S1E0W = 86;;
+let _ARM64_AT_S12E1R = 87;;
+let _ARM64_AT_S12E1W = 88;;
+let _ARM64_AT_S12E0R = 89;;
+let _ARM64_AT_S12E0W = 90;;
+let _ARM64_AT_S1E1RP = 91;;
+let _ARM64_AT_S1E1WP = 92;;
+
+let _ARM64_DC_INVALID = 0;;
+let _ARM64_DC_ZVA = 1;;
+let _ARM64_DC_IVAC = 2;;
+let _ARM64_DC_ISW = 3;;
+let _ARM64_DC_CVAC = 4;;
+let _ARM64_DC_CSW = 5;;
+let _ARM64_DC_CVAU = 6;;
+let _ARM64_DC_CIVAC = 7;;
+let _ARM64_DC_CISW = 8;;
+let _ARM64_DC_CVAP = 9;;
+
+let _ARM64_IC_INVALID = 0;;
+let _ARM64_IC_IALLUIS = 1;;
+let _ARM64_IC_IALLU = 2;;
+let _ARM64_IC_IVAU = 3;;
+
+let _ARM64_PRFM_INVALID = 0;;
+let _ARM64_PRFM_PLDL1KEEP = 0x00+1;;
+let _ARM64_PRFM_PLDL1STRM = 0x01+1;;
+let _ARM64_PRFM_PLDL2KEEP = 0x02+1;;
+let _ARM64_PRFM_PLDL2STRM = 0x03+1;;
+let _ARM64_PRFM_PLDL3KEEP = 0x04+1;;
+let _ARM64_PRFM_PLDL3STRM = 0x05+1;;
+let _ARM64_PRFM_PLIL1KEEP = 0x08+1;;
+let _ARM64_PRFM_PLIL1STRM = 0x09+1;;
+let _ARM64_PRFM_PLIL2KEEP = 0x0a+1;;
+let _ARM64_PRFM_PLIL2STRM = 0x0b+1;;
+let _ARM64_PRFM_PLIL3KEEP = 0x0c+1;;
+let _ARM64_PRFM_PLIL3STRM = 0x0d+1;;
+let _ARM64_PRFM_PSTL1KEEP = 0x10+1;;
+let _ARM64_PRFM_PSTL1STRM = 0x11+1;;
+let _ARM64_PRFM_PSTL2KEEP = 0x12+1;;
+let _ARM64_PRFM_PSTL2STRM = 0x13+1;;
+let _ARM64_PRFM_PSTL3KEEP = 0x14+1;;
+let _ARM64_PRFM_PSTL3STRM = 0x15+1;;
+
+let _ARM64_REG_INVALID = 0;;
+let _ARM64_REG_FFR = 1;;
+let _ARM64_REG_FP = 2;;
+let _ARM64_REG_LR = 3;;
+let _ARM64_REG_NZCV = 4;;
+let _ARM64_REG_SP = 5;;
+let _ARM64_REG_WSP = 6;;
+let _ARM64_REG_WZR = 7;;
+let _ARM64_REG_XZR = 8;;
+let _ARM64_REG_B0 = 9;;
+let _ARM64_REG_B1 = 10;;
+let _ARM64_REG_B2 = 11;;
+let _ARM64_REG_B3 = 12;;
+let _ARM64_REG_B4 = 13;;
+let _ARM64_REG_B5 = 14;;
+let _ARM64_REG_B6 = 15;;
+let _ARM64_REG_B7 = 16;;
+let _ARM64_REG_B8 = 17;;
+let _ARM64_REG_B9 = 18;;
+let _ARM64_REG_B10 = 19;;
+let _ARM64_REG_B11 = 20;;
+let _ARM64_REG_B12 = 21;;
+let _ARM64_REG_B13 = 22;;
+let _ARM64_REG_B14 = 23;;
+let _ARM64_REG_B15 = 24;;
+let _ARM64_REG_B16 = 25;;
+let _ARM64_REG_B17 = 26;;
+let _ARM64_REG_B18 = 27;;
+let _ARM64_REG_B19 = 28;;
+let _ARM64_REG_B20 = 29;;
+let _ARM64_REG_B21 = 30;;
+let _ARM64_REG_B22 = 31;;
+let _ARM64_REG_B23 = 32;;
+let _ARM64_REG_B24 = 33;;
+let _ARM64_REG_B25 = 34;;
+let _ARM64_REG_B26 = 35;;
+let _ARM64_REG_B27 = 36;;
+let _ARM64_REG_B28 = 37;;
+let _ARM64_REG_B29 = 38;;
+let _ARM64_REG_B30 = 39;;
+let _ARM64_REG_B31 = 40;;
+let _ARM64_REG_D0 = 41;;
+let _ARM64_REG_D1 = 42;;
+let _ARM64_REG_D2 = 43;;
+let _ARM64_REG_D3 = 44;;
+let _ARM64_REG_D4 = 45;;
+let _ARM64_REG_D5 = 46;;
+let _ARM64_REG_D6 = 47;;
+let _ARM64_REG_D7 = 48;;
+let _ARM64_REG_D8 = 49;;
+let _ARM64_REG_D9 = 50;;
+let _ARM64_REG_D10 = 51;;
+let _ARM64_REG_D11 = 52;;
+let _ARM64_REG_D12 = 53;;
+let _ARM64_REG_D13 = 54;;
+let _ARM64_REG_D14 = 55;;
+let _ARM64_REG_D15 = 56;;
+let _ARM64_REG_D16 = 57;;
+let _ARM64_REG_D17 = 58;;
+let _ARM64_REG_D18 = 59;;
+let _ARM64_REG_D19 = 60;;
+let _ARM64_REG_D20 = 61;;
+let _ARM64_REG_D21 = 62;;
+let _ARM64_REG_D22 = 63;;
+let _ARM64_REG_D23 = 64;;
+let _ARM64_REG_D24 = 65;;
+let _ARM64_REG_D25 = 66;;
+let _ARM64_REG_D26 = 67;;
+let _ARM64_REG_D27 = 68;;
+let _ARM64_REG_D28 = 69;;
+let _ARM64_REG_D29 = 70;;
+let _ARM64_REG_D30 = 71;;
+let _ARM64_REG_D31 = 72;;
+let _ARM64_REG_H0 = 73;;
+let _ARM64_REG_H1 = 74;;
+let _ARM64_REG_H2 = 75;;
+let _ARM64_REG_H3 = 76;;
+let _ARM64_REG_H4 = 77;;
+let _ARM64_REG_H5 = 78;;
+let _ARM64_REG_H6 = 79;;
+let _ARM64_REG_H7 = 80;;
+let _ARM64_REG_H8 = 81;;
+let _ARM64_REG_H9 = 82;;
+let _ARM64_REG_H10 = 83;;
+let _ARM64_REG_H11 = 84;;
+let _ARM64_REG_H12 = 85;;
+let _ARM64_REG_H13 = 86;;
+let _ARM64_REG_H14 = 87;;
+let _ARM64_REG_H15 = 88;;
+let _ARM64_REG_H16 = 89;;
+let _ARM64_REG_H17 = 90;;
+let _ARM64_REG_H18 = 91;;
+let _ARM64_REG_H19 = 92;;
+let _ARM64_REG_H20 = 93;;
+let _ARM64_REG_H21 = 94;;
+let _ARM64_REG_H22 = 95;;
+let _ARM64_REG_H23 = 96;;
+let _ARM64_REG_H24 = 97;;
+let _ARM64_REG_H25 = 98;;
+let _ARM64_REG_H26 = 99;;
+let _ARM64_REG_H27 = 100;;
+let _ARM64_REG_H28 = 101;;
+let _ARM64_REG_H29 = 102;;
+let _ARM64_REG_H30 = 103;;
+let _ARM64_REG_H31 = 104;;
+let _ARM64_REG_P0 = 105;;
+let _ARM64_REG_P1 = 106;;
+let _ARM64_REG_P2 = 107;;
+let _ARM64_REG_P3 = 108;;
+let _ARM64_REG_P4 = 109;;
+let _ARM64_REG_P5 = 110;;
+let _ARM64_REG_P6 = 111;;
+let _ARM64_REG_P7 = 112;;
+let _ARM64_REG_P8 = 113;;
+let _ARM64_REG_P9 = 114;;
+let _ARM64_REG_P10 = 115;;
+let _ARM64_REG_P11 = 116;;
+let _ARM64_REG_P12 = 117;;
+let _ARM64_REG_P13 = 118;;
+let _ARM64_REG_P14 = 119;;
+let _ARM64_REG_P15 = 120;;
+let _ARM64_REG_Q0 = 121;;
+let _ARM64_REG_Q1 = 122;;
+let _ARM64_REG_Q2 = 123;;
+let _ARM64_REG_Q3 = 124;;
+let _ARM64_REG_Q4 = 125;;
+let _ARM64_REG_Q5 = 126;;
+let _ARM64_REG_Q6 = 127;;
+let _ARM64_REG_Q7 = 128;;
+let _ARM64_REG_Q8 = 129;;
+let _ARM64_REG_Q9 = 130;;
+let _ARM64_REG_Q10 = 131;;
+let _ARM64_REG_Q11 = 132;;
+let _ARM64_REG_Q12 = 133;;
+let _ARM64_REG_Q13 = 134;;
+let _ARM64_REG_Q14 = 135;;
+let _ARM64_REG_Q15 = 136;;
+let _ARM64_REG_Q16 = 137;;
+let _ARM64_REG_Q17 = 138;;
+let _ARM64_REG_Q18 = 139;;
+let _ARM64_REG_Q19 = 140;;
+let _ARM64_REG_Q20 = 141;;
+let _ARM64_REG_Q21 = 142;;
+let _ARM64_REG_Q22 = 143;;
+let _ARM64_REG_Q23 = 144;;
+let _ARM64_REG_Q24 = 145;;
+let _ARM64_REG_Q25 = 146;;
+let _ARM64_REG_Q26 = 147;;
+let _ARM64_REG_Q27 = 148;;
+let _ARM64_REG_Q28 = 149;;
+let _ARM64_REG_Q29 = 150;;
+let _ARM64_REG_Q30 = 151;;
+let _ARM64_REG_Q31 = 152;;
+let _ARM64_REG_S0 = 153;;
+let _ARM64_REG_S1 = 154;;
+let _ARM64_REG_S2 = 155;;
+let _ARM64_REG_S3 = 156;;
+let _ARM64_REG_S4 = 157;;
+let _ARM64_REG_S5 = 158;;
+let _ARM64_REG_S6 = 159;;
+let _ARM64_REG_S7 = 160;;
+let _ARM64_REG_S8 = 161;;
+let _ARM64_REG_S9 = 162;;
+let _ARM64_REG_S10 = 163;;
+let _ARM64_REG_S11 = 164;;
+let _ARM64_REG_S12 = 165;;
+let _ARM64_REG_S13 = 166;;
+let _ARM64_REG_S14 = 167;;
+let _ARM64_REG_S15 = 168;;
+let _ARM64_REG_S16 = 169;;
+let _ARM64_REG_S17 = 170;;
+let _ARM64_REG_S18 = 171;;
+let _ARM64_REG_S19 = 172;;
+let _ARM64_REG_S20 = 173;;
+let _ARM64_REG_S21 = 174;;
+let _ARM64_REG_S22 = 175;;
+let _ARM64_REG_S23 = 176;;
+let _ARM64_REG_S24 = 177;;
+let _ARM64_REG_S25 = 178;;
+let _ARM64_REG_S26 = 179;;
+let _ARM64_REG_S27 = 180;;
+let _ARM64_REG_S28 = 181;;
+let _ARM64_REG_S29 = 182;;
+let _ARM64_REG_S30 = 183;;
+let _ARM64_REG_S31 = 184;;
+let _ARM64_REG_W0 = 185;;
+let _ARM64_REG_W1 = 186;;
+let _ARM64_REG_W2 = 187;;
+let _ARM64_REG_W3 = 188;;
+let _ARM64_REG_W4 = 189;;
+let _ARM64_REG_W5 = 190;;
+let _ARM64_REG_W6 = 191;;
+let _ARM64_REG_W7 = 192;;
+let _ARM64_REG_W8 = 193;;
+let _ARM64_REG_W9 = 194;;
+let _ARM64_REG_W10 = 195;;
+let _ARM64_REG_W11 = 196;;
+let _ARM64_REG_W12 = 197;;
+let _ARM64_REG_W13 = 198;;
+let _ARM64_REG_W14 = 199;;
+let _ARM64_REG_W15 = 200;;
+let _ARM64_REG_W16 = 201;;
+let _ARM64_REG_W17 = 202;;
+let _ARM64_REG_W18 = 203;;
+let _ARM64_REG_W19 = 204;;
+let _ARM64_REG_W20 = 205;;
+let _ARM64_REG_W21 = 206;;
+let _ARM64_REG_W22 = 207;;
+let _ARM64_REG_W23 = 208;;
+let _ARM64_REG_W24 = 209;;
+let _ARM64_REG_W25 = 210;;
+let _ARM64_REG_W26 = 211;;
+let _ARM64_REG_W27 = 212;;
+let _ARM64_REG_W28 = 213;;
+let _ARM64_REG_W29 = 214;;
+let _ARM64_REG_W30 = 215;;
+let _ARM64_REG_X0 = 216;;
+let _ARM64_REG_X1 = 217;;
+let _ARM64_REG_X2 = 218;;
+let _ARM64_REG_X3 = 219;;
+let _ARM64_REG_X4 = 220;;
+let _ARM64_REG_X5 = 221;;
+let _ARM64_REG_X6 = 222;;
+let _ARM64_REG_X7 = 223;;
+let _ARM64_REG_X8 = 224;;
+let _ARM64_REG_X9 = 225;;
+let _ARM64_REG_X10 = 226;;
+let _ARM64_REG_X11 = 227;;
+let _ARM64_REG_X12 = 228;;
+let _ARM64_REG_X13 = 229;;
+let _ARM64_REG_X14 = 230;;
+let _ARM64_REG_X15 = 231;;
+let _ARM64_REG_X16 = 232;;
+let _ARM64_REG_X17 = 233;;
+let _ARM64_REG_X18 = 234;;
+let _ARM64_REG_X19 = 235;;
+let _ARM64_REG_X20 = 236;;
+let _ARM64_REG_X21 = 237;;
+let _ARM64_REG_X22 = 238;;
+let _ARM64_REG_X23 = 239;;
+let _ARM64_REG_X24 = 240;;
+let _ARM64_REG_X25 = 241;;
+let _ARM64_REG_X26 = 242;;
+let _ARM64_REG_X27 = 243;;
+let _ARM64_REG_X28 = 244;;
+let _ARM64_REG_Z0 = 245;;
+let _ARM64_REG_Z1 = 246;;
+let _ARM64_REG_Z2 = 247;;
+let _ARM64_REG_Z3 = 248;;
+let _ARM64_REG_Z4 = 249;;
+let _ARM64_REG_Z5 = 250;;
+let _ARM64_REG_Z6 = 251;;
+let _ARM64_REG_Z7 = 252;;
+let _ARM64_REG_Z8 = 253;;
+let _ARM64_REG_Z9 = 254;;
+let _ARM64_REG_Z10 = 255;;
+let _ARM64_REG_Z11 = 256;;
+let _ARM64_REG_Z12 = 257;;
+let _ARM64_REG_Z13 = 258;;
+let _ARM64_REG_Z14 = 259;;
+let _ARM64_REG_Z15 = 260;;
+let _ARM64_REG_Z16 = 261;;
+let _ARM64_REG_Z17 = 262;;
+let _ARM64_REG_Z18 = 263;;
+let _ARM64_REG_Z19 = 264;;
+let _ARM64_REG_Z20 = 265;;
+let _ARM64_REG_Z21 = 266;;
+let _ARM64_REG_Z22 = 267;;
+let _ARM64_REG_Z23 = 268;;
+let _ARM64_REG_Z24 = 269;;
+let _ARM64_REG_Z25 = 270;;
+let _ARM64_REG_Z26 = 271;;
+let _ARM64_REG_Z27 = 272;;
+let _ARM64_REG_Z28 = 273;;
+let _ARM64_REG_Z29 = 274;;
+let _ARM64_REG_Z30 = 275;;
+let _ARM64_REG_Z31 = 276;;
+let _ARM64_REG_V0 = 277;;
+let _ARM64_REG_V1 = 278;;
+let _ARM64_REG_V2 = 279;;
+let _ARM64_REG_V3 = 280;;
+let _ARM64_REG_V4 = 281;;
+let _ARM64_REG_V5 = 282;;
+let _ARM64_REG_V6 = 283;;
+let _ARM64_REG_V7 = 284;;
+let _ARM64_REG_V8 = 285;;
+let _ARM64_REG_V9 = 286;;
+let _ARM64_REG_V10 = 287;;
+let _ARM64_REG_V11 = 288;;
+let _ARM64_REG_V12 = 289;;
+let _ARM64_REG_V13 = 290;;
+let _ARM64_REG_V14 = 291;;
+let _ARM64_REG_V15 = 292;;
+let _ARM64_REG_V16 = 293;;
+let _ARM64_REG_V17 = 294;;
+let _ARM64_REG_V18 = 295;;
+let _ARM64_REG_V19 = 296;;
+let _ARM64_REG_V20 = 297;;
+let _ARM64_REG_V21 = 298;;
+let _ARM64_REG_V22 = 299;;
+let _ARM64_REG_V23 = 300;;
+let _ARM64_REG_V24 = 301;;
+let _ARM64_REG_V25 = 302;;
+let _ARM64_REG_V26 = 303;;
+let _ARM64_REG_V27 = 304;;
+let _ARM64_REG_V28 = 305;;
+let _ARM64_REG_V29 = 306;;
+let _ARM64_REG_V30 = 307;;
+let _ARM64_REG_V31 = 308;;
+let _ARM64_REG_ENDING = 309;;
+let _ARM64_REG_IP0 = _ARM64_REG_X16;;
+let _ARM64_REG_IP1 = _ARM64_REG_X17;;
+let _ARM64_REG_X29 = _ARM64_REG_FP;;
+let _ARM64_REG_X30 = _ARM64_REG_LR;;
+
+let _ARM64_INS_INVALID = 0;;
+let _ARM64_INS_ABS = 1;;
+let _ARM64_INS_ADC = 2;;
+let _ARM64_INS_ADCS = 3;;
+let _ARM64_INS_ADD = 4;;
+let _ARM64_INS_ADDHN = 5;;
+let _ARM64_INS_ADDHN2 = 6;;
+let _ARM64_INS_ADDP = 7;;
+let _ARM64_INS_ADDPL = 8;;
+let _ARM64_INS_ADDS = 9;;
+let _ARM64_INS_ADDV = 10;;
+let _ARM64_INS_ADDVL = 11;;
+let _ARM64_INS_ADR = 12;;
+let _ARM64_INS_ADRP = 13;;
+let _ARM64_INS_AESD = 14;;
+let _ARM64_INS_AESE = 15;;
+let _ARM64_INS_AESIMC = 16;;
+let _ARM64_INS_AESMC = 17;;
+let _ARM64_INS_AND = 18;;
+let _ARM64_INS_ANDS = 19;;
+let _ARM64_INS_ANDV = 20;;
+let _ARM64_INS_ASR = 21;;
+let _ARM64_INS_ASRD = 22;;
+let _ARM64_INS_ASRR = 23;;
+let _ARM64_INS_ASRV = 24;;
+let _ARM64_INS_AUTDA = 25;;
+let _ARM64_INS_AUTDB = 26;;
+let _ARM64_INS_AUTDZA = 27;;
+let _ARM64_INS_AUTDZB = 28;;
+let _ARM64_INS_AUTIA = 29;;
+let _ARM64_INS_AUTIA1716 = 30;;
+let _ARM64_INS_AUTIASP = 31;;
+let _ARM64_INS_AUTIAZ = 32;;
+let _ARM64_INS_AUTIB = 33;;
+let _ARM64_INS_AUTIB1716 = 34;;
+let _ARM64_INS_AUTIBSP = 35;;
+let _ARM64_INS_AUTIBZ = 36;;
+let _ARM64_INS_AUTIZA = 37;;
+let _ARM64_INS_AUTIZB = 38;;
+let _ARM64_INS_B = 39;;
+let _ARM64_INS_BCAX = 40;;
+let _ARM64_INS_BFM = 41;;
+let _ARM64_INS_BIC = 42;;
+let _ARM64_INS_BICS = 43;;
+let _ARM64_INS_BIF = 44;;
+let _ARM64_INS_BIT = 45;;
+let _ARM64_INS_BL = 46;;
+let _ARM64_INS_BLR = 47;;
+let _ARM64_INS_BLRAA = 48;;
+let _ARM64_INS_BLRAAZ = 49;;
+let _ARM64_INS_BLRAB = 50;;
+let _ARM64_INS_BLRABZ = 51;;
+let _ARM64_INS_BR = 52;;
+let _ARM64_INS_BRAA = 53;;
+let _ARM64_INS_BRAAZ = 54;;
+let _ARM64_INS_BRAB = 55;;
+let _ARM64_INS_BRABZ = 56;;
+let _ARM64_INS_BRK = 57;;
+let _ARM64_INS_BRKA = 58;;
+let _ARM64_INS_BRKAS = 59;;
+let _ARM64_INS_BRKB = 60;;
+let _ARM64_INS_BRKBS = 61;;
+let _ARM64_INS_BRKN = 62;;
+let _ARM64_INS_BRKNS = 63;;
+let _ARM64_INS_BRKPA = 64;;
+let _ARM64_INS_BRKPAS = 65;;
+let _ARM64_INS_BRKPB = 66;;
+let _ARM64_INS_BRKPBS = 67;;
+let _ARM64_INS_BSL = 68;;
+let _ARM64_INS_CAS = 69;;
+let _ARM64_INS_CASA = 70;;
+let _ARM64_INS_CASAB = 71;;
+let _ARM64_INS_CASAH = 72;;
+let _ARM64_INS_CASAL = 73;;
+let _ARM64_INS_CASALB = 74;;
+let _ARM64_INS_CASALH = 75;;
+let _ARM64_INS_CASB = 76;;
+let _ARM64_INS_CASH = 77;;
+let _ARM64_INS_CASL = 78;;
+let _ARM64_INS_CASLB = 79;;
+let _ARM64_INS_CASLH = 80;;
+let _ARM64_INS_CASP = 81;;
+let _ARM64_INS_CASPA = 82;;
+let _ARM64_INS_CASPAL = 83;;
+let _ARM64_INS_CASPL = 84;;
+let _ARM64_INS_CBNZ = 85;;
+let _ARM64_INS_CBZ = 86;;
+let _ARM64_INS_CCMN = 87;;
+let _ARM64_INS_CCMP = 88;;
+let _ARM64_INS_CFINV = 89;;
+let _ARM64_INS_CINC = 90;;
+let _ARM64_INS_CINV = 91;;
+let _ARM64_INS_CLASTA = 92;;
+let _ARM64_INS_CLASTB = 93;;
+let _ARM64_INS_CLREX = 94;;
+let _ARM64_INS_CLS = 95;;
+let _ARM64_INS_CLZ = 96;;
+let _ARM64_INS_CMEQ = 97;;
+let _ARM64_INS_CMGE = 98;;
+let _ARM64_INS_CMGT = 99;;
+let _ARM64_INS_CMHI = 100;;
+let _ARM64_INS_CMHS = 101;;
+let _ARM64_INS_CMLE = 102;;
+let _ARM64_INS_CMLO = 103;;
+let _ARM64_INS_CMLS = 104;;
+let _ARM64_INS_CMLT = 105;;
+let _ARM64_INS_CMN = 106;;
+let _ARM64_INS_CMP = 107;;
+let _ARM64_INS_CMPEQ = 108;;
+let _ARM64_INS_CMPGE = 109;;
+let _ARM64_INS_CMPGT = 110;;
+let _ARM64_INS_CMPHI = 111;;
+let _ARM64_INS_CMPHS = 112;;
+let _ARM64_INS_CMPLE = 113;;
+let _ARM64_INS_CMPLO = 114;;
+let _ARM64_INS_CMPLS = 115;;
+let _ARM64_INS_CMPLT = 116;;
+let _ARM64_INS_CMPNE = 117;;
+let _ARM64_INS_CMTST = 118;;
+let _ARM64_INS_CNEG = 119;;
+let _ARM64_INS_CNOT = 120;;
+let _ARM64_INS_CNT = 121;;
+let _ARM64_INS_CNTB = 122;;
+let _ARM64_INS_CNTD = 123;;
+let _ARM64_INS_CNTH = 124;;
+let _ARM64_INS_CNTP = 125;;
+let _ARM64_INS_CNTW = 126;;
+let _ARM64_INS_COMPACT = 127;;
+let _ARM64_INS_CPY = 128;;
+let _ARM64_INS_CRC32B = 129;;
+let _ARM64_INS_CRC32CB = 130;;
+let _ARM64_INS_CRC32CH = 131;;
+let _ARM64_INS_CRC32CW = 132;;
+let _ARM64_INS_CRC32CX = 133;;
+let _ARM64_INS_CRC32H = 134;;
+let _ARM64_INS_CRC32W = 135;;
+let _ARM64_INS_CRC32X = 136;;
+let _ARM64_INS_CSDB = 137;;
+let _ARM64_INS_CSEL = 138;;
+let _ARM64_INS_CSET = 139;;
+let _ARM64_INS_CSETM = 140;;
+let _ARM64_INS_CSINC = 141;;
+let _ARM64_INS_CSINV = 142;;
+let _ARM64_INS_CSNEG = 143;;
+let _ARM64_INS_CTERMEQ = 144;;
+let _ARM64_INS_CTERMNE = 145;;
+let _ARM64_INS_DCPS1 = 146;;
+let _ARM64_INS_DCPS2 = 147;;
+let _ARM64_INS_DCPS3 = 148;;
+let _ARM64_INS_DECB = 149;;
+let _ARM64_INS_DECD = 150;;
+let _ARM64_INS_DECH = 151;;
+let _ARM64_INS_DECP = 152;;
+let _ARM64_INS_DECW = 153;;
+let _ARM64_INS_DMB = 154;;
+let _ARM64_INS_DRPS = 155;;
+let _ARM64_INS_DSB = 156;;
+let _ARM64_INS_DUP = 157;;
+let _ARM64_INS_DUPM = 158;;
+let _ARM64_INS_EON = 159;;
+let _ARM64_INS_EOR = 160;;
+let _ARM64_INS_EOR3 = 161;;
+let _ARM64_INS_EORS = 162;;
+let _ARM64_INS_EORV = 163;;
+let _ARM64_INS_ERET = 164;;
+let _ARM64_INS_ERETAA = 165;;
+let _ARM64_INS_ERETAB = 166;;
+let _ARM64_INS_ESB = 167;;
+let _ARM64_INS_EXT = 168;;
+let _ARM64_INS_EXTR = 169;;
+let _ARM64_INS_FABD = 170;;
+let _ARM64_INS_FABS = 171;;
+let _ARM64_INS_FACGE = 172;;
+let _ARM64_INS_FACGT = 173;;
+let _ARM64_INS_FACLE = 174;;
+let _ARM64_INS_FACLT = 175;;
+let _ARM64_INS_FADD = 176;;
+let _ARM64_INS_FADDA = 177;;
+let _ARM64_INS_FADDP = 178;;
+let _ARM64_INS_FADDV = 179;;
+let _ARM64_INS_FCADD = 180;;
+let _ARM64_INS_FCCMP = 181;;
+let _ARM64_INS_FCCMPE = 182;;
+let _ARM64_INS_FCMEQ = 183;;
+let _ARM64_INS_FCMGE = 184;;
+let _ARM64_INS_FCMGT = 185;;
+let _ARM64_INS_FCMLA = 186;;
+let _ARM64_INS_FCMLE = 187;;
+let _ARM64_INS_FCMLT = 188;;
+let _ARM64_INS_FCMNE = 189;;
+let _ARM64_INS_FCMP = 190;;
+let _ARM64_INS_FCMPE = 191;;
+let _ARM64_INS_FCMUO = 192;;
+let _ARM64_INS_FCPY = 193;;
+let _ARM64_INS_FCSEL = 194;;
+let _ARM64_INS_FCVT = 195;;
+let _ARM64_INS_FCVTAS = 196;;
+let _ARM64_INS_FCVTAU = 197;;
+let _ARM64_INS_FCVTL = 198;;
+let _ARM64_INS_FCVTL2 = 199;;
+let _ARM64_INS_FCVTMS = 200;;
+let _ARM64_INS_FCVTMU = 201;;
+let _ARM64_INS_FCVTN = 202;;
+let _ARM64_INS_FCVTN2 = 203;;
+let _ARM64_INS_FCVTNS = 204;;
+let _ARM64_INS_FCVTNU = 205;;
+let _ARM64_INS_FCVTPS = 206;;
+let _ARM64_INS_FCVTPU = 207;;
+let _ARM64_INS_FCVTXN = 208;;
+let _ARM64_INS_FCVTXN2 = 209;;
+let _ARM64_INS_FCVTZS = 210;;
+let _ARM64_INS_FCVTZU = 211;;
+let _ARM64_INS_FDIV = 212;;
+let _ARM64_INS_FDIVR = 213;;
+let _ARM64_INS_FDUP = 214;;
+let _ARM64_INS_FEXPA = 215;;
+let _ARM64_INS_FJCVTZS = 216;;
+let _ARM64_INS_FMAD = 217;;
+let _ARM64_INS_FMADD = 218;;
+let _ARM64_INS_FMAX = 219;;
+let _ARM64_INS_FMAXNM = 220;;
+let _ARM64_INS_FMAXNMP = 221;;
+let _ARM64_INS_FMAXNMV = 222;;
+let _ARM64_INS_FMAXP = 223;;
+let _ARM64_INS_FMAXV = 224;;
+let _ARM64_INS_FMIN = 225;;
+let _ARM64_INS_FMINNM = 226;;
+let _ARM64_INS_FMINNMP = 227;;
+let _ARM64_INS_FMINNMV = 228;;
+let _ARM64_INS_FMINP = 229;;
+let _ARM64_INS_FMINV = 230;;
+let _ARM64_INS_FMLA = 231;;
+let _ARM64_INS_FMLS = 232;;
+let _ARM64_INS_FMOV = 233;;
+let _ARM64_INS_FMSB = 234;;
+let _ARM64_INS_FMSUB = 235;;
+let _ARM64_INS_FMUL = 236;;
+let _ARM64_INS_FMULX = 237;;
+let _ARM64_INS_FNEG = 238;;
+let _ARM64_INS_FNMAD = 239;;
+let _ARM64_INS_FNMADD = 240;;
+let _ARM64_INS_FNMLA = 241;;
+let _ARM64_INS_FNMLS = 242;;
+let _ARM64_INS_FNMSB = 243;;
+let _ARM64_INS_FNMSUB = 244;;
+let _ARM64_INS_FNMUL = 245;;
+let _ARM64_INS_FRECPE = 246;;
+let _ARM64_INS_FRECPS = 247;;
+let _ARM64_INS_FRECPX = 248;;
+let _ARM64_INS_FRINTA = 249;;
+let _ARM64_INS_FRINTI = 250;;
+let _ARM64_INS_FRINTM = 251;;
+let _ARM64_INS_FRINTN = 252;;
+let _ARM64_INS_FRINTP = 253;;
+let _ARM64_INS_FRINTX = 254;;
+let _ARM64_INS_FRINTZ = 255;;
+let _ARM64_INS_FRSQRTE = 256;;
+let _ARM64_INS_FRSQRTS = 257;;
+let _ARM64_INS_FSCALE = 258;;
+let _ARM64_INS_FSQRT = 259;;
+let _ARM64_INS_FSUB = 260;;
+let _ARM64_INS_FSUBR = 261;;
+let _ARM64_INS_FTMAD = 262;;
+let _ARM64_INS_FTSMUL = 263;;
+let _ARM64_INS_FTSSEL = 264;;
+let _ARM64_INS_HINT = 265;;
+let _ARM64_INS_HLT = 266;;
+let _ARM64_INS_HVC = 267;;
+let _ARM64_INS_INCB = 268;;
+let _ARM64_INS_INCD = 269;;
+let _ARM64_INS_INCH = 270;;
+let _ARM64_INS_INCP = 271;;
+let _ARM64_INS_INCW = 272;;
+let _ARM64_INS_INDEX = 273;;
+let _ARM64_INS_INS = 274;;
+let _ARM64_INS_INSR = 275;;
+let _ARM64_INS_ISB = 276;;
+let _ARM64_INS_LASTA = 277;;
+let _ARM64_INS_LASTB = 278;;
+let _ARM64_INS_LD1 = 279;;
+let _ARM64_INS_LD1B = 280;;
+let _ARM64_INS_LD1D = 281;;
+let _ARM64_INS_LD1H = 282;;
+let _ARM64_INS_LD1R = 283;;
+let _ARM64_INS_LD1RB = 284;;
+let _ARM64_INS_LD1RD = 285;;
+let _ARM64_INS_LD1RH = 286;;
+let _ARM64_INS_LD1RQB = 287;;
+let _ARM64_INS_LD1RQD = 288;;
+let _ARM64_INS_LD1RQH = 289;;
+let _ARM64_INS_LD1RQW = 290;;
+let _ARM64_INS_LD1RSB = 291;;
+let _ARM64_INS_LD1RSH = 292;;
+let _ARM64_INS_LD1RSW = 293;;
+let _ARM64_INS_LD1RW = 294;;
+let _ARM64_INS_LD1SB = 295;;
+let _ARM64_INS_LD1SH = 296;;
+let _ARM64_INS_LD1SW = 297;;
+let _ARM64_INS_LD1W = 298;;
+let _ARM64_INS_LD2 = 299;;
+let _ARM64_INS_LD2B = 300;;
+let _ARM64_INS_LD2D = 301;;
+let _ARM64_INS_LD2H = 302;;
+let _ARM64_INS_LD2R = 303;;
+let _ARM64_INS_LD2W = 304;;
+let _ARM64_INS_LD3 = 305;;
+let _ARM64_INS_LD3B = 306;;
+let _ARM64_INS_LD3D = 307;;
+let _ARM64_INS_LD3H = 308;;
+let _ARM64_INS_LD3R = 309;;
+let _ARM64_INS_LD3W = 310;;
+let _ARM64_INS_LD4 = 311;;
+let _ARM64_INS_LD4B = 312;;
+let _ARM64_INS_LD4D = 313;;
+let _ARM64_INS_LD4H = 314;;
+let _ARM64_INS_LD4R = 315;;
+let _ARM64_INS_LD4W = 316;;
+let _ARM64_INS_LDADD = 317;;
+let _ARM64_INS_LDADDA = 318;;
+let _ARM64_INS_LDADDAB = 319;;
+let _ARM64_INS_LDADDAH = 320;;
+let _ARM64_INS_LDADDAL = 321;;
+let _ARM64_INS_LDADDALB = 322;;
+let _ARM64_INS_LDADDALH = 323;;
+let _ARM64_INS_LDADDB = 324;;
+let _ARM64_INS_LDADDH = 325;;
+let _ARM64_INS_LDADDL = 326;;
+let _ARM64_INS_LDADDLB = 327;;
+let _ARM64_INS_LDADDLH = 328;;
+let _ARM64_INS_LDAPR = 329;;
+let _ARM64_INS_LDAPRB = 330;;
+let _ARM64_INS_LDAPRH = 331;;
+let _ARM64_INS_LDAPUR = 332;;
+let _ARM64_INS_LDAPURB = 333;;
+let _ARM64_INS_LDAPURH = 334;;
+let _ARM64_INS_LDAPURSB = 335;;
+let _ARM64_INS_LDAPURSH = 336;;
+let _ARM64_INS_LDAPURSW = 337;;
+let _ARM64_INS_LDAR = 338;;
+let _ARM64_INS_LDARB = 339;;
+let _ARM64_INS_LDARH = 340;;
+let _ARM64_INS_LDAXP = 341;;
+let _ARM64_INS_LDAXR = 342;;
+let _ARM64_INS_LDAXRB = 343;;
+let _ARM64_INS_LDAXRH = 344;;
+let _ARM64_INS_LDCLR = 345;;
+let _ARM64_INS_LDCLRA = 346;;
+let _ARM64_INS_LDCLRAB = 347;;
+let _ARM64_INS_LDCLRAH = 348;;
+let _ARM64_INS_LDCLRAL = 349;;
+let _ARM64_INS_LDCLRALB = 350;;
+let _ARM64_INS_LDCLRALH = 351;;
+let _ARM64_INS_LDCLRB = 352;;
+let _ARM64_INS_LDCLRH = 353;;
+let _ARM64_INS_LDCLRL = 354;;
+let _ARM64_INS_LDCLRLB = 355;;
+let _ARM64_INS_LDCLRLH = 356;;
+let _ARM64_INS_LDEOR = 357;;
+let _ARM64_INS_LDEORA = 358;;
+let _ARM64_INS_LDEORAB = 359;;
+let _ARM64_INS_LDEORAH = 360;;
+let _ARM64_INS_LDEORAL = 361;;
+let _ARM64_INS_LDEORALB = 362;;
+let _ARM64_INS_LDEORALH = 363;;
+let _ARM64_INS_LDEORB = 364;;
+let _ARM64_INS_LDEORH = 365;;
+let _ARM64_INS_LDEORL = 366;;
+let _ARM64_INS_LDEORLB = 367;;
+let _ARM64_INS_LDEORLH = 368;;
+let _ARM64_INS_LDFF1B = 369;;
+let _ARM64_INS_LDFF1D = 370;;
+let _ARM64_INS_LDFF1H = 371;;
+let _ARM64_INS_LDFF1SB = 372;;
+let _ARM64_INS_LDFF1SH = 373;;
+let _ARM64_INS_LDFF1SW = 374;;
+let _ARM64_INS_LDFF1W = 375;;
+let _ARM64_INS_LDLAR = 376;;
+let _ARM64_INS_LDLARB = 377;;
+let _ARM64_INS_LDLARH = 378;;
+let _ARM64_INS_LDNF1B = 379;;
+let _ARM64_INS_LDNF1D = 380;;
+let _ARM64_INS_LDNF1H = 381;;
+let _ARM64_INS_LDNF1SB = 382;;
+let _ARM64_INS_LDNF1SH = 383;;
+let _ARM64_INS_LDNF1SW = 384;;
+let _ARM64_INS_LDNF1W = 385;;
+let _ARM64_INS_LDNP = 386;;
+let _ARM64_INS_LDNT1B = 387;;
+let _ARM64_INS_LDNT1D = 388;;
+let _ARM64_INS_LDNT1H = 389;;
+let _ARM64_INS_LDNT1W = 390;;
+let _ARM64_INS_LDP = 391;;
+let _ARM64_INS_LDPSW = 392;;
+let _ARM64_INS_LDR = 393;;
+let _ARM64_INS_LDRAA = 394;;
+let _ARM64_INS_LDRAB = 395;;
+let _ARM64_INS_LDRB = 396;;
+let _ARM64_INS_LDRH = 397;;
+let _ARM64_INS_LDRSB = 398;;
+let _ARM64_INS_LDRSH = 399;;
+let _ARM64_INS_LDRSW = 400;;
+let _ARM64_INS_LDSET = 401;;
+let _ARM64_INS_LDSETA = 402;;
+let _ARM64_INS_LDSETAB = 403;;
+let _ARM64_INS_LDSETAH = 404;;
+let _ARM64_INS_LDSETAL = 405;;
+let _ARM64_INS_LDSETALB = 406;;
+let _ARM64_INS_LDSETALH = 407;;
+let _ARM64_INS_LDSETB = 408;;
+let _ARM64_INS_LDSETH = 409;;
+let _ARM64_INS_LDSETL = 410;;
+let _ARM64_INS_LDSETLB = 411;;
+let _ARM64_INS_LDSETLH = 412;;
+let _ARM64_INS_LDSMAX = 413;;
+let _ARM64_INS_LDSMAXA = 414;;
+let _ARM64_INS_LDSMAXAB = 415;;
+let _ARM64_INS_LDSMAXAH = 416;;
+let _ARM64_INS_LDSMAXAL = 417;;
+let _ARM64_INS_LDSMAXALB = 418;;
+let _ARM64_INS_LDSMAXALH = 419;;
+let _ARM64_INS_LDSMAXB = 420;;
+let _ARM64_INS_LDSMAXH = 421;;
+let _ARM64_INS_LDSMAXL = 422;;
+let _ARM64_INS_LDSMAXLB = 423;;
+let _ARM64_INS_LDSMAXLH = 424;;
+let _ARM64_INS_LDSMIN = 425;;
+let _ARM64_INS_LDSMINA = 426;;
+let _ARM64_INS_LDSMINAB = 427;;
+let _ARM64_INS_LDSMINAH = 428;;
+let _ARM64_INS_LDSMINAL = 429;;
+let _ARM64_INS_LDSMINALB = 430;;
+let _ARM64_INS_LDSMINALH = 431;;
+let _ARM64_INS_LDSMINB = 432;;
+let _ARM64_INS_LDSMINH = 433;;
+let _ARM64_INS_LDSMINL = 434;;
+let _ARM64_INS_LDSMINLB = 435;;
+let _ARM64_INS_LDSMINLH = 436;;
+let _ARM64_INS_LDTR = 437;;
+let _ARM64_INS_LDTRB = 438;;
+let _ARM64_INS_LDTRH = 439;;
+let _ARM64_INS_LDTRSB = 440;;
+let _ARM64_INS_LDTRSH = 441;;
+let _ARM64_INS_LDTRSW = 442;;
+let _ARM64_INS_LDUMAX = 443;;
+let _ARM64_INS_LDUMAXA = 444;;
+let _ARM64_INS_LDUMAXAB = 445;;
+let _ARM64_INS_LDUMAXAH = 446;;
+let _ARM64_INS_LDUMAXAL = 447;;
+let _ARM64_INS_LDUMAXALB = 448;;
+let _ARM64_INS_LDUMAXALH = 449;;
+let _ARM64_INS_LDUMAXB = 450;;
+let _ARM64_INS_LDUMAXH = 451;;
+let _ARM64_INS_LDUMAXL = 452;;
+let _ARM64_INS_LDUMAXLB = 453;;
+let _ARM64_INS_LDUMAXLH = 454;;
+let _ARM64_INS_LDUMIN = 455;;
+let _ARM64_INS_LDUMINA = 456;;
+let _ARM64_INS_LDUMINAB = 457;;
+let _ARM64_INS_LDUMINAH = 458;;
+let _ARM64_INS_LDUMINAL = 459;;
+let _ARM64_INS_LDUMINALB = 460;;
+let _ARM64_INS_LDUMINALH = 461;;
+let _ARM64_INS_LDUMINB = 462;;
+let _ARM64_INS_LDUMINH = 463;;
+let _ARM64_INS_LDUMINL = 464;;
+let _ARM64_INS_LDUMINLB = 465;;
+let _ARM64_INS_LDUMINLH = 466;;
+let _ARM64_INS_LDUR = 467;;
+let _ARM64_INS_LDURB = 468;;
+let _ARM64_INS_LDURH = 469;;
+let _ARM64_INS_LDURSB = 470;;
+let _ARM64_INS_LDURSH = 471;;
+let _ARM64_INS_LDURSW = 472;;
+let _ARM64_INS_LDXP = 473;;
+let _ARM64_INS_LDXR = 474;;
+let _ARM64_INS_LDXRB = 475;;
+let _ARM64_INS_LDXRH = 476;;
+let _ARM64_INS_LSL = 477;;
+let _ARM64_INS_LSLR = 478;;
+let _ARM64_INS_LSLV = 479;;
+let _ARM64_INS_LSR = 480;;
+let _ARM64_INS_LSRR = 481;;
+let _ARM64_INS_LSRV = 482;;
+let _ARM64_INS_MAD = 483;;
+let _ARM64_INS_MADD = 484;;
+let _ARM64_INS_MLA = 485;;
+let _ARM64_INS_MLS = 486;;
+let _ARM64_INS_MNEG = 487;;
+let _ARM64_INS_MOV = 488;;
+let _ARM64_INS_MOVI = 489;;
+let _ARM64_INS_MOVK = 490;;
+let _ARM64_INS_MOVN = 491;;
+let _ARM64_INS_MOVPRFX = 492;;
+let _ARM64_INS_MOVS = 493;;
+let _ARM64_INS_MOVZ = 494;;
+let _ARM64_INS_MRS = 495;;
+let _ARM64_INS_MSB = 496;;
+let _ARM64_INS_MSR = 497;;
+let _ARM64_INS_MSUB = 498;;
+let _ARM64_INS_MUL = 499;;
+let _ARM64_INS_MVN = 500;;
+let _ARM64_INS_MVNI = 501;;
+let _ARM64_INS_NAND = 502;;
+let _ARM64_INS_NANDS = 503;;
+let _ARM64_INS_NEG = 504;;
+let _ARM64_INS_NEGS = 505;;
+let _ARM64_INS_NGC = 506;;
+let _ARM64_INS_NGCS = 507;;
+let _ARM64_INS_NOP = 508;;
+let _ARM64_INS_NOR = 509;;
+let _ARM64_INS_NORS = 510;;
+let _ARM64_INS_NOT = 511;;
+let _ARM64_INS_NOTS = 512;;
+let _ARM64_INS_ORN = 513;;
+let _ARM64_INS_ORNS = 514;;
+let _ARM64_INS_ORR = 515;;
+let _ARM64_INS_ORRS = 516;;
+let _ARM64_INS_ORV = 517;;
+let _ARM64_INS_PACDA = 518;;
+let _ARM64_INS_PACDB = 519;;
+let _ARM64_INS_PACDZA = 520;;
+let _ARM64_INS_PACDZB = 521;;
+let _ARM64_INS_PACGA = 522;;
+let _ARM64_INS_PACIA = 523;;
+let _ARM64_INS_PACIA1716 = 524;;
+let _ARM64_INS_PACIASP = 525;;
+let _ARM64_INS_PACIAZ = 526;;
+let _ARM64_INS_PACIB = 527;;
+let _ARM64_INS_PACIB1716 = 528;;
+let _ARM64_INS_PACIBSP = 529;;
+let _ARM64_INS_PACIBZ = 530;;
+let _ARM64_INS_PACIZA = 531;;
+let _ARM64_INS_PACIZB = 532;;
+let _ARM64_INS_PFALSE = 533;;
+let _ARM64_INS_PFIRST = 534;;
+let _ARM64_INS_PMUL = 535;;
+let _ARM64_INS_PMULL = 536;;
+let _ARM64_INS_PMULL2 = 537;;
+let _ARM64_INS_PNEXT = 538;;
+let _ARM64_INS_PRFB = 539;;
+let _ARM64_INS_PRFD = 540;;
+let _ARM64_INS_PRFH = 541;;
+let _ARM64_INS_PRFM = 542;;
+let _ARM64_INS_PRFUM = 543;;
+let _ARM64_INS_PRFW = 544;;
+let _ARM64_INS_PSB = 545;;
+let _ARM64_INS_PTEST = 546;;
+let _ARM64_INS_PTRUE = 547;;
+let _ARM64_INS_PTRUES = 548;;
+let _ARM64_INS_PUNPKHI = 549;;
+let _ARM64_INS_PUNPKLO = 550;;
+let _ARM64_INS_RADDHN = 551;;
+let _ARM64_INS_RADDHN2 = 552;;
+let _ARM64_INS_RAX1 = 553;;
+let _ARM64_INS_RBIT = 554;;
+let _ARM64_INS_RDFFR = 555;;
+let _ARM64_INS_RDFFRS = 556;;
+let _ARM64_INS_RDVL = 557;;
+let _ARM64_INS_RET = 558;;
+let _ARM64_INS_RETAA = 559;;
+let _ARM64_INS_RETAB = 560;;
+let _ARM64_INS_REV = 561;;
+let _ARM64_INS_REV16 = 562;;
+let _ARM64_INS_REV32 = 563;;
+let _ARM64_INS_REV64 = 564;;
+let _ARM64_INS_REVB = 565;;
+let _ARM64_INS_REVH = 566;;
+let _ARM64_INS_REVW = 567;;
+let _ARM64_INS_RMIF = 568;;
+let _ARM64_INS_ROR = 569;;
+let _ARM64_INS_RORV = 570;;
+let _ARM64_INS_RSHRN = 571;;
+let _ARM64_INS_RSHRN2 = 572;;
+let _ARM64_INS_RSUBHN = 573;;
+let _ARM64_INS_RSUBHN2 = 574;;
+let _ARM64_INS_SABA = 575;;
+let _ARM64_INS_SABAL = 576;;
+let _ARM64_INS_SABAL2 = 577;;
+let _ARM64_INS_SABD = 578;;
+let _ARM64_INS_SABDL = 579;;
+let _ARM64_INS_SABDL2 = 580;;
+let _ARM64_INS_SADALP = 581;;
+let _ARM64_INS_SADDL = 582;;
+let _ARM64_INS_SADDL2 = 583;;
+let _ARM64_INS_SADDLP = 584;;
+let _ARM64_INS_SADDLV = 585;;
+let _ARM64_INS_SADDV = 586;;
+let _ARM64_INS_SADDW = 587;;
+let _ARM64_INS_SADDW2 = 588;;
+let _ARM64_INS_SBC = 589;;
+let _ARM64_INS_SBCS = 590;;
+let _ARM64_INS_SBFM = 591;;
+let _ARM64_INS_SCVTF = 592;;
+let _ARM64_INS_SDIV = 593;;
+let _ARM64_INS_SDIVR = 594;;
+let _ARM64_INS_SDOT = 595;;
+let _ARM64_INS_SEL = 596;;
+let _ARM64_INS_SETF16 = 597;;
+let _ARM64_INS_SETF8 = 598;;
+let _ARM64_INS_SETFFR = 599;;
+let _ARM64_INS_SEV = 600;;
+let _ARM64_INS_SEVL = 601;;
+let _ARM64_INS_SHA1C = 602;;
+let _ARM64_INS_SHA1H = 603;;
+let _ARM64_INS_SHA1M = 604;;
+let _ARM64_INS_SHA1P = 605;;
+let _ARM64_INS_SHA1SU0 = 606;;
+let _ARM64_INS_SHA1SU1 = 607;;
+let _ARM64_INS_SHA256H = 608;;
+let _ARM64_INS_SHA256H2 = 609;;
+let _ARM64_INS_SHA256SU0 = 610;;
+let _ARM64_INS_SHA256SU1 = 611;;
+let _ARM64_INS_SHA512H = 612;;
+let _ARM64_INS_SHA512H2 = 613;;
+let _ARM64_INS_SHA512SU0 = 614;;
+let _ARM64_INS_SHA512SU1 = 615;;
+let _ARM64_INS_SHADD = 616;;
+let _ARM64_INS_SHL = 617;;
+let _ARM64_INS_SHLL = 618;;
+let _ARM64_INS_SHLL2 = 619;;
+let _ARM64_INS_SHRN = 620;;
+let _ARM64_INS_SHRN2 = 621;;
+let _ARM64_INS_SHSUB = 622;;
+let _ARM64_INS_SLI = 623;;
+let _ARM64_INS_SM3PARTW1 = 624;;
+let _ARM64_INS_SM3PARTW2 = 625;;
+let _ARM64_INS_SM3SS1 = 626;;
+let _ARM64_INS_SM3TT1A = 627;;
+let _ARM64_INS_SM3TT1B = 628;;
+let _ARM64_INS_SM3TT2A = 629;;
+let _ARM64_INS_SM3TT2B = 630;;
+let _ARM64_INS_SM4E = 631;;
+let _ARM64_INS_SM4EKEY = 632;;
+let _ARM64_INS_SMADDL = 633;;
+let _ARM64_INS_SMAX = 634;;
+let _ARM64_INS_SMAXP = 635;;
+let _ARM64_INS_SMAXV = 636;;
+let _ARM64_INS_SMC = 637;;
+let _ARM64_INS_SMIN = 638;;
+let _ARM64_INS_SMINP = 639;;
+let _ARM64_INS_SMINV = 640;;
+let _ARM64_INS_SMLAL = 641;;
+let _ARM64_INS_SMLAL2 = 642;;
+let _ARM64_INS_SMLSL = 643;;
+let _ARM64_INS_SMLSL2 = 644;;
+let _ARM64_INS_SMNEGL = 645;;
+let _ARM64_INS_SMOV = 646;;
+let _ARM64_INS_SMSUBL = 647;;
+let _ARM64_INS_SMULH = 648;;
+let _ARM64_INS_SMULL = 649;;
+let _ARM64_INS_SMULL2 = 650;;
+let _ARM64_INS_SPLICE = 651;;
+let _ARM64_INS_SQABS = 652;;
+let _ARM64_INS_SQADD = 653;;
+let _ARM64_INS_SQDECB = 654;;
+let _ARM64_INS_SQDECD = 655;;
+let _ARM64_INS_SQDECH = 656;;
+let _ARM64_INS_SQDECP = 657;;
+let _ARM64_INS_SQDECW = 658;;
+let _ARM64_INS_SQDMLAL = 659;;
+let _ARM64_INS_SQDMLAL2 = 660;;
+let _ARM64_INS_SQDMLSL = 661;;
+let _ARM64_INS_SQDMLSL2 = 662;;
+let _ARM64_INS_SQDMULH = 663;;
+let _ARM64_INS_SQDMULL = 664;;
+let _ARM64_INS_SQDMULL2 = 665;;
+let _ARM64_INS_SQINCB = 666;;
+let _ARM64_INS_SQINCD = 667;;
+let _ARM64_INS_SQINCH = 668;;
+let _ARM64_INS_SQINCP = 669;;
+let _ARM64_INS_SQINCW = 670;;
+let _ARM64_INS_SQNEG = 671;;
+let _ARM64_INS_SQRDMLAH = 672;;
+let _ARM64_INS_SQRDMLSH = 673;;
+let _ARM64_INS_SQRDMULH = 674;;
+let _ARM64_INS_SQRSHL = 675;;
+let _ARM64_INS_SQRSHRN = 676;;
+let _ARM64_INS_SQRSHRN2 = 677;;
+let _ARM64_INS_SQRSHRUN = 678;;
+let _ARM64_INS_SQRSHRUN2 = 679;;
+let _ARM64_INS_SQSHL = 680;;
+let _ARM64_INS_SQSHLU = 681;;
+let _ARM64_INS_SQSHRN = 682;;
+let _ARM64_INS_SQSHRN2 = 683;;
+let _ARM64_INS_SQSHRUN = 684;;
+let _ARM64_INS_SQSHRUN2 = 685;;
+let _ARM64_INS_SQSUB = 686;;
+let _ARM64_INS_SQXTN = 687;;
+let _ARM64_INS_SQXTN2 = 688;;
+let _ARM64_INS_SQXTUN = 689;;
+let _ARM64_INS_SQXTUN2 = 690;;
+let _ARM64_INS_SRHADD = 691;;
+let _ARM64_INS_SRI = 692;;
+let _ARM64_INS_SRSHL = 693;;
+let _ARM64_INS_SRSHR = 694;;
+let _ARM64_INS_SRSRA = 695;;
+let _ARM64_INS_SSHL = 696;;
+let _ARM64_INS_SSHLL = 697;;
+let _ARM64_INS_SSHLL2 = 698;;
+let _ARM64_INS_SSHR = 699;;
+let _ARM64_INS_SSRA = 700;;
+let _ARM64_INS_SSUBL = 701;;
+let _ARM64_INS_SSUBL2 = 702;;
+let _ARM64_INS_SSUBW = 703;;
+let _ARM64_INS_SSUBW2 = 704;;
+let _ARM64_INS_ST1 = 705;;
+let _ARM64_INS_ST1B = 706;;
+let _ARM64_INS_ST1D = 707;;
+let _ARM64_INS_ST1H = 708;;
+let _ARM64_INS_ST1W = 709;;
+let _ARM64_INS_ST2 = 710;;
+let _ARM64_INS_ST2B = 711;;
+let _ARM64_INS_ST2D = 712;;
+let _ARM64_INS_ST2H = 713;;
+let _ARM64_INS_ST2W = 714;;
+let _ARM64_INS_ST3 = 715;;
+let _ARM64_INS_ST3B = 716;;
+let _ARM64_INS_ST3D = 717;;
+let _ARM64_INS_ST3H = 718;;
+let _ARM64_INS_ST3W = 719;;
+let _ARM64_INS_ST4 = 720;;
+let _ARM64_INS_ST4B = 721;;
+let _ARM64_INS_ST4D = 722;;
+let _ARM64_INS_ST4H = 723;;
+let _ARM64_INS_ST4W = 724;;
+let _ARM64_INS_STADD = 725;;
+let _ARM64_INS_STADDB = 726;;
+let _ARM64_INS_STADDH = 727;;
+let _ARM64_INS_STADDL = 728;;
+let _ARM64_INS_STADDLB = 729;;
+let _ARM64_INS_STADDLH = 730;;
+let _ARM64_INS_STCLR = 731;;
+let _ARM64_INS_STCLRB = 732;;
+let _ARM64_INS_STCLRH = 733;;
+let _ARM64_INS_STCLRL = 734;;
+let _ARM64_INS_STCLRLB = 735;;
+let _ARM64_INS_STCLRLH = 736;;
+let _ARM64_INS_STEOR = 737;;
+let _ARM64_INS_STEORB = 738;;
+let _ARM64_INS_STEORH = 739;;
+let _ARM64_INS_STEORL = 740;;
+let _ARM64_INS_STEORLB = 741;;
+let _ARM64_INS_STEORLH = 742;;
+let _ARM64_INS_STLLR = 743;;
+let _ARM64_INS_STLLRB = 744;;
+let _ARM64_INS_STLLRH = 745;;
+let _ARM64_INS_STLR = 746;;
+let _ARM64_INS_STLRB = 747;;
+let _ARM64_INS_STLRH = 748;;
+let _ARM64_INS_STLUR = 749;;
+let _ARM64_INS_STLURB = 750;;
+let _ARM64_INS_STLURH = 751;;
+let _ARM64_INS_STLXP = 752;;
+let _ARM64_INS_STLXR = 753;;
+let _ARM64_INS_STLXRB = 754;;
+let _ARM64_INS_STLXRH = 755;;
+let _ARM64_INS_STNP = 756;;
+let _ARM64_INS_STNT1B = 757;;
+let _ARM64_INS_STNT1D = 758;;
+let _ARM64_INS_STNT1H = 759;;
+let _ARM64_INS_STNT1W = 760;;
+let _ARM64_INS_STP = 761;;
+let _ARM64_INS_STR = 762;;
+let _ARM64_INS_STRB = 763;;
+let _ARM64_INS_STRH = 764;;
+let _ARM64_INS_STSET = 765;;
+let _ARM64_INS_STSETB = 766;;
+let _ARM64_INS_STSETH = 767;;
+let _ARM64_INS_STSETL = 768;;
+let _ARM64_INS_STSETLB = 769;;
+let _ARM64_INS_STSETLH = 770;;
+let _ARM64_INS_STSMAX = 771;;
+let _ARM64_INS_STSMAXB = 772;;
+let _ARM64_INS_STSMAXH = 773;;
+let _ARM64_INS_STSMAXL = 774;;
+let _ARM64_INS_STSMAXLB = 775;;
+let _ARM64_INS_STSMAXLH = 776;;
+let _ARM64_INS_STSMIN = 777;;
+let _ARM64_INS_STSMINB = 778;;
+let _ARM64_INS_STSMINH = 779;;
+let _ARM64_INS_STSMINL = 780;;
+let _ARM64_INS_STSMINLB = 781;;
+let _ARM64_INS_STSMINLH = 782;;
+let _ARM64_INS_STTR = 783;;
+let _ARM64_INS_STTRB = 784;;
+let _ARM64_INS_STTRH = 785;;
+let _ARM64_INS_STUMAX = 786;;
+let _ARM64_INS_STUMAXB = 787;;
+let _ARM64_INS_STUMAXH = 788;;
+let _ARM64_INS_STUMAXL = 789;;
+let _ARM64_INS_STUMAXLB = 790;;
+let _ARM64_INS_STUMAXLH = 791;;
+let _ARM64_INS_STUMIN = 792;;
+let _ARM64_INS_STUMINB = 793;;
+let _ARM64_INS_STUMINH = 794;;
+let _ARM64_INS_STUMINL = 795;;
+let _ARM64_INS_STUMINLB = 796;;
+let _ARM64_INS_STUMINLH = 797;;
+let _ARM64_INS_STUR = 798;;
+let _ARM64_INS_STURB = 799;;
+let _ARM64_INS_STURH = 800;;
+let _ARM64_INS_STXP = 801;;
+let _ARM64_INS_STXR = 802;;
+let _ARM64_INS_STXRB = 803;;
+let _ARM64_INS_STXRH = 804;;
+let _ARM64_INS_SUB = 805;;
+let _ARM64_INS_SUBHN = 806;;
+let _ARM64_INS_SUBHN2 = 807;;
+let _ARM64_INS_SUBR = 808;;
+let _ARM64_INS_SUBS = 809;;
+let _ARM64_INS_SUNPKHI = 810;;
+let _ARM64_INS_SUNPKLO = 811;;
+let _ARM64_INS_SUQADD = 812;;
+let _ARM64_INS_SVC = 813;;
+let _ARM64_INS_SWP = 814;;
+let _ARM64_INS_SWPA = 815;;
+let _ARM64_INS_SWPAB = 816;;
+let _ARM64_INS_SWPAH = 817;;
+let _ARM64_INS_SWPAL = 818;;
+let _ARM64_INS_SWPALB = 819;;
+let _ARM64_INS_SWPALH = 820;;
+let _ARM64_INS_SWPB = 821;;
+let _ARM64_INS_SWPH = 822;;
+let _ARM64_INS_SWPL = 823;;
+let _ARM64_INS_SWPLB = 824;;
+let _ARM64_INS_SWPLH = 825;;
+let _ARM64_INS_SXTB = 826;;
+let _ARM64_INS_SXTH = 827;;
+let _ARM64_INS_SXTL = 828;;
+let _ARM64_INS_SXTL2 = 829;;
+let _ARM64_INS_SXTW = 830;;
+let _ARM64_INS_SYS = 831;;
+let _ARM64_INS_SYSL = 832;;
+let _ARM64_INS_TBL = 833;;
+let _ARM64_INS_TBNZ = 834;;
+let _ARM64_INS_TBX = 835;;
+let _ARM64_INS_TBZ = 836;;
+let _ARM64_INS_TRN1 = 837;;
+let _ARM64_INS_TRN2 = 838;;
+let _ARM64_INS_TSB = 839;;
+let _ARM64_INS_TST = 840;;
+let _ARM64_INS_UABA = 841;;
+let _ARM64_INS_UABAL = 842;;
+let _ARM64_INS_UABAL2 = 843;;
+let _ARM64_INS_UABD = 844;;
+let _ARM64_INS_UABDL = 845;;
+let _ARM64_INS_UABDL2 = 846;;
+let _ARM64_INS_UADALP = 847;;
+let _ARM64_INS_UADDL = 848;;
+let _ARM64_INS_UADDL2 = 849;;
+let _ARM64_INS_UADDLP = 850;;
+let _ARM64_INS_UADDLV = 851;;
+let _ARM64_INS_UADDV = 852;;
+let _ARM64_INS_UADDW = 853;;
+let _ARM64_INS_UADDW2 = 854;;
+let _ARM64_INS_UBFM = 855;;
+let _ARM64_INS_UCVTF = 856;;
+let _ARM64_INS_UDIV = 857;;
+let _ARM64_INS_UDIVR = 858;;
+let _ARM64_INS_UDOT = 859;;
+let _ARM64_INS_UHADD = 860;;
+let _ARM64_INS_UHSUB = 861;;
+let _ARM64_INS_UMADDL = 862;;
+let _ARM64_INS_UMAX = 863;;
+let _ARM64_INS_UMAXP = 864;;
+let _ARM64_INS_UMAXV = 865;;
+let _ARM64_INS_UMIN = 866;;
+let _ARM64_INS_UMINP = 867;;
+let _ARM64_INS_UMINV = 868;;
+let _ARM64_INS_UMLAL = 869;;
+let _ARM64_INS_UMLAL2 = 870;;
+let _ARM64_INS_UMLSL = 871;;
+let _ARM64_INS_UMLSL2 = 872;;
+let _ARM64_INS_UMNEGL = 873;;
+let _ARM64_INS_UMOV = 874;;
+let _ARM64_INS_UMSUBL = 875;;
+let _ARM64_INS_UMULH = 876;;
+let _ARM64_INS_UMULL = 877;;
+let _ARM64_INS_UMULL2 = 878;;
+let _ARM64_INS_UQADD = 879;;
+let _ARM64_INS_UQDECB = 880;;
+let _ARM64_INS_UQDECD = 881;;
+let _ARM64_INS_UQDECH = 882;;
+let _ARM64_INS_UQDECP = 883;;
+let _ARM64_INS_UQDECW = 884;;
+let _ARM64_INS_UQINCB = 885;;
+let _ARM64_INS_UQINCD = 886;;
+let _ARM64_INS_UQINCH = 887;;
+let _ARM64_INS_UQINCP = 888;;
+let _ARM64_INS_UQINCW = 889;;
+let _ARM64_INS_UQRSHL = 890;;
+let _ARM64_INS_UQRSHRN = 891;;
+let _ARM64_INS_UQRSHRN2 = 892;;
+let _ARM64_INS_UQSHL = 893;;
+let _ARM64_INS_UQSHRN = 894;;
+let _ARM64_INS_UQSHRN2 = 895;;
+let _ARM64_INS_UQSUB = 896;;
+let _ARM64_INS_UQXTN = 897;;
+let _ARM64_INS_UQXTN2 = 898;;
+let _ARM64_INS_URECPE = 899;;
+let _ARM64_INS_URHADD = 900;;
+let _ARM64_INS_URSHL = 901;;
+let _ARM64_INS_URSHR = 902;;
+let _ARM64_INS_URSQRTE = 903;;
+let _ARM64_INS_URSRA = 904;;
+let _ARM64_INS_USHL = 905;;
+let _ARM64_INS_USHLL = 906;;
+let _ARM64_INS_USHLL2 = 907;;
+let _ARM64_INS_USHR = 908;;
+let _ARM64_INS_USQADD = 909;;
+let _ARM64_INS_USRA = 910;;
+let _ARM64_INS_USUBL = 911;;
+let _ARM64_INS_USUBL2 = 912;;
+let _ARM64_INS_USUBW = 913;;
+let _ARM64_INS_USUBW2 = 914;;
+let _ARM64_INS_UUNPKHI = 915;;
+let _ARM64_INS_UUNPKLO = 916;;
+let _ARM64_INS_UXTB = 917;;
+let _ARM64_INS_UXTH = 918;;
+let _ARM64_INS_UXTL = 919;;
+let _ARM64_INS_UXTL2 = 920;;
+let _ARM64_INS_UXTW = 921;;
+let _ARM64_INS_UZP1 = 922;;
+let _ARM64_INS_UZP2 = 923;;
+let _ARM64_INS_WFE = 924;;
+let _ARM64_INS_WFI = 925;;
+let _ARM64_INS_WHILELE = 926;;
+let _ARM64_INS_WHILELO = 927;;
+let _ARM64_INS_WHILELS = 928;;
+let _ARM64_INS_WHILELT = 929;;
+let _ARM64_INS_WRFFR = 930;;
+let _ARM64_INS_XAR = 931;;
+let _ARM64_INS_XPACD = 932;;
+let _ARM64_INS_XPACI = 933;;
+let _ARM64_INS_XPACLRI = 934;;
+let _ARM64_INS_XTN = 935;;
+let _ARM64_INS_XTN2 = 936;;
+let _ARM64_INS_YIELD = 937;;
+let _ARM64_INS_ZIP1 = 938;;
+let _ARM64_INS_ZIP2 = 939;;
+let _ARM64_INS_SBFIZ = 940;;
+let _ARM64_INS_UBFIZ = 941;;
+let _ARM64_INS_SBFX = 942;;
+let _ARM64_INS_UBFX = 943;;
+let _ARM64_INS_BFI = 944;;
+let _ARM64_INS_BFXIL = 945;;
+let _ARM64_INS_IC = 946;;
+let _ARM64_INS_DC = 947;;
+let _ARM64_INS_AT = 948;;
+let _ARM64_INS_TLBI = 949;;
+let _ARM64_INS_ENDING = 950;;
+
+let _ARM64_GRP_INVALID = 0;;
+let _ARM64_GRP_JUMP = 1;;
+let _ARM64_GRP_CALL = 2;;
+let _ARM64_GRP_RET = 3;;
+let _ARM64_GRP_INT = 4;;
+let _ARM64_GRP_PRIVILEGE = 6;;
+let _ARM64_GRP_BRANCH_RELATIVE = 7;;
+let _ARM64_GRP_CRYPTO = 128;;
+let _ARM64_GRP_FPARMV8 = 129;;
+let _ARM64_GRP_NEON = 130;;
+let _ARM64_GRP_CRC = 131;;
+let _ARM64_GRP_AES = 132;;
+let _ARM64_GRP_DOTPROD = 133;;
+let _ARM64_GRP_FULLFP16 = 134;;
+let _ARM64_GRP_LSE = 135;;
+let _ARM64_GRP_RCPC = 136;;
+let _ARM64_GRP_RDM = 137;;
+let _ARM64_GRP_SHA2 = 138;;
+let _ARM64_GRP_SHA3 = 139;;
+let _ARM64_GRP_SM4 = 140;;
+let _ARM64_GRP_SVE = 141;;
+let _ARM64_GRP_V8_1A = 142;;
+let _ARM64_GRP_V8_3A = 143;;
+let _ARM64_GRP_V8_4A = 144;;
+let _ARM64_GRP_ENDING = 145;;
diff --git a/capstone/bindings/ocaml/arm_const.ml b/capstone/bindings/ocaml/arm_const.ml
new file mode 100644
index 000000000..5b3972a09
--- /dev/null
+++ b/capstone/bindings/ocaml/arm_const.ml
@@ -0,0 +1,830 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.ml] *)
+
+let _ARM_SFT_INVALID = 0;;
+let _ARM_SFT_ASR = 1;;
+let _ARM_SFT_LSL = 2;;
+let _ARM_SFT_LSR = 3;;
+let _ARM_SFT_ROR = 4;;
+let _ARM_SFT_RRX = 5;;
+let _ARM_SFT_ASR_REG = 6;;
+let _ARM_SFT_LSL_REG = 7;;
+let _ARM_SFT_LSR_REG = 8;;
+let _ARM_SFT_ROR_REG = 9;;
+let _ARM_SFT_RRX_REG = 10;;
+
+let _ARM_CC_INVALID = 0;;
+let _ARM_CC_EQ = 1;;
+let _ARM_CC_NE = 2;;
+let _ARM_CC_HS = 3;;
+let _ARM_CC_LO = 4;;
+let _ARM_CC_MI = 5;;
+let _ARM_CC_PL = 6;;
+let _ARM_CC_VS = 7;;
+let _ARM_CC_VC = 8;;
+let _ARM_CC_HI = 9;;
+let _ARM_CC_LS = 10;;
+let _ARM_CC_GE = 11;;
+let _ARM_CC_LT = 12;;
+let _ARM_CC_GT = 13;;
+let _ARM_CC_LE = 14;;
+let _ARM_CC_AL = 15;;
+
+let _ARM_SYSREG_INVALID = 0;;
+let _ARM_SYSREG_SPSR_C = 1;;
+let _ARM_SYSREG_SPSR_X = 2;;
+let _ARM_SYSREG_SPSR_S = 4;;
+let _ARM_SYSREG_SPSR_F = 8;;
+let _ARM_SYSREG_CPSR_C = 16;;
+let _ARM_SYSREG_CPSR_X = 32;;
+let _ARM_SYSREG_CPSR_S = 64;;
+let _ARM_SYSREG_CPSR_F = 128;;
+let _ARM_SYSREG_APSR = 256;;
+let _ARM_SYSREG_APSR_G = 257;;
+let _ARM_SYSREG_APSR_NZCVQ = 258;;
+let _ARM_SYSREG_APSR_NZCVQG = 259;;
+let _ARM_SYSREG_IAPSR = 260;;
+let _ARM_SYSREG_IAPSR_G = 261;;
+let _ARM_SYSREG_IAPSR_NZCVQG = 262;;
+let _ARM_SYSREG_IAPSR_NZCVQ = 263;;
+let _ARM_SYSREG_EAPSR = 264;;
+let _ARM_SYSREG_EAPSR_G = 265;;
+let _ARM_SYSREG_EAPSR_NZCVQG = 266;;
+let _ARM_SYSREG_EAPSR_NZCVQ = 267;;
+let _ARM_SYSREG_XPSR = 268;;
+let _ARM_SYSREG_XPSR_G = 269;;
+let _ARM_SYSREG_XPSR_NZCVQG = 270;;
+let _ARM_SYSREG_XPSR_NZCVQ = 271;;
+let _ARM_SYSREG_IPSR = 272;;
+let _ARM_SYSREG_EPSR = 273;;
+let _ARM_SYSREG_IEPSR = 274;;
+let _ARM_SYSREG_MSP = 275;;
+let _ARM_SYSREG_PSP = 276;;
+let _ARM_SYSREG_PRIMASK = 277;;
+let _ARM_SYSREG_BASEPRI = 278;;
+let _ARM_SYSREG_BASEPRI_MAX = 279;;
+let _ARM_SYSREG_FAULTMASK = 280;;
+let _ARM_SYSREG_CONTROL = 281;;
+let _ARM_SYSREG_MSPLIM = 282;;
+let _ARM_SYSREG_PSPLIM = 283;;
+let _ARM_SYSREG_MSP_NS = 284;;
+let _ARM_SYSREG_PSP_NS = 285;;
+let _ARM_SYSREG_MSPLIM_NS = 286;;
+let _ARM_SYSREG_PSPLIM_NS = 287;;
+let _ARM_SYSREG_PRIMASK_NS = 288;;
+let _ARM_SYSREG_BASEPRI_NS = 289;;
+let _ARM_SYSREG_FAULTMASK_NS = 290;;
+let _ARM_SYSREG_CONTROL_NS = 291;;
+let _ARM_SYSREG_SP_NS = 292;;
+let _ARM_SYSREG_R8_USR = 293;;
+let _ARM_SYSREG_R9_USR = 294;;
+let _ARM_SYSREG_R10_USR = 295;;
+let _ARM_SYSREG_R11_USR = 296;;
+let _ARM_SYSREG_R12_USR = 297;;
+let _ARM_SYSREG_SP_USR = 298;;
+let _ARM_SYSREG_LR_USR = 299;;
+let _ARM_SYSREG_R8_FIQ = 300;;
+let _ARM_SYSREG_R9_FIQ = 301;;
+let _ARM_SYSREG_R10_FIQ = 302;;
+let _ARM_SYSREG_R11_FIQ = 303;;
+let _ARM_SYSREG_R12_FIQ = 304;;
+let _ARM_SYSREG_SP_FIQ = 305;;
+let _ARM_SYSREG_LR_FIQ = 306;;
+let _ARM_SYSREG_LR_IRQ = 307;;
+let _ARM_SYSREG_SP_IRQ = 308;;
+let _ARM_SYSREG_LR_SVC = 309;;
+let _ARM_SYSREG_SP_SVC = 310;;
+let _ARM_SYSREG_LR_ABT = 311;;
+let _ARM_SYSREG_SP_ABT = 312;;
+let _ARM_SYSREG_LR_UND = 313;;
+let _ARM_SYSREG_SP_UND = 314;;
+let _ARM_SYSREG_LR_MON = 315;;
+let _ARM_SYSREG_SP_MON = 316;;
+let _ARM_SYSREG_ELR_HYP = 317;;
+let _ARM_SYSREG_SP_HYP = 318;;
+let _ARM_SYSREG_SPSR_FIQ = 319;;
+let _ARM_SYSREG_SPSR_IRQ = 320;;
+let _ARM_SYSREG_SPSR_SVC = 321;;
+let _ARM_SYSREG_SPSR_ABT = 322;;
+let _ARM_SYSREG_SPSR_UND = 323;;
+let _ARM_SYSREG_SPSR_MON = 324;;
+let _ARM_SYSREG_SPSR_HYP = 325;;
+
+let _ARM_MB_INVALID = 0;;
+let _ARM_MB_RESERVED_0 = 1;;
+let _ARM_MB_OSHLD = 2;;
+let _ARM_MB_OSHST = 3;;
+let _ARM_MB_OSH = 4;;
+let _ARM_MB_RESERVED_4 = 5;;
+let _ARM_MB_NSHLD = 6;;
+let _ARM_MB_NSHST = 7;;
+let _ARM_MB_NSH = 8;;
+let _ARM_MB_RESERVED_8 = 9;;
+let _ARM_MB_ISHLD = 10;;
+let _ARM_MB_ISHST = 11;;
+let _ARM_MB_ISH = 12;;
+let _ARM_MB_RESERVED_12 = 13;;
+let _ARM_MB_LD = 14;;
+let _ARM_MB_ST = 15;;
+let _ARM_MB_SY = 16;;
+
+let _ARM_OP_INVALID = 0;;
+let _ARM_OP_REG = 1;;
+let _ARM_OP_IMM = 2;;
+let _ARM_OP_MEM = 3;;
+let _ARM_OP_FP = 4;;
+let _ARM_OP_CIMM = 64;;
+let _ARM_OP_PIMM = 65;;
+let _ARM_OP_SETEND = 66;;
+let _ARM_OP_SYSREG = 67;;
+
+let _ARM_SETEND_INVALID = 0;;
+let _ARM_SETEND_BE = 1;;
+let _ARM_SETEND_LE = 2;;
+
+let _ARM_CPSMODE_INVALID = 0;;
+let _ARM_CPSMODE_IE = 2;;
+let _ARM_CPSMODE_ID = 3;;
+
+let _ARM_CPSFLAG_INVALID = 0;;
+let _ARM_CPSFLAG_F = 1;;
+let _ARM_CPSFLAG_I = 2;;
+let _ARM_CPSFLAG_A = 4;;
+let _ARM_CPSFLAG_NONE = 16;;
+
+let _ARM_VECTORDATA_INVALID = 0;;
+let _ARM_VECTORDATA_I8 = 1;;
+let _ARM_VECTORDATA_I16 = 2;;
+let _ARM_VECTORDATA_I32 = 3;;
+let _ARM_VECTORDATA_I64 = 4;;
+let _ARM_VECTORDATA_S8 = 5;;
+let _ARM_VECTORDATA_S16 = 6;;
+let _ARM_VECTORDATA_S32 = 7;;
+let _ARM_VECTORDATA_S64 = 8;;
+let _ARM_VECTORDATA_U8 = 9;;
+let _ARM_VECTORDATA_U16 = 10;;
+let _ARM_VECTORDATA_U32 = 11;;
+let _ARM_VECTORDATA_U64 = 12;;
+let _ARM_VECTORDATA_P8 = 13;;
+let _ARM_VECTORDATA_F16 = 14;;
+let _ARM_VECTORDATA_F32 = 15;;
+let _ARM_VECTORDATA_F64 = 16;;
+let _ARM_VECTORDATA_F16F64 = 17;;
+let _ARM_VECTORDATA_F64F16 = 18;;
+let _ARM_VECTORDATA_F32F16 = 19;;
+let _ARM_VECTORDATA_F16F32 = 20;;
+let _ARM_VECTORDATA_F64F32 = 21;;
+let _ARM_VECTORDATA_F32F64 = 22;;
+let _ARM_VECTORDATA_S32F32 = 23;;
+let _ARM_VECTORDATA_U32F32 = 24;;
+let _ARM_VECTORDATA_F32S32 = 25;;
+let _ARM_VECTORDATA_F32U32 = 26;;
+let _ARM_VECTORDATA_F64S16 = 27;;
+let _ARM_VECTORDATA_F32S16 = 28;;
+let _ARM_VECTORDATA_F64S32 = 29;;
+let _ARM_VECTORDATA_S16F64 = 30;;
+let _ARM_VECTORDATA_S16F32 = 31;;
+let _ARM_VECTORDATA_S32F64 = 32;;
+let _ARM_VECTORDATA_U16F64 = 33;;
+let _ARM_VECTORDATA_U16F32 = 34;;
+let _ARM_VECTORDATA_U32F64 = 35;;
+let _ARM_VECTORDATA_F64U16 = 36;;
+let _ARM_VECTORDATA_F32U16 = 37;;
+let _ARM_VECTORDATA_F64U32 = 38;;
+let _ARM_VECTORDATA_F16U16 = 39;;
+let _ARM_VECTORDATA_U16F16 = 40;;
+let _ARM_VECTORDATA_F16U32 = 41;;
+let _ARM_VECTORDATA_U32F16 = 42;;
+
+let _ARM_REG_INVALID = 0;;
+let _ARM_REG_APSR = 1;;
+let _ARM_REG_APSR_NZCV = 2;;
+let _ARM_REG_CPSR = 3;;
+let _ARM_REG_FPEXC = 4;;
+let _ARM_REG_FPINST = 5;;
+let _ARM_REG_FPSCR = 6;;
+let _ARM_REG_FPSCR_NZCV = 7;;
+let _ARM_REG_FPSID = 8;;
+let _ARM_REG_ITSTATE = 9;;
+let _ARM_REG_LR = 10;;
+let _ARM_REG_PC = 11;;
+let _ARM_REG_SP = 12;;
+let _ARM_REG_SPSR = 13;;
+let _ARM_REG_D0 = 14;;
+let _ARM_REG_D1 = 15;;
+let _ARM_REG_D2 = 16;;
+let _ARM_REG_D3 = 17;;
+let _ARM_REG_D4 = 18;;
+let _ARM_REG_D5 = 19;;
+let _ARM_REG_D6 = 20;;
+let _ARM_REG_D7 = 21;;
+let _ARM_REG_D8 = 22;;
+let _ARM_REG_D9 = 23;;
+let _ARM_REG_D10 = 24;;
+let _ARM_REG_D11 = 25;;
+let _ARM_REG_D12 = 26;;
+let _ARM_REG_D13 = 27;;
+let _ARM_REG_D14 = 28;;
+let _ARM_REG_D15 = 29;;
+let _ARM_REG_D16 = 30;;
+let _ARM_REG_D17 = 31;;
+let _ARM_REG_D18 = 32;;
+let _ARM_REG_D19 = 33;;
+let _ARM_REG_D20 = 34;;
+let _ARM_REG_D21 = 35;;
+let _ARM_REG_D22 = 36;;
+let _ARM_REG_D23 = 37;;
+let _ARM_REG_D24 = 38;;
+let _ARM_REG_D25 = 39;;
+let _ARM_REG_D26 = 40;;
+let _ARM_REG_D27 = 41;;
+let _ARM_REG_D28 = 42;;
+let _ARM_REG_D29 = 43;;
+let _ARM_REG_D30 = 44;;
+let _ARM_REG_D31 = 45;;
+let _ARM_REG_FPINST2 = 46;;
+let _ARM_REG_MVFR0 = 47;;
+let _ARM_REG_MVFR1 = 48;;
+let _ARM_REG_MVFR2 = 49;;
+let _ARM_REG_Q0 = 50;;
+let _ARM_REG_Q1 = 51;;
+let _ARM_REG_Q2 = 52;;
+let _ARM_REG_Q3 = 53;;
+let _ARM_REG_Q4 = 54;;
+let _ARM_REG_Q5 = 55;;
+let _ARM_REG_Q6 = 56;;
+let _ARM_REG_Q7 = 57;;
+let _ARM_REG_Q8 = 58;;
+let _ARM_REG_Q9 = 59;;
+let _ARM_REG_Q10 = 60;;
+let _ARM_REG_Q11 = 61;;
+let _ARM_REG_Q12 = 62;;
+let _ARM_REG_Q13 = 63;;
+let _ARM_REG_Q14 = 64;;
+let _ARM_REG_Q15 = 65;;
+let _ARM_REG_R0 = 66;;
+let _ARM_REG_R1 = 67;;
+let _ARM_REG_R2 = 68;;
+let _ARM_REG_R3 = 69;;
+let _ARM_REG_R4 = 70;;
+let _ARM_REG_R5 = 71;;
+let _ARM_REG_R6 = 72;;
+let _ARM_REG_R7 = 73;;
+let _ARM_REG_R8 = 74;;
+let _ARM_REG_R9 = 75;;
+let _ARM_REG_R10 = 76;;
+let _ARM_REG_R11 = 77;;
+let _ARM_REG_R12 = 78;;
+let _ARM_REG_S0 = 79;;
+let _ARM_REG_S1 = 80;;
+let _ARM_REG_S2 = 81;;
+let _ARM_REG_S3 = 82;;
+let _ARM_REG_S4 = 83;;
+let _ARM_REG_S5 = 84;;
+let _ARM_REG_S6 = 85;;
+let _ARM_REG_S7 = 86;;
+let _ARM_REG_S8 = 87;;
+let _ARM_REG_S9 = 88;;
+let _ARM_REG_S10 = 89;;
+let _ARM_REG_S11 = 90;;
+let _ARM_REG_S12 = 91;;
+let _ARM_REG_S13 = 92;;
+let _ARM_REG_S14 = 93;;
+let _ARM_REG_S15 = 94;;
+let _ARM_REG_S16 = 95;;
+let _ARM_REG_S17 = 96;;
+let _ARM_REG_S18 = 97;;
+let _ARM_REG_S19 = 98;;
+let _ARM_REG_S20 = 99;;
+let _ARM_REG_S21 = 100;;
+let _ARM_REG_S22 = 101;;
+let _ARM_REG_S23 = 102;;
+let _ARM_REG_S24 = 103;;
+let _ARM_REG_S25 = 104;;
+let _ARM_REG_S26 = 105;;
+let _ARM_REG_S27 = 106;;
+let _ARM_REG_S28 = 107;;
+let _ARM_REG_S29 = 108;;
+let _ARM_REG_S30 = 109;;
+let _ARM_REG_S31 = 110;;
+let _ARM_REG_ENDING = 111;;
+let _ARM_REG_R13 = _ARM_REG_SP;;
+let _ARM_REG_R14 = _ARM_REG_LR;;
+let _ARM_REG_R15 = _ARM_REG_PC;;
+let _ARM_REG_SB = _ARM_REG_R9;;
+let _ARM_REG_SL = _ARM_REG_R10;;
+let _ARM_REG_FP = _ARM_REG_R11;;
+let _ARM_REG_IP = _ARM_REG_R12;;
+
+let _ARM_INS_INVALID = 0;;
+let _ARM_INS_ADC = 1;;
+let _ARM_INS_ADD = 2;;
+let _ARM_INS_ADDW = 3;;
+let _ARM_INS_ADR = 4;;
+let _ARM_INS_AESD = 5;;
+let _ARM_INS_AESE = 6;;
+let _ARM_INS_AESIMC = 7;;
+let _ARM_INS_AESMC = 8;;
+let _ARM_INS_AND = 9;;
+let _ARM_INS_ASR = 10;;
+let _ARM_INS_B = 11;;
+let _ARM_INS_BFC = 12;;
+let _ARM_INS_BFI = 13;;
+let _ARM_INS_BIC = 14;;
+let _ARM_INS_BKPT = 15;;
+let _ARM_INS_BL = 16;;
+let _ARM_INS_BLX = 17;;
+let _ARM_INS_BLXNS = 18;;
+let _ARM_INS_BX = 19;;
+let _ARM_INS_BXJ = 20;;
+let _ARM_INS_BXNS = 21;;
+let _ARM_INS_CBNZ = 22;;
+let _ARM_INS_CBZ = 23;;
+let _ARM_INS_CDP = 24;;
+let _ARM_INS_CDP2 = 25;;
+let _ARM_INS_CLREX = 26;;
+let _ARM_INS_CLZ = 27;;
+let _ARM_INS_CMN = 28;;
+let _ARM_INS_CMP = 29;;
+let _ARM_INS_CPS = 30;;
+let _ARM_INS_CRC32B = 31;;
+let _ARM_INS_CRC32CB = 32;;
+let _ARM_INS_CRC32CH = 33;;
+let _ARM_INS_CRC32CW = 34;;
+let _ARM_INS_CRC32H = 35;;
+let _ARM_INS_CRC32W = 36;;
+let _ARM_INS_CSDB = 37;;
+let _ARM_INS_DBG = 38;;
+let _ARM_INS_DCPS1 = 39;;
+let _ARM_INS_DCPS2 = 40;;
+let _ARM_INS_DCPS3 = 41;;
+let _ARM_INS_DFB = 42;;
+let _ARM_INS_DMB = 43;;
+let _ARM_INS_DSB = 44;;
+let _ARM_INS_EOR = 45;;
+let _ARM_INS_ERET = 46;;
+let _ARM_INS_ESB = 47;;
+let _ARM_INS_FADDD = 48;;
+let _ARM_INS_FADDS = 49;;
+let _ARM_INS_FCMPZD = 50;;
+let _ARM_INS_FCMPZS = 51;;
+let _ARM_INS_FCONSTD = 52;;
+let _ARM_INS_FCONSTS = 53;;
+let _ARM_INS_FLDMDBX = 54;;
+let _ARM_INS_FLDMIAX = 55;;
+let _ARM_INS_FMDHR = 56;;
+let _ARM_INS_FMDLR = 57;;
+let _ARM_INS_FMSTAT = 58;;
+let _ARM_INS_FSTMDBX = 59;;
+let _ARM_INS_FSTMIAX = 60;;
+let _ARM_INS_FSUBD = 61;;
+let _ARM_INS_FSUBS = 62;;
+let _ARM_INS_HINT = 63;;
+let _ARM_INS_HLT = 64;;
+let _ARM_INS_HVC = 65;;
+let _ARM_INS_ISB = 66;;
+let _ARM_INS_IT = 67;;
+let _ARM_INS_LDA = 68;;
+let _ARM_INS_LDAB = 69;;
+let _ARM_INS_LDAEX = 70;;
+let _ARM_INS_LDAEXB = 71;;
+let _ARM_INS_LDAEXD = 72;;
+let _ARM_INS_LDAEXH = 73;;
+let _ARM_INS_LDAH = 74;;
+let _ARM_INS_LDC = 75;;
+let _ARM_INS_LDC2 = 76;;
+let _ARM_INS_LDC2L = 77;;
+let _ARM_INS_LDCL = 78;;
+let _ARM_INS_LDM = 79;;
+let _ARM_INS_LDMDA = 80;;
+let _ARM_INS_LDMDB = 81;;
+let _ARM_INS_LDMIB = 82;;
+let _ARM_INS_LDR = 83;;
+let _ARM_INS_LDRB = 84;;
+let _ARM_INS_LDRBT = 85;;
+let _ARM_INS_LDRD = 86;;
+let _ARM_INS_LDREX = 87;;
+let _ARM_INS_LDREXB = 88;;
+let _ARM_INS_LDREXD = 89;;
+let _ARM_INS_LDREXH = 90;;
+let _ARM_INS_LDRH = 91;;
+let _ARM_INS_LDRHT = 92;;
+let _ARM_INS_LDRSB = 93;;
+let _ARM_INS_LDRSBT = 94;;
+let _ARM_INS_LDRSH = 95;;
+let _ARM_INS_LDRSHT = 96;;
+let _ARM_INS_LDRT = 97;;
+let _ARM_INS_LSL = 98;;
+let _ARM_INS_LSR = 99;;
+let _ARM_INS_MCR = 100;;
+let _ARM_INS_MCR2 = 101;;
+let _ARM_INS_MCRR = 102;;
+let _ARM_INS_MCRR2 = 103;;
+let _ARM_INS_MLA = 104;;
+let _ARM_INS_MLS = 105;;
+let _ARM_INS_MOV = 106;;
+let _ARM_INS_MOVS = 107;;
+let _ARM_INS_MOVT = 108;;
+let _ARM_INS_MOVW = 109;;
+let _ARM_INS_MRC = 110;;
+let _ARM_INS_MRC2 = 111;;
+let _ARM_INS_MRRC = 112;;
+let _ARM_INS_MRRC2 = 113;;
+let _ARM_INS_MRS = 114;;
+let _ARM_INS_MSR = 115;;
+let _ARM_INS_MUL = 116;;
+let _ARM_INS_MVN = 117;;
+let _ARM_INS_NEG = 118;;
+let _ARM_INS_NOP = 119;;
+let _ARM_INS_ORN = 120;;
+let _ARM_INS_ORR = 121;;
+let _ARM_INS_PKHBT = 122;;
+let _ARM_INS_PKHTB = 123;;
+let _ARM_INS_PLD = 124;;
+let _ARM_INS_PLDW = 125;;
+let _ARM_INS_PLI = 126;;
+let _ARM_INS_POP = 127;;
+let _ARM_INS_PUSH = 128;;
+let _ARM_INS_QADD = 129;;
+let _ARM_INS_QADD16 = 130;;
+let _ARM_INS_QADD8 = 131;;
+let _ARM_INS_QASX = 132;;
+let _ARM_INS_QDADD = 133;;
+let _ARM_INS_QDSUB = 134;;
+let _ARM_INS_QSAX = 135;;
+let _ARM_INS_QSUB = 136;;
+let _ARM_INS_QSUB16 = 137;;
+let _ARM_INS_QSUB8 = 138;;
+let _ARM_INS_RBIT = 139;;
+let _ARM_INS_REV = 140;;
+let _ARM_INS_REV16 = 141;;
+let _ARM_INS_REVSH = 142;;
+let _ARM_INS_RFEDA = 143;;
+let _ARM_INS_RFEDB = 144;;
+let _ARM_INS_RFEIA = 145;;
+let _ARM_INS_RFEIB = 146;;
+let _ARM_INS_ROR = 147;;
+let _ARM_INS_RRX = 148;;
+let _ARM_INS_RSB = 149;;
+let _ARM_INS_RSC = 150;;
+let _ARM_INS_SADD16 = 151;;
+let _ARM_INS_SADD8 = 152;;
+let _ARM_INS_SASX = 153;;
+let _ARM_INS_SBC = 154;;
+let _ARM_INS_SBFX = 155;;
+let _ARM_INS_SDIV = 156;;
+let _ARM_INS_SEL = 157;;
+let _ARM_INS_SETEND = 158;;
+let _ARM_INS_SETPAN = 159;;
+let _ARM_INS_SEV = 160;;
+let _ARM_INS_SEVL = 161;;
+let _ARM_INS_SG = 162;;
+let _ARM_INS_SHA1C = 163;;
+let _ARM_INS_SHA1H = 164;;
+let _ARM_INS_SHA1M = 165;;
+let _ARM_INS_SHA1P = 166;;
+let _ARM_INS_SHA1SU0 = 167;;
+let _ARM_INS_SHA1SU1 = 168;;
+let _ARM_INS_SHA256H = 169;;
+let _ARM_INS_SHA256H2 = 170;;
+let _ARM_INS_SHA256SU0 = 171;;
+let _ARM_INS_SHA256SU1 = 172;;
+let _ARM_INS_SHADD16 = 173;;
+let _ARM_INS_SHADD8 = 174;;
+let _ARM_INS_SHASX = 175;;
+let _ARM_INS_SHSAX = 176;;
+let _ARM_INS_SHSUB16 = 177;;
+let _ARM_INS_SHSUB8 = 178;;
+let _ARM_INS_SMC = 179;;
+let _ARM_INS_SMLABB = 180;;
+let _ARM_INS_SMLABT = 181;;
+let _ARM_INS_SMLAD = 182;;
+let _ARM_INS_SMLADX = 183;;
+let _ARM_INS_SMLAL = 184;;
+let _ARM_INS_SMLALBB = 185;;
+let _ARM_INS_SMLALBT = 186;;
+let _ARM_INS_SMLALD = 187;;
+let _ARM_INS_SMLALDX = 188;;
+let _ARM_INS_SMLALTB = 189;;
+let _ARM_INS_SMLALTT = 190;;
+let _ARM_INS_SMLATB = 191;;
+let _ARM_INS_SMLATT = 192;;
+let _ARM_INS_SMLAWB = 193;;
+let _ARM_INS_SMLAWT = 194;;
+let _ARM_INS_SMLSD = 195;;
+let _ARM_INS_SMLSDX = 196;;
+let _ARM_INS_SMLSLD = 197;;
+let _ARM_INS_SMLSLDX = 198;;
+let _ARM_INS_SMMLA = 199;;
+let _ARM_INS_SMMLAR = 200;;
+let _ARM_INS_SMMLS = 201;;
+let _ARM_INS_SMMLSR = 202;;
+let _ARM_INS_SMMUL = 203;;
+let _ARM_INS_SMMULR = 204;;
+let _ARM_INS_SMUAD = 205;;
+let _ARM_INS_SMUADX = 206;;
+let _ARM_INS_SMULBB = 207;;
+let _ARM_INS_SMULBT = 208;;
+let _ARM_INS_SMULL = 209;;
+let _ARM_INS_SMULTB = 210;;
+let _ARM_INS_SMULTT = 211;;
+let _ARM_INS_SMULWB = 212;;
+let _ARM_INS_SMULWT = 213;;
+let _ARM_INS_SMUSD = 214;;
+let _ARM_INS_SMUSDX = 215;;
+let _ARM_INS_SRSDA = 216;;
+let _ARM_INS_SRSDB = 217;;
+let _ARM_INS_SRSIA = 218;;
+let _ARM_INS_SRSIB = 219;;
+let _ARM_INS_SSAT = 220;;
+let _ARM_INS_SSAT16 = 221;;
+let _ARM_INS_SSAX = 222;;
+let _ARM_INS_SSUB16 = 223;;
+let _ARM_INS_SSUB8 = 224;;
+let _ARM_INS_STC = 225;;
+let _ARM_INS_STC2 = 226;;
+let _ARM_INS_STC2L = 227;;
+let _ARM_INS_STCL = 228;;
+let _ARM_INS_STL = 229;;
+let _ARM_INS_STLB = 230;;
+let _ARM_INS_STLEX = 231;;
+let _ARM_INS_STLEXB = 232;;
+let _ARM_INS_STLEXD = 233;;
+let _ARM_INS_STLEXH = 234;;
+let _ARM_INS_STLH = 235;;
+let _ARM_INS_STM = 236;;
+let _ARM_INS_STMDA = 237;;
+let _ARM_INS_STMDB = 238;;
+let _ARM_INS_STMIB = 239;;
+let _ARM_INS_STR = 240;;
+let _ARM_INS_STRB = 241;;
+let _ARM_INS_STRBT = 242;;
+let _ARM_INS_STRD = 243;;
+let _ARM_INS_STREX = 244;;
+let _ARM_INS_STREXB = 245;;
+let _ARM_INS_STREXD = 246;;
+let _ARM_INS_STREXH = 247;;
+let _ARM_INS_STRH = 248;;
+let _ARM_INS_STRHT = 249;;
+let _ARM_INS_STRT = 250;;
+let _ARM_INS_SUB = 251;;
+let _ARM_INS_SUBS = 252;;
+let _ARM_INS_SUBW = 253;;
+let _ARM_INS_SVC = 254;;
+let _ARM_INS_SWP = 255;;
+let _ARM_INS_SWPB = 256;;
+let _ARM_INS_SXTAB = 257;;
+let _ARM_INS_SXTAB16 = 258;;
+let _ARM_INS_SXTAH = 259;;
+let _ARM_INS_SXTB = 260;;
+let _ARM_INS_SXTB16 = 261;;
+let _ARM_INS_SXTH = 262;;
+let _ARM_INS_TBB = 263;;
+let _ARM_INS_TBH = 264;;
+let _ARM_INS_TEQ = 265;;
+let _ARM_INS_TRAP = 266;;
+let _ARM_INS_TSB = 267;;
+let _ARM_INS_TST = 268;;
+let _ARM_INS_TT = 269;;
+let _ARM_INS_TTA = 270;;
+let _ARM_INS_TTAT = 271;;
+let _ARM_INS_TTT = 272;;
+let _ARM_INS_UADD16 = 273;;
+let _ARM_INS_UADD8 = 274;;
+let _ARM_INS_UASX = 275;;
+let _ARM_INS_UBFX = 276;;
+let _ARM_INS_UDF = 277;;
+let _ARM_INS_UDIV = 278;;
+let _ARM_INS_UHADD16 = 279;;
+let _ARM_INS_UHADD8 = 280;;
+let _ARM_INS_UHASX = 281;;
+let _ARM_INS_UHSAX = 282;;
+let _ARM_INS_UHSUB16 = 283;;
+let _ARM_INS_UHSUB8 = 284;;
+let _ARM_INS_UMAAL = 285;;
+let _ARM_INS_UMLAL = 286;;
+let _ARM_INS_UMULL = 287;;
+let _ARM_INS_UQADD16 = 288;;
+let _ARM_INS_UQADD8 = 289;;
+let _ARM_INS_UQASX = 290;;
+let _ARM_INS_UQSAX = 291;;
+let _ARM_INS_UQSUB16 = 292;;
+let _ARM_INS_UQSUB8 = 293;;
+let _ARM_INS_USAD8 = 294;;
+let _ARM_INS_USADA8 = 295;;
+let _ARM_INS_USAT = 296;;
+let _ARM_INS_USAT16 = 297;;
+let _ARM_INS_USAX = 298;;
+let _ARM_INS_USUB16 = 299;;
+let _ARM_INS_USUB8 = 300;;
+let _ARM_INS_UXTAB = 301;;
+let _ARM_INS_UXTAB16 = 302;;
+let _ARM_INS_UXTAH = 303;;
+let _ARM_INS_UXTB = 304;;
+let _ARM_INS_UXTB16 = 305;;
+let _ARM_INS_UXTH = 306;;
+let _ARM_INS_VABA = 307;;
+let _ARM_INS_VABAL = 308;;
+let _ARM_INS_VABD = 309;;
+let _ARM_INS_VABDL = 310;;
+let _ARM_INS_VABS = 311;;
+let _ARM_INS_VACGE = 312;;
+let _ARM_INS_VACGT = 313;;
+let _ARM_INS_VACLE = 314;;
+let _ARM_INS_VACLT = 315;;
+let _ARM_INS_VADD = 316;;
+let _ARM_INS_VADDHN = 317;;
+let _ARM_INS_VADDL = 318;;
+let _ARM_INS_VADDW = 319;;
+let _ARM_INS_VAND = 320;;
+let _ARM_INS_VBIC = 321;;
+let _ARM_INS_VBIF = 322;;
+let _ARM_INS_VBIT = 323;;
+let _ARM_INS_VBSL = 324;;
+let _ARM_INS_VCADD = 325;;
+let _ARM_INS_VCEQ = 326;;
+let _ARM_INS_VCGE = 327;;
+let _ARM_INS_VCGT = 328;;
+let _ARM_INS_VCLE = 329;;
+let _ARM_INS_VCLS = 330;;
+let _ARM_INS_VCLT = 331;;
+let _ARM_INS_VCLZ = 332;;
+let _ARM_INS_VCMLA = 333;;
+let _ARM_INS_VCMP = 334;;
+let _ARM_INS_VCMPE = 335;;
+let _ARM_INS_VCNT = 336;;
+let _ARM_INS_VCVT = 337;;
+let _ARM_INS_VCVTA = 338;;
+let _ARM_INS_VCVTB = 339;;
+let _ARM_INS_VCVTM = 340;;
+let _ARM_INS_VCVTN = 341;;
+let _ARM_INS_VCVTP = 342;;
+let _ARM_INS_VCVTR = 343;;
+let _ARM_INS_VCVTT = 344;;
+let _ARM_INS_VDIV = 345;;
+let _ARM_INS_VDUP = 346;;
+let _ARM_INS_VEOR = 347;;
+let _ARM_INS_VEXT = 348;;
+let _ARM_INS_VFMA = 349;;
+let _ARM_INS_VFMS = 350;;
+let _ARM_INS_VFNMA = 351;;
+let _ARM_INS_VFNMS = 352;;
+let _ARM_INS_VHADD = 353;;
+let _ARM_INS_VHSUB = 354;;
+let _ARM_INS_VINS = 355;;
+let _ARM_INS_VJCVT = 356;;
+let _ARM_INS_VLD1 = 357;;
+let _ARM_INS_VLD2 = 358;;
+let _ARM_INS_VLD3 = 359;;
+let _ARM_INS_VLD4 = 360;;
+let _ARM_INS_VLDMDB = 361;;
+let _ARM_INS_VLDMIA = 362;;
+let _ARM_INS_VLDR = 363;;
+let _ARM_INS_VLLDM = 364;;
+let _ARM_INS_VLSTM = 365;;
+let _ARM_INS_VMAX = 366;;
+let _ARM_INS_VMAXNM = 367;;
+let _ARM_INS_VMIN = 368;;
+let _ARM_INS_VMINNM = 369;;
+let _ARM_INS_VMLA = 370;;
+let _ARM_INS_VMLAL = 371;;
+let _ARM_INS_VMLS = 372;;
+let _ARM_INS_VMLSL = 373;;
+let _ARM_INS_VMOV = 374;;
+let _ARM_INS_VMOVL = 375;;
+let _ARM_INS_VMOVN = 376;;
+let _ARM_INS_VMOVX = 377;;
+let _ARM_INS_VMRS = 378;;
+let _ARM_INS_VMSR = 379;;
+let _ARM_INS_VMUL = 380;;
+let _ARM_INS_VMULL = 381;;
+let _ARM_INS_VMVN = 382;;
+let _ARM_INS_VNEG = 383;;
+let _ARM_INS_VNMLA = 384;;
+let _ARM_INS_VNMLS = 385;;
+let _ARM_INS_VNMUL = 386;;
+let _ARM_INS_VORN = 387;;
+let _ARM_INS_VORR = 388;;
+let _ARM_INS_VPADAL = 389;;
+let _ARM_INS_VPADD = 390;;
+let _ARM_INS_VPADDL = 391;;
+let _ARM_INS_VPMAX = 392;;
+let _ARM_INS_VPMIN = 393;;
+let _ARM_INS_VPOP = 394;;
+let _ARM_INS_VPUSH = 395;;
+let _ARM_INS_VQABS = 396;;
+let _ARM_INS_VQADD = 397;;
+let _ARM_INS_VQDMLAL = 398;;
+let _ARM_INS_VQDMLSL = 399;;
+let _ARM_INS_VQDMULH = 400;;
+let _ARM_INS_VQDMULL = 401;;
+let _ARM_INS_VQMOVN = 402;;
+let _ARM_INS_VQMOVUN = 403;;
+let _ARM_INS_VQNEG = 404;;
+let _ARM_INS_VQRDMLAH = 405;;
+let _ARM_INS_VQRDMLSH = 406;;
+let _ARM_INS_VQRDMULH = 407;;
+let _ARM_INS_VQRSHL = 408;;
+let _ARM_INS_VQRSHRN = 409;;
+let _ARM_INS_VQRSHRUN = 410;;
+let _ARM_INS_VQSHL = 411;;
+let _ARM_INS_VQSHLU = 412;;
+let _ARM_INS_VQSHRN = 413;;
+let _ARM_INS_VQSHRUN = 414;;
+let _ARM_INS_VQSUB = 415;;
+let _ARM_INS_VRADDHN = 416;;
+let _ARM_INS_VRECPE = 417;;
+let _ARM_INS_VRECPS = 418;;
+let _ARM_INS_VREV16 = 419;;
+let _ARM_INS_VREV32 = 420;;
+let _ARM_INS_VREV64 = 421;;
+let _ARM_INS_VRHADD = 422;;
+let _ARM_INS_VRINTA = 423;;
+let _ARM_INS_VRINTM = 424;;
+let _ARM_INS_VRINTN = 425;;
+let _ARM_INS_VRINTP = 426;;
+let _ARM_INS_VRINTR = 427;;
+let _ARM_INS_VRINTX = 428;;
+let _ARM_INS_VRINTZ = 429;;
+let _ARM_INS_VRSHL = 430;;
+let _ARM_INS_VRSHR = 431;;
+let _ARM_INS_VRSHRN = 432;;
+let _ARM_INS_VRSQRTE = 433;;
+let _ARM_INS_VRSQRTS = 434;;
+let _ARM_INS_VRSRA = 435;;
+let _ARM_INS_VRSUBHN = 436;;
+let _ARM_INS_VSDOT = 437;;
+let _ARM_INS_VSELEQ = 438;;
+let _ARM_INS_VSELGE = 439;;
+let _ARM_INS_VSELGT = 440;;
+let _ARM_INS_VSELVS = 441;;
+let _ARM_INS_VSHL = 442;;
+let _ARM_INS_VSHLL = 443;;
+let _ARM_INS_VSHR = 444;;
+let _ARM_INS_VSHRN = 445;;
+let _ARM_INS_VSLI = 446;;
+let _ARM_INS_VSQRT = 447;;
+let _ARM_INS_VSRA = 448;;
+let _ARM_INS_VSRI = 449;;
+let _ARM_INS_VST1 = 450;;
+let _ARM_INS_VST2 = 451;;
+let _ARM_INS_VST3 = 452;;
+let _ARM_INS_VST4 = 453;;
+let _ARM_INS_VSTMDB = 454;;
+let _ARM_INS_VSTMIA = 455;;
+let _ARM_INS_VSTR = 456;;
+let _ARM_INS_VSUB = 457;;
+let _ARM_INS_VSUBHN = 458;;
+let _ARM_INS_VSUBL = 459;;
+let _ARM_INS_VSUBW = 460;;
+let _ARM_INS_VSWP = 461;;
+let _ARM_INS_VTBL = 462;;
+let _ARM_INS_VTBX = 463;;
+let _ARM_INS_VTRN = 464;;
+let _ARM_INS_VTST = 465;;
+let _ARM_INS_VUDOT = 466;;
+let _ARM_INS_VUZP = 467;;
+let _ARM_INS_VZIP = 468;;
+let _ARM_INS_WFE = 469;;
+let _ARM_INS_WFI = 470;;
+let _ARM_INS_YIELD = 471;;
+let _ARM_INS_ENDING = 472;;
+
+let _ARM_GRP_INVALID = 0;;
+let _ARM_GRP_JUMP = 1;;
+let _ARM_GRP_CALL = 2;;
+let _ARM_GRP_INT = 4;;
+let _ARM_GRP_PRIVILEGE = 6;;
+let _ARM_GRP_BRANCH_RELATIVE = 7;;
+let _ARM_GRP_CRYPTO = 128;;
+let _ARM_GRP_DATABARRIER = 129;;
+let _ARM_GRP_DIVIDE = 130;;
+let _ARM_GRP_FPARMV8 = 131;;
+let _ARM_GRP_MULTPRO = 132;;
+let _ARM_GRP_NEON = 133;;
+let _ARM_GRP_T2EXTRACTPACK = 134;;
+let _ARM_GRP_THUMB2DSP = 135;;
+let _ARM_GRP_TRUSTZONE = 136;;
+let _ARM_GRP_V4T = 137;;
+let _ARM_GRP_V5T = 138;;
+let _ARM_GRP_V5TE = 139;;
+let _ARM_GRP_V6 = 140;;
+let _ARM_GRP_V6T2 = 141;;
+let _ARM_GRP_V7 = 142;;
+let _ARM_GRP_V8 = 143;;
+let _ARM_GRP_VFP2 = 144;;
+let _ARM_GRP_VFP3 = 145;;
+let _ARM_GRP_VFP4 = 146;;
+let _ARM_GRP_ARM = 147;;
+let _ARM_GRP_MCLASS = 148;;
+let _ARM_GRP_NOTMCLASS = 149;;
+let _ARM_GRP_THUMB = 150;;
+let _ARM_GRP_THUMB1ONLY = 151;;
+let _ARM_GRP_THUMB2 = 152;;
+let _ARM_GRP_PREV8 = 153;;
+let _ARM_GRP_FPVMLX = 154;;
+let _ARM_GRP_MULOPS = 155;;
+let _ARM_GRP_CRC = 156;;
+let _ARM_GRP_DPVFP = 157;;
+let _ARM_GRP_V6M = 158;;
+let _ARM_GRP_VIRTUALIZATION = 159;;
+let _ARM_GRP_ENDING = 160;;
diff --git a/capstone/bindings/ocaml/capstone.ml b/capstone/bindings/ocaml/capstone.ml
new file mode 100644
index 000000000..9d7a8dbc3
--- /dev/null
+++ b/capstone/bindings/ocaml/capstone.ml
@@ -0,0 +1,214 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Arm
+open Arm64
+open Mips
+open Ppc
+open X86
+open Sparc
+open Systemz
+open Xcore
+open M680x
+open Printf	(* debug *)
+
+(* Hardware architectures *)
+type arch =
+  | CS_ARCH_ARM
+  | CS_ARCH_ARM64
+  | CS_ARCH_MIPS
+  | CS_ARCH_X86
+  | CS_ARCH_PPC
+  | CS_ARCH_SPARC
+  | CS_ARCH_SYSZ
+  | CS_ARCH_XCORE
+  | CS_ARCH_M68K
+  | CS_ARCH_TMS320C64X
+  | CS_ARCH_M680X
+
+(* Hardware modes *)
+type mode =
+  |	CS_MODE_LITTLE_ENDIAN	(* little-endian mode (default mode) *)
+  |	CS_MODE_ARM			(* ARM mode *)
+  |	CS_MODE_16			(* 16-bit mode (for X86) *)
+  |	CS_MODE_32			(* 32-bit mode (for X86) *)
+  |	CS_MODE_64			(* 64-bit mode (for X86, PPC) *)
+  |	CS_MODE_THUMB		(* ARM's Thumb mode, including Thumb-2 *)
+  |	CS_MODE_MCLASS		(* ARM's MClass mode *)
+  |	CS_MODE_V8    		(* ARMv8 A32 encodings for ARM *)
+  |	CS_MODE_MICRO		(* MicroMips mode (MIPS architecture) *)
+  |	CS_MODE_MIPS3		(* Mips3 mode (MIPS architecture) *)
+  |	CS_MODE_MIPS32R6	(* Mips32-R6 mode (MIPS architecture) *)
+  |	CS_MODE_MIPS2	    (* Mips2 mode (MIPS architecture) *)
+  |	CS_MODE_V9			(* SparcV9 mode (Sparc architecture) *)
+  |	CS_MODE_BIG_ENDIAN	(* big-endian mode *)
+  |	CS_MODE_MIPS32		(* Mips32 mode (for Mips) *)
+  |	CS_MODE_MIPS64		(* Mips64 mode (for Mips) *)
+  |	CS_MODE_QPX         (* Quad Processing eXtensions mode (PowerPC) *)
+  |	CS_MODE_M680X_6301	(* M680X Hitachi 6301,6303 mode *)
+  |	CS_MODE_M680X_6309	(* M680X Hitachi 6309 mode *)
+  |	CS_MODE_M680X_6800	(* M680X Motorola 6800,6802 mode *)
+  |	CS_MODE_M680X_6801	(* M680X Motorola 6801,6803 mode *)
+  |	CS_MODE_M680X_6805	(* M680X Motorola 6805 mode *)
+  |	CS_MODE_M680X_6808	(* M680X Motorola 6808 mode *)
+  |	CS_MODE_M680X_6809	(* M680X Motorola 6809 mode *)
+  |	CS_MODE_M680X_6811	(* M680X Motorola/Freescale 68HC11 mode *)
+  |	CS_MODE_M680X_CPU12	(* M680X Motorola/Freescale/NXP CPU12 mode *)
+  |	CS_MODE_M680X_HCS08	(* M680X Freescale HCS08 mode *)
+
+
+
+(* Runtime option for the disassembled engine *)
+type opt_type =
+  |	CS_OPT_SYNTAX		(*  Asssembly output syntax *)
+  |	CS_OPT_DETAIL		(* Break down instruction structure into details *)
+  |	CS_OPT_MODE		(* Change engine's mode at run-time *)
+  |	CS_OPT_MEM		(* User-defined dynamic memory related functions *)
+  |	CS_OPT_SKIPDATA		(* Skip data when disassembling. Then engine is in SKIPDATA mode. *)
+  |	CS_OPT_SKIPDATA_SETUP 	(* Setup user-defined function for SKIPDATA option *)
+
+
+(* Common instruction operand access types - to be consistent across all architectures. *)
+(* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *)
+let _CS_AC_INVALID = 0;;	(* Uninitialized/invalid access type. *)
+let _CS_AC_READ    = 1 lsl 0;; (* Operand read from memory or register. *)
+let _CS_AC_WRITE   = 1 lsl 1;; (* Operand write to memory or register. *)
+
+(* Runtime option value (associated with option type above) *)
+let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
+let _CS_OPT_ON = 3L;;  (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
+let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
+let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *)
+
+(* Common instruction operand types - to be consistent across all architectures. *)
+let _CS_OP_INVALID = 0;;  (* uninitialized/invalid operand. *)
+let _CS_OP_REG     = 1;;  (* Register operand. *)
+let _CS_OP_IMM     = 2;;  (* Immediate operand. *)
+let _CS_OP_MEM     = 3;;  (* Memory operand. *)
+let _CS_OP_FP      = 4;;  (* Floating-Point operand. *)
+
+(* Common instruction groups - to be consistent across all architectures. *)
+let _CS_GRP_INVALID = 0;;  (* uninitialized/invalid group. *)
+let _CS_GRP_JUMP    = 1;;  (* all jump instructions (conditional+direct+indirect jumps) *)
+let _CS_GRP_CALL    = 2;;  (* all call instructions *)
+let _CS_GRP_RET     = 3;;  (* all return instructions *)
+let _CS_GRP_INT     = 4;;  (* all interrupt instructions (int+syscall) *)
+let _CS_GRP_IRET    = 5;;  (* all interrupt return instructions *)
+let _CS_GRP_PRIVILEGE = 6;;  (* all privileged instructions *)
+
+type cs_arch =
+	| CS_INFO_ARM of cs_arm
+	| CS_INFO_ARM64 of cs_arm64
+	| CS_INFO_MIPS of cs_mips
+	| CS_INFO_X86 of cs_x86
+	| CS_INFO_PPC of cs_ppc
+	| CS_INFO_SPARC of cs_sparc
+	| CS_INFO_SYSZ of cs_sysz
+	| CS_INFO_XCORE of cs_xcore
+	| CS_INFO_M680X of cs_m680x
+
+
+type csh = {
+	h: Int64.t;
+	a: arch;
+}
+
+type cs_insn0 = {
+	id: int;
+	address: int;
+	size: int;
+	bytes: int array;
+	mnemonic: string;
+	op_str: string;
+	regs_read: int array;
+	regs_write: int array;
+	groups: int array;
+	arch: cs_arch;
+}
+
+external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open"
+external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm"
+external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal"
+external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
+external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
+external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
+external cs_version: unit -> int = "ocaml_version"
+external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option"
+external _cs_close: Int64.t -> int = "ocaml_close"
+
+
+let cs_open _arch _mode: csh = (
+	let _handle = _cs_open _arch _mode in (
+	match _handle with
+	| None -> { h = 0L; a = _arch }
+	| Some v -> { h = v; a = _arch }
+	);
+);;
+
+let cs_close handle = (
+	_cs_close handle.h;
+)
+
+let cs_option handle opt value = (
+	_cs_option handle.h opt value;
+);;
+
+let cs_disasm handle code address count = (
+	_cs_disasm_internal handle.a handle.h code address count;
+);;
+
+let cs_reg_name handle id = (
+	_cs_reg_name handle.h id;
+);;
+
+let cs_insn_name handle id = (
+	_cs_insn_name handle.h id;
+);;
+
+let cs_group_name handle id = (
+	_cs_group_name handle.h id;
+);;
+
+class cs_insn c a =
+	let csh = c in
+	let (id, address, size, bytes, mnemonic, op_str, regs_read,
+        regs_write, groups, arch) =
+        (a.id, a.address, a.size, a.bytes, a.mnemonic, a.op_str,
+        a.regs_read, a.regs_write, a.groups, a.arch) in
+	object
+		method id = id;
+		method address = address;
+		method size = size;
+	        method bytes = bytes;
+		method mnemonic = mnemonic;
+		method op_str = op_str;
+		method regs_read = regs_read;
+		method regs_write = regs_write;
+		method groups = groups;
+		method arch = arch;
+		method reg_name id = _cs_reg_name csh.h id;
+		method insn_name id = _cs_insn_name csh.h id;
+		method group_name id = _cs_group_name csh.h id;
+	end;;
+
+let cs_insn_group handle insn group_id =
+	List.exists (fun g -> g == group_id) (Array.to_list insn.groups);;
+
+let cs_reg_read handle insn reg_id =
+	List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_read);;
+
+let cs_reg_write handle insn reg_id =
+	List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_write);;
+
+
+class cs a m =
+	let mode = m and arch = a in
+	let handle = cs_open arch mode in
+	object
+		method disasm code offset count =
+			let insns = (_cs_disasm_internal arch handle.h code offset count) in
+			List.map (fun x -> new cs_insn handle x) insns;
+
+	end;;
diff --git a/capstone/bindings/ocaml/evm_const.ml b/capstone/bindings/ocaml/evm_const.ml
new file mode 100644
index 000000000..050a8b473
--- /dev/null
+++ b/capstone/bindings/ocaml/evm_const.ml
@@ -0,0 +1,151 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.ml] *)
+
+let _EVM_INS_STOP = 0;;
+let _EVM_INS_ADD = 1;;
+let _EVM_INS_MUL = 2;;
+let _EVM_INS_SUB = 3;;
+let _EVM_INS_DIV = 4;;
+let _EVM_INS_SDIV = 5;;
+let _EVM_INS_MOD = 6;;
+let _EVM_INS_SMOD = 7;;
+let _EVM_INS_ADDMOD = 8;;
+let _EVM_INS_MULMOD = 9;;
+let _EVM_INS_EXP = 10;;
+let _EVM_INS_SIGNEXTEND = 11;;
+let _EVM_INS_LT = 16;;
+let _EVM_INS_GT = 17;;
+let _EVM_INS_SLT = 18;;
+let _EVM_INS_SGT = 19;;
+let _EVM_INS_EQ = 20;;
+let _EVM_INS_ISZERO = 21;;
+let _EVM_INS_AND = 22;;
+let _EVM_INS_OR = 23;;
+let _EVM_INS_XOR = 24;;
+let _EVM_INS_NOT = 25;;
+let _EVM_INS_BYTE = 26;;
+let _EVM_INS_SHA3 = 32;;
+let _EVM_INS_ADDRESS = 48;;
+let _EVM_INS_BALANCE = 49;;
+let _EVM_INS_ORIGIN = 50;;
+let _EVM_INS_CALLER = 51;;
+let _EVM_INS_CALLVALUE = 52;;
+let _EVM_INS_CALLDATALOAD = 53;;
+let _EVM_INS_CALLDATASIZE = 54;;
+let _EVM_INS_CALLDATACOPY = 55;;
+let _EVM_INS_CODESIZE = 56;;
+let _EVM_INS_CODECOPY = 57;;
+let _EVM_INS_GASPRICE = 58;;
+let _EVM_INS_EXTCODESIZE = 59;;
+let _EVM_INS_EXTCODECOPY = 60;;
+let _EVM_INS_RETURNDATASIZE = 61;;
+let _EVM_INS_RETURNDATACOPY = 62;;
+let _EVM_INS_BLOCKHASH = 64;;
+let _EVM_INS_COINBASE = 65;;
+let _EVM_INS_TIMESTAMP = 66;;
+let _EVM_INS_NUMBER = 67;;
+let _EVM_INS_DIFFICULTY = 68;;
+let _EVM_INS_GASLIMIT = 69;;
+let _EVM_INS_POP = 80;;
+let _EVM_INS_MLOAD = 81;;
+let _EVM_INS_MSTORE = 82;;
+let _EVM_INS_MSTORE8 = 83;;
+let _EVM_INS_SLOAD = 84;;
+let _EVM_INS_SSTORE = 85;;
+let _EVM_INS_JUMP = 86;;
+let _EVM_INS_JUMPI = 87;;
+let _EVM_INS_PC = 88;;
+let _EVM_INS_MSIZE = 89;;
+let _EVM_INS_GAS = 90;;
+let _EVM_INS_JUMPDEST = 91;;
+let _EVM_INS_PUSH1 = 96;;
+let _EVM_INS_PUSH2 = 97;;
+let _EVM_INS_PUSH3 = 98;;
+let _EVM_INS_PUSH4 = 99;;
+let _EVM_INS_PUSH5 = 100;;
+let _EVM_INS_PUSH6 = 101;;
+let _EVM_INS_PUSH7 = 102;;
+let _EVM_INS_PUSH8 = 103;;
+let _EVM_INS_PUSH9 = 104;;
+let _EVM_INS_PUSH10 = 105;;
+let _EVM_INS_PUSH11 = 106;;
+let _EVM_INS_PUSH12 = 107;;
+let _EVM_INS_PUSH13 = 108;;
+let _EVM_INS_PUSH14 = 109;;
+let _EVM_INS_PUSH15 = 110;;
+let _EVM_INS_PUSH16 = 111;;
+let _EVM_INS_PUSH17 = 112;;
+let _EVM_INS_PUSH18 = 113;;
+let _EVM_INS_PUSH19 = 114;;
+let _EVM_INS_PUSH20 = 115;;
+let _EVM_INS_PUSH21 = 116;;
+let _EVM_INS_PUSH22 = 117;;
+let _EVM_INS_PUSH23 = 118;;
+let _EVM_INS_PUSH24 = 119;;
+let _EVM_INS_PUSH25 = 120;;
+let _EVM_INS_PUSH26 = 121;;
+let _EVM_INS_PUSH27 = 122;;
+let _EVM_INS_PUSH28 = 123;;
+let _EVM_INS_PUSH29 = 124;;
+let _EVM_INS_PUSH30 = 125;;
+let _EVM_INS_PUSH31 = 126;;
+let _EVM_INS_PUSH32 = 127;;
+let _EVM_INS_DUP1 = 128;;
+let _EVM_INS_DUP2 = 129;;
+let _EVM_INS_DUP3 = 130;;
+let _EVM_INS_DUP4 = 131;;
+let _EVM_INS_DUP5 = 132;;
+let _EVM_INS_DUP6 = 133;;
+let _EVM_INS_DUP7 = 134;;
+let _EVM_INS_DUP8 = 135;;
+let _EVM_INS_DUP9 = 136;;
+let _EVM_INS_DUP10 = 137;;
+let _EVM_INS_DUP11 = 138;;
+let _EVM_INS_DUP12 = 139;;
+let _EVM_INS_DUP13 = 140;;
+let _EVM_INS_DUP14 = 141;;
+let _EVM_INS_DUP15 = 142;;
+let _EVM_INS_DUP16 = 143;;
+let _EVM_INS_SWAP1 = 144;;
+let _EVM_INS_SWAP2 = 145;;
+let _EVM_INS_SWAP3 = 146;;
+let _EVM_INS_SWAP4 = 147;;
+let _EVM_INS_SWAP5 = 148;;
+let _EVM_INS_SWAP6 = 149;;
+let _EVM_INS_SWAP7 = 150;;
+let _EVM_INS_SWAP8 = 151;;
+let _EVM_INS_SWAP9 = 152;;
+let _EVM_INS_SWAP10 = 153;;
+let _EVM_INS_SWAP11 = 154;;
+let _EVM_INS_SWAP12 = 155;;
+let _EVM_INS_SWAP13 = 156;;
+let _EVM_INS_SWAP14 = 157;;
+let _EVM_INS_SWAP15 = 158;;
+let _EVM_INS_SWAP16 = 159;;
+let _EVM_INS_LOG0 = 160;;
+let _EVM_INS_LOG1 = 161;;
+let _EVM_INS_LOG2 = 162;;
+let _EVM_INS_LOG3 = 163;;
+let _EVM_INS_LOG4 = 164;;
+let _EVM_INS_CREATE = 240;;
+let _EVM_INS_CALL = 241;;
+let _EVM_INS_CALLCODE = 242;;
+let _EVM_INS_RETURN = 243;;
+let _EVM_INS_DELEGATECALL = 244;;
+let _EVM_INS_CALLBLACKBOX = 245;;
+let _EVM_INS_STATICCALL = 250;;
+let _EVM_INS_REVERT = 253;;
+let _EVM_INS_SUICIDE = 255;;
+let _EVM_INS_INVALID = 512;;
+let _EVM_INS_ENDING = 513;;
+
+let _EVM_GRP_INVALID = 0;;
+let _EVM_GRP_JUMP = 1;;
+let _EVM_GRP_MATH = 8;;
+let _EVM_GRP_STACK_WRITE = 9;;
+let _EVM_GRP_STACK_READ = 10;;
+let _EVM_GRP_MEM_WRITE = 11;;
+let _EVM_GRP_MEM_READ = 12;;
+let _EVM_GRP_STORE_WRITE = 13;;
+let _EVM_GRP_STORE_READ = 14;;
+let _EVM_GRP_HALT = 15;;
+let _EVM_GRP_ENDING = 16;;
diff --git a/capstone/bindings/ocaml/m680x.ml b/capstone/bindings/ocaml/m680x.ml
new file mode 100644
index 000000000..139715db9
--- /dev/null
+++ b/capstone/bindings/ocaml/m680x.ml
@@ -0,0 +1,48 @@
+(* Capstone Disassembly Engine
+ * M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
+
+open M680x_const
+
+
+(* architecture specific info of instruction *)
+type m680x_op_idx = {
+	base_reg: int;
+	offset_reg: int;
+	offset: int;
+	offset_addr: int;
+	offset_bits: int;
+	inc_dec: int;
+	flags: int;
+}
+
+type m680x_op_rel = {
+	addr_rel: int;
+	offset: int;
+}
+
+type m680x_op_ext = {
+	addr_ext: int;
+	indirect: bool;
+}
+
+type m680x_op_value =
+	| M680X_OP_INVALID of int
+	| M680X_OP_IMMEDIATE of int
+	| M680X_OP_REGISTER of int
+	| M680X_OP_INDEXED of m680x_op_idx
+	| M680X_OP_RELATIVE of m680x_op_rel
+	| M680X_OP_EXTENDED of m680x_op_ext
+	| M680X_OP_DIRECT of int
+	| M680X_OP_CONSTANT of int
+
+type m680x_op = {
+	value: m680x_op_value;
+	size: int;
+	access: int;
+}
+
+type cs_m680x = {
+	flags: int;
+	operands: m680x_op array;
+}
+
diff --git a/capstone/bindings/ocaml/m680x_const.ml b/capstone/bindings/ocaml/m680x_const.ml
new file mode 100644
index 000000000..5e887109f
--- /dev/null
+++ b/capstone/bindings/ocaml/m680x_const.ml
@@ -0,0 +1,415 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.ml] *)
+let _M680X_OPERAND_COUNT = 9;;
+
+let _M680X_REG_INVALID = 0;;
+let _M680X_REG_A = 1;;
+let _M680X_REG_B = 2;;
+let _M680X_REG_E = 3;;
+let _M680X_REG_F = 4;;
+let _M680X_REG_0 = 5;;
+let _M680X_REG_D = 6;;
+let _M680X_REG_W = 7;;
+let _M680X_REG_CC = 8;;
+let _M680X_REG_DP = 9;;
+let _M680X_REG_MD = 10;;
+let _M680X_REG_HX = 11;;
+let _M680X_REG_H = 12;;
+let _M680X_REG_X = 13;;
+let _M680X_REG_Y = 14;;
+let _M680X_REG_S = 15;;
+let _M680X_REG_U = 16;;
+let _M680X_REG_V = 17;;
+let _M680X_REG_Q = 18;;
+let _M680X_REG_PC = 19;;
+let _M680X_REG_TMP2 = 20;;
+let _M680X_REG_TMP3 = 21;;
+let _M680X_REG_ENDING = 22;;
+
+let _M680X_OP_INVALID = 0;;
+let _M680X_OP_REGISTER = 1;;
+let _M680X_OP_IMMEDIATE = 2;;
+let _M680X_OP_INDEXED = 3;;
+let _M680X_OP_EXTENDED = 4;;
+let _M680X_OP_DIRECT = 5;;
+let _M680X_OP_RELATIVE = 6;;
+let _M680X_OP_CONSTANT = 7;;
+
+let _M680X_OFFSET_NONE = 0;;
+let _M680X_OFFSET_BITS_5 = 5;;
+let _M680X_OFFSET_BITS_8 = 8;;
+let _M680X_OFFSET_BITS_9 = 9;;
+let _M680X_OFFSET_BITS_16 = 16;;
+let _M680X_IDX_INDIRECT = 1;;
+let _M680X_IDX_NO_COMMA = 2;;
+let _M680X_IDX_POST_INC_DEC = 4;;
+
+let _M680X_GRP_INVALID = 0;;
+let _M680X_GRP_JUMP = 1;;
+let _M680X_GRP_CALL = 2;;
+let _M680X_GRP_RET = 3;;
+let _M680X_GRP_INT = 4;;
+let _M680X_GRP_IRET = 5;;
+let _M680X_GRP_PRIV = 6;;
+let _M680X_GRP_BRAREL = 7;;
+let _M680X_GRP_ENDING = 8;;
+let _M680X_FIRST_OP_IN_MNEM = 1;;
+let _M680X_SECOND_OP_IN_MNEM = 2;;
+
+let _M680X_INS_INVLD = 0;;
+let _M680X_INS_ABA = 1;;
+let _M680X_INS_ABX = 2;;
+let _M680X_INS_ABY = 3;;
+let _M680X_INS_ADC = 4;;
+let _M680X_INS_ADCA = 5;;
+let _M680X_INS_ADCB = 6;;
+let _M680X_INS_ADCD = 7;;
+let _M680X_INS_ADCR = 8;;
+let _M680X_INS_ADD = 9;;
+let _M680X_INS_ADDA = 10;;
+let _M680X_INS_ADDB = 11;;
+let _M680X_INS_ADDD = 12;;
+let _M680X_INS_ADDE = 13;;
+let _M680X_INS_ADDF = 14;;
+let _M680X_INS_ADDR = 15;;
+let _M680X_INS_ADDW = 16;;
+let _M680X_INS_AIM = 17;;
+let _M680X_INS_AIS = 18;;
+let _M680X_INS_AIX = 19;;
+let _M680X_INS_AND = 20;;
+let _M680X_INS_ANDA = 21;;
+let _M680X_INS_ANDB = 22;;
+let _M680X_INS_ANDCC = 23;;
+let _M680X_INS_ANDD = 24;;
+let _M680X_INS_ANDR = 25;;
+let _M680X_INS_ASL = 26;;
+let _M680X_INS_ASLA = 27;;
+let _M680X_INS_ASLB = 28;;
+let _M680X_INS_ASLD = 29;;
+let _M680X_INS_ASR = 30;;
+let _M680X_INS_ASRA = 31;;
+let _M680X_INS_ASRB = 32;;
+let _M680X_INS_ASRD = 33;;
+let _M680X_INS_ASRX = 34;;
+let _M680X_INS_BAND = 35;;
+let _M680X_INS_BCC = 36;;
+let _M680X_INS_BCLR = 37;;
+let _M680X_INS_BCS = 38;;
+let _M680X_INS_BEOR = 39;;
+let _M680X_INS_BEQ = 40;;
+let _M680X_INS_BGE = 41;;
+let _M680X_INS_BGND = 42;;
+let _M680X_INS_BGT = 43;;
+let _M680X_INS_BHCC = 44;;
+let _M680X_INS_BHCS = 45;;
+let _M680X_INS_BHI = 46;;
+let _M680X_INS_BIAND = 47;;
+let _M680X_INS_BIEOR = 48;;
+let _M680X_INS_BIH = 49;;
+let _M680X_INS_BIL = 50;;
+let _M680X_INS_BIOR = 51;;
+let _M680X_INS_BIT = 52;;
+let _M680X_INS_BITA = 53;;
+let _M680X_INS_BITB = 54;;
+let _M680X_INS_BITD = 55;;
+let _M680X_INS_BITMD = 56;;
+let _M680X_INS_BLE = 57;;
+let _M680X_INS_BLS = 58;;
+let _M680X_INS_BLT = 59;;
+let _M680X_INS_BMC = 60;;
+let _M680X_INS_BMI = 61;;
+let _M680X_INS_BMS = 62;;
+let _M680X_INS_BNE = 63;;
+let _M680X_INS_BOR = 64;;
+let _M680X_INS_BPL = 65;;
+let _M680X_INS_BRCLR = 66;;
+let _M680X_INS_BRSET = 67;;
+let _M680X_INS_BRA = 68;;
+let _M680X_INS_BRN = 69;;
+let _M680X_INS_BSET = 70;;
+let _M680X_INS_BSR = 71;;
+let _M680X_INS_BVC = 72;;
+let _M680X_INS_BVS = 73;;
+let _M680X_INS_CALL = 74;;
+let _M680X_INS_CBA = 75;;
+let _M680X_INS_CBEQ = 76;;
+let _M680X_INS_CBEQA = 77;;
+let _M680X_INS_CBEQX = 78;;
+let _M680X_INS_CLC = 79;;
+let _M680X_INS_CLI = 80;;
+let _M680X_INS_CLR = 81;;
+let _M680X_INS_CLRA = 82;;
+let _M680X_INS_CLRB = 83;;
+let _M680X_INS_CLRD = 84;;
+let _M680X_INS_CLRE = 85;;
+let _M680X_INS_CLRF = 86;;
+let _M680X_INS_CLRH = 87;;
+let _M680X_INS_CLRW = 88;;
+let _M680X_INS_CLRX = 89;;
+let _M680X_INS_CLV = 90;;
+let _M680X_INS_CMP = 91;;
+let _M680X_INS_CMPA = 92;;
+let _M680X_INS_CMPB = 93;;
+let _M680X_INS_CMPD = 94;;
+let _M680X_INS_CMPE = 95;;
+let _M680X_INS_CMPF = 96;;
+let _M680X_INS_CMPR = 97;;
+let _M680X_INS_CMPS = 98;;
+let _M680X_INS_CMPU = 99;;
+let _M680X_INS_CMPW = 100;;
+let _M680X_INS_CMPX = 101;;
+let _M680X_INS_CMPY = 102;;
+let _M680X_INS_COM = 103;;
+let _M680X_INS_COMA = 104;;
+let _M680X_INS_COMB = 105;;
+let _M680X_INS_COMD = 106;;
+let _M680X_INS_COME = 107;;
+let _M680X_INS_COMF = 108;;
+let _M680X_INS_COMW = 109;;
+let _M680X_INS_COMX = 110;;
+let _M680X_INS_CPD = 111;;
+let _M680X_INS_CPHX = 112;;
+let _M680X_INS_CPS = 113;;
+let _M680X_INS_CPX = 114;;
+let _M680X_INS_CPY = 115;;
+let _M680X_INS_CWAI = 116;;
+let _M680X_INS_DAA = 117;;
+let _M680X_INS_DBEQ = 118;;
+let _M680X_INS_DBNE = 119;;
+let _M680X_INS_DBNZ = 120;;
+let _M680X_INS_DBNZA = 121;;
+let _M680X_INS_DBNZX = 122;;
+let _M680X_INS_DEC = 123;;
+let _M680X_INS_DECA = 124;;
+let _M680X_INS_DECB = 125;;
+let _M680X_INS_DECD = 126;;
+let _M680X_INS_DECE = 127;;
+let _M680X_INS_DECF = 128;;
+let _M680X_INS_DECW = 129;;
+let _M680X_INS_DECX = 130;;
+let _M680X_INS_DES = 131;;
+let _M680X_INS_DEX = 132;;
+let _M680X_INS_DEY = 133;;
+let _M680X_INS_DIV = 134;;
+let _M680X_INS_DIVD = 135;;
+let _M680X_INS_DIVQ = 136;;
+let _M680X_INS_EDIV = 137;;
+let _M680X_INS_EDIVS = 138;;
+let _M680X_INS_EIM = 139;;
+let _M680X_INS_EMACS = 140;;
+let _M680X_INS_EMAXD = 141;;
+let _M680X_INS_EMAXM = 142;;
+let _M680X_INS_EMIND = 143;;
+let _M680X_INS_EMINM = 144;;
+let _M680X_INS_EMUL = 145;;
+let _M680X_INS_EMULS = 146;;
+let _M680X_INS_EOR = 147;;
+let _M680X_INS_EORA = 148;;
+let _M680X_INS_EORB = 149;;
+let _M680X_INS_EORD = 150;;
+let _M680X_INS_EORR = 151;;
+let _M680X_INS_ETBL = 152;;
+let _M680X_INS_EXG = 153;;
+let _M680X_INS_FDIV = 154;;
+let _M680X_INS_IBEQ = 155;;
+let _M680X_INS_IBNE = 156;;
+let _M680X_INS_IDIV = 157;;
+let _M680X_INS_IDIVS = 158;;
+let _M680X_INS_ILLGL = 159;;
+let _M680X_INS_INC = 160;;
+let _M680X_INS_INCA = 161;;
+let _M680X_INS_INCB = 162;;
+let _M680X_INS_INCD = 163;;
+let _M680X_INS_INCE = 164;;
+let _M680X_INS_INCF = 165;;
+let _M680X_INS_INCW = 166;;
+let _M680X_INS_INCX = 167;;
+let _M680X_INS_INS = 168;;
+let _M680X_INS_INX = 169;;
+let _M680X_INS_INY = 170;;
+let _M680X_INS_JMP = 171;;
+let _M680X_INS_JSR = 172;;
+let _M680X_INS_LBCC = 173;;
+let _M680X_INS_LBCS = 174;;
+let _M680X_INS_LBEQ = 175;;
+let _M680X_INS_LBGE = 176;;
+let _M680X_INS_LBGT = 177;;
+let _M680X_INS_LBHI = 178;;
+let _M680X_INS_LBLE = 179;;
+let _M680X_INS_LBLS = 180;;
+let _M680X_INS_LBLT = 181;;
+let _M680X_INS_LBMI = 182;;
+let _M680X_INS_LBNE = 183;;
+let _M680X_INS_LBPL = 184;;
+let _M680X_INS_LBRA = 185;;
+let _M680X_INS_LBRN = 186;;
+let _M680X_INS_LBSR = 187;;
+let _M680X_INS_LBVC = 188;;
+let _M680X_INS_LBVS = 189;;
+let _M680X_INS_LDA = 190;;
+let _M680X_INS_LDAA = 191;;
+let _M680X_INS_LDAB = 192;;
+let _M680X_INS_LDB = 193;;
+let _M680X_INS_LDBT = 194;;
+let _M680X_INS_LDD = 195;;
+let _M680X_INS_LDE = 196;;
+let _M680X_INS_LDF = 197;;
+let _M680X_INS_LDHX = 198;;
+let _M680X_INS_LDMD = 199;;
+let _M680X_INS_LDQ = 200;;
+let _M680X_INS_LDS = 201;;
+let _M680X_INS_LDU = 202;;
+let _M680X_INS_LDW = 203;;
+let _M680X_INS_LDX = 204;;
+let _M680X_INS_LDY = 205;;
+let _M680X_INS_LEAS = 206;;
+let _M680X_INS_LEAU = 207;;
+let _M680X_INS_LEAX = 208;;
+let _M680X_INS_LEAY = 209;;
+let _M680X_INS_LSL = 210;;
+let _M680X_INS_LSLA = 211;;
+let _M680X_INS_LSLB = 212;;
+let _M680X_INS_LSLD = 213;;
+let _M680X_INS_LSLX = 214;;
+let _M680X_INS_LSR = 215;;
+let _M680X_INS_LSRA = 216;;
+let _M680X_INS_LSRB = 217;;
+let _M680X_INS_LSRD = 218;;
+let _M680X_INS_LSRW = 219;;
+let _M680X_INS_LSRX = 220;;
+let _M680X_INS_MAXA = 221;;
+let _M680X_INS_MAXM = 222;;
+let _M680X_INS_MEM = 223;;
+let _M680X_INS_MINA = 224;;
+let _M680X_INS_MINM = 225;;
+let _M680X_INS_MOV = 226;;
+let _M680X_INS_MOVB = 227;;
+let _M680X_INS_MOVW = 228;;
+let _M680X_INS_MUL = 229;;
+let _M680X_INS_MULD = 230;;
+let _M680X_INS_NEG = 231;;
+let _M680X_INS_NEGA = 232;;
+let _M680X_INS_NEGB = 233;;
+let _M680X_INS_NEGD = 234;;
+let _M680X_INS_NEGX = 235;;
+let _M680X_INS_NOP = 236;;
+let _M680X_INS_NSA = 237;;
+let _M680X_INS_OIM = 238;;
+let _M680X_INS_ORA = 239;;
+let _M680X_INS_ORAA = 240;;
+let _M680X_INS_ORAB = 241;;
+let _M680X_INS_ORB = 242;;
+let _M680X_INS_ORCC = 243;;
+let _M680X_INS_ORD = 244;;
+let _M680X_INS_ORR = 245;;
+let _M680X_INS_PSHA = 246;;
+let _M680X_INS_PSHB = 247;;
+let _M680X_INS_PSHC = 248;;
+let _M680X_INS_PSHD = 249;;
+let _M680X_INS_PSHH = 250;;
+let _M680X_INS_PSHS = 251;;
+let _M680X_INS_PSHSW = 252;;
+let _M680X_INS_PSHU = 253;;
+let _M680X_INS_PSHUW = 254;;
+let _M680X_INS_PSHX = 255;;
+let _M680X_INS_PSHY = 256;;
+let _M680X_INS_PULA = 257;;
+let _M680X_INS_PULB = 258;;
+let _M680X_INS_PULC = 259;;
+let _M680X_INS_PULD = 260;;
+let _M680X_INS_PULH = 261;;
+let _M680X_INS_PULS = 262;;
+let _M680X_INS_PULSW = 263;;
+let _M680X_INS_PULU = 264;;
+let _M680X_INS_PULUW = 265;;
+let _M680X_INS_PULX = 266;;
+let _M680X_INS_PULY = 267;;
+let _M680X_INS_REV = 268;;
+let _M680X_INS_REVW = 269;;
+let _M680X_INS_ROL = 270;;
+let _M680X_INS_ROLA = 271;;
+let _M680X_INS_ROLB = 272;;
+let _M680X_INS_ROLD = 273;;
+let _M680X_INS_ROLW = 274;;
+let _M680X_INS_ROLX = 275;;
+let _M680X_INS_ROR = 276;;
+let _M680X_INS_RORA = 277;;
+let _M680X_INS_RORB = 278;;
+let _M680X_INS_RORD = 279;;
+let _M680X_INS_RORW = 280;;
+let _M680X_INS_RORX = 281;;
+let _M680X_INS_RSP = 282;;
+let _M680X_INS_RTC = 283;;
+let _M680X_INS_RTI = 284;;
+let _M680X_INS_RTS = 285;;
+let _M680X_INS_SBA = 286;;
+let _M680X_INS_SBC = 287;;
+let _M680X_INS_SBCA = 288;;
+let _M680X_INS_SBCB = 289;;
+let _M680X_INS_SBCD = 290;;
+let _M680X_INS_SBCR = 291;;
+let _M680X_INS_SEC = 292;;
+let _M680X_INS_SEI = 293;;
+let _M680X_INS_SEV = 294;;
+let _M680X_INS_SEX = 295;;
+let _M680X_INS_SEXW = 296;;
+let _M680X_INS_SLP = 297;;
+let _M680X_INS_STA = 298;;
+let _M680X_INS_STAA = 299;;
+let _M680X_INS_STAB = 300;;
+let _M680X_INS_STB = 301;;
+let _M680X_INS_STBT = 302;;
+let _M680X_INS_STD = 303;;
+let _M680X_INS_STE = 304;;
+let _M680X_INS_STF = 305;;
+let _M680X_INS_STOP = 306;;
+let _M680X_INS_STHX = 307;;
+let _M680X_INS_STQ = 308;;
+let _M680X_INS_STS = 309;;
+let _M680X_INS_STU = 310;;
+let _M680X_INS_STW = 311;;
+let _M680X_INS_STX = 312;;
+let _M680X_INS_STY = 313;;
+let _M680X_INS_SUB = 314;;
+let _M680X_INS_SUBA = 315;;
+let _M680X_INS_SUBB = 316;;
+let _M680X_INS_SUBD = 317;;
+let _M680X_INS_SUBE = 318;;
+let _M680X_INS_SUBF = 319;;
+let _M680X_INS_SUBR = 320;;
+let _M680X_INS_SUBW = 321;;
+let _M680X_INS_SWI = 322;;
+let _M680X_INS_SWI2 = 323;;
+let _M680X_INS_SWI3 = 324;;
+let _M680X_INS_SYNC = 325;;
+let _M680X_INS_TAB = 326;;
+let _M680X_INS_TAP = 327;;
+let _M680X_INS_TAX = 328;;
+let _M680X_INS_TBA = 329;;
+let _M680X_INS_TBEQ = 330;;
+let _M680X_INS_TBL = 331;;
+let _M680X_INS_TBNE = 332;;
+let _M680X_INS_TEST = 333;;
+let _M680X_INS_TFM = 334;;
+let _M680X_INS_TFR = 335;;
+let _M680X_INS_TIM = 336;;
+let _M680X_INS_TPA = 337;;
+let _M680X_INS_TST = 338;;
+let _M680X_INS_TSTA = 339;;
+let _M680X_INS_TSTB = 340;;
+let _M680X_INS_TSTD = 341;;
+let _M680X_INS_TSTE = 342;;
+let _M680X_INS_TSTF = 343;;
+let _M680X_INS_TSTW = 344;;
+let _M680X_INS_TSTX = 345;;
+let _M680X_INS_TSX = 346;;
+let _M680X_INS_TSY = 347;;
+let _M680X_INS_TXA = 348;;
+let _M680X_INS_TXS = 349;;
+let _M680X_INS_TYS = 350;;
+let _M680X_INS_WAI = 351;;
+let _M680X_INS_WAIT = 352;;
+let _M680X_INS_WAV = 353;;
+let _M680X_INS_WAVR = 354;;
+let _M680X_INS_XGDX = 355;;
+let _M680X_INS_XGDY = 356;;
+let _M680X_INS_ENDING = 357;;
diff --git a/capstone/bindings/ocaml/m68k_const.ml b/capstone/bindings/ocaml/m68k_const.ml
new file mode 100644
index 000000000..f060d4ff5
--- /dev/null
+++ b/capstone/bindings/ocaml/m68k_const.ml
@@ -0,0 +1,485 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.ml] *)
+let _M68K_OPERAND_COUNT = 4;;
+
+let _M68K_REG_INVALID = 0;;
+let _M68K_REG_D0 = 1;;
+let _M68K_REG_D1 = 2;;
+let _M68K_REG_D2 = 3;;
+let _M68K_REG_D3 = 4;;
+let _M68K_REG_D4 = 5;;
+let _M68K_REG_D5 = 6;;
+let _M68K_REG_D6 = 7;;
+let _M68K_REG_D7 = 8;;
+let _M68K_REG_A0 = 9;;
+let _M68K_REG_A1 = 10;;
+let _M68K_REG_A2 = 11;;
+let _M68K_REG_A3 = 12;;
+let _M68K_REG_A4 = 13;;
+let _M68K_REG_A5 = 14;;
+let _M68K_REG_A6 = 15;;
+let _M68K_REG_A7 = 16;;
+let _M68K_REG_FP0 = 17;;
+let _M68K_REG_FP1 = 18;;
+let _M68K_REG_FP2 = 19;;
+let _M68K_REG_FP3 = 20;;
+let _M68K_REG_FP4 = 21;;
+let _M68K_REG_FP5 = 22;;
+let _M68K_REG_FP6 = 23;;
+let _M68K_REG_FP7 = 24;;
+let _M68K_REG_PC = 25;;
+let _M68K_REG_SR = 26;;
+let _M68K_REG_CCR = 27;;
+let _M68K_REG_SFC = 28;;
+let _M68K_REG_DFC = 29;;
+let _M68K_REG_USP = 30;;
+let _M68K_REG_VBR = 31;;
+let _M68K_REG_CACR = 32;;
+let _M68K_REG_CAAR = 33;;
+let _M68K_REG_MSP = 34;;
+let _M68K_REG_ISP = 35;;
+let _M68K_REG_TC = 36;;
+let _M68K_REG_ITT0 = 37;;
+let _M68K_REG_ITT1 = 38;;
+let _M68K_REG_DTT0 = 39;;
+let _M68K_REG_DTT1 = 40;;
+let _M68K_REG_MMUSR = 41;;
+let _M68K_REG_URP = 42;;
+let _M68K_REG_SRP = 43;;
+let _M68K_REG_FPCR = 44;;
+let _M68K_REG_FPSR = 45;;
+let _M68K_REG_FPIAR = 46;;
+let _M68K_REG_ENDING = 47;;
+
+let _M68K_AM_NONE = 0;;
+let _M68K_AM_REG_DIRECT_DATA = 1;;
+let _M68K_AM_REG_DIRECT_ADDR = 2;;
+let _M68K_AM_REGI_ADDR = 3;;
+let _M68K_AM_REGI_ADDR_POST_INC = 4;;
+let _M68K_AM_REGI_ADDR_PRE_DEC = 5;;
+let _M68K_AM_REGI_ADDR_DISP = 6;;
+let _M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;;
+let _M68K_AM_AREGI_INDEX_BASE_DISP = 8;;
+let _M68K_AM_MEMI_POST_INDEX = 9;;
+let _M68K_AM_MEMI_PRE_INDEX = 10;;
+let _M68K_AM_PCI_DISP = 11;;
+let _M68K_AM_PCI_INDEX_8_BIT_DISP = 12;;
+let _M68K_AM_PCI_INDEX_BASE_DISP = 13;;
+let _M68K_AM_PC_MEMI_POST_INDEX = 14;;
+let _M68K_AM_PC_MEMI_PRE_INDEX = 15;;
+let _M68K_AM_ABSOLUTE_DATA_SHORT = 16;;
+let _M68K_AM_ABSOLUTE_DATA_LONG = 17;;
+let _M68K_AM_IMMEDIATE = 18;;
+let _M68K_AM_BRANCH_DISPLACEMENT = 19;;
+
+let _M68K_OP_INVALID = 0;;
+let _M68K_OP_REG = 1;;
+let _M68K_OP_IMM = 2;;
+let _M68K_OP_MEM = 3;;
+let _M68K_OP_FP_SINGLE = 4;;
+let _M68K_OP_FP_DOUBLE = 5;;
+let _M68K_OP_REG_BITS = 6;;
+let _M68K_OP_REG_PAIR = 7;;
+let _M68K_OP_BR_DISP = 8;;
+
+let _M68K_OP_BR_DISP_SIZE_INVALID = 0;;
+let _M68K_OP_BR_DISP_SIZE_BYTE = 1;;
+let _M68K_OP_BR_DISP_SIZE_WORD = 2;;
+let _M68K_OP_BR_DISP_SIZE_LONG = 4;;
+
+let _M68K_CPU_SIZE_NONE = 0;;
+let _M68K_CPU_SIZE_BYTE = 1;;
+let _M68K_CPU_SIZE_WORD = 2;;
+let _M68K_CPU_SIZE_LONG = 4;;
+
+let _M68K_FPU_SIZE_NONE = 0;;
+let _M68K_FPU_SIZE_SINGLE = 4;;
+let _M68K_FPU_SIZE_DOUBLE = 8;;
+let _M68K_FPU_SIZE_EXTENDED = 12;;
+
+let _M68K_SIZE_TYPE_INVALID = 0;;
+let _M68K_SIZE_TYPE_CPU = 1;;
+let _M68K_SIZE_TYPE_FPU = 2;;
+
+let _M68K_INS_INVALID = 0;;
+let _M68K_INS_ABCD = 1;;
+let _M68K_INS_ADD = 2;;
+let _M68K_INS_ADDA = 3;;
+let _M68K_INS_ADDI = 4;;
+let _M68K_INS_ADDQ = 5;;
+let _M68K_INS_ADDX = 6;;
+let _M68K_INS_AND = 7;;
+let _M68K_INS_ANDI = 8;;
+let _M68K_INS_ASL = 9;;
+let _M68K_INS_ASR = 10;;
+let _M68K_INS_BHS = 11;;
+let _M68K_INS_BLO = 12;;
+let _M68K_INS_BHI = 13;;
+let _M68K_INS_BLS = 14;;
+let _M68K_INS_BCC = 15;;
+let _M68K_INS_BCS = 16;;
+let _M68K_INS_BNE = 17;;
+let _M68K_INS_BEQ = 18;;
+let _M68K_INS_BVC = 19;;
+let _M68K_INS_BVS = 20;;
+let _M68K_INS_BPL = 21;;
+let _M68K_INS_BMI = 22;;
+let _M68K_INS_BGE = 23;;
+let _M68K_INS_BLT = 24;;
+let _M68K_INS_BGT = 25;;
+let _M68K_INS_BLE = 26;;
+let _M68K_INS_BRA = 27;;
+let _M68K_INS_BSR = 28;;
+let _M68K_INS_BCHG = 29;;
+let _M68K_INS_BCLR = 30;;
+let _M68K_INS_BSET = 31;;
+let _M68K_INS_BTST = 32;;
+let _M68K_INS_BFCHG = 33;;
+let _M68K_INS_BFCLR = 34;;
+let _M68K_INS_BFEXTS = 35;;
+let _M68K_INS_BFEXTU = 36;;
+let _M68K_INS_BFFFO = 37;;
+let _M68K_INS_BFINS = 38;;
+let _M68K_INS_BFSET = 39;;
+let _M68K_INS_BFTST = 40;;
+let _M68K_INS_BKPT = 41;;
+let _M68K_INS_CALLM = 42;;
+let _M68K_INS_CAS = 43;;
+let _M68K_INS_CAS2 = 44;;
+let _M68K_INS_CHK = 45;;
+let _M68K_INS_CHK2 = 46;;
+let _M68K_INS_CLR = 47;;
+let _M68K_INS_CMP = 48;;
+let _M68K_INS_CMPA = 49;;
+let _M68K_INS_CMPI = 50;;
+let _M68K_INS_CMPM = 51;;
+let _M68K_INS_CMP2 = 52;;
+let _M68K_INS_CINVL = 53;;
+let _M68K_INS_CINVP = 54;;
+let _M68K_INS_CINVA = 55;;
+let _M68K_INS_CPUSHL = 56;;
+let _M68K_INS_CPUSHP = 57;;
+let _M68K_INS_CPUSHA = 58;;
+let _M68K_INS_DBT = 59;;
+let _M68K_INS_DBF = 60;;
+let _M68K_INS_DBHI = 61;;
+let _M68K_INS_DBLS = 62;;
+let _M68K_INS_DBCC = 63;;
+let _M68K_INS_DBCS = 64;;
+let _M68K_INS_DBNE = 65;;
+let _M68K_INS_DBEQ = 66;;
+let _M68K_INS_DBVC = 67;;
+let _M68K_INS_DBVS = 68;;
+let _M68K_INS_DBPL = 69;;
+let _M68K_INS_DBMI = 70;;
+let _M68K_INS_DBGE = 71;;
+let _M68K_INS_DBLT = 72;;
+let _M68K_INS_DBGT = 73;;
+let _M68K_INS_DBLE = 74;;
+let _M68K_INS_DBRA = 75;;
+let _M68K_INS_DIVS = 76;;
+let _M68K_INS_DIVSL = 77;;
+let _M68K_INS_DIVU = 78;;
+let _M68K_INS_DIVUL = 79;;
+let _M68K_INS_EOR = 80;;
+let _M68K_INS_EORI = 81;;
+let _M68K_INS_EXG = 82;;
+let _M68K_INS_EXT = 83;;
+let _M68K_INS_EXTB = 84;;
+let _M68K_INS_FABS = 85;;
+let _M68K_INS_FSABS = 86;;
+let _M68K_INS_FDABS = 87;;
+let _M68K_INS_FACOS = 88;;
+let _M68K_INS_FADD = 89;;
+let _M68K_INS_FSADD = 90;;
+let _M68K_INS_FDADD = 91;;
+let _M68K_INS_FASIN = 92;;
+let _M68K_INS_FATAN = 93;;
+let _M68K_INS_FATANH = 94;;
+let _M68K_INS_FBF = 95;;
+let _M68K_INS_FBEQ = 96;;
+let _M68K_INS_FBOGT = 97;;
+let _M68K_INS_FBOGE = 98;;
+let _M68K_INS_FBOLT = 99;;
+let _M68K_INS_FBOLE = 100;;
+let _M68K_INS_FBOGL = 101;;
+let _M68K_INS_FBOR = 102;;
+let _M68K_INS_FBUN = 103;;
+let _M68K_INS_FBUEQ = 104;;
+let _M68K_INS_FBUGT = 105;;
+let _M68K_INS_FBUGE = 106;;
+let _M68K_INS_FBULT = 107;;
+let _M68K_INS_FBULE = 108;;
+let _M68K_INS_FBNE = 109;;
+let _M68K_INS_FBT = 110;;
+let _M68K_INS_FBSF = 111;;
+let _M68K_INS_FBSEQ = 112;;
+let _M68K_INS_FBGT = 113;;
+let _M68K_INS_FBGE = 114;;
+let _M68K_INS_FBLT = 115;;
+let _M68K_INS_FBLE = 116;;
+let _M68K_INS_FBGL = 117;;
+let _M68K_INS_FBGLE = 118;;
+let _M68K_INS_FBNGLE = 119;;
+let _M68K_INS_FBNGL = 120;;
+let _M68K_INS_FBNLE = 121;;
+let _M68K_INS_FBNLT = 122;;
+let _M68K_INS_FBNGE = 123;;
+let _M68K_INS_FBNGT = 124;;
+let _M68K_INS_FBSNE = 125;;
+let _M68K_INS_FBST = 126;;
+let _M68K_INS_FCMP = 127;;
+let _M68K_INS_FCOS = 128;;
+let _M68K_INS_FCOSH = 129;;
+let _M68K_INS_FDBF = 130;;
+let _M68K_INS_FDBEQ = 131;;
+let _M68K_INS_FDBOGT = 132;;
+let _M68K_INS_FDBOGE = 133;;
+let _M68K_INS_FDBOLT = 134;;
+let _M68K_INS_FDBOLE = 135;;
+let _M68K_INS_FDBOGL = 136;;
+let _M68K_INS_FDBOR = 137;;
+let _M68K_INS_FDBUN = 138;;
+let _M68K_INS_FDBUEQ = 139;;
+let _M68K_INS_FDBUGT = 140;;
+let _M68K_INS_FDBUGE = 141;;
+let _M68K_INS_FDBULT = 142;;
+let _M68K_INS_FDBULE = 143;;
+let _M68K_INS_FDBNE = 144;;
+let _M68K_INS_FDBT = 145;;
+let _M68K_INS_FDBSF = 146;;
+let _M68K_INS_FDBSEQ = 147;;
+let _M68K_INS_FDBGT = 148;;
+let _M68K_INS_FDBGE = 149;;
+let _M68K_INS_FDBLT = 150;;
+let _M68K_INS_FDBLE = 151;;
+let _M68K_INS_FDBGL = 152;;
+let _M68K_INS_FDBGLE = 153;;
+let _M68K_INS_FDBNGLE = 154;;
+let _M68K_INS_FDBNGL = 155;;
+let _M68K_INS_FDBNLE = 156;;
+let _M68K_INS_FDBNLT = 157;;
+let _M68K_INS_FDBNGE = 158;;
+let _M68K_INS_FDBNGT = 159;;
+let _M68K_INS_FDBSNE = 160;;
+let _M68K_INS_FDBST = 161;;
+let _M68K_INS_FDIV = 162;;
+let _M68K_INS_FSDIV = 163;;
+let _M68K_INS_FDDIV = 164;;
+let _M68K_INS_FETOX = 165;;
+let _M68K_INS_FETOXM1 = 166;;
+let _M68K_INS_FGETEXP = 167;;
+let _M68K_INS_FGETMAN = 168;;
+let _M68K_INS_FINT = 169;;
+let _M68K_INS_FINTRZ = 170;;
+let _M68K_INS_FLOG10 = 171;;
+let _M68K_INS_FLOG2 = 172;;
+let _M68K_INS_FLOGN = 173;;
+let _M68K_INS_FLOGNP1 = 174;;
+let _M68K_INS_FMOD = 175;;
+let _M68K_INS_FMOVE = 176;;
+let _M68K_INS_FSMOVE = 177;;
+let _M68K_INS_FDMOVE = 178;;
+let _M68K_INS_FMOVECR = 179;;
+let _M68K_INS_FMOVEM = 180;;
+let _M68K_INS_FMUL = 181;;
+let _M68K_INS_FSMUL = 182;;
+let _M68K_INS_FDMUL = 183;;
+let _M68K_INS_FNEG = 184;;
+let _M68K_INS_FSNEG = 185;;
+let _M68K_INS_FDNEG = 186;;
+let _M68K_INS_FNOP = 187;;
+let _M68K_INS_FREM = 188;;
+let _M68K_INS_FRESTORE = 189;;
+let _M68K_INS_FSAVE = 190;;
+let _M68K_INS_FSCALE = 191;;
+let _M68K_INS_FSGLDIV = 192;;
+let _M68K_INS_FSGLMUL = 193;;
+let _M68K_INS_FSIN = 194;;
+let _M68K_INS_FSINCOS = 195;;
+let _M68K_INS_FSINH = 196;;
+let _M68K_INS_FSQRT = 197;;
+let _M68K_INS_FSSQRT = 198;;
+let _M68K_INS_FDSQRT = 199;;
+let _M68K_INS_FSF = 200;;
+let _M68K_INS_FSBEQ = 201;;
+let _M68K_INS_FSOGT = 202;;
+let _M68K_INS_FSOGE = 203;;
+let _M68K_INS_FSOLT = 204;;
+let _M68K_INS_FSOLE = 205;;
+let _M68K_INS_FSOGL = 206;;
+let _M68K_INS_FSOR = 207;;
+let _M68K_INS_FSUN = 208;;
+let _M68K_INS_FSUEQ = 209;;
+let _M68K_INS_FSUGT = 210;;
+let _M68K_INS_FSUGE = 211;;
+let _M68K_INS_FSULT = 212;;
+let _M68K_INS_FSULE = 213;;
+let _M68K_INS_FSNE = 214;;
+let _M68K_INS_FST = 215;;
+let _M68K_INS_FSSF = 216;;
+let _M68K_INS_FSSEQ = 217;;
+let _M68K_INS_FSGT = 218;;
+let _M68K_INS_FSGE = 219;;
+let _M68K_INS_FSLT = 220;;
+let _M68K_INS_FSLE = 221;;
+let _M68K_INS_FSGL = 222;;
+let _M68K_INS_FSGLE = 223;;
+let _M68K_INS_FSNGLE = 224;;
+let _M68K_INS_FSNGL = 225;;
+let _M68K_INS_FSNLE = 226;;
+let _M68K_INS_FSNLT = 227;;
+let _M68K_INS_FSNGE = 228;;
+let _M68K_INS_FSNGT = 229;;
+let _M68K_INS_FSSNE = 230;;
+let _M68K_INS_FSST = 231;;
+let _M68K_INS_FSUB = 232;;
+let _M68K_INS_FSSUB = 233;;
+let _M68K_INS_FDSUB = 234;;
+let _M68K_INS_FTAN = 235;;
+let _M68K_INS_FTANH = 236;;
+let _M68K_INS_FTENTOX = 237;;
+let _M68K_INS_FTRAPF = 238;;
+let _M68K_INS_FTRAPEQ = 239;;
+let _M68K_INS_FTRAPOGT = 240;;
+let _M68K_INS_FTRAPOGE = 241;;
+let _M68K_INS_FTRAPOLT = 242;;
+let _M68K_INS_FTRAPOLE = 243;;
+let _M68K_INS_FTRAPOGL = 244;;
+let _M68K_INS_FTRAPOR = 245;;
+let _M68K_INS_FTRAPUN = 246;;
+let _M68K_INS_FTRAPUEQ = 247;;
+let _M68K_INS_FTRAPUGT = 248;;
+let _M68K_INS_FTRAPUGE = 249;;
+let _M68K_INS_FTRAPULT = 250;;
+let _M68K_INS_FTRAPULE = 251;;
+let _M68K_INS_FTRAPNE = 252;;
+let _M68K_INS_FTRAPT = 253;;
+let _M68K_INS_FTRAPSF = 254;;
+let _M68K_INS_FTRAPSEQ = 255;;
+let _M68K_INS_FTRAPGT = 256;;
+let _M68K_INS_FTRAPGE = 257;;
+let _M68K_INS_FTRAPLT = 258;;
+let _M68K_INS_FTRAPLE = 259;;
+let _M68K_INS_FTRAPGL = 260;;
+let _M68K_INS_FTRAPGLE = 261;;
+let _M68K_INS_FTRAPNGLE = 262;;
+let _M68K_INS_FTRAPNGL = 263;;
+let _M68K_INS_FTRAPNLE = 264;;
+let _M68K_INS_FTRAPNLT = 265;;
+let _M68K_INS_FTRAPNGE = 266;;
+let _M68K_INS_FTRAPNGT = 267;;
+let _M68K_INS_FTRAPSNE = 268;;
+let _M68K_INS_FTRAPST = 269;;
+let _M68K_INS_FTST = 270;;
+let _M68K_INS_FTWOTOX = 271;;
+let _M68K_INS_HALT = 272;;
+let _M68K_INS_ILLEGAL = 273;;
+let _M68K_INS_JMP = 274;;
+let _M68K_INS_JSR = 275;;
+let _M68K_INS_LEA = 276;;
+let _M68K_INS_LINK = 277;;
+let _M68K_INS_LPSTOP = 278;;
+let _M68K_INS_LSL = 279;;
+let _M68K_INS_LSR = 280;;
+let _M68K_INS_MOVE = 281;;
+let _M68K_INS_MOVEA = 282;;
+let _M68K_INS_MOVEC = 283;;
+let _M68K_INS_MOVEM = 284;;
+let _M68K_INS_MOVEP = 285;;
+let _M68K_INS_MOVEQ = 286;;
+let _M68K_INS_MOVES = 287;;
+let _M68K_INS_MOVE16 = 288;;
+let _M68K_INS_MULS = 289;;
+let _M68K_INS_MULU = 290;;
+let _M68K_INS_NBCD = 291;;
+let _M68K_INS_NEG = 292;;
+let _M68K_INS_NEGX = 293;;
+let _M68K_INS_NOP = 294;;
+let _M68K_INS_NOT = 295;;
+let _M68K_INS_OR = 296;;
+let _M68K_INS_ORI = 297;;
+let _M68K_INS_PACK = 298;;
+let _M68K_INS_PEA = 299;;
+let _M68K_INS_PFLUSH = 300;;
+let _M68K_INS_PFLUSHA = 301;;
+let _M68K_INS_PFLUSHAN = 302;;
+let _M68K_INS_PFLUSHN = 303;;
+let _M68K_INS_PLOADR = 304;;
+let _M68K_INS_PLOADW = 305;;
+let _M68K_INS_PLPAR = 306;;
+let _M68K_INS_PLPAW = 307;;
+let _M68K_INS_PMOVE = 308;;
+let _M68K_INS_PMOVEFD = 309;;
+let _M68K_INS_PTESTR = 310;;
+let _M68K_INS_PTESTW = 311;;
+let _M68K_INS_PULSE = 312;;
+let _M68K_INS_REMS = 313;;
+let _M68K_INS_REMU = 314;;
+let _M68K_INS_RESET = 315;;
+let _M68K_INS_ROL = 316;;
+let _M68K_INS_ROR = 317;;
+let _M68K_INS_ROXL = 318;;
+let _M68K_INS_ROXR = 319;;
+let _M68K_INS_RTD = 320;;
+let _M68K_INS_RTE = 321;;
+let _M68K_INS_RTM = 322;;
+let _M68K_INS_RTR = 323;;
+let _M68K_INS_RTS = 324;;
+let _M68K_INS_SBCD = 325;;
+let _M68K_INS_ST = 326;;
+let _M68K_INS_SF = 327;;
+let _M68K_INS_SHI = 328;;
+let _M68K_INS_SLS = 329;;
+let _M68K_INS_SCC = 330;;
+let _M68K_INS_SHS = 331;;
+let _M68K_INS_SCS = 332;;
+let _M68K_INS_SLO = 333;;
+let _M68K_INS_SNE = 334;;
+let _M68K_INS_SEQ = 335;;
+let _M68K_INS_SVC = 336;;
+let _M68K_INS_SVS = 337;;
+let _M68K_INS_SPL = 338;;
+let _M68K_INS_SMI = 339;;
+let _M68K_INS_SGE = 340;;
+let _M68K_INS_SLT = 341;;
+let _M68K_INS_SGT = 342;;
+let _M68K_INS_SLE = 343;;
+let _M68K_INS_STOP = 344;;
+let _M68K_INS_SUB = 345;;
+let _M68K_INS_SUBA = 346;;
+let _M68K_INS_SUBI = 347;;
+let _M68K_INS_SUBQ = 348;;
+let _M68K_INS_SUBX = 349;;
+let _M68K_INS_SWAP = 350;;
+let _M68K_INS_TAS = 351;;
+let _M68K_INS_TRAP = 352;;
+let _M68K_INS_TRAPV = 353;;
+let _M68K_INS_TRAPT = 354;;
+let _M68K_INS_TRAPF = 355;;
+let _M68K_INS_TRAPHI = 356;;
+let _M68K_INS_TRAPLS = 357;;
+let _M68K_INS_TRAPCC = 358;;
+let _M68K_INS_TRAPHS = 359;;
+let _M68K_INS_TRAPCS = 360;;
+let _M68K_INS_TRAPLO = 361;;
+let _M68K_INS_TRAPNE = 362;;
+let _M68K_INS_TRAPEQ = 363;;
+let _M68K_INS_TRAPVC = 364;;
+let _M68K_INS_TRAPVS = 365;;
+let _M68K_INS_TRAPPL = 366;;
+let _M68K_INS_TRAPMI = 367;;
+let _M68K_INS_TRAPGE = 368;;
+let _M68K_INS_TRAPLT = 369;;
+let _M68K_INS_TRAPGT = 370;;
+let _M68K_INS_TRAPLE = 371;;
+let _M68K_INS_TST = 372;;
+let _M68K_INS_UNLK = 373;;
+let _M68K_INS_UNPK = 374;;
+let _M68K_INS_ENDING = 375;;
+
+let _M68K_GRP_INVALID = 0;;
+let _M68K_GRP_JUMP = 1;;
+let _M68K_GRP_RET = 3;;
+let _M68K_GRP_IRET = 5;;
+let _M68K_GRP_BRANCH_RELATIVE = 7;;
+let _M68K_GRP_ENDING = 8;;
diff --git a/capstone/bindings/ocaml/mips.ml b/capstone/bindings/ocaml/mips.ml
new file mode 100644
index 000000000..f0995e352
--- /dev/null
+++ b/capstone/bindings/ocaml/mips.ml
@@ -0,0 +1,24 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Mips_const
+
+(* architecture specific info of instruction *)
+type mips_op_mem = {
+	base: int;
+	disp: int
+}
+
+type mips_op_value =
+	| MIPS_OP_INVALID of int
+	| MIPS_OP_REG of int
+	| MIPS_OP_IMM of int
+	| MIPS_OP_MEM of mips_op_mem
+
+type mips_op = {
+	value: mips_op_value;
+}
+
+type cs_mips = {
+	operands: mips_op array;
+}
diff --git a/capstone/bindings/ocaml/mips_const.ml b/capstone/bindings/ocaml/mips_const.ml
new file mode 100644
index 000000000..e0b581be6
--- /dev/null
+++ b/capstone/bindings/ocaml/mips_const.ml
@@ -0,0 +1,861 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.ml] *)
+
+let _MIPS_OP_INVALID = 0;;
+let _MIPS_OP_REG = 1;;
+let _MIPS_OP_IMM = 2;;
+let _MIPS_OP_MEM = 3;;
+
+let _MIPS_REG_INVALID = 0;;
+let _MIPS_REG_PC = 1;;
+let _MIPS_REG_0 = 2;;
+let _MIPS_REG_1 = 3;;
+let _MIPS_REG_2 = 4;;
+let _MIPS_REG_3 = 5;;
+let _MIPS_REG_4 = 6;;
+let _MIPS_REG_5 = 7;;
+let _MIPS_REG_6 = 8;;
+let _MIPS_REG_7 = 9;;
+let _MIPS_REG_8 = 10;;
+let _MIPS_REG_9 = 11;;
+let _MIPS_REG_10 = 12;;
+let _MIPS_REG_11 = 13;;
+let _MIPS_REG_12 = 14;;
+let _MIPS_REG_13 = 15;;
+let _MIPS_REG_14 = 16;;
+let _MIPS_REG_15 = 17;;
+let _MIPS_REG_16 = 18;;
+let _MIPS_REG_17 = 19;;
+let _MIPS_REG_18 = 20;;
+let _MIPS_REG_19 = 21;;
+let _MIPS_REG_20 = 22;;
+let _MIPS_REG_21 = 23;;
+let _MIPS_REG_22 = 24;;
+let _MIPS_REG_23 = 25;;
+let _MIPS_REG_24 = 26;;
+let _MIPS_REG_25 = 27;;
+let _MIPS_REG_26 = 28;;
+let _MIPS_REG_27 = 29;;
+let _MIPS_REG_28 = 30;;
+let _MIPS_REG_29 = 31;;
+let _MIPS_REG_30 = 32;;
+let _MIPS_REG_31 = 33;;
+let _MIPS_REG_DSPCCOND = 34;;
+let _MIPS_REG_DSPCARRY = 35;;
+let _MIPS_REG_DSPEFI = 36;;
+let _MIPS_REG_DSPOUTFLAG = 37;;
+let _MIPS_REG_DSPOUTFLAG16_19 = 38;;
+let _MIPS_REG_DSPOUTFLAG20 = 39;;
+let _MIPS_REG_DSPOUTFLAG21 = 40;;
+let _MIPS_REG_DSPOUTFLAG22 = 41;;
+let _MIPS_REG_DSPOUTFLAG23 = 42;;
+let _MIPS_REG_DSPPOS = 43;;
+let _MIPS_REG_DSPSCOUNT = 44;;
+let _MIPS_REG_AC0 = 45;;
+let _MIPS_REG_AC1 = 46;;
+let _MIPS_REG_AC2 = 47;;
+let _MIPS_REG_AC3 = 48;;
+let _MIPS_REG_CC0 = 49;;
+let _MIPS_REG_CC1 = 50;;
+let _MIPS_REG_CC2 = 51;;
+let _MIPS_REG_CC3 = 52;;
+let _MIPS_REG_CC4 = 53;;
+let _MIPS_REG_CC5 = 54;;
+let _MIPS_REG_CC6 = 55;;
+let _MIPS_REG_CC7 = 56;;
+let _MIPS_REG_F0 = 57;;
+let _MIPS_REG_F1 = 58;;
+let _MIPS_REG_F2 = 59;;
+let _MIPS_REG_F3 = 60;;
+let _MIPS_REG_F4 = 61;;
+let _MIPS_REG_F5 = 62;;
+let _MIPS_REG_F6 = 63;;
+let _MIPS_REG_F7 = 64;;
+let _MIPS_REG_F8 = 65;;
+let _MIPS_REG_F9 = 66;;
+let _MIPS_REG_F10 = 67;;
+let _MIPS_REG_F11 = 68;;
+let _MIPS_REG_F12 = 69;;
+let _MIPS_REG_F13 = 70;;
+let _MIPS_REG_F14 = 71;;
+let _MIPS_REG_F15 = 72;;
+let _MIPS_REG_F16 = 73;;
+let _MIPS_REG_F17 = 74;;
+let _MIPS_REG_F18 = 75;;
+let _MIPS_REG_F19 = 76;;
+let _MIPS_REG_F20 = 77;;
+let _MIPS_REG_F21 = 78;;
+let _MIPS_REG_F22 = 79;;
+let _MIPS_REG_F23 = 80;;
+let _MIPS_REG_F24 = 81;;
+let _MIPS_REG_F25 = 82;;
+let _MIPS_REG_F26 = 83;;
+let _MIPS_REG_F27 = 84;;
+let _MIPS_REG_F28 = 85;;
+let _MIPS_REG_F29 = 86;;
+let _MIPS_REG_F30 = 87;;
+let _MIPS_REG_F31 = 88;;
+let _MIPS_REG_FCC0 = 89;;
+let _MIPS_REG_FCC1 = 90;;
+let _MIPS_REG_FCC2 = 91;;
+let _MIPS_REG_FCC3 = 92;;
+let _MIPS_REG_FCC4 = 93;;
+let _MIPS_REG_FCC5 = 94;;
+let _MIPS_REG_FCC6 = 95;;
+let _MIPS_REG_FCC7 = 96;;
+let _MIPS_REG_W0 = 97;;
+let _MIPS_REG_W1 = 98;;
+let _MIPS_REG_W2 = 99;;
+let _MIPS_REG_W3 = 100;;
+let _MIPS_REG_W4 = 101;;
+let _MIPS_REG_W5 = 102;;
+let _MIPS_REG_W6 = 103;;
+let _MIPS_REG_W7 = 104;;
+let _MIPS_REG_W8 = 105;;
+let _MIPS_REG_W9 = 106;;
+let _MIPS_REG_W10 = 107;;
+let _MIPS_REG_W11 = 108;;
+let _MIPS_REG_W12 = 109;;
+let _MIPS_REG_W13 = 110;;
+let _MIPS_REG_W14 = 111;;
+let _MIPS_REG_W15 = 112;;
+let _MIPS_REG_W16 = 113;;
+let _MIPS_REG_W17 = 114;;
+let _MIPS_REG_W18 = 115;;
+let _MIPS_REG_W19 = 116;;
+let _MIPS_REG_W20 = 117;;
+let _MIPS_REG_W21 = 118;;
+let _MIPS_REG_W22 = 119;;
+let _MIPS_REG_W23 = 120;;
+let _MIPS_REG_W24 = 121;;
+let _MIPS_REG_W25 = 122;;
+let _MIPS_REG_W26 = 123;;
+let _MIPS_REG_W27 = 124;;
+let _MIPS_REG_W28 = 125;;
+let _MIPS_REG_W29 = 126;;
+let _MIPS_REG_W30 = 127;;
+let _MIPS_REG_W31 = 128;;
+let _MIPS_REG_HI = 129;;
+let _MIPS_REG_LO = 130;;
+let _MIPS_REG_P0 = 131;;
+let _MIPS_REG_P1 = 132;;
+let _MIPS_REG_P2 = 133;;
+let _MIPS_REG_MPL0 = 134;;
+let _MIPS_REG_MPL1 = 135;;
+let _MIPS_REG_MPL2 = 136;;
+let _MIPS_REG_ENDING = 137;;
+let _MIPS_REG_ZERO = _MIPS_REG_0;;
+let _MIPS_REG_AT = _MIPS_REG_1;;
+let _MIPS_REG_V0 = _MIPS_REG_2;;
+let _MIPS_REG_V1 = _MIPS_REG_3;;
+let _MIPS_REG_A0 = _MIPS_REG_4;;
+let _MIPS_REG_A1 = _MIPS_REG_5;;
+let _MIPS_REG_A2 = _MIPS_REG_6;;
+let _MIPS_REG_A3 = _MIPS_REG_7;;
+let _MIPS_REG_T0 = _MIPS_REG_8;;
+let _MIPS_REG_T1 = _MIPS_REG_9;;
+let _MIPS_REG_T2 = _MIPS_REG_10;;
+let _MIPS_REG_T3 = _MIPS_REG_11;;
+let _MIPS_REG_T4 = _MIPS_REG_12;;
+let _MIPS_REG_T5 = _MIPS_REG_13;;
+let _MIPS_REG_T6 = _MIPS_REG_14;;
+let _MIPS_REG_T7 = _MIPS_REG_15;;
+let _MIPS_REG_S0 = _MIPS_REG_16;;
+let _MIPS_REG_S1 = _MIPS_REG_17;;
+let _MIPS_REG_S2 = _MIPS_REG_18;;
+let _MIPS_REG_S3 = _MIPS_REG_19;;
+let _MIPS_REG_S4 = _MIPS_REG_20;;
+let _MIPS_REG_S5 = _MIPS_REG_21;;
+let _MIPS_REG_S6 = _MIPS_REG_22;;
+let _MIPS_REG_S7 = _MIPS_REG_23;;
+let _MIPS_REG_T8 = _MIPS_REG_24;;
+let _MIPS_REG_T9 = _MIPS_REG_25;;
+let _MIPS_REG_K0 = _MIPS_REG_26;;
+let _MIPS_REG_K1 = _MIPS_REG_27;;
+let _MIPS_REG_GP = _MIPS_REG_28;;
+let _MIPS_REG_SP = _MIPS_REG_29;;
+let _MIPS_REG_FP = _MIPS_REG_30;;
+let _MIPS_REG_S8 = _MIPS_REG_30;;
+let _MIPS_REG_RA = _MIPS_REG_31;;
+let _MIPS_REG_HI0 = _MIPS_REG_AC0;;
+let _MIPS_REG_HI1 = _MIPS_REG_AC1;;
+let _MIPS_REG_HI2 = _MIPS_REG_AC2;;
+let _MIPS_REG_HI3 = _MIPS_REG_AC3;;
+let _MIPS_REG_LO0 = _MIPS_REG_HI0;;
+let _MIPS_REG_LO1 = _MIPS_REG_HI1;;
+let _MIPS_REG_LO2 = _MIPS_REG_HI2;;
+let _MIPS_REG_LO3 = _MIPS_REG_HI3;;
+
+let _MIPS_INS_INVALID = 0;;
+let _MIPS_INS_ABSQ_S = 1;;
+let _MIPS_INS_ADD = 2;;
+let _MIPS_INS_ADDIUPC = 3;;
+let _MIPS_INS_ADDIUR1SP = 4;;
+let _MIPS_INS_ADDIUR2 = 5;;
+let _MIPS_INS_ADDIUS5 = 6;;
+let _MIPS_INS_ADDIUSP = 7;;
+let _MIPS_INS_ADDQH = 8;;
+let _MIPS_INS_ADDQH_R = 9;;
+let _MIPS_INS_ADDQ = 10;;
+let _MIPS_INS_ADDQ_S = 11;;
+let _MIPS_INS_ADDSC = 12;;
+let _MIPS_INS_ADDS_A = 13;;
+let _MIPS_INS_ADDS_S = 14;;
+let _MIPS_INS_ADDS_U = 15;;
+let _MIPS_INS_ADDU16 = 16;;
+let _MIPS_INS_ADDUH = 17;;
+let _MIPS_INS_ADDUH_R = 18;;
+let _MIPS_INS_ADDU = 19;;
+let _MIPS_INS_ADDU_S = 20;;
+let _MIPS_INS_ADDVI = 21;;
+let _MIPS_INS_ADDV = 22;;
+let _MIPS_INS_ADDWC = 23;;
+let _MIPS_INS_ADD_A = 24;;
+let _MIPS_INS_ADDI = 25;;
+let _MIPS_INS_ADDIU = 26;;
+let _MIPS_INS_ALIGN = 27;;
+let _MIPS_INS_ALUIPC = 28;;
+let _MIPS_INS_AND = 29;;
+let _MIPS_INS_AND16 = 30;;
+let _MIPS_INS_ANDI16 = 31;;
+let _MIPS_INS_ANDI = 32;;
+let _MIPS_INS_APPEND = 33;;
+let _MIPS_INS_ASUB_S = 34;;
+let _MIPS_INS_ASUB_U = 35;;
+let _MIPS_INS_AUI = 36;;
+let _MIPS_INS_AUIPC = 37;;
+let _MIPS_INS_AVER_S = 38;;
+let _MIPS_INS_AVER_U = 39;;
+let _MIPS_INS_AVE_S = 40;;
+let _MIPS_INS_AVE_U = 41;;
+let _MIPS_INS_B16 = 42;;
+let _MIPS_INS_BADDU = 43;;
+let _MIPS_INS_BAL = 44;;
+let _MIPS_INS_BALC = 45;;
+let _MIPS_INS_BALIGN = 46;;
+let _MIPS_INS_BBIT0 = 47;;
+let _MIPS_INS_BBIT032 = 48;;
+let _MIPS_INS_BBIT1 = 49;;
+let _MIPS_INS_BBIT132 = 50;;
+let _MIPS_INS_BC = 51;;
+let _MIPS_INS_BC0F = 52;;
+let _MIPS_INS_BC0FL = 53;;
+let _MIPS_INS_BC0T = 54;;
+let _MIPS_INS_BC0TL = 55;;
+let _MIPS_INS_BC1EQZ = 56;;
+let _MIPS_INS_BC1F = 57;;
+let _MIPS_INS_BC1FL = 58;;
+let _MIPS_INS_BC1NEZ = 59;;
+let _MIPS_INS_BC1T = 60;;
+let _MIPS_INS_BC1TL = 61;;
+let _MIPS_INS_BC2EQZ = 62;;
+let _MIPS_INS_BC2F = 63;;
+let _MIPS_INS_BC2FL = 64;;
+let _MIPS_INS_BC2NEZ = 65;;
+let _MIPS_INS_BC2T = 66;;
+let _MIPS_INS_BC2TL = 67;;
+let _MIPS_INS_BC3F = 68;;
+let _MIPS_INS_BC3FL = 69;;
+let _MIPS_INS_BC3T = 70;;
+let _MIPS_INS_BC3TL = 71;;
+let _MIPS_INS_BCLRI = 72;;
+let _MIPS_INS_BCLR = 73;;
+let _MIPS_INS_BEQ = 74;;
+let _MIPS_INS_BEQC = 75;;
+let _MIPS_INS_BEQL = 76;;
+let _MIPS_INS_BEQZ16 = 77;;
+let _MIPS_INS_BEQZALC = 78;;
+let _MIPS_INS_BEQZC = 79;;
+let _MIPS_INS_BGEC = 80;;
+let _MIPS_INS_BGEUC = 81;;
+let _MIPS_INS_BGEZ = 82;;
+let _MIPS_INS_BGEZAL = 83;;
+let _MIPS_INS_BGEZALC = 84;;
+let _MIPS_INS_BGEZALL = 85;;
+let _MIPS_INS_BGEZALS = 86;;
+let _MIPS_INS_BGEZC = 87;;
+let _MIPS_INS_BGEZL = 88;;
+let _MIPS_INS_BGTZ = 89;;
+let _MIPS_INS_BGTZALC = 90;;
+let _MIPS_INS_BGTZC = 91;;
+let _MIPS_INS_BGTZL = 92;;
+let _MIPS_INS_BINSLI = 93;;
+let _MIPS_INS_BINSL = 94;;
+let _MIPS_INS_BINSRI = 95;;
+let _MIPS_INS_BINSR = 96;;
+let _MIPS_INS_BITREV = 97;;
+let _MIPS_INS_BITSWAP = 98;;
+let _MIPS_INS_BLEZ = 99;;
+let _MIPS_INS_BLEZALC = 100;;
+let _MIPS_INS_BLEZC = 101;;
+let _MIPS_INS_BLEZL = 102;;
+let _MIPS_INS_BLTC = 103;;
+let _MIPS_INS_BLTUC = 104;;
+let _MIPS_INS_BLTZ = 105;;
+let _MIPS_INS_BLTZAL = 106;;
+let _MIPS_INS_BLTZALC = 107;;
+let _MIPS_INS_BLTZALL = 108;;
+let _MIPS_INS_BLTZALS = 109;;
+let _MIPS_INS_BLTZC = 110;;
+let _MIPS_INS_BLTZL = 111;;
+let _MIPS_INS_BMNZI = 112;;
+let _MIPS_INS_BMNZ = 113;;
+let _MIPS_INS_BMZI = 114;;
+let _MIPS_INS_BMZ = 115;;
+let _MIPS_INS_BNE = 116;;
+let _MIPS_INS_BNEC = 117;;
+let _MIPS_INS_BNEGI = 118;;
+let _MIPS_INS_BNEG = 119;;
+let _MIPS_INS_BNEL = 120;;
+let _MIPS_INS_BNEZ16 = 121;;
+let _MIPS_INS_BNEZALC = 122;;
+let _MIPS_INS_BNEZC = 123;;
+let _MIPS_INS_BNVC = 124;;
+let _MIPS_INS_BNZ = 125;;
+let _MIPS_INS_BOVC = 126;;
+let _MIPS_INS_BPOSGE32 = 127;;
+let _MIPS_INS_BREAK = 128;;
+let _MIPS_INS_BREAK16 = 129;;
+let _MIPS_INS_BSELI = 130;;
+let _MIPS_INS_BSEL = 131;;
+let _MIPS_INS_BSETI = 132;;
+let _MIPS_INS_BSET = 133;;
+let _MIPS_INS_BZ = 134;;
+let _MIPS_INS_BEQZ = 135;;
+let _MIPS_INS_B = 136;;
+let _MIPS_INS_BNEZ = 137;;
+let _MIPS_INS_BTEQZ = 138;;
+let _MIPS_INS_BTNEZ = 139;;
+let _MIPS_INS_CACHE = 140;;
+let _MIPS_INS_CEIL = 141;;
+let _MIPS_INS_CEQI = 142;;
+let _MIPS_INS_CEQ = 143;;
+let _MIPS_INS_CFC1 = 144;;
+let _MIPS_INS_CFCMSA = 145;;
+let _MIPS_INS_CINS = 146;;
+let _MIPS_INS_CINS32 = 147;;
+let _MIPS_INS_CLASS = 148;;
+let _MIPS_INS_CLEI_S = 149;;
+let _MIPS_INS_CLEI_U = 150;;
+let _MIPS_INS_CLE_S = 151;;
+let _MIPS_INS_CLE_U = 152;;
+let _MIPS_INS_CLO = 153;;
+let _MIPS_INS_CLTI_S = 154;;
+let _MIPS_INS_CLTI_U = 155;;
+let _MIPS_INS_CLT_S = 156;;
+let _MIPS_INS_CLT_U = 157;;
+let _MIPS_INS_CLZ = 158;;
+let _MIPS_INS_CMPGDU = 159;;
+let _MIPS_INS_CMPGU = 160;;
+let _MIPS_INS_CMPU = 161;;
+let _MIPS_INS_CMP = 162;;
+let _MIPS_INS_COPY_S = 163;;
+let _MIPS_INS_COPY_U = 164;;
+let _MIPS_INS_CTC1 = 165;;
+let _MIPS_INS_CTCMSA = 166;;
+let _MIPS_INS_CVT = 167;;
+let _MIPS_INS_C = 168;;
+let _MIPS_INS_CMPI = 169;;
+let _MIPS_INS_DADD = 170;;
+let _MIPS_INS_DADDI = 171;;
+let _MIPS_INS_DADDIU = 172;;
+let _MIPS_INS_DADDU = 173;;
+let _MIPS_INS_DAHI = 174;;
+let _MIPS_INS_DALIGN = 175;;
+let _MIPS_INS_DATI = 176;;
+let _MIPS_INS_DAUI = 177;;
+let _MIPS_INS_DBITSWAP = 178;;
+let _MIPS_INS_DCLO = 179;;
+let _MIPS_INS_DCLZ = 180;;
+let _MIPS_INS_DDIV = 181;;
+let _MIPS_INS_DDIVU = 182;;
+let _MIPS_INS_DERET = 183;;
+let _MIPS_INS_DEXT = 184;;
+let _MIPS_INS_DEXTM = 185;;
+let _MIPS_INS_DEXTU = 186;;
+let _MIPS_INS_DI = 187;;
+let _MIPS_INS_DINS = 188;;
+let _MIPS_INS_DINSM = 189;;
+let _MIPS_INS_DINSU = 190;;
+let _MIPS_INS_DIV = 191;;
+let _MIPS_INS_DIVU = 192;;
+let _MIPS_INS_DIV_S = 193;;
+let _MIPS_INS_DIV_U = 194;;
+let _MIPS_INS_DLSA = 195;;
+let _MIPS_INS_DMFC0 = 196;;
+let _MIPS_INS_DMFC1 = 197;;
+let _MIPS_INS_DMFC2 = 198;;
+let _MIPS_INS_DMOD = 199;;
+let _MIPS_INS_DMODU = 200;;
+let _MIPS_INS_DMTC0 = 201;;
+let _MIPS_INS_DMTC1 = 202;;
+let _MIPS_INS_DMTC2 = 203;;
+let _MIPS_INS_DMUH = 204;;
+let _MIPS_INS_DMUHU = 205;;
+let _MIPS_INS_DMUL = 206;;
+let _MIPS_INS_DMULT = 207;;
+let _MIPS_INS_DMULTU = 208;;
+let _MIPS_INS_DMULU = 209;;
+let _MIPS_INS_DOTP_S = 210;;
+let _MIPS_INS_DOTP_U = 211;;
+let _MIPS_INS_DPADD_S = 212;;
+let _MIPS_INS_DPADD_U = 213;;
+let _MIPS_INS_DPAQX_SA = 214;;
+let _MIPS_INS_DPAQX_S = 215;;
+let _MIPS_INS_DPAQ_SA = 216;;
+let _MIPS_INS_DPAQ_S = 217;;
+let _MIPS_INS_DPAU = 218;;
+let _MIPS_INS_DPAX = 219;;
+let _MIPS_INS_DPA = 220;;
+let _MIPS_INS_DPOP = 221;;
+let _MIPS_INS_DPSQX_SA = 222;;
+let _MIPS_INS_DPSQX_S = 223;;
+let _MIPS_INS_DPSQ_SA = 224;;
+let _MIPS_INS_DPSQ_S = 225;;
+let _MIPS_INS_DPSUB_S = 226;;
+let _MIPS_INS_DPSUB_U = 227;;
+let _MIPS_INS_DPSU = 228;;
+let _MIPS_INS_DPSX = 229;;
+let _MIPS_INS_DPS = 230;;
+let _MIPS_INS_DROTR = 231;;
+let _MIPS_INS_DROTR32 = 232;;
+let _MIPS_INS_DROTRV = 233;;
+let _MIPS_INS_DSBH = 234;;
+let _MIPS_INS_DSHD = 235;;
+let _MIPS_INS_DSLL = 236;;
+let _MIPS_INS_DSLL32 = 237;;
+let _MIPS_INS_DSLLV = 238;;
+let _MIPS_INS_DSRA = 239;;
+let _MIPS_INS_DSRA32 = 240;;
+let _MIPS_INS_DSRAV = 241;;
+let _MIPS_INS_DSRL = 242;;
+let _MIPS_INS_DSRL32 = 243;;
+let _MIPS_INS_DSRLV = 244;;
+let _MIPS_INS_DSUB = 245;;
+let _MIPS_INS_DSUBU = 246;;
+let _MIPS_INS_EHB = 247;;
+let _MIPS_INS_EI = 248;;
+let _MIPS_INS_ERET = 249;;
+let _MIPS_INS_EXT = 250;;
+let _MIPS_INS_EXTP = 251;;
+let _MIPS_INS_EXTPDP = 252;;
+let _MIPS_INS_EXTPDPV = 253;;
+let _MIPS_INS_EXTPV = 254;;
+let _MIPS_INS_EXTRV_RS = 255;;
+let _MIPS_INS_EXTRV_R = 256;;
+let _MIPS_INS_EXTRV_S = 257;;
+let _MIPS_INS_EXTRV = 258;;
+let _MIPS_INS_EXTR_RS = 259;;
+let _MIPS_INS_EXTR_R = 260;;
+let _MIPS_INS_EXTR_S = 261;;
+let _MIPS_INS_EXTR = 262;;
+let _MIPS_INS_EXTS = 263;;
+let _MIPS_INS_EXTS32 = 264;;
+let _MIPS_INS_ABS = 265;;
+let _MIPS_INS_FADD = 266;;
+let _MIPS_INS_FCAF = 267;;
+let _MIPS_INS_FCEQ = 268;;
+let _MIPS_INS_FCLASS = 269;;
+let _MIPS_INS_FCLE = 270;;
+let _MIPS_INS_FCLT = 271;;
+let _MIPS_INS_FCNE = 272;;
+let _MIPS_INS_FCOR = 273;;
+let _MIPS_INS_FCUEQ = 274;;
+let _MIPS_INS_FCULE = 275;;
+let _MIPS_INS_FCULT = 276;;
+let _MIPS_INS_FCUNE = 277;;
+let _MIPS_INS_FCUN = 278;;
+let _MIPS_INS_FDIV = 279;;
+let _MIPS_INS_FEXDO = 280;;
+let _MIPS_INS_FEXP2 = 281;;
+let _MIPS_INS_FEXUPL = 282;;
+let _MIPS_INS_FEXUPR = 283;;
+let _MIPS_INS_FFINT_S = 284;;
+let _MIPS_INS_FFINT_U = 285;;
+let _MIPS_INS_FFQL = 286;;
+let _MIPS_INS_FFQR = 287;;
+let _MIPS_INS_FILL = 288;;
+let _MIPS_INS_FLOG2 = 289;;
+let _MIPS_INS_FLOOR = 290;;
+let _MIPS_INS_FMADD = 291;;
+let _MIPS_INS_FMAX_A = 292;;
+let _MIPS_INS_FMAX = 293;;
+let _MIPS_INS_FMIN_A = 294;;
+let _MIPS_INS_FMIN = 295;;
+let _MIPS_INS_MOV = 296;;
+let _MIPS_INS_FMSUB = 297;;
+let _MIPS_INS_FMUL = 298;;
+let _MIPS_INS_MUL = 299;;
+let _MIPS_INS_NEG = 300;;
+let _MIPS_INS_FRCP = 301;;
+let _MIPS_INS_FRINT = 302;;
+let _MIPS_INS_FRSQRT = 303;;
+let _MIPS_INS_FSAF = 304;;
+let _MIPS_INS_FSEQ = 305;;
+let _MIPS_INS_FSLE = 306;;
+let _MIPS_INS_FSLT = 307;;
+let _MIPS_INS_FSNE = 308;;
+let _MIPS_INS_FSOR = 309;;
+let _MIPS_INS_FSQRT = 310;;
+let _MIPS_INS_SQRT = 311;;
+let _MIPS_INS_FSUB = 312;;
+let _MIPS_INS_SUB = 313;;
+let _MIPS_INS_FSUEQ = 314;;
+let _MIPS_INS_FSULE = 315;;
+let _MIPS_INS_FSULT = 316;;
+let _MIPS_INS_FSUNE = 317;;
+let _MIPS_INS_FSUN = 318;;
+let _MIPS_INS_FTINT_S = 319;;
+let _MIPS_INS_FTINT_U = 320;;
+let _MIPS_INS_FTQ = 321;;
+let _MIPS_INS_FTRUNC_S = 322;;
+let _MIPS_INS_FTRUNC_U = 323;;
+let _MIPS_INS_HADD_S = 324;;
+let _MIPS_INS_HADD_U = 325;;
+let _MIPS_INS_HSUB_S = 326;;
+let _MIPS_INS_HSUB_U = 327;;
+let _MIPS_INS_ILVEV = 328;;
+let _MIPS_INS_ILVL = 329;;
+let _MIPS_INS_ILVOD = 330;;
+let _MIPS_INS_ILVR = 331;;
+let _MIPS_INS_INS = 332;;
+let _MIPS_INS_INSERT = 333;;
+let _MIPS_INS_INSV = 334;;
+let _MIPS_INS_INSVE = 335;;
+let _MIPS_INS_J = 336;;
+let _MIPS_INS_JAL = 337;;
+let _MIPS_INS_JALR = 338;;
+let _MIPS_INS_JALRS16 = 339;;
+let _MIPS_INS_JALRS = 340;;
+let _MIPS_INS_JALS = 341;;
+let _MIPS_INS_JALX = 342;;
+let _MIPS_INS_JIALC = 343;;
+let _MIPS_INS_JIC = 344;;
+let _MIPS_INS_JR = 345;;
+let _MIPS_INS_JR16 = 346;;
+let _MIPS_INS_JRADDIUSP = 347;;
+let _MIPS_INS_JRC = 348;;
+let _MIPS_INS_JALRC = 349;;
+let _MIPS_INS_LB = 350;;
+let _MIPS_INS_LBU16 = 351;;
+let _MIPS_INS_LBUX = 352;;
+let _MIPS_INS_LBU = 353;;
+let _MIPS_INS_LD = 354;;
+let _MIPS_INS_LDC1 = 355;;
+let _MIPS_INS_LDC2 = 356;;
+let _MIPS_INS_LDC3 = 357;;
+let _MIPS_INS_LDI = 358;;
+let _MIPS_INS_LDL = 359;;
+let _MIPS_INS_LDPC = 360;;
+let _MIPS_INS_LDR = 361;;
+let _MIPS_INS_LDXC1 = 362;;
+let _MIPS_INS_LH = 363;;
+let _MIPS_INS_LHU16 = 364;;
+let _MIPS_INS_LHX = 365;;
+let _MIPS_INS_LHU = 366;;
+let _MIPS_INS_LI16 = 367;;
+let _MIPS_INS_LL = 368;;
+let _MIPS_INS_LLD = 369;;
+let _MIPS_INS_LSA = 370;;
+let _MIPS_INS_LUXC1 = 371;;
+let _MIPS_INS_LUI = 372;;
+let _MIPS_INS_LW = 373;;
+let _MIPS_INS_LW16 = 374;;
+let _MIPS_INS_LWC1 = 375;;
+let _MIPS_INS_LWC2 = 376;;
+let _MIPS_INS_LWC3 = 377;;
+let _MIPS_INS_LWL = 378;;
+let _MIPS_INS_LWM16 = 379;;
+let _MIPS_INS_LWM32 = 380;;
+let _MIPS_INS_LWPC = 381;;
+let _MIPS_INS_LWP = 382;;
+let _MIPS_INS_LWR = 383;;
+let _MIPS_INS_LWUPC = 384;;
+let _MIPS_INS_LWU = 385;;
+let _MIPS_INS_LWX = 386;;
+let _MIPS_INS_LWXC1 = 387;;
+let _MIPS_INS_LWXS = 388;;
+let _MIPS_INS_LI = 389;;
+let _MIPS_INS_MADD = 390;;
+let _MIPS_INS_MADDF = 391;;
+let _MIPS_INS_MADDR_Q = 392;;
+let _MIPS_INS_MADDU = 393;;
+let _MIPS_INS_MADDV = 394;;
+let _MIPS_INS_MADD_Q = 395;;
+let _MIPS_INS_MAQ_SA = 396;;
+let _MIPS_INS_MAQ_S = 397;;
+let _MIPS_INS_MAXA = 398;;
+let _MIPS_INS_MAXI_S = 399;;
+let _MIPS_INS_MAXI_U = 400;;
+let _MIPS_INS_MAX_A = 401;;
+let _MIPS_INS_MAX = 402;;
+let _MIPS_INS_MAX_S = 403;;
+let _MIPS_INS_MAX_U = 404;;
+let _MIPS_INS_MFC0 = 405;;
+let _MIPS_INS_MFC1 = 406;;
+let _MIPS_INS_MFC2 = 407;;
+let _MIPS_INS_MFHC1 = 408;;
+let _MIPS_INS_MFHI = 409;;
+let _MIPS_INS_MFLO = 410;;
+let _MIPS_INS_MINA = 411;;
+let _MIPS_INS_MINI_S = 412;;
+let _MIPS_INS_MINI_U = 413;;
+let _MIPS_INS_MIN_A = 414;;
+let _MIPS_INS_MIN = 415;;
+let _MIPS_INS_MIN_S = 416;;
+let _MIPS_INS_MIN_U = 417;;
+let _MIPS_INS_MOD = 418;;
+let _MIPS_INS_MODSUB = 419;;
+let _MIPS_INS_MODU = 420;;
+let _MIPS_INS_MOD_S = 421;;
+let _MIPS_INS_MOD_U = 422;;
+let _MIPS_INS_MOVE = 423;;
+let _MIPS_INS_MOVEP = 424;;
+let _MIPS_INS_MOVF = 425;;
+let _MIPS_INS_MOVN = 426;;
+let _MIPS_INS_MOVT = 427;;
+let _MIPS_INS_MOVZ = 428;;
+let _MIPS_INS_MSUB = 429;;
+let _MIPS_INS_MSUBF = 430;;
+let _MIPS_INS_MSUBR_Q = 431;;
+let _MIPS_INS_MSUBU = 432;;
+let _MIPS_INS_MSUBV = 433;;
+let _MIPS_INS_MSUB_Q = 434;;
+let _MIPS_INS_MTC0 = 435;;
+let _MIPS_INS_MTC1 = 436;;
+let _MIPS_INS_MTC2 = 437;;
+let _MIPS_INS_MTHC1 = 438;;
+let _MIPS_INS_MTHI = 439;;
+let _MIPS_INS_MTHLIP = 440;;
+let _MIPS_INS_MTLO = 441;;
+let _MIPS_INS_MTM0 = 442;;
+let _MIPS_INS_MTM1 = 443;;
+let _MIPS_INS_MTM2 = 444;;
+let _MIPS_INS_MTP0 = 445;;
+let _MIPS_INS_MTP1 = 446;;
+let _MIPS_INS_MTP2 = 447;;
+let _MIPS_INS_MUH = 448;;
+let _MIPS_INS_MUHU = 449;;
+let _MIPS_INS_MULEQ_S = 450;;
+let _MIPS_INS_MULEU_S = 451;;
+let _MIPS_INS_MULQ_RS = 452;;
+let _MIPS_INS_MULQ_S = 453;;
+let _MIPS_INS_MULR_Q = 454;;
+let _MIPS_INS_MULSAQ_S = 455;;
+let _MIPS_INS_MULSA = 456;;
+let _MIPS_INS_MULT = 457;;
+let _MIPS_INS_MULTU = 458;;
+let _MIPS_INS_MULU = 459;;
+let _MIPS_INS_MULV = 460;;
+let _MIPS_INS_MUL_Q = 461;;
+let _MIPS_INS_MUL_S = 462;;
+let _MIPS_INS_NLOC = 463;;
+let _MIPS_INS_NLZC = 464;;
+let _MIPS_INS_NMADD = 465;;
+let _MIPS_INS_NMSUB = 466;;
+let _MIPS_INS_NOR = 467;;
+let _MIPS_INS_NORI = 468;;
+let _MIPS_INS_NOT16 = 469;;
+let _MIPS_INS_NOT = 470;;
+let _MIPS_INS_OR = 471;;
+let _MIPS_INS_OR16 = 472;;
+let _MIPS_INS_ORI = 473;;
+let _MIPS_INS_PACKRL = 474;;
+let _MIPS_INS_PAUSE = 475;;
+let _MIPS_INS_PCKEV = 476;;
+let _MIPS_INS_PCKOD = 477;;
+let _MIPS_INS_PCNT = 478;;
+let _MIPS_INS_PICK = 479;;
+let _MIPS_INS_POP = 480;;
+let _MIPS_INS_PRECEQU = 481;;
+let _MIPS_INS_PRECEQ = 482;;
+let _MIPS_INS_PRECEU = 483;;
+let _MIPS_INS_PRECRQU_S = 484;;
+let _MIPS_INS_PRECRQ = 485;;
+let _MIPS_INS_PRECRQ_RS = 486;;
+let _MIPS_INS_PRECR = 487;;
+let _MIPS_INS_PRECR_SRA = 488;;
+let _MIPS_INS_PRECR_SRA_R = 489;;
+let _MIPS_INS_PREF = 490;;
+let _MIPS_INS_PREPEND = 491;;
+let _MIPS_INS_RADDU = 492;;
+let _MIPS_INS_RDDSP = 493;;
+let _MIPS_INS_RDHWR = 494;;
+let _MIPS_INS_REPLV = 495;;
+let _MIPS_INS_REPL = 496;;
+let _MIPS_INS_RINT = 497;;
+let _MIPS_INS_ROTR = 498;;
+let _MIPS_INS_ROTRV = 499;;
+let _MIPS_INS_ROUND = 500;;
+let _MIPS_INS_SAT_S = 501;;
+let _MIPS_INS_SAT_U = 502;;
+let _MIPS_INS_SB = 503;;
+let _MIPS_INS_SB16 = 504;;
+let _MIPS_INS_SC = 505;;
+let _MIPS_INS_SCD = 506;;
+let _MIPS_INS_SD = 507;;
+let _MIPS_INS_SDBBP = 508;;
+let _MIPS_INS_SDBBP16 = 509;;
+let _MIPS_INS_SDC1 = 510;;
+let _MIPS_INS_SDC2 = 511;;
+let _MIPS_INS_SDC3 = 512;;
+let _MIPS_INS_SDL = 513;;
+let _MIPS_INS_SDR = 514;;
+let _MIPS_INS_SDXC1 = 515;;
+let _MIPS_INS_SEB = 516;;
+let _MIPS_INS_SEH = 517;;
+let _MIPS_INS_SELEQZ = 518;;
+let _MIPS_INS_SELNEZ = 519;;
+let _MIPS_INS_SEL = 520;;
+let _MIPS_INS_SEQ = 521;;
+let _MIPS_INS_SEQI = 522;;
+let _MIPS_INS_SH = 523;;
+let _MIPS_INS_SH16 = 524;;
+let _MIPS_INS_SHF = 525;;
+let _MIPS_INS_SHILO = 526;;
+let _MIPS_INS_SHILOV = 527;;
+let _MIPS_INS_SHLLV = 528;;
+let _MIPS_INS_SHLLV_S = 529;;
+let _MIPS_INS_SHLL = 530;;
+let _MIPS_INS_SHLL_S = 531;;
+let _MIPS_INS_SHRAV = 532;;
+let _MIPS_INS_SHRAV_R = 533;;
+let _MIPS_INS_SHRA = 534;;
+let _MIPS_INS_SHRA_R = 535;;
+let _MIPS_INS_SHRLV = 536;;
+let _MIPS_INS_SHRL = 537;;
+let _MIPS_INS_SLDI = 538;;
+let _MIPS_INS_SLD = 539;;
+let _MIPS_INS_SLL = 540;;
+let _MIPS_INS_SLL16 = 541;;
+let _MIPS_INS_SLLI = 542;;
+let _MIPS_INS_SLLV = 543;;
+let _MIPS_INS_SLT = 544;;
+let _MIPS_INS_SLTI = 545;;
+let _MIPS_INS_SLTIU = 546;;
+let _MIPS_INS_SLTU = 547;;
+let _MIPS_INS_SNE = 548;;
+let _MIPS_INS_SNEI = 549;;
+let _MIPS_INS_SPLATI = 550;;
+let _MIPS_INS_SPLAT = 551;;
+let _MIPS_INS_SRA = 552;;
+let _MIPS_INS_SRAI = 553;;
+let _MIPS_INS_SRARI = 554;;
+let _MIPS_INS_SRAR = 555;;
+let _MIPS_INS_SRAV = 556;;
+let _MIPS_INS_SRL = 557;;
+let _MIPS_INS_SRL16 = 558;;
+let _MIPS_INS_SRLI = 559;;
+let _MIPS_INS_SRLRI = 560;;
+let _MIPS_INS_SRLR = 561;;
+let _MIPS_INS_SRLV = 562;;
+let _MIPS_INS_SSNOP = 563;;
+let _MIPS_INS_ST = 564;;
+let _MIPS_INS_SUBQH = 565;;
+let _MIPS_INS_SUBQH_R = 566;;
+let _MIPS_INS_SUBQ = 567;;
+let _MIPS_INS_SUBQ_S = 568;;
+let _MIPS_INS_SUBSUS_U = 569;;
+let _MIPS_INS_SUBSUU_S = 570;;
+let _MIPS_INS_SUBS_S = 571;;
+let _MIPS_INS_SUBS_U = 572;;
+let _MIPS_INS_SUBU16 = 573;;
+let _MIPS_INS_SUBUH = 574;;
+let _MIPS_INS_SUBUH_R = 575;;
+let _MIPS_INS_SUBU = 576;;
+let _MIPS_INS_SUBU_S = 577;;
+let _MIPS_INS_SUBVI = 578;;
+let _MIPS_INS_SUBV = 579;;
+let _MIPS_INS_SUXC1 = 580;;
+let _MIPS_INS_SW = 581;;
+let _MIPS_INS_SW16 = 582;;
+let _MIPS_INS_SWC1 = 583;;
+let _MIPS_INS_SWC2 = 584;;
+let _MIPS_INS_SWC3 = 585;;
+let _MIPS_INS_SWL = 586;;
+let _MIPS_INS_SWM16 = 587;;
+let _MIPS_INS_SWM32 = 588;;
+let _MIPS_INS_SWP = 589;;
+let _MIPS_INS_SWR = 590;;
+let _MIPS_INS_SWXC1 = 591;;
+let _MIPS_INS_SYNC = 592;;
+let _MIPS_INS_SYNCI = 593;;
+let _MIPS_INS_SYSCALL = 594;;
+let _MIPS_INS_TEQ = 595;;
+let _MIPS_INS_TEQI = 596;;
+let _MIPS_INS_TGE = 597;;
+let _MIPS_INS_TGEI = 598;;
+let _MIPS_INS_TGEIU = 599;;
+let _MIPS_INS_TGEU = 600;;
+let _MIPS_INS_TLBP = 601;;
+let _MIPS_INS_TLBR = 602;;
+let _MIPS_INS_TLBWI = 603;;
+let _MIPS_INS_TLBWR = 604;;
+let _MIPS_INS_TLT = 605;;
+let _MIPS_INS_TLTI = 606;;
+let _MIPS_INS_TLTIU = 607;;
+let _MIPS_INS_TLTU = 608;;
+let _MIPS_INS_TNE = 609;;
+let _MIPS_INS_TNEI = 610;;
+let _MIPS_INS_TRUNC = 611;;
+let _MIPS_INS_V3MULU = 612;;
+let _MIPS_INS_VMM0 = 613;;
+let _MIPS_INS_VMULU = 614;;
+let _MIPS_INS_VSHF = 615;;
+let _MIPS_INS_WAIT = 616;;
+let _MIPS_INS_WRDSP = 617;;
+let _MIPS_INS_WSBH = 618;;
+let _MIPS_INS_XOR = 619;;
+let _MIPS_INS_XOR16 = 620;;
+let _MIPS_INS_XORI = 621;;
+
+(* some alias instructions *)
+let _MIPS_INS_NOP = 622;;
+let _MIPS_INS_NEGU = 623;;
+
+(* special instructions *)
+let _MIPS_INS_JALR_HB = 624;;
+let _MIPS_INS_JR_HB = 625;;
+let _MIPS_INS_ENDING = 626;;
+
+let _MIPS_GRP_INVALID = 0;;
+let _MIPS_GRP_JUMP = 1;;
+let _MIPS_GRP_CALL = 2;;
+let _MIPS_GRP_RET = 3;;
+let _MIPS_GRP_INT = 4;;
+let _MIPS_GRP_IRET = 5;;
+let _MIPS_GRP_PRIVILEGE = 6;;
+let _MIPS_GRP_BRANCH_RELATIVE = 7;;
+let _MIPS_GRP_BITCOUNT = 128;;
+let _MIPS_GRP_DSP = 129;;
+let _MIPS_GRP_DSPR2 = 130;;
+let _MIPS_GRP_FPIDX = 131;;
+let _MIPS_GRP_MSA = 132;;
+let _MIPS_GRP_MIPS32R2 = 133;;
+let _MIPS_GRP_MIPS64 = 134;;
+let _MIPS_GRP_MIPS64R2 = 135;;
+let _MIPS_GRP_SEINREG = 136;;
+let _MIPS_GRP_STDENC = 137;;
+let _MIPS_GRP_SWAP = 138;;
+let _MIPS_GRP_MICROMIPS = 139;;
+let _MIPS_GRP_MIPS16MODE = 140;;
+let _MIPS_GRP_FP64BIT = 141;;
+let _MIPS_GRP_NONANSFPMATH = 142;;
+let _MIPS_GRP_NOTFP64BIT = 143;;
+let _MIPS_GRP_NOTINMICROMIPS = 144;;
+let _MIPS_GRP_NOTNACL = 145;;
+let _MIPS_GRP_NOTMIPS32R6 = 146;;
+let _MIPS_GRP_NOTMIPS64R6 = 147;;
+let _MIPS_GRP_CNMIPS = 148;;
+let _MIPS_GRP_MIPS32 = 149;;
+let _MIPS_GRP_MIPS32R6 = 150;;
+let _MIPS_GRP_MIPS64R6 = 151;;
+let _MIPS_GRP_MIPS2 = 152;;
+let _MIPS_GRP_MIPS3 = 153;;
+let _MIPS_GRP_MIPS3_32 = 154;;
+let _MIPS_GRP_MIPS3_32R2 = 155;;
+let _MIPS_GRP_MIPS4_32 = 156;;
+let _MIPS_GRP_MIPS4_32R2 = 157;;
+let _MIPS_GRP_MIPS5_32R2 = 158;;
+let _MIPS_GRP_GP32BIT = 159;;
+let _MIPS_GRP_GP64BIT = 160;;
+let _MIPS_GRP_ENDING = 161;;
diff --git a/capstone/bindings/ocaml/ocaml.c b/capstone/bindings/ocaml/ocaml.c
new file mode 100644
index 000000000..8043d231d
--- /dev/null
+++ b/capstone/bindings/ocaml/ocaml.c
@@ -0,0 +1,1104 @@
+/* Capstone Disassembler Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
+
+#include <stdio.h>		// debug
+#include <string.h>
+#include <caml/mlvalues.h>
+#include <caml/memory.h>
+#include <caml/alloc.h>
+#include <caml/fail.h>
+
+#include "capstone/capstone.h"
+
+#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0]))
+
+
+// count the number of positive members in @list
+static unsigned int list_count(uint8_t *list, unsigned int max)
+{
+	unsigned int i;
+
+	for(i = 0; i < max; i++)
+		if (list[i] == 0)
+			return i;
+
+	return max;
+}
+
+CAMLprim value _cs_disasm(cs_arch arch, csh handle, const uint8_t * code, size_t code_len, uint64_t addr, size_t count)
+{
+	CAMLparam0();
+	CAMLlocal5(list, cons, rec_insn, array, tmp);
+	CAMLlocal4(arch_info, op_info_val, tmp2, tmp3);
+	cs_insn *insn;
+	size_t c;
+
+	list = Val_emptylist;
+
+	c = cs_disasm(handle, code, code_len, addr, count, &insn);
+	if (c) {
+		//printf("Found %lu insn, addr: %lx\n", c, addr);
+		uint64_t j;
+		for (j = c; j > 0; j--) {
+			unsigned int lcount, i;
+			cons = caml_alloc(2, 0);
+
+			rec_insn = caml_alloc(10, 0);
+			Store_field(rec_insn, 0, Val_int(insn[j-1].id));
+			Store_field(rec_insn, 1, Val_int(insn[j-1].address));
+			Store_field(rec_insn, 2, Val_int(insn[j-1].size));
+
+			// copy raw bytes of instruction
+			lcount = insn[j-1].size;
+			if (lcount) {
+				array = caml_alloc(lcount, 0);
+				for (i = 0; i < lcount; i++) {
+					Store_field(array, i, Val_int(insn[j-1].bytes[i]));
+				}
+			} else
+				array = Atom(0);	// empty list
+			Store_field(rec_insn, 3, array);
+
+			Store_field(rec_insn, 4, caml_copy_string(insn[j-1].mnemonic));
+			Store_field(rec_insn, 5, caml_copy_string(insn[j-1].op_str));
+
+			// copy read registers
+			if (insn[0].detail) {
+				lcount = (insn[j-1]).detail->regs_read_count;
+				if (lcount) {
+					array = caml_alloc(lcount, 0);
+					for (i = 0; i < lcount; i++) {
+						Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i]));
+					}
+				} else
+					array = Atom(0);	// empty list
+			} else
+				array = Atom(0);	// empty list
+			Store_field(rec_insn, 6, array);
+
+			if (insn[0].detail) {
+				lcount = (insn[j-1]).detail->regs_write_count;
+				if (lcount) {
+					array = caml_alloc(lcount, 0);
+					for (i = 0; i < lcount; i++) {
+						Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i]));
+					}
+				} else
+					array = Atom(0);	// empty list
+			} else
+				array = Atom(0);	// empty list
+			Store_field(rec_insn, 7, array);
+
+			if (insn[0].detail) {
+				lcount = (insn[j-1]).detail->groups_count;
+				if (lcount) {
+					array = caml_alloc(lcount, 0);
+					for (i = 0; i < lcount; i++) {
+						Store_field(array, i, Val_int(insn[j-1].detail->groups[i]));
+					}
+				} else
+					array = Atom(0);	// empty list
+			} else
+				array = Atom(0);	// empty list
+			Store_field(rec_insn, 8, array);
+
+			if (insn[j-1].detail) {
+				switch(arch) {
+					case CS_ARCH_ARM:
+						arch_info = caml_alloc(1, 0);
+
+						op_info_val = caml_alloc(10, 0);
+						Store_field(op_info_val, 0, Val_bool(insn[j-1].detail->arm.usermode));
+						Store_field(op_info_val, 1, Val_int(insn[j-1].detail->arm.vector_size));
+						Store_field(op_info_val, 2, Val_int(insn[j-1].detail->arm.vector_data));
+						Store_field(op_info_val, 3, Val_int(insn[j-1].detail->arm.cps_mode));
+						Store_field(op_info_val, 4, Val_int(insn[j-1].detail->arm.cps_flag));
+						Store_field(op_info_val, 5, Val_int(insn[j-1].detail->arm.cc));
+						Store_field(op_info_val, 6, Val_bool(insn[j-1].detail->arm.update_flags));
+						Store_field(op_info_val, 7, Val_bool(insn[j-1].detail->arm.writeback));
+						Store_field(op_info_val, 8, Val_int(insn[j-1].detail->arm.mem_barrier));
+
+						lcount = insn[j-1].detail->arm.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(5, 0);
+								switch(insn[j-1].detail->arm.operands[i].type) {
+									case ARM_OP_REG:
+									case ARM_OP_SYSREG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].reg));
+										break;
+									case ARM_OP_CIMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm));
+										break;
+									case ARM_OP_PIMM:
+										tmp = caml_alloc(1, 3);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm));
+										break;
+									case ARM_OP_IMM:
+										tmp = caml_alloc(1, 4);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm));
+										break;
+									case ARM_OP_FP:
+										tmp = caml_alloc(1, 5);
+										Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm.operands[i].fp));
+										break;
+									case ARM_OP_MEM:
+										tmp = caml_alloc(1, 6);
+										tmp3 = caml_alloc(5, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].mem.index));
+										Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm.operands[i].mem.scale));
+										Store_field(tmp3, 3, Val_int(insn[j-1].detail->arm.operands[i].mem.disp));
+										Store_field(tmp3, 4, Val_int(insn[j-1].detail->arm.operands[i].mem.lshift));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case ARM_OP_SETEND:
+										tmp = caml_alloc(1, 7);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].setend));
+										break;
+									default: break;
+								}
+								tmp3 = caml_alloc(2, 0);
+								Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].shift.type));
+								Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].shift.value));
+								Store_field(tmp2, 0, Val_int(insn[j-1].detail->arm.operands[i].vector_index));
+								Store_field(tmp2, 1, tmp3);
+								Store_field(tmp2, 2, tmp);
+								Store_field(tmp2, 3, Val_bool(insn[j-1].detail->arm.operands[i].subtracted));
+								Store_field(tmp2, 4, Val_int(insn[j-1].detail->arm.operands[i].access));
+								Store_field(tmp2, 5, Val_int(insn[j-1].detail->arm.operands[i].neon_lane));
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty list
+							array = Atom(0);
+
+						Store_field(op_info_val, 9, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+					case CS_ARCH_ARM64:
+						arch_info = caml_alloc(1, 1);
+
+						op_info_val = caml_alloc(4, 0);
+						Store_field(op_info_val, 0, Val_int(insn[j-1].detail->arm64.cc));
+						Store_field(op_info_val, 1, Val_bool(insn[j-1].detail->arm64.update_flags));
+						Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->arm64.writeback));
+
+						lcount = insn[j-1].detail->arm64.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(6, 0);
+								switch(insn[j-1].detail->arm64.operands[i].type) {
+									case ARM64_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg));
+										break;
+									case ARM64_OP_CIMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm));
+										break;
+									case ARM64_OP_IMM:
+										tmp = caml_alloc(1, 3);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm));
+										break;
+									case ARM64_OP_FP:
+										tmp = caml_alloc(1, 4);
+										Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm64.operands[i].fp));
+										break;
+									case ARM64_OP_MEM:
+										tmp = caml_alloc(1, 5);
+										tmp3 = caml_alloc(3, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].mem.index));
+										Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm64.operands[i].mem.disp));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case ARM64_OP_REG_MRS:
+										tmp = caml_alloc(1, 6);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg));
+										break;
+									case ARM64_OP_REG_MSR:
+										tmp = caml_alloc(1, 7);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg));
+										break;
+									case ARM64_OP_PSTATE:
+										tmp = caml_alloc(1, 8);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].pstate));
+										break;
+									case ARM64_OP_SYS:
+										tmp = caml_alloc(1, 9);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].sys));
+										break;
+									case ARM64_OP_PREFETCH:
+										tmp = caml_alloc(1, 10);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].prefetch));
+										break;
+									case ARM64_OP_BARRIER:
+										tmp = caml_alloc(1, 11);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].barrier));
+										break;
+									default: break;
+								}
+								tmp3 = caml_alloc(2, 0);
+								Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].shift.type));
+								Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].shift.value));
+
+								Store_field(tmp2, 0, Val_int(insn[j-1].detail->arm64.operands[i].vector_index));
+								Store_field(tmp2, 1, Val_int(insn[j-1].detail->arm64.operands[i].vas));
+								Store_field(tmp2, 2, tmp3);
+								Store_field(tmp2, 3, Val_int(insn[j-1].detail->arm64.operands[i].ext));
+								Store_field(tmp2, 4, tmp);
+
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 3, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+					case CS_ARCH_MIPS:
+						arch_info = caml_alloc(1, 2);
+
+						op_info_val = caml_alloc(1, 0);
+
+						lcount = insn[j-1].detail->mips.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(1, 0);
+								switch(insn[j-1].detail->mips.operands[i].type) {
+									case MIPS_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].reg));
+										break;
+									case MIPS_OP_IMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].imm));
+										break;
+									case MIPS_OP_MEM:
+										tmp = caml_alloc(1, 3);
+										tmp3 = caml_alloc(2, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->mips.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->mips.operands[i].mem.disp));
+										Store_field(tmp, 0, tmp3);
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp);
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 0, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+					case CS_ARCH_X86:
+						arch_info = caml_alloc(1, 3);
+
+						op_info_val = caml_alloc(17, 0);
+
+						// fill prefix
+						lcount = list_count(insn[j-1].detail->x86.prefix, ARR_SIZE(insn[j-1].detail->x86.prefix));
+						if (lcount) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								Store_field(array, i, Val_int(insn[j-1].detail->x86.prefix[i]));
+							}
+						} else
+							array = Atom(0);
+						Store_field(op_info_val, 0, array);
+
+						// fill opcode
+						lcount = list_count(insn[j-1].detail->x86.opcode, ARR_SIZE(insn[j-1].detail->x86.opcode));
+						if (lcount) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								Store_field(array, i, Val_int(insn[j-1].detail->x86.opcode[i]));
+							}
+						} else
+							array = Atom(0);
+						Store_field(op_info_val, 1, array);
+
+						Store_field(op_info_val, 2, Val_int(insn[j-1].detail->x86.rex));
+
+						Store_field(op_info_val, 3, Val_int(insn[j-1].detail->x86.addr_size));
+
+						Store_field(op_info_val, 4, Val_int(insn[j-1].detail->x86.modrm));
+
+						Store_field(op_info_val, 5, Val_int(insn[j-1].detail->x86.sib));
+
+						Store_field(op_info_val, 6, Val_int(insn[j-1].detail->x86.disp));
+
+						Store_field(op_info_val, 7, Val_int(insn[j-1].detail->x86.sib_index));
+
+						Store_field(op_info_val, 8, Val_int(insn[j-1].detail->x86.sib_scale));
+
+						Store_field(op_info_val, 9, Val_int(insn[j-1].detail->x86.sib_base));
+
+						Store_field(op_info_val, 10, Val_int(insn[j-1].detail->x86.xop_cc));
+						Store_field(op_info_val, 11, Val_int(insn[j-1].detail->x86.sse_cc));
+						Store_field(op_info_val, 12, Val_int(insn[j-1].detail->x86.avx_cc));
+						Store_field(op_info_val, 13, Val_int(insn[j-1].detail->x86.avx_sae));
+						Store_field(op_info_val, 14, Val_int(insn[j-1].detail->x86.avx_rm));
+						Store_field(op_info_val, 15, Val_int(insn[j-1].detail->x86.eflags));
+
+						lcount = insn[j-1].detail->x86.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								switch(insn[j-1].detail->x86.operands[i].type) {
+									case X86_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].reg));
+										break;
+									case X86_OP_IMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].imm));
+										break;
+									case X86_OP_MEM:
+										tmp = caml_alloc(1, 3);
+										tmp2 = caml_alloc(5, 0);
+										Store_field(tmp2, 0, Val_int(insn[j-1].detail->x86.operands[i].mem.segment));
+										Store_field(tmp2, 1, Val_int(insn[j-1].detail->x86.operands[i].mem.base));
+										Store_field(tmp2, 2, Val_int(insn[j-1].detail->x86.operands[i].mem.index));
+										Store_field(tmp2, 3, Val_int(insn[j-1].detail->x86.operands[i].mem.scale));
+										Store_field(tmp2, 4, Val_int(insn[j-1].detail->x86.operands[i].mem.disp));
+
+										Store_field(tmp, 0, tmp2);
+										break;
+									default:
+										tmp = caml_alloc(1, 0); // X86_OP_INVALID
+										break;
+								}
+
+								tmp2 = caml_alloc(5, 0);
+								Store_field(tmp2, 0, tmp);
+								Store_field(tmp2, 1, Val_int(insn[j-1].detail->x86.operands[i].size));
+								Store_field(tmp2, 2, Val_int(insn[j-1].detail->x86.operands[i].access));
+								Store_field(tmp2, 3, Val_int(insn[j-1].detail->x86.operands[i].avx_bcast));
+								Store_field(tmp2, 4, Val_int(insn[j-1].detail->x86.operands[i].avx_zero_opmask));
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+						Store_field(op_info_val, 16, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+						break;
+
+					case CS_ARCH_PPC:
+						arch_info = caml_alloc(1, 4);
+
+						op_info_val = caml_alloc(4, 0);
+
+						Store_field(op_info_val, 0, Val_int(insn[j-1].detail->ppc.bc));
+						Store_field(op_info_val, 1, Val_int(insn[j-1].detail->ppc.bh));
+						Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->ppc.update_cr0));
+
+						lcount = insn[j-1].detail->ppc.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(1, 0);
+								switch(insn[j-1].detail->ppc.operands[i].type) {
+									case PPC_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].reg));
+										break;
+									case PPC_OP_IMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].imm));
+										break;
+									case PPC_OP_MEM:
+										tmp = caml_alloc(1, 3);
+										tmp3 = caml_alloc(2, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->ppc.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->ppc.operands[i].mem.disp));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case PPC_OP_CRX:
+										tmp = caml_alloc(1, 4);
+										tmp3 = caml_alloc(3, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->ppc.operands[i].crx.scale));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->ppc.operands[i].crx.reg));
+										Store_field(tmp3, 2, Val_int(insn[j-1].detail->ppc.operands[i].crx.cond));
+										Store_field(tmp, 0, tmp3);
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp);
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 3, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+
+					case CS_ARCH_SPARC:
+						arch_info = caml_alloc(1, 5);
+
+						op_info_val = caml_alloc(3, 0);
+
+						Store_field(op_info_val, 0, Val_int(insn[j-1].detail->sparc.cc));
+						Store_field(op_info_val, 1, Val_int(insn[j-1].detail->sparc.hint));
+
+						lcount = insn[j-1].detail->sparc.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(1, 0);
+								switch(insn[j-1].detail->sparc.operands[i].type) {
+									case SPARC_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->sparc.operands[i].reg));
+										break;
+									case SPARC_OP_IMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->sparc.operands[i].imm));
+										break;
+									case SPARC_OP_MEM:
+										tmp = caml_alloc(1, 3);
+										tmp3 = caml_alloc(3, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->sparc.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->sparc.operands[i].mem.index));
+										Store_field(tmp3, 2, Val_int(insn[j-1].detail->sparc.operands[i].mem.disp));
+										Store_field(tmp, 0, tmp3);
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp);
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 2, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+
+					case CS_ARCH_SYSZ:
+						arch_info = caml_alloc(1, 6);
+
+						op_info_val = caml_alloc(2, 0);
+
+						Store_field(op_info_val, 0, Val_int(insn[j-1].detail->sysz.cc));
+
+						lcount = insn[j-1].detail->sysz.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(1, 0);
+								switch(insn[j-1].detail->sysz.operands[i].type) {
+									case SYSZ_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].reg));
+										break;
+									case SYSZ_OP_ACREG:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].reg));
+										break;
+									case SYSZ_OP_IMM:
+										tmp = caml_alloc(1, 3);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->sysz.operands[i].imm));
+										break;
+									case SYSZ_OP_MEM:
+										tmp = caml_alloc(1, 4);
+										tmp3 = caml_alloc(4, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->sysz.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->sysz.operands[i].mem.index));
+										Store_field(tmp3, 2, caml_copy_int64(insn[j-1].detail->sysz.operands[i].mem.length));
+										Store_field(tmp3, 3, caml_copy_int64(insn[j-1].detail->sysz.operands[i].mem.disp));
+										Store_field(tmp, 0, tmp3);
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp);
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 1, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+
+					case CS_ARCH_XCORE:
+						arch_info = caml_alloc(1, 7);
+
+						op_info_val = caml_alloc(1, 0);
+
+						lcount = insn[j-1].detail->xcore.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(1, 0);
+								switch(insn[j-1].detail->xcore.operands[i].type) {
+									case XCORE_OP_REG:
+										tmp = caml_alloc(1, 1);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->xcore.operands[i].reg));
+										break;
+									case XCORE_OP_IMM:
+										tmp = caml_alloc(1, 2);
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->xcore.operands[i].imm));
+										break;
+									case XCORE_OP_MEM:
+										tmp = caml_alloc(1, 3);
+										tmp3 = caml_alloc(4, 0);
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->xcore.operands[i].mem.base));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->xcore.operands[i].mem.index));
+										Store_field(tmp3, 2, caml_copy_int64(insn[j-1].detail->xcore.operands[i].mem.disp));
+										Store_field(tmp3, 3, caml_copy_int64(insn[j-1].detail->xcore.operands[i].mem.direct));
+										Store_field(tmp, 0, tmp3);
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp);
+								Store_field(array, i, tmp2);
+							}
+						} else	// empty array
+							array = Atom(0);
+
+						Store_field(op_info_val, 0, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+
+					case CS_ARCH_M680X:
+						arch_info = caml_alloc(1, 8);
+
+						op_info_val = caml_alloc(2, 0); // struct cs_m680x
+						Store_field(op_info_val, 0, Val_int(insn[j-1].detail->m680x.flags));
+
+						lcount = insn[j-1].detail->m680x.op_count;
+						if (lcount > 0) {
+							array = caml_alloc(lcount, 0);
+							for (i = 0; i < lcount; i++) {
+								tmp2 = caml_alloc(3, 0); // m680x_op
+								switch(insn[j-1].detail->m680x.operands[i].type) {
+									case M680X_OP_IMMEDIATE:
+										tmp = caml_alloc(1, 1); // imm
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].imm));
+										break;
+									case M680X_OP_REGISTER:
+										tmp = caml_alloc(1, 2); // reg
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].reg));
+										break;
+									case M680X_OP_INDEXED:
+										tmp = caml_alloc(1, 3);
+										tmp3 = caml_alloc(7, 0); // m680x_op_idx
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].idx.base_reg));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_reg));
+										Store_field(tmp3, 2, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset));
+										Store_field(tmp3, 3, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_addr));
+										Store_field(tmp3, 4, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_bits));
+										Store_field(tmp3, 5, Val_int(insn[j-1].detail->m680x.operands[i].idx.inc_dec));
+										Store_field(tmp3, 6, Val_int(insn[j-1].detail->m680x.operands[i].idx.flags));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case M680X_OP_RELATIVE:
+										tmp = caml_alloc(1, 4);
+										tmp3 = caml_alloc(2, 0); // m680x_op_rel
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].rel.address));
+										Store_field(tmp3, 1, Val_int(insn[j-1].detail->m680x.operands[i].rel.offset));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case M680X_OP_EXTENDED:
+										tmp = caml_alloc(1, 5);
+										tmp3 = caml_alloc(2, 0); // m680x_op_ext
+										Store_field(tmp3, 0, Val_int(insn[j-1].detail->m680x.operands[i].ext.address));
+										Store_field(tmp3, 1, Val_bool(insn[j-1].detail->m680x.operands[i].ext.indirect));
+										Store_field(tmp, 0, tmp3);
+										break;
+									case M680X_OP_DIRECT:
+										tmp = caml_alloc(1, 6); // direct_addr
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].direct_addr));
+										break;
+									case M680X_OP_CONSTANT:
+										tmp = caml_alloc(1, 7); // const_val
+										Store_field(tmp, 0, Val_int(insn[j-1].detail->m680x.operands[i].const_val));
+										break;
+									default: break;
+								}
+								Store_field(tmp2, 0, tmp); // add union
+								Store_field(tmp2, 1, Val_int(insn[j-1].detail->m680x.operands[i].size));
+								Store_field(tmp2, 2, Val_int(insn[j-1].detail->m680x.operands[i].access));
+								Store_field(array, i, tmp2); // add operand to operand array
+							}
+						} else // empty list
+							array = Atom(0);
+
+						Store_field(op_info_val, 1, array);
+
+						// finally, insert this into arch_info
+						Store_field(arch_info, 0, op_info_val);
+
+						Store_field(rec_insn, 9, arch_info);
+
+						break;
+
+					default: break;
+				}
+			}
+
+			Store_field(cons, 0, rec_insn);	// head
+			Store_field(cons, 1, list);		// tail
+			list = cons;
+		}
+		cs_free(insn, count);
+	}
+
+	// do not free the handle here
+	//cs_close(&handle);
+    CAMLreturn(list);
+}
+
+CAMLprim value ocaml_cs_disasm(value _arch, value _mode, value _code, value _addr, value _count)
+{
+	CAMLparam5(_arch, _mode, _code, _addr, _count);
+	CAMLlocal1(head);
+	csh handle;
+	cs_arch arch;
+	cs_mode mode = 0;
+	const uint8_t *code;
+	uint64_t addr;
+	size_t count, code_len;
+
+	switch (Int_val(_arch)) {
+		case 0:
+			arch = CS_ARCH_ARM;
+			break;
+		case 1:
+			arch = CS_ARCH_ARM64;
+			break;
+		case 2:
+			arch = CS_ARCH_MIPS;
+			break;
+		case 3:
+			arch = CS_ARCH_X86;
+			break;
+		case 4:
+			arch = CS_ARCH_PPC;
+			break;
+		case 5:
+			arch = CS_ARCH_SPARC;
+			break;
+		case 6:
+			arch = CS_ARCH_SYSZ;
+			break;
+		case 7:
+			arch = CS_ARCH_XCORE;
+			break;
+		case 8:
+			arch = CS_ARCH_M68K;
+			break;
+		case 9:
+			arch = CS_ARCH_TMS320C64X;
+			break;
+		case 10:
+			arch = CS_ARCH_M680X;
+			break;
+		default:
+			caml_invalid_argument("Invalid arch");
+			return Val_emptylist;
+	}
+
+	while (_mode != Val_emptylist) {
+		head = Field(_mode, 0);  /* accessing the head */
+		switch (Int_val(head)) {
+			case 0:
+				mode |= CS_MODE_LITTLE_ENDIAN;
+				break;
+			case 1:
+				mode |= CS_MODE_ARM;
+				break;
+			case 2:
+				mode |= CS_MODE_16;
+				break;
+			case 3:
+				mode |= CS_MODE_32;
+				break;
+			case 4:
+				mode |= CS_MODE_64;
+				break;
+			case 5:
+				mode |= CS_MODE_THUMB;
+				break;
+			case 6:
+				mode |= CS_MODE_MCLASS;
+				break;
+			case 7:
+				mode |= CS_MODE_V8;
+				break;
+			case 8:
+				mode |= CS_MODE_MICRO;
+				break;
+			case 9:
+				mode |= CS_MODE_MIPS3;
+				break;
+			case 10:
+				mode |= CS_MODE_MIPS32R6;
+				break;
+			case 11:
+				mode |= CS_MODE_MIPS2;
+				break;
+			case 12:
+				mode |= CS_MODE_V9;
+				break;
+			case 13:
+				mode |= CS_MODE_BIG_ENDIAN;
+				break;
+			case 14:
+				mode |= CS_MODE_MIPS32;
+				break;
+			case 15:
+				mode |= CS_MODE_MIPS64;
+				break;
+			case 16:
+				mode |= CS_MODE_QPX;
+				break;
+			case 17:
+				mode |= CS_MODE_M680X_6301;
+				break;
+			case 18:
+				mode |= CS_MODE_M680X_6309;
+				break;
+			case 19:
+				mode |= CS_MODE_M680X_6800;
+				break;
+			case 20:
+				mode |= CS_MODE_M680X_6801;
+				break;
+			case 21:
+				mode |= CS_MODE_M680X_6805;
+				break;
+			case 22:
+				mode |= CS_MODE_M680X_6808;
+				break;
+			case 23:
+				mode |= CS_MODE_M680X_6809;
+				break;
+			case 24:
+				mode |= CS_MODE_M680X_6811;
+				break;
+			case 25:
+				mode |= CS_MODE_M680X_CPU12;
+				break;
+			case 26:
+				mode |= CS_MODE_M680X_HCS08;
+				break;
+			default:
+				caml_invalid_argument("Invalid mode");
+				return Val_emptylist;
+		}
+		_mode = Field(_mode, 1);  /* point to the tail for next loop */
+	}
+
+	cs_err ret = cs_open(arch, mode, &handle);
+	if (ret != CS_ERR_OK) {
+		return Val_emptylist;
+	}
+
+	code = (uint8_t *)String_val(_code);
+	code_len = caml_string_length(_code);
+	addr = Int64_val(_addr);
+	count = Int64_val(_count);
+
+    CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count));
+}
+
+CAMLprim value ocaml_cs_disasm_internal(value _arch, value _handle, value _code, value _addr, value _count)
+{
+	CAMLparam5(_arch, _handle, _code, _addr, _count);
+	csh handle;
+	cs_arch arch;
+	const uint8_t *code;
+	uint64_t addr, count, code_len;
+
+	handle = Int64_val(_handle);
+
+	arch = Int_val(_arch);
+	code = (uint8_t *)String_val(_code);
+	code_len = caml_string_length(_code);
+	addr = Int64_val(_addr);
+	count = Int64_val(_count);
+
+    CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count));
+}
+
+CAMLprim value ocaml_open(value _arch, value _mode)
+{
+	CAMLparam2(_arch, _mode);
+	CAMLlocal2(list, head);
+	csh handle;
+	cs_arch arch;
+	cs_mode mode = 0;
+
+	list = Val_emptylist;
+
+	switch (Int_val(_arch)) {
+		case 0:
+			arch = CS_ARCH_ARM;
+			break;
+		case 1:
+			arch = CS_ARCH_ARM64;
+			break;
+		case 2:
+			arch = CS_ARCH_MIPS;
+			break;
+		case 3:
+			arch = CS_ARCH_X86;
+			break;
+		case 4:
+			arch = CS_ARCH_PPC;
+			break;
+		case 5:
+			arch = CS_ARCH_SPARC;
+			break;
+		case 6:
+			arch = CS_ARCH_SYSZ;
+			break;
+		case 7:
+			arch = CS_ARCH_XCORE;
+			break;
+		case 8:
+			arch = CS_ARCH_M68K;
+			break;
+		case 9:
+			arch = CS_ARCH_TMS320C64X;
+			break;
+		case 10:
+			arch = CS_ARCH_M680X;
+			break;
+		default:
+			caml_invalid_argument("Invalid arch");
+			return Val_emptylist;
+	}
+
+
+	while (_mode != Val_emptylist) {
+		head = Field(_mode, 0);  /* accessing the head */
+		switch (Int_val(head)) {
+			case 0:
+				mode |= CS_MODE_LITTLE_ENDIAN;
+				break;
+			case 1:
+				mode |= CS_MODE_ARM;
+				break;
+			case 2:
+				mode |= CS_MODE_16;
+				break;
+			case 3:
+				mode |= CS_MODE_32;
+				break;
+			case 4:
+				mode |= CS_MODE_64;
+				break;
+			case 5:
+				mode |= CS_MODE_THUMB;
+				break;
+			case 6:
+				mode |= CS_MODE_MCLASS;
+				break;
+			case 7:
+				mode |= CS_MODE_V8;
+				break;
+			case 8:
+				mode |= CS_MODE_MICRO;
+				break;
+			case 9:
+				mode |= CS_MODE_MIPS3;
+				break;
+			case 10:
+				mode |= CS_MODE_MIPS32R6;
+				break;
+			case 11:
+				mode |= CS_MODE_MIPS2;
+				break;
+			case 12:
+				mode |= CS_MODE_V9;
+				break;
+			case 13:
+				mode |= CS_MODE_BIG_ENDIAN;
+				break;
+			case 14:
+				mode |= CS_MODE_MIPS32;
+				break;
+			case 15:
+				mode |= CS_MODE_MIPS64;
+				break;
+			case 16:
+				mode |= CS_MODE_QPX;
+				break;
+			case 17:
+				mode |= CS_MODE_M680X_6301;
+				break;
+			case 18:
+				mode |= CS_MODE_M680X_6309;
+				break;
+			case 19:
+				mode |= CS_MODE_M680X_6800;
+				break;
+			case 20:
+				mode |= CS_MODE_M680X_6801;
+				break;
+			case 21:
+				mode |= CS_MODE_M680X_6805;
+				break;
+			case 22:
+				mode |= CS_MODE_M680X_6808;
+				break;
+			case 23:
+				mode |= CS_MODE_M680X_6809;
+				break;
+			case 24:
+				mode |= CS_MODE_M680X_6811;
+				break;
+			case 25:
+				mode |= CS_MODE_M680X_CPU12;
+				break;
+			case 26:
+				mode |= CS_MODE_M680X_HCS08;
+				break;
+			default:
+				caml_invalid_argument("Invalid mode");
+				return Val_emptylist;
+		}
+		_mode = Field(_mode, 1);  /* point to the tail for next loop */
+	}
+
+	if (cs_open(arch, mode, &handle) != 0)
+		CAMLreturn(Val_int(0));
+
+	CAMLlocal1(result);
+	result = caml_alloc(1, 0);
+	Store_field(result, 0, caml_copy_int64(handle));
+	CAMLreturn(result);
+}
+
+CAMLprim value ocaml_option(value _handle, value _opt, value _value)
+{
+	CAMLparam3(_handle, _opt, _value);
+	cs_opt_type opt;
+	int err;
+
+	switch (Int_val(_opt)) {
+		case 0:
+			opt = CS_OPT_SYNTAX;
+			break;
+		case 1:
+			opt = CS_OPT_DETAIL;
+			break;
+		case 2:
+			opt = CS_OPT_MODE;
+			break;
+		case 3:
+			opt = CS_OPT_MEM;
+			break;
+		case 4:
+			opt = CS_OPT_SKIPDATA;
+			break;
+		case 5:
+			opt = CS_OPT_SKIPDATA_SETUP;
+			break;
+		default:
+			caml_invalid_argument("Invalid option");
+			CAMLreturn(Val_int(CS_ERR_OPTION));
+	}
+
+	err = cs_option(Int64_val(_handle), opt, Int64_val(_value));
+
+	CAMLreturn(Val_int(err));
+}
+
+CAMLprim value ocaml_register_name(value _handle, value _reg)
+{
+	const char *name = cs_reg_name(Int64_val(_handle), Int_val(_reg));
+	if (!name) {
+		caml_invalid_argument("invalid reg_id");
+		name = "invalid";
+	}
+
+	return caml_copy_string(name);
+}
+
+CAMLprim value ocaml_instruction_name(value _handle, value _insn)
+{
+	const char *name = cs_insn_name(Int64_val(_handle), Int_val(_insn));
+	if (!name) {
+		caml_invalid_argument("invalid insn_id");
+		name = "invalid";
+	}
+
+	return caml_copy_string(name);
+}
+
+CAMLprim value ocaml_group_name(value _handle, value _insn)
+{
+	const char *name = cs_group_name(Int64_val(_handle), Int_val(_insn));
+	if (!name) {
+		caml_invalid_argument("invalid insn_id");
+		name = "invalid";
+	}
+
+	return caml_copy_string(name);
+}
+
+CAMLprim value ocaml_version(void)
+{
+	int version = cs_version(NULL, NULL);
+	return Val_int(version);
+}
+
+CAMLprim value ocaml_close(value _handle)
+{
+	CAMLparam1(_handle);
+	csh h;
+
+	h = Int64_val(_handle);
+
+	CAMLreturn(Val_int(cs_close(&h)));
+}
diff --git a/capstone/bindings/ocaml/ppc.ml b/capstone/bindings/ocaml/ppc.ml
new file mode 100644
index 000000000..269bfcc9e
--- /dev/null
+++ b/capstone/bindings/ocaml/ppc.ml
@@ -0,0 +1,34 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Ppc_const
+
+type ppc_op_mem = {
+	base: int;
+	disp: int;
+}
+
+type ppc_op_crx = {
+	scale: int;
+	reg: int;
+	cond: int;
+}
+
+type ppc_op_value = 
+	| PPC_OP_INVALID of int
+	| PPC_OP_REG of int
+	| PPC_OP_IMM of int
+	| PPC_OP_MEM of ppc_op_mem
+	| PPC_OP_CRX of ppc_op_crx
+
+type ppc_op = {
+	value: ppc_op_value;
+}
+
+type cs_ppc = { 
+	bc: int;
+	bh: int;
+	update_cr0: bool;
+	operands: ppc_op array;
+}
+
diff --git a/capstone/bindings/ocaml/ppc_const.ml b/capstone/bindings/ocaml/ppc_const.ml
new file mode 100644
index 000000000..6849a0c49
--- /dev/null
+++ b/capstone/bindings/ocaml/ppc_const.ml
@@ -0,0 +1,1976 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.ml] *)
+
+let _PPC_BC_INVALID = 0;;
+let _PPC_BC_LT = (0 lsl 5) lor 12;;
+let _PPC_BC_LE = (1 lsl 5) lor 4;;
+let _PPC_BC_EQ = (2 lsl 5) lor 12;;
+let _PPC_BC_GE = (0 lsl 5) lor 4;;
+let _PPC_BC_GT = (1 lsl 5) lor 12;;
+let _PPC_BC_NE = (2 lsl 5) lor 4;;
+let _PPC_BC_UN = (3 lsl 5) lor 12;;
+let _PPC_BC_NU = (3 lsl 5) lor 4;;
+let _PPC_BC_SO = (4 lsl 5) lor 12;;
+let _PPC_BC_NS = (4 lsl 5) lor 4;;
+
+let _PPC_BH_INVALID = 0;;
+let _PPC_BH_PLUS = 1;;
+let _PPC_BH_MINUS = 2;;
+
+let _PPC_OP_INVALID = 0;;
+let _PPC_OP_REG = 1;;
+let _PPC_OP_IMM = 2;;
+let _PPC_OP_MEM = 3;;
+let _PPC_OP_CRX = 64;;
+
+let _PPC_REG_INVALID = 0;;
+let _PPC_REG_CARRY = 2;;
+let _PPC_REG_CTR = 3;;
+let _PPC_REG_LR = 5;;
+let _PPC_REG_RM = 6;;
+let _PPC_REG_VRSAVE = 8;;
+let _PPC_REG_XER = 9;;
+let _PPC_REG_ZERO = 10;;
+let _PPC_REG_CR0 = 12;;
+let _PPC_REG_CR1 = 13;;
+let _PPC_REG_CR2 = 14;;
+let _PPC_REG_CR3 = 15;;
+let _PPC_REG_CR4 = 16;;
+let _PPC_REG_CR5 = 17;;
+let _PPC_REG_CR6 = 18;;
+let _PPC_REG_CR7 = 19;;
+let _PPC_REG_CTR8 = 20;;
+let _PPC_REG_F0 = 21;;
+let _PPC_REG_F1 = 22;;
+let _PPC_REG_F2 = 23;;
+let _PPC_REG_F3 = 24;;
+let _PPC_REG_F4 = 25;;
+let _PPC_REG_F5 = 26;;
+let _PPC_REG_F6 = 27;;
+let _PPC_REG_F7 = 28;;
+let _PPC_REG_F8 = 29;;
+let _PPC_REG_F9 = 30;;
+let _PPC_REG_F10 = 31;;
+let _PPC_REG_F11 = 32;;
+let _PPC_REG_F12 = 33;;
+let _PPC_REG_F13 = 34;;
+let _PPC_REG_F14 = 35;;
+let _PPC_REG_F15 = 36;;
+let _PPC_REG_F16 = 37;;
+let _PPC_REG_F17 = 38;;
+let _PPC_REG_F18 = 39;;
+let _PPC_REG_F19 = 40;;
+let _PPC_REG_F20 = 41;;
+let _PPC_REG_F21 = 42;;
+let _PPC_REG_F22 = 43;;
+let _PPC_REG_F23 = 44;;
+let _PPC_REG_F24 = 45;;
+let _PPC_REG_F25 = 46;;
+let _PPC_REG_F26 = 47;;
+let _PPC_REG_F27 = 48;;
+let _PPC_REG_F28 = 49;;
+let _PPC_REG_F29 = 50;;
+let _PPC_REG_F30 = 51;;
+let _PPC_REG_F31 = 52;;
+let _PPC_REG_LR8 = 54;;
+let _PPC_REG_Q0 = 55;;
+let _PPC_REG_Q1 = 56;;
+let _PPC_REG_Q2 = 57;;
+let _PPC_REG_Q3 = 58;;
+let _PPC_REG_Q4 = 59;;
+let _PPC_REG_Q5 = 60;;
+let _PPC_REG_Q6 = 61;;
+let _PPC_REG_Q7 = 62;;
+let _PPC_REG_Q8 = 63;;
+let _PPC_REG_Q9 = 64;;
+let _PPC_REG_Q10 = 65;;
+let _PPC_REG_Q11 = 66;;
+let _PPC_REG_Q12 = 67;;
+let _PPC_REG_Q13 = 68;;
+let _PPC_REG_Q14 = 69;;
+let _PPC_REG_Q15 = 70;;
+let _PPC_REG_Q16 = 71;;
+let _PPC_REG_Q17 = 72;;
+let _PPC_REG_Q18 = 73;;
+let _PPC_REG_Q19 = 74;;
+let _PPC_REG_Q20 = 75;;
+let _PPC_REG_Q21 = 76;;
+let _PPC_REG_Q22 = 77;;
+let _PPC_REG_Q23 = 78;;
+let _PPC_REG_Q24 = 79;;
+let _PPC_REG_Q25 = 80;;
+let _PPC_REG_Q26 = 81;;
+let _PPC_REG_Q27 = 82;;
+let _PPC_REG_Q28 = 83;;
+let _PPC_REG_Q29 = 84;;
+let _PPC_REG_Q30 = 85;;
+let _PPC_REG_Q31 = 86;;
+let _PPC_REG_R0 = 87;;
+let _PPC_REG_R1 = 88;;
+let _PPC_REG_R2 = 89;;
+let _PPC_REG_R3 = 90;;
+let _PPC_REG_R4 = 91;;
+let _PPC_REG_R5 = 92;;
+let _PPC_REG_R6 = 93;;
+let _PPC_REG_R7 = 94;;
+let _PPC_REG_R8 = 95;;
+let _PPC_REG_R9 = 96;;
+let _PPC_REG_R10 = 97;;
+let _PPC_REG_R11 = 98;;
+let _PPC_REG_R12 = 99;;
+let _PPC_REG_R13 = 100;;
+let _PPC_REG_R14 = 101;;
+let _PPC_REG_R15 = 102;;
+let _PPC_REG_R16 = 103;;
+let _PPC_REG_R17 = 104;;
+let _PPC_REG_R18 = 105;;
+let _PPC_REG_R19 = 106;;
+let _PPC_REG_R20 = 107;;
+let _PPC_REG_R21 = 108;;
+let _PPC_REG_R22 = 109;;
+let _PPC_REG_R23 = 110;;
+let _PPC_REG_R24 = 111;;
+let _PPC_REG_R25 = 112;;
+let _PPC_REG_R26 = 113;;
+let _PPC_REG_R27 = 114;;
+let _PPC_REG_R28 = 115;;
+let _PPC_REG_R29 = 116;;
+let _PPC_REG_R30 = 117;;
+let _PPC_REG_R31 = 118;;
+let _PPC_REG_V0 = 151;;
+let _PPC_REG_V1 = 152;;
+let _PPC_REG_V2 = 153;;
+let _PPC_REG_V3 = 154;;
+let _PPC_REG_V4 = 155;;
+let _PPC_REG_V5 = 156;;
+let _PPC_REG_V6 = 157;;
+let _PPC_REG_V7 = 158;;
+let _PPC_REG_V8 = 159;;
+let _PPC_REG_V9 = 160;;
+let _PPC_REG_V10 = 161;;
+let _PPC_REG_V11 = 162;;
+let _PPC_REG_V12 = 163;;
+let _PPC_REG_V13 = 164;;
+let _PPC_REG_V14 = 165;;
+let _PPC_REG_V15 = 166;;
+let _PPC_REG_V16 = 167;;
+let _PPC_REG_V17 = 168;;
+let _PPC_REG_V18 = 169;;
+let _PPC_REG_V19 = 170;;
+let _PPC_REG_V20 = 171;;
+let _PPC_REG_V21 = 172;;
+let _PPC_REG_V22 = 173;;
+let _PPC_REG_V23 = 174;;
+let _PPC_REG_V24 = 175;;
+let _PPC_REG_V25 = 176;;
+let _PPC_REG_V26 = 177;;
+let _PPC_REG_V27 = 178;;
+let _PPC_REG_V28 = 179;;
+let _PPC_REG_V29 = 180;;
+let _PPC_REG_V30 = 181;;
+let _PPC_REG_V31 = 182;;
+let _PPC_REG_VS0 = 215;;
+let _PPC_REG_VS1 = 216;;
+let _PPC_REG_VS2 = 217;;
+let _PPC_REG_VS3 = 218;;
+let _PPC_REG_VS4 = 219;;
+let _PPC_REG_VS5 = 220;;
+let _PPC_REG_VS6 = 221;;
+let _PPC_REG_VS7 = 222;;
+let _PPC_REG_VS8 = 223;;
+let _PPC_REG_VS9 = 224;;
+let _PPC_REG_VS10 = 225;;
+let _PPC_REG_VS11 = 226;;
+let _PPC_REG_VS12 = 227;;
+let _PPC_REG_VS13 = 228;;
+let _PPC_REG_VS14 = 229;;
+let _PPC_REG_VS15 = 230;;
+let _PPC_REG_VS16 = 231;;
+let _PPC_REG_VS17 = 232;;
+let _PPC_REG_VS18 = 233;;
+let _PPC_REG_VS19 = 234;;
+let _PPC_REG_VS20 = 235;;
+let _PPC_REG_VS21 = 236;;
+let _PPC_REG_VS22 = 237;;
+let _PPC_REG_VS23 = 238;;
+let _PPC_REG_VS24 = 239;;
+let _PPC_REG_VS25 = 240;;
+let _PPC_REG_VS26 = 241;;
+let _PPC_REG_VS27 = 242;;
+let _PPC_REG_VS28 = 243;;
+let _PPC_REG_VS29 = 244;;
+let _PPC_REG_VS30 = 245;;
+let _PPC_REG_VS31 = 246;;
+let _PPC_REG_VS32 = 247;;
+let _PPC_REG_VS33 = 248;;
+let _PPC_REG_VS34 = 249;;
+let _PPC_REG_VS35 = 250;;
+let _PPC_REG_VS36 = 251;;
+let _PPC_REG_VS37 = 252;;
+let _PPC_REG_VS38 = 253;;
+let _PPC_REG_VS39 = 254;;
+let _PPC_REG_VS40 = 255;;
+let _PPC_REG_VS41 = 256;;
+let _PPC_REG_VS42 = 257;;
+let _PPC_REG_VS43 = 258;;
+let _PPC_REG_VS44 = 259;;
+let _PPC_REG_VS45 = 260;;
+let _PPC_REG_VS46 = 261;;
+let _PPC_REG_VS47 = 262;;
+let _PPC_REG_VS48 = 263;;
+let _PPC_REG_VS49 = 264;;
+let _PPC_REG_VS50 = 265;;
+let _PPC_REG_VS51 = 266;;
+let _PPC_REG_VS52 = 267;;
+let _PPC_REG_VS53 = 268;;
+let _PPC_REG_VS54 = 269;;
+let _PPC_REG_VS55 = 270;;
+let _PPC_REG_VS56 = 271;;
+let _PPC_REG_VS57 = 272;;
+let _PPC_REG_VS58 = 273;;
+let _PPC_REG_VS59 = 274;;
+let _PPC_REG_VS60 = 275;;
+let _PPC_REG_VS61 = 276;;
+let _PPC_REG_VS62 = 277;;
+let _PPC_REG_VS63 = 278;;
+let _PPC_REG_CR0EQ = 312;;
+let _PPC_REG_CR1EQ = 313;;
+let _PPC_REG_CR2EQ = 314;;
+let _PPC_REG_CR3EQ = 315;;
+let _PPC_REG_CR4EQ = 316;;
+let _PPC_REG_CR5EQ = 317;;
+let _PPC_REG_CR6EQ = 318;;
+let _PPC_REG_CR7EQ = 319;;
+let _PPC_REG_CR0GT = 320;;
+let _PPC_REG_CR1GT = 321;;
+let _PPC_REG_CR2GT = 322;;
+let _PPC_REG_CR3GT = 323;;
+let _PPC_REG_CR4GT = 324;;
+let _PPC_REG_CR5GT = 325;;
+let _PPC_REG_CR6GT = 326;;
+let _PPC_REG_CR7GT = 327;;
+let _PPC_REG_CR0LT = 328;;
+let _PPC_REG_CR1LT = 329;;
+let _PPC_REG_CR2LT = 330;;
+let _PPC_REG_CR3LT = 331;;
+let _PPC_REG_CR4LT = 332;;
+let _PPC_REG_CR5LT = 333;;
+let _PPC_REG_CR6LT = 334;;
+let _PPC_REG_CR7LT = 335;;
+let _PPC_REG_CR0UN = 336;;
+let _PPC_REG_CR1UN = 337;;
+let _PPC_REG_CR2UN = 338;;
+let _PPC_REG_CR3UN = 339;;
+let _PPC_REG_CR4UN = 340;;
+let _PPC_REG_CR5UN = 341;;
+let _PPC_REG_CR6UN = 342;;
+let _PPC_REG_CR7UN = 343;;
+let _PPC_REG_ENDING = 344;;
+
+let _PPC_INS_INVALID = 0;;
+let _PPC_INS_ADD = 1;;
+let _PPC_INS_ADDC = 2;;
+let _PPC_INS_ADDE = 3;;
+let _PPC_INS_ADDI = 4;;
+let _PPC_INS_ADDIC = 5;;
+let _PPC_INS_ADDIS = 6;;
+let _PPC_INS_ADDME = 7;;
+let _PPC_INS_ADDPCIS = 8;;
+let _PPC_INS_ADDZE = 9;;
+let _PPC_INS_AND = 10;;
+let _PPC_INS_ANDC = 11;;
+let _PPC_INS_ANDI = 12;;
+let _PPC_INS_ANDIS = 13;;
+let _PPC_INS_ATTN = 14;;
+let _PPC_INS_B = 15;;
+let _PPC_INS_BA = 16;;
+let _PPC_INS_BC = 17;;
+let _PPC_INS_BCA = 18;;
+let _PPC_INS_BCCTR = 19;;
+let _PPC_INS_BCCTRL = 20;;
+let _PPC_INS_BCDCFN = 21;;
+let _PPC_INS_BCDCFSQ = 22;;
+let _PPC_INS_BCDCFZ = 23;;
+let _PPC_INS_BCDCPSGN = 24;;
+let _PPC_INS_BCDCTN = 25;;
+let _PPC_INS_BCDCTSQ = 26;;
+let _PPC_INS_BCDCTZ = 27;;
+let _PPC_INS_BCDS = 28;;
+let _PPC_INS_BCDSETSGN = 29;;
+let _PPC_INS_BCDSR = 30;;
+let _PPC_INS_BCDTRUNC = 31;;
+let _PPC_INS_BCDUS = 32;;
+let _PPC_INS_BCDUTRUNC = 33;;
+let _PPC_INS_BCL = 34;;
+let _PPC_INS_BCLA = 35;;
+let _PPC_INS_BCLR = 36;;
+let _PPC_INS_BCLRL = 37;;
+let _PPC_INS_BCTR = 38;;
+let _PPC_INS_BCTRL = 39;;
+let _PPC_INS_BDNZ = 40;;
+let _PPC_INS_BDNZA = 41;;
+let _PPC_INS_BDNZF = 42;;
+let _PPC_INS_BDNZFA = 43;;
+let _PPC_INS_BDNZFL = 44;;
+let _PPC_INS_BDNZFLA = 45;;
+let _PPC_INS_BDNZFLR = 46;;
+let _PPC_INS_BDNZFLRL = 47;;
+let _PPC_INS_BDNZL = 48;;
+let _PPC_INS_BDNZLA = 49;;
+let _PPC_INS_BDNZLR = 50;;
+let _PPC_INS_BDNZLRL = 51;;
+let _PPC_INS_BDNZT = 52;;
+let _PPC_INS_BDNZTA = 53;;
+let _PPC_INS_BDNZTL = 54;;
+let _PPC_INS_BDNZTLA = 55;;
+let _PPC_INS_BDNZTLR = 56;;
+let _PPC_INS_BDNZTLRL = 57;;
+let _PPC_INS_BDZ = 58;;
+let _PPC_INS_BDZA = 59;;
+let _PPC_INS_BDZF = 60;;
+let _PPC_INS_BDZFA = 61;;
+let _PPC_INS_BDZFL = 62;;
+let _PPC_INS_BDZFLA = 63;;
+let _PPC_INS_BDZFLR = 64;;
+let _PPC_INS_BDZFLRL = 65;;
+let _PPC_INS_BDZL = 66;;
+let _PPC_INS_BDZLA = 67;;
+let _PPC_INS_BDZLR = 68;;
+let _PPC_INS_BDZLRL = 69;;
+let _PPC_INS_BDZT = 70;;
+let _PPC_INS_BDZTA = 71;;
+let _PPC_INS_BDZTL = 72;;
+let _PPC_INS_BDZTLA = 73;;
+let _PPC_INS_BDZTLR = 74;;
+let _PPC_INS_BDZTLRL = 75;;
+let _PPC_INS_BEQ = 76;;
+let _PPC_INS_BEQA = 77;;
+let _PPC_INS_BEQCTR = 78;;
+let _PPC_INS_BEQCTRL = 79;;
+let _PPC_INS_BEQL = 80;;
+let _PPC_INS_BEQLA = 81;;
+let _PPC_INS_BEQLR = 82;;
+let _PPC_INS_BEQLRL = 83;;
+let _PPC_INS_BF = 84;;
+let _PPC_INS_BFA = 85;;
+let _PPC_INS_BFCTR = 86;;
+let _PPC_INS_BFCTRL = 87;;
+let _PPC_INS_BFL = 88;;
+let _PPC_INS_BFLA = 89;;
+let _PPC_INS_BFLR = 90;;
+let _PPC_INS_BFLRL = 91;;
+let _PPC_INS_BGE = 92;;
+let _PPC_INS_BGEA = 93;;
+let _PPC_INS_BGECTR = 94;;
+let _PPC_INS_BGECTRL = 95;;
+let _PPC_INS_BGEL = 96;;
+let _PPC_INS_BGELA = 97;;
+let _PPC_INS_BGELR = 98;;
+let _PPC_INS_BGELRL = 99;;
+let _PPC_INS_BGT = 100;;
+let _PPC_INS_BGTA = 101;;
+let _PPC_INS_BGTCTR = 102;;
+let _PPC_INS_BGTCTRL = 103;;
+let _PPC_INS_BGTL = 104;;
+let _PPC_INS_BGTLA = 105;;
+let _PPC_INS_BGTLR = 106;;
+let _PPC_INS_BGTLRL = 107;;
+let _PPC_INS_BL = 108;;
+let _PPC_INS_BLA = 109;;
+let _PPC_INS_BLE = 110;;
+let _PPC_INS_BLEA = 111;;
+let _PPC_INS_BLECTR = 112;;
+let _PPC_INS_BLECTRL = 113;;
+let _PPC_INS_BLEL = 114;;
+let _PPC_INS_BLELA = 115;;
+let _PPC_INS_BLELR = 116;;
+let _PPC_INS_BLELRL = 117;;
+let _PPC_INS_BLR = 118;;
+let _PPC_INS_BLRL = 119;;
+let _PPC_INS_BLT = 120;;
+let _PPC_INS_BLTA = 121;;
+let _PPC_INS_BLTCTR = 122;;
+let _PPC_INS_BLTCTRL = 123;;
+let _PPC_INS_BLTL = 124;;
+let _PPC_INS_BLTLA = 125;;
+let _PPC_INS_BLTLR = 126;;
+let _PPC_INS_BLTLRL = 127;;
+let _PPC_INS_BNE = 128;;
+let _PPC_INS_BNEA = 129;;
+let _PPC_INS_BNECTR = 130;;
+let _PPC_INS_BNECTRL = 131;;
+let _PPC_INS_BNEL = 132;;
+let _PPC_INS_BNELA = 133;;
+let _PPC_INS_BNELR = 134;;
+let _PPC_INS_BNELRL = 135;;
+let _PPC_INS_BNG = 136;;
+let _PPC_INS_BNGA = 137;;
+let _PPC_INS_BNGCTR = 138;;
+let _PPC_INS_BNGCTRL = 139;;
+let _PPC_INS_BNGL = 140;;
+let _PPC_INS_BNGLA = 141;;
+let _PPC_INS_BNGLR = 142;;
+let _PPC_INS_BNGLRL = 143;;
+let _PPC_INS_BNL = 144;;
+let _PPC_INS_BNLA = 145;;
+let _PPC_INS_BNLCTR = 146;;
+let _PPC_INS_BNLCTRL = 147;;
+let _PPC_INS_BNLL = 148;;
+let _PPC_INS_BNLLA = 149;;
+let _PPC_INS_BNLLR = 150;;
+let _PPC_INS_BNLLRL = 151;;
+let _PPC_INS_BNS = 152;;
+let _PPC_INS_BNSA = 153;;
+let _PPC_INS_BNSCTR = 154;;
+let _PPC_INS_BNSCTRL = 155;;
+let _PPC_INS_BNSL = 156;;
+let _PPC_INS_BNSLA = 157;;
+let _PPC_INS_BNSLR = 158;;
+let _PPC_INS_BNSLRL = 159;;
+let _PPC_INS_BNU = 160;;
+let _PPC_INS_BNUA = 161;;
+let _PPC_INS_BNUCTR = 162;;
+let _PPC_INS_BNUCTRL = 163;;
+let _PPC_INS_BNUL = 164;;
+let _PPC_INS_BNULA = 165;;
+let _PPC_INS_BNULR = 166;;
+let _PPC_INS_BNULRL = 167;;
+let _PPC_INS_BPERMD = 168;;
+let _PPC_INS_BRINC = 169;;
+let _PPC_INS_BSO = 170;;
+let _PPC_INS_BSOA = 171;;
+let _PPC_INS_BSOCTR = 172;;
+let _PPC_INS_BSOCTRL = 173;;
+let _PPC_INS_BSOL = 174;;
+let _PPC_INS_BSOLA = 175;;
+let _PPC_INS_BSOLR = 176;;
+let _PPC_INS_BSOLRL = 177;;
+let _PPC_INS_BT = 178;;
+let _PPC_INS_BTA = 179;;
+let _PPC_INS_BTCTR = 180;;
+let _PPC_INS_BTCTRL = 181;;
+let _PPC_INS_BTL = 182;;
+let _PPC_INS_BTLA = 183;;
+let _PPC_INS_BTLR = 184;;
+let _PPC_INS_BTLRL = 185;;
+let _PPC_INS_BUN = 186;;
+let _PPC_INS_BUNA = 187;;
+let _PPC_INS_BUNCTR = 188;;
+let _PPC_INS_BUNCTRL = 189;;
+let _PPC_INS_BUNL = 190;;
+let _PPC_INS_BUNLA = 191;;
+let _PPC_INS_BUNLR = 192;;
+let _PPC_INS_BUNLRL = 193;;
+let _PPC_INS_CLRBHRB = 194;;
+let _PPC_INS_CLRLDI = 195;;
+let _PPC_INS_CLRLSLDI = 196;;
+let _PPC_INS_CLRLSLWI = 197;;
+let _PPC_INS_CLRLWI = 198;;
+let _PPC_INS_CLRRDI = 199;;
+let _PPC_INS_CLRRWI = 200;;
+let _PPC_INS_CMP = 201;;
+let _PPC_INS_CMPB = 202;;
+let _PPC_INS_CMPD = 203;;
+let _PPC_INS_CMPDI = 204;;
+let _PPC_INS_CMPEQB = 205;;
+let _PPC_INS_CMPI = 206;;
+let _PPC_INS_CMPL = 207;;
+let _PPC_INS_CMPLD = 208;;
+let _PPC_INS_CMPLDI = 209;;
+let _PPC_INS_CMPLI = 210;;
+let _PPC_INS_CMPLW = 211;;
+let _PPC_INS_CMPLWI = 212;;
+let _PPC_INS_CMPRB = 213;;
+let _PPC_INS_CMPW = 214;;
+let _PPC_INS_CMPWI = 215;;
+let _PPC_INS_CNTLZD = 216;;
+let _PPC_INS_CNTLZW = 217;;
+let _PPC_INS_CNTTZD = 218;;
+let _PPC_INS_CNTTZW = 219;;
+let _PPC_INS_COPY = 220;;
+let _PPC_INS_COPY_FIRST = 221;;
+let _PPC_INS_CP_ABORT = 222;;
+let _PPC_INS_CRAND = 223;;
+let _PPC_INS_CRANDC = 224;;
+let _PPC_INS_CRCLR = 225;;
+let _PPC_INS_CREQV = 226;;
+let _PPC_INS_CRMOVE = 227;;
+let _PPC_INS_CRNAND = 228;;
+let _PPC_INS_CRNOR = 229;;
+let _PPC_INS_CRNOT = 230;;
+let _PPC_INS_CROR = 231;;
+let _PPC_INS_CRORC = 232;;
+let _PPC_INS_CRSET = 233;;
+let _PPC_INS_CRXOR = 234;;
+let _PPC_INS_DARN = 235;;
+let _PPC_INS_DCBA = 236;;
+let _PPC_INS_DCBF = 237;;
+let _PPC_INS_DCBFEP = 238;;
+let _PPC_INS_DCBFL = 239;;
+let _PPC_INS_DCBFLP = 240;;
+let _PPC_INS_DCBI = 241;;
+let _PPC_INS_DCBST = 242;;
+let _PPC_INS_DCBSTEP = 243;;
+let _PPC_INS_DCBT = 244;;
+let _PPC_INS_DCBTCT = 245;;
+let _PPC_INS_DCBTDS = 246;;
+let _PPC_INS_DCBTEP = 247;;
+let _PPC_INS_DCBTST = 248;;
+let _PPC_INS_DCBTSTCT = 249;;
+let _PPC_INS_DCBTSTDS = 250;;
+let _PPC_INS_DCBTSTEP = 251;;
+let _PPC_INS_DCBTSTT = 252;;
+let _PPC_INS_DCBTT = 253;;
+let _PPC_INS_DCBZ = 254;;
+let _PPC_INS_DCBZEP = 255;;
+let _PPC_INS_DCBZL = 256;;
+let _PPC_INS_DCBZLEP = 257;;
+let _PPC_INS_DCCCI = 258;;
+let _PPC_INS_DCI = 259;;
+let _PPC_INS_DIVD = 260;;
+let _PPC_INS_DIVDE = 261;;
+let _PPC_INS_DIVDEU = 262;;
+let _PPC_INS_DIVDU = 263;;
+let _PPC_INS_DIVW = 264;;
+let _PPC_INS_DIVWE = 265;;
+let _PPC_INS_DIVWEU = 266;;
+let _PPC_INS_DIVWU = 267;;
+let _PPC_INS_DSS = 268;;
+let _PPC_INS_DSSALL = 269;;
+let _PPC_INS_DST = 270;;
+let _PPC_INS_DSTST = 271;;
+let _PPC_INS_DSTSTT = 272;;
+let _PPC_INS_DSTT = 273;;
+let _PPC_INS_EFDABS = 274;;
+let _PPC_INS_EFDADD = 275;;
+let _PPC_INS_EFDCFS = 276;;
+let _PPC_INS_EFDCFSF = 277;;
+let _PPC_INS_EFDCFSI = 278;;
+let _PPC_INS_EFDCFSID = 279;;
+let _PPC_INS_EFDCFUF = 280;;
+let _PPC_INS_EFDCFUI = 281;;
+let _PPC_INS_EFDCFUID = 282;;
+let _PPC_INS_EFDCMPEQ = 283;;
+let _PPC_INS_EFDCMPGT = 284;;
+let _PPC_INS_EFDCMPLT = 285;;
+let _PPC_INS_EFDCTSF = 286;;
+let _PPC_INS_EFDCTSI = 287;;
+let _PPC_INS_EFDCTSIDZ = 288;;
+let _PPC_INS_EFDCTSIZ = 289;;
+let _PPC_INS_EFDCTUF = 290;;
+let _PPC_INS_EFDCTUI = 291;;
+let _PPC_INS_EFDCTUIDZ = 292;;
+let _PPC_INS_EFDCTUIZ = 293;;
+let _PPC_INS_EFDDIV = 294;;
+let _PPC_INS_EFDMUL = 295;;
+let _PPC_INS_EFDNABS = 296;;
+let _PPC_INS_EFDNEG = 297;;
+let _PPC_INS_EFDSUB = 298;;
+let _PPC_INS_EFDTSTEQ = 299;;
+let _PPC_INS_EFDTSTGT = 300;;
+let _PPC_INS_EFDTSTLT = 301;;
+let _PPC_INS_EFSABS = 302;;
+let _PPC_INS_EFSADD = 303;;
+let _PPC_INS_EFSCFD = 304;;
+let _PPC_INS_EFSCFSF = 305;;
+let _PPC_INS_EFSCFSI = 306;;
+let _PPC_INS_EFSCFUF = 307;;
+let _PPC_INS_EFSCFUI = 308;;
+let _PPC_INS_EFSCMPEQ = 309;;
+let _PPC_INS_EFSCMPGT = 310;;
+let _PPC_INS_EFSCMPLT = 311;;
+let _PPC_INS_EFSCTSF = 312;;
+let _PPC_INS_EFSCTSI = 313;;
+let _PPC_INS_EFSCTSIZ = 314;;
+let _PPC_INS_EFSCTUF = 315;;
+let _PPC_INS_EFSCTUI = 316;;
+let _PPC_INS_EFSCTUIZ = 317;;
+let _PPC_INS_EFSDIV = 318;;
+let _PPC_INS_EFSMUL = 319;;
+let _PPC_INS_EFSNABS = 320;;
+let _PPC_INS_EFSNEG = 321;;
+let _PPC_INS_EFSSUB = 322;;
+let _PPC_INS_EFSTSTEQ = 323;;
+let _PPC_INS_EFSTSTGT = 324;;
+let _PPC_INS_EFSTSTLT = 325;;
+let _PPC_INS_EIEIO = 326;;
+let _PPC_INS_EQV = 327;;
+let _PPC_INS_EVABS = 328;;
+let _PPC_INS_EVADDIW = 329;;
+let _PPC_INS_EVADDSMIAAW = 330;;
+let _PPC_INS_EVADDSSIAAW = 331;;
+let _PPC_INS_EVADDUMIAAW = 332;;
+let _PPC_INS_EVADDUSIAAW = 333;;
+let _PPC_INS_EVADDW = 334;;
+let _PPC_INS_EVAND = 335;;
+let _PPC_INS_EVANDC = 336;;
+let _PPC_INS_EVCMPEQ = 337;;
+let _PPC_INS_EVCMPGTS = 338;;
+let _PPC_INS_EVCMPGTU = 339;;
+let _PPC_INS_EVCMPLTS = 340;;
+let _PPC_INS_EVCMPLTU = 341;;
+let _PPC_INS_EVCNTLSW = 342;;
+let _PPC_INS_EVCNTLZW = 343;;
+let _PPC_INS_EVDIVWS = 344;;
+let _PPC_INS_EVDIVWU = 345;;
+let _PPC_INS_EVEQV = 346;;
+let _PPC_INS_EVEXTSB = 347;;
+let _PPC_INS_EVEXTSH = 348;;
+let _PPC_INS_EVFSABS = 349;;
+let _PPC_INS_EVFSADD = 350;;
+let _PPC_INS_EVFSCFSF = 351;;
+let _PPC_INS_EVFSCFSI = 352;;
+let _PPC_INS_EVFSCFUF = 353;;
+let _PPC_INS_EVFSCFUI = 354;;
+let _PPC_INS_EVFSCMPEQ = 355;;
+let _PPC_INS_EVFSCMPGT = 356;;
+let _PPC_INS_EVFSCMPLT = 357;;
+let _PPC_INS_EVFSCTSF = 358;;
+let _PPC_INS_EVFSCTSI = 359;;
+let _PPC_INS_EVFSCTSIZ = 360;;
+let _PPC_INS_EVFSCTUI = 361;;
+let _PPC_INS_EVFSDIV = 362;;
+let _PPC_INS_EVFSMUL = 363;;
+let _PPC_INS_EVFSNABS = 364;;
+let _PPC_INS_EVFSNEG = 365;;
+let _PPC_INS_EVFSSUB = 366;;
+let _PPC_INS_EVFSTSTEQ = 367;;
+let _PPC_INS_EVFSTSTGT = 368;;
+let _PPC_INS_EVFSTSTLT = 369;;
+let _PPC_INS_EVLDD = 370;;
+let _PPC_INS_EVLDDX = 371;;
+let _PPC_INS_EVLDH = 372;;
+let _PPC_INS_EVLDHX = 373;;
+let _PPC_INS_EVLDW = 374;;
+let _PPC_INS_EVLDWX = 375;;
+let _PPC_INS_EVLHHESPLAT = 376;;
+let _PPC_INS_EVLHHESPLATX = 377;;
+let _PPC_INS_EVLHHOSSPLAT = 378;;
+let _PPC_INS_EVLHHOSSPLATX = 379;;
+let _PPC_INS_EVLHHOUSPLAT = 380;;
+let _PPC_INS_EVLHHOUSPLATX = 381;;
+let _PPC_INS_EVLWHE = 382;;
+let _PPC_INS_EVLWHEX = 383;;
+let _PPC_INS_EVLWHOS = 384;;
+let _PPC_INS_EVLWHOSX = 385;;
+let _PPC_INS_EVLWHOU = 386;;
+let _PPC_INS_EVLWHOUX = 387;;
+let _PPC_INS_EVLWHSPLAT = 388;;
+let _PPC_INS_EVLWHSPLATX = 389;;
+let _PPC_INS_EVLWWSPLAT = 390;;
+let _PPC_INS_EVLWWSPLATX = 391;;
+let _PPC_INS_EVMERGEHI = 392;;
+let _PPC_INS_EVMERGEHILO = 393;;
+let _PPC_INS_EVMERGELO = 394;;
+let _PPC_INS_EVMERGELOHI = 395;;
+let _PPC_INS_EVMHEGSMFAA = 396;;
+let _PPC_INS_EVMHEGSMFAN = 397;;
+let _PPC_INS_EVMHEGSMIAA = 398;;
+let _PPC_INS_EVMHEGSMIAN = 399;;
+let _PPC_INS_EVMHEGUMIAA = 400;;
+let _PPC_INS_EVMHEGUMIAN = 401;;
+let _PPC_INS_EVMHESMF = 402;;
+let _PPC_INS_EVMHESMFA = 403;;
+let _PPC_INS_EVMHESMFAAW = 404;;
+let _PPC_INS_EVMHESMFANW = 405;;
+let _PPC_INS_EVMHESMI = 406;;
+let _PPC_INS_EVMHESMIA = 407;;
+let _PPC_INS_EVMHESMIAAW = 408;;
+let _PPC_INS_EVMHESMIANW = 409;;
+let _PPC_INS_EVMHESSF = 410;;
+let _PPC_INS_EVMHESSFA = 411;;
+let _PPC_INS_EVMHESSFAAW = 412;;
+let _PPC_INS_EVMHESSFANW = 413;;
+let _PPC_INS_EVMHESSIAAW = 414;;
+let _PPC_INS_EVMHESSIANW = 415;;
+let _PPC_INS_EVMHEUMI = 416;;
+let _PPC_INS_EVMHEUMIA = 417;;
+let _PPC_INS_EVMHEUMIAAW = 418;;
+let _PPC_INS_EVMHEUMIANW = 419;;
+let _PPC_INS_EVMHEUSIAAW = 420;;
+let _PPC_INS_EVMHEUSIANW = 421;;
+let _PPC_INS_EVMHOGSMFAA = 422;;
+let _PPC_INS_EVMHOGSMFAN = 423;;
+let _PPC_INS_EVMHOGSMIAA = 424;;
+let _PPC_INS_EVMHOGSMIAN = 425;;
+let _PPC_INS_EVMHOGUMIAA = 426;;
+let _PPC_INS_EVMHOGUMIAN = 427;;
+let _PPC_INS_EVMHOSMF = 428;;
+let _PPC_INS_EVMHOSMFA = 429;;
+let _PPC_INS_EVMHOSMFAAW = 430;;
+let _PPC_INS_EVMHOSMFANW = 431;;
+let _PPC_INS_EVMHOSMI = 432;;
+let _PPC_INS_EVMHOSMIA = 433;;
+let _PPC_INS_EVMHOSMIAAW = 434;;
+let _PPC_INS_EVMHOSMIANW = 435;;
+let _PPC_INS_EVMHOSSF = 436;;
+let _PPC_INS_EVMHOSSFA = 437;;
+let _PPC_INS_EVMHOSSFAAW = 438;;
+let _PPC_INS_EVMHOSSFANW = 439;;
+let _PPC_INS_EVMHOSSIAAW = 440;;
+let _PPC_INS_EVMHOSSIANW = 441;;
+let _PPC_INS_EVMHOUMI = 442;;
+let _PPC_INS_EVMHOUMIA = 443;;
+let _PPC_INS_EVMHOUMIAAW = 444;;
+let _PPC_INS_EVMHOUMIANW = 445;;
+let _PPC_INS_EVMHOUSIAAW = 446;;
+let _PPC_INS_EVMHOUSIANW = 447;;
+let _PPC_INS_EVMRA = 448;;
+let _PPC_INS_EVMWHSMF = 449;;
+let _PPC_INS_EVMWHSMFA = 450;;
+let _PPC_INS_EVMWHSMI = 451;;
+let _PPC_INS_EVMWHSMIA = 452;;
+let _PPC_INS_EVMWHSSF = 453;;
+let _PPC_INS_EVMWHSSFA = 454;;
+let _PPC_INS_EVMWHUMI = 455;;
+let _PPC_INS_EVMWHUMIA = 456;;
+let _PPC_INS_EVMWLSMIAAW = 457;;
+let _PPC_INS_EVMWLSMIANW = 458;;
+let _PPC_INS_EVMWLSSIAAW = 459;;
+let _PPC_INS_EVMWLSSIANW = 460;;
+let _PPC_INS_EVMWLUMI = 461;;
+let _PPC_INS_EVMWLUMIA = 462;;
+let _PPC_INS_EVMWLUMIAAW = 463;;
+let _PPC_INS_EVMWLUMIANW = 464;;
+let _PPC_INS_EVMWLUSIAAW = 465;;
+let _PPC_INS_EVMWLUSIANW = 466;;
+let _PPC_INS_EVMWSMF = 467;;
+let _PPC_INS_EVMWSMFA = 468;;
+let _PPC_INS_EVMWSMFAA = 469;;
+let _PPC_INS_EVMWSMFAN = 470;;
+let _PPC_INS_EVMWSMI = 471;;
+let _PPC_INS_EVMWSMIA = 472;;
+let _PPC_INS_EVMWSMIAA = 473;;
+let _PPC_INS_EVMWSMIAN = 474;;
+let _PPC_INS_EVMWSSF = 475;;
+let _PPC_INS_EVMWSSFA = 476;;
+let _PPC_INS_EVMWSSFAA = 477;;
+let _PPC_INS_EVMWSSFAN = 478;;
+let _PPC_INS_EVMWUMI = 479;;
+let _PPC_INS_EVMWUMIA = 480;;
+let _PPC_INS_EVMWUMIAA = 481;;
+let _PPC_INS_EVMWUMIAN = 482;;
+let _PPC_INS_EVNAND = 483;;
+let _PPC_INS_EVNEG = 484;;
+let _PPC_INS_EVNOR = 485;;
+let _PPC_INS_EVOR = 486;;
+let _PPC_INS_EVORC = 487;;
+let _PPC_INS_EVRLW = 488;;
+let _PPC_INS_EVRLWI = 489;;
+let _PPC_INS_EVRNDW = 490;;
+let _PPC_INS_EVSEL = 491;;
+let _PPC_INS_EVSLW = 492;;
+let _PPC_INS_EVSLWI = 493;;
+let _PPC_INS_EVSPLATFI = 494;;
+let _PPC_INS_EVSPLATI = 495;;
+let _PPC_INS_EVSRWIS = 496;;
+let _PPC_INS_EVSRWIU = 497;;
+let _PPC_INS_EVSRWS = 498;;
+let _PPC_INS_EVSRWU = 499;;
+let _PPC_INS_EVSTDD = 500;;
+let _PPC_INS_EVSTDDX = 501;;
+let _PPC_INS_EVSTDH = 502;;
+let _PPC_INS_EVSTDHX = 503;;
+let _PPC_INS_EVSTDW = 504;;
+let _PPC_INS_EVSTDWX = 505;;
+let _PPC_INS_EVSTWHE = 506;;
+let _PPC_INS_EVSTWHEX = 507;;
+let _PPC_INS_EVSTWHO = 508;;
+let _PPC_INS_EVSTWHOX = 509;;
+let _PPC_INS_EVSTWWE = 510;;
+let _PPC_INS_EVSTWWEX = 511;;
+let _PPC_INS_EVSTWWO = 512;;
+let _PPC_INS_EVSTWWOX = 513;;
+let _PPC_INS_EVSUBFSMIAAW = 514;;
+let _PPC_INS_EVSUBFSSIAAW = 515;;
+let _PPC_INS_EVSUBFUMIAAW = 516;;
+let _PPC_INS_EVSUBFUSIAAW = 517;;
+let _PPC_INS_EVSUBFW = 518;;
+let _PPC_INS_EVSUBIFW = 519;;
+let _PPC_INS_EVXOR = 520;;
+let _PPC_INS_EXTLDI = 521;;
+let _PPC_INS_EXTLWI = 522;;
+let _PPC_INS_EXTRDI = 523;;
+let _PPC_INS_EXTRWI = 524;;
+let _PPC_INS_EXTSB = 525;;
+let _PPC_INS_EXTSH = 526;;
+let _PPC_INS_EXTSW = 527;;
+let _PPC_INS_EXTSWSLI = 528;;
+let _PPC_INS_FABS = 529;;
+let _PPC_INS_FADD = 530;;
+let _PPC_INS_FADDS = 531;;
+let _PPC_INS_FCFID = 532;;
+let _PPC_INS_FCFIDS = 533;;
+let _PPC_INS_FCFIDU = 534;;
+let _PPC_INS_FCFIDUS = 535;;
+let _PPC_INS_FCMPU = 536;;
+let _PPC_INS_FCPSGN = 537;;
+let _PPC_INS_FCTID = 538;;
+let _PPC_INS_FCTIDU = 539;;
+let _PPC_INS_FCTIDUZ = 540;;
+let _PPC_INS_FCTIDZ = 541;;
+let _PPC_INS_FCTIW = 542;;
+let _PPC_INS_FCTIWU = 543;;
+let _PPC_INS_FCTIWUZ = 544;;
+let _PPC_INS_FCTIWZ = 545;;
+let _PPC_INS_FDIV = 546;;
+let _PPC_INS_FDIVS = 547;;
+let _PPC_INS_FMADD = 548;;
+let _PPC_INS_FMADDS = 549;;
+let _PPC_INS_FMR = 550;;
+let _PPC_INS_FMSUB = 551;;
+let _PPC_INS_FMSUBS = 552;;
+let _PPC_INS_FMUL = 553;;
+let _PPC_INS_FMULS = 554;;
+let _PPC_INS_FNABS = 555;;
+let _PPC_INS_FNEG = 556;;
+let _PPC_INS_FNMADD = 557;;
+let _PPC_INS_FNMADDS = 558;;
+let _PPC_INS_FNMSUB = 559;;
+let _PPC_INS_FNMSUBS = 560;;
+let _PPC_INS_FRE = 561;;
+let _PPC_INS_FRES = 562;;
+let _PPC_INS_FRIM = 563;;
+let _PPC_INS_FRIN = 564;;
+let _PPC_INS_FRIP = 565;;
+let _PPC_INS_FRIZ = 566;;
+let _PPC_INS_FRSP = 567;;
+let _PPC_INS_FRSQRTE = 568;;
+let _PPC_INS_FRSQRTES = 569;;
+let _PPC_INS_FSEL = 570;;
+let _PPC_INS_FSQRT = 571;;
+let _PPC_INS_FSQRTS = 572;;
+let _PPC_INS_FSUB = 573;;
+let _PPC_INS_FSUBS = 574;;
+let _PPC_INS_FTDIV = 575;;
+let _PPC_INS_FTSQRT = 576;;
+let _PPC_INS_HRFID = 577;;
+let _PPC_INS_ICBI = 578;;
+let _PPC_INS_ICBIEP = 579;;
+let _PPC_INS_ICBLC = 580;;
+let _PPC_INS_ICBLQ = 581;;
+let _PPC_INS_ICBT = 582;;
+let _PPC_INS_ICBTLS = 583;;
+let _PPC_INS_ICCCI = 584;;
+let _PPC_INS_ICI = 585;;
+let _PPC_INS_INSLWI = 586;;
+let _PPC_INS_INSRDI = 587;;
+let _PPC_INS_INSRWI = 588;;
+let _PPC_INS_ISEL = 589;;
+let _PPC_INS_ISYNC = 590;;
+let _PPC_INS_LA = 591;;
+let _PPC_INS_LBARX = 592;;
+let _PPC_INS_LBEPX = 593;;
+let _PPC_INS_LBZ = 594;;
+let _PPC_INS_LBZCIX = 595;;
+let _PPC_INS_LBZU = 596;;
+let _PPC_INS_LBZUX = 597;;
+let _PPC_INS_LBZX = 598;;
+let _PPC_INS_LD = 599;;
+let _PPC_INS_LDARX = 600;;
+let _PPC_INS_LDAT = 601;;
+let _PPC_INS_LDBRX = 602;;
+let _PPC_INS_LDCIX = 603;;
+let _PPC_INS_LDMX = 604;;
+let _PPC_INS_LDU = 605;;
+let _PPC_INS_LDUX = 606;;
+let _PPC_INS_LDX = 607;;
+let _PPC_INS_LFD = 608;;
+let _PPC_INS_LFDEPX = 609;;
+let _PPC_INS_LFDU = 610;;
+let _PPC_INS_LFDUX = 611;;
+let _PPC_INS_LFDX = 612;;
+let _PPC_INS_LFIWAX = 613;;
+let _PPC_INS_LFIWZX = 614;;
+let _PPC_INS_LFS = 615;;
+let _PPC_INS_LFSU = 616;;
+let _PPC_INS_LFSUX = 617;;
+let _PPC_INS_LFSX = 618;;
+let _PPC_INS_LHA = 619;;
+let _PPC_INS_LHARX = 620;;
+let _PPC_INS_LHAU = 621;;
+let _PPC_INS_LHAUX = 622;;
+let _PPC_INS_LHAX = 623;;
+let _PPC_INS_LHBRX = 624;;
+let _PPC_INS_LHEPX = 625;;
+let _PPC_INS_LHZ = 626;;
+let _PPC_INS_LHZCIX = 627;;
+let _PPC_INS_LHZU = 628;;
+let _PPC_INS_LHZUX = 629;;
+let _PPC_INS_LHZX = 630;;
+let _PPC_INS_LI = 631;;
+let _PPC_INS_LIS = 632;;
+let _PPC_INS_LMW = 633;;
+let _PPC_INS_LNIA = 634;;
+let _PPC_INS_LSWI = 635;;
+let _PPC_INS_LVEBX = 636;;
+let _PPC_INS_LVEHX = 637;;
+let _PPC_INS_LVEWX = 638;;
+let _PPC_INS_LVSL = 639;;
+let _PPC_INS_LVSR = 640;;
+let _PPC_INS_LVX = 641;;
+let _PPC_INS_LVXL = 642;;
+let _PPC_INS_LWA = 643;;
+let _PPC_INS_LWARX = 644;;
+let _PPC_INS_LWAT = 645;;
+let _PPC_INS_LWAUX = 646;;
+let _PPC_INS_LWAX = 647;;
+let _PPC_INS_LWBRX = 648;;
+let _PPC_INS_LWEPX = 649;;
+let _PPC_INS_LWSYNC = 650;;
+let _PPC_INS_LWZ = 651;;
+let _PPC_INS_LWZCIX = 652;;
+let _PPC_INS_LWZU = 653;;
+let _PPC_INS_LWZUX = 654;;
+let _PPC_INS_LWZX = 655;;
+let _PPC_INS_LXSD = 656;;
+let _PPC_INS_LXSDX = 657;;
+let _PPC_INS_LXSIBZX = 658;;
+let _PPC_INS_LXSIHZX = 659;;
+let _PPC_INS_LXSIWAX = 660;;
+let _PPC_INS_LXSIWZX = 661;;
+let _PPC_INS_LXSSP = 662;;
+let _PPC_INS_LXSSPX = 663;;
+let _PPC_INS_LXV = 664;;
+let _PPC_INS_LXVB16X = 665;;
+let _PPC_INS_LXVD2X = 666;;
+let _PPC_INS_LXVDSX = 667;;
+let _PPC_INS_LXVH8X = 668;;
+let _PPC_INS_LXVL = 669;;
+let _PPC_INS_LXVLL = 670;;
+let _PPC_INS_LXVW4X = 671;;
+let _PPC_INS_LXVWSX = 672;;
+let _PPC_INS_LXVX = 673;;
+let _PPC_INS_MADDHD = 674;;
+let _PPC_INS_MADDHDU = 675;;
+let _PPC_INS_MADDLD = 676;;
+let _PPC_INS_MBAR = 677;;
+let _PPC_INS_MCRF = 678;;
+let _PPC_INS_MCRFS = 679;;
+let _PPC_INS_MCRXRX = 680;;
+let _PPC_INS_MFAMR = 681;;
+let _PPC_INS_MFASR = 682;;
+let _PPC_INS_MFBHRBE = 683;;
+let _PPC_INS_MFBR0 = 684;;
+let _PPC_INS_MFBR1 = 685;;
+let _PPC_INS_MFBR2 = 686;;
+let _PPC_INS_MFBR3 = 687;;
+let _PPC_INS_MFBR4 = 688;;
+let _PPC_INS_MFBR5 = 689;;
+let _PPC_INS_MFBR6 = 690;;
+let _PPC_INS_MFBR7 = 691;;
+let _PPC_INS_MFCFAR = 692;;
+let _PPC_INS_MFCR = 693;;
+let _PPC_INS_MFCTR = 694;;
+let _PPC_INS_MFDAR = 695;;
+let _PPC_INS_MFDBATL = 696;;
+let _PPC_INS_MFDBATU = 697;;
+let _PPC_INS_MFDCCR = 698;;
+let _PPC_INS_MFDCR = 699;;
+let _PPC_INS_MFDEAR = 700;;
+let _PPC_INS_MFDEC = 701;;
+let _PPC_INS_MFDSCR = 702;;
+let _PPC_INS_MFDSISR = 703;;
+let _PPC_INS_MFESR = 704;;
+let _PPC_INS_MFFPRD = 705;;
+let _PPC_INS_MFFS = 706;;
+let _PPC_INS_MFFSCDRN = 707;;
+let _PPC_INS_MFFSCDRNI = 708;;
+let _PPC_INS_MFFSCE = 709;;
+let _PPC_INS_MFFSCRN = 710;;
+let _PPC_INS_MFFSCRNI = 711;;
+let _PPC_INS_MFFSL = 712;;
+let _PPC_INS_MFIBATL = 713;;
+let _PPC_INS_MFIBATU = 714;;
+let _PPC_INS_MFICCR = 715;;
+let _PPC_INS_MFLR = 716;;
+let _PPC_INS_MFMSR = 717;;
+let _PPC_INS_MFOCRF = 718;;
+let _PPC_INS_MFPID = 719;;
+let _PPC_INS_MFPMR = 720;;
+let _PPC_INS_MFPVR = 721;;
+let _PPC_INS_MFRTCL = 722;;
+let _PPC_INS_MFRTCU = 723;;
+let _PPC_INS_MFSDR1 = 724;;
+let _PPC_INS_MFSPEFSCR = 725;;
+let _PPC_INS_MFSPR = 726;;
+let _PPC_INS_MFSPRG = 727;;
+let _PPC_INS_MFSPRG0 = 728;;
+let _PPC_INS_MFSPRG1 = 729;;
+let _PPC_INS_MFSPRG2 = 730;;
+let _PPC_INS_MFSPRG3 = 731;;
+let _PPC_INS_MFSPRG4 = 732;;
+let _PPC_INS_MFSPRG5 = 733;;
+let _PPC_INS_MFSPRG6 = 734;;
+let _PPC_INS_MFSPRG7 = 735;;
+let _PPC_INS_MFSR = 736;;
+let _PPC_INS_MFSRIN = 737;;
+let _PPC_INS_MFSRR0 = 738;;
+let _PPC_INS_MFSRR1 = 739;;
+let _PPC_INS_MFSRR2 = 740;;
+let _PPC_INS_MFSRR3 = 741;;
+let _PPC_INS_MFTB = 742;;
+let _PPC_INS_MFTBHI = 743;;
+let _PPC_INS_MFTBL = 744;;
+let _PPC_INS_MFTBLO = 745;;
+let _PPC_INS_MFTBU = 746;;
+let _PPC_INS_MFTCR = 747;;
+let _PPC_INS_MFVRD = 748;;
+let _PPC_INS_MFVRSAVE = 749;;
+let _PPC_INS_MFVSCR = 750;;
+let _PPC_INS_MFVSRD = 751;;
+let _PPC_INS_MFVSRLD = 752;;
+let _PPC_INS_MFVSRWZ = 753;;
+let _PPC_INS_MFXER = 754;;
+let _PPC_INS_MODSD = 755;;
+let _PPC_INS_MODSW = 756;;
+let _PPC_INS_MODUD = 757;;
+let _PPC_INS_MODUW = 758;;
+let _PPC_INS_MR = 759;;
+let _PPC_INS_MSGSYNC = 760;;
+let _PPC_INS_MSYNC = 761;;
+let _PPC_INS_MTAMR = 762;;
+let _PPC_INS_MTASR = 763;;
+let _PPC_INS_MTBR0 = 764;;
+let _PPC_INS_MTBR1 = 765;;
+let _PPC_INS_MTBR2 = 766;;
+let _PPC_INS_MTBR3 = 767;;
+let _PPC_INS_MTBR4 = 768;;
+let _PPC_INS_MTBR5 = 769;;
+let _PPC_INS_MTBR6 = 770;;
+let _PPC_INS_MTBR7 = 771;;
+let _PPC_INS_MTCFAR = 772;;
+let _PPC_INS_MTCR = 773;;
+let _PPC_INS_MTCRF = 774;;
+let _PPC_INS_MTCTR = 775;;
+let _PPC_INS_MTDAR = 776;;
+let _PPC_INS_MTDBATL = 777;;
+let _PPC_INS_MTDBATU = 778;;
+let _PPC_INS_MTDCCR = 779;;
+let _PPC_INS_MTDCR = 780;;
+let _PPC_INS_MTDEAR = 781;;
+let _PPC_INS_MTDEC = 782;;
+let _PPC_INS_MTDSCR = 783;;
+let _PPC_INS_MTDSISR = 784;;
+let _PPC_INS_MTESR = 785;;
+let _PPC_INS_MTFSB0 = 786;;
+let _PPC_INS_MTFSB1 = 787;;
+let _PPC_INS_MTFSF = 788;;
+let _PPC_INS_MTFSFI = 789;;
+let _PPC_INS_MTIBATL = 790;;
+let _PPC_INS_MTIBATU = 791;;
+let _PPC_INS_MTICCR = 792;;
+let _PPC_INS_MTLR = 793;;
+let _PPC_INS_MTMSR = 794;;
+let _PPC_INS_MTMSRD = 795;;
+let _PPC_INS_MTOCRF = 796;;
+let _PPC_INS_MTPID = 797;;
+let _PPC_INS_MTPMR = 798;;
+let _PPC_INS_MTSDR1 = 799;;
+let _PPC_INS_MTSPEFSCR = 800;;
+let _PPC_INS_MTSPR = 801;;
+let _PPC_INS_MTSPRG = 802;;
+let _PPC_INS_MTSPRG0 = 803;;
+let _PPC_INS_MTSPRG1 = 804;;
+let _PPC_INS_MTSPRG2 = 805;;
+let _PPC_INS_MTSPRG3 = 806;;
+let _PPC_INS_MTSPRG4 = 807;;
+let _PPC_INS_MTSPRG5 = 808;;
+let _PPC_INS_MTSPRG6 = 809;;
+let _PPC_INS_MTSPRG7 = 810;;
+let _PPC_INS_MTSR = 811;;
+let _PPC_INS_MTSRIN = 812;;
+let _PPC_INS_MTSRR0 = 813;;
+let _PPC_INS_MTSRR1 = 814;;
+let _PPC_INS_MTSRR2 = 815;;
+let _PPC_INS_MTSRR3 = 816;;
+let _PPC_INS_MTTBHI = 817;;
+let _PPC_INS_MTTBL = 818;;
+let _PPC_INS_MTTBLO = 819;;
+let _PPC_INS_MTTBU = 820;;
+let _PPC_INS_MTTCR = 821;;
+let _PPC_INS_MTVRSAVE = 822;;
+let _PPC_INS_MTVSCR = 823;;
+let _PPC_INS_MTVSRD = 824;;
+let _PPC_INS_MTVSRDD = 825;;
+let _PPC_INS_MTVSRWA = 826;;
+let _PPC_INS_MTVSRWS = 827;;
+let _PPC_INS_MTVSRWZ = 828;;
+let _PPC_INS_MTXER = 829;;
+let _PPC_INS_MULHD = 830;;
+let _PPC_INS_MULHDU = 831;;
+let _PPC_INS_MULHW = 832;;
+let _PPC_INS_MULHWU = 833;;
+let _PPC_INS_MULLD = 834;;
+let _PPC_INS_MULLI = 835;;
+let _PPC_INS_MULLW = 836;;
+let _PPC_INS_NAND = 837;;
+let _PPC_INS_NAP = 838;;
+let _PPC_INS_NEG = 839;;
+let _PPC_INS_NOP = 840;;
+let _PPC_INS_NOR = 841;;
+let _PPC_INS_NOT = 842;;
+let _PPC_INS_OR = 843;;
+let _PPC_INS_ORC = 844;;
+let _PPC_INS_ORI = 845;;
+let _PPC_INS_ORIS = 846;;
+let _PPC_INS_PASTE = 847;;
+let _PPC_INS_PASTE_LAST = 848;;
+let _PPC_INS_POPCNTB = 849;;
+let _PPC_INS_POPCNTD = 850;;
+let _PPC_INS_POPCNTW = 851;;
+let _PPC_INS_PTESYNC = 852;;
+let _PPC_INS_QVALIGNI = 853;;
+let _PPC_INS_QVESPLATI = 854;;
+let _PPC_INS_QVFABS = 855;;
+let _PPC_INS_QVFADD = 856;;
+let _PPC_INS_QVFADDS = 857;;
+let _PPC_INS_QVFAND = 858;;
+let _PPC_INS_QVFANDC = 859;;
+let _PPC_INS_QVFCFID = 860;;
+let _PPC_INS_QVFCFIDS = 861;;
+let _PPC_INS_QVFCFIDU = 862;;
+let _PPC_INS_QVFCFIDUS = 863;;
+let _PPC_INS_QVFCLR = 864;;
+let _PPC_INS_QVFCMPEQ = 865;;
+let _PPC_INS_QVFCMPGT = 866;;
+let _PPC_INS_QVFCMPLT = 867;;
+let _PPC_INS_QVFCPSGN = 868;;
+let _PPC_INS_QVFCTFB = 869;;
+let _PPC_INS_QVFCTID = 870;;
+let _PPC_INS_QVFCTIDU = 871;;
+let _PPC_INS_QVFCTIDUZ = 872;;
+let _PPC_INS_QVFCTIDZ = 873;;
+let _PPC_INS_QVFCTIW = 874;;
+let _PPC_INS_QVFCTIWU = 875;;
+let _PPC_INS_QVFCTIWUZ = 876;;
+let _PPC_INS_QVFCTIWZ = 877;;
+let _PPC_INS_QVFEQU = 878;;
+let _PPC_INS_QVFLOGICAL = 879;;
+let _PPC_INS_QVFMADD = 880;;
+let _PPC_INS_QVFMADDS = 881;;
+let _PPC_INS_QVFMR = 882;;
+let _PPC_INS_QVFMSUB = 883;;
+let _PPC_INS_QVFMSUBS = 884;;
+let _PPC_INS_QVFMUL = 885;;
+let _PPC_INS_QVFMULS = 886;;
+let _PPC_INS_QVFNABS = 887;;
+let _PPC_INS_QVFNAND = 888;;
+let _PPC_INS_QVFNEG = 889;;
+let _PPC_INS_QVFNMADD = 890;;
+let _PPC_INS_QVFNMADDS = 891;;
+let _PPC_INS_QVFNMSUB = 892;;
+let _PPC_INS_QVFNMSUBS = 893;;
+let _PPC_INS_QVFNOR = 894;;
+let _PPC_INS_QVFNOT = 895;;
+let _PPC_INS_QVFOR = 896;;
+let _PPC_INS_QVFORC = 897;;
+let _PPC_INS_QVFPERM = 898;;
+let _PPC_INS_QVFRE = 899;;
+let _PPC_INS_QVFRES = 900;;
+let _PPC_INS_QVFRIM = 901;;
+let _PPC_INS_QVFRIN = 902;;
+let _PPC_INS_QVFRIP = 903;;
+let _PPC_INS_QVFRIZ = 904;;
+let _PPC_INS_QVFRSP = 905;;
+let _PPC_INS_QVFRSQRTE = 906;;
+let _PPC_INS_QVFRSQRTES = 907;;
+let _PPC_INS_QVFSEL = 908;;
+let _PPC_INS_QVFSET = 909;;
+let _PPC_INS_QVFSUB = 910;;
+let _PPC_INS_QVFSUBS = 911;;
+let _PPC_INS_QVFTSTNAN = 912;;
+let _PPC_INS_QVFXMADD = 913;;
+let _PPC_INS_QVFXMADDS = 914;;
+let _PPC_INS_QVFXMUL = 915;;
+let _PPC_INS_QVFXMULS = 916;;
+let _PPC_INS_QVFXOR = 917;;
+let _PPC_INS_QVFXXCPNMADD = 918;;
+let _PPC_INS_QVFXXCPNMADDS = 919;;
+let _PPC_INS_QVFXXMADD = 920;;
+let _PPC_INS_QVFXXMADDS = 921;;
+let _PPC_INS_QVFXXNPMADD = 922;;
+let _PPC_INS_QVFXXNPMADDS = 923;;
+let _PPC_INS_QVGPCI = 924;;
+let _PPC_INS_QVLFCDUX = 925;;
+let _PPC_INS_QVLFCDUXA = 926;;
+let _PPC_INS_QVLFCDX = 927;;
+let _PPC_INS_QVLFCDXA = 928;;
+let _PPC_INS_QVLFCSUX = 929;;
+let _PPC_INS_QVLFCSUXA = 930;;
+let _PPC_INS_QVLFCSX = 931;;
+let _PPC_INS_QVLFCSXA = 932;;
+let _PPC_INS_QVLFDUX = 933;;
+let _PPC_INS_QVLFDUXA = 934;;
+let _PPC_INS_QVLFDX = 935;;
+let _PPC_INS_QVLFDXA = 936;;
+let _PPC_INS_QVLFIWAX = 937;;
+let _PPC_INS_QVLFIWAXA = 938;;
+let _PPC_INS_QVLFIWZX = 939;;
+let _PPC_INS_QVLFIWZXA = 940;;
+let _PPC_INS_QVLFSUX = 941;;
+let _PPC_INS_QVLFSUXA = 942;;
+let _PPC_INS_QVLFSX = 943;;
+let _PPC_INS_QVLFSXA = 944;;
+let _PPC_INS_QVLPCLDX = 945;;
+let _PPC_INS_QVLPCLSX = 946;;
+let _PPC_INS_QVLPCRDX = 947;;
+let _PPC_INS_QVLPCRSX = 948;;
+let _PPC_INS_QVSTFCDUX = 949;;
+let _PPC_INS_QVSTFCDUXA = 950;;
+let _PPC_INS_QVSTFCDUXI = 951;;
+let _PPC_INS_QVSTFCDUXIA = 952;;
+let _PPC_INS_QVSTFCDX = 953;;
+let _PPC_INS_QVSTFCDXA = 954;;
+let _PPC_INS_QVSTFCDXI = 955;;
+let _PPC_INS_QVSTFCDXIA = 956;;
+let _PPC_INS_QVSTFCSUX = 957;;
+let _PPC_INS_QVSTFCSUXA = 958;;
+let _PPC_INS_QVSTFCSUXI = 959;;
+let _PPC_INS_QVSTFCSUXIA = 960;;
+let _PPC_INS_QVSTFCSX = 961;;
+let _PPC_INS_QVSTFCSXA = 962;;
+let _PPC_INS_QVSTFCSXI = 963;;
+let _PPC_INS_QVSTFCSXIA = 964;;
+let _PPC_INS_QVSTFDUX = 965;;
+let _PPC_INS_QVSTFDUXA = 966;;
+let _PPC_INS_QVSTFDUXI = 967;;
+let _PPC_INS_QVSTFDUXIA = 968;;
+let _PPC_INS_QVSTFDX = 969;;
+let _PPC_INS_QVSTFDXA = 970;;
+let _PPC_INS_QVSTFDXI = 971;;
+let _PPC_INS_QVSTFDXIA = 972;;
+let _PPC_INS_QVSTFIWX = 973;;
+let _PPC_INS_QVSTFIWXA = 974;;
+let _PPC_INS_QVSTFSUX = 975;;
+let _PPC_INS_QVSTFSUXA = 976;;
+let _PPC_INS_QVSTFSUXI = 977;;
+let _PPC_INS_QVSTFSUXIA = 978;;
+let _PPC_INS_QVSTFSX = 979;;
+let _PPC_INS_QVSTFSXA = 980;;
+let _PPC_INS_QVSTFSXI = 981;;
+let _PPC_INS_QVSTFSXIA = 982;;
+let _PPC_INS_RFCI = 983;;
+let _PPC_INS_RFDI = 984;;
+let _PPC_INS_RFEBB = 985;;
+let _PPC_INS_RFI = 986;;
+let _PPC_INS_RFID = 987;;
+let _PPC_INS_RFMCI = 988;;
+let _PPC_INS_RLDCL = 989;;
+let _PPC_INS_RLDCR = 990;;
+let _PPC_INS_RLDIC = 991;;
+let _PPC_INS_RLDICL = 992;;
+let _PPC_INS_RLDICR = 993;;
+let _PPC_INS_RLDIMI = 994;;
+let _PPC_INS_RLWIMI = 995;;
+let _PPC_INS_RLWINM = 996;;
+let _PPC_INS_RLWNM = 997;;
+let _PPC_INS_ROTLD = 998;;
+let _PPC_INS_ROTLDI = 999;;
+let _PPC_INS_ROTLW = 1000;;
+let _PPC_INS_ROTLWI = 1001;;
+let _PPC_INS_ROTRDI = 1002;;
+let _PPC_INS_ROTRWI = 1003;;
+let _PPC_INS_SC = 1004;;
+let _PPC_INS_SETB = 1005;;
+let _PPC_INS_SLBIA = 1006;;
+let _PPC_INS_SLBIE = 1007;;
+let _PPC_INS_SLBIEG = 1008;;
+let _PPC_INS_SLBMFEE = 1009;;
+let _PPC_INS_SLBMFEV = 1010;;
+let _PPC_INS_SLBMTE = 1011;;
+let _PPC_INS_SLBSYNC = 1012;;
+let _PPC_INS_SLD = 1013;;
+let _PPC_INS_SLDI = 1014;;
+let _PPC_INS_SLW = 1015;;
+let _PPC_INS_SLWI = 1016;;
+let _PPC_INS_SRAD = 1017;;
+let _PPC_INS_SRADI = 1018;;
+let _PPC_INS_SRAW = 1019;;
+let _PPC_INS_SRAWI = 1020;;
+let _PPC_INS_SRD = 1021;;
+let _PPC_INS_SRDI = 1022;;
+let _PPC_INS_SRW = 1023;;
+let _PPC_INS_SRWI = 1024;;
+let _PPC_INS_STB = 1025;;
+let _PPC_INS_STBCIX = 1026;;
+let _PPC_INS_STBCX = 1027;;
+let _PPC_INS_STBEPX = 1028;;
+let _PPC_INS_STBU = 1029;;
+let _PPC_INS_STBUX = 1030;;
+let _PPC_INS_STBX = 1031;;
+let _PPC_INS_STD = 1032;;
+let _PPC_INS_STDAT = 1033;;
+let _PPC_INS_STDBRX = 1034;;
+let _PPC_INS_STDCIX = 1035;;
+let _PPC_INS_STDCX = 1036;;
+let _PPC_INS_STDU = 1037;;
+let _PPC_INS_STDUX = 1038;;
+let _PPC_INS_STDX = 1039;;
+let _PPC_INS_STFD = 1040;;
+let _PPC_INS_STFDEPX = 1041;;
+let _PPC_INS_STFDU = 1042;;
+let _PPC_INS_STFDUX = 1043;;
+let _PPC_INS_STFDX = 1044;;
+let _PPC_INS_STFIWX = 1045;;
+let _PPC_INS_STFS = 1046;;
+let _PPC_INS_STFSU = 1047;;
+let _PPC_INS_STFSUX = 1048;;
+let _PPC_INS_STFSX = 1049;;
+let _PPC_INS_STH = 1050;;
+let _PPC_INS_STHBRX = 1051;;
+let _PPC_INS_STHCIX = 1052;;
+let _PPC_INS_STHCX = 1053;;
+let _PPC_INS_STHEPX = 1054;;
+let _PPC_INS_STHU = 1055;;
+let _PPC_INS_STHUX = 1056;;
+let _PPC_INS_STHX = 1057;;
+let _PPC_INS_STMW = 1058;;
+let _PPC_INS_STOP = 1059;;
+let _PPC_INS_STSWI = 1060;;
+let _PPC_INS_STVEBX = 1061;;
+let _PPC_INS_STVEHX = 1062;;
+let _PPC_INS_STVEWX = 1063;;
+let _PPC_INS_STVX = 1064;;
+let _PPC_INS_STVXL = 1065;;
+let _PPC_INS_STW = 1066;;
+let _PPC_INS_STWAT = 1067;;
+let _PPC_INS_STWBRX = 1068;;
+let _PPC_INS_STWCIX = 1069;;
+let _PPC_INS_STWCX = 1070;;
+let _PPC_INS_STWEPX = 1071;;
+let _PPC_INS_STWU = 1072;;
+let _PPC_INS_STWUX = 1073;;
+let _PPC_INS_STWX = 1074;;
+let _PPC_INS_STXSD = 1075;;
+let _PPC_INS_STXSDX = 1076;;
+let _PPC_INS_STXSIBX = 1077;;
+let _PPC_INS_STXSIHX = 1078;;
+let _PPC_INS_STXSIWX = 1079;;
+let _PPC_INS_STXSSP = 1080;;
+let _PPC_INS_STXSSPX = 1081;;
+let _PPC_INS_STXV = 1082;;
+let _PPC_INS_STXVB16X = 1083;;
+let _PPC_INS_STXVD2X = 1084;;
+let _PPC_INS_STXVH8X = 1085;;
+let _PPC_INS_STXVL = 1086;;
+let _PPC_INS_STXVLL = 1087;;
+let _PPC_INS_STXVW4X = 1088;;
+let _PPC_INS_STXVX = 1089;;
+let _PPC_INS_SUB = 1090;;
+let _PPC_INS_SUBC = 1091;;
+let _PPC_INS_SUBF = 1092;;
+let _PPC_INS_SUBFC = 1093;;
+let _PPC_INS_SUBFE = 1094;;
+let _PPC_INS_SUBFIC = 1095;;
+let _PPC_INS_SUBFME = 1096;;
+let _PPC_INS_SUBFZE = 1097;;
+let _PPC_INS_SUBI = 1098;;
+let _PPC_INS_SUBIC = 1099;;
+let _PPC_INS_SUBIS = 1100;;
+let _PPC_INS_SUBPCIS = 1101;;
+let _PPC_INS_SYNC = 1102;;
+let _PPC_INS_TABORT = 1103;;
+let _PPC_INS_TABORTDC = 1104;;
+let _PPC_INS_TABORTDCI = 1105;;
+let _PPC_INS_TABORTWC = 1106;;
+let _PPC_INS_TABORTWCI = 1107;;
+let _PPC_INS_TBEGIN = 1108;;
+let _PPC_INS_TCHECK = 1109;;
+let _PPC_INS_TD = 1110;;
+let _PPC_INS_TDEQ = 1111;;
+let _PPC_INS_TDEQI = 1112;;
+let _PPC_INS_TDGE = 1113;;
+let _PPC_INS_TDGEI = 1114;;
+let _PPC_INS_TDGT = 1115;;
+let _PPC_INS_TDGTI = 1116;;
+let _PPC_INS_TDI = 1117;;
+let _PPC_INS_TDLE = 1118;;
+let _PPC_INS_TDLEI = 1119;;
+let _PPC_INS_TDLGE = 1120;;
+let _PPC_INS_TDLGEI = 1121;;
+let _PPC_INS_TDLGT = 1122;;
+let _PPC_INS_TDLGTI = 1123;;
+let _PPC_INS_TDLLE = 1124;;
+let _PPC_INS_TDLLEI = 1125;;
+let _PPC_INS_TDLLT = 1126;;
+let _PPC_INS_TDLLTI = 1127;;
+let _PPC_INS_TDLNG = 1128;;
+let _PPC_INS_TDLNGI = 1129;;
+let _PPC_INS_TDLNL = 1130;;
+let _PPC_INS_TDLNLI = 1131;;
+let _PPC_INS_TDLT = 1132;;
+let _PPC_INS_TDLTI = 1133;;
+let _PPC_INS_TDNE = 1134;;
+let _PPC_INS_TDNEI = 1135;;
+let _PPC_INS_TDNG = 1136;;
+let _PPC_INS_TDNGI = 1137;;
+let _PPC_INS_TDNL = 1138;;
+let _PPC_INS_TDNLI = 1139;;
+let _PPC_INS_TDU = 1140;;
+let _PPC_INS_TDUI = 1141;;
+let _PPC_INS_TEND = 1142;;
+let _PPC_INS_TLBIA = 1143;;
+let _PPC_INS_TLBIE = 1144;;
+let _PPC_INS_TLBIEL = 1145;;
+let _PPC_INS_TLBIVAX = 1146;;
+let _PPC_INS_TLBLD = 1147;;
+let _PPC_INS_TLBLI = 1148;;
+let _PPC_INS_TLBRE = 1149;;
+let _PPC_INS_TLBREHI = 1150;;
+let _PPC_INS_TLBRELO = 1151;;
+let _PPC_INS_TLBSX = 1152;;
+let _PPC_INS_TLBSYNC = 1153;;
+let _PPC_INS_TLBWE = 1154;;
+let _PPC_INS_TLBWEHI = 1155;;
+let _PPC_INS_TLBWELO = 1156;;
+let _PPC_INS_TRAP = 1157;;
+let _PPC_INS_TRECHKPT = 1158;;
+let _PPC_INS_TRECLAIM = 1159;;
+let _PPC_INS_TSR = 1160;;
+let _PPC_INS_TW = 1161;;
+let _PPC_INS_TWEQ = 1162;;
+let _PPC_INS_TWEQI = 1163;;
+let _PPC_INS_TWGE = 1164;;
+let _PPC_INS_TWGEI = 1165;;
+let _PPC_INS_TWGT = 1166;;
+let _PPC_INS_TWGTI = 1167;;
+let _PPC_INS_TWI = 1168;;
+let _PPC_INS_TWLE = 1169;;
+let _PPC_INS_TWLEI = 1170;;
+let _PPC_INS_TWLGE = 1171;;
+let _PPC_INS_TWLGEI = 1172;;
+let _PPC_INS_TWLGT = 1173;;
+let _PPC_INS_TWLGTI = 1174;;
+let _PPC_INS_TWLLE = 1175;;
+let _PPC_INS_TWLLEI = 1176;;
+let _PPC_INS_TWLLT = 1177;;
+let _PPC_INS_TWLLTI = 1178;;
+let _PPC_INS_TWLNG = 1179;;
+let _PPC_INS_TWLNGI = 1180;;
+let _PPC_INS_TWLNL = 1181;;
+let _PPC_INS_TWLNLI = 1182;;
+let _PPC_INS_TWLT = 1183;;
+let _PPC_INS_TWLTI = 1184;;
+let _PPC_INS_TWNE = 1185;;
+let _PPC_INS_TWNEI = 1186;;
+let _PPC_INS_TWNG = 1187;;
+let _PPC_INS_TWNGI = 1188;;
+let _PPC_INS_TWNL = 1189;;
+let _PPC_INS_TWNLI = 1190;;
+let _PPC_INS_TWU = 1191;;
+let _PPC_INS_TWUI = 1192;;
+let _PPC_INS_VABSDUB = 1193;;
+let _PPC_INS_VABSDUH = 1194;;
+let _PPC_INS_VABSDUW = 1195;;
+let _PPC_INS_VADDCUQ = 1196;;
+let _PPC_INS_VADDCUW = 1197;;
+let _PPC_INS_VADDECUQ = 1198;;
+let _PPC_INS_VADDEUQM = 1199;;
+let _PPC_INS_VADDFP = 1200;;
+let _PPC_INS_VADDSBS = 1201;;
+let _PPC_INS_VADDSHS = 1202;;
+let _PPC_INS_VADDSWS = 1203;;
+let _PPC_INS_VADDUBM = 1204;;
+let _PPC_INS_VADDUBS = 1205;;
+let _PPC_INS_VADDUDM = 1206;;
+let _PPC_INS_VADDUHM = 1207;;
+let _PPC_INS_VADDUHS = 1208;;
+let _PPC_INS_VADDUQM = 1209;;
+let _PPC_INS_VADDUWM = 1210;;
+let _PPC_INS_VADDUWS = 1211;;
+let _PPC_INS_VAND = 1212;;
+let _PPC_INS_VANDC = 1213;;
+let _PPC_INS_VAVGSB = 1214;;
+let _PPC_INS_VAVGSH = 1215;;
+let _PPC_INS_VAVGSW = 1216;;
+let _PPC_INS_VAVGUB = 1217;;
+let _PPC_INS_VAVGUH = 1218;;
+let _PPC_INS_VAVGUW = 1219;;
+let _PPC_INS_VBPERMD = 1220;;
+let _PPC_INS_VBPERMQ = 1221;;
+let _PPC_INS_VCFSX = 1222;;
+let _PPC_INS_VCFUX = 1223;;
+let _PPC_INS_VCIPHER = 1224;;
+let _PPC_INS_VCIPHERLAST = 1225;;
+let _PPC_INS_VCLZB = 1226;;
+let _PPC_INS_VCLZD = 1227;;
+let _PPC_INS_VCLZH = 1228;;
+let _PPC_INS_VCLZLSBB = 1229;;
+let _PPC_INS_VCLZW = 1230;;
+let _PPC_INS_VCMPBFP = 1231;;
+let _PPC_INS_VCMPEQFP = 1232;;
+let _PPC_INS_VCMPEQUB = 1233;;
+let _PPC_INS_VCMPEQUD = 1234;;
+let _PPC_INS_VCMPEQUH = 1235;;
+let _PPC_INS_VCMPEQUW = 1236;;
+let _PPC_INS_VCMPGEFP = 1237;;
+let _PPC_INS_VCMPGTFP = 1238;;
+let _PPC_INS_VCMPGTSB = 1239;;
+let _PPC_INS_VCMPGTSD = 1240;;
+let _PPC_INS_VCMPGTSH = 1241;;
+let _PPC_INS_VCMPGTSW = 1242;;
+let _PPC_INS_VCMPGTUB = 1243;;
+let _PPC_INS_VCMPGTUD = 1244;;
+let _PPC_INS_VCMPGTUH = 1245;;
+let _PPC_INS_VCMPGTUW = 1246;;
+let _PPC_INS_VCMPNEB = 1247;;
+let _PPC_INS_VCMPNEH = 1248;;
+let _PPC_INS_VCMPNEW = 1249;;
+let _PPC_INS_VCMPNEZB = 1250;;
+let _PPC_INS_VCMPNEZH = 1251;;
+let _PPC_INS_VCMPNEZW = 1252;;
+let _PPC_INS_VCTSXS = 1253;;
+let _PPC_INS_VCTUXS = 1254;;
+let _PPC_INS_VCTZB = 1255;;
+let _PPC_INS_VCTZD = 1256;;
+let _PPC_INS_VCTZH = 1257;;
+let _PPC_INS_VCTZLSBB = 1258;;
+let _PPC_INS_VCTZW = 1259;;
+let _PPC_INS_VEQV = 1260;;
+let _PPC_INS_VEXPTEFP = 1261;;
+let _PPC_INS_VEXTRACTD = 1262;;
+let _PPC_INS_VEXTRACTUB = 1263;;
+let _PPC_INS_VEXTRACTUH = 1264;;
+let _PPC_INS_VEXTRACTUW = 1265;;
+let _PPC_INS_VEXTSB2D = 1266;;
+let _PPC_INS_VEXTSB2W = 1267;;
+let _PPC_INS_VEXTSH2D = 1268;;
+let _PPC_INS_VEXTSH2W = 1269;;
+let _PPC_INS_VEXTSW2D = 1270;;
+let _PPC_INS_VEXTUBLX = 1271;;
+let _PPC_INS_VEXTUBRX = 1272;;
+let _PPC_INS_VEXTUHLX = 1273;;
+let _PPC_INS_VEXTUHRX = 1274;;
+let _PPC_INS_VEXTUWLX = 1275;;
+let _PPC_INS_VEXTUWRX = 1276;;
+let _PPC_INS_VGBBD = 1277;;
+let _PPC_INS_VINSERTB = 1278;;
+let _PPC_INS_VINSERTD = 1279;;
+let _PPC_INS_VINSERTH = 1280;;
+let _PPC_INS_VINSERTW = 1281;;
+let _PPC_INS_VLOGEFP = 1282;;
+let _PPC_INS_VMADDFP = 1283;;
+let _PPC_INS_VMAXFP = 1284;;
+let _PPC_INS_VMAXSB = 1285;;
+let _PPC_INS_VMAXSD = 1286;;
+let _PPC_INS_VMAXSH = 1287;;
+let _PPC_INS_VMAXSW = 1288;;
+let _PPC_INS_VMAXUB = 1289;;
+let _PPC_INS_VMAXUD = 1290;;
+let _PPC_INS_VMAXUH = 1291;;
+let _PPC_INS_VMAXUW = 1292;;
+let _PPC_INS_VMHADDSHS = 1293;;
+let _PPC_INS_VMHRADDSHS = 1294;;
+let _PPC_INS_VMINFP = 1295;;
+let _PPC_INS_VMINSB = 1296;;
+let _PPC_INS_VMINSD = 1297;;
+let _PPC_INS_VMINSH = 1298;;
+let _PPC_INS_VMINSW = 1299;;
+let _PPC_INS_VMINUB = 1300;;
+let _PPC_INS_VMINUD = 1301;;
+let _PPC_INS_VMINUH = 1302;;
+let _PPC_INS_VMINUW = 1303;;
+let _PPC_INS_VMLADDUHM = 1304;;
+let _PPC_INS_VMR = 1305;;
+let _PPC_INS_VMRGEW = 1306;;
+let _PPC_INS_VMRGHB = 1307;;
+let _PPC_INS_VMRGHH = 1308;;
+let _PPC_INS_VMRGHW = 1309;;
+let _PPC_INS_VMRGLB = 1310;;
+let _PPC_INS_VMRGLH = 1311;;
+let _PPC_INS_VMRGLW = 1312;;
+let _PPC_INS_VMRGOW = 1313;;
+let _PPC_INS_VMSUMMBM = 1314;;
+let _PPC_INS_VMSUMSHM = 1315;;
+let _PPC_INS_VMSUMSHS = 1316;;
+let _PPC_INS_VMSUMUBM = 1317;;
+let _PPC_INS_VMSUMUHM = 1318;;
+let _PPC_INS_VMSUMUHS = 1319;;
+let _PPC_INS_VMUL10CUQ = 1320;;
+let _PPC_INS_VMUL10ECUQ = 1321;;
+let _PPC_INS_VMUL10EUQ = 1322;;
+let _PPC_INS_VMUL10UQ = 1323;;
+let _PPC_INS_VMULESB = 1324;;
+let _PPC_INS_VMULESH = 1325;;
+let _PPC_INS_VMULESW = 1326;;
+let _PPC_INS_VMULEUB = 1327;;
+let _PPC_INS_VMULEUH = 1328;;
+let _PPC_INS_VMULEUW = 1329;;
+let _PPC_INS_VMULOSB = 1330;;
+let _PPC_INS_VMULOSH = 1331;;
+let _PPC_INS_VMULOSW = 1332;;
+let _PPC_INS_VMULOUB = 1333;;
+let _PPC_INS_VMULOUH = 1334;;
+let _PPC_INS_VMULOUW = 1335;;
+let _PPC_INS_VMULUWM = 1336;;
+let _PPC_INS_VNAND = 1337;;
+let _PPC_INS_VNCIPHER = 1338;;
+let _PPC_INS_VNCIPHERLAST = 1339;;
+let _PPC_INS_VNEGD = 1340;;
+let _PPC_INS_VNEGW = 1341;;
+let _PPC_INS_VNMSUBFP = 1342;;
+let _PPC_INS_VNOR = 1343;;
+let _PPC_INS_VNOT = 1344;;
+let _PPC_INS_VOR = 1345;;
+let _PPC_INS_VORC = 1346;;
+let _PPC_INS_VPERM = 1347;;
+let _PPC_INS_VPERMR = 1348;;
+let _PPC_INS_VPERMXOR = 1349;;
+let _PPC_INS_VPKPX = 1350;;
+let _PPC_INS_VPKSDSS = 1351;;
+let _PPC_INS_VPKSDUS = 1352;;
+let _PPC_INS_VPKSHSS = 1353;;
+let _PPC_INS_VPKSHUS = 1354;;
+let _PPC_INS_VPKSWSS = 1355;;
+let _PPC_INS_VPKSWUS = 1356;;
+let _PPC_INS_VPKUDUM = 1357;;
+let _PPC_INS_VPKUDUS = 1358;;
+let _PPC_INS_VPKUHUM = 1359;;
+let _PPC_INS_VPKUHUS = 1360;;
+let _PPC_INS_VPKUWUM = 1361;;
+let _PPC_INS_VPKUWUS = 1362;;
+let _PPC_INS_VPMSUMB = 1363;;
+let _PPC_INS_VPMSUMD = 1364;;
+let _PPC_INS_VPMSUMH = 1365;;
+let _PPC_INS_VPMSUMW = 1366;;
+let _PPC_INS_VPOPCNTB = 1367;;
+let _PPC_INS_VPOPCNTD = 1368;;
+let _PPC_INS_VPOPCNTH = 1369;;
+let _PPC_INS_VPOPCNTW = 1370;;
+let _PPC_INS_VPRTYBD = 1371;;
+let _PPC_INS_VPRTYBQ = 1372;;
+let _PPC_INS_VPRTYBW = 1373;;
+let _PPC_INS_VREFP = 1374;;
+let _PPC_INS_VRFIM = 1375;;
+let _PPC_INS_VRFIN = 1376;;
+let _PPC_INS_VRFIP = 1377;;
+let _PPC_INS_VRFIZ = 1378;;
+let _PPC_INS_VRLB = 1379;;
+let _PPC_INS_VRLD = 1380;;
+let _PPC_INS_VRLDMI = 1381;;
+let _PPC_INS_VRLDNM = 1382;;
+let _PPC_INS_VRLH = 1383;;
+let _PPC_INS_VRLW = 1384;;
+let _PPC_INS_VRLWMI = 1385;;
+let _PPC_INS_VRLWNM = 1386;;
+let _PPC_INS_VRSQRTEFP = 1387;;
+let _PPC_INS_VSBOX = 1388;;
+let _PPC_INS_VSEL = 1389;;
+let _PPC_INS_VSHASIGMAD = 1390;;
+let _PPC_INS_VSHASIGMAW = 1391;;
+let _PPC_INS_VSL = 1392;;
+let _PPC_INS_VSLB = 1393;;
+let _PPC_INS_VSLD = 1394;;
+let _PPC_INS_VSLDOI = 1395;;
+let _PPC_INS_VSLH = 1396;;
+let _PPC_INS_VSLO = 1397;;
+let _PPC_INS_VSLV = 1398;;
+let _PPC_INS_VSLW = 1399;;
+let _PPC_INS_VSPLTB = 1400;;
+let _PPC_INS_VSPLTH = 1401;;
+let _PPC_INS_VSPLTISB = 1402;;
+let _PPC_INS_VSPLTISH = 1403;;
+let _PPC_INS_VSPLTISW = 1404;;
+let _PPC_INS_VSPLTW = 1405;;
+let _PPC_INS_VSR = 1406;;
+let _PPC_INS_VSRAB = 1407;;
+let _PPC_INS_VSRAD = 1408;;
+let _PPC_INS_VSRAH = 1409;;
+let _PPC_INS_VSRAW = 1410;;
+let _PPC_INS_VSRB = 1411;;
+let _PPC_INS_VSRD = 1412;;
+let _PPC_INS_VSRH = 1413;;
+let _PPC_INS_VSRO = 1414;;
+let _PPC_INS_VSRV = 1415;;
+let _PPC_INS_VSRW = 1416;;
+let _PPC_INS_VSUBCUQ = 1417;;
+let _PPC_INS_VSUBCUW = 1418;;
+let _PPC_INS_VSUBECUQ = 1419;;
+let _PPC_INS_VSUBEUQM = 1420;;
+let _PPC_INS_VSUBFP = 1421;;
+let _PPC_INS_VSUBSBS = 1422;;
+let _PPC_INS_VSUBSHS = 1423;;
+let _PPC_INS_VSUBSWS = 1424;;
+let _PPC_INS_VSUBUBM = 1425;;
+let _PPC_INS_VSUBUBS = 1426;;
+let _PPC_INS_VSUBUDM = 1427;;
+let _PPC_INS_VSUBUHM = 1428;;
+let _PPC_INS_VSUBUHS = 1429;;
+let _PPC_INS_VSUBUQM = 1430;;
+let _PPC_INS_VSUBUWM = 1431;;
+let _PPC_INS_VSUBUWS = 1432;;
+let _PPC_INS_VSUM2SWS = 1433;;
+let _PPC_INS_VSUM4SBS = 1434;;
+let _PPC_INS_VSUM4SHS = 1435;;
+let _PPC_INS_VSUM4UBS = 1436;;
+let _PPC_INS_VSUMSWS = 1437;;
+let _PPC_INS_VUPKHPX = 1438;;
+let _PPC_INS_VUPKHSB = 1439;;
+let _PPC_INS_VUPKHSH = 1440;;
+let _PPC_INS_VUPKHSW = 1441;;
+let _PPC_INS_VUPKLPX = 1442;;
+let _PPC_INS_VUPKLSB = 1443;;
+let _PPC_INS_VUPKLSH = 1444;;
+let _PPC_INS_VUPKLSW = 1445;;
+let _PPC_INS_VXOR = 1446;;
+let _PPC_INS_WAIT = 1447;;
+let _PPC_INS_WAITIMPL = 1448;;
+let _PPC_INS_WAITRSV = 1449;;
+let _PPC_INS_WRTEE = 1450;;
+let _PPC_INS_WRTEEI = 1451;;
+let _PPC_INS_XNOP = 1452;;
+let _PPC_INS_XOR = 1453;;
+let _PPC_INS_XORI = 1454;;
+let _PPC_INS_XORIS = 1455;;
+let _PPC_INS_XSABSDP = 1456;;
+let _PPC_INS_XSABSQP = 1457;;
+let _PPC_INS_XSADDDP = 1458;;
+let _PPC_INS_XSADDQP = 1459;;
+let _PPC_INS_XSADDQPO = 1460;;
+let _PPC_INS_XSADDSP = 1461;;
+let _PPC_INS_XSCMPEQDP = 1462;;
+let _PPC_INS_XSCMPEXPDP = 1463;;
+let _PPC_INS_XSCMPEXPQP = 1464;;
+let _PPC_INS_XSCMPGEDP = 1465;;
+let _PPC_INS_XSCMPGTDP = 1466;;
+let _PPC_INS_XSCMPODP = 1467;;
+let _PPC_INS_XSCMPOQP = 1468;;
+let _PPC_INS_XSCMPUDP = 1469;;
+let _PPC_INS_XSCMPUQP = 1470;;
+let _PPC_INS_XSCPSGNDP = 1471;;
+let _PPC_INS_XSCPSGNQP = 1472;;
+let _PPC_INS_XSCVDPHP = 1473;;
+let _PPC_INS_XSCVDPQP = 1474;;
+let _PPC_INS_XSCVDPSP = 1475;;
+let _PPC_INS_XSCVDPSPN = 1476;;
+let _PPC_INS_XSCVDPSXDS = 1477;;
+let _PPC_INS_XSCVDPSXWS = 1478;;
+let _PPC_INS_XSCVDPUXDS = 1479;;
+let _PPC_INS_XSCVDPUXWS = 1480;;
+let _PPC_INS_XSCVHPDP = 1481;;
+let _PPC_INS_XSCVQPDP = 1482;;
+let _PPC_INS_XSCVQPDPO = 1483;;
+let _PPC_INS_XSCVQPSDZ = 1484;;
+let _PPC_INS_XSCVQPSWZ = 1485;;
+let _PPC_INS_XSCVQPUDZ = 1486;;
+let _PPC_INS_XSCVQPUWZ = 1487;;
+let _PPC_INS_XSCVSDQP = 1488;;
+let _PPC_INS_XSCVSPDP = 1489;;
+let _PPC_INS_XSCVSPDPN = 1490;;
+let _PPC_INS_XSCVSXDDP = 1491;;
+let _PPC_INS_XSCVSXDSP = 1492;;
+let _PPC_INS_XSCVUDQP = 1493;;
+let _PPC_INS_XSCVUXDDP = 1494;;
+let _PPC_INS_XSCVUXDSP = 1495;;
+let _PPC_INS_XSDIVDP = 1496;;
+let _PPC_INS_XSDIVQP = 1497;;
+let _PPC_INS_XSDIVQPO = 1498;;
+let _PPC_INS_XSDIVSP = 1499;;
+let _PPC_INS_XSIEXPDP = 1500;;
+let _PPC_INS_XSIEXPQP = 1501;;
+let _PPC_INS_XSMADDADP = 1502;;
+let _PPC_INS_XSMADDASP = 1503;;
+let _PPC_INS_XSMADDMDP = 1504;;
+let _PPC_INS_XSMADDMSP = 1505;;
+let _PPC_INS_XSMADDQP = 1506;;
+let _PPC_INS_XSMADDQPO = 1507;;
+let _PPC_INS_XSMAXCDP = 1508;;
+let _PPC_INS_XSMAXDP = 1509;;
+let _PPC_INS_XSMAXJDP = 1510;;
+let _PPC_INS_XSMINCDP = 1511;;
+let _PPC_INS_XSMINDP = 1512;;
+let _PPC_INS_XSMINJDP = 1513;;
+let _PPC_INS_XSMSUBADP = 1514;;
+let _PPC_INS_XSMSUBASP = 1515;;
+let _PPC_INS_XSMSUBMDP = 1516;;
+let _PPC_INS_XSMSUBMSP = 1517;;
+let _PPC_INS_XSMSUBQP = 1518;;
+let _PPC_INS_XSMSUBQPO = 1519;;
+let _PPC_INS_XSMULDP = 1520;;
+let _PPC_INS_XSMULQP = 1521;;
+let _PPC_INS_XSMULQPO = 1522;;
+let _PPC_INS_XSMULSP = 1523;;
+let _PPC_INS_XSNABSDP = 1524;;
+let _PPC_INS_XSNABSQP = 1525;;
+let _PPC_INS_XSNEGDP = 1526;;
+let _PPC_INS_XSNEGQP = 1527;;
+let _PPC_INS_XSNMADDADP = 1528;;
+let _PPC_INS_XSNMADDASP = 1529;;
+let _PPC_INS_XSNMADDMDP = 1530;;
+let _PPC_INS_XSNMADDMSP = 1531;;
+let _PPC_INS_XSNMADDQP = 1532;;
+let _PPC_INS_XSNMADDQPO = 1533;;
+let _PPC_INS_XSNMSUBADP = 1534;;
+let _PPC_INS_XSNMSUBASP = 1535;;
+let _PPC_INS_XSNMSUBMDP = 1536;;
+let _PPC_INS_XSNMSUBMSP = 1537;;
+let _PPC_INS_XSNMSUBQP = 1538;;
+let _PPC_INS_XSNMSUBQPO = 1539;;
+let _PPC_INS_XSRDPI = 1540;;
+let _PPC_INS_XSRDPIC = 1541;;
+let _PPC_INS_XSRDPIM = 1542;;
+let _PPC_INS_XSRDPIP = 1543;;
+let _PPC_INS_XSRDPIZ = 1544;;
+let _PPC_INS_XSREDP = 1545;;
+let _PPC_INS_XSRESP = 1546;;
+let _PPC_INS_XSRQPI = 1547;;
+let _PPC_INS_XSRQPIX = 1548;;
+let _PPC_INS_XSRQPXP = 1549;;
+let _PPC_INS_XSRSP = 1550;;
+let _PPC_INS_XSRSQRTEDP = 1551;;
+let _PPC_INS_XSRSQRTESP = 1552;;
+let _PPC_INS_XSSQRTDP = 1553;;
+let _PPC_INS_XSSQRTQP = 1554;;
+let _PPC_INS_XSSQRTQPO = 1555;;
+let _PPC_INS_XSSQRTSP = 1556;;
+let _PPC_INS_XSSUBDP = 1557;;
+let _PPC_INS_XSSUBQP = 1558;;
+let _PPC_INS_XSSUBQPO = 1559;;
+let _PPC_INS_XSSUBSP = 1560;;
+let _PPC_INS_XSTDIVDP = 1561;;
+let _PPC_INS_XSTSQRTDP = 1562;;
+let _PPC_INS_XSTSTDCDP = 1563;;
+let _PPC_INS_XSTSTDCQP = 1564;;
+let _PPC_INS_XSTSTDCSP = 1565;;
+let _PPC_INS_XSXEXPDP = 1566;;
+let _PPC_INS_XSXEXPQP = 1567;;
+let _PPC_INS_XSXSIGDP = 1568;;
+let _PPC_INS_XSXSIGQP = 1569;;
+let _PPC_INS_XVABSDP = 1570;;
+let _PPC_INS_XVABSSP = 1571;;
+let _PPC_INS_XVADDDP = 1572;;
+let _PPC_INS_XVADDSP = 1573;;
+let _PPC_INS_XVCMPEQDP = 1574;;
+let _PPC_INS_XVCMPEQSP = 1575;;
+let _PPC_INS_XVCMPGEDP = 1576;;
+let _PPC_INS_XVCMPGESP = 1577;;
+let _PPC_INS_XVCMPGTDP = 1578;;
+let _PPC_INS_XVCMPGTSP = 1579;;
+let _PPC_INS_XVCPSGNDP = 1580;;
+let _PPC_INS_XVCPSGNSP = 1581;;
+let _PPC_INS_XVCVDPSP = 1582;;
+let _PPC_INS_XVCVDPSXDS = 1583;;
+let _PPC_INS_XVCVDPSXWS = 1584;;
+let _PPC_INS_XVCVDPUXDS = 1585;;
+let _PPC_INS_XVCVDPUXWS = 1586;;
+let _PPC_INS_XVCVHPSP = 1587;;
+let _PPC_INS_XVCVSPDP = 1588;;
+let _PPC_INS_XVCVSPHP = 1589;;
+let _PPC_INS_XVCVSPSXDS = 1590;;
+let _PPC_INS_XVCVSPSXWS = 1591;;
+let _PPC_INS_XVCVSPUXDS = 1592;;
+let _PPC_INS_XVCVSPUXWS = 1593;;
+let _PPC_INS_XVCVSXDDP = 1594;;
+let _PPC_INS_XVCVSXDSP = 1595;;
+let _PPC_INS_XVCVSXWDP = 1596;;
+let _PPC_INS_XVCVSXWSP = 1597;;
+let _PPC_INS_XVCVUXDDP = 1598;;
+let _PPC_INS_XVCVUXDSP = 1599;;
+let _PPC_INS_XVCVUXWDP = 1600;;
+let _PPC_INS_XVCVUXWSP = 1601;;
+let _PPC_INS_XVDIVDP = 1602;;
+let _PPC_INS_XVDIVSP = 1603;;
+let _PPC_INS_XVIEXPDP = 1604;;
+let _PPC_INS_XVIEXPSP = 1605;;
+let _PPC_INS_XVMADDADP = 1606;;
+let _PPC_INS_XVMADDASP = 1607;;
+let _PPC_INS_XVMADDMDP = 1608;;
+let _PPC_INS_XVMADDMSP = 1609;;
+let _PPC_INS_XVMAXDP = 1610;;
+let _PPC_INS_XVMAXSP = 1611;;
+let _PPC_INS_XVMINDP = 1612;;
+let _PPC_INS_XVMINSP = 1613;;
+let _PPC_INS_XVMOVDP = 1614;;
+let _PPC_INS_XVMOVSP = 1615;;
+let _PPC_INS_XVMSUBADP = 1616;;
+let _PPC_INS_XVMSUBASP = 1617;;
+let _PPC_INS_XVMSUBMDP = 1618;;
+let _PPC_INS_XVMSUBMSP = 1619;;
+let _PPC_INS_XVMULDP = 1620;;
+let _PPC_INS_XVMULSP = 1621;;
+let _PPC_INS_XVNABSDP = 1622;;
+let _PPC_INS_XVNABSSP = 1623;;
+let _PPC_INS_XVNEGDP = 1624;;
+let _PPC_INS_XVNEGSP = 1625;;
+let _PPC_INS_XVNMADDADP = 1626;;
+let _PPC_INS_XVNMADDASP = 1627;;
+let _PPC_INS_XVNMADDMDP = 1628;;
+let _PPC_INS_XVNMADDMSP = 1629;;
+let _PPC_INS_XVNMSUBADP = 1630;;
+let _PPC_INS_XVNMSUBASP = 1631;;
+let _PPC_INS_XVNMSUBMDP = 1632;;
+let _PPC_INS_XVNMSUBMSP = 1633;;
+let _PPC_INS_XVRDPI = 1634;;
+let _PPC_INS_XVRDPIC = 1635;;
+let _PPC_INS_XVRDPIM = 1636;;
+let _PPC_INS_XVRDPIP = 1637;;
+let _PPC_INS_XVRDPIZ = 1638;;
+let _PPC_INS_XVREDP = 1639;;
+let _PPC_INS_XVRESP = 1640;;
+let _PPC_INS_XVRSPI = 1641;;
+let _PPC_INS_XVRSPIC = 1642;;
+let _PPC_INS_XVRSPIM = 1643;;
+let _PPC_INS_XVRSPIP = 1644;;
+let _PPC_INS_XVRSPIZ = 1645;;
+let _PPC_INS_XVRSQRTEDP = 1646;;
+let _PPC_INS_XVRSQRTESP = 1647;;
+let _PPC_INS_XVSQRTDP = 1648;;
+let _PPC_INS_XVSQRTSP = 1649;;
+let _PPC_INS_XVSUBDP = 1650;;
+let _PPC_INS_XVSUBSP = 1651;;
+let _PPC_INS_XVTDIVDP = 1652;;
+let _PPC_INS_XVTDIVSP = 1653;;
+let _PPC_INS_XVTSQRTDP = 1654;;
+let _PPC_INS_XVTSQRTSP = 1655;;
+let _PPC_INS_XVTSTDCDP = 1656;;
+let _PPC_INS_XVTSTDCSP = 1657;;
+let _PPC_INS_XVXEXPDP = 1658;;
+let _PPC_INS_XVXEXPSP = 1659;;
+let _PPC_INS_XVXSIGDP = 1660;;
+let _PPC_INS_XVXSIGSP = 1661;;
+let _PPC_INS_XXBRD = 1662;;
+let _PPC_INS_XXBRH = 1663;;
+let _PPC_INS_XXBRQ = 1664;;
+let _PPC_INS_XXBRW = 1665;;
+let _PPC_INS_XXEXTRACTUW = 1666;;
+let _PPC_INS_XXINSERTW = 1667;;
+let _PPC_INS_XXLAND = 1668;;
+let _PPC_INS_XXLANDC = 1669;;
+let _PPC_INS_XXLEQV = 1670;;
+let _PPC_INS_XXLNAND = 1671;;
+let _PPC_INS_XXLNOR = 1672;;
+let _PPC_INS_XXLOR = 1673;;
+let _PPC_INS_XXLORC = 1674;;
+let _PPC_INS_XXLXOR = 1675;;
+let _PPC_INS_XXMRGHD = 1676;;
+let _PPC_INS_XXMRGHW = 1677;;
+let _PPC_INS_XXMRGLD = 1678;;
+let _PPC_INS_XXMRGLW = 1679;;
+let _PPC_INS_XXPERM = 1680;;
+let _PPC_INS_XXPERMDI = 1681;;
+let _PPC_INS_XXPERMR = 1682;;
+let _PPC_INS_XXSEL = 1683;;
+let _PPC_INS_XXSLDWI = 1684;;
+let _PPC_INS_XXSPLTD = 1685;;
+let _PPC_INS_XXSPLTIB = 1686;;
+let _PPC_INS_XXSPLTW = 1687;;
+let _PPC_INS_XXSWAPD = 1688;;
+let _PPC_INS_ENDING = 1689;;
+
+let _PPC_GRP_INVALID = 0;;
+let _PPC_GRP_JUMP = 1;;
+let _PPC_GRP_ALTIVEC = 128;;
+let _PPC_GRP_MODE32 = 129;;
+let _PPC_GRP_MODE64 = 130;;
+let _PPC_GRP_BOOKE = 131;;
+let _PPC_GRP_NOTBOOKE = 132;;
+let _PPC_GRP_SPE = 133;;
+let _PPC_GRP_VSX = 134;;
+let _PPC_GRP_E500 = 135;;
+let _PPC_GRP_PPC4XX = 136;;
+let _PPC_GRP_PPC6XX = 137;;
+let _PPC_GRP_ICBT = 138;;
+let _PPC_GRP_P8ALTIVEC = 139;;
+let _PPC_GRP_P8VECTOR = 140;;
+let _PPC_GRP_QPX = 141;;
+let _PPC_GRP_ENDING = 142;;
diff --git a/capstone/bindings/ocaml/sparc.ml b/capstone/bindings/ocaml/sparc.ml
new file mode 100644
index 000000000..17df4b387
--- /dev/null
+++ b/capstone/bindings/ocaml/sparc.ml
@@ -0,0 +1,27 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Sparc_const
+
+type sparc_op_mem = {
+	base: int;
+	index: int;
+	disp: int;
+}
+
+type sparc_op_value = 
+	| SPARC_OP_INVALID of int
+	| SPARC_OP_REG of int
+	| SPARC_OP_IMM of int
+	| SPARC_OP_MEM of sparc_op_mem
+
+type sparc_op = {
+	value: sparc_op_value;
+}
+
+type cs_sparc = { 
+	cc: int;
+	hint: int;
+	operands: sparc_op array;
+}
+
diff --git a/capstone/bindings/ocaml/sparc_const.ml b/capstone/bindings/ocaml/sparc_const.ml
new file mode 100644
index 000000000..000dbfebd
--- /dev/null
+++ b/capstone/bindings/ocaml/sparc_const.ml
@@ -0,0 +1,429 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.ml] *)
+
+let _SPARC_CC_INVALID = 0;;
+let _SPARC_CC_ICC_A = 8+256;;
+let _SPARC_CC_ICC_N = 0+256;;
+let _SPARC_CC_ICC_NE = 9+256;;
+let _SPARC_CC_ICC_E = 1+256;;
+let _SPARC_CC_ICC_G = 10+256;;
+let _SPARC_CC_ICC_LE = 2+256;;
+let _SPARC_CC_ICC_GE = 11+256;;
+let _SPARC_CC_ICC_L = 3+256;;
+let _SPARC_CC_ICC_GU = 12+256;;
+let _SPARC_CC_ICC_LEU = 4+256;;
+let _SPARC_CC_ICC_CC = 13+256;;
+let _SPARC_CC_ICC_CS = 5+256;;
+let _SPARC_CC_ICC_POS = 14+256;;
+let _SPARC_CC_ICC_NEG = 6+256;;
+let _SPARC_CC_ICC_VC = 15+256;;
+let _SPARC_CC_ICC_VS = 7+256;;
+let _SPARC_CC_FCC_A = 8+16+256;;
+let _SPARC_CC_FCC_N = 0+16+256;;
+let _SPARC_CC_FCC_U = 7+16+256;;
+let _SPARC_CC_FCC_G = 6+16+256;;
+let _SPARC_CC_FCC_UG = 5+16+256;;
+let _SPARC_CC_FCC_L = 4+16+256;;
+let _SPARC_CC_FCC_UL = 3+16+256;;
+let _SPARC_CC_FCC_LG = 2+16+256;;
+let _SPARC_CC_FCC_NE = 1+16+256;;
+let _SPARC_CC_FCC_E = 9+16+256;;
+let _SPARC_CC_FCC_UE = 10+16+256;;
+let _SPARC_CC_FCC_GE = 11+16+256;;
+let _SPARC_CC_FCC_UGE = 12+16+256;;
+let _SPARC_CC_FCC_LE = 13+16+256;;
+let _SPARC_CC_FCC_ULE = 14+16+256;;
+let _SPARC_CC_FCC_O = 15+16+256;;
+
+let _SPARC_HINT_INVALID = 0;;
+let _SPARC_HINT_A = 1 lsl 0;;
+let _SPARC_HINT_PT = 1 lsl 1;;
+let _SPARC_HINT_PN = 1 lsl 2;;
+
+let _SPARC_OP_INVALID = 0;;
+let _SPARC_OP_REG = 1;;
+let _SPARC_OP_IMM = 2;;
+let _SPARC_OP_MEM = 3;;
+
+let _SPARC_REG_INVALID = 0;;
+let _SPARC_REG_F0 = 1;;
+let _SPARC_REG_F1 = 2;;
+let _SPARC_REG_F2 = 3;;
+let _SPARC_REG_F3 = 4;;
+let _SPARC_REG_F4 = 5;;
+let _SPARC_REG_F5 = 6;;
+let _SPARC_REG_F6 = 7;;
+let _SPARC_REG_F7 = 8;;
+let _SPARC_REG_F8 = 9;;
+let _SPARC_REG_F9 = 10;;
+let _SPARC_REG_F10 = 11;;
+let _SPARC_REG_F11 = 12;;
+let _SPARC_REG_F12 = 13;;
+let _SPARC_REG_F13 = 14;;
+let _SPARC_REG_F14 = 15;;
+let _SPARC_REG_F15 = 16;;
+let _SPARC_REG_F16 = 17;;
+let _SPARC_REG_F17 = 18;;
+let _SPARC_REG_F18 = 19;;
+let _SPARC_REG_F19 = 20;;
+let _SPARC_REG_F20 = 21;;
+let _SPARC_REG_F21 = 22;;
+let _SPARC_REG_F22 = 23;;
+let _SPARC_REG_F23 = 24;;
+let _SPARC_REG_F24 = 25;;
+let _SPARC_REG_F25 = 26;;
+let _SPARC_REG_F26 = 27;;
+let _SPARC_REG_F27 = 28;;
+let _SPARC_REG_F28 = 29;;
+let _SPARC_REG_F29 = 30;;
+let _SPARC_REG_F30 = 31;;
+let _SPARC_REG_F31 = 32;;
+let _SPARC_REG_F32 = 33;;
+let _SPARC_REG_F34 = 34;;
+let _SPARC_REG_F36 = 35;;
+let _SPARC_REG_F38 = 36;;
+let _SPARC_REG_F40 = 37;;
+let _SPARC_REG_F42 = 38;;
+let _SPARC_REG_F44 = 39;;
+let _SPARC_REG_F46 = 40;;
+let _SPARC_REG_F48 = 41;;
+let _SPARC_REG_F50 = 42;;
+let _SPARC_REG_F52 = 43;;
+let _SPARC_REG_F54 = 44;;
+let _SPARC_REG_F56 = 45;;
+let _SPARC_REG_F58 = 46;;
+let _SPARC_REG_F60 = 47;;
+let _SPARC_REG_F62 = 48;;
+let _SPARC_REG_FCC0 = 49;;
+let _SPARC_REG_FCC1 = 50;;
+let _SPARC_REG_FCC2 = 51;;
+let _SPARC_REG_FCC3 = 52;;
+let _SPARC_REG_FP = 53;;
+let _SPARC_REG_G0 = 54;;
+let _SPARC_REG_G1 = 55;;
+let _SPARC_REG_G2 = 56;;
+let _SPARC_REG_G3 = 57;;
+let _SPARC_REG_G4 = 58;;
+let _SPARC_REG_G5 = 59;;
+let _SPARC_REG_G6 = 60;;
+let _SPARC_REG_G7 = 61;;
+let _SPARC_REG_I0 = 62;;
+let _SPARC_REG_I1 = 63;;
+let _SPARC_REG_I2 = 64;;
+let _SPARC_REG_I3 = 65;;
+let _SPARC_REG_I4 = 66;;
+let _SPARC_REG_I5 = 67;;
+let _SPARC_REG_I7 = 68;;
+let _SPARC_REG_ICC = 69;;
+let _SPARC_REG_L0 = 70;;
+let _SPARC_REG_L1 = 71;;
+let _SPARC_REG_L2 = 72;;
+let _SPARC_REG_L3 = 73;;
+let _SPARC_REG_L4 = 74;;
+let _SPARC_REG_L5 = 75;;
+let _SPARC_REG_L6 = 76;;
+let _SPARC_REG_L7 = 77;;
+let _SPARC_REG_O0 = 78;;
+let _SPARC_REG_O1 = 79;;
+let _SPARC_REG_O2 = 80;;
+let _SPARC_REG_O3 = 81;;
+let _SPARC_REG_O4 = 82;;
+let _SPARC_REG_O5 = 83;;
+let _SPARC_REG_O7 = 84;;
+let _SPARC_REG_SP = 85;;
+let _SPARC_REG_Y = 86;;
+let _SPARC_REG_XCC = 87;;
+let _SPARC_REG_ENDING = 88;;
+let _SPARC_REG_O6 = _SPARC_REG_SP;;
+let _SPARC_REG_I6 = _SPARC_REG_FP;;
+
+let _SPARC_INS_INVALID = 0;;
+let _SPARC_INS_ADDCC = 1;;
+let _SPARC_INS_ADDX = 2;;
+let _SPARC_INS_ADDXCC = 3;;
+let _SPARC_INS_ADDXC = 4;;
+let _SPARC_INS_ADDXCCC = 5;;
+let _SPARC_INS_ADD = 6;;
+let _SPARC_INS_ALIGNADDR = 7;;
+let _SPARC_INS_ALIGNADDRL = 8;;
+let _SPARC_INS_ANDCC = 9;;
+let _SPARC_INS_ANDNCC = 10;;
+let _SPARC_INS_ANDN = 11;;
+let _SPARC_INS_AND = 12;;
+let _SPARC_INS_ARRAY16 = 13;;
+let _SPARC_INS_ARRAY32 = 14;;
+let _SPARC_INS_ARRAY8 = 15;;
+let _SPARC_INS_B = 16;;
+let _SPARC_INS_JMP = 17;;
+let _SPARC_INS_BMASK = 18;;
+let _SPARC_INS_FB = 19;;
+let _SPARC_INS_BRGEZ = 20;;
+let _SPARC_INS_BRGZ = 21;;
+let _SPARC_INS_BRLEZ = 22;;
+let _SPARC_INS_BRLZ = 23;;
+let _SPARC_INS_BRNZ = 24;;
+let _SPARC_INS_BRZ = 25;;
+let _SPARC_INS_BSHUFFLE = 26;;
+let _SPARC_INS_CALL = 27;;
+let _SPARC_INS_CASX = 28;;
+let _SPARC_INS_CAS = 29;;
+let _SPARC_INS_CMASK16 = 30;;
+let _SPARC_INS_CMASK32 = 31;;
+let _SPARC_INS_CMASK8 = 32;;
+let _SPARC_INS_CMP = 33;;
+let _SPARC_INS_EDGE16 = 34;;
+let _SPARC_INS_EDGE16L = 35;;
+let _SPARC_INS_EDGE16LN = 36;;
+let _SPARC_INS_EDGE16N = 37;;
+let _SPARC_INS_EDGE32 = 38;;
+let _SPARC_INS_EDGE32L = 39;;
+let _SPARC_INS_EDGE32LN = 40;;
+let _SPARC_INS_EDGE32N = 41;;
+let _SPARC_INS_EDGE8 = 42;;
+let _SPARC_INS_EDGE8L = 43;;
+let _SPARC_INS_EDGE8LN = 44;;
+let _SPARC_INS_EDGE8N = 45;;
+let _SPARC_INS_FABSD = 46;;
+let _SPARC_INS_FABSQ = 47;;
+let _SPARC_INS_FABSS = 48;;
+let _SPARC_INS_FADDD = 49;;
+let _SPARC_INS_FADDQ = 50;;
+let _SPARC_INS_FADDS = 51;;
+let _SPARC_INS_FALIGNDATA = 52;;
+let _SPARC_INS_FAND = 53;;
+let _SPARC_INS_FANDNOT1 = 54;;
+let _SPARC_INS_FANDNOT1S = 55;;
+let _SPARC_INS_FANDNOT2 = 56;;
+let _SPARC_INS_FANDNOT2S = 57;;
+let _SPARC_INS_FANDS = 58;;
+let _SPARC_INS_FCHKSM16 = 59;;
+let _SPARC_INS_FCMPD = 60;;
+let _SPARC_INS_FCMPEQ16 = 61;;
+let _SPARC_INS_FCMPEQ32 = 62;;
+let _SPARC_INS_FCMPGT16 = 63;;
+let _SPARC_INS_FCMPGT32 = 64;;
+let _SPARC_INS_FCMPLE16 = 65;;
+let _SPARC_INS_FCMPLE32 = 66;;
+let _SPARC_INS_FCMPNE16 = 67;;
+let _SPARC_INS_FCMPNE32 = 68;;
+let _SPARC_INS_FCMPQ = 69;;
+let _SPARC_INS_FCMPS = 70;;
+let _SPARC_INS_FDIVD = 71;;
+let _SPARC_INS_FDIVQ = 72;;
+let _SPARC_INS_FDIVS = 73;;
+let _SPARC_INS_FDMULQ = 74;;
+let _SPARC_INS_FDTOI = 75;;
+let _SPARC_INS_FDTOQ = 76;;
+let _SPARC_INS_FDTOS = 77;;
+let _SPARC_INS_FDTOX = 78;;
+let _SPARC_INS_FEXPAND = 79;;
+let _SPARC_INS_FHADDD = 80;;
+let _SPARC_INS_FHADDS = 81;;
+let _SPARC_INS_FHSUBD = 82;;
+let _SPARC_INS_FHSUBS = 83;;
+let _SPARC_INS_FITOD = 84;;
+let _SPARC_INS_FITOQ = 85;;
+let _SPARC_INS_FITOS = 86;;
+let _SPARC_INS_FLCMPD = 87;;
+let _SPARC_INS_FLCMPS = 88;;
+let _SPARC_INS_FLUSHW = 89;;
+let _SPARC_INS_FMEAN16 = 90;;
+let _SPARC_INS_FMOVD = 91;;
+let _SPARC_INS_FMOVQ = 92;;
+let _SPARC_INS_FMOVRDGEZ = 93;;
+let _SPARC_INS_FMOVRQGEZ = 94;;
+let _SPARC_INS_FMOVRSGEZ = 95;;
+let _SPARC_INS_FMOVRDGZ = 96;;
+let _SPARC_INS_FMOVRQGZ = 97;;
+let _SPARC_INS_FMOVRSGZ = 98;;
+let _SPARC_INS_FMOVRDLEZ = 99;;
+let _SPARC_INS_FMOVRQLEZ = 100;;
+let _SPARC_INS_FMOVRSLEZ = 101;;
+let _SPARC_INS_FMOVRDLZ = 102;;
+let _SPARC_INS_FMOVRQLZ = 103;;
+let _SPARC_INS_FMOVRSLZ = 104;;
+let _SPARC_INS_FMOVRDNZ = 105;;
+let _SPARC_INS_FMOVRQNZ = 106;;
+let _SPARC_INS_FMOVRSNZ = 107;;
+let _SPARC_INS_FMOVRDZ = 108;;
+let _SPARC_INS_FMOVRQZ = 109;;
+let _SPARC_INS_FMOVRSZ = 110;;
+let _SPARC_INS_FMOVS = 111;;
+let _SPARC_INS_FMUL8SUX16 = 112;;
+let _SPARC_INS_FMUL8ULX16 = 113;;
+let _SPARC_INS_FMUL8X16 = 114;;
+let _SPARC_INS_FMUL8X16AL = 115;;
+let _SPARC_INS_FMUL8X16AU = 116;;
+let _SPARC_INS_FMULD = 117;;
+let _SPARC_INS_FMULD8SUX16 = 118;;
+let _SPARC_INS_FMULD8ULX16 = 119;;
+let _SPARC_INS_FMULQ = 120;;
+let _SPARC_INS_FMULS = 121;;
+let _SPARC_INS_FNADDD = 122;;
+let _SPARC_INS_FNADDS = 123;;
+let _SPARC_INS_FNAND = 124;;
+let _SPARC_INS_FNANDS = 125;;
+let _SPARC_INS_FNEGD = 126;;
+let _SPARC_INS_FNEGQ = 127;;
+let _SPARC_INS_FNEGS = 128;;
+let _SPARC_INS_FNHADDD = 129;;
+let _SPARC_INS_FNHADDS = 130;;
+let _SPARC_INS_FNOR = 131;;
+let _SPARC_INS_FNORS = 132;;
+let _SPARC_INS_FNOT1 = 133;;
+let _SPARC_INS_FNOT1S = 134;;
+let _SPARC_INS_FNOT2 = 135;;
+let _SPARC_INS_FNOT2S = 136;;
+let _SPARC_INS_FONE = 137;;
+let _SPARC_INS_FONES = 138;;
+let _SPARC_INS_FOR = 139;;
+let _SPARC_INS_FORNOT1 = 140;;
+let _SPARC_INS_FORNOT1S = 141;;
+let _SPARC_INS_FORNOT2 = 142;;
+let _SPARC_INS_FORNOT2S = 143;;
+let _SPARC_INS_FORS = 144;;
+let _SPARC_INS_FPACK16 = 145;;
+let _SPARC_INS_FPACK32 = 146;;
+let _SPARC_INS_FPACKFIX = 147;;
+let _SPARC_INS_FPADD16 = 148;;
+let _SPARC_INS_FPADD16S = 149;;
+let _SPARC_INS_FPADD32 = 150;;
+let _SPARC_INS_FPADD32S = 151;;
+let _SPARC_INS_FPADD64 = 152;;
+let _SPARC_INS_FPMERGE = 153;;
+let _SPARC_INS_FPSUB16 = 154;;
+let _SPARC_INS_FPSUB16S = 155;;
+let _SPARC_INS_FPSUB32 = 156;;
+let _SPARC_INS_FPSUB32S = 157;;
+let _SPARC_INS_FQTOD = 158;;
+let _SPARC_INS_FQTOI = 159;;
+let _SPARC_INS_FQTOS = 160;;
+let _SPARC_INS_FQTOX = 161;;
+let _SPARC_INS_FSLAS16 = 162;;
+let _SPARC_INS_FSLAS32 = 163;;
+let _SPARC_INS_FSLL16 = 164;;
+let _SPARC_INS_FSLL32 = 165;;
+let _SPARC_INS_FSMULD = 166;;
+let _SPARC_INS_FSQRTD = 167;;
+let _SPARC_INS_FSQRTQ = 168;;
+let _SPARC_INS_FSQRTS = 169;;
+let _SPARC_INS_FSRA16 = 170;;
+let _SPARC_INS_FSRA32 = 171;;
+let _SPARC_INS_FSRC1 = 172;;
+let _SPARC_INS_FSRC1S = 173;;
+let _SPARC_INS_FSRC2 = 174;;
+let _SPARC_INS_FSRC2S = 175;;
+let _SPARC_INS_FSRL16 = 176;;
+let _SPARC_INS_FSRL32 = 177;;
+let _SPARC_INS_FSTOD = 178;;
+let _SPARC_INS_FSTOI = 179;;
+let _SPARC_INS_FSTOQ = 180;;
+let _SPARC_INS_FSTOX = 181;;
+let _SPARC_INS_FSUBD = 182;;
+let _SPARC_INS_FSUBQ = 183;;
+let _SPARC_INS_FSUBS = 184;;
+let _SPARC_INS_FXNOR = 185;;
+let _SPARC_INS_FXNORS = 186;;
+let _SPARC_INS_FXOR = 187;;
+let _SPARC_INS_FXORS = 188;;
+let _SPARC_INS_FXTOD = 189;;
+let _SPARC_INS_FXTOQ = 190;;
+let _SPARC_INS_FXTOS = 191;;
+let _SPARC_INS_FZERO = 192;;
+let _SPARC_INS_FZEROS = 193;;
+let _SPARC_INS_JMPL = 194;;
+let _SPARC_INS_LDD = 195;;
+let _SPARC_INS_LD = 196;;
+let _SPARC_INS_LDQ = 197;;
+let _SPARC_INS_LDSB = 198;;
+let _SPARC_INS_LDSH = 199;;
+let _SPARC_INS_LDSW = 200;;
+let _SPARC_INS_LDUB = 201;;
+let _SPARC_INS_LDUH = 202;;
+let _SPARC_INS_LDX = 203;;
+let _SPARC_INS_LZCNT = 204;;
+let _SPARC_INS_MEMBAR = 205;;
+let _SPARC_INS_MOVDTOX = 206;;
+let _SPARC_INS_MOV = 207;;
+let _SPARC_INS_MOVRGEZ = 208;;
+let _SPARC_INS_MOVRGZ = 209;;
+let _SPARC_INS_MOVRLEZ = 210;;
+let _SPARC_INS_MOVRLZ = 211;;
+let _SPARC_INS_MOVRNZ = 212;;
+let _SPARC_INS_MOVRZ = 213;;
+let _SPARC_INS_MOVSTOSW = 214;;
+let _SPARC_INS_MOVSTOUW = 215;;
+let _SPARC_INS_MULX = 216;;
+let _SPARC_INS_NOP = 217;;
+let _SPARC_INS_ORCC = 218;;
+let _SPARC_INS_ORNCC = 219;;
+let _SPARC_INS_ORN = 220;;
+let _SPARC_INS_OR = 221;;
+let _SPARC_INS_PDIST = 222;;
+let _SPARC_INS_PDISTN = 223;;
+let _SPARC_INS_POPC = 224;;
+let _SPARC_INS_RD = 225;;
+let _SPARC_INS_RESTORE = 226;;
+let _SPARC_INS_RETT = 227;;
+let _SPARC_INS_SAVE = 228;;
+let _SPARC_INS_SDIVCC = 229;;
+let _SPARC_INS_SDIVX = 230;;
+let _SPARC_INS_SDIV = 231;;
+let _SPARC_INS_SETHI = 232;;
+let _SPARC_INS_SHUTDOWN = 233;;
+let _SPARC_INS_SIAM = 234;;
+let _SPARC_INS_SLLX = 235;;
+let _SPARC_INS_SLL = 236;;
+let _SPARC_INS_SMULCC = 237;;
+let _SPARC_INS_SMUL = 238;;
+let _SPARC_INS_SRAX = 239;;
+let _SPARC_INS_SRA = 240;;
+let _SPARC_INS_SRLX = 241;;
+let _SPARC_INS_SRL = 242;;
+let _SPARC_INS_STBAR = 243;;
+let _SPARC_INS_STB = 244;;
+let _SPARC_INS_STD = 245;;
+let _SPARC_INS_ST = 246;;
+let _SPARC_INS_STH = 247;;
+let _SPARC_INS_STQ = 248;;
+let _SPARC_INS_STX = 249;;
+let _SPARC_INS_SUBCC = 250;;
+let _SPARC_INS_SUBX = 251;;
+let _SPARC_INS_SUBXCC = 252;;
+let _SPARC_INS_SUB = 253;;
+let _SPARC_INS_SWAP = 254;;
+let _SPARC_INS_TADDCCTV = 255;;
+let _SPARC_INS_TADDCC = 256;;
+let _SPARC_INS_T = 257;;
+let _SPARC_INS_TSUBCCTV = 258;;
+let _SPARC_INS_TSUBCC = 259;;
+let _SPARC_INS_UDIVCC = 260;;
+let _SPARC_INS_UDIVX = 261;;
+let _SPARC_INS_UDIV = 262;;
+let _SPARC_INS_UMULCC = 263;;
+let _SPARC_INS_UMULXHI = 264;;
+let _SPARC_INS_UMUL = 265;;
+let _SPARC_INS_UNIMP = 266;;
+let _SPARC_INS_FCMPED = 267;;
+let _SPARC_INS_FCMPEQ = 268;;
+let _SPARC_INS_FCMPES = 269;;
+let _SPARC_INS_WR = 270;;
+let _SPARC_INS_XMULX = 271;;
+let _SPARC_INS_XMULXHI = 272;;
+let _SPARC_INS_XNORCC = 273;;
+let _SPARC_INS_XNOR = 274;;
+let _SPARC_INS_XORCC = 275;;
+let _SPARC_INS_XOR = 276;;
+let _SPARC_INS_RET = 277;;
+let _SPARC_INS_RETL = 278;;
+let _SPARC_INS_ENDING = 279;;
+
+let _SPARC_GRP_INVALID = 0;;
+let _SPARC_GRP_JUMP = 1;;
+let _SPARC_GRP_HARDQUAD = 128;;
+let _SPARC_GRP_V9 = 129;;
+let _SPARC_GRP_VIS = 130;;
+let _SPARC_GRP_VIS2 = 131;;
+let _SPARC_GRP_VIS3 = 132;;
+let _SPARC_GRP_32BIT = 133;;
+let _SPARC_GRP_64BIT = 134;;
+let _SPARC_GRP_ENDING = 135;;
diff --git a/capstone/bindings/ocaml/systemz.ml b/capstone/bindings/ocaml/systemz.ml
new file mode 100644
index 000000000..755bf5d79
--- /dev/null
+++ b/capstone/bindings/ocaml/systemz.ml
@@ -0,0 +1,27 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Sysz_const
+
+type sysz_op_mem = {
+	base: int;
+	index: int;
+	length: int64;
+	disp: int64;
+}
+
+type sysz_op_value = 
+	| SYSZ_OP_INVALID of int
+	| SYSZ_OP_REG of int
+	| SYSZ_OP_ACREG of int
+	| SYSZ_OP_IMM of int
+	| SYSZ_OP_MEM of sysz_op_mem
+
+type sysz_op = {
+	value: sysz_op_value;
+}
+
+type cs_sysz = { 
+	cc: int;
+	operands: sysz_op array;
+}
diff --git a/capstone/bindings/ocaml/sysz_const.ml b/capstone/bindings/ocaml/sysz_const.ml
new file mode 100644
index 000000000..e738b5c26
--- /dev/null
+++ b/capstone/bindings/ocaml/sysz_const.ml
@@ -0,0 +1,2523 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sysz_const.ml] *)
+
+let _SYSZ_CC_INVALID = 0;;
+let _SYSZ_CC_O = 1;;
+let _SYSZ_CC_H = 2;;
+let _SYSZ_CC_NLE = 3;;
+let _SYSZ_CC_L = 4;;
+let _SYSZ_CC_NHE = 5;;
+let _SYSZ_CC_LH = 6;;
+let _SYSZ_CC_NE = 7;;
+let _SYSZ_CC_E = 8;;
+let _SYSZ_CC_NLH = 9;;
+let _SYSZ_CC_HE = 10;;
+let _SYSZ_CC_NL = 11;;
+let _SYSZ_CC_LE = 12;;
+let _SYSZ_CC_NH = 13;;
+let _SYSZ_CC_NO = 14;;
+
+let _SYSZ_OP_INVALID = 0;;
+let _SYSZ_OP_REG = 1;;
+let _SYSZ_OP_IMM = 2;;
+let _SYSZ_OP_MEM = 3;;
+let _SYSZ_OP_ACREG = 64;;
+
+let _SYSZ_REG_INVALID = 0;;
+let _SYSZ_REG_0 = 1;;
+let _SYSZ_REG_1 = 2;;
+let _SYSZ_REG_2 = 3;;
+let _SYSZ_REG_3 = 4;;
+let _SYSZ_REG_4 = 5;;
+let _SYSZ_REG_5 = 6;;
+let _SYSZ_REG_6 = 7;;
+let _SYSZ_REG_7 = 8;;
+let _SYSZ_REG_8 = 9;;
+let _SYSZ_REG_9 = 10;;
+let _SYSZ_REG_10 = 11;;
+let _SYSZ_REG_11 = 12;;
+let _SYSZ_REG_12 = 13;;
+let _SYSZ_REG_13 = 14;;
+let _SYSZ_REG_14 = 15;;
+let _SYSZ_REG_15 = 16;;
+let _SYSZ_REG_CC = 17;;
+let _SYSZ_REG_F0 = 18;;
+let _SYSZ_REG_F1 = 19;;
+let _SYSZ_REG_F2 = 20;;
+let _SYSZ_REG_F3 = 21;;
+let _SYSZ_REG_F4 = 22;;
+let _SYSZ_REG_F5 = 23;;
+let _SYSZ_REG_F6 = 24;;
+let _SYSZ_REG_F7 = 25;;
+let _SYSZ_REG_F8 = 26;;
+let _SYSZ_REG_F9 = 27;;
+let _SYSZ_REG_F10 = 28;;
+let _SYSZ_REG_F11 = 29;;
+let _SYSZ_REG_F12 = 30;;
+let _SYSZ_REG_F13 = 31;;
+let _SYSZ_REG_F14 = 32;;
+let _SYSZ_REG_F15 = 33;;
+let _SYSZ_REG_R0L = 34;;
+let _SYSZ_REG_A0 = 35;;
+let _SYSZ_REG_A1 = 36;;
+let _SYSZ_REG_A2 = 37;;
+let _SYSZ_REG_A3 = 38;;
+let _SYSZ_REG_A4 = 39;;
+let _SYSZ_REG_A5 = 40;;
+let _SYSZ_REG_A6 = 41;;
+let _SYSZ_REG_A7 = 42;;
+let _SYSZ_REG_A8 = 43;;
+let _SYSZ_REG_A9 = 44;;
+let _SYSZ_REG_A10 = 45;;
+let _SYSZ_REG_A11 = 46;;
+let _SYSZ_REG_A12 = 47;;
+let _SYSZ_REG_A13 = 48;;
+let _SYSZ_REG_A14 = 49;;
+let _SYSZ_REG_A15 = 50;;
+let _SYSZ_REG_C0 = 51;;
+let _SYSZ_REG_C1 = 52;;
+let _SYSZ_REG_C2 = 53;;
+let _SYSZ_REG_C3 = 54;;
+let _SYSZ_REG_C4 = 55;;
+let _SYSZ_REG_C5 = 56;;
+let _SYSZ_REG_C6 = 57;;
+let _SYSZ_REG_C7 = 58;;
+let _SYSZ_REG_C8 = 59;;
+let _SYSZ_REG_C9 = 60;;
+let _SYSZ_REG_C10 = 61;;
+let _SYSZ_REG_C11 = 62;;
+let _SYSZ_REG_C12 = 63;;
+let _SYSZ_REG_C13 = 64;;
+let _SYSZ_REG_C14 = 65;;
+let _SYSZ_REG_C15 = 66;;
+let _SYSZ_REG_V0 = 67;;
+let _SYSZ_REG_V1 = 68;;
+let _SYSZ_REG_V2 = 69;;
+let _SYSZ_REG_V3 = 70;;
+let _SYSZ_REG_V4 = 71;;
+let _SYSZ_REG_V5 = 72;;
+let _SYSZ_REG_V6 = 73;;
+let _SYSZ_REG_V7 = 74;;
+let _SYSZ_REG_V8 = 75;;
+let _SYSZ_REG_V9 = 76;;
+let _SYSZ_REG_V10 = 77;;
+let _SYSZ_REG_V11 = 78;;
+let _SYSZ_REG_V12 = 79;;
+let _SYSZ_REG_V13 = 80;;
+let _SYSZ_REG_V14 = 81;;
+let _SYSZ_REG_V15 = 82;;
+let _SYSZ_REG_V16 = 83;;
+let _SYSZ_REG_V17 = 84;;
+let _SYSZ_REG_V18 = 85;;
+let _SYSZ_REG_V19 = 86;;
+let _SYSZ_REG_V20 = 87;;
+let _SYSZ_REG_V21 = 88;;
+let _SYSZ_REG_V22 = 89;;
+let _SYSZ_REG_V23 = 90;;
+let _SYSZ_REG_V24 = 91;;
+let _SYSZ_REG_V25 = 92;;
+let _SYSZ_REG_V26 = 93;;
+let _SYSZ_REG_V27 = 94;;
+let _SYSZ_REG_V28 = 95;;
+let _SYSZ_REG_V29 = 96;;
+let _SYSZ_REG_V30 = 97;;
+let _SYSZ_REG_V31 = 98;;
+let _SYSZ_REG_F16 = 99;;
+let _SYSZ_REG_F17 = 100;;
+let _SYSZ_REG_F18 = 101;;
+let _SYSZ_REG_F19 = 102;;
+let _SYSZ_REG_F20 = 103;;
+let _SYSZ_REG_F21 = 104;;
+let _SYSZ_REG_F22 = 105;;
+let _SYSZ_REG_F23 = 106;;
+let _SYSZ_REG_F24 = 107;;
+let _SYSZ_REG_F25 = 108;;
+let _SYSZ_REG_F26 = 109;;
+let _SYSZ_REG_F27 = 110;;
+let _SYSZ_REG_F28 = 111;;
+let _SYSZ_REG_F29 = 112;;
+let _SYSZ_REG_F30 = 113;;
+let _SYSZ_REG_F31 = 114;;
+let _SYSZ_REG_F0Q = 115;;
+let _SYSZ_REG_F4Q = 116;;
+let _SYSZ_REG_ENDING = 117;;
+
+let _SYSZ_INS_INVALID = 0;;
+let _SYSZ_INS_A = 1;;
+let _SYSZ_INS_ADB = 2;;
+let _SYSZ_INS_ADBR = 3;;
+let _SYSZ_INS_AEB = 4;;
+let _SYSZ_INS_AEBR = 5;;
+let _SYSZ_INS_AFI = 6;;
+let _SYSZ_INS_AG = 7;;
+let _SYSZ_INS_AGF = 8;;
+let _SYSZ_INS_AGFI = 9;;
+let _SYSZ_INS_AGFR = 10;;
+let _SYSZ_INS_AGHI = 11;;
+let _SYSZ_INS_AGHIK = 12;;
+let _SYSZ_INS_AGR = 13;;
+let _SYSZ_INS_AGRK = 14;;
+let _SYSZ_INS_AGSI = 15;;
+let _SYSZ_INS_AH = 16;;
+let _SYSZ_INS_AHI = 17;;
+let _SYSZ_INS_AHIK = 18;;
+let _SYSZ_INS_AHY = 19;;
+let _SYSZ_INS_AIH = 20;;
+let _SYSZ_INS_AL = 21;;
+let _SYSZ_INS_ALC = 22;;
+let _SYSZ_INS_ALCG = 23;;
+let _SYSZ_INS_ALCGR = 24;;
+let _SYSZ_INS_ALCR = 25;;
+let _SYSZ_INS_ALFI = 26;;
+let _SYSZ_INS_ALG = 27;;
+let _SYSZ_INS_ALGF = 28;;
+let _SYSZ_INS_ALGFI = 29;;
+let _SYSZ_INS_ALGFR = 30;;
+let _SYSZ_INS_ALGHSIK = 31;;
+let _SYSZ_INS_ALGR = 32;;
+let _SYSZ_INS_ALGRK = 33;;
+let _SYSZ_INS_ALHSIK = 34;;
+let _SYSZ_INS_ALR = 35;;
+let _SYSZ_INS_ALRK = 36;;
+let _SYSZ_INS_ALY = 37;;
+let _SYSZ_INS_AR = 38;;
+let _SYSZ_INS_ARK = 39;;
+let _SYSZ_INS_ASI = 40;;
+let _SYSZ_INS_AXBR = 41;;
+let _SYSZ_INS_AY = 42;;
+let _SYSZ_INS_BCR = 43;;
+let _SYSZ_INS_BRC = 44;;
+let _SYSZ_INS_BRCL = 45;;
+let _SYSZ_INS_CGIJ = 46;;
+let _SYSZ_INS_CGRJ = 47;;
+let _SYSZ_INS_CIJ = 48;;
+let _SYSZ_INS_CLGIJ = 49;;
+let _SYSZ_INS_CLGRJ = 50;;
+let _SYSZ_INS_CLIJ = 51;;
+let _SYSZ_INS_CLRJ = 52;;
+let _SYSZ_INS_CRJ = 53;;
+let _SYSZ_INS_BER = 54;;
+let _SYSZ_INS_JE = 55;;
+let _SYSZ_INS_JGE = 56;;
+let _SYSZ_INS_LOCE = 57;;
+let _SYSZ_INS_LOCGE = 58;;
+let _SYSZ_INS_LOCGRE = 59;;
+let _SYSZ_INS_LOCRE = 60;;
+let _SYSZ_INS_STOCE = 61;;
+let _SYSZ_INS_STOCGE = 62;;
+let _SYSZ_INS_BHR = 63;;
+let _SYSZ_INS_BHER = 64;;
+let _SYSZ_INS_JHE = 65;;
+let _SYSZ_INS_JGHE = 66;;
+let _SYSZ_INS_LOCHE = 67;;
+let _SYSZ_INS_LOCGHE = 68;;
+let _SYSZ_INS_LOCGRHE = 69;;
+let _SYSZ_INS_LOCRHE = 70;;
+let _SYSZ_INS_STOCHE = 71;;
+let _SYSZ_INS_STOCGHE = 72;;
+let _SYSZ_INS_JH = 73;;
+let _SYSZ_INS_JGH = 74;;
+let _SYSZ_INS_LOCH = 75;;
+let _SYSZ_INS_LOCGH = 76;;
+let _SYSZ_INS_LOCGRH = 77;;
+let _SYSZ_INS_LOCRH = 78;;
+let _SYSZ_INS_STOCH = 79;;
+let _SYSZ_INS_STOCGH = 80;;
+let _SYSZ_INS_CGIJNLH = 81;;
+let _SYSZ_INS_CGRJNLH = 82;;
+let _SYSZ_INS_CIJNLH = 83;;
+let _SYSZ_INS_CLGIJNLH = 84;;
+let _SYSZ_INS_CLGRJNLH = 85;;
+let _SYSZ_INS_CLIJNLH = 86;;
+let _SYSZ_INS_CLRJNLH = 87;;
+let _SYSZ_INS_CRJNLH = 88;;
+let _SYSZ_INS_CGIJE = 89;;
+let _SYSZ_INS_CGRJE = 90;;
+let _SYSZ_INS_CIJE = 91;;
+let _SYSZ_INS_CLGIJE = 92;;
+let _SYSZ_INS_CLGRJE = 93;;
+let _SYSZ_INS_CLIJE = 94;;
+let _SYSZ_INS_CLRJE = 95;;
+let _SYSZ_INS_CRJE = 96;;
+let _SYSZ_INS_CGIJNLE = 97;;
+let _SYSZ_INS_CGRJNLE = 98;;
+let _SYSZ_INS_CIJNLE = 99;;
+let _SYSZ_INS_CLGIJNLE = 100;;
+let _SYSZ_INS_CLGRJNLE = 101;;
+let _SYSZ_INS_CLIJNLE = 102;;
+let _SYSZ_INS_CLRJNLE = 103;;
+let _SYSZ_INS_CRJNLE = 104;;
+let _SYSZ_INS_CGIJH = 105;;
+let _SYSZ_INS_CGRJH = 106;;
+let _SYSZ_INS_CIJH = 107;;
+let _SYSZ_INS_CLGIJH = 108;;
+let _SYSZ_INS_CLGRJH = 109;;
+let _SYSZ_INS_CLIJH = 110;;
+let _SYSZ_INS_CLRJH = 111;;
+let _SYSZ_INS_CRJH = 112;;
+let _SYSZ_INS_CGIJNL = 113;;
+let _SYSZ_INS_CGRJNL = 114;;
+let _SYSZ_INS_CIJNL = 115;;
+let _SYSZ_INS_CLGIJNL = 116;;
+let _SYSZ_INS_CLGRJNL = 117;;
+let _SYSZ_INS_CLIJNL = 118;;
+let _SYSZ_INS_CLRJNL = 119;;
+let _SYSZ_INS_CRJNL = 120;;
+let _SYSZ_INS_CGIJHE = 121;;
+let _SYSZ_INS_CGRJHE = 122;;
+let _SYSZ_INS_CIJHE = 123;;
+let _SYSZ_INS_CLGIJHE = 124;;
+let _SYSZ_INS_CLGRJHE = 125;;
+let _SYSZ_INS_CLIJHE = 126;;
+let _SYSZ_INS_CLRJHE = 127;;
+let _SYSZ_INS_CRJHE = 128;;
+let _SYSZ_INS_CGIJNHE = 129;;
+let _SYSZ_INS_CGRJNHE = 130;;
+let _SYSZ_INS_CIJNHE = 131;;
+let _SYSZ_INS_CLGIJNHE = 132;;
+let _SYSZ_INS_CLGRJNHE = 133;;
+let _SYSZ_INS_CLIJNHE = 134;;
+let _SYSZ_INS_CLRJNHE = 135;;
+let _SYSZ_INS_CRJNHE = 136;;
+let _SYSZ_INS_CGIJL = 137;;
+let _SYSZ_INS_CGRJL = 138;;
+let _SYSZ_INS_CIJL = 139;;
+let _SYSZ_INS_CLGIJL = 140;;
+let _SYSZ_INS_CLGRJL = 141;;
+let _SYSZ_INS_CLIJL = 142;;
+let _SYSZ_INS_CLRJL = 143;;
+let _SYSZ_INS_CRJL = 144;;
+let _SYSZ_INS_CGIJNH = 145;;
+let _SYSZ_INS_CGRJNH = 146;;
+let _SYSZ_INS_CIJNH = 147;;
+let _SYSZ_INS_CLGIJNH = 148;;
+let _SYSZ_INS_CLGRJNH = 149;;
+let _SYSZ_INS_CLIJNH = 150;;
+let _SYSZ_INS_CLRJNH = 151;;
+let _SYSZ_INS_CRJNH = 152;;
+let _SYSZ_INS_CGIJLE = 153;;
+let _SYSZ_INS_CGRJLE = 154;;
+let _SYSZ_INS_CIJLE = 155;;
+let _SYSZ_INS_CLGIJLE = 156;;
+let _SYSZ_INS_CLGRJLE = 157;;
+let _SYSZ_INS_CLIJLE = 158;;
+let _SYSZ_INS_CLRJLE = 159;;
+let _SYSZ_INS_CRJLE = 160;;
+let _SYSZ_INS_CGIJNE = 161;;
+let _SYSZ_INS_CGRJNE = 162;;
+let _SYSZ_INS_CIJNE = 163;;
+let _SYSZ_INS_CLGIJNE = 164;;
+let _SYSZ_INS_CLGRJNE = 165;;
+let _SYSZ_INS_CLIJNE = 166;;
+let _SYSZ_INS_CLRJNE = 167;;
+let _SYSZ_INS_CRJNE = 168;;
+let _SYSZ_INS_CGIJLH = 169;;
+let _SYSZ_INS_CGRJLH = 170;;
+let _SYSZ_INS_CIJLH = 171;;
+let _SYSZ_INS_CLGIJLH = 172;;
+let _SYSZ_INS_CLGRJLH = 173;;
+let _SYSZ_INS_CLIJLH = 174;;
+let _SYSZ_INS_CLRJLH = 175;;
+let _SYSZ_INS_CRJLH = 176;;
+let _SYSZ_INS_BLR = 177;;
+let _SYSZ_INS_BLER = 178;;
+let _SYSZ_INS_JLE = 179;;
+let _SYSZ_INS_JGLE = 180;;
+let _SYSZ_INS_LOCLE = 181;;
+let _SYSZ_INS_LOCGLE = 182;;
+let _SYSZ_INS_LOCGRLE = 183;;
+let _SYSZ_INS_LOCRLE = 184;;
+let _SYSZ_INS_STOCLE = 185;;
+let _SYSZ_INS_STOCGLE = 186;;
+let _SYSZ_INS_BLHR = 187;;
+let _SYSZ_INS_JLH = 188;;
+let _SYSZ_INS_JGLH = 189;;
+let _SYSZ_INS_LOCLH = 190;;
+let _SYSZ_INS_LOCGLH = 191;;
+let _SYSZ_INS_LOCGRLH = 192;;
+let _SYSZ_INS_LOCRLH = 193;;
+let _SYSZ_INS_STOCLH = 194;;
+let _SYSZ_INS_STOCGLH = 195;;
+let _SYSZ_INS_JL = 196;;
+let _SYSZ_INS_JGL = 197;;
+let _SYSZ_INS_LOCL = 198;;
+let _SYSZ_INS_LOCGL = 199;;
+let _SYSZ_INS_LOCGRL = 200;;
+let _SYSZ_INS_LOCRL = 201;;
+let _SYSZ_INS_LOC = 202;;
+let _SYSZ_INS_LOCG = 203;;
+let _SYSZ_INS_LOCGR = 204;;
+let _SYSZ_INS_LOCR = 205;;
+let _SYSZ_INS_STOCL = 206;;
+let _SYSZ_INS_STOCGL = 207;;
+let _SYSZ_INS_BNER = 208;;
+let _SYSZ_INS_JNE = 209;;
+let _SYSZ_INS_JGNE = 210;;
+let _SYSZ_INS_LOCNE = 211;;
+let _SYSZ_INS_LOCGNE = 212;;
+let _SYSZ_INS_LOCGRNE = 213;;
+let _SYSZ_INS_LOCRNE = 214;;
+let _SYSZ_INS_STOCNE = 215;;
+let _SYSZ_INS_STOCGNE = 216;;
+let _SYSZ_INS_BNHR = 217;;
+let _SYSZ_INS_BNHER = 218;;
+let _SYSZ_INS_JNHE = 219;;
+let _SYSZ_INS_JGNHE = 220;;
+let _SYSZ_INS_LOCNHE = 221;;
+let _SYSZ_INS_LOCGNHE = 222;;
+let _SYSZ_INS_LOCGRNHE = 223;;
+let _SYSZ_INS_LOCRNHE = 224;;
+let _SYSZ_INS_STOCNHE = 225;;
+let _SYSZ_INS_STOCGNHE = 226;;
+let _SYSZ_INS_JNH = 227;;
+let _SYSZ_INS_JGNH = 228;;
+let _SYSZ_INS_LOCNH = 229;;
+let _SYSZ_INS_LOCGNH = 230;;
+let _SYSZ_INS_LOCGRNH = 231;;
+let _SYSZ_INS_LOCRNH = 232;;
+let _SYSZ_INS_STOCNH = 233;;
+let _SYSZ_INS_STOCGNH = 234;;
+let _SYSZ_INS_BNLR = 235;;
+let _SYSZ_INS_BNLER = 236;;
+let _SYSZ_INS_JNLE = 237;;
+let _SYSZ_INS_JGNLE = 238;;
+let _SYSZ_INS_LOCNLE = 239;;
+let _SYSZ_INS_LOCGNLE = 240;;
+let _SYSZ_INS_LOCGRNLE = 241;;
+let _SYSZ_INS_LOCRNLE = 242;;
+let _SYSZ_INS_STOCNLE = 243;;
+let _SYSZ_INS_STOCGNLE = 244;;
+let _SYSZ_INS_BNLHR = 245;;
+let _SYSZ_INS_JNLH = 246;;
+let _SYSZ_INS_JGNLH = 247;;
+let _SYSZ_INS_LOCNLH = 248;;
+let _SYSZ_INS_LOCGNLH = 249;;
+let _SYSZ_INS_LOCGRNLH = 250;;
+let _SYSZ_INS_LOCRNLH = 251;;
+let _SYSZ_INS_STOCNLH = 252;;
+let _SYSZ_INS_STOCGNLH = 253;;
+let _SYSZ_INS_JNL = 254;;
+let _SYSZ_INS_JGNL = 255;;
+let _SYSZ_INS_LOCNL = 256;;
+let _SYSZ_INS_LOCGNL = 257;;
+let _SYSZ_INS_LOCGRNL = 258;;
+let _SYSZ_INS_LOCRNL = 259;;
+let _SYSZ_INS_STOCNL = 260;;
+let _SYSZ_INS_STOCGNL = 261;;
+let _SYSZ_INS_BNOR = 262;;
+let _SYSZ_INS_JNO = 263;;
+let _SYSZ_INS_JGNO = 264;;
+let _SYSZ_INS_LOCNO = 265;;
+let _SYSZ_INS_LOCGNO = 266;;
+let _SYSZ_INS_LOCGRNO = 267;;
+let _SYSZ_INS_LOCRNO = 268;;
+let _SYSZ_INS_STOCNO = 269;;
+let _SYSZ_INS_STOCGNO = 270;;
+let _SYSZ_INS_BOR = 271;;
+let _SYSZ_INS_JO = 272;;
+let _SYSZ_INS_JGO = 273;;
+let _SYSZ_INS_LOCO = 274;;
+let _SYSZ_INS_LOCGO = 275;;
+let _SYSZ_INS_LOCGRO = 276;;
+let _SYSZ_INS_LOCRO = 277;;
+let _SYSZ_INS_STOCO = 278;;
+let _SYSZ_INS_STOCGO = 279;;
+let _SYSZ_INS_STOC = 280;;
+let _SYSZ_INS_STOCG = 281;;
+let _SYSZ_INS_BASR = 282;;
+let _SYSZ_INS_BR = 283;;
+let _SYSZ_INS_BRAS = 284;;
+let _SYSZ_INS_BRASL = 285;;
+let _SYSZ_INS_J = 286;;
+let _SYSZ_INS_JG = 287;;
+let _SYSZ_INS_BRCT = 288;;
+let _SYSZ_INS_BRCTG = 289;;
+let _SYSZ_INS_C = 290;;
+let _SYSZ_INS_CDB = 291;;
+let _SYSZ_INS_CDBR = 292;;
+let _SYSZ_INS_CDFBR = 293;;
+let _SYSZ_INS_CDGBR = 294;;
+let _SYSZ_INS_CDLFBR = 295;;
+let _SYSZ_INS_CDLGBR = 296;;
+let _SYSZ_INS_CEB = 297;;
+let _SYSZ_INS_CEBR = 298;;
+let _SYSZ_INS_CEFBR = 299;;
+let _SYSZ_INS_CEGBR = 300;;
+let _SYSZ_INS_CELFBR = 301;;
+let _SYSZ_INS_CELGBR = 302;;
+let _SYSZ_INS_CFDBR = 303;;
+let _SYSZ_INS_CFEBR = 304;;
+let _SYSZ_INS_CFI = 305;;
+let _SYSZ_INS_CFXBR = 306;;
+let _SYSZ_INS_CG = 307;;
+let _SYSZ_INS_CGDBR = 308;;
+let _SYSZ_INS_CGEBR = 309;;
+let _SYSZ_INS_CGF = 310;;
+let _SYSZ_INS_CGFI = 311;;
+let _SYSZ_INS_CGFR = 312;;
+let _SYSZ_INS_CGFRL = 313;;
+let _SYSZ_INS_CGH = 314;;
+let _SYSZ_INS_CGHI = 315;;
+let _SYSZ_INS_CGHRL = 316;;
+let _SYSZ_INS_CGHSI = 317;;
+let _SYSZ_INS_CGR = 318;;
+let _SYSZ_INS_CGRL = 319;;
+let _SYSZ_INS_CGXBR = 320;;
+let _SYSZ_INS_CH = 321;;
+let _SYSZ_INS_CHF = 322;;
+let _SYSZ_INS_CHHSI = 323;;
+let _SYSZ_INS_CHI = 324;;
+let _SYSZ_INS_CHRL = 325;;
+let _SYSZ_INS_CHSI = 326;;
+let _SYSZ_INS_CHY = 327;;
+let _SYSZ_INS_CIH = 328;;
+let _SYSZ_INS_CL = 329;;
+let _SYSZ_INS_CLC = 330;;
+let _SYSZ_INS_CLFDBR = 331;;
+let _SYSZ_INS_CLFEBR = 332;;
+let _SYSZ_INS_CLFHSI = 333;;
+let _SYSZ_INS_CLFI = 334;;
+let _SYSZ_INS_CLFXBR = 335;;
+let _SYSZ_INS_CLG = 336;;
+let _SYSZ_INS_CLGDBR = 337;;
+let _SYSZ_INS_CLGEBR = 338;;
+let _SYSZ_INS_CLGF = 339;;
+let _SYSZ_INS_CLGFI = 340;;
+let _SYSZ_INS_CLGFR = 341;;
+let _SYSZ_INS_CLGFRL = 342;;
+let _SYSZ_INS_CLGHRL = 343;;
+let _SYSZ_INS_CLGHSI = 344;;
+let _SYSZ_INS_CLGR = 345;;
+let _SYSZ_INS_CLGRL = 346;;
+let _SYSZ_INS_CLGXBR = 347;;
+let _SYSZ_INS_CLHF = 348;;
+let _SYSZ_INS_CLHHSI = 349;;
+let _SYSZ_INS_CLHRL = 350;;
+let _SYSZ_INS_CLI = 351;;
+let _SYSZ_INS_CLIH = 352;;
+let _SYSZ_INS_CLIY = 353;;
+let _SYSZ_INS_CLR = 354;;
+let _SYSZ_INS_CLRL = 355;;
+let _SYSZ_INS_CLST = 356;;
+let _SYSZ_INS_CLY = 357;;
+let _SYSZ_INS_CPSDR = 358;;
+let _SYSZ_INS_CR = 359;;
+let _SYSZ_INS_CRL = 360;;
+let _SYSZ_INS_CS = 361;;
+let _SYSZ_INS_CSG = 362;;
+let _SYSZ_INS_CSY = 363;;
+let _SYSZ_INS_CXBR = 364;;
+let _SYSZ_INS_CXFBR = 365;;
+let _SYSZ_INS_CXGBR = 366;;
+let _SYSZ_INS_CXLFBR = 367;;
+let _SYSZ_INS_CXLGBR = 368;;
+let _SYSZ_INS_CY = 369;;
+let _SYSZ_INS_DDB = 370;;
+let _SYSZ_INS_DDBR = 371;;
+let _SYSZ_INS_DEB = 372;;
+let _SYSZ_INS_DEBR = 373;;
+let _SYSZ_INS_DL = 374;;
+let _SYSZ_INS_DLG = 375;;
+let _SYSZ_INS_DLGR = 376;;
+let _SYSZ_INS_DLR = 377;;
+let _SYSZ_INS_DSG = 378;;
+let _SYSZ_INS_DSGF = 379;;
+let _SYSZ_INS_DSGFR = 380;;
+let _SYSZ_INS_DSGR = 381;;
+let _SYSZ_INS_DXBR = 382;;
+let _SYSZ_INS_EAR = 383;;
+let _SYSZ_INS_FIDBR = 384;;
+let _SYSZ_INS_FIDBRA = 385;;
+let _SYSZ_INS_FIEBR = 386;;
+let _SYSZ_INS_FIEBRA = 387;;
+let _SYSZ_INS_FIXBR = 388;;
+let _SYSZ_INS_FIXBRA = 389;;
+let _SYSZ_INS_FLOGR = 390;;
+let _SYSZ_INS_IC = 391;;
+let _SYSZ_INS_ICY = 392;;
+let _SYSZ_INS_IIHF = 393;;
+let _SYSZ_INS_IIHH = 394;;
+let _SYSZ_INS_IIHL = 395;;
+let _SYSZ_INS_IILF = 396;;
+let _SYSZ_INS_IILH = 397;;
+let _SYSZ_INS_IILL = 398;;
+let _SYSZ_INS_IPM = 399;;
+let _SYSZ_INS_L = 400;;
+let _SYSZ_INS_LA = 401;;
+let _SYSZ_INS_LAA = 402;;
+let _SYSZ_INS_LAAG = 403;;
+let _SYSZ_INS_LAAL = 404;;
+let _SYSZ_INS_LAALG = 405;;
+let _SYSZ_INS_LAN = 406;;
+let _SYSZ_INS_LANG = 407;;
+let _SYSZ_INS_LAO = 408;;
+let _SYSZ_INS_LAOG = 409;;
+let _SYSZ_INS_LARL = 410;;
+let _SYSZ_INS_LAX = 411;;
+let _SYSZ_INS_LAXG = 412;;
+let _SYSZ_INS_LAY = 413;;
+let _SYSZ_INS_LB = 414;;
+let _SYSZ_INS_LBH = 415;;
+let _SYSZ_INS_LBR = 416;;
+let _SYSZ_INS_LCDBR = 417;;
+let _SYSZ_INS_LCEBR = 418;;
+let _SYSZ_INS_LCGFR = 419;;
+let _SYSZ_INS_LCGR = 420;;
+let _SYSZ_INS_LCR = 421;;
+let _SYSZ_INS_LCXBR = 422;;
+let _SYSZ_INS_LD = 423;;
+let _SYSZ_INS_LDEB = 424;;
+let _SYSZ_INS_LDEBR = 425;;
+let _SYSZ_INS_LDGR = 426;;
+let _SYSZ_INS_LDR = 427;;
+let _SYSZ_INS_LDXBR = 428;;
+let _SYSZ_INS_LDXBRA = 429;;
+let _SYSZ_INS_LDY = 430;;
+let _SYSZ_INS_LE = 431;;
+let _SYSZ_INS_LEDBR = 432;;
+let _SYSZ_INS_LEDBRA = 433;;
+let _SYSZ_INS_LER = 434;;
+let _SYSZ_INS_LEXBR = 435;;
+let _SYSZ_INS_LEXBRA = 436;;
+let _SYSZ_INS_LEY = 437;;
+let _SYSZ_INS_LFH = 438;;
+let _SYSZ_INS_LG = 439;;
+let _SYSZ_INS_LGB = 440;;
+let _SYSZ_INS_LGBR = 441;;
+let _SYSZ_INS_LGDR = 442;;
+let _SYSZ_INS_LGF = 443;;
+let _SYSZ_INS_LGFI = 444;;
+let _SYSZ_INS_LGFR = 445;;
+let _SYSZ_INS_LGFRL = 446;;
+let _SYSZ_INS_LGH = 447;;
+let _SYSZ_INS_LGHI = 448;;
+let _SYSZ_INS_LGHR = 449;;
+let _SYSZ_INS_LGHRL = 450;;
+let _SYSZ_INS_LGR = 451;;
+let _SYSZ_INS_LGRL = 452;;
+let _SYSZ_INS_LH = 453;;
+let _SYSZ_INS_LHH = 454;;
+let _SYSZ_INS_LHI = 455;;
+let _SYSZ_INS_LHR = 456;;
+let _SYSZ_INS_LHRL = 457;;
+let _SYSZ_INS_LHY = 458;;
+let _SYSZ_INS_LLC = 459;;
+let _SYSZ_INS_LLCH = 460;;
+let _SYSZ_INS_LLCR = 461;;
+let _SYSZ_INS_LLGC = 462;;
+let _SYSZ_INS_LLGCR = 463;;
+let _SYSZ_INS_LLGF = 464;;
+let _SYSZ_INS_LLGFR = 465;;
+let _SYSZ_INS_LLGFRL = 466;;
+let _SYSZ_INS_LLGH = 467;;
+let _SYSZ_INS_LLGHR = 468;;
+let _SYSZ_INS_LLGHRL = 469;;
+let _SYSZ_INS_LLH = 470;;
+let _SYSZ_INS_LLHH = 471;;
+let _SYSZ_INS_LLHR = 472;;
+let _SYSZ_INS_LLHRL = 473;;
+let _SYSZ_INS_LLIHF = 474;;
+let _SYSZ_INS_LLIHH = 475;;
+let _SYSZ_INS_LLIHL = 476;;
+let _SYSZ_INS_LLILF = 477;;
+let _SYSZ_INS_LLILH = 478;;
+let _SYSZ_INS_LLILL = 479;;
+let _SYSZ_INS_LMG = 480;;
+let _SYSZ_INS_LNDBR = 481;;
+let _SYSZ_INS_LNEBR = 482;;
+let _SYSZ_INS_LNGFR = 483;;
+let _SYSZ_INS_LNGR = 484;;
+let _SYSZ_INS_LNR = 485;;
+let _SYSZ_INS_LNXBR = 486;;
+let _SYSZ_INS_LPDBR = 487;;
+let _SYSZ_INS_LPEBR = 488;;
+let _SYSZ_INS_LPGFR = 489;;
+let _SYSZ_INS_LPGR = 490;;
+let _SYSZ_INS_LPR = 491;;
+let _SYSZ_INS_LPXBR = 492;;
+let _SYSZ_INS_LR = 493;;
+let _SYSZ_INS_LRL = 494;;
+let _SYSZ_INS_LRV = 495;;
+let _SYSZ_INS_LRVG = 496;;
+let _SYSZ_INS_LRVGR = 497;;
+let _SYSZ_INS_LRVR = 498;;
+let _SYSZ_INS_LT = 499;;
+let _SYSZ_INS_LTDBR = 500;;
+let _SYSZ_INS_LTEBR = 501;;
+let _SYSZ_INS_LTG = 502;;
+let _SYSZ_INS_LTGF = 503;;
+let _SYSZ_INS_LTGFR = 504;;
+let _SYSZ_INS_LTGR = 505;;
+let _SYSZ_INS_LTR = 506;;
+let _SYSZ_INS_LTXBR = 507;;
+let _SYSZ_INS_LXDB = 508;;
+let _SYSZ_INS_LXDBR = 509;;
+let _SYSZ_INS_LXEB = 510;;
+let _SYSZ_INS_LXEBR = 511;;
+let _SYSZ_INS_LXR = 512;;
+let _SYSZ_INS_LY = 513;;
+let _SYSZ_INS_LZDR = 514;;
+let _SYSZ_INS_LZER = 515;;
+let _SYSZ_INS_LZXR = 516;;
+let _SYSZ_INS_MADB = 517;;
+let _SYSZ_INS_MADBR = 518;;
+let _SYSZ_INS_MAEB = 519;;
+let _SYSZ_INS_MAEBR = 520;;
+let _SYSZ_INS_MDB = 521;;
+let _SYSZ_INS_MDBR = 522;;
+let _SYSZ_INS_MDEB = 523;;
+let _SYSZ_INS_MDEBR = 524;;
+let _SYSZ_INS_MEEB = 525;;
+let _SYSZ_INS_MEEBR = 526;;
+let _SYSZ_INS_MGHI = 527;;
+let _SYSZ_INS_MH = 528;;
+let _SYSZ_INS_MHI = 529;;
+let _SYSZ_INS_MHY = 530;;
+let _SYSZ_INS_MLG = 531;;
+let _SYSZ_INS_MLGR = 532;;
+let _SYSZ_INS_MS = 533;;
+let _SYSZ_INS_MSDB = 534;;
+let _SYSZ_INS_MSDBR = 535;;
+let _SYSZ_INS_MSEB = 536;;
+let _SYSZ_INS_MSEBR = 537;;
+let _SYSZ_INS_MSFI = 538;;
+let _SYSZ_INS_MSG = 539;;
+let _SYSZ_INS_MSGF = 540;;
+let _SYSZ_INS_MSGFI = 541;;
+let _SYSZ_INS_MSGFR = 542;;
+let _SYSZ_INS_MSGR = 543;;
+let _SYSZ_INS_MSR = 544;;
+let _SYSZ_INS_MSY = 545;;
+let _SYSZ_INS_MVC = 546;;
+let _SYSZ_INS_MVGHI = 547;;
+let _SYSZ_INS_MVHHI = 548;;
+let _SYSZ_INS_MVHI = 549;;
+let _SYSZ_INS_MVI = 550;;
+let _SYSZ_INS_MVIY = 551;;
+let _SYSZ_INS_MVST = 552;;
+let _SYSZ_INS_MXBR = 553;;
+let _SYSZ_INS_MXDB = 554;;
+let _SYSZ_INS_MXDBR = 555;;
+let _SYSZ_INS_N = 556;;
+let _SYSZ_INS_NC = 557;;
+let _SYSZ_INS_NG = 558;;
+let _SYSZ_INS_NGR = 559;;
+let _SYSZ_INS_NGRK = 560;;
+let _SYSZ_INS_NI = 561;;
+let _SYSZ_INS_NIHF = 562;;
+let _SYSZ_INS_NIHH = 563;;
+let _SYSZ_INS_NIHL = 564;;
+let _SYSZ_INS_NILF = 565;;
+let _SYSZ_INS_NILH = 566;;
+let _SYSZ_INS_NILL = 567;;
+let _SYSZ_INS_NIY = 568;;
+let _SYSZ_INS_NR = 569;;
+let _SYSZ_INS_NRK = 570;;
+let _SYSZ_INS_NY = 571;;
+let _SYSZ_INS_O = 572;;
+let _SYSZ_INS_OC = 573;;
+let _SYSZ_INS_OG = 574;;
+let _SYSZ_INS_OGR = 575;;
+let _SYSZ_INS_OGRK = 576;;
+let _SYSZ_INS_OI = 577;;
+let _SYSZ_INS_OIHF = 578;;
+let _SYSZ_INS_OIHH = 579;;
+let _SYSZ_INS_OIHL = 580;;
+let _SYSZ_INS_OILF = 581;;
+let _SYSZ_INS_OILH = 582;;
+let _SYSZ_INS_OILL = 583;;
+let _SYSZ_INS_OIY = 584;;
+let _SYSZ_INS_OR = 585;;
+let _SYSZ_INS_ORK = 586;;
+let _SYSZ_INS_OY = 587;;
+let _SYSZ_INS_PFD = 588;;
+let _SYSZ_INS_PFDRL = 589;;
+let _SYSZ_INS_RISBG = 590;;
+let _SYSZ_INS_RISBHG = 591;;
+let _SYSZ_INS_RISBLG = 592;;
+let _SYSZ_INS_RLL = 593;;
+let _SYSZ_INS_RLLG = 594;;
+let _SYSZ_INS_RNSBG = 595;;
+let _SYSZ_INS_ROSBG = 596;;
+let _SYSZ_INS_RXSBG = 597;;
+let _SYSZ_INS_S = 598;;
+let _SYSZ_INS_SDB = 599;;
+let _SYSZ_INS_SDBR = 600;;
+let _SYSZ_INS_SEB = 601;;
+let _SYSZ_INS_SEBR = 602;;
+let _SYSZ_INS_SG = 603;;
+let _SYSZ_INS_SGF = 604;;
+let _SYSZ_INS_SGFR = 605;;
+let _SYSZ_INS_SGR = 606;;
+let _SYSZ_INS_SGRK = 607;;
+let _SYSZ_INS_SH = 608;;
+let _SYSZ_INS_SHY = 609;;
+let _SYSZ_INS_SL = 610;;
+let _SYSZ_INS_SLB = 611;;
+let _SYSZ_INS_SLBG = 612;;
+let _SYSZ_INS_SLBR = 613;;
+let _SYSZ_INS_SLFI = 614;;
+let _SYSZ_INS_SLG = 615;;
+let _SYSZ_INS_SLBGR = 616;;
+let _SYSZ_INS_SLGF = 617;;
+let _SYSZ_INS_SLGFI = 618;;
+let _SYSZ_INS_SLGFR = 619;;
+let _SYSZ_INS_SLGR = 620;;
+let _SYSZ_INS_SLGRK = 621;;
+let _SYSZ_INS_SLL = 622;;
+let _SYSZ_INS_SLLG = 623;;
+let _SYSZ_INS_SLLK = 624;;
+let _SYSZ_INS_SLR = 625;;
+let _SYSZ_INS_SLRK = 626;;
+let _SYSZ_INS_SLY = 627;;
+let _SYSZ_INS_SQDB = 628;;
+let _SYSZ_INS_SQDBR = 629;;
+let _SYSZ_INS_SQEB = 630;;
+let _SYSZ_INS_SQEBR = 631;;
+let _SYSZ_INS_SQXBR = 632;;
+let _SYSZ_INS_SR = 633;;
+let _SYSZ_INS_SRA = 634;;
+let _SYSZ_INS_SRAG = 635;;
+let _SYSZ_INS_SRAK = 636;;
+let _SYSZ_INS_SRK = 637;;
+let _SYSZ_INS_SRL = 638;;
+let _SYSZ_INS_SRLG = 639;;
+let _SYSZ_INS_SRLK = 640;;
+let _SYSZ_INS_SRST = 641;;
+let _SYSZ_INS_ST = 642;;
+let _SYSZ_INS_STC = 643;;
+let _SYSZ_INS_STCH = 644;;
+let _SYSZ_INS_STCY = 645;;
+let _SYSZ_INS_STD = 646;;
+let _SYSZ_INS_STDY = 647;;
+let _SYSZ_INS_STE = 648;;
+let _SYSZ_INS_STEY = 649;;
+let _SYSZ_INS_STFH = 650;;
+let _SYSZ_INS_STG = 651;;
+let _SYSZ_INS_STGRL = 652;;
+let _SYSZ_INS_STH = 653;;
+let _SYSZ_INS_STHH = 654;;
+let _SYSZ_INS_STHRL = 655;;
+let _SYSZ_INS_STHY = 656;;
+let _SYSZ_INS_STMG = 657;;
+let _SYSZ_INS_STRL = 658;;
+let _SYSZ_INS_STRV = 659;;
+let _SYSZ_INS_STRVG = 660;;
+let _SYSZ_INS_STY = 661;;
+let _SYSZ_INS_SXBR = 662;;
+let _SYSZ_INS_SY = 663;;
+let _SYSZ_INS_TM = 664;;
+let _SYSZ_INS_TMHH = 665;;
+let _SYSZ_INS_TMHL = 666;;
+let _SYSZ_INS_TMLH = 667;;
+let _SYSZ_INS_TMLL = 668;;
+let _SYSZ_INS_TMY = 669;;
+let _SYSZ_INS_X = 670;;
+let _SYSZ_INS_XC = 671;;
+let _SYSZ_INS_XG = 672;;
+let _SYSZ_INS_XGR = 673;;
+let _SYSZ_INS_XGRK = 674;;
+let _SYSZ_INS_XI = 675;;
+let _SYSZ_INS_XIHF = 676;;
+let _SYSZ_INS_XILF = 677;;
+let _SYSZ_INS_XIY = 678;;
+let _SYSZ_INS_XR = 679;;
+let _SYSZ_INS_XRK = 680;;
+let _SYSZ_INS_XY = 681;;
+let _SYSZ_INS_AD = 682;;
+let _SYSZ_INS_ADR = 683;;
+let _SYSZ_INS_ADTR = 684;;
+let _SYSZ_INS_ADTRA = 685;;
+let _SYSZ_INS_AE = 686;;
+let _SYSZ_INS_AER = 687;;
+let _SYSZ_INS_AGH = 688;;
+let _SYSZ_INS_AHHHR = 689;;
+let _SYSZ_INS_AHHLR = 690;;
+let _SYSZ_INS_ALGSI = 691;;
+let _SYSZ_INS_ALHHHR = 692;;
+let _SYSZ_INS_ALHHLR = 693;;
+let _SYSZ_INS_ALSI = 694;;
+let _SYSZ_INS_ALSIH = 695;;
+let _SYSZ_INS_ALSIHN = 696;;
+let _SYSZ_INS_AP = 697;;
+let _SYSZ_INS_AU = 698;;
+let _SYSZ_INS_AUR = 699;;
+let _SYSZ_INS_AW = 700;;
+let _SYSZ_INS_AWR = 701;;
+let _SYSZ_INS_AXR = 702;;
+let _SYSZ_INS_AXTR = 703;;
+let _SYSZ_INS_AXTRA = 704;;
+let _SYSZ_INS_B = 705;;
+let _SYSZ_INS_BAKR = 706;;
+let _SYSZ_INS_BAL = 707;;
+let _SYSZ_INS_BALR = 708;;
+let _SYSZ_INS_BAS = 709;;
+let _SYSZ_INS_BASSM = 710;;
+let _SYSZ_INS_BC = 711;;
+let _SYSZ_INS_BCT = 712;;
+let _SYSZ_INS_BCTG = 713;;
+let _SYSZ_INS_BCTGR = 714;;
+let _SYSZ_INS_BCTR = 715;;
+let _SYSZ_INS_BE = 716;;
+let _SYSZ_INS_BH = 717;;
+let _SYSZ_INS_BHE = 718;;
+let _SYSZ_INS_BI = 719;;
+let _SYSZ_INS_BIC = 720;;
+let _SYSZ_INS_BIE = 721;;
+let _SYSZ_INS_BIH = 722;;
+let _SYSZ_INS_BIHE = 723;;
+let _SYSZ_INS_BIL = 724;;
+let _SYSZ_INS_BILE = 725;;
+let _SYSZ_INS_BILH = 726;;
+let _SYSZ_INS_BIM = 727;;
+let _SYSZ_INS_BINE = 728;;
+let _SYSZ_INS_BINH = 729;;
+let _SYSZ_INS_BINHE = 730;;
+let _SYSZ_INS_BINL = 731;;
+let _SYSZ_INS_BINLE = 732;;
+let _SYSZ_INS_BINLH = 733;;
+let _SYSZ_INS_BINM = 734;;
+let _SYSZ_INS_BINO = 735;;
+let _SYSZ_INS_BINP = 736;;
+let _SYSZ_INS_BINZ = 737;;
+let _SYSZ_INS_BIO = 738;;
+let _SYSZ_INS_BIP = 739;;
+let _SYSZ_INS_BIZ = 740;;
+let _SYSZ_INS_BL = 741;;
+let _SYSZ_INS_BLE = 742;;
+let _SYSZ_INS_BLH = 743;;
+let _SYSZ_INS_BM = 744;;
+let _SYSZ_INS_BMR = 745;;
+let _SYSZ_INS_BNE = 746;;
+let _SYSZ_INS_BNH = 747;;
+let _SYSZ_INS_BNHE = 748;;
+let _SYSZ_INS_BNL = 749;;
+let _SYSZ_INS_BNLE = 750;;
+let _SYSZ_INS_BNLH = 751;;
+let _SYSZ_INS_BNM = 752;;
+let _SYSZ_INS_BNMR = 753;;
+let _SYSZ_INS_BNO = 754;;
+let _SYSZ_INS_BNP = 755;;
+let _SYSZ_INS_BNPR = 756;;
+let _SYSZ_INS_BNZ = 757;;
+let _SYSZ_INS_BNZR = 758;;
+let _SYSZ_INS_BO = 759;;
+let _SYSZ_INS_BP = 760;;
+let _SYSZ_INS_BPP = 761;;
+let _SYSZ_INS_BPR = 762;;
+let _SYSZ_INS_BPRP = 763;;
+let _SYSZ_INS_BRCTH = 764;;
+let _SYSZ_INS_BRXH = 765;;
+let _SYSZ_INS_BRXHG = 766;;
+let _SYSZ_INS_BRXLE = 767;;
+let _SYSZ_INS_BRXLG = 768;;
+let _SYSZ_INS_BSA = 769;;
+let _SYSZ_INS_BSG = 770;;
+let _SYSZ_INS_BSM = 771;;
+let _SYSZ_INS_BXH = 772;;
+let _SYSZ_INS_BXHG = 773;;
+let _SYSZ_INS_BXLE = 774;;
+let _SYSZ_INS_BXLEG = 775;;
+let _SYSZ_INS_BZ = 776;;
+let _SYSZ_INS_BZR = 777;;
+let _SYSZ_INS_CD = 778;;
+let _SYSZ_INS_CDFBRA = 779;;
+let _SYSZ_INS_CDFR = 780;;
+let _SYSZ_INS_CDFTR = 781;;
+let _SYSZ_INS_CDGBRA = 782;;
+let _SYSZ_INS_CDGR = 783;;
+let _SYSZ_INS_CDGTR = 784;;
+let _SYSZ_INS_CDGTRA = 785;;
+let _SYSZ_INS_CDLFTR = 786;;
+let _SYSZ_INS_CDLGTR = 787;;
+let _SYSZ_INS_CDPT = 788;;
+let _SYSZ_INS_CDR = 789;;
+let _SYSZ_INS_CDS = 790;;
+let _SYSZ_INS_CDSG = 791;;
+let _SYSZ_INS_CDSTR = 792;;
+let _SYSZ_INS_CDSY = 793;;
+let _SYSZ_INS_CDTR = 794;;
+let _SYSZ_INS_CDUTR = 795;;
+let _SYSZ_INS_CDZT = 796;;
+let _SYSZ_INS_CE = 797;;
+let _SYSZ_INS_CEDTR = 798;;
+let _SYSZ_INS_CEFBRA = 799;;
+let _SYSZ_INS_CEFR = 800;;
+let _SYSZ_INS_CEGBRA = 801;;
+let _SYSZ_INS_CEGR = 802;;
+let _SYSZ_INS_CER = 803;;
+let _SYSZ_INS_CEXTR = 804;;
+let _SYSZ_INS_CFC = 805;;
+let _SYSZ_INS_CFDBRA = 806;;
+let _SYSZ_INS_CFDR = 807;;
+let _SYSZ_INS_CFDTR = 808;;
+let _SYSZ_INS_CFEBRA = 809;;
+let _SYSZ_INS_CFER = 810;;
+let _SYSZ_INS_CFXBRA = 811;;
+let _SYSZ_INS_CFXR = 812;;
+let _SYSZ_INS_CFXTR = 813;;
+let _SYSZ_INS_CGDBRA = 814;;
+let _SYSZ_INS_CGDR = 815;;
+let _SYSZ_INS_CGDTR = 816;;
+let _SYSZ_INS_CGDTRA = 817;;
+let _SYSZ_INS_CGEBRA = 818;;
+let _SYSZ_INS_CGER = 819;;
+let _SYSZ_INS_CGIB = 820;;
+let _SYSZ_INS_CGIBE = 821;;
+let _SYSZ_INS_CGIBH = 822;;
+let _SYSZ_INS_CGIBHE = 823;;
+let _SYSZ_INS_CGIBL = 824;;
+let _SYSZ_INS_CGIBLE = 825;;
+let _SYSZ_INS_CGIBLH = 826;;
+let _SYSZ_INS_CGIBNE = 827;;
+let _SYSZ_INS_CGIBNH = 828;;
+let _SYSZ_INS_CGIBNHE = 829;;
+let _SYSZ_INS_CGIBNL = 830;;
+let _SYSZ_INS_CGIBNLE = 831;;
+let _SYSZ_INS_CGIBNLH = 832;;
+let _SYSZ_INS_CGIT = 833;;
+let _SYSZ_INS_CGITE = 834;;
+let _SYSZ_INS_CGITH = 835;;
+let _SYSZ_INS_CGITHE = 836;;
+let _SYSZ_INS_CGITL = 837;;
+let _SYSZ_INS_CGITLE = 838;;
+let _SYSZ_INS_CGITLH = 839;;
+let _SYSZ_INS_CGITNE = 840;;
+let _SYSZ_INS_CGITNH = 841;;
+let _SYSZ_INS_CGITNHE = 842;;
+let _SYSZ_INS_CGITNL = 843;;
+let _SYSZ_INS_CGITNLE = 844;;
+let _SYSZ_INS_CGITNLH = 845;;
+let _SYSZ_INS_CGRB = 846;;
+let _SYSZ_INS_CGRBE = 847;;
+let _SYSZ_INS_CGRBH = 848;;
+let _SYSZ_INS_CGRBHE = 849;;
+let _SYSZ_INS_CGRBL = 850;;
+let _SYSZ_INS_CGRBLE = 851;;
+let _SYSZ_INS_CGRBLH = 852;;
+let _SYSZ_INS_CGRBNE = 853;;
+let _SYSZ_INS_CGRBNH = 854;;
+let _SYSZ_INS_CGRBNHE = 855;;
+let _SYSZ_INS_CGRBNL = 856;;
+let _SYSZ_INS_CGRBNLE = 857;;
+let _SYSZ_INS_CGRBNLH = 858;;
+let _SYSZ_INS_CGRT = 859;;
+let _SYSZ_INS_CGRTE = 860;;
+let _SYSZ_INS_CGRTH = 861;;
+let _SYSZ_INS_CGRTHE = 862;;
+let _SYSZ_INS_CGRTL = 863;;
+let _SYSZ_INS_CGRTLE = 864;;
+let _SYSZ_INS_CGRTLH = 865;;
+let _SYSZ_INS_CGRTNE = 866;;
+let _SYSZ_INS_CGRTNH = 867;;
+let _SYSZ_INS_CGRTNHE = 868;;
+let _SYSZ_INS_CGRTNL = 869;;
+let _SYSZ_INS_CGRTNLE = 870;;
+let _SYSZ_INS_CGRTNLH = 871;;
+let _SYSZ_INS_CGXBRA = 872;;
+let _SYSZ_INS_CGXR = 873;;
+let _SYSZ_INS_CGXTR = 874;;
+let _SYSZ_INS_CGXTRA = 875;;
+let _SYSZ_INS_CHHR = 876;;
+let _SYSZ_INS_CHLR = 877;;
+let _SYSZ_INS_CIB = 878;;
+let _SYSZ_INS_CIBE = 879;;
+let _SYSZ_INS_CIBH = 880;;
+let _SYSZ_INS_CIBHE = 881;;
+let _SYSZ_INS_CIBL = 882;;
+let _SYSZ_INS_CIBLE = 883;;
+let _SYSZ_INS_CIBLH = 884;;
+let _SYSZ_INS_CIBNE = 885;;
+let _SYSZ_INS_CIBNH = 886;;
+let _SYSZ_INS_CIBNHE = 887;;
+let _SYSZ_INS_CIBNL = 888;;
+let _SYSZ_INS_CIBNLE = 889;;
+let _SYSZ_INS_CIBNLH = 890;;
+let _SYSZ_INS_CIT = 891;;
+let _SYSZ_INS_CITE = 892;;
+let _SYSZ_INS_CITH = 893;;
+let _SYSZ_INS_CITHE = 894;;
+let _SYSZ_INS_CITL = 895;;
+let _SYSZ_INS_CITLE = 896;;
+let _SYSZ_INS_CITLH = 897;;
+let _SYSZ_INS_CITNE = 898;;
+let _SYSZ_INS_CITNH = 899;;
+let _SYSZ_INS_CITNHE = 900;;
+let _SYSZ_INS_CITNL = 901;;
+let _SYSZ_INS_CITNLE = 902;;
+let _SYSZ_INS_CITNLH = 903;;
+let _SYSZ_INS_CKSM = 904;;
+let _SYSZ_INS_CLCL = 905;;
+let _SYSZ_INS_CLCLE = 906;;
+let _SYSZ_INS_CLCLU = 907;;
+let _SYSZ_INS_CLFDTR = 908;;
+let _SYSZ_INS_CLFIT = 909;;
+let _SYSZ_INS_CLFITE = 910;;
+let _SYSZ_INS_CLFITH = 911;;
+let _SYSZ_INS_CLFITHE = 912;;
+let _SYSZ_INS_CLFITL = 913;;
+let _SYSZ_INS_CLFITLE = 914;;
+let _SYSZ_INS_CLFITLH = 915;;
+let _SYSZ_INS_CLFITNE = 916;;
+let _SYSZ_INS_CLFITNH = 917;;
+let _SYSZ_INS_CLFITNHE = 918;;
+let _SYSZ_INS_CLFITNL = 919;;
+let _SYSZ_INS_CLFITNLE = 920;;
+let _SYSZ_INS_CLFITNLH = 921;;
+let _SYSZ_INS_CLFXTR = 922;;
+let _SYSZ_INS_CLGDTR = 923;;
+let _SYSZ_INS_CLGIB = 924;;
+let _SYSZ_INS_CLGIBE = 925;;
+let _SYSZ_INS_CLGIBH = 926;;
+let _SYSZ_INS_CLGIBHE = 927;;
+let _SYSZ_INS_CLGIBL = 928;;
+let _SYSZ_INS_CLGIBLE = 929;;
+let _SYSZ_INS_CLGIBLH = 930;;
+let _SYSZ_INS_CLGIBNE = 931;;
+let _SYSZ_INS_CLGIBNH = 932;;
+let _SYSZ_INS_CLGIBNHE = 933;;
+let _SYSZ_INS_CLGIBNL = 934;;
+let _SYSZ_INS_CLGIBNLE = 935;;
+let _SYSZ_INS_CLGIBNLH = 936;;
+let _SYSZ_INS_CLGIT = 937;;
+let _SYSZ_INS_CLGITE = 938;;
+let _SYSZ_INS_CLGITH = 939;;
+let _SYSZ_INS_CLGITHE = 940;;
+let _SYSZ_INS_CLGITL = 941;;
+let _SYSZ_INS_CLGITLE = 942;;
+let _SYSZ_INS_CLGITLH = 943;;
+let _SYSZ_INS_CLGITNE = 944;;
+let _SYSZ_INS_CLGITNH = 945;;
+let _SYSZ_INS_CLGITNHE = 946;;
+let _SYSZ_INS_CLGITNL = 947;;
+let _SYSZ_INS_CLGITNLE = 948;;
+let _SYSZ_INS_CLGITNLH = 949;;
+let _SYSZ_INS_CLGRB = 950;;
+let _SYSZ_INS_CLGRBE = 951;;
+let _SYSZ_INS_CLGRBH = 952;;
+let _SYSZ_INS_CLGRBHE = 953;;
+let _SYSZ_INS_CLGRBL = 954;;
+let _SYSZ_INS_CLGRBLE = 955;;
+let _SYSZ_INS_CLGRBLH = 956;;
+let _SYSZ_INS_CLGRBNE = 957;;
+let _SYSZ_INS_CLGRBNH = 958;;
+let _SYSZ_INS_CLGRBNHE = 959;;
+let _SYSZ_INS_CLGRBNL = 960;;
+let _SYSZ_INS_CLGRBNLE = 961;;
+let _SYSZ_INS_CLGRBNLH = 962;;
+let _SYSZ_INS_CLGRT = 963;;
+let _SYSZ_INS_CLGRTE = 964;;
+let _SYSZ_INS_CLGRTH = 965;;
+let _SYSZ_INS_CLGRTHE = 966;;
+let _SYSZ_INS_CLGRTL = 967;;
+let _SYSZ_INS_CLGRTLE = 968;;
+let _SYSZ_INS_CLGRTLH = 969;;
+let _SYSZ_INS_CLGRTNE = 970;;
+let _SYSZ_INS_CLGRTNH = 971;;
+let _SYSZ_INS_CLGRTNHE = 972;;
+let _SYSZ_INS_CLGRTNL = 973;;
+let _SYSZ_INS_CLGRTNLE = 974;;
+let _SYSZ_INS_CLGRTNLH = 975;;
+let _SYSZ_INS_CLGT = 976;;
+let _SYSZ_INS_CLGTE = 977;;
+let _SYSZ_INS_CLGTH = 978;;
+let _SYSZ_INS_CLGTHE = 979;;
+let _SYSZ_INS_CLGTL = 980;;
+let _SYSZ_INS_CLGTLE = 981;;
+let _SYSZ_INS_CLGTLH = 982;;
+let _SYSZ_INS_CLGTNE = 983;;
+let _SYSZ_INS_CLGTNH = 984;;
+let _SYSZ_INS_CLGTNHE = 985;;
+let _SYSZ_INS_CLGTNL = 986;;
+let _SYSZ_INS_CLGTNLE = 987;;
+let _SYSZ_INS_CLGTNLH = 988;;
+let _SYSZ_INS_CLGXTR = 989;;
+let _SYSZ_INS_CLHHR = 990;;
+let _SYSZ_INS_CLHLR = 991;;
+let _SYSZ_INS_CLIB = 992;;
+let _SYSZ_INS_CLIBE = 993;;
+let _SYSZ_INS_CLIBH = 994;;
+let _SYSZ_INS_CLIBHE = 995;;
+let _SYSZ_INS_CLIBL = 996;;
+let _SYSZ_INS_CLIBLE = 997;;
+let _SYSZ_INS_CLIBLH = 998;;
+let _SYSZ_INS_CLIBNE = 999;;
+let _SYSZ_INS_CLIBNH = 1000;;
+let _SYSZ_INS_CLIBNHE = 1001;;
+let _SYSZ_INS_CLIBNL = 1002;;
+let _SYSZ_INS_CLIBNLE = 1003;;
+let _SYSZ_INS_CLIBNLH = 1004;;
+let _SYSZ_INS_CLM = 1005;;
+let _SYSZ_INS_CLMH = 1006;;
+let _SYSZ_INS_CLMY = 1007;;
+let _SYSZ_INS_CLRB = 1008;;
+let _SYSZ_INS_CLRBE = 1009;;
+let _SYSZ_INS_CLRBH = 1010;;
+let _SYSZ_INS_CLRBHE = 1011;;
+let _SYSZ_INS_CLRBL = 1012;;
+let _SYSZ_INS_CLRBLE = 1013;;
+let _SYSZ_INS_CLRBLH = 1014;;
+let _SYSZ_INS_CLRBNE = 1015;;
+let _SYSZ_INS_CLRBNH = 1016;;
+let _SYSZ_INS_CLRBNHE = 1017;;
+let _SYSZ_INS_CLRBNL = 1018;;
+let _SYSZ_INS_CLRBNLE = 1019;;
+let _SYSZ_INS_CLRBNLH = 1020;;
+let _SYSZ_INS_CLRT = 1021;;
+let _SYSZ_INS_CLRTE = 1022;;
+let _SYSZ_INS_CLRTH = 1023;;
+let _SYSZ_INS_CLRTHE = 1024;;
+let _SYSZ_INS_CLRTL = 1025;;
+let _SYSZ_INS_CLRTLE = 1026;;
+let _SYSZ_INS_CLRTLH = 1027;;
+let _SYSZ_INS_CLRTNE = 1028;;
+let _SYSZ_INS_CLRTNH = 1029;;
+let _SYSZ_INS_CLRTNHE = 1030;;
+let _SYSZ_INS_CLRTNL = 1031;;
+let _SYSZ_INS_CLRTNLE = 1032;;
+let _SYSZ_INS_CLRTNLH = 1033;;
+let _SYSZ_INS_CLT = 1034;;
+let _SYSZ_INS_CLTE = 1035;;
+let _SYSZ_INS_CLTH = 1036;;
+let _SYSZ_INS_CLTHE = 1037;;
+let _SYSZ_INS_CLTL = 1038;;
+let _SYSZ_INS_CLTLE = 1039;;
+let _SYSZ_INS_CLTLH = 1040;;
+let _SYSZ_INS_CLTNE = 1041;;
+let _SYSZ_INS_CLTNH = 1042;;
+let _SYSZ_INS_CLTNHE = 1043;;
+let _SYSZ_INS_CLTNL = 1044;;
+let _SYSZ_INS_CLTNLE = 1045;;
+let _SYSZ_INS_CLTNLH = 1046;;
+let _SYSZ_INS_CMPSC = 1047;;
+let _SYSZ_INS_CP = 1048;;
+let _SYSZ_INS_CPDT = 1049;;
+let _SYSZ_INS_CPXT = 1050;;
+let _SYSZ_INS_CPYA = 1051;;
+let _SYSZ_INS_CRB = 1052;;
+let _SYSZ_INS_CRBE = 1053;;
+let _SYSZ_INS_CRBH = 1054;;
+let _SYSZ_INS_CRBHE = 1055;;
+let _SYSZ_INS_CRBL = 1056;;
+let _SYSZ_INS_CRBLE = 1057;;
+let _SYSZ_INS_CRBLH = 1058;;
+let _SYSZ_INS_CRBNE = 1059;;
+let _SYSZ_INS_CRBNH = 1060;;
+let _SYSZ_INS_CRBNHE = 1061;;
+let _SYSZ_INS_CRBNL = 1062;;
+let _SYSZ_INS_CRBNLE = 1063;;
+let _SYSZ_INS_CRBNLH = 1064;;
+let _SYSZ_INS_CRDTE = 1065;;
+let _SYSZ_INS_CRT = 1066;;
+let _SYSZ_INS_CRTE = 1067;;
+let _SYSZ_INS_CRTH = 1068;;
+let _SYSZ_INS_CRTHE = 1069;;
+let _SYSZ_INS_CRTL = 1070;;
+let _SYSZ_INS_CRTLE = 1071;;
+let _SYSZ_INS_CRTLH = 1072;;
+let _SYSZ_INS_CRTNE = 1073;;
+let _SYSZ_INS_CRTNH = 1074;;
+let _SYSZ_INS_CRTNHE = 1075;;
+let _SYSZ_INS_CRTNL = 1076;;
+let _SYSZ_INS_CRTNLE = 1077;;
+let _SYSZ_INS_CRTNLH = 1078;;
+let _SYSZ_INS_CSCH = 1079;;
+let _SYSZ_INS_CSDTR = 1080;;
+let _SYSZ_INS_CSP = 1081;;
+let _SYSZ_INS_CSPG = 1082;;
+let _SYSZ_INS_CSST = 1083;;
+let _SYSZ_INS_CSXTR = 1084;;
+let _SYSZ_INS_CU12 = 1085;;
+let _SYSZ_INS_CU14 = 1086;;
+let _SYSZ_INS_CU21 = 1087;;
+let _SYSZ_INS_CU24 = 1088;;
+let _SYSZ_INS_CU41 = 1089;;
+let _SYSZ_INS_CU42 = 1090;;
+let _SYSZ_INS_CUDTR = 1091;;
+let _SYSZ_INS_CUSE = 1092;;
+let _SYSZ_INS_CUTFU = 1093;;
+let _SYSZ_INS_CUUTF = 1094;;
+let _SYSZ_INS_CUXTR = 1095;;
+let _SYSZ_INS_CVB = 1096;;
+let _SYSZ_INS_CVBG = 1097;;
+let _SYSZ_INS_CVBY = 1098;;
+let _SYSZ_INS_CVD = 1099;;
+let _SYSZ_INS_CVDG = 1100;;
+let _SYSZ_INS_CVDY = 1101;;
+let _SYSZ_INS_CXFBRA = 1102;;
+let _SYSZ_INS_CXFR = 1103;;
+let _SYSZ_INS_CXFTR = 1104;;
+let _SYSZ_INS_CXGBRA = 1105;;
+let _SYSZ_INS_CXGR = 1106;;
+let _SYSZ_INS_CXGTR = 1107;;
+let _SYSZ_INS_CXGTRA = 1108;;
+let _SYSZ_INS_CXLFTR = 1109;;
+let _SYSZ_INS_CXLGTR = 1110;;
+let _SYSZ_INS_CXPT = 1111;;
+let _SYSZ_INS_CXR = 1112;;
+let _SYSZ_INS_CXSTR = 1113;;
+let _SYSZ_INS_CXTR = 1114;;
+let _SYSZ_INS_CXUTR = 1115;;
+let _SYSZ_INS_CXZT = 1116;;
+let _SYSZ_INS_CZDT = 1117;;
+let _SYSZ_INS_CZXT = 1118;;
+let _SYSZ_INS_D = 1119;;
+let _SYSZ_INS_DD = 1120;;
+let _SYSZ_INS_DDR = 1121;;
+let _SYSZ_INS_DDTR = 1122;;
+let _SYSZ_INS_DDTRA = 1123;;
+let _SYSZ_INS_DE = 1124;;
+let _SYSZ_INS_DER = 1125;;
+let _SYSZ_INS_DIAG = 1126;;
+let _SYSZ_INS_DIDBR = 1127;;
+let _SYSZ_INS_DIEBR = 1128;;
+let _SYSZ_INS_DP = 1129;;
+let _SYSZ_INS_DR = 1130;;
+let _SYSZ_INS_DXR = 1131;;
+let _SYSZ_INS_DXTR = 1132;;
+let _SYSZ_INS_DXTRA = 1133;;
+let _SYSZ_INS_ECAG = 1134;;
+let _SYSZ_INS_ECCTR = 1135;;
+let _SYSZ_INS_ECPGA = 1136;;
+let _SYSZ_INS_ECTG = 1137;;
+let _SYSZ_INS_ED = 1138;;
+let _SYSZ_INS_EDMK = 1139;;
+let _SYSZ_INS_EEDTR = 1140;;
+let _SYSZ_INS_EEXTR = 1141;;
+let _SYSZ_INS_EFPC = 1142;;
+let _SYSZ_INS_EPAIR = 1143;;
+let _SYSZ_INS_EPAR = 1144;;
+let _SYSZ_INS_EPCTR = 1145;;
+let _SYSZ_INS_EPSW = 1146;;
+let _SYSZ_INS_EREG = 1147;;
+let _SYSZ_INS_EREGG = 1148;;
+let _SYSZ_INS_ESAIR = 1149;;
+let _SYSZ_INS_ESAR = 1150;;
+let _SYSZ_INS_ESDTR = 1151;;
+let _SYSZ_INS_ESEA = 1152;;
+let _SYSZ_INS_ESTA = 1153;;
+let _SYSZ_INS_ESXTR = 1154;;
+let _SYSZ_INS_ETND = 1155;;
+let _SYSZ_INS_EX = 1156;;
+let _SYSZ_INS_EXRL = 1157;;
+let _SYSZ_INS_FIDR = 1158;;
+let _SYSZ_INS_FIDTR = 1159;;
+let _SYSZ_INS_FIER = 1160;;
+let _SYSZ_INS_FIXR = 1161;;
+let _SYSZ_INS_FIXTR = 1162;;
+let _SYSZ_INS_HDR = 1163;;
+let _SYSZ_INS_HER = 1164;;
+let _SYSZ_INS_HSCH = 1165;;
+let _SYSZ_INS_IAC = 1166;;
+let _SYSZ_INS_ICM = 1167;;
+let _SYSZ_INS_ICMH = 1168;;
+let _SYSZ_INS_ICMY = 1169;;
+let _SYSZ_INS_IDTE = 1170;;
+let _SYSZ_INS_IEDTR = 1171;;
+let _SYSZ_INS_IEXTR = 1172;;
+let _SYSZ_INS_IPK = 1173;;
+let _SYSZ_INS_IPTE = 1174;;
+let _SYSZ_INS_IRBM = 1175;;
+let _SYSZ_INS_ISKE = 1176;;
+let _SYSZ_INS_IVSK = 1177;;
+let _SYSZ_INS_JGM = 1178;;
+let _SYSZ_INS_JGNM = 1179;;
+let _SYSZ_INS_JGNP = 1180;;
+let _SYSZ_INS_JGNZ = 1181;;
+let _SYSZ_INS_JGP = 1182;;
+let _SYSZ_INS_JGZ = 1183;;
+let _SYSZ_INS_JM = 1184;;
+let _SYSZ_INS_JNM = 1185;;
+let _SYSZ_INS_JNP = 1186;;
+let _SYSZ_INS_JNZ = 1187;;
+let _SYSZ_INS_JP = 1188;;
+let _SYSZ_INS_JZ = 1189;;
+let _SYSZ_INS_KDB = 1190;;
+let _SYSZ_INS_KDBR = 1191;;
+let _SYSZ_INS_KDTR = 1192;;
+let _SYSZ_INS_KEB = 1193;;
+let _SYSZ_INS_KEBR = 1194;;
+let _SYSZ_INS_KIMD = 1195;;
+let _SYSZ_INS_KLMD = 1196;;
+let _SYSZ_INS_KM = 1197;;
+let _SYSZ_INS_KMA = 1198;;
+let _SYSZ_INS_KMAC = 1199;;
+let _SYSZ_INS_KMC = 1200;;
+let _SYSZ_INS_KMCTR = 1201;;
+let _SYSZ_INS_KMF = 1202;;
+let _SYSZ_INS_KMO = 1203;;
+let _SYSZ_INS_KXBR = 1204;;
+let _SYSZ_INS_KXTR = 1205;;
+let _SYSZ_INS_LAE = 1206;;
+let _SYSZ_INS_LAEY = 1207;;
+let _SYSZ_INS_LAM = 1208;;
+let _SYSZ_INS_LAMY = 1209;;
+let _SYSZ_INS_LASP = 1210;;
+let _SYSZ_INS_LAT = 1211;;
+let _SYSZ_INS_LCBB = 1212;;
+let _SYSZ_INS_LCCTL = 1213;;
+let _SYSZ_INS_LCDFR = 1214;;
+let _SYSZ_INS_LCDR = 1215;;
+let _SYSZ_INS_LCER = 1216;;
+let _SYSZ_INS_LCTL = 1217;;
+let _SYSZ_INS_LCTLG = 1218;;
+let _SYSZ_INS_LCXR = 1219;;
+let _SYSZ_INS_LDE = 1220;;
+let _SYSZ_INS_LDER = 1221;;
+let _SYSZ_INS_LDETR = 1222;;
+let _SYSZ_INS_LDXR = 1223;;
+let _SYSZ_INS_LDXTR = 1224;;
+let _SYSZ_INS_LEDR = 1225;;
+let _SYSZ_INS_LEDTR = 1226;;
+let _SYSZ_INS_LEXR = 1227;;
+let _SYSZ_INS_LFAS = 1228;;
+let _SYSZ_INS_LFHAT = 1229;;
+let _SYSZ_INS_LFPC = 1230;;
+let _SYSZ_INS_LGAT = 1231;;
+let _SYSZ_INS_LGG = 1232;;
+let _SYSZ_INS_LGSC = 1233;;
+let _SYSZ_INS_LLGFAT = 1234;;
+let _SYSZ_INS_LLGFSG = 1235;;
+let _SYSZ_INS_LLGT = 1236;;
+let _SYSZ_INS_LLGTAT = 1237;;
+let _SYSZ_INS_LLGTR = 1238;;
+let _SYSZ_INS_LLZRGF = 1239;;
+let _SYSZ_INS_LM = 1240;;
+let _SYSZ_INS_LMD = 1241;;
+let _SYSZ_INS_LMH = 1242;;
+let _SYSZ_INS_LMY = 1243;;
+let _SYSZ_INS_LNDFR = 1244;;
+let _SYSZ_INS_LNDR = 1245;;
+let _SYSZ_INS_LNER = 1246;;
+let _SYSZ_INS_LNXR = 1247;;
+let _SYSZ_INS_LOCFH = 1248;;
+let _SYSZ_INS_LOCFHE = 1249;;
+let _SYSZ_INS_LOCFHH = 1250;;
+let _SYSZ_INS_LOCFHHE = 1251;;
+let _SYSZ_INS_LOCFHL = 1252;;
+let _SYSZ_INS_LOCFHLE = 1253;;
+let _SYSZ_INS_LOCFHLH = 1254;;
+let _SYSZ_INS_LOCFHM = 1255;;
+let _SYSZ_INS_LOCFHNE = 1256;;
+let _SYSZ_INS_LOCFHNH = 1257;;
+let _SYSZ_INS_LOCFHNHE = 1258;;
+let _SYSZ_INS_LOCFHNL = 1259;;
+let _SYSZ_INS_LOCFHNLE = 1260;;
+let _SYSZ_INS_LOCFHNLH = 1261;;
+let _SYSZ_INS_LOCFHNM = 1262;;
+let _SYSZ_INS_LOCFHNO = 1263;;
+let _SYSZ_INS_LOCFHNP = 1264;;
+let _SYSZ_INS_LOCFHNZ = 1265;;
+let _SYSZ_INS_LOCFHO = 1266;;
+let _SYSZ_INS_LOCFHP = 1267;;
+let _SYSZ_INS_LOCFHR = 1268;;
+let _SYSZ_INS_LOCFHRE = 1269;;
+let _SYSZ_INS_LOCFHRH = 1270;;
+let _SYSZ_INS_LOCFHRHE = 1271;;
+let _SYSZ_INS_LOCFHRL = 1272;;
+let _SYSZ_INS_LOCFHRLE = 1273;;
+let _SYSZ_INS_LOCFHRLH = 1274;;
+let _SYSZ_INS_LOCFHRM = 1275;;
+let _SYSZ_INS_LOCFHRNE = 1276;;
+let _SYSZ_INS_LOCFHRNH = 1277;;
+let _SYSZ_INS_LOCFHRNHE = 1278;;
+let _SYSZ_INS_LOCFHRNL = 1279;;
+let _SYSZ_INS_LOCFHRNLE = 1280;;
+let _SYSZ_INS_LOCFHRNLH = 1281;;
+let _SYSZ_INS_LOCFHRNM = 1282;;
+let _SYSZ_INS_LOCFHRNO = 1283;;
+let _SYSZ_INS_LOCFHRNP = 1284;;
+let _SYSZ_INS_LOCFHRNZ = 1285;;
+let _SYSZ_INS_LOCFHRO = 1286;;
+let _SYSZ_INS_LOCFHRP = 1287;;
+let _SYSZ_INS_LOCFHRZ = 1288;;
+let _SYSZ_INS_LOCFHZ = 1289;;
+let _SYSZ_INS_LOCGHI = 1290;;
+let _SYSZ_INS_LOCGHIE = 1291;;
+let _SYSZ_INS_LOCGHIH = 1292;;
+let _SYSZ_INS_LOCGHIHE = 1293;;
+let _SYSZ_INS_LOCGHIL = 1294;;
+let _SYSZ_INS_LOCGHILE = 1295;;
+let _SYSZ_INS_LOCGHILH = 1296;;
+let _SYSZ_INS_LOCGHIM = 1297;;
+let _SYSZ_INS_LOCGHINE = 1298;;
+let _SYSZ_INS_LOCGHINH = 1299;;
+let _SYSZ_INS_LOCGHINHE = 1300;;
+let _SYSZ_INS_LOCGHINL = 1301;;
+let _SYSZ_INS_LOCGHINLE = 1302;;
+let _SYSZ_INS_LOCGHINLH = 1303;;
+let _SYSZ_INS_LOCGHINM = 1304;;
+let _SYSZ_INS_LOCGHINO = 1305;;
+let _SYSZ_INS_LOCGHINP = 1306;;
+let _SYSZ_INS_LOCGHINZ = 1307;;
+let _SYSZ_INS_LOCGHIO = 1308;;
+let _SYSZ_INS_LOCGHIP = 1309;;
+let _SYSZ_INS_LOCGHIZ = 1310;;
+let _SYSZ_INS_LOCGM = 1311;;
+let _SYSZ_INS_LOCGNM = 1312;;
+let _SYSZ_INS_LOCGNP = 1313;;
+let _SYSZ_INS_LOCGNZ = 1314;;
+let _SYSZ_INS_LOCGP = 1315;;
+let _SYSZ_INS_LOCGRM = 1316;;
+let _SYSZ_INS_LOCGRNM = 1317;;
+let _SYSZ_INS_LOCGRNP = 1318;;
+let _SYSZ_INS_LOCGRNZ = 1319;;
+let _SYSZ_INS_LOCGRP = 1320;;
+let _SYSZ_INS_LOCGRZ = 1321;;
+let _SYSZ_INS_LOCGZ = 1322;;
+let _SYSZ_INS_LOCHHI = 1323;;
+let _SYSZ_INS_LOCHHIE = 1324;;
+let _SYSZ_INS_LOCHHIH = 1325;;
+let _SYSZ_INS_LOCHHIHE = 1326;;
+let _SYSZ_INS_LOCHHIL = 1327;;
+let _SYSZ_INS_LOCHHILE = 1328;;
+let _SYSZ_INS_LOCHHILH = 1329;;
+let _SYSZ_INS_LOCHHIM = 1330;;
+let _SYSZ_INS_LOCHHINE = 1331;;
+let _SYSZ_INS_LOCHHINH = 1332;;
+let _SYSZ_INS_LOCHHINHE = 1333;;
+let _SYSZ_INS_LOCHHINL = 1334;;
+let _SYSZ_INS_LOCHHINLE = 1335;;
+let _SYSZ_INS_LOCHHINLH = 1336;;
+let _SYSZ_INS_LOCHHINM = 1337;;
+let _SYSZ_INS_LOCHHINO = 1338;;
+let _SYSZ_INS_LOCHHINP = 1339;;
+let _SYSZ_INS_LOCHHINZ = 1340;;
+let _SYSZ_INS_LOCHHIO = 1341;;
+let _SYSZ_INS_LOCHHIP = 1342;;
+let _SYSZ_INS_LOCHHIZ = 1343;;
+let _SYSZ_INS_LOCHI = 1344;;
+let _SYSZ_INS_LOCHIE = 1345;;
+let _SYSZ_INS_LOCHIH = 1346;;
+let _SYSZ_INS_LOCHIHE = 1347;;
+let _SYSZ_INS_LOCHIL = 1348;;
+let _SYSZ_INS_LOCHILE = 1349;;
+let _SYSZ_INS_LOCHILH = 1350;;
+let _SYSZ_INS_LOCHIM = 1351;;
+let _SYSZ_INS_LOCHINE = 1352;;
+let _SYSZ_INS_LOCHINH = 1353;;
+let _SYSZ_INS_LOCHINHE = 1354;;
+let _SYSZ_INS_LOCHINL = 1355;;
+let _SYSZ_INS_LOCHINLE = 1356;;
+let _SYSZ_INS_LOCHINLH = 1357;;
+let _SYSZ_INS_LOCHINM = 1358;;
+let _SYSZ_INS_LOCHINO = 1359;;
+let _SYSZ_INS_LOCHINP = 1360;;
+let _SYSZ_INS_LOCHINZ = 1361;;
+let _SYSZ_INS_LOCHIO = 1362;;
+let _SYSZ_INS_LOCHIP = 1363;;
+let _SYSZ_INS_LOCHIZ = 1364;;
+let _SYSZ_INS_LOCM = 1365;;
+let _SYSZ_INS_LOCNM = 1366;;
+let _SYSZ_INS_LOCNP = 1367;;
+let _SYSZ_INS_LOCNZ = 1368;;
+let _SYSZ_INS_LOCP = 1369;;
+let _SYSZ_INS_LOCRM = 1370;;
+let _SYSZ_INS_LOCRNM = 1371;;
+let _SYSZ_INS_LOCRNP = 1372;;
+let _SYSZ_INS_LOCRNZ = 1373;;
+let _SYSZ_INS_LOCRP = 1374;;
+let _SYSZ_INS_LOCRZ = 1375;;
+let _SYSZ_INS_LOCZ = 1376;;
+let _SYSZ_INS_LPCTL = 1377;;
+let _SYSZ_INS_LPD = 1378;;
+let _SYSZ_INS_LPDFR = 1379;;
+let _SYSZ_INS_LPDG = 1380;;
+let _SYSZ_INS_LPDR = 1381;;
+let _SYSZ_INS_LPER = 1382;;
+let _SYSZ_INS_LPP = 1383;;
+let _SYSZ_INS_LPQ = 1384;;
+let _SYSZ_INS_LPSW = 1385;;
+let _SYSZ_INS_LPSWE = 1386;;
+let _SYSZ_INS_LPTEA = 1387;;
+let _SYSZ_INS_LPXR = 1388;;
+let _SYSZ_INS_LRA = 1389;;
+let _SYSZ_INS_LRAG = 1390;;
+let _SYSZ_INS_LRAY = 1391;;
+let _SYSZ_INS_LRDR = 1392;;
+let _SYSZ_INS_LRER = 1393;;
+let _SYSZ_INS_LRVH = 1394;;
+let _SYSZ_INS_LSCTL = 1395;;
+let _SYSZ_INS_LTDR = 1396;;
+let _SYSZ_INS_LTDTR = 1397;;
+let _SYSZ_INS_LTER = 1398;;
+let _SYSZ_INS_LTXR = 1399;;
+let _SYSZ_INS_LTXTR = 1400;;
+let _SYSZ_INS_LURA = 1401;;
+let _SYSZ_INS_LURAG = 1402;;
+let _SYSZ_INS_LXD = 1403;;
+let _SYSZ_INS_LXDR = 1404;;
+let _SYSZ_INS_LXDTR = 1405;;
+let _SYSZ_INS_LXE = 1406;;
+let _SYSZ_INS_LXER = 1407;;
+let _SYSZ_INS_LZRF = 1408;;
+let _SYSZ_INS_LZRG = 1409;;
+let _SYSZ_INS_M = 1410;;
+let _SYSZ_INS_MAD = 1411;;
+let _SYSZ_INS_MADR = 1412;;
+let _SYSZ_INS_MAE = 1413;;
+let _SYSZ_INS_MAER = 1414;;
+let _SYSZ_INS_MAY = 1415;;
+let _SYSZ_INS_MAYH = 1416;;
+let _SYSZ_INS_MAYHR = 1417;;
+let _SYSZ_INS_MAYL = 1418;;
+let _SYSZ_INS_MAYLR = 1419;;
+let _SYSZ_INS_MAYR = 1420;;
+let _SYSZ_INS_MC = 1421;;
+let _SYSZ_INS_MD = 1422;;
+let _SYSZ_INS_MDE = 1423;;
+let _SYSZ_INS_MDER = 1424;;
+let _SYSZ_INS_MDR = 1425;;
+let _SYSZ_INS_MDTR = 1426;;
+let _SYSZ_INS_MDTRA = 1427;;
+let _SYSZ_INS_ME = 1428;;
+let _SYSZ_INS_MEE = 1429;;
+let _SYSZ_INS_MEER = 1430;;
+let _SYSZ_INS_MER = 1431;;
+let _SYSZ_INS_MFY = 1432;;
+let _SYSZ_INS_MG = 1433;;
+let _SYSZ_INS_MGH = 1434;;
+let _SYSZ_INS_MGRK = 1435;;
+let _SYSZ_INS_ML = 1436;;
+let _SYSZ_INS_MLR = 1437;;
+let _SYSZ_INS_MP = 1438;;
+let _SYSZ_INS_MR = 1439;;
+let _SYSZ_INS_MSC = 1440;;
+let _SYSZ_INS_MSCH = 1441;;
+let _SYSZ_INS_MSD = 1442;;
+let _SYSZ_INS_MSDR = 1443;;
+let _SYSZ_INS_MSE = 1444;;
+let _SYSZ_INS_MSER = 1445;;
+let _SYSZ_INS_MSGC = 1446;;
+let _SYSZ_INS_MSGRKC = 1447;;
+let _SYSZ_INS_MSRKC = 1448;;
+let _SYSZ_INS_MSTA = 1449;;
+let _SYSZ_INS_MVCDK = 1450;;
+let _SYSZ_INS_MVCIN = 1451;;
+let _SYSZ_INS_MVCK = 1452;;
+let _SYSZ_INS_MVCL = 1453;;
+let _SYSZ_INS_MVCLE = 1454;;
+let _SYSZ_INS_MVCLU = 1455;;
+let _SYSZ_INS_MVCOS = 1456;;
+let _SYSZ_INS_MVCP = 1457;;
+let _SYSZ_INS_MVCS = 1458;;
+let _SYSZ_INS_MVCSK = 1459;;
+let _SYSZ_INS_MVN = 1460;;
+let _SYSZ_INS_MVO = 1461;;
+let _SYSZ_INS_MVPG = 1462;;
+let _SYSZ_INS_MVZ = 1463;;
+let _SYSZ_INS_MXD = 1464;;
+let _SYSZ_INS_MXDR = 1465;;
+let _SYSZ_INS_MXR = 1466;;
+let _SYSZ_INS_MXTR = 1467;;
+let _SYSZ_INS_MXTRA = 1468;;
+let _SYSZ_INS_MY = 1469;;
+let _SYSZ_INS_MYH = 1470;;
+let _SYSZ_INS_MYHR = 1471;;
+let _SYSZ_INS_MYL = 1472;;
+let _SYSZ_INS_MYLR = 1473;;
+let _SYSZ_INS_MYR = 1474;;
+let _SYSZ_INS_NIAI = 1475;;
+let _SYSZ_INS_NTSTG = 1476;;
+let _SYSZ_INS_PACK = 1477;;
+let _SYSZ_INS_PALB = 1478;;
+let _SYSZ_INS_PC = 1479;;
+let _SYSZ_INS_PCC = 1480;;
+let _SYSZ_INS_PCKMO = 1481;;
+let _SYSZ_INS_PFMF = 1482;;
+let _SYSZ_INS_PFPO = 1483;;
+let _SYSZ_INS_PGIN = 1484;;
+let _SYSZ_INS_PGOUT = 1485;;
+let _SYSZ_INS_PKA = 1486;;
+let _SYSZ_INS_PKU = 1487;;
+let _SYSZ_INS_PLO = 1488;;
+let _SYSZ_INS_POPCNT = 1489;;
+let _SYSZ_INS_PPA = 1490;;
+let _SYSZ_INS_PPNO = 1491;;
+let _SYSZ_INS_PR = 1492;;
+let _SYSZ_INS_PRNO = 1493;;
+let _SYSZ_INS_PT = 1494;;
+let _SYSZ_INS_PTF = 1495;;
+let _SYSZ_INS_PTFF = 1496;;
+let _SYSZ_INS_PTI = 1497;;
+let _SYSZ_INS_PTLB = 1498;;
+let _SYSZ_INS_QADTR = 1499;;
+let _SYSZ_INS_QAXTR = 1500;;
+let _SYSZ_INS_QCTRI = 1501;;
+let _SYSZ_INS_QSI = 1502;;
+let _SYSZ_INS_RCHP = 1503;;
+let _SYSZ_INS_RISBGN = 1504;;
+let _SYSZ_INS_RP = 1505;;
+let _SYSZ_INS_RRBE = 1506;;
+let _SYSZ_INS_RRBM = 1507;;
+let _SYSZ_INS_RRDTR = 1508;;
+let _SYSZ_INS_RRXTR = 1509;;
+let _SYSZ_INS_RSCH = 1510;;
+let _SYSZ_INS_SAC = 1511;;
+let _SYSZ_INS_SACF = 1512;;
+let _SYSZ_INS_SAL = 1513;;
+let _SYSZ_INS_SAM24 = 1514;;
+let _SYSZ_INS_SAM31 = 1515;;
+let _SYSZ_INS_SAM64 = 1516;;
+let _SYSZ_INS_SAR = 1517;;
+let _SYSZ_INS_SCCTR = 1518;;
+let _SYSZ_INS_SCHM = 1519;;
+let _SYSZ_INS_SCK = 1520;;
+let _SYSZ_INS_SCKC = 1521;;
+let _SYSZ_INS_SCKPF = 1522;;
+let _SYSZ_INS_SD = 1523;;
+let _SYSZ_INS_SDR = 1524;;
+let _SYSZ_INS_SDTR = 1525;;
+let _SYSZ_INS_SDTRA = 1526;;
+let _SYSZ_INS_SE = 1527;;
+let _SYSZ_INS_SER = 1528;;
+let _SYSZ_INS_SFASR = 1529;;
+let _SYSZ_INS_SFPC = 1530;;
+let _SYSZ_INS_SGH = 1531;;
+let _SYSZ_INS_SHHHR = 1532;;
+let _SYSZ_INS_SHHLR = 1533;;
+let _SYSZ_INS_SIE = 1534;;
+let _SYSZ_INS_SIGA = 1535;;
+let _SYSZ_INS_SIGP = 1536;;
+let _SYSZ_INS_SLA = 1537;;
+let _SYSZ_INS_SLAG = 1538;;
+let _SYSZ_INS_SLAK = 1539;;
+let _SYSZ_INS_SLDA = 1540;;
+let _SYSZ_INS_SLDL = 1541;;
+let _SYSZ_INS_SLDT = 1542;;
+let _SYSZ_INS_SLHHHR = 1543;;
+let _SYSZ_INS_SLHHLR = 1544;;
+let _SYSZ_INS_SLXT = 1545;;
+let _SYSZ_INS_SP = 1546;;
+let _SYSZ_INS_SPCTR = 1547;;
+let _SYSZ_INS_SPKA = 1548;;
+let _SYSZ_INS_SPM = 1549;;
+let _SYSZ_INS_SPT = 1550;;
+let _SYSZ_INS_SPX = 1551;;
+let _SYSZ_INS_SQD = 1552;;
+let _SYSZ_INS_SQDR = 1553;;
+let _SYSZ_INS_SQE = 1554;;
+let _SYSZ_INS_SQER = 1555;;
+let _SYSZ_INS_SQXR = 1556;;
+let _SYSZ_INS_SRDA = 1557;;
+let _SYSZ_INS_SRDL = 1558;;
+let _SYSZ_INS_SRDT = 1559;;
+let _SYSZ_INS_SRNM = 1560;;
+let _SYSZ_INS_SRNMB = 1561;;
+let _SYSZ_INS_SRNMT = 1562;;
+let _SYSZ_INS_SRP = 1563;;
+let _SYSZ_INS_SRSTU = 1564;;
+let _SYSZ_INS_SRXT = 1565;;
+let _SYSZ_INS_SSAIR = 1566;;
+let _SYSZ_INS_SSAR = 1567;;
+let _SYSZ_INS_SSCH = 1568;;
+let _SYSZ_INS_SSKE = 1569;;
+let _SYSZ_INS_SSM = 1570;;
+let _SYSZ_INS_STAM = 1571;;
+let _SYSZ_INS_STAMY = 1572;;
+let _SYSZ_INS_STAP = 1573;;
+let _SYSZ_INS_STCK = 1574;;
+let _SYSZ_INS_STCKC = 1575;;
+let _SYSZ_INS_STCKE = 1576;;
+let _SYSZ_INS_STCKF = 1577;;
+let _SYSZ_INS_STCM = 1578;;
+let _SYSZ_INS_STCMH = 1579;;
+let _SYSZ_INS_STCMY = 1580;;
+let _SYSZ_INS_STCPS = 1581;;
+let _SYSZ_INS_STCRW = 1582;;
+let _SYSZ_INS_STCTG = 1583;;
+let _SYSZ_INS_STCTL = 1584;;
+let _SYSZ_INS_STFL = 1585;;
+let _SYSZ_INS_STFLE = 1586;;
+let _SYSZ_INS_STFPC = 1587;;
+let _SYSZ_INS_STGSC = 1588;;
+let _SYSZ_INS_STIDP = 1589;;
+let _SYSZ_INS_STM = 1590;;
+let _SYSZ_INS_STMH = 1591;;
+let _SYSZ_INS_STMY = 1592;;
+let _SYSZ_INS_STNSM = 1593;;
+let _SYSZ_INS_STOCFH = 1594;;
+let _SYSZ_INS_STOCFHE = 1595;;
+let _SYSZ_INS_STOCFHH = 1596;;
+let _SYSZ_INS_STOCFHHE = 1597;;
+let _SYSZ_INS_STOCFHL = 1598;;
+let _SYSZ_INS_STOCFHLE = 1599;;
+let _SYSZ_INS_STOCFHLH = 1600;;
+let _SYSZ_INS_STOCFHM = 1601;;
+let _SYSZ_INS_STOCFHNE = 1602;;
+let _SYSZ_INS_STOCFHNH = 1603;;
+let _SYSZ_INS_STOCFHNHE = 1604;;
+let _SYSZ_INS_STOCFHNL = 1605;;
+let _SYSZ_INS_STOCFHNLE = 1606;;
+let _SYSZ_INS_STOCFHNLH = 1607;;
+let _SYSZ_INS_STOCFHNM = 1608;;
+let _SYSZ_INS_STOCFHNO = 1609;;
+let _SYSZ_INS_STOCFHNP = 1610;;
+let _SYSZ_INS_STOCFHNZ = 1611;;
+let _SYSZ_INS_STOCFHO = 1612;;
+let _SYSZ_INS_STOCFHP = 1613;;
+let _SYSZ_INS_STOCFHZ = 1614;;
+let _SYSZ_INS_STOCGM = 1615;;
+let _SYSZ_INS_STOCGNM = 1616;;
+let _SYSZ_INS_STOCGNP = 1617;;
+let _SYSZ_INS_STOCGNZ = 1618;;
+let _SYSZ_INS_STOCGP = 1619;;
+let _SYSZ_INS_STOCGZ = 1620;;
+let _SYSZ_INS_STOCM = 1621;;
+let _SYSZ_INS_STOCNM = 1622;;
+let _SYSZ_INS_STOCNP = 1623;;
+let _SYSZ_INS_STOCNZ = 1624;;
+let _SYSZ_INS_STOCP = 1625;;
+let _SYSZ_INS_STOCZ = 1626;;
+let _SYSZ_INS_STOSM = 1627;;
+let _SYSZ_INS_STPQ = 1628;;
+let _SYSZ_INS_STPT = 1629;;
+let _SYSZ_INS_STPX = 1630;;
+let _SYSZ_INS_STRAG = 1631;;
+let _SYSZ_INS_STRVH = 1632;;
+let _SYSZ_INS_STSCH = 1633;;
+let _SYSZ_INS_STSI = 1634;;
+let _SYSZ_INS_STURA = 1635;;
+let _SYSZ_INS_STURG = 1636;;
+let _SYSZ_INS_SU = 1637;;
+let _SYSZ_INS_SUR = 1638;;
+let _SYSZ_INS_SVC = 1639;;
+let _SYSZ_INS_SW = 1640;;
+let _SYSZ_INS_SWR = 1641;;
+let _SYSZ_INS_SXR = 1642;;
+let _SYSZ_INS_SXTR = 1643;;
+let _SYSZ_INS_SXTRA = 1644;;
+let _SYSZ_INS_TABORT = 1645;;
+let _SYSZ_INS_TAM = 1646;;
+let _SYSZ_INS_TAR = 1647;;
+let _SYSZ_INS_TB = 1648;;
+let _SYSZ_INS_TBDR = 1649;;
+let _SYSZ_INS_TBEDR = 1650;;
+let _SYSZ_INS_TBEGIN = 1651;;
+let _SYSZ_INS_TBEGINC = 1652;;
+let _SYSZ_INS_TCDB = 1653;;
+let _SYSZ_INS_TCEB = 1654;;
+let _SYSZ_INS_TCXB = 1655;;
+let _SYSZ_INS_TDCDT = 1656;;
+let _SYSZ_INS_TDCET = 1657;;
+let _SYSZ_INS_TDCXT = 1658;;
+let _SYSZ_INS_TDGDT = 1659;;
+let _SYSZ_INS_TDGET = 1660;;
+let _SYSZ_INS_TDGXT = 1661;;
+let _SYSZ_INS_TEND = 1662;;
+let _SYSZ_INS_THDER = 1663;;
+let _SYSZ_INS_THDR = 1664;;
+let _SYSZ_INS_TP = 1665;;
+let _SYSZ_INS_TPI = 1666;;
+let _SYSZ_INS_TPROT = 1667;;
+let _SYSZ_INS_TR = 1668;;
+let _SYSZ_INS_TRACE = 1669;;
+let _SYSZ_INS_TRACG = 1670;;
+let _SYSZ_INS_TRAP2 = 1671;;
+let _SYSZ_INS_TRAP4 = 1672;;
+let _SYSZ_INS_TRE = 1673;;
+let _SYSZ_INS_TROO = 1674;;
+let _SYSZ_INS_TROT = 1675;;
+let _SYSZ_INS_TRT = 1676;;
+let _SYSZ_INS_TRTE = 1677;;
+let _SYSZ_INS_TRTO = 1678;;
+let _SYSZ_INS_TRTR = 1679;;
+let _SYSZ_INS_TRTRE = 1680;;
+let _SYSZ_INS_TRTT = 1681;;
+let _SYSZ_INS_TS = 1682;;
+let _SYSZ_INS_TSCH = 1683;;
+let _SYSZ_INS_UNPK = 1684;;
+let _SYSZ_INS_UNPKA = 1685;;
+let _SYSZ_INS_UNPKU = 1686;;
+let _SYSZ_INS_UPT = 1687;;
+let _SYSZ_INS_VA = 1688;;
+let _SYSZ_INS_VAB = 1689;;
+let _SYSZ_INS_VAC = 1690;;
+let _SYSZ_INS_VACC = 1691;;
+let _SYSZ_INS_VACCB = 1692;;
+let _SYSZ_INS_VACCC = 1693;;
+let _SYSZ_INS_VACCCQ = 1694;;
+let _SYSZ_INS_VACCF = 1695;;
+let _SYSZ_INS_VACCG = 1696;;
+let _SYSZ_INS_VACCH = 1697;;
+let _SYSZ_INS_VACCQ = 1698;;
+let _SYSZ_INS_VACQ = 1699;;
+let _SYSZ_INS_VAF = 1700;;
+let _SYSZ_INS_VAG = 1701;;
+let _SYSZ_INS_VAH = 1702;;
+let _SYSZ_INS_VAP = 1703;;
+let _SYSZ_INS_VAQ = 1704;;
+let _SYSZ_INS_VAVG = 1705;;
+let _SYSZ_INS_VAVGB = 1706;;
+let _SYSZ_INS_VAVGF = 1707;;
+let _SYSZ_INS_VAVGG = 1708;;
+let _SYSZ_INS_VAVGH = 1709;;
+let _SYSZ_INS_VAVGL = 1710;;
+let _SYSZ_INS_VAVGLB = 1711;;
+let _SYSZ_INS_VAVGLF = 1712;;
+let _SYSZ_INS_VAVGLG = 1713;;
+let _SYSZ_INS_VAVGLH = 1714;;
+let _SYSZ_INS_VBPERM = 1715;;
+let _SYSZ_INS_VCDG = 1716;;
+let _SYSZ_INS_VCDGB = 1717;;
+let _SYSZ_INS_VCDLG = 1718;;
+let _SYSZ_INS_VCDLGB = 1719;;
+let _SYSZ_INS_VCEQ = 1720;;
+let _SYSZ_INS_VCEQB = 1721;;
+let _SYSZ_INS_VCEQBS = 1722;;
+let _SYSZ_INS_VCEQF = 1723;;
+let _SYSZ_INS_VCEQFS = 1724;;
+let _SYSZ_INS_VCEQG = 1725;;
+let _SYSZ_INS_VCEQGS = 1726;;
+let _SYSZ_INS_VCEQH = 1727;;
+let _SYSZ_INS_VCEQHS = 1728;;
+let _SYSZ_INS_VCGD = 1729;;
+let _SYSZ_INS_VCGDB = 1730;;
+let _SYSZ_INS_VCH = 1731;;
+let _SYSZ_INS_VCHB = 1732;;
+let _SYSZ_INS_VCHBS = 1733;;
+let _SYSZ_INS_VCHF = 1734;;
+let _SYSZ_INS_VCHFS = 1735;;
+let _SYSZ_INS_VCHG = 1736;;
+let _SYSZ_INS_VCHGS = 1737;;
+let _SYSZ_INS_VCHH = 1738;;
+let _SYSZ_INS_VCHHS = 1739;;
+let _SYSZ_INS_VCHL = 1740;;
+let _SYSZ_INS_VCHLB = 1741;;
+let _SYSZ_INS_VCHLBS = 1742;;
+let _SYSZ_INS_VCHLF = 1743;;
+let _SYSZ_INS_VCHLFS = 1744;;
+let _SYSZ_INS_VCHLG = 1745;;
+let _SYSZ_INS_VCHLGS = 1746;;
+let _SYSZ_INS_VCHLH = 1747;;
+let _SYSZ_INS_VCHLHS = 1748;;
+let _SYSZ_INS_VCKSM = 1749;;
+let _SYSZ_INS_VCLGD = 1750;;
+let _SYSZ_INS_VCLGDB = 1751;;
+let _SYSZ_INS_VCLZ = 1752;;
+let _SYSZ_INS_VCLZB = 1753;;
+let _SYSZ_INS_VCLZF = 1754;;
+let _SYSZ_INS_VCLZG = 1755;;
+let _SYSZ_INS_VCLZH = 1756;;
+let _SYSZ_INS_VCP = 1757;;
+let _SYSZ_INS_VCTZ = 1758;;
+let _SYSZ_INS_VCTZB = 1759;;
+let _SYSZ_INS_VCTZF = 1760;;
+let _SYSZ_INS_VCTZG = 1761;;
+let _SYSZ_INS_VCTZH = 1762;;
+let _SYSZ_INS_VCVB = 1763;;
+let _SYSZ_INS_VCVBG = 1764;;
+let _SYSZ_INS_VCVD = 1765;;
+let _SYSZ_INS_VCVDG = 1766;;
+let _SYSZ_INS_VDP = 1767;;
+let _SYSZ_INS_VEC = 1768;;
+let _SYSZ_INS_VECB = 1769;;
+let _SYSZ_INS_VECF = 1770;;
+let _SYSZ_INS_VECG = 1771;;
+let _SYSZ_INS_VECH = 1772;;
+let _SYSZ_INS_VECL = 1773;;
+let _SYSZ_INS_VECLB = 1774;;
+let _SYSZ_INS_VECLF = 1775;;
+let _SYSZ_INS_VECLG = 1776;;
+let _SYSZ_INS_VECLH = 1777;;
+let _SYSZ_INS_VERIM = 1778;;
+let _SYSZ_INS_VERIMB = 1779;;
+let _SYSZ_INS_VERIMF = 1780;;
+let _SYSZ_INS_VERIMG = 1781;;
+let _SYSZ_INS_VERIMH = 1782;;
+let _SYSZ_INS_VERLL = 1783;;
+let _SYSZ_INS_VERLLB = 1784;;
+let _SYSZ_INS_VERLLF = 1785;;
+let _SYSZ_INS_VERLLG = 1786;;
+let _SYSZ_INS_VERLLH = 1787;;
+let _SYSZ_INS_VERLLV = 1788;;
+let _SYSZ_INS_VERLLVB = 1789;;
+let _SYSZ_INS_VERLLVF = 1790;;
+let _SYSZ_INS_VERLLVG = 1791;;
+let _SYSZ_INS_VERLLVH = 1792;;
+let _SYSZ_INS_VESL = 1793;;
+let _SYSZ_INS_VESLB = 1794;;
+let _SYSZ_INS_VESLF = 1795;;
+let _SYSZ_INS_VESLG = 1796;;
+let _SYSZ_INS_VESLH = 1797;;
+let _SYSZ_INS_VESLV = 1798;;
+let _SYSZ_INS_VESLVB = 1799;;
+let _SYSZ_INS_VESLVF = 1800;;
+let _SYSZ_INS_VESLVG = 1801;;
+let _SYSZ_INS_VESLVH = 1802;;
+let _SYSZ_INS_VESRA = 1803;;
+let _SYSZ_INS_VESRAB = 1804;;
+let _SYSZ_INS_VESRAF = 1805;;
+let _SYSZ_INS_VESRAG = 1806;;
+let _SYSZ_INS_VESRAH = 1807;;
+let _SYSZ_INS_VESRAV = 1808;;
+let _SYSZ_INS_VESRAVB = 1809;;
+let _SYSZ_INS_VESRAVF = 1810;;
+let _SYSZ_INS_VESRAVG = 1811;;
+let _SYSZ_INS_VESRAVH = 1812;;
+let _SYSZ_INS_VESRL = 1813;;
+let _SYSZ_INS_VESRLB = 1814;;
+let _SYSZ_INS_VESRLF = 1815;;
+let _SYSZ_INS_VESRLG = 1816;;
+let _SYSZ_INS_VESRLH = 1817;;
+let _SYSZ_INS_VESRLV = 1818;;
+let _SYSZ_INS_VESRLVB = 1819;;
+let _SYSZ_INS_VESRLVF = 1820;;
+let _SYSZ_INS_VESRLVG = 1821;;
+let _SYSZ_INS_VESRLVH = 1822;;
+let _SYSZ_INS_VFA = 1823;;
+let _SYSZ_INS_VFADB = 1824;;
+let _SYSZ_INS_VFAE = 1825;;
+let _SYSZ_INS_VFAEB = 1826;;
+let _SYSZ_INS_VFAEBS = 1827;;
+let _SYSZ_INS_VFAEF = 1828;;
+let _SYSZ_INS_VFAEFS = 1829;;
+let _SYSZ_INS_VFAEH = 1830;;
+let _SYSZ_INS_VFAEHS = 1831;;
+let _SYSZ_INS_VFAEZB = 1832;;
+let _SYSZ_INS_VFAEZBS = 1833;;
+let _SYSZ_INS_VFAEZF = 1834;;
+let _SYSZ_INS_VFAEZFS = 1835;;
+let _SYSZ_INS_VFAEZH = 1836;;
+let _SYSZ_INS_VFAEZHS = 1837;;
+let _SYSZ_INS_VFASB = 1838;;
+let _SYSZ_INS_VFCE = 1839;;
+let _SYSZ_INS_VFCEDB = 1840;;
+let _SYSZ_INS_VFCEDBS = 1841;;
+let _SYSZ_INS_VFCESB = 1842;;
+let _SYSZ_INS_VFCESBS = 1843;;
+let _SYSZ_INS_VFCH = 1844;;
+let _SYSZ_INS_VFCHDB = 1845;;
+let _SYSZ_INS_VFCHDBS = 1846;;
+let _SYSZ_INS_VFCHE = 1847;;
+let _SYSZ_INS_VFCHEDB = 1848;;
+let _SYSZ_INS_VFCHEDBS = 1849;;
+let _SYSZ_INS_VFCHESB = 1850;;
+let _SYSZ_INS_VFCHESBS = 1851;;
+let _SYSZ_INS_VFCHSB = 1852;;
+let _SYSZ_INS_VFCHSBS = 1853;;
+let _SYSZ_INS_VFD = 1854;;
+let _SYSZ_INS_VFDDB = 1855;;
+let _SYSZ_INS_VFDSB = 1856;;
+let _SYSZ_INS_VFEE = 1857;;
+let _SYSZ_INS_VFEEB = 1858;;
+let _SYSZ_INS_VFEEBS = 1859;;
+let _SYSZ_INS_VFEEF = 1860;;
+let _SYSZ_INS_VFEEFS = 1861;;
+let _SYSZ_INS_VFEEH = 1862;;
+let _SYSZ_INS_VFEEHS = 1863;;
+let _SYSZ_INS_VFEEZB = 1864;;
+let _SYSZ_INS_VFEEZBS = 1865;;
+let _SYSZ_INS_VFEEZF = 1866;;
+let _SYSZ_INS_VFEEZFS = 1867;;
+let _SYSZ_INS_VFEEZH = 1868;;
+let _SYSZ_INS_VFEEZHS = 1869;;
+let _SYSZ_INS_VFENE = 1870;;
+let _SYSZ_INS_VFENEB = 1871;;
+let _SYSZ_INS_VFENEBS = 1872;;
+let _SYSZ_INS_VFENEF = 1873;;
+let _SYSZ_INS_VFENEFS = 1874;;
+let _SYSZ_INS_VFENEH = 1875;;
+let _SYSZ_INS_VFENEHS = 1876;;
+let _SYSZ_INS_VFENEZB = 1877;;
+let _SYSZ_INS_VFENEZBS = 1878;;
+let _SYSZ_INS_VFENEZF = 1879;;
+let _SYSZ_INS_VFENEZFS = 1880;;
+let _SYSZ_INS_VFENEZH = 1881;;
+let _SYSZ_INS_VFENEZHS = 1882;;
+let _SYSZ_INS_VFI = 1883;;
+let _SYSZ_INS_VFIDB = 1884;;
+let _SYSZ_INS_VFISB = 1885;;
+let _SYSZ_INS_VFKEDB = 1886;;
+let _SYSZ_INS_VFKEDBS = 1887;;
+let _SYSZ_INS_VFKESB = 1888;;
+let _SYSZ_INS_VFKESBS = 1889;;
+let _SYSZ_INS_VFKHDB = 1890;;
+let _SYSZ_INS_VFKHDBS = 1891;;
+let _SYSZ_INS_VFKHEDB = 1892;;
+let _SYSZ_INS_VFKHEDBS = 1893;;
+let _SYSZ_INS_VFKHESB = 1894;;
+let _SYSZ_INS_VFKHESBS = 1895;;
+let _SYSZ_INS_VFKHSB = 1896;;
+let _SYSZ_INS_VFKHSBS = 1897;;
+let _SYSZ_INS_VFLCDB = 1898;;
+let _SYSZ_INS_VFLCSB = 1899;;
+let _SYSZ_INS_VFLL = 1900;;
+let _SYSZ_INS_VFLLS = 1901;;
+let _SYSZ_INS_VFLNDB = 1902;;
+let _SYSZ_INS_VFLNSB = 1903;;
+let _SYSZ_INS_VFLPDB = 1904;;
+let _SYSZ_INS_VFLPSB = 1905;;
+let _SYSZ_INS_VFLR = 1906;;
+let _SYSZ_INS_VFLRD = 1907;;
+let _SYSZ_INS_VFM = 1908;;
+let _SYSZ_INS_VFMA = 1909;;
+let _SYSZ_INS_VFMADB = 1910;;
+let _SYSZ_INS_VFMASB = 1911;;
+let _SYSZ_INS_VFMAX = 1912;;
+let _SYSZ_INS_VFMAXDB = 1913;;
+let _SYSZ_INS_VFMAXSB = 1914;;
+let _SYSZ_INS_VFMDB = 1915;;
+let _SYSZ_INS_VFMIN = 1916;;
+let _SYSZ_INS_VFMINDB = 1917;;
+let _SYSZ_INS_VFMINSB = 1918;;
+let _SYSZ_INS_VFMS = 1919;;
+let _SYSZ_INS_VFMSB = 1920;;
+let _SYSZ_INS_VFMSDB = 1921;;
+let _SYSZ_INS_VFMSSB = 1922;;
+let _SYSZ_INS_VFNMA = 1923;;
+let _SYSZ_INS_VFNMADB = 1924;;
+let _SYSZ_INS_VFNMASB = 1925;;
+let _SYSZ_INS_VFNMS = 1926;;
+let _SYSZ_INS_VFNMSDB = 1927;;
+let _SYSZ_INS_VFNMSSB = 1928;;
+let _SYSZ_INS_VFPSO = 1929;;
+let _SYSZ_INS_VFPSODB = 1930;;
+let _SYSZ_INS_VFPSOSB = 1931;;
+let _SYSZ_INS_VFS = 1932;;
+let _SYSZ_INS_VFSDB = 1933;;
+let _SYSZ_INS_VFSQ = 1934;;
+let _SYSZ_INS_VFSQDB = 1935;;
+let _SYSZ_INS_VFSQSB = 1936;;
+let _SYSZ_INS_VFSSB = 1937;;
+let _SYSZ_INS_VFTCI = 1938;;
+let _SYSZ_INS_VFTCIDB = 1939;;
+let _SYSZ_INS_VFTCISB = 1940;;
+let _SYSZ_INS_VGBM = 1941;;
+let _SYSZ_INS_VGEF = 1942;;
+let _SYSZ_INS_VGEG = 1943;;
+let _SYSZ_INS_VGFM = 1944;;
+let _SYSZ_INS_VGFMA = 1945;;
+let _SYSZ_INS_VGFMAB = 1946;;
+let _SYSZ_INS_VGFMAF = 1947;;
+let _SYSZ_INS_VGFMAG = 1948;;
+let _SYSZ_INS_VGFMAH = 1949;;
+let _SYSZ_INS_VGFMB = 1950;;
+let _SYSZ_INS_VGFMF = 1951;;
+let _SYSZ_INS_VGFMG = 1952;;
+let _SYSZ_INS_VGFMH = 1953;;
+let _SYSZ_INS_VGM = 1954;;
+let _SYSZ_INS_VGMB = 1955;;
+let _SYSZ_INS_VGMF = 1956;;
+let _SYSZ_INS_VGMG = 1957;;
+let _SYSZ_INS_VGMH = 1958;;
+let _SYSZ_INS_VISTR = 1959;;
+let _SYSZ_INS_VISTRB = 1960;;
+let _SYSZ_INS_VISTRBS = 1961;;
+let _SYSZ_INS_VISTRF = 1962;;
+let _SYSZ_INS_VISTRFS = 1963;;
+let _SYSZ_INS_VISTRH = 1964;;
+let _SYSZ_INS_VISTRHS = 1965;;
+let _SYSZ_INS_VL = 1966;;
+let _SYSZ_INS_VLBB = 1967;;
+let _SYSZ_INS_VLC = 1968;;
+let _SYSZ_INS_VLCB = 1969;;
+let _SYSZ_INS_VLCF = 1970;;
+let _SYSZ_INS_VLCG = 1971;;
+let _SYSZ_INS_VLCH = 1972;;
+let _SYSZ_INS_VLDE = 1973;;
+let _SYSZ_INS_VLDEB = 1974;;
+let _SYSZ_INS_VLEB = 1975;;
+let _SYSZ_INS_VLED = 1976;;
+let _SYSZ_INS_VLEDB = 1977;;
+let _SYSZ_INS_VLEF = 1978;;
+let _SYSZ_INS_VLEG = 1979;;
+let _SYSZ_INS_VLEH = 1980;;
+let _SYSZ_INS_VLEIB = 1981;;
+let _SYSZ_INS_VLEIF = 1982;;
+let _SYSZ_INS_VLEIG = 1983;;
+let _SYSZ_INS_VLEIH = 1984;;
+let _SYSZ_INS_VLGV = 1985;;
+let _SYSZ_INS_VLGVB = 1986;;
+let _SYSZ_INS_VLGVF = 1987;;
+let _SYSZ_INS_VLGVG = 1988;;
+let _SYSZ_INS_VLGVH = 1989;;
+let _SYSZ_INS_VLIP = 1990;;
+let _SYSZ_INS_VLL = 1991;;
+let _SYSZ_INS_VLLEZ = 1992;;
+let _SYSZ_INS_VLLEZB = 1993;;
+let _SYSZ_INS_VLLEZF = 1994;;
+let _SYSZ_INS_VLLEZG = 1995;;
+let _SYSZ_INS_VLLEZH = 1996;;
+let _SYSZ_INS_VLLEZLF = 1997;;
+let _SYSZ_INS_VLM = 1998;;
+let _SYSZ_INS_VLP = 1999;;
+let _SYSZ_INS_VLPB = 2000;;
+let _SYSZ_INS_VLPF = 2001;;
+let _SYSZ_INS_VLPG = 2002;;
+let _SYSZ_INS_VLPH = 2003;;
+let _SYSZ_INS_VLR = 2004;;
+let _SYSZ_INS_VLREP = 2005;;
+let _SYSZ_INS_VLREPB = 2006;;
+let _SYSZ_INS_VLREPF = 2007;;
+let _SYSZ_INS_VLREPG = 2008;;
+let _SYSZ_INS_VLREPH = 2009;;
+let _SYSZ_INS_VLRL = 2010;;
+let _SYSZ_INS_VLRLR = 2011;;
+let _SYSZ_INS_VLVG = 2012;;
+let _SYSZ_INS_VLVGB = 2013;;
+let _SYSZ_INS_VLVGF = 2014;;
+let _SYSZ_INS_VLVGG = 2015;;
+let _SYSZ_INS_VLVGH = 2016;;
+let _SYSZ_INS_VLVGP = 2017;;
+let _SYSZ_INS_VMAE = 2018;;
+let _SYSZ_INS_VMAEB = 2019;;
+let _SYSZ_INS_VMAEF = 2020;;
+let _SYSZ_INS_VMAEH = 2021;;
+let _SYSZ_INS_VMAH = 2022;;
+let _SYSZ_INS_VMAHB = 2023;;
+let _SYSZ_INS_VMAHF = 2024;;
+let _SYSZ_INS_VMAHH = 2025;;
+let _SYSZ_INS_VMAL = 2026;;
+let _SYSZ_INS_VMALB = 2027;;
+let _SYSZ_INS_VMALE = 2028;;
+let _SYSZ_INS_VMALEB = 2029;;
+let _SYSZ_INS_VMALEF = 2030;;
+let _SYSZ_INS_VMALEH = 2031;;
+let _SYSZ_INS_VMALF = 2032;;
+let _SYSZ_INS_VMALH = 2033;;
+let _SYSZ_INS_VMALHB = 2034;;
+let _SYSZ_INS_VMALHF = 2035;;
+let _SYSZ_INS_VMALHH = 2036;;
+let _SYSZ_INS_VMALHW = 2037;;
+let _SYSZ_INS_VMALO = 2038;;
+let _SYSZ_INS_VMALOB = 2039;;
+let _SYSZ_INS_VMALOF = 2040;;
+let _SYSZ_INS_VMALOH = 2041;;
+let _SYSZ_INS_VMAO = 2042;;
+let _SYSZ_INS_VMAOB = 2043;;
+let _SYSZ_INS_VMAOF = 2044;;
+let _SYSZ_INS_VMAOH = 2045;;
+let _SYSZ_INS_VME = 2046;;
+let _SYSZ_INS_VMEB = 2047;;
+let _SYSZ_INS_VMEF = 2048;;
+let _SYSZ_INS_VMEH = 2049;;
+let _SYSZ_INS_VMH = 2050;;
+let _SYSZ_INS_VMHB = 2051;;
+let _SYSZ_INS_VMHF = 2052;;
+let _SYSZ_INS_VMHH = 2053;;
+let _SYSZ_INS_VML = 2054;;
+let _SYSZ_INS_VMLB = 2055;;
+let _SYSZ_INS_VMLE = 2056;;
+let _SYSZ_INS_VMLEB = 2057;;
+let _SYSZ_INS_VMLEF = 2058;;
+let _SYSZ_INS_VMLEH = 2059;;
+let _SYSZ_INS_VMLF = 2060;;
+let _SYSZ_INS_VMLH = 2061;;
+let _SYSZ_INS_VMLHB = 2062;;
+let _SYSZ_INS_VMLHF = 2063;;
+let _SYSZ_INS_VMLHH = 2064;;
+let _SYSZ_INS_VMLHW = 2065;;
+let _SYSZ_INS_VMLO = 2066;;
+let _SYSZ_INS_VMLOB = 2067;;
+let _SYSZ_INS_VMLOF = 2068;;
+let _SYSZ_INS_VMLOH = 2069;;
+let _SYSZ_INS_VMN = 2070;;
+let _SYSZ_INS_VMNB = 2071;;
+let _SYSZ_INS_VMNF = 2072;;
+let _SYSZ_INS_VMNG = 2073;;
+let _SYSZ_INS_VMNH = 2074;;
+let _SYSZ_INS_VMNL = 2075;;
+let _SYSZ_INS_VMNLB = 2076;;
+let _SYSZ_INS_VMNLF = 2077;;
+let _SYSZ_INS_VMNLG = 2078;;
+let _SYSZ_INS_VMNLH = 2079;;
+let _SYSZ_INS_VMO = 2080;;
+let _SYSZ_INS_VMOB = 2081;;
+let _SYSZ_INS_VMOF = 2082;;
+let _SYSZ_INS_VMOH = 2083;;
+let _SYSZ_INS_VMP = 2084;;
+let _SYSZ_INS_VMRH = 2085;;
+let _SYSZ_INS_VMRHB = 2086;;
+let _SYSZ_INS_VMRHF = 2087;;
+let _SYSZ_INS_VMRHG = 2088;;
+let _SYSZ_INS_VMRHH = 2089;;
+let _SYSZ_INS_VMRL = 2090;;
+let _SYSZ_INS_VMRLB = 2091;;
+let _SYSZ_INS_VMRLF = 2092;;
+let _SYSZ_INS_VMRLG = 2093;;
+let _SYSZ_INS_VMRLH = 2094;;
+let _SYSZ_INS_VMSL = 2095;;
+let _SYSZ_INS_VMSLG = 2096;;
+let _SYSZ_INS_VMSP = 2097;;
+let _SYSZ_INS_VMX = 2098;;
+let _SYSZ_INS_VMXB = 2099;;
+let _SYSZ_INS_VMXF = 2100;;
+let _SYSZ_INS_VMXG = 2101;;
+let _SYSZ_INS_VMXH = 2102;;
+let _SYSZ_INS_VMXL = 2103;;
+let _SYSZ_INS_VMXLB = 2104;;
+let _SYSZ_INS_VMXLF = 2105;;
+let _SYSZ_INS_VMXLG = 2106;;
+let _SYSZ_INS_VMXLH = 2107;;
+let _SYSZ_INS_VN = 2108;;
+let _SYSZ_INS_VNC = 2109;;
+let _SYSZ_INS_VNN = 2110;;
+let _SYSZ_INS_VNO = 2111;;
+let _SYSZ_INS_VNX = 2112;;
+let _SYSZ_INS_VO = 2113;;
+let _SYSZ_INS_VOC = 2114;;
+let _SYSZ_INS_VONE = 2115;;
+let _SYSZ_INS_VPDI = 2116;;
+let _SYSZ_INS_VPERM = 2117;;
+let _SYSZ_INS_VPK = 2118;;
+let _SYSZ_INS_VPKF = 2119;;
+let _SYSZ_INS_VPKG = 2120;;
+let _SYSZ_INS_VPKH = 2121;;
+let _SYSZ_INS_VPKLS = 2122;;
+let _SYSZ_INS_VPKLSF = 2123;;
+let _SYSZ_INS_VPKLSFS = 2124;;
+let _SYSZ_INS_VPKLSG = 2125;;
+let _SYSZ_INS_VPKLSGS = 2126;;
+let _SYSZ_INS_VPKLSH = 2127;;
+let _SYSZ_INS_VPKLSHS = 2128;;
+let _SYSZ_INS_VPKS = 2129;;
+let _SYSZ_INS_VPKSF = 2130;;
+let _SYSZ_INS_VPKSFS = 2131;;
+let _SYSZ_INS_VPKSG = 2132;;
+let _SYSZ_INS_VPKSGS = 2133;;
+let _SYSZ_INS_VPKSH = 2134;;
+let _SYSZ_INS_VPKSHS = 2135;;
+let _SYSZ_INS_VPKZ = 2136;;
+let _SYSZ_INS_VPOPCT = 2137;;
+let _SYSZ_INS_VPOPCTB = 2138;;
+let _SYSZ_INS_VPOPCTF = 2139;;
+let _SYSZ_INS_VPOPCTG = 2140;;
+let _SYSZ_INS_VPOPCTH = 2141;;
+let _SYSZ_INS_VPSOP = 2142;;
+let _SYSZ_INS_VREP = 2143;;
+let _SYSZ_INS_VREPB = 2144;;
+let _SYSZ_INS_VREPF = 2145;;
+let _SYSZ_INS_VREPG = 2146;;
+let _SYSZ_INS_VREPH = 2147;;
+let _SYSZ_INS_VREPI = 2148;;
+let _SYSZ_INS_VREPIB = 2149;;
+let _SYSZ_INS_VREPIF = 2150;;
+let _SYSZ_INS_VREPIG = 2151;;
+let _SYSZ_INS_VREPIH = 2152;;
+let _SYSZ_INS_VRP = 2153;;
+let _SYSZ_INS_VS = 2154;;
+let _SYSZ_INS_VSB = 2155;;
+let _SYSZ_INS_VSBCBI = 2156;;
+let _SYSZ_INS_VSBCBIQ = 2157;;
+let _SYSZ_INS_VSBI = 2158;;
+let _SYSZ_INS_VSBIQ = 2159;;
+let _SYSZ_INS_VSCBI = 2160;;
+let _SYSZ_INS_VSCBIB = 2161;;
+let _SYSZ_INS_VSCBIF = 2162;;
+let _SYSZ_INS_VSCBIG = 2163;;
+let _SYSZ_INS_VSCBIH = 2164;;
+let _SYSZ_INS_VSCBIQ = 2165;;
+let _SYSZ_INS_VSCEF = 2166;;
+let _SYSZ_INS_VSCEG = 2167;;
+let _SYSZ_INS_VSDP = 2168;;
+let _SYSZ_INS_VSEG = 2169;;
+let _SYSZ_INS_VSEGB = 2170;;
+let _SYSZ_INS_VSEGF = 2171;;
+let _SYSZ_INS_VSEGH = 2172;;
+let _SYSZ_INS_VSEL = 2173;;
+let _SYSZ_INS_VSF = 2174;;
+let _SYSZ_INS_VSG = 2175;;
+let _SYSZ_INS_VSH = 2176;;
+let _SYSZ_INS_VSL = 2177;;
+let _SYSZ_INS_VSLB = 2178;;
+let _SYSZ_INS_VSLDB = 2179;;
+let _SYSZ_INS_VSP = 2180;;
+let _SYSZ_INS_VSQ = 2181;;
+let _SYSZ_INS_VSRA = 2182;;
+let _SYSZ_INS_VSRAB = 2183;;
+let _SYSZ_INS_VSRL = 2184;;
+let _SYSZ_INS_VSRLB = 2185;;
+let _SYSZ_INS_VSRP = 2186;;
+let _SYSZ_INS_VST = 2187;;
+let _SYSZ_INS_VSTEB = 2188;;
+let _SYSZ_INS_VSTEF = 2189;;
+let _SYSZ_INS_VSTEG = 2190;;
+let _SYSZ_INS_VSTEH = 2191;;
+let _SYSZ_INS_VSTL = 2192;;
+let _SYSZ_INS_VSTM = 2193;;
+let _SYSZ_INS_VSTRC = 2194;;
+let _SYSZ_INS_VSTRCB = 2195;;
+let _SYSZ_INS_VSTRCBS = 2196;;
+let _SYSZ_INS_VSTRCF = 2197;;
+let _SYSZ_INS_VSTRCFS = 2198;;
+let _SYSZ_INS_VSTRCH = 2199;;
+let _SYSZ_INS_VSTRCHS = 2200;;
+let _SYSZ_INS_VSTRCZB = 2201;;
+let _SYSZ_INS_VSTRCZBS = 2202;;
+let _SYSZ_INS_VSTRCZF = 2203;;
+let _SYSZ_INS_VSTRCZFS = 2204;;
+let _SYSZ_INS_VSTRCZH = 2205;;
+let _SYSZ_INS_VSTRCZHS = 2206;;
+let _SYSZ_INS_VSTRL = 2207;;
+let _SYSZ_INS_VSTRLR = 2208;;
+let _SYSZ_INS_VSUM = 2209;;
+let _SYSZ_INS_VSUMB = 2210;;
+let _SYSZ_INS_VSUMG = 2211;;
+let _SYSZ_INS_VSUMGF = 2212;;
+let _SYSZ_INS_VSUMGH = 2213;;
+let _SYSZ_INS_VSUMH = 2214;;
+let _SYSZ_INS_VSUMQ = 2215;;
+let _SYSZ_INS_VSUMQF = 2216;;
+let _SYSZ_INS_VSUMQG = 2217;;
+let _SYSZ_INS_VTM = 2218;;
+let _SYSZ_INS_VTP = 2219;;
+let _SYSZ_INS_VUPH = 2220;;
+let _SYSZ_INS_VUPHB = 2221;;
+let _SYSZ_INS_VUPHF = 2222;;
+let _SYSZ_INS_VUPHH = 2223;;
+let _SYSZ_INS_VUPKZ = 2224;;
+let _SYSZ_INS_VUPL = 2225;;
+let _SYSZ_INS_VUPLB = 2226;;
+let _SYSZ_INS_VUPLF = 2227;;
+let _SYSZ_INS_VUPLH = 2228;;
+let _SYSZ_INS_VUPLHB = 2229;;
+let _SYSZ_INS_VUPLHF = 2230;;
+let _SYSZ_INS_VUPLHH = 2231;;
+let _SYSZ_INS_VUPLHW = 2232;;
+let _SYSZ_INS_VUPLL = 2233;;
+let _SYSZ_INS_VUPLLB = 2234;;
+let _SYSZ_INS_VUPLLF = 2235;;
+let _SYSZ_INS_VUPLLH = 2236;;
+let _SYSZ_INS_VX = 2237;;
+let _SYSZ_INS_VZERO = 2238;;
+let _SYSZ_INS_WCDGB = 2239;;
+let _SYSZ_INS_WCDLGB = 2240;;
+let _SYSZ_INS_WCGDB = 2241;;
+let _SYSZ_INS_WCLGDB = 2242;;
+let _SYSZ_INS_WFADB = 2243;;
+let _SYSZ_INS_WFASB = 2244;;
+let _SYSZ_INS_WFAXB = 2245;;
+let _SYSZ_INS_WFC = 2246;;
+let _SYSZ_INS_WFCDB = 2247;;
+let _SYSZ_INS_WFCEDB = 2248;;
+let _SYSZ_INS_WFCEDBS = 2249;;
+let _SYSZ_INS_WFCESB = 2250;;
+let _SYSZ_INS_WFCESBS = 2251;;
+let _SYSZ_INS_WFCEXB = 2252;;
+let _SYSZ_INS_WFCEXBS = 2253;;
+let _SYSZ_INS_WFCHDB = 2254;;
+let _SYSZ_INS_WFCHDBS = 2255;;
+let _SYSZ_INS_WFCHEDB = 2256;;
+let _SYSZ_INS_WFCHEDBS = 2257;;
+let _SYSZ_INS_WFCHESB = 2258;;
+let _SYSZ_INS_WFCHESBS = 2259;;
+let _SYSZ_INS_WFCHEXB = 2260;;
+let _SYSZ_INS_WFCHEXBS = 2261;;
+let _SYSZ_INS_WFCHSB = 2262;;
+let _SYSZ_INS_WFCHSBS = 2263;;
+let _SYSZ_INS_WFCHXB = 2264;;
+let _SYSZ_INS_WFCHXBS = 2265;;
+let _SYSZ_INS_WFCSB = 2266;;
+let _SYSZ_INS_WFCXB = 2267;;
+let _SYSZ_INS_WFDDB = 2268;;
+let _SYSZ_INS_WFDSB = 2269;;
+let _SYSZ_INS_WFDXB = 2270;;
+let _SYSZ_INS_WFIDB = 2271;;
+let _SYSZ_INS_WFISB = 2272;;
+let _SYSZ_INS_WFIXB = 2273;;
+let _SYSZ_INS_WFK = 2274;;
+let _SYSZ_INS_WFKDB = 2275;;
+let _SYSZ_INS_WFKEDB = 2276;;
+let _SYSZ_INS_WFKEDBS = 2277;;
+let _SYSZ_INS_WFKESB = 2278;;
+let _SYSZ_INS_WFKESBS = 2279;;
+let _SYSZ_INS_WFKEXB = 2280;;
+let _SYSZ_INS_WFKEXBS = 2281;;
+let _SYSZ_INS_WFKHDB = 2282;;
+let _SYSZ_INS_WFKHDBS = 2283;;
+let _SYSZ_INS_WFKHEDB = 2284;;
+let _SYSZ_INS_WFKHEDBS = 2285;;
+let _SYSZ_INS_WFKHESB = 2286;;
+let _SYSZ_INS_WFKHESBS = 2287;;
+let _SYSZ_INS_WFKHEXB = 2288;;
+let _SYSZ_INS_WFKHEXBS = 2289;;
+let _SYSZ_INS_WFKHSB = 2290;;
+let _SYSZ_INS_WFKHSBS = 2291;;
+let _SYSZ_INS_WFKHXB = 2292;;
+let _SYSZ_INS_WFKHXBS = 2293;;
+let _SYSZ_INS_WFKSB = 2294;;
+let _SYSZ_INS_WFKXB = 2295;;
+let _SYSZ_INS_WFLCDB = 2296;;
+let _SYSZ_INS_WFLCSB = 2297;;
+let _SYSZ_INS_WFLCXB = 2298;;
+let _SYSZ_INS_WFLLD = 2299;;
+let _SYSZ_INS_WFLLS = 2300;;
+let _SYSZ_INS_WFLNDB = 2301;;
+let _SYSZ_INS_WFLNSB = 2302;;
+let _SYSZ_INS_WFLNXB = 2303;;
+let _SYSZ_INS_WFLPDB = 2304;;
+let _SYSZ_INS_WFLPSB = 2305;;
+let _SYSZ_INS_WFLPXB = 2306;;
+let _SYSZ_INS_WFLRD = 2307;;
+let _SYSZ_INS_WFLRX = 2308;;
+let _SYSZ_INS_WFMADB = 2309;;
+let _SYSZ_INS_WFMASB = 2310;;
+let _SYSZ_INS_WFMAXB = 2311;;
+let _SYSZ_INS_WFMAXDB = 2312;;
+let _SYSZ_INS_WFMAXSB = 2313;;
+let _SYSZ_INS_WFMAXXB = 2314;;
+let _SYSZ_INS_WFMDB = 2315;;
+let _SYSZ_INS_WFMINDB = 2316;;
+let _SYSZ_INS_WFMINSB = 2317;;
+let _SYSZ_INS_WFMINXB = 2318;;
+let _SYSZ_INS_WFMSB = 2319;;
+let _SYSZ_INS_WFMSDB = 2320;;
+let _SYSZ_INS_WFMSSB = 2321;;
+let _SYSZ_INS_WFMSXB = 2322;;
+let _SYSZ_INS_WFMXB = 2323;;
+let _SYSZ_INS_WFNMADB = 2324;;
+let _SYSZ_INS_WFNMASB = 2325;;
+let _SYSZ_INS_WFNMAXB = 2326;;
+let _SYSZ_INS_WFNMSDB = 2327;;
+let _SYSZ_INS_WFNMSSB = 2328;;
+let _SYSZ_INS_WFNMSXB = 2329;;
+let _SYSZ_INS_WFPSODB = 2330;;
+let _SYSZ_INS_WFPSOSB = 2331;;
+let _SYSZ_INS_WFPSOXB = 2332;;
+let _SYSZ_INS_WFSDB = 2333;;
+let _SYSZ_INS_WFSQDB = 2334;;
+let _SYSZ_INS_WFSQSB = 2335;;
+let _SYSZ_INS_WFSQXB = 2336;;
+let _SYSZ_INS_WFSSB = 2337;;
+let _SYSZ_INS_WFSXB = 2338;;
+let _SYSZ_INS_WFTCIDB = 2339;;
+let _SYSZ_INS_WFTCISB = 2340;;
+let _SYSZ_INS_WFTCIXB = 2341;;
+let _SYSZ_INS_WLDEB = 2342;;
+let _SYSZ_INS_WLEDB = 2343;;
+let _SYSZ_INS_XSCH = 2344;;
+let _SYSZ_INS_ZAP = 2345;;
+let _SYSZ_INS_ENDING = 2346;;
+
+let _SYSZ_GRP_INVALID = 0;;
+let _SYSZ_GRP_JUMP = 1;;
+let _SYSZ_GRP_DISTINCTOPS = 128;;
+let _SYSZ_GRP_FPEXTENSION = 129;;
+let _SYSZ_GRP_HIGHWORD = 130;;
+let _SYSZ_GRP_INTERLOCKEDACCESS1 = 131;;
+let _SYSZ_GRP_LOADSTOREONCOND = 132;;
+let _SYSZ_GRP_DFPPACKEDCONVERSION = 133;;
+let _SYSZ_GRP_DFPZONEDCONVERSION = 134;;
+let _SYSZ_GRP_ENHANCEDDAT2 = 135;;
+let _SYSZ_GRP_EXECUTIONHINT = 136;;
+let _SYSZ_GRP_GUARDEDSTORAGE = 137;;
+let _SYSZ_GRP_INSERTREFERENCEBITSMULTIPLE = 138;;
+let _SYSZ_GRP_LOADANDTRAP = 139;;
+let _SYSZ_GRP_LOADANDZERORIGHTMOSTBYTE = 140;;
+let _SYSZ_GRP_LOADSTOREONCOND2 = 141;;
+let _SYSZ_GRP_MESSAGESECURITYASSIST3 = 142;;
+let _SYSZ_GRP_MESSAGESECURITYASSIST4 = 143;;
+let _SYSZ_GRP_MESSAGESECURITYASSIST5 = 144;;
+let _SYSZ_GRP_MESSAGESECURITYASSIST7 = 145;;
+let _SYSZ_GRP_MESSAGESECURITYASSIST8 = 146;;
+let _SYSZ_GRP_MISCELLANEOUSEXTENSIONS = 147;;
+let _SYSZ_GRP_MISCELLANEOUSEXTENSIONS2 = 148;;
+let _SYSZ_GRP_NOVECTOR = 149;;
+let _SYSZ_GRP_POPULATIONCOUNT = 150;;
+let _SYSZ_GRP_PROCESSORASSIST = 151;;
+let _SYSZ_GRP_RESETREFERENCEBITSMULTIPLE = 152;;
+let _SYSZ_GRP_TRANSACTIONALEXECUTION = 153;;
+let _SYSZ_GRP_VECTOR = 154;;
+let _SYSZ_GRP_VECTORENHANCEMENTS1 = 155;;
+let _SYSZ_GRP_VECTORPACKEDDECIMAL = 156;;
+let _SYSZ_GRP_ENDING = 157;;
diff --git a/capstone/bindings/ocaml/test_arm.ml b/capstone/bindings/ocaml/test_arm.ml
new file mode 100644
index 000000000..27d95ec14
--- /dev/null
+++ b/capstone/bindings/ocaml/test_arm.ml
@@ -0,0 +1,105 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Arm
+open Arm_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c";;
+let _THUMB_CODE2  = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0";;
+let _THUMB_CODE  = "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1";;
+
+
+let all_tests = [
+        (CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "Thumb");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _ARM_CODE2, "Thumb-mixed");
+        (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "Thumb-2");
+];;
+
+
+let print_op handle i op =
+	( match op.value with
+	| ARM_OP_INVALID _ -> ();	(* this would never happens *)
+	| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
+	| ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm;
+	| ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
+	| ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.scale != 1 then
+			printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		if mem.lshift != 0 then
+			printf "\t\t\toperands[%u].mem.lshift: 0x%x\n" i mem.lshift;
+		);
+	| ARM_OP_SETEND sd -> printf "\t\top[%d]: SETEND = %u\n" i sd;
+	);
+
+	if op.shift.shift_type != _ARM_SFT_INVALID && op.shift.shift_value > 0 then
+		printf "\t\t\tShift: type = %u, value = %u\n"
+                op.shift.shift_type op.shift.shift_value;
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_ARM arm -> (
+			if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
+			printf "\tCode condition: %u\n" arm.cc;
+
+			if arm.update_flags then
+			printf "\tUpdate-flags: True\n";
+
+			if arm.writeback then
+			printf "\tWriteback: True\n";
+
+			(* print all operands info (type & value) *)
+			if (Array.length arm.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length arm.operands);
+				Array.iteri (print_op handle) arm.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_arm64.ml b/capstone/bindings/ocaml/test_arm64.ml
new file mode 100644
index 000000000..8ec39c637
--- /dev/null
+++ b/capstone/bindings/ocaml/test_arm64.ml
@@ -0,0 +1,101 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Arm64
+open Arm64_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b";;
+
+let all_tests = [
+        (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| ARM64_OP_INVALID _ -> ();	(* this would never happens *)
+	| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
+	| ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
+	| ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	| ARM64_OP_REG_MRS reg -> printf "\t\top[%d]: REG_MRS = %u\n" i reg;
+	| ARM64_OP_REG_MSR reg -> printf "\t\top[%d]: REG_MSR = %u\n" i reg;
+	| ARM64_OP_PSTATE v -> printf "\t\top[%d]: PSTATE = %u\n" i v;
+	| ARM64_OP_SYS v -> printf "\t\top[%d]: SYS = %u\n" i v;
+	| ARM64_OP_PREFETCH v -> printf "\t\top[%d]: PREFETCH = %u\n" i v;
+	| ARM64_OP_BARRIER v -> printf "\t\top[%d]: BARRIER = %u\n" i v;
+	);
+
+	if op.shift.shift_type != _ARM64_SFT_INVALID && op.shift.shift_value > 0 then
+		printf "\t\t\tShift: type = %u, value = %u\n"
+                op.shift.shift_type op.shift.shift_value;
+	if op.ext != _ARM64_EXT_INVALID then
+		printf "\t\t\tExt: %u\n" op.ext;
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_ARM64 arm64 -> (
+			if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
+			printf "\tCode condition: %u\n" arm64.cc;
+
+			if arm64.update_flags then
+			printf "\tUpdate-flags: True\n";
+
+			if arm64.writeback then
+			printf "\tWriteback: True\n";
+
+			(* print all operands info (type & value) *)
+			if (Array.length arm64.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length arm64.operands);
+				Array.iteri (print_op handle) arm64.operands;
+			);
+			printf "\n";
+		)
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_basic.ml b/capstone/bindings/ocaml/test_basic.ml
new file mode 100644
index 000000000..80ad1e4c0
--- /dev/null
+++ b/capstone/bindings/ocaml/test_basic.ml
@@ -0,0 +1,67 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open List
+open Capstone
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
+let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
+let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
+let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
+	(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
+        (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
+        (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L);
+        (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L);
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L);
+];;
+
+
+let print_insn insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;;
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+	let handle = cs_open arch mode in (
+		if syntax != 0L then (
+			let err = cs_option handle CS_OPT_SYNTAX syntax in
+			match err with
+			| _ -> ();
+		);
+		let insns = cs_disasm handle code 0x1000L 0L in (
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter print_insn insns;
+		);
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+	);;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_detail.ml b/capstone/bindings/ocaml/test_detail.ml
new file mode 100644
index 000000000..3f0fea0dd
--- /dev/null
+++ b/capstone/bindings/ocaml/test_detail.ml
@@ -0,0 +1,87 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open List
+open Capstone
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
+let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
+let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
+let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
+let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0);
+	(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
+	(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
+	(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
+	(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
+        (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0);
+];;
+
+
+let print_detail handle insn =
+	(* print immediate operands *)
+	if (Array.length insn.regs_read) > 0 then begin
+		printf "\tImplicit registers read: ";
+		Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read;
+		printf "\n";
+	end;
+
+	if (Array.length insn.regs_write) > 0 then begin
+		printf "\tImplicit registers written: ";
+		Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write;
+		printf "\n";
+	end;
+
+	if (Array.length insn.groups) > 0 then begin
+		printf "\tThis instruction belongs to groups: ";
+		Array.iter (printf "%u ") insn.groups;
+		printf "\n";
+	end;
+	printf "\n";;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_m680x.ml b/capstone/bindings/ocaml/test_m680x.ml
new file mode 100644
index 000000000..e728fa3ff
--- /dev/null
+++ b/capstone/bindings/ocaml/test_m680x.ml
@@ -0,0 +1,167 @@
+(* Capstone Disassembly Engine
+* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
+
+open Printf
+open Capstone
+open M680x
+open M680x_const
+
+
+let print_char_hex ch =
+	printf " 0x%02x" (Char.code ch)
+
+let print_int_hex_short value =
+	printf "%02x" value
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	String.iter print_char_hex str;
+	printf "\n"
+
+let print_array_hex_short arr =
+	Array.iter print_int_hex_short arr
+
+let s_access = [
+	"UNCHANGED"; "READ"; "WRITE"; "READ | WRITE" ];;
+
+let _M6800_CODE = "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39";;
+let _M6801_CODE = "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39";;
+let _M6805_CODE = "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe";;
+let _M6808_CODE = "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f";;
+let _HD6301_CODE = "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39";;
+let _M6809_CODE = "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00";;
+let _HD6309_CODE = "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00";;
+let _M6811_CODE = "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f";;
+let _CPU12_CODE = "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00";;
+let _HCS08_CODE = "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82";;
+
+let bit_set value mask =
+	value land mask != 0
+
+let all_tests = [
+        (CS_ARCH_M680X, [CS_MODE_M680X_6301], _HD6301_CODE, "M680X_HD6301");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6309], _HD6309_CODE, "M680X_HD6309");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6800], _M6800_CODE, "M680X_M6800");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6801], _M6801_CODE, "M680X_M6801");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6805], _M6805_CODE, "M680X_M68HC05");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6808], _M6808_CODE, "M680X_M68HC08");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6809], _M6809_CODE, "M680X_M6809");
+        (CS_ARCH_M680X, [CS_MODE_M680X_6811], _M6811_CODE, "M680X_M68HC11");
+        (CS_ARCH_M680X, [CS_MODE_M680X_CPU12], _CPU12_CODE, "M680X_CPU12");
+        (CS_ARCH_M680X, [CS_MODE_M680X_HCS08], _HCS08_CODE, "M680X_HCS08");
+];;
+
+let print_inc_dec inc_dec is_post = (
+	printf "\t\t\t";
+	if is_post then printf "post" else printf "pre";
+	if inc_dec > 0 then
+		printf " increment: %d\n" inc_dec
+	else
+		printf " decrement: %d\n" (abs inc_dec);
+	);
+	();;
+
+let print_op handle flags i op =
+	( match op.value with
+	| M680X_OP_INVALID _ -> ();	(* this would never happens *)
+	| M680X_OP_REGISTER reg -> (
+		printf "\t\toperands[%d].type: REGISTER = %s" i (cs_reg_name handle reg);
+		if (((i == 0) && (bit_set flags _M680X_FIRST_OP_IN_MNEM)) ||
+		    ((i == 1) && (bit_set flags _M680X_SECOND_OP_IN_MNEM))) then
+			printf " (in mnemonic)";
+		printf "\n";
+		);
+	| M680X_OP_IMMEDIATE imm ->
+		printf "\t\toperands[%d].type: IMMEDIATE = #%d\n" i imm;
+	| M680X_OP_DIRECT direct_addr ->
+		printf "\t\toperands[%d].type: DIRECT = 0x%02x\n" i direct_addr;
+	| M680X_OP_EXTENDED ext -> (
+		printf "\t\toperands[%d].type: EXTENDED " i;
+		if ext.indirect then
+			printf "INDIRECT";
+		printf " = 0x%04x\n" ext.addr_ext;
+		);
+	| M680X_OP_RELATIVE rel ->
+		printf "\t\toperands[%d].type: RELATIVE = 0x%04x\n" i rel.addr_rel;
+	| M680X_OP_INDEXED idx -> (
+		printf "\t\toperands[%d].type: INDEXED" i;
+		if (bit_set idx.flags _M680X_IDX_INDIRECT) then
+			printf " INDIRECT";
+		printf "\n";
+		if idx.base_reg != _M680X_REG_INVALID then
+			printf "\t\t\tbase register: %s\n" (cs_reg_name handle idx.base_reg);
+		if idx.offset_reg != _M680X_REG_INVALID then
+			printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg);
+		if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin
+			printf "\t\t\toffset: %d\n" idx.offset;
+			if idx.base_reg == _M680X_REG_PC then
+				printf "\t\t\toffset address: 0x%x\n" idx.offset_addr;
+			printf "\t\t\toffset bits: %u\n" idx.offset_bits;
+		end;
+		if idx.inc_dec != 0 then
+			print_inc_dec idx.inc_dec (bit_set idx.flags _M680X_IDX_POST_INC_DEC);
+		);
+	| M680X_OP_CONSTANT const_val ->
+		printf "\t\toperands[%d].type: CONSTANT = %d\n" i const_val;
+	);
+
+	if op.size != 0 then
+		printf "\t\t\tsize: %d\n" op.size;
+	if op.access != _CS_AC_INVALID then
+		printf "\t\t\taccess: %s\n" (List.nth s_access op.access);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_M680X m680x -> (
+			(* print all operands info (type & value) *)
+			if (Array.length m680x.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length m680x.operands);
+				Array.iteri (print_op handle m680x.flags) m680x.operands;
+			);
+			);
+	| _ -> ();
+	;;
+
+let print_reg handle reg =
+	printf " %s" (cs_reg_name handle reg)
+
+let print_insn handle insn =
+	printf "0x%04x:\t" insn.address;
+	print_array_hex_short insn.bytes;
+	printf "\t%s\t%s\n" insn.mnemonic insn.op_str;
+	print_detail handle insn;
+	if (Array.length insn.regs_read) > 0 then begin
+		printf "\tRegisters read:";
+		Array.iter (print_reg handle) insn.regs_read;
+		printf "\n";
+	end;
+	if (Array.length insn.regs_write) > 0 then begin
+		printf "\tRegisters modified:";
+		Array.iter (print_reg handle) insn.regs_write;
+		printf "\n";
+	end;
+	if (Array.length insn.groups) > 0 then
+		printf "\tgroups_count: %d\n" (Array.length insn.groups);
+	printf "\n"
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "********************\n";
+			printf "Platform: %s\n" comment;
+			print_string_hex "Code: " code;
+			printf "Disasm:\n";
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+List.iter print_arch all_tests;;
+
diff --git a/capstone/bindings/ocaml/test_mips.ml b/capstone/bindings/ocaml/test_mips.ml
new file mode 100644
index 000000000..aef940be9
--- /dev/null
+++ b/capstone/bindings/ocaml/test_mips.ml
@@ -0,0 +1,75 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open Mips
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _MIPS_CODE  = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
+let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
+
+let all_tests = [
+	(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
+	(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| MIPS_OP_INVALID _ -> ();	(* this would never happens *)
+	| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_MIPS mips -> (
+			(* print all operands info (type & value) *)
+			if (Array.length mips.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length mips.operands);
+				Array.iteri (print_op handle) mips.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_ppc.ml b/capstone/bindings/ocaml/test_ppc.ml
new file mode 100644
index 000000000..e5e3acbff
--- /dev/null
+++ b/capstone/bindings/ocaml/test_ppc.ml
@@ -0,0 +1,81 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Ppc
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
+
+let all_tests = [
+	(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| PPC_OP_INVALID _ -> ();	(* this would never happens *)
+	| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	| PPC_OP_CRX crx -> ( printf "\t\top[%d]: CRX\n" i;
+		if crx.scale != 0 then
+			printf "\t\t\toperands[%u].crx.scale = %u\n" i crx.scale;
+		if crx.reg != 0 then
+			printf "\t\t\toperands[%u].crx.reg = %s\n" i (cs_reg_name handle crx.reg);
+		if crx.cond != 0 then
+			printf "\t\t\toperands[%u].crx.cond = 0x%x\n" i crx.cond;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_PPC ppc -> (
+			(* print all operands info (type & value) *)
+			if (Array.length ppc.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length ppc.operands);
+				Array.iteri (print_op handle) ppc.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_sparc.ml b/capstone/bindings/ocaml/test_sparc.ml
new file mode 100644
index 000000000..671f12110
--- /dev/null
+++ b/capstone/bindings/ocaml/test_sparc.ml
@@ -0,0 +1,79 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Sparc
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
+let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
+
+
+let all_tests = [
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc");
+        (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| SPARC_OP_INVALID _ -> ();	(* this would never happens *)
+	| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_SPARC sparc -> (
+			(* print all operands info (type & value) *)
+			if (Array.length sparc.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length sparc.operands);
+				Array.iteri (print_op handle) sparc.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_systemz.ml b/capstone/bindings/ocaml/test_systemz.ml
new file mode 100644
index 000000000..8f5dbe5c2
--- /dev/null
+++ b/capstone/bindings/ocaml/test_systemz.ml
@@ -0,0 +1,80 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Systemz
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
+
+
+
+let all_tests = [
+	(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| SYSZ_OP_INVALID _ -> ();	(* this would never happens *)
+	| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg;
+	| SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.length != 0L then
+			printf "\t\t\toperands[%u].mem.length: 0x%Lx\n" i mem.length;
+		if mem.disp != 0L then
+			printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_SYSZ sysz -> (
+			(* print all operands info (type & value) *)
+			if (Array.length sysz.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length sysz.operands);
+				Array.iteri (print_op handle) sysz.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_x86.ml b/capstone/bindings/ocaml/test_x86.ml
new file mode 100644
index 000000000..d35bf0f01
--- /dev/null
+++ b/capstone/bindings/ocaml/test_x86.ml
@@ -0,0 +1,117 @@
+(* Capstone Disassembly Engine
+* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open Printf
+open Capstone
+open X86
+open X86_const
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
+let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
+
+
+let all_tests = [
+	(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
+	(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
+	(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| X86_OP_INVALID _ -> ();	(* this would never happens *)
+	| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s  [sz=%d]\n" i (cs_reg_name handle reg) op.size;
+	| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x  [sz=%d]\n" i imm op.size;
+	| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM  [sz=%d]\n" i op.size;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle  mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
+		if mem.scale != 1 then
+			printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		);
+	);
+	();;
+
+
+let print_detail handle mode insn =
+	match insn.arch with
+	| CS_INFO_X86 x86 -> (
+			print_string_hex "\tPrefix: " x86.prefix;
+
+			(* print instruction's opcode *)
+			print_string_hex "\tOpcode: " x86.opcode;
+
+			(* print operand's size, address size, displacement size & immediate size *)
+			printf "\taddr_size: %u\n" x86.addr_size;
+
+			(* print modRM byte *)
+			printf "\tmodrm: 0x%x\n" x86.modrm;
+
+			(* print displacement value *)
+			if x86.disp != 0 then
+			printf "\tdisp: 0x%x\n" x86.disp;
+
+			(* SIB is invalid in 16-bit mode *)
+			if not (List.mem CS_MODE_16 mode) then (
+				(* print SIB byte *)
+				printf "\tsib: 0x%x\n" x86.sib;
+
+				(* print sib index/scale/base (if applicable) *)
+				if x86.sib_index != _X86_REG_INVALID then
+				printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
+				(cs_reg_name handle x86.sib_index)
+				x86.sib_scale
+				(cs_reg_name handle x86.sib_base);
+			);
+
+			(* print all operands info (type & value) *)
+			if (Array.length x86.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length x86.operands);
+				Array.iteri (print_op handle) x86.operands;
+			);
+			printf "\n";
+	);
+	| _ -> ();
+	;;
+
+
+let print_insn handle mode insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle mode insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment, syntax) = x in
+	let handle = cs_open arch mode in (
+		if syntax != 0L then (
+			let err = cs_option handle CS_OPT_SYNTAX syntax in
+			match err with
+			| _ -> ();
+		);
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in (
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle mode) insns;
+		);
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+	);;
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/test_xcore.ml b/capstone/bindings/ocaml/test_xcore.ml
new file mode 100644
index 000000000..984ebb67c
--- /dev/null
+++ b/capstone/bindings/ocaml/test_xcore.ml
@@ -0,0 +1,78 @@
+(* Capstone Disassembly Engine
+* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Printf
+open Capstone
+open Xcore
+
+
+let print_string_hex comment str =
+	printf "%s" comment;
+	for i = 0 to (Array.length str - 1) do
+		printf "0x%02x " str.(i)
+	done;
+	printf "\n"
+
+
+let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
+
+let all_tests = [
+        (CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore");
+];;
+
+let print_op handle i op =
+	( match op.value with
+	| XCORE_OP_INVALID _ -> ();	(* this would never happens *)
+	| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
+	| XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
+	| XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
+		if mem.base != 0 then
+			printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
+		if mem.index != 0 then
+			printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
+		if mem.disp != 0 then
+			printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
+		if mem.direct != 0 then
+			printf "\t\t\toperands[%u].mem.direct: 0x%x\n" i mem.direct;
+		);
+	);
+
+	();;
+
+
+let print_detail handle insn =
+	match insn.arch with
+	| CS_INFO_XCORE xcore -> (
+			(* print all operands info (type & value) *)
+			if (Array.length xcore.operands) > 0 then (
+				printf "\top_count: %d\n" (Array.length xcore.operands);
+				Array.iteri (print_op handle) xcore.operands;
+			);
+			printf "\n";
+		);
+	| _ -> ();
+	;;
+
+
+let print_insn handle insn =
+	printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
+	print_detail handle insn
+
+
+let print_arch x =
+	let (arch, mode, code, comment) = x in
+		let handle = cs_open arch mode in
+		let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
+		match err with
+		| _ -> ();
+		let insns = cs_disasm handle code 0x1000L 0L in
+			printf "*************\n";
+			printf "Platform: %s\n" comment;
+			List.iter (print_insn handle) insns;
+		match cs_close handle with
+		| 0 -> ();
+		| _ -> printf "Failed to close handle";
+		;;
+
+
+List.iter print_arch all_tests;;
diff --git a/capstone/bindings/ocaml/tms320c64x_const.ml b/capstone/bindings/ocaml/tms320c64x_const.ml
new file mode 100644
index 000000000..53a4440e8
--- /dev/null
+++ b/capstone/bindings/ocaml/tms320c64x_const.ml
@@ -0,0 +1,277 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.ml] *)
+
+let _TMS320C64X_OP_INVALID = 0;;
+let _TMS320C64X_OP_REG = 1;;
+let _TMS320C64X_OP_IMM = 2;;
+let _TMS320C64X_OP_MEM = 3;;
+let _TMS320C64X_OP_REGPAIR = 64;;
+
+let _TMS320C64X_MEM_DISP_INVALID = 0;;
+let _TMS320C64X_MEM_DISP_CONSTANT = 1;;
+let _TMS320C64X_MEM_DISP_REGISTER = 2;;
+
+let _TMS320C64X_MEM_DIR_INVALID = 0;;
+let _TMS320C64X_MEM_DIR_FW = 1;;
+let _TMS320C64X_MEM_DIR_BW = 2;;
+
+let _TMS320C64X_MEM_MOD_INVALID = 0;;
+let _TMS320C64X_MEM_MOD_NO = 1;;
+let _TMS320C64X_MEM_MOD_PRE = 2;;
+let _TMS320C64X_MEM_MOD_POST = 3;;
+
+let _TMS320C64X_REG_INVALID = 0;;
+let _TMS320C64X_REG_AMR = 1;;
+let _TMS320C64X_REG_CSR = 2;;
+let _TMS320C64X_REG_DIER = 3;;
+let _TMS320C64X_REG_DNUM = 4;;
+let _TMS320C64X_REG_ECR = 5;;
+let _TMS320C64X_REG_GFPGFR = 6;;
+let _TMS320C64X_REG_GPLYA = 7;;
+let _TMS320C64X_REG_GPLYB = 8;;
+let _TMS320C64X_REG_ICR = 9;;
+let _TMS320C64X_REG_IER = 10;;
+let _TMS320C64X_REG_IERR = 11;;
+let _TMS320C64X_REG_ILC = 12;;
+let _TMS320C64X_REG_IRP = 13;;
+let _TMS320C64X_REG_ISR = 14;;
+let _TMS320C64X_REG_ISTP = 15;;
+let _TMS320C64X_REG_ITSR = 16;;
+let _TMS320C64X_REG_NRP = 17;;
+let _TMS320C64X_REG_NTSR = 18;;
+let _TMS320C64X_REG_REP = 19;;
+let _TMS320C64X_REG_RILC = 20;;
+let _TMS320C64X_REG_SSR = 21;;
+let _TMS320C64X_REG_TSCH = 22;;
+let _TMS320C64X_REG_TSCL = 23;;
+let _TMS320C64X_REG_TSR = 24;;
+let _TMS320C64X_REG_A0 = 25;;
+let _TMS320C64X_REG_A1 = 26;;
+let _TMS320C64X_REG_A2 = 27;;
+let _TMS320C64X_REG_A3 = 28;;
+let _TMS320C64X_REG_A4 = 29;;
+let _TMS320C64X_REG_A5 = 30;;
+let _TMS320C64X_REG_A6 = 31;;
+let _TMS320C64X_REG_A7 = 32;;
+let _TMS320C64X_REG_A8 = 33;;
+let _TMS320C64X_REG_A9 = 34;;
+let _TMS320C64X_REG_A10 = 35;;
+let _TMS320C64X_REG_A11 = 36;;
+let _TMS320C64X_REG_A12 = 37;;
+let _TMS320C64X_REG_A13 = 38;;
+let _TMS320C64X_REG_A14 = 39;;
+let _TMS320C64X_REG_A15 = 40;;
+let _TMS320C64X_REG_A16 = 41;;
+let _TMS320C64X_REG_A17 = 42;;
+let _TMS320C64X_REG_A18 = 43;;
+let _TMS320C64X_REG_A19 = 44;;
+let _TMS320C64X_REG_A20 = 45;;
+let _TMS320C64X_REG_A21 = 46;;
+let _TMS320C64X_REG_A22 = 47;;
+let _TMS320C64X_REG_A23 = 48;;
+let _TMS320C64X_REG_A24 = 49;;
+let _TMS320C64X_REG_A25 = 50;;
+let _TMS320C64X_REG_A26 = 51;;
+let _TMS320C64X_REG_A27 = 52;;
+let _TMS320C64X_REG_A28 = 53;;
+let _TMS320C64X_REG_A29 = 54;;
+let _TMS320C64X_REG_A30 = 55;;
+let _TMS320C64X_REG_A31 = 56;;
+let _TMS320C64X_REG_B0 = 57;;
+let _TMS320C64X_REG_B1 = 58;;
+let _TMS320C64X_REG_B2 = 59;;
+let _TMS320C64X_REG_B3 = 60;;
+let _TMS320C64X_REG_B4 = 61;;
+let _TMS320C64X_REG_B5 = 62;;
+let _TMS320C64X_REG_B6 = 63;;
+let _TMS320C64X_REG_B7 = 64;;
+let _TMS320C64X_REG_B8 = 65;;
+let _TMS320C64X_REG_B9 = 66;;
+let _TMS320C64X_REG_B10 = 67;;
+let _TMS320C64X_REG_B11 = 68;;
+let _TMS320C64X_REG_B12 = 69;;
+let _TMS320C64X_REG_B13 = 70;;
+let _TMS320C64X_REG_B14 = 71;;
+let _TMS320C64X_REG_B15 = 72;;
+let _TMS320C64X_REG_B16 = 73;;
+let _TMS320C64X_REG_B17 = 74;;
+let _TMS320C64X_REG_B18 = 75;;
+let _TMS320C64X_REG_B19 = 76;;
+let _TMS320C64X_REG_B20 = 77;;
+let _TMS320C64X_REG_B21 = 78;;
+let _TMS320C64X_REG_B22 = 79;;
+let _TMS320C64X_REG_B23 = 80;;
+let _TMS320C64X_REG_B24 = 81;;
+let _TMS320C64X_REG_B25 = 82;;
+let _TMS320C64X_REG_B26 = 83;;
+let _TMS320C64X_REG_B27 = 84;;
+let _TMS320C64X_REG_B28 = 85;;
+let _TMS320C64X_REG_B29 = 86;;
+let _TMS320C64X_REG_B30 = 87;;
+let _TMS320C64X_REG_B31 = 88;;
+let _TMS320C64X_REG_PCE1 = 89;;
+let _TMS320C64X_REG_ENDING = 90;;
+let _TMS320C64X_REG_EFR = _TMS320C64X_REG_ECR;;
+let _TMS320C64X_REG_IFR = _TMS320C64X_REG_ISR;;
+
+let _TMS320C64X_INS_INVALID = 0;;
+let _TMS320C64X_INS_ABS = 1;;
+let _TMS320C64X_INS_ABS2 = 2;;
+let _TMS320C64X_INS_ADD = 3;;
+let _TMS320C64X_INS_ADD2 = 4;;
+let _TMS320C64X_INS_ADD4 = 5;;
+let _TMS320C64X_INS_ADDAB = 6;;
+let _TMS320C64X_INS_ADDAD = 7;;
+let _TMS320C64X_INS_ADDAH = 8;;
+let _TMS320C64X_INS_ADDAW = 9;;
+let _TMS320C64X_INS_ADDK = 10;;
+let _TMS320C64X_INS_ADDKPC = 11;;
+let _TMS320C64X_INS_ADDU = 12;;
+let _TMS320C64X_INS_AND = 13;;
+let _TMS320C64X_INS_ANDN = 14;;
+let _TMS320C64X_INS_AVG2 = 15;;
+let _TMS320C64X_INS_AVGU4 = 16;;
+let _TMS320C64X_INS_B = 17;;
+let _TMS320C64X_INS_BDEC = 18;;
+let _TMS320C64X_INS_BITC4 = 19;;
+let _TMS320C64X_INS_BNOP = 20;;
+let _TMS320C64X_INS_BPOS = 21;;
+let _TMS320C64X_INS_CLR = 22;;
+let _TMS320C64X_INS_CMPEQ = 23;;
+let _TMS320C64X_INS_CMPEQ2 = 24;;
+let _TMS320C64X_INS_CMPEQ4 = 25;;
+let _TMS320C64X_INS_CMPGT = 26;;
+let _TMS320C64X_INS_CMPGT2 = 27;;
+let _TMS320C64X_INS_CMPGTU4 = 28;;
+let _TMS320C64X_INS_CMPLT = 29;;
+let _TMS320C64X_INS_CMPLTU = 30;;
+let _TMS320C64X_INS_DEAL = 31;;
+let _TMS320C64X_INS_DOTP2 = 32;;
+let _TMS320C64X_INS_DOTPN2 = 33;;
+let _TMS320C64X_INS_DOTPNRSU2 = 34;;
+let _TMS320C64X_INS_DOTPRSU2 = 35;;
+let _TMS320C64X_INS_DOTPSU4 = 36;;
+let _TMS320C64X_INS_DOTPU4 = 37;;
+let _TMS320C64X_INS_EXT = 38;;
+let _TMS320C64X_INS_EXTU = 39;;
+let _TMS320C64X_INS_GMPGTU = 40;;
+let _TMS320C64X_INS_GMPY4 = 41;;
+let _TMS320C64X_INS_LDB = 42;;
+let _TMS320C64X_INS_LDBU = 43;;
+let _TMS320C64X_INS_LDDW = 44;;
+let _TMS320C64X_INS_LDH = 45;;
+let _TMS320C64X_INS_LDHU = 46;;
+let _TMS320C64X_INS_LDNDW = 47;;
+let _TMS320C64X_INS_LDNW = 48;;
+let _TMS320C64X_INS_LDW = 49;;
+let _TMS320C64X_INS_LMBD = 50;;
+let _TMS320C64X_INS_MAX2 = 51;;
+let _TMS320C64X_INS_MAXU4 = 52;;
+let _TMS320C64X_INS_MIN2 = 53;;
+let _TMS320C64X_INS_MINU4 = 54;;
+let _TMS320C64X_INS_MPY = 55;;
+let _TMS320C64X_INS_MPY2 = 56;;
+let _TMS320C64X_INS_MPYH = 57;;
+let _TMS320C64X_INS_MPYHI = 58;;
+let _TMS320C64X_INS_MPYHIR = 59;;
+let _TMS320C64X_INS_MPYHL = 60;;
+let _TMS320C64X_INS_MPYHLU = 61;;
+let _TMS320C64X_INS_MPYHSLU = 62;;
+let _TMS320C64X_INS_MPYHSU = 63;;
+let _TMS320C64X_INS_MPYHU = 64;;
+let _TMS320C64X_INS_MPYHULS = 65;;
+let _TMS320C64X_INS_MPYHUS = 66;;
+let _TMS320C64X_INS_MPYLH = 67;;
+let _TMS320C64X_INS_MPYLHU = 68;;
+let _TMS320C64X_INS_MPYLI = 69;;
+let _TMS320C64X_INS_MPYLIR = 70;;
+let _TMS320C64X_INS_MPYLSHU = 71;;
+let _TMS320C64X_INS_MPYLUHS = 72;;
+let _TMS320C64X_INS_MPYSU = 73;;
+let _TMS320C64X_INS_MPYSU4 = 74;;
+let _TMS320C64X_INS_MPYU = 75;;
+let _TMS320C64X_INS_MPYU4 = 76;;
+let _TMS320C64X_INS_MPYUS = 77;;
+let _TMS320C64X_INS_MVC = 78;;
+let _TMS320C64X_INS_MVD = 79;;
+let _TMS320C64X_INS_MVK = 80;;
+let _TMS320C64X_INS_MVKL = 81;;
+let _TMS320C64X_INS_MVKLH = 82;;
+let _TMS320C64X_INS_NOP = 83;;
+let _TMS320C64X_INS_NORM = 84;;
+let _TMS320C64X_INS_OR = 85;;
+let _TMS320C64X_INS_PACK2 = 86;;
+let _TMS320C64X_INS_PACKH2 = 87;;
+let _TMS320C64X_INS_PACKH4 = 88;;
+let _TMS320C64X_INS_PACKHL2 = 89;;
+let _TMS320C64X_INS_PACKL4 = 90;;
+let _TMS320C64X_INS_PACKLH2 = 91;;
+let _TMS320C64X_INS_ROTL = 92;;
+let _TMS320C64X_INS_SADD = 93;;
+let _TMS320C64X_INS_SADD2 = 94;;
+let _TMS320C64X_INS_SADDU4 = 95;;
+let _TMS320C64X_INS_SADDUS2 = 96;;
+let _TMS320C64X_INS_SAT = 97;;
+let _TMS320C64X_INS_SET = 98;;
+let _TMS320C64X_INS_SHFL = 99;;
+let _TMS320C64X_INS_SHL = 100;;
+let _TMS320C64X_INS_SHLMB = 101;;
+let _TMS320C64X_INS_SHR = 102;;
+let _TMS320C64X_INS_SHR2 = 103;;
+let _TMS320C64X_INS_SHRMB = 104;;
+let _TMS320C64X_INS_SHRU = 105;;
+let _TMS320C64X_INS_SHRU2 = 106;;
+let _TMS320C64X_INS_SMPY = 107;;
+let _TMS320C64X_INS_SMPY2 = 108;;
+let _TMS320C64X_INS_SMPYH = 109;;
+let _TMS320C64X_INS_SMPYHL = 110;;
+let _TMS320C64X_INS_SMPYLH = 111;;
+let _TMS320C64X_INS_SPACK2 = 112;;
+let _TMS320C64X_INS_SPACKU4 = 113;;
+let _TMS320C64X_INS_SSHL = 114;;
+let _TMS320C64X_INS_SSHVL = 115;;
+let _TMS320C64X_INS_SSHVR = 116;;
+let _TMS320C64X_INS_SSUB = 117;;
+let _TMS320C64X_INS_STB = 118;;
+let _TMS320C64X_INS_STDW = 119;;
+let _TMS320C64X_INS_STH = 120;;
+let _TMS320C64X_INS_STNDW = 121;;
+let _TMS320C64X_INS_STNW = 122;;
+let _TMS320C64X_INS_STW = 123;;
+let _TMS320C64X_INS_SUB = 124;;
+let _TMS320C64X_INS_SUB2 = 125;;
+let _TMS320C64X_INS_SUB4 = 126;;
+let _TMS320C64X_INS_SUBAB = 127;;
+let _TMS320C64X_INS_SUBABS4 = 128;;
+let _TMS320C64X_INS_SUBAH = 129;;
+let _TMS320C64X_INS_SUBAW = 130;;
+let _TMS320C64X_INS_SUBC = 131;;
+let _TMS320C64X_INS_SUBU = 132;;
+let _TMS320C64X_INS_SWAP4 = 133;;
+let _TMS320C64X_INS_UNPKHU4 = 134;;
+let _TMS320C64X_INS_UNPKLU4 = 135;;
+let _TMS320C64X_INS_XOR = 136;;
+let _TMS320C64X_INS_XPND2 = 137;;
+let _TMS320C64X_INS_XPND4 = 138;;
+let _TMS320C64X_INS_IDLE = 139;;
+let _TMS320C64X_INS_MV = 140;;
+let _TMS320C64X_INS_NEG = 141;;
+let _TMS320C64X_INS_NOT = 142;;
+let _TMS320C64X_INS_SWAP2 = 143;;
+let _TMS320C64X_INS_ZERO = 144;;
+let _TMS320C64X_INS_ENDING = 145;;
+
+let _TMS320C64X_GRP_INVALID = 0;;
+let _TMS320C64X_GRP_JUMP = 1;;
+let _TMS320C64X_GRP_FUNIT_D = 128;;
+let _TMS320C64X_GRP_FUNIT_L = 129;;
+let _TMS320C64X_GRP_FUNIT_M = 130;;
+let _TMS320C64X_GRP_FUNIT_S = 131;;
+let _TMS320C64X_GRP_FUNIT_NO = 132;;
+let _TMS320C64X_GRP_ENDING = 133;;
+
+let _TMS320C64X_FUNIT_INVALID = 0;;
+let _TMS320C64X_FUNIT_D = 1;;
+let _TMS320C64X_FUNIT_L = 2;;
+let _TMS320C64X_FUNIT_M = 3;;
+let _TMS320C64X_FUNIT_S = 4;;
+let _TMS320C64X_FUNIT_NO = 5;;
diff --git a/capstone/bindings/ocaml/wasm_const.ml b/capstone/bindings/ocaml/wasm_const.ml
new file mode 100644
index 000000000..760917dc1
--- /dev/null
+++ b/capstone/bindings/ocaml/wasm_const.ml
@@ -0,0 +1,191 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [wasm_const.ml] *)
+
+let _WASM_OP_INVALID = 0;;
+let _WASM_OP_NONE = 1;;
+let _WASM_OP_INT7 = 2;;
+let _WASM_OP_VARUINT32 = 3;;
+let _WASM_OP_VARUINT64 = 4;;
+let _WASM_OP_UINT32 = 5;;
+let _WASM_OP_UINT64 = 6;;
+let _WASM_OP_IMM = 7;;
+let _WASM_OP_BRTABLE = 8;;
+let _WASM_INS_UNREACHABLE = 0x0;;
+let _WASM_INS_NOP = 0x1;;
+let _WASM_INS_BLOCK = 0x2;;
+let _WASM_INS_LOOP = 0x3;;
+let _WASM_INS_IF = 0x4;;
+let _WASM_INS_ELSE = 0x5;;
+let _WASM_INS_END = 0xb;;
+let _WASM_INS_BR = 0xc;;
+let _WASM_INS_BR_IF = 0xd;;
+let _WASM_INS_BR_TABLE = 0xe;;
+let _WASM_INS_RETURN = 0xf;;
+let _WASM_INS_CALL = 0x10;;
+let _WASM_INS_CALL_INDIRECT = 0x11;;
+let _WASM_INS_DROP = 0x1a;;
+let _WASM_INS_SELECT = 0x1b;;
+let _WASM_INS_GET_LOCAL = 0x20;;
+let _WASM_INS_SET_LOCAL = 0x21;;
+let _WASM_INS_TEE_LOCAL = 0x22;;
+let _WASM_INS_GET_GLOBAL = 0x23;;
+let _WASM_INS_SET_GLOBAL = 0x24;;
+let _WASM_INS_I32_LOAD = 0x28;;
+let _WASM_INS_I64_LOAD = 0x29;;
+let _WASM_INS_F32_LOAD = 0x2a;;
+let _WASM_INS_F64_LOAD = 0x2b;;
+let _WASM_INS_I32_LOAD8_S = 0x2c;;
+let _WASM_INS_I32_LOAD8_U = 0x2d;;
+let _WASM_INS_I32_LOAD16_S = 0x2e;;
+let _WASM_INS_I32_LOAD16_U = 0x2f;;
+let _WASM_INS_I64_LOAD8_S = 0x30;;
+let _WASM_INS_I64_LOAD8_U = 0x31;;
+let _WASM_INS_I64_LOAD16_S = 0x32;;
+let _WASM_INS_I64_LOAD16_U = 0x33;;
+let _WASM_INS_I64_LOAD32_S = 0x34;;
+let _WASM_INS_I64_LOAD32_U = 0x35;;
+let _WASM_INS_I32_STORE = 0x36;;
+let _WASM_INS_I64_STORE = 0x37;;
+let _WASM_INS_F32_STORE = 0x38;;
+let _WASM_INS_F64_STORE = 0x39;;
+let _WASM_INS_I32_STORE8 = 0x3a;;
+let _WASM_INS_I32_STORE16 = 0x3b;;
+let _WASM_INS_I64_STORE8 = 0x3c;;
+let _WASM_INS_I64_STORE16 = 0x3d;;
+let _WASM_INS_I64_STORE32 = 0x3e;;
+let _WASM_INS_CURRENT_MEMORY = 0x3f;;
+let _WASM_INS_GROW_MEMORY = 0x40;;
+let _WASM_INS_I32_CONST = 0x41;;
+let _WASM_INS_I64_CONST = 0x42;;
+let _WASM_INS_F32_CONST = 0x43;;
+let _WASM_INS_F64_CONST = 0x44;;
+let _WASM_INS_I32_EQZ = 0x45;;
+let _WASM_INS_I32_EQ = 0x46;;
+let _WASM_INS_I32_NE = 0x47;;
+let _WASM_INS_I32_LT_S = 0x48;;
+let _WASM_INS_I32_LT_U = 0x49;;
+let _WASM_INS_I32_GT_S = 0x4a;;
+let _WASM_INS_I32_GT_U = 0x4b;;
+let _WASM_INS_I32_LE_S = 0x4c;;
+let _WASM_INS_I32_LE_U = 0x4d;;
+let _WASM_INS_I32_GE_S = 0x4e;;
+let _WASM_INS_I32_GE_U = 0x4f;;
+let _WASM_INS_I64_EQZ = 0x50;;
+let _WASM_INS_I64_EQ = 0x51;;
+let _WASM_INS_I64_NE = 0x52;;
+let _WASM_INS_I64_LT_S = 0x53;;
+let _WASM_INS_I64_LT_U = 0x54;;
+let _WASM_INS_I64_GT_U = 0x56;;
+let _WASM_INS_I64_LE_S = 0x57;;
+let _WASM_INS_I64_LE_U = 0x58;;
+let _WASM_INS_I64_GE_S = 0x59;;
+let _WASM_INS_I64_GE_U = 0x5a;;
+let _WASM_INS_F32_EQ = 0x5b;;
+let _WASM_INS_F32_NE = 0x5c;;
+let _WASM_INS_F32_LT = 0x5d;;
+let _WASM_INS_F32_GT = 0x5e;;
+let _WASM_INS_F32_LE = 0x5f;;
+let _WASM_INS_F32_GE = 0x60;;
+let _WASM_INS_F64_EQ = 0x61;;
+let _WASM_INS_F64_NE = 0x62;;
+let _WASM_INS_F64_LT = 0x63;;
+let _WASM_INS_F64_GT = 0x64;;
+let _WASM_INS_F64_LE = 0x65;;
+let _WASM_INS_F64_GE = 0x66;;
+let _WASM_INS_I32_CLZ = 0x67;;
+let _WASM_INS_I32_CTZ = 0x68;;
+let _WASM_INS_I32_POPCNT = 0x69;;
+let _WASM_INS_I32_ADD = 0x6a;;
+let _WASM_INS_I32_SUB = 0x6b;;
+let _WASM_INS_I32_MUL = 0x6c;;
+let _WASM_INS_I32_DIV_S = 0x6d;;
+let _WASM_INS_I32_DIV_U = 0x6e;;
+let _WASM_INS_I32_REM_S = 0x6f;;
+let _WASM_INS_I32_REM_U = 0x70;;
+let _WASM_INS_I32_AND = 0x71;;
+let _WASM_INS_I32_OR = 0x72;;
+let _WASM_INS_I32_XOR = 0x73;;
+let _WASM_INS_I32_SHL = 0x74;;
+let _WASM_INS_I32_SHR_S = 0x75;;
+let _WASM_INS_I32_SHR_U = 0x76;;
+let _WASM_INS_I32_ROTL = 0x77;;
+let _WASM_INS_I32_ROTR = 0x78;;
+let _WASM_INS_I64_CLZ = 0x79;;
+let _WASM_INS_I64_CTZ = 0x7a;;
+let _WASM_INS_I64_POPCNT = 0x7b;;
+let _WASM_INS_I64_ADD = 0x7c;;
+let _WASM_INS_I64_SUB = 0x7d;;
+let _WASM_INS_I64_MUL = 0x7e;;
+let _WASM_INS_I64_DIV_S = 0x7f;;
+let _WASM_INS_I64_DIV_U = 0x80;;
+let _WASM_INS_I64_REM_S = 0x81;;
+let _WASM_INS_I64_REM_U = 0x82;;
+let _WASM_INS_I64_AND = 0x83;;
+let _WASM_INS_I64_OR = 0x84;;
+let _WASM_INS_I64_XOR = 0x85;;
+let _WASM_INS_I64_SHL = 0x86;;
+let _WASM_INS_I64_SHR_S = 0x87;;
+let _WASM_INS_I64_SHR_U = 0x88;;
+let _WASM_INS_I64_ROTL = 0x89;;
+let _WASM_INS_I64_ROTR = 0x8a;;
+let _WASM_INS_F32_ABS = 0x8b;;
+let _WASM_INS_F32_NEG = 0x8c;;
+let _WASM_INS_F32_CEIL = 0x8d;;
+let _WASM_INS_F32_FLOOR = 0x8e;;
+let _WASM_INS_F32_TRUNC = 0x8f;;
+let _WASM_INS_F32_NEAREST = 0x90;;
+let _WASM_INS_F32_SQRT = 0x91;;
+let _WASM_INS_F32_ADD = 0x92;;
+let _WASM_INS_F32_SUB = 0x93;;
+let _WASM_INS_F32_MUL = 0x94;;
+let _WASM_INS_F32_DIV = 0x95;;
+let _WASM_INS_F32_MIN = 0x96;;
+let _WASM_INS_F32_MAX = 0x97;;
+let _WASM_INS_F32_COPYSIGN = 0x98;;
+let _WASM_INS_F64_ABS = 0x99;;
+let _WASM_INS_F64_NEG = 0x9a;;
+let _WASM_INS_F64_CEIL = 0x9b;;
+let _WASM_INS_F64_FLOOR = 0x9c;;
+let _WASM_INS_F64_TRUNC = 0x9d;;
+let _WASM_INS_F64_NEAREST = 0x9e;;
+let _WASM_INS_F64_SQRT = 0x9f;;
+let _WASM_INS_F64_ADD = 0xa0;;
+let _WASM_INS_F64_SUB = 0xa1;;
+let _WASM_INS_F64_MUL = 0xa2;;
+let _WASM_INS_F64_DIV = 0xa3;;
+let _WASM_INS_F64_MIN = 0xa4;;
+let _WASM_INS_F64_MAX = 0xa5;;
+let _WASM_INS_F64_COPYSIGN = 0xa6;;
+let _WASM_INS_I32_WARP_I64 = 0xa7;;
+let _WASM_INS_I32_TRUNC_U_F32 = 0xa9;;
+let _WASM_INS_I32_TRUNC_S_F64 = 0xaa;;
+let _WASM_INS_I32_TRUNC_U_F64 = 0xab;;
+let _WASM_INS_I64_EXTEND_S_I32 = 0xac;;
+let _WASM_INS_I64_EXTEND_U_I32 = 0xad;;
+let _WASM_INS_I64_TRUNC_S_F32 = 0xae;;
+let _WASM_INS_I64_TRUNC_U_F32 = 0xaf;;
+let _WASM_INS_I64_TRUNC_S_F64 = 0xb0;;
+let _WASM_INS_I64_TRUNC_U_F64 = 0xb1;;
+let _WASM_INS_F32_CONVERT_S_I32 = 0xb2;;
+let _WASM_INS_F32_CONVERT_U_I32 = 0xb3;;
+let _WASM_INS_F32_CONVERT_S_I64 = 0xb4;;
+let _WASM_INS_F32_CONVERT_U_I64 = 0xb5;;
+let _WASM_INS_F32_DEMOTE_F64 = 0xb6;;
+let _WASM_INS_F64_CONVERT_S_I32 = 0xb7;;
+let _WASM_INS_F64_CONVERT_U_I32 = 0xb8;;
+let _WASM_INS_F64_CONVERT_S_I64 = 0xb9;;
+let _WASM_INS_F64_CONVERT_U_I64 = 0xba;;
+let _WASM_INS_F64_PROMOTE_F32 = 0xbb;;
+let _WASM_INS_I32_REINTERPRET_F32 = 0xbc;;
+let _WASM_INS_I64_REINTERPRET_F64 = 0xbd;;
+let _WASM_INS_F32_REINTERPRET_I32 = 0xbe;;
+let _WASM_INS_F64_REINTERPRET_I64 = 0xbf;;
+let _WASM_INS_INVALID = 512;;
+let _WASM_INS_ENDING = 513;;
+
+let _WASM_GRP_INVALID = 0;;
+let _WASM_GRP_NUMBERIC = 8;;
+let _WASM_GRP_PARAMETRIC = 9;;
+let _WASM_GRP_VARIABLE = 10;;
+let _WASM_GRP_MEMORY = 11;;
+let _WASM_GRP_CONTROL = 12;;
+let _WASM_GRP_ENDING = 13;;
diff --git a/capstone/bindings/ocaml/x86.ml b/capstone/bindings/ocaml/x86.ml
new file mode 100644
index 000000000..9e97794cf
--- /dev/null
+++ b/capstone/bindings/ocaml/x86.ml
@@ -0,0 +1,47 @@
+(* Capstone Disassembly Engine
+ * By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
+
+open X86_const
+
+(* architecture specific info of instruction *)
+type x86_op_mem = {
+	segment: int;
+	base: int;
+	index: int;
+	scale: int;
+	disp: int;
+}
+
+type x86_op_value =
+	| X86_OP_INVALID of int
+	| X86_OP_REG of int
+	| X86_OP_IMM of int
+	| X86_OP_MEM of x86_op_mem
+
+type x86_op = {
+	value: x86_op_value;
+	size: int;
+	access: int;
+	avx_bcast: int;
+	avx_zero_opmask: int;
+}
+
+type cs_x86 = { 
+	prefix: int array;
+	opcode: int array;
+	rex: int;
+	addr_size: int;
+	modrm: int;
+	sib: int;
+	disp: int;
+	sib_index: int;
+	sib_scale: int;
+	sib_base: int;
+	xop_cc: int;
+	sse_cc: int;
+	avx_cc: int;
+	avx_sae: int;
+	avx_rm: int;
+	eflags: int;
+	operands: x86_op array;
+}
diff --git a/capstone/bindings/ocaml/x86_const.ml b/capstone/bindings/ocaml/x86_const.ml
new file mode 100644
index 000000000..bfd7b99cb
--- /dev/null
+++ b/capstone/bindings/ocaml/x86_const.ml
@@ -0,0 +1,1989 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.ml] *)
+
+let _X86_REG_INVALID = 0;;
+let _X86_REG_AH = 1;;
+let _X86_REG_AL = 2;;
+let _X86_REG_AX = 3;;
+let _X86_REG_BH = 4;;
+let _X86_REG_BL = 5;;
+let _X86_REG_BP = 6;;
+let _X86_REG_BPL = 7;;
+let _X86_REG_BX = 8;;
+let _X86_REG_CH = 9;;
+let _X86_REG_CL = 10;;
+let _X86_REG_CS = 11;;
+let _X86_REG_CX = 12;;
+let _X86_REG_DH = 13;;
+let _X86_REG_DI = 14;;
+let _X86_REG_DIL = 15;;
+let _X86_REG_DL = 16;;
+let _X86_REG_DS = 17;;
+let _X86_REG_DX = 18;;
+let _X86_REG_EAX = 19;;
+let _X86_REG_EBP = 20;;
+let _X86_REG_EBX = 21;;
+let _X86_REG_ECX = 22;;
+let _X86_REG_EDI = 23;;
+let _X86_REG_EDX = 24;;
+let _X86_REG_EFLAGS = 25;;
+let _X86_REG_EIP = 26;;
+let _X86_REG_EIZ = 27;;
+let _X86_REG_ES = 28;;
+let _X86_REG_ESI = 29;;
+let _X86_REG_ESP = 30;;
+let _X86_REG_FPSW = 31;;
+let _X86_REG_FS = 32;;
+let _X86_REG_GS = 33;;
+let _X86_REG_IP = 34;;
+let _X86_REG_RAX = 35;;
+let _X86_REG_RBP = 36;;
+let _X86_REG_RBX = 37;;
+let _X86_REG_RCX = 38;;
+let _X86_REG_RDI = 39;;
+let _X86_REG_RDX = 40;;
+let _X86_REG_RIP = 41;;
+let _X86_REG_RIZ = 42;;
+let _X86_REG_RSI = 43;;
+let _X86_REG_RSP = 44;;
+let _X86_REG_SI = 45;;
+let _X86_REG_SIL = 46;;
+let _X86_REG_SP = 47;;
+let _X86_REG_SPL = 48;;
+let _X86_REG_SS = 49;;
+let _X86_REG_CR0 = 50;;
+let _X86_REG_CR1 = 51;;
+let _X86_REG_CR2 = 52;;
+let _X86_REG_CR3 = 53;;
+let _X86_REG_CR4 = 54;;
+let _X86_REG_CR5 = 55;;
+let _X86_REG_CR6 = 56;;
+let _X86_REG_CR7 = 57;;
+let _X86_REG_CR8 = 58;;
+let _X86_REG_CR9 = 59;;
+let _X86_REG_CR10 = 60;;
+let _X86_REG_CR11 = 61;;
+let _X86_REG_CR12 = 62;;
+let _X86_REG_CR13 = 63;;
+let _X86_REG_CR14 = 64;;
+let _X86_REG_CR15 = 65;;
+let _X86_REG_DR0 = 66;;
+let _X86_REG_DR1 = 67;;
+let _X86_REG_DR2 = 68;;
+let _X86_REG_DR3 = 69;;
+let _X86_REG_DR4 = 70;;
+let _X86_REG_DR5 = 71;;
+let _X86_REG_DR6 = 72;;
+let _X86_REG_DR7 = 73;;
+let _X86_REG_DR8 = 74;;
+let _X86_REG_DR9 = 75;;
+let _X86_REG_DR10 = 76;;
+let _X86_REG_DR11 = 77;;
+let _X86_REG_DR12 = 78;;
+let _X86_REG_DR13 = 79;;
+let _X86_REG_DR14 = 80;;
+let _X86_REG_DR15 = 81;;
+let _X86_REG_FP0 = 82;;
+let _X86_REG_FP1 = 83;;
+let _X86_REG_FP2 = 84;;
+let _X86_REG_FP3 = 85;;
+let _X86_REG_FP4 = 86;;
+let _X86_REG_FP5 = 87;;
+let _X86_REG_FP6 = 88;;
+let _X86_REG_FP7 = 89;;
+let _X86_REG_K0 = 90;;
+let _X86_REG_K1 = 91;;
+let _X86_REG_K2 = 92;;
+let _X86_REG_K3 = 93;;
+let _X86_REG_K4 = 94;;
+let _X86_REG_K5 = 95;;
+let _X86_REG_K6 = 96;;
+let _X86_REG_K7 = 97;;
+let _X86_REG_MM0 = 98;;
+let _X86_REG_MM1 = 99;;
+let _X86_REG_MM2 = 100;;
+let _X86_REG_MM3 = 101;;
+let _X86_REG_MM4 = 102;;
+let _X86_REG_MM5 = 103;;
+let _X86_REG_MM6 = 104;;
+let _X86_REG_MM7 = 105;;
+let _X86_REG_R8 = 106;;
+let _X86_REG_R9 = 107;;
+let _X86_REG_R10 = 108;;
+let _X86_REG_R11 = 109;;
+let _X86_REG_R12 = 110;;
+let _X86_REG_R13 = 111;;
+let _X86_REG_R14 = 112;;
+let _X86_REG_R15 = 113;;
+let _X86_REG_ST0 = 114;;
+let _X86_REG_ST1 = 115;;
+let _X86_REG_ST2 = 116;;
+let _X86_REG_ST3 = 117;;
+let _X86_REG_ST4 = 118;;
+let _X86_REG_ST5 = 119;;
+let _X86_REG_ST6 = 120;;
+let _X86_REG_ST7 = 121;;
+let _X86_REG_XMM0 = 122;;
+let _X86_REG_XMM1 = 123;;
+let _X86_REG_XMM2 = 124;;
+let _X86_REG_XMM3 = 125;;
+let _X86_REG_XMM4 = 126;;
+let _X86_REG_XMM5 = 127;;
+let _X86_REG_XMM6 = 128;;
+let _X86_REG_XMM7 = 129;;
+let _X86_REG_XMM8 = 130;;
+let _X86_REG_XMM9 = 131;;
+let _X86_REG_XMM10 = 132;;
+let _X86_REG_XMM11 = 133;;
+let _X86_REG_XMM12 = 134;;
+let _X86_REG_XMM13 = 135;;
+let _X86_REG_XMM14 = 136;;
+let _X86_REG_XMM15 = 137;;
+let _X86_REG_XMM16 = 138;;
+let _X86_REG_XMM17 = 139;;
+let _X86_REG_XMM18 = 140;;
+let _X86_REG_XMM19 = 141;;
+let _X86_REG_XMM20 = 142;;
+let _X86_REG_XMM21 = 143;;
+let _X86_REG_XMM22 = 144;;
+let _X86_REG_XMM23 = 145;;
+let _X86_REG_XMM24 = 146;;
+let _X86_REG_XMM25 = 147;;
+let _X86_REG_XMM26 = 148;;
+let _X86_REG_XMM27 = 149;;
+let _X86_REG_XMM28 = 150;;
+let _X86_REG_XMM29 = 151;;
+let _X86_REG_XMM30 = 152;;
+let _X86_REG_XMM31 = 153;;
+let _X86_REG_YMM0 = 154;;
+let _X86_REG_YMM1 = 155;;
+let _X86_REG_YMM2 = 156;;
+let _X86_REG_YMM3 = 157;;
+let _X86_REG_YMM4 = 158;;
+let _X86_REG_YMM5 = 159;;
+let _X86_REG_YMM6 = 160;;
+let _X86_REG_YMM7 = 161;;
+let _X86_REG_YMM8 = 162;;
+let _X86_REG_YMM9 = 163;;
+let _X86_REG_YMM10 = 164;;
+let _X86_REG_YMM11 = 165;;
+let _X86_REG_YMM12 = 166;;
+let _X86_REG_YMM13 = 167;;
+let _X86_REG_YMM14 = 168;;
+let _X86_REG_YMM15 = 169;;
+let _X86_REG_YMM16 = 170;;
+let _X86_REG_YMM17 = 171;;
+let _X86_REG_YMM18 = 172;;
+let _X86_REG_YMM19 = 173;;
+let _X86_REG_YMM20 = 174;;
+let _X86_REG_YMM21 = 175;;
+let _X86_REG_YMM22 = 176;;
+let _X86_REG_YMM23 = 177;;
+let _X86_REG_YMM24 = 178;;
+let _X86_REG_YMM25 = 179;;
+let _X86_REG_YMM26 = 180;;
+let _X86_REG_YMM27 = 181;;
+let _X86_REG_YMM28 = 182;;
+let _X86_REG_YMM29 = 183;;
+let _X86_REG_YMM30 = 184;;
+let _X86_REG_YMM31 = 185;;
+let _X86_REG_ZMM0 = 186;;
+let _X86_REG_ZMM1 = 187;;
+let _X86_REG_ZMM2 = 188;;
+let _X86_REG_ZMM3 = 189;;
+let _X86_REG_ZMM4 = 190;;
+let _X86_REG_ZMM5 = 191;;
+let _X86_REG_ZMM6 = 192;;
+let _X86_REG_ZMM7 = 193;;
+let _X86_REG_ZMM8 = 194;;
+let _X86_REG_ZMM9 = 195;;
+let _X86_REG_ZMM10 = 196;;
+let _X86_REG_ZMM11 = 197;;
+let _X86_REG_ZMM12 = 198;;
+let _X86_REG_ZMM13 = 199;;
+let _X86_REG_ZMM14 = 200;;
+let _X86_REG_ZMM15 = 201;;
+let _X86_REG_ZMM16 = 202;;
+let _X86_REG_ZMM17 = 203;;
+let _X86_REG_ZMM18 = 204;;
+let _X86_REG_ZMM19 = 205;;
+let _X86_REG_ZMM20 = 206;;
+let _X86_REG_ZMM21 = 207;;
+let _X86_REG_ZMM22 = 208;;
+let _X86_REG_ZMM23 = 209;;
+let _X86_REG_ZMM24 = 210;;
+let _X86_REG_ZMM25 = 211;;
+let _X86_REG_ZMM26 = 212;;
+let _X86_REG_ZMM27 = 213;;
+let _X86_REG_ZMM28 = 214;;
+let _X86_REG_ZMM29 = 215;;
+let _X86_REG_ZMM30 = 216;;
+let _X86_REG_ZMM31 = 217;;
+let _X86_REG_R8B = 218;;
+let _X86_REG_R9B = 219;;
+let _X86_REG_R10B = 220;;
+let _X86_REG_R11B = 221;;
+let _X86_REG_R12B = 222;;
+let _X86_REG_R13B = 223;;
+let _X86_REG_R14B = 224;;
+let _X86_REG_R15B = 225;;
+let _X86_REG_R8D = 226;;
+let _X86_REG_R9D = 227;;
+let _X86_REG_R10D = 228;;
+let _X86_REG_R11D = 229;;
+let _X86_REG_R12D = 230;;
+let _X86_REG_R13D = 231;;
+let _X86_REG_R14D = 232;;
+let _X86_REG_R15D = 233;;
+let _X86_REG_R8W = 234;;
+let _X86_REG_R9W = 235;;
+let _X86_REG_R10W = 236;;
+let _X86_REG_R11W = 237;;
+let _X86_REG_R12W = 238;;
+let _X86_REG_R13W = 239;;
+let _X86_REG_R14W = 240;;
+let _X86_REG_R15W = 241;;
+let _X86_REG_BND0 = 242;;
+let _X86_REG_BND1 = 243;;
+let _X86_REG_BND2 = 244;;
+let _X86_REG_BND3 = 245;;
+let _X86_REG_ENDING = 246;;
+let _X86_EFLAGS_MODIFY_AF = 1 lsl 0;;
+let _X86_EFLAGS_MODIFY_CF = 1 lsl 1;;
+let _X86_EFLAGS_MODIFY_SF = 1 lsl 2;;
+let _X86_EFLAGS_MODIFY_ZF = 1 lsl 3;;
+let _X86_EFLAGS_MODIFY_PF = 1 lsl 4;;
+let _X86_EFLAGS_MODIFY_OF = 1 lsl 5;;
+let _X86_EFLAGS_MODIFY_TF = 1 lsl 6;;
+let _X86_EFLAGS_MODIFY_IF = 1 lsl 7;;
+let _X86_EFLAGS_MODIFY_DF = 1 lsl 8;;
+let _X86_EFLAGS_MODIFY_NT = 1 lsl 9;;
+let _X86_EFLAGS_MODIFY_RF = 1 lsl 10;;
+let _X86_EFLAGS_PRIOR_OF = 1 lsl 11;;
+let _X86_EFLAGS_PRIOR_SF = 1 lsl 12;;
+let _X86_EFLAGS_PRIOR_ZF = 1 lsl 13;;
+let _X86_EFLAGS_PRIOR_AF = 1 lsl 14;;
+let _X86_EFLAGS_PRIOR_PF = 1 lsl 15;;
+let _X86_EFLAGS_PRIOR_CF = 1 lsl 16;;
+let _X86_EFLAGS_PRIOR_TF = 1 lsl 17;;
+let _X86_EFLAGS_PRIOR_IF = 1 lsl 18;;
+let _X86_EFLAGS_PRIOR_DF = 1 lsl 19;;
+let _X86_EFLAGS_PRIOR_NT = 1 lsl 20;;
+let _X86_EFLAGS_RESET_OF = 1 lsl 21;;
+let _X86_EFLAGS_RESET_CF = 1 lsl 22;;
+let _X86_EFLAGS_RESET_DF = 1 lsl 23;;
+let _X86_EFLAGS_RESET_IF = 1 lsl 24;;
+let _X86_EFLAGS_RESET_SF = 1 lsl 25;;
+let _X86_EFLAGS_RESET_AF = 1 lsl 26;;
+let _X86_EFLAGS_RESET_TF = 1 lsl 27;;
+let _X86_EFLAGS_RESET_NT = 1 lsl 28;;
+let _X86_EFLAGS_RESET_PF = 1 lsl 29;;
+let _X86_EFLAGS_SET_CF = 1 lsl 30;;
+let _X86_EFLAGS_SET_DF = 1 lsl 31;;
+let _X86_EFLAGS_SET_IF = 1 lsl 32;;
+let _X86_EFLAGS_TEST_OF = 1 lsl 33;;
+let _X86_EFLAGS_TEST_SF = 1 lsl 34;;
+let _X86_EFLAGS_TEST_ZF = 1 lsl 35;;
+let _X86_EFLAGS_TEST_PF = 1 lsl 36;;
+let _X86_EFLAGS_TEST_CF = 1 lsl 37;;
+let _X86_EFLAGS_TEST_NT = 1 lsl 38;;
+let _X86_EFLAGS_TEST_DF = 1 lsl 39;;
+let _X86_EFLAGS_UNDEFINED_OF = 1 lsl 40;;
+let _X86_EFLAGS_UNDEFINED_SF = 1 lsl 41;;
+let _X86_EFLAGS_UNDEFINED_ZF = 1 lsl 42;;
+let _X86_EFLAGS_UNDEFINED_PF = 1 lsl 43;;
+let _X86_EFLAGS_UNDEFINED_AF = 1 lsl 44;;
+let _X86_EFLAGS_UNDEFINED_CF = 1 lsl 45;;
+let _X86_EFLAGS_RESET_RF = 1 lsl 46;;
+let _X86_EFLAGS_TEST_RF = 1 lsl 47;;
+let _X86_EFLAGS_TEST_IF = 1 lsl 48;;
+let _X86_EFLAGS_TEST_TF = 1 lsl 49;;
+let _X86_EFLAGS_TEST_AF = 1 lsl 50;;
+let _X86_EFLAGS_RESET_ZF = 1 lsl 51;;
+let _X86_EFLAGS_SET_OF = 1 lsl 52;;
+let _X86_EFLAGS_SET_SF = 1 lsl 53;;
+let _X86_EFLAGS_SET_ZF = 1 lsl 54;;
+let _X86_EFLAGS_SET_AF = 1 lsl 55;;
+let _X86_EFLAGS_SET_PF = 1 lsl 56;;
+let _X86_EFLAGS_RESET_0F = 1 lsl 57;;
+let _X86_EFLAGS_RESET_AC = 1 lsl 58;;
+let _X86_FPU_FLAGS_MODIFY_C0 = 1 lsl 0;;
+let _X86_FPU_FLAGS_MODIFY_C1 = 1 lsl 1;;
+let _X86_FPU_FLAGS_MODIFY_C2 = 1 lsl 2;;
+let _X86_FPU_FLAGS_MODIFY_C3 = 1 lsl 3;;
+let _X86_FPU_FLAGS_RESET_C0 = 1 lsl 4;;
+let _X86_FPU_FLAGS_RESET_C1 = 1 lsl 5;;
+let _X86_FPU_FLAGS_RESET_C2 = 1 lsl 6;;
+let _X86_FPU_FLAGS_RESET_C3 = 1 lsl 7;;
+let _X86_FPU_FLAGS_SET_C0 = 1 lsl 8;;
+let _X86_FPU_FLAGS_SET_C1 = 1 lsl 9;;
+let _X86_FPU_FLAGS_SET_C2 = 1 lsl 10;;
+let _X86_FPU_FLAGS_SET_C3 = 1 lsl 11;;
+let _X86_FPU_FLAGS_UNDEFINED_C0 = 1 lsl 12;;
+let _X86_FPU_FLAGS_UNDEFINED_C1 = 1 lsl 13;;
+let _X86_FPU_FLAGS_UNDEFINED_C2 = 1 lsl 14;;
+let _X86_FPU_FLAGS_UNDEFINED_C3 = 1 lsl 15;;
+let _X86_FPU_FLAGS_TEST_C0 = 1 lsl 16;;
+let _X86_FPU_FLAGS_TEST_C1 = 1 lsl 17;;
+let _X86_FPU_FLAGS_TEST_C2 = 1 lsl 18;;
+let _X86_FPU_FLAGS_TEST_C3 = 1 lsl 19;;
+
+let _X86_OP_INVALID = 0;;
+let _X86_OP_REG = 1;;
+let _X86_OP_IMM = 2;;
+let _X86_OP_MEM = 3;;
+
+let _X86_XOP_CC_INVALID = 0;;
+let _X86_XOP_CC_LT = 1;;
+let _X86_XOP_CC_LE = 2;;
+let _X86_XOP_CC_GT = 3;;
+let _X86_XOP_CC_GE = 4;;
+let _X86_XOP_CC_EQ = 5;;
+let _X86_XOP_CC_NEQ = 6;;
+let _X86_XOP_CC_FALSE = 7;;
+let _X86_XOP_CC_TRUE = 8;;
+
+let _X86_AVX_BCAST_INVALID = 0;;
+let _X86_AVX_BCAST_2 = 1;;
+let _X86_AVX_BCAST_4 = 2;;
+let _X86_AVX_BCAST_8 = 3;;
+let _X86_AVX_BCAST_16 = 4;;
+
+let _X86_SSE_CC_INVALID = 0;;
+let _X86_SSE_CC_EQ = 1;;
+let _X86_SSE_CC_LT = 2;;
+let _X86_SSE_CC_LE = 3;;
+let _X86_SSE_CC_UNORD = 4;;
+let _X86_SSE_CC_NEQ = 5;;
+let _X86_SSE_CC_NLT = 6;;
+let _X86_SSE_CC_NLE = 7;;
+let _X86_SSE_CC_ORD = 8;;
+
+let _X86_AVX_CC_INVALID = 0;;
+let _X86_AVX_CC_EQ = 1;;
+let _X86_AVX_CC_LT = 2;;
+let _X86_AVX_CC_LE = 3;;
+let _X86_AVX_CC_UNORD = 4;;
+let _X86_AVX_CC_NEQ = 5;;
+let _X86_AVX_CC_NLT = 6;;
+let _X86_AVX_CC_NLE = 7;;
+let _X86_AVX_CC_ORD = 8;;
+let _X86_AVX_CC_EQ_UQ = 9;;
+let _X86_AVX_CC_NGE = 10;;
+let _X86_AVX_CC_NGT = 11;;
+let _X86_AVX_CC_FALSE = 12;;
+let _X86_AVX_CC_NEQ_OQ = 13;;
+let _X86_AVX_CC_GE = 14;;
+let _X86_AVX_CC_GT = 15;;
+let _X86_AVX_CC_TRUE = 16;;
+let _X86_AVX_CC_EQ_OS = 17;;
+let _X86_AVX_CC_LT_OQ = 18;;
+let _X86_AVX_CC_LE_OQ = 19;;
+let _X86_AVX_CC_UNORD_S = 20;;
+let _X86_AVX_CC_NEQ_US = 21;;
+let _X86_AVX_CC_NLT_UQ = 22;;
+let _X86_AVX_CC_NLE_UQ = 23;;
+let _X86_AVX_CC_ORD_S = 24;;
+let _X86_AVX_CC_EQ_US = 25;;
+let _X86_AVX_CC_NGE_UQ = 26;;
+let _X86_AVX_CC_NGT_UQ = 27;;
+let _X86_AVX_CC_FALSE_OS = 28;;
+let _X86_AVX_CC_NEQ_OS = 29;;
+let _X86_AVX_CC_GE_OQ = 30;;
+let _X86_AVX_CC_GT_OQ = 31;;
+let _X86_AVX_CC_TRUE_US = 32;;
+
+let _X86_AVX_RM_INVALID = 0;;
+let _X86_AVX_RM_RN = 1;;
+let _X86_AVX_RM_RD = 2;;
+let _X86_AVX_RM_RU = 3;;
+let _X86_AVX_RM_RZ = 4;;
+let _X86_PREFIX_LOCK = 0xf0;;
+let _X86_PREFIX_REP = 0xf3;;
+let _X86_PREFIX_REPE = 0xf3;;
+let _X86_PREFIX_REPNE = 0xf2;;
+let _X86_PREFIX_CS = 0x2e;;
+let _X86_PREFIX_SS = 0x36;;
+let _X86_PREFIX_DS = 0x3e;;
+let _X86_PREFIX_ES = 0x26;;
+let _X86_PREFIX_FS = 0x64;;
+let _X86_PREFIX_GS = 0x65;;
+let _X86_PREFIX_OPSIZE = 0x66;;
+let _X86_PREFIX_ADDRSIZE = 0x67;;
+
+let _X86_INS_INVALID = 0;;
+let _X86_INS_AAA = 1;;
+let _X86_INS_AAD = 2;;
+let _X86_INS_AAM = 3;;
+let _X86_INS_AAS = 4;;
+let _X86_INS_FABS = 5;;
+let _X86_INS_ADC = 6;;
+let _X86_INS_ADCX = 7;;
+let _X86_INS_ADD = 8;;
+let _X86_INS_ADDPD = 9;;
+let _X86_INS_ADDPS = 10;;
+let _X86_INS_ADDSD = 11;;
+let _X86_INS_ADDSS = 12;;
+let _X86_INS_ADDSUBPD = 13;;
+let _X86_INS_ADDSUBPS = 14;;
+let _X86_INS_FADD = 15;;
+let _X86_INS_FIADD = 16;;
+let _X86_INS_ADOX = 17;;
+let _X86_INS_AESDECLAST = 18;;
+let _X86_INS_AESDEC = 19;;
+let _X86_INS_AESENCLAST = 20;;
+let _X86_INS_AESENC = 21;;
+let _X86_INS_AESIMC = 22;;
+let _X86_INS_AESKEYGENASSIST = 23;;
+let _X86_INS_AND = 24;;
+let _X86_INS_ANDN = 25;;
+let _X86_INS_ANDNPD = 26;;
+let _X86_INS_ANDNPS = 27;;
+let _X86_INS_ANDPD = 28;;
+let _X86_INS_ANDPS = 29;;
+let _X86_INS_ARPL = 30;;
+let _X86_INS_BEXTR = 31;;
+let _X86_INS_BLCFILL = 32;;
+let _X86_INS_BLCI = 33;;
+let _X86_INS_BLCIC = 34;;
+let _X86_INS_BLCMSK = 35;;
+let _X86_INS_BLCS = 36;;
+let _X86_INS_BLENDPD = 37;;
+let _X86_INS_BLENDPS = 38;;
+let _X86_INS_BLENDVPD = 39;;
+let _X86_INS_BLENDVPS = 40;;
+let _X86_INS_BLSFILL = 41;;
+let _X86_INS_BLSI = 42;;
+let _X86_INS_BLSIC = 43;;
+let _X86_INS_BLSMSK = 44;;
+let _X86_INS_BLSR = 45;;
+let _X86_INS_BNDCL = 46;;
+let _X86_INS_BNDCN = 47;;
+let _X86_INS_BNDCU = 48;;
+let _X86_INS_BNDLDX = 49;;
+let _X86_INS_BNDMK = 50;;
+let _X86_INS_BNDMOV = 51;;
+let _X86_INS_BNDSTX = 52;;
+let _X86_INS_BOUND = 53;;
+let _X86_INS_BSF = 54;;
+let _X86_INS_BSR = 55;;
+let _X86_INS_BSWAP = 56;;
+let _X86_INS_BT = 57;;
+let _X86_INS_BTC = 58;;
+let _X86_INS_BTR = 59;;
+let _X86_INS_BTS = 60;;
+let _X86_INS_BZHI = 61;;
+let _X86_INS_CALL = 62;;
+let _X86_INS_CBW = 63;;
+let _X86_INS_CDQ = 64;;
+let _X86_INS_CDQE = 65;;
+let _X86_INS_FCHS = 66;;
+let _X86_INS_CLAC = 67;;
+let _X86_INS_CLC = 68;;
+let _X86_INS_CLD = 69;;
+let _X86_INS_CLDEMOTE = 70;;
+let _X86_INS_CLFLUSH = 71;;
+let _X86_INS_CLFLUSHOPT = 72;;
+let _X86_INS_CLGI = 73;;
+let _X86_INS_CLI = 74;;
+let _X86_INS_CLRSSBSY = 75;;
+let _X86_INS_CLTS = 76;;
+let _X86_INS_CLWB = 77;;
+let _X86_INS_CLZERO = 78;;
+let _X86_INS_CMC = 79;;
+let _X86_INS_CMOVA = 80;;
+let _X86_INS_CMOVAE = 81;;
+let _X86_INS_CMOVB = 82;;
+let _X86_INS_CMOVBE = 83;;
+let _X86_INS_FCMOVBE = 84;;
+let _X86_INS_FCMOVB = 85;;
+let _X86_INS_CMOVE = 86;;
+let _X86_INS_FCMOVE = 87;;
+let _X86_INS_CMOVG = 88;;
+let _X86_INS_CMOVGE = 89;;
+let _X86_INS_CMOVL = 90;;
+let _X86_INS_CMOVLE = 91;;
+let _X86_INS_FCMOVNBE = 92;;
+let _X86_INS_FCMOVNB = 93;;
+let _X86_INS_CMOVNE = 94;;
+let _X86_INS_FCMOVNE = 95;;
+let _X86_INS_CMOVNO = 96;;
+let _X86_INS_CMOVNP = 97;;
+let _X86_INS_FCMOVNU = 98;;
+let _X86_INS_FCMOVNP = 99;;
+let _X86_INS_CMOVNS = 100;;
+let _X86_INS_CMOVO = 101;;
+let _X86_INS_CMOVP = 102;;
+let _X86_INS_FCMOVU = 103;;
+let _X86_INS_CMOVS = 104;;
+let _X86_INS_CMP = 105;;
+let _X86_INS_CMPPD = 106;;
+let _X86_INS_CMPPS = 107;;
+let _X86_INS_CMPSB = 108;;
+let _X86_INS_CMPSD = 109;;
+let _X86_INS_CMPSQ = 110;;
+let _X86_INS_CMPSS = 111;;
+let _X86_INS_CMPSW = 112;;
+let _X86_INS_CMPXCHG16B = 113;;
+let _X86_INS_CMPXCHG = 114;;
+let _X86_INS_CMPXCHG8B = 115;;
+let _X86_INS_COMISD = 116;;
+let _X86_INS_COMISS = 117;;
+let _X86_INS_FCOMP = 118;;
+let _X86_INS_FCOMPI = 119;;
+let _X86_INS_FCOMI = 120;;
+let _X86_INS_FCOM = 121;;
+let _X86_INS_FCOS = 122;;
+let _X86_INS_CPUID = 123;;
+let _X86_INS_CQO = 124;;
+let _X86_INS_CRC32 = 125;;
+let _X86_INS_CVTDQ2PD = 126;;
+let _X86_INS_CVTDQ2PS = 127;;
+let _X86_INS_CVTPD2DQ = 128;;
+let _X86_INS_CVTPD2PS = 129;;
+let _X86_INS_CVTPS2DQ = 130;;
+let _X86_INS_CVTPS2PD = 131;;
+let _X86_INS_CVTSD2SI = 132;;
+let _X86_INS_CVTSD2SS = 133;;
+let _X86_INS_CVTSI2SD = 134;;
+let _X86_INS_CVTSI2SS = 135;;
+let _X86_INS_CVTSS2SD = 136;;
+let _X86_INS_CVTSS2SI = 137;;
+let _X86_INS_CVTTPD2DQ = 138;;
+let _X86_INS_CVTTPS2DQ = 139;;
+let _X86_INS_CVTTSD2SI = 140;;
+let _X86_INS_CVTTSS2SI = 141;;
+let _X86_INS_CWD = 142;;
+let _X86_INS_CWDE = 143;;
+let _X86_INS_DAA = 144;;
+let _X86_INS_DAS = 145;;
+let _X86_INS_DATA16 = 146;;
+let _X86_INS_DEC = 147;;
+let _X86_INS_DIV = 148;;
+let _X86_INS_DIVPD = 149;;
+let _X86_INS_DIVPS = 150;;
+let _X86_INS_FDIVR = 151;;
+let _X86_INS_FIDIVR = 152;;
+let _X86_INS_FDIVRP = 153;;
+let _X86_INS_DIVSD = 154;;
+let _X86_INS_DIVSS = 155;;
+let _X86_INS_FDIV = 156;;
+let _X86_INS_FIDIV = 157;;
+let _X86_INS_FDIVP = 158;;
+let _X86_INS_DPPD = 159;;
+let _X86_INS_DPPS = 160;;
+let _X86_INS_ENCLS = 161;;
+let _X86_INS_ENCLU = 162;;
+let _X86_INS_ENCLV = 163;;
+let _X86_INS_ENDBR32 = 164;;
+let _X86_INS_ENDBR64 = 165;;
+let _X86_INS_ENTER = 166;;
+let _X86_INS_EXTRACTPS = 167;;
+let _X86_INS_EXTRQ = 168;;
+let _X86_INS_F2XM1 = 169;;
+let _X86_INS_LCALL = 170;;
+let _X86_INS_LJMP = 171;;
+let _X86_INS_JMP = 172;;
+let _X86_INS_FBLD = 173;;
+let _X86_INS_FBSTP = 174;;
+let _X86_INS_FCOMPP = 175;;
+let _X86_INS_FDECSTP = 176;;
+let _X86_INS_FDISI8087_NOP = 177;;
+let _X86_INS_FEMMS = 178;;
+let _X86_INS_FENI8087_NOP = 179;;
+let _X86_INS_FFREE = 180;;
+let _X86_INS_FFREEP = 181;;
+let _X86_INS_FICOM = 182;;
+let _X86_INS_FICOMP = 183;;
+let _X86_INS_FINCSTP = 184;;
+let _X86_INS_FLDCW = 185;;
+let _X86_INS_FLDENV = 186;;
+let _X86_INS_FLDL2E = 187;;
+let _X86_INS_FLDL2T = 188;;
+let _X86_INS_FLDLG2 = 189;;
+let _X86_INS_FLDLN2 = 190;;
+let _X86_INS_FLDPI = 191;;
+let _X86_INS_FNCLEX = 192;;
+let _X86_INS_FNINIT = 193;;
+let _X86_INS_FNOP = 194;;
+let _X86_INS_FNSTCW = 195;;
+let _X86_INS_FNSTSW = 196;;
+let _X86_INS_FPATAN = 197;;
+let _X86_INS_FSTPNCE = 198;;
+let _X86_INS_FPREM = 199;;
+let _X86_INS_FPREM1 = 200;;
+let _X86_INS_FPTAN = 201;;
+let _X86_INS_FRNDINT = 202;;
+let _X86_INS_FRSTOR = 203;;
+let _X86_INS_FNSAVE = 204;;
+let _X86_INS_FSCALE = 205;;
+let _X86_INS_FSETPM = 206;;
+let _X86_INS_FSINCOS = 207;;
+let _X86_INS_FNSTENV = 208;;
+let _X86_INS_FXAM = 209;;
+let _X86_INS_FXRSTOR = 210;;
+let _X86_INS_FXRSTOR64 = 211;;
+let _X86_INS_FXSAVE = 212;;
+let _X86_INS_FXSAVE64 = 213;;
+let _X86_INS_FXTRACT = 214;;
+let _X86_INS_FYL2X = 215;;
+let _X86_INS_FYL2XP1 = 216;;
+let _X86_INS_GETSEC = 217;;
+let _X86_INS_GF2P8AFFINEINVQB = 218;;
+let _X86_INS_GF2P8AFFINEQB = 219;;
+let _X86_INS_GF2P8MULB = 220;;
+let _X86_INS_HADDPD = 221;;
+let _X86_INS_HADDPS = 222;;
+let _X86_INS_HLT = 223;;
+let _X86_INS_HSUBPD = 224;;
+let _X86_INS_HSUBPS = 225;;
+let _X86_INS_IDIV = 226;;
+let _X86_INS_FILD = 227;;
+let _X86_INS_IMUL = 228;;
+let _X86_INS_IN = 229;;
+let _X86_INS_INC = 230;;
+let _X86_INS_INCSSPD = 231;;
+let _X86_INS_INCSSPQ = 232;;
+let _X86_INS_INSB = 233;;
+let _X86_INS_INSERTPS = 234;;
+let _X86_INS_INSERTQ = 235;;
+let _X86_INS_INSD = 236;;
+let _X86_INS_INSW = 237;;
+let _X86_INS_INT = 238;;
+let _X86_INS_INT1 = 239;;
+let _X86_INS_INT3 = 240;;
+let _X86_INS_INTO = 241;;
+let _X86_INS_INVD = 242;;
+let _X86_INS_INVEPT = 243;;
+let _X86_INS_INVLPG = 244;;
+let _X86_INS_INVLPGA = 245;;
+let _X86_INS_INVPCID = 246;;
+let _X86_INS_INVVPID = 247;;
+let _X86_INS_IRET = 248;;
+let _X86_INS_IRETD = 249;;
+let _X86_INS_IRETQ = 250;;
+let _X86_INS_FISTTP = 251;;
+let _X86_INS_FIST = 252;;
+let _X86_INS_FISTP = 253;;
+let _X86_INS_JAE = 254;;
+let _X86_INS_JA = 255;;
+let _X86_INS_JBE = 256;;
+let _X86_INS_JB = 257;;
+let _X86_INS_JCXZ = 258;;
+let _X86_INS_JECXZ = 259;;
+let _X86_INS_JE = 260;;
+let _X86_INS_JGE = 261;;
+let _X86_INS_JG = 262;;
+let _X86_INS_JLE = 263;;
+let _X86_INS_JL = 264;;
+let _X86_INS_JNE = 265;;
+let _X86_INS_JNO = 266;;
+let _X86_INS_JNP = 267;;
+let _X86_INS_JNS = 268;;
+let _X86_INS_JO = 269;;
+let _X86_INS_JP = 270;;
+let _X86_INS_JRCXZ = 271;;
+let _X86_INS_JS = 272;;
+let _X86_INS_KADDB = 273;;
+let _X86_INS_KADDD = 274;;
+let _X86_INS_KADDQ = 275;;
+let _X86_INS_KADDW = 276;;
+let _X86_INS_KANDB = 277;;
+let _X86_INS_KANDD = 278;;
+let _X86_INS_KANDNB = 279;;
+let _X86_INS_KANDND = 280;;
+let _X86_INS_KANDNQ = 281;;
+let _X86_INS_KANDNW = 282;;
+let _X86_INS_KANDQ = 283;;
+let _X86_INS_KANDW = 284;;
+let _X86_INS_KMOVB = 285;;
+let _X86_INS_KMOVD = 286;;
+let _X86_INS_KMOVQ = 287;;
+let _X86_INS_KMOVW = 288;;
+let _X86_INS_KNOTB = 289;;
+let _X86_INS_KNOTD = 290;;
+let _X86_INS_KNOTQ = 291;;
+let _X86_INS_KNOTW = 292;;
+let _X86_INS_KORB = 293;;
+let _X86_INS_KORD = 294;;
+let _X86_INS_KORQ = 295;;
+let _X86_INS_KORTESTB = 296;;
+let _X86_INS_KORTESTD = 297;;
+let _X86_INS_KORTESTQ = 298;;
+let _X86_INS_KORTESTW = 299;;
+let _X86_INS_KORW = 300;;
+let _X86_INS_KSHIFTLB = 301;;
+let _X86_INS_KSHIFTLD = 302;;
+let _X86_INS_KSHIFTLQ = 303;;
+let _X86_INS_KSHIFTLW = 304;;
+let _X86_INS_KSHIFTRB = 305;;
+let _X86_INS_KSHIFTRD = 306;;
+let _X86_INS_KSHIFTRQ = 307;;
+let _X86_INS_KSHIFTRW = 308;;
+let _X86_INS_KTESTB = 309;;
+let _X86_INS_KTESTD = 310;;
+let _X86_INS_KTESTQ = 311;;
+let _X86_INS_KTESTW = 312;;
+let _X86_INS_KUNPCKBW = 313;;
+let _X86_INS_KUNPCKDQ = 314;;
+let _X86_INS_KUNPCKWD = 315;;
+let _X86_INS_KXNORB = 316;;
+let _X86_INS_KXNORD = 317;;
+let _X86_INS_KXNORQ = 318;;
+let _X86_INS_KXNORW = 319;;
+let _X86_INS_KXORB = 320;;
+let _X86_INS_KXORD = 321;;
+let _X86_INS_KXORQ = 322;;
+let _X86_INS_KXORW = 323;;
+let _X86_INS_LAHF = 324;;
+let _X86_INS_LAR = 325;;
+let _X86_INS_LDDQU = 326;;
+let _X86_INS_LDMXCSR = 327;;
+let _X86_INS_LDS = 328;;
+let _X86_INS_FLDZ = 329;;
+let _X86_INS_FLD1 = 330;;
+let _X86_INS_FLD = 331;;
+let _X86_INS_LEA = 332;;
+let _X86_INS_LEAVE = 333;;
+let _X86_INS_LES = 334;;
+let _X86_INS_LFENCE = 335;;
+let _X86_INS_LFS = 336;;
+let _X86_INS_LGDT = 337;;
+let _X86_INS_LGS = 338;;
+let _X86_INS_LIDT = 339;;
+let _X86_INS_LLDT = 340;;
+let _X86_INS_LLWPCB = 341;;
+let _X86_INS_LMSW = 342;;
+let _X86_INS_LOCK = 343;;
+let _X86_INS_LODSB = 344;;
+let _X86_INS_LODSD = 345;;
+let _X86_INS_LODSQ = 346;;
+let _X86_INS_LODSW = 347;;
+let _X86_INS_LOOP = 348;;
+let _X86_INS_LOOPE = 349;;
+let _X86_INS_LOOPNE = 350;;
+let _X86_INS_RETF = 351;;
+let _X86_INS_RETFQ = 352;;
+let _X86_INS_LSL = 353;;
+let _X86_INS_LSS = 354;;
+let _X86_INS_LTR = 355;;
+let _X86_INS_LWPINS = 356;;
+let _X86_INS_LWPVAL = 357;;
+let _X86_INS_LZCNT = 358;;
+let _X86_INS_MASKMOVDQU = 359;;
+let _X86_INS_MAXPD = 360;;
+let _X86_INS_MAXPS = 361;;
+let _X86_INS_MAXSD = 362;;
+let _X86_INS_MAXSS = 363;;
+let _X86_INS_MFENCE = 364;;
+let _X86_INS_MINPD = 365;;
+let _X86_INS_MINPS = 366;;
+let _X86_INS_MINSD = 367;;
+let _X86_INS_MINSS = 368;;
+let _X86_INS_CVTPD2PI = 369;;
+let _X86_INS_CVTPI2PD = 370;;
+let _X86_INS_CVTPI2PS = 371;;
+let _X86_INS_CVTPS2PI = 372;;
+let _X86_INS_CVTTPD2PI = 373;;
+let _X86_INS_CVTTPS2PI = 374;;
+let _X86_INS_EMMS = 375;;
+let _X86_INS_MASKMOVQ = 376;;
+let _X86_INS_MOVD = 377;;
+let _X86_INS_MOVQ = 378;;
+let _X86_INS_MOVDQ2Q = 379;;
+let _X86_INS_MOVNTQ = 380;;
+let _X86_INS_MOVQ2DQ = 381;;
+let _X86_INS_PABSB = 382;;
+let _X86_INS_PABSD = 383;;
+let _X86_INS_PABSW = 384;;
+let _X86_INS_PACKSSDW = 385;;
+let _X86_INS_PACKSSWB = 386;;
+let _X86_INS_PACKUSWB = 387;;
+let _X86_INS_PADDB = 388;;
+let _X86_INS_PADDD = 389;;
+let _X86_INS_PADDQ = 390;;
+let _X86_INS_PADDSB = 391;;
+let _X86_INS_PADDSW = 392;;
+let _X86_INS_PADDUSB = 393;;
+let _X86_INS_PADDUSW = 394;;
+let _X86_INS_PADDW = 395;;
+let _X86_INS_PALIGNR = 396;;
+let _X86_INS_PANDN = 397;;
+let _X86_INS_PAND = 398;;
+let _X86_INS_PAVGB = 399;;
+let _X86_INS_PAVGW = 400;;
+let _X86_INS_PCMPEQB = 401;;
+let _X86_INS_PCMPEQD = 402;;
+let _X86_INS_PCMPEQW = 403;;
+let _X86_INS_PCMPGTB = 404;;
+let _X86_INS_PCMPGTD = 405;;
+let _X86_INS_PCMPGTW = 406;;
+let _X86_INS_PEXTRW = 407;;
+let _X86_INS_PHADDD = 408;;
+let _X86_INS_PHADDSW = 409;;
+let _X86_INS_PHADDW = 410;;
+let _X86_INS_PHSUBD = 411;;
+let _X86_INS_PHSUBSW = 412;;
+let _X86_INS_PHSUBW = 413;;
+let _X86_INS_PINSRW = 414;;
+let _X86_INS_PMADDUBSW = 415;;
+let _X86_INS_PMADDWD = 416;;
+let _X86_INS_PMAXSW = 417;;
+let _X86_INS_PMAXUB = 418;;
+let _X86_INS_PMINSW = 419;;
+let _X86_INS_PMINUB = 420;;
+let _X86_INS_PMOVMSKB = 421;;
+let _X86_INS_PMULHRSW = 422;;
+let _X86_INS_PMULHUW = 423;;
+let _X86_INS_PMULHW = 424;;
+let _X86_INS_PMULLW = 425;;
+let _X86_INS_PMULUDQ = 426;;
+let _X86_INS_POR = 427;;
+let _X86_INS_PSADBW = 428;;
+let _X86_INS_PSHUFB = 429;;
+let _X86_INS_PSHUFW = 430;;
+let _X86_INS_PSIGNB = 431;;
+let _X86_INS_PSIGND = 432;;
+let _X86_INS_PSIGNW = 433;;
+let _X86_INS_PSLLD = 434;;
+let _X86_INS_PSLLQ = 435;;
+let _X86_INS_PSLLW = 436;;
+let _X86_INS_PSRAD = 437;;
+let _X86_INS_PSRAW = 438;;
+let _X86_INS_PSRLD = 439;;
+let _X86_INS_PSRLQ = 440;;
+let _X86_INS_PSRLW = 441;;
+let _X86_INS_PSUBB = 442;;
+let _X86_INS_PSUBD = 443;;
+let _X86_INS_PSUBQ = 444;;
+let _X86_INS_PSUBSB = 445;;
+let _X86_INS_PSUBSW = 446;;
+let _X86_INS_PSUBUSB = 447;;
+let _X86_INS_PSUBUSW = 448;;
+let _X86_INS_PSUBW = 449;;
+let _X86_INS_PUNPCKHBW = 450;;
+let _X86_INS_PUNPCKHDQ = 451;;
+let _X86_INS_PUNPCKHWD = 452;;
+let _X86_INS_PUNPCKLBW = 453;;
+let _X86_INS_PUNPCKLDQ = 454;;
+let _X86_INS_PUNPCKLWD = 455;;
+let _X86_INS_PXOR = 456;;
+let _X86_INS_MONITORX = 457;;
+let _X86_INS_MONITOR = 458;;
+let _X86_INS_MONTMUL = 459;;
+let _X86_INS_MOV = 460;;
+let _X86_INS_MOVABS = 461;;
+let _X86_INS_MOVAPD = 462;;
+let _X86_INS_MOVAPS = 463;;
+let _X86_INS_MOVBE = 464;;
+let _X86_INS_MOVDDUP = 465;;
+let _X86_INS_MOVDIR64B = 466;;
+let _X86_INS_MOVDIRI = 467;;
+let _X86_INS_MOVDQA = 468;;
+let _X86_INS_MOVDQU = 469;;
+let _X86_INS_MOVHLPS = 470;;
+let _X86_INS_MOVHPD = 471;;
+let _X86_INS_MOVHPS = 472;;
+let _X86_INS_MOVLHPS = 473;;
+let _X86_INS_MOVLPD = 474;;
+let _X86_INS_MOVLPS = 475;;
+let _X86_INS_MOVMSKPD = 476;;
+let _X86_INS_MOVMSKPS = 477;;
+let _X86_INS_MOVNTDQA = 478;;
+let _X86_INS_MOVNTDQ = 479;;
+let _X86_INS_MOVNTI = 480;;
+let _X86_INS_MOVNTPD = 481;;
+let _X86_INS_MOVNTPS = 482;;
+let _X86_INS_MOVNTSD = 483;;
+let _X86_INS_MOVNTSS = 484;;
+let _X86_INS_MOVSB = 485;;
+let _X86_INS_MOVSD = 486;;
+let _X86_INS_MOVSHDUP = 487;;
+let _X86_INS_MOVSLDUP = 488;;
+let _X86_INS_MOVSQ = 489;;
+let _X86_INS_MOVSS = 490;;
+let _X86_INS_MOVSW = 491;;
+let _X86_INS_MOVSX = 492;;
+let _X86_INS_MOVSXD = 493;;
+let _X86_INS_MOVUPD = 494;;
+let _X86_INS_MOVUPS = 495;;
+let _X86_INS_MOVZX = 496;;
+let _X86_INS_MPSADBW = 497;;
+let _X86_INS_MUL = 498;;
+let _X86_INS_MULPD = 499;;
+let _X86_INS_MULPS = 500;;
+let _X86_INS_MULSD = 501;;
+let _X86_INS_MULSS = 502;;
+let _X86_INS_MULX = 503;;
+let _X86_INS_FMUL = 504;;
+let _X86_INS_FIMUL = 505;;
+let _X86_INS_FMULP = 506;;
+let _X86_INS_MWAITX = 507;;
+let _X86_INS_MWAIT = 508;;
+let _X86_INS_NEG = 509;;
+let _X86_INS_NOP = 510;;
+let _X86_INS_NOT = 511;;
+let _X86_INS_OR = 512;;
+let _X86_INS_ORPD = 513;;
+let _X86_INS_ORPS = 514;;
+let _X86_INS_OUT = 515;;
+let _X86_INS_OUTSB = 516;;
+let _X86_INS_OUTSD = 517;;
+let _X86_INS_OUTSW = 518;;
+let _X86_INS_PACKUSDW = 519;;
+let _X86_INS_PAUSE = 520;;
+let _X86_INS_PAVGUSB = 521;;
+let _X86_INS_PBLENDVB = 522;;
+let _X86_INS_PBLENDW = 523;;
+let _X86_INS_PCLMULQDQ = 524;;
+let _X86_INS_PCMPEQQ = 525;;
+let _X86_INS_PCMPESTRI = 526;;
+let _X86_INS_PCMPESTRM = 527;;
+let _X86_INS_PCMPGTQ = 528;;
+let _X86_INS_PCMPISTRI = 529;;
+let _X86_INS_PCMPISTRM = 530;;
+let _X86_INS_PCONFIG = 531;;
+let _X86_INS_PDEP = 532;;
+let _X86_INS_PEXT = 533;;
+let _X86_INS_PEXTRB = 534;;
+let _X86_INS_PEXTRD = 535;;
+let _X86_INS_PEXTRQ = 536;;
+let _X86_INS_PF2ID = 537;;
+let _X86_INS_PF2IW = 538;;
+let _X86_INS_PFACC = 539;;
+let _X86_INS_PFADD = 540;;
+let _X86_INS_PFCMPEQ = 541;;
+let _X86_INS_PFCMPGE = 542;;
+let _X86_INS_PFCMPGT = 543;;
+let _X86_INS_PFMAX = 544;;
+let _X86_INS_PFMIN = 545;;
+let _X86_INS_PFMUL = 546;;
+let _X86_INS_PFNACC = 547;;
+let _X86_INS_PFPNACC = 548;;
+let _X86_INS_PFRCPIT1 = 549;;
+let _X86_INS_PFRCPIT2 = 550;;
+let _X86_INS_PFRCP = 551;;
+let _X86_INS_PFRSQIT1 = 552;;
+let _X86_INS_PFRSQRT = 553;;
+let _X86_INS_PFSUBR = 554;;
+let _X86_INS_PFSUB = 555;;
+let _X86_INS_PHMINPOSUW = 556;;
+let _X86_INS_PI2FD = 557;;
+let _X86_INS_PI2FW = 558;;
+let _X86_INS_PINSRB = 559;;
+let _X86_INS_PINSRD = 560;;
+let _X86_INS_PINSRQ = 561;;
+let _X86_INS_PMAXSB = 562;;
+let _X86_INS_PMAXSD = 563;;
+let _X86_INS_PMAXUD = 564;;
+let _X86_INS_PMAXUW = 565;;
+let _X86_INS_PMINSB = 566;;
+let _X86_INS_PMINSD = 567;;
+let _X86_INS_PMINUD = 568;;
+let _X86_INS_PMINUW = 569;;
+let _X86_INS_PMOVSXBD = 570;;
+let _X86_INS_PMOVSXBQ = 571;;
+let _X86_INS_PMOVSXBW = 572;;
+let _X86_INS_PMOVSXDQ = 573;;
+let _X86_INS_PMOVSXWD = 574;;
+let _X86_INS_PMOVSXWQ = 575;;
+let _X86_INS_PMOVZXBD = 576;;
+let _X86_INS_PMOVZXBQ = 577;;
+let _X86_INS_PMOVZXBW = 578;;
+let _X86_INS_PMOVZXDQ = 579;;
+let _X86_INS_PMOVZXWD = 580;;
+let _X86_INS_PMOVZXWQ = 581;;
+let _X86_INS_PMULDQ = 582;;
+let _X86_INS_PMULHRW = 583;;
+let _X86_INS_PMULLD = 584;;
+let _X86_INS_POP = 585;;
+let _X86_INS_POPAW = 586;;
+let _X86_INS_POPAL = 587;;
+let _X86_INS_POPCNT = 588;;
+let _X86_INS_POPF = 589;;
+let _X86_INS_POPFD = 590;;
+let _X86_INS_POPFQ = 591;;
+let _X86_INS_PREFETCH = 592;;
+let _X86_INS_PREFETCHNTA = 593;;
+let _X86_INS_PREFETCHT0 = 594;;
+let _X86_INS_PREFETCHT1 = 595;;
+let _X86_INS_PREFETCHT2 = 596;;
+let _X86_INS_PREFETCHW = 597;;
+let _X86_INS_PREFETCHWT1 = 598;;
+let _X86_INS_PSHUFD = 599;;
+let _X86_INS_PSHUFHW = 600;;
+let _X86_INS_PSHUFLW = 601;;
+let _X86_INS_PSLLDQ = 602;;
+let _X86_INS_PSRLDQ = 603;;
+let _X86_INS_PSWAPD = 604;;
+let _X86_INS_PTEST = 605;;
+let _X86_INS_PTWRITE = 606;;
+let _X86_INS_PUNPCKHQDQ = 607;;
+let _X86_INS_PUNPCKLQDQ = 608;;
+let _X86_INS_PUSH = 609;;
+let _X86_INS_PUSHAW = 610;;
+let _X86_INS_PUSHAL = 611;;
+let _X86_INS_PUSHF = 612;;
+let _X86_INS_PUSHFD = 613;;
+let _X86_INS_PUSHFQ = 614;;
+let _X86_INS_RCL = 615;;
+let _X86_INS_RCPPS = 616;;
+let _X86_INS_RCPSS = 617;;
+let _X86_INS_RCR = 618;;
+let _X86_INS_RDFSBASE = 619;;
+let _X86_INS_RDGSBASE = 620;;
+let _X86_INS_RDMSR = 621;;
+let _X86_INS_RDPID = 622;;
+let _X86_INS_RDPKRU = 623;;
+let _X86_INS_RDPMC = 624;;
+let _X86_INS_RDRAND = 625;;
+let _X86_INS_RDSEED = 626;;
+let _X86_INS_RDSSPD = 627;;
+let _X86_INS_RDSSPQ = 628;;
+let _X86_INS_RDTSC = 629;;
+let _X86_INS_RDTSCP = 630;;
+let _X86_INS_REPNE = 631;;
+let _X86_INS_REP = 632;;
+let _X86_INS_RET = 633;;
+let _X86_INS_REX64 = 634;;
+let _X86_INS_ROL = 635;;
+let _X86_INS_ROR = 636;;
+let _X86_INS_RORX = 637;;
+let _X86_INS_ROUNDPD = 638;;
+let _X86_INS_ROUNDPS = 639;;
+let _X86_INS_ROUNDSD = 640;;
+let _X86_INS_ROUNDSS = 641;;
+let _X86_INS_RSM = 642;;
+let _X86_INS_RSQRTPS = 643;;
+let _X86_INS_RSQRTSS = 644;;
+let _X86_INS_RSTORSSP = 645;;
+let _X86_INS_SAHF = 646;;
+let _X86_INS_SAL = 647;;
+let _X86_INS_SALC = 648;;
+let _X86_INS_SAR = 649;;
+let _X86_INS_SARX = 650;;
+let _X86_INS_SAVEPREVSSP = 651;;
+let _X86_INS_SBB = 652;;
+let _X86_INS_SCASB = 653;;
+let _X86_INS_SCASD = 654;;
+let _X86_INS_SCASQ = 655;;
+let _X86_INS_SCASW = 656;;
+let _X86_INS_SETAE = 657;;
+let _X86_INS_SETA = 658;;
+let _X86_INS_SETBE = 659;;
+let _X86_INS_SETB = 660;;
+let _X86_INS_SETE = 661;;
+let _X86_INS_SETGE = 662;;
+let _X86_INS_SETG = 663;;
+let _X86_INS_SETLE = 664;;
+let _X86_INS_SETL = 665;;
+let _X86_INS_SETNE = 666;;
+let _X86_INS_SETNO = 667;;
+let _X86_INS_SETNP = 668;;
+let _X86_INS_SETNS = 669;;
+let _X86_INS_SETO = 670;;
+let _X86_INS_SETP = 671;;
+let _X86_INS_SETSSBSY = 672;;
+let _X86_INS_SETS = 673;;
+let _X86_INS_SFENCE = 674;;
+let _X86_INS_SGDT = 675;;
+let _X86_INS_SHA1MSG1 = 676;;
+let _X86_INS_SHA1MSG2 = 677;;
+let _X86_INS_SHA1NEXTE = 678;;
+let _X86_INS_SHA1RNDS4 = 679;;
+let _X86_INS_SHA256MSG1 = 680;;
+let _X86_INS_SHA256MSG2 = 681;;
+let _X86_INS_SHA256RNDS2 = 682;;
+let _X86_INS_SHL = 683;;
+let _X86_INS_SHLD = 684;;
+let _X86_INS_SHLX = 685;;
+let _X86_INS_SHR = 686;;
+let _X86_INS_SHRD = 687;;
+let _X86_INS_SHRX = 688;;
+let _X86_INS_SHUFPD = 689;;
+let _X86_INS_SHUFPS = 690;;
+let _X86_INS_SIDT = 691;;
+let _X86_INS_FSIN = 692;;
+let _X86_INS_SKINIT = 693;;
+let _X86_INS_SLDT = 694;;
+let _X86_INS_SLWPCB = 695;;
+let _X86_INS_SMSW = 696;;
+let _X86_INS_SQRTPD = 697;;
+let _X86_INS_SQRTPS = 698;;
+let _X86_INS_SQRTSD = 699;;
+let _X86_INS_SQRTSS = 700;;
+let _X86_INS_FSQRT = 701;;
+let _X86_INS_STAC = 702;;
+let _X86_INS_STC = 703;;
+let _X86_INS_STD = 704;;
+let _X86_INS_STGI = 705;;
+let _X86_INS_STI = 706;;
+let _X86_INS_STMXCSR = 707;;
+let _X86_INS_STOSB = 708;;
+let _X86_INS_STOSD = 709;;
+let _X86_INS_STOSQ = 710;;
+let _X86_INS_STOSW = 711;;
+let _X86_INS_STR = 712;;
+let _X86_INS_FST = 713;;
+let _X86_INS_FSTP = 714;;
+let _X86_INS_SUB = 715;;
+let _X86_INS_SUBPD = 716;;
+let _X86_INS_SUBPS = 717;;
+let _X86_INS_FSUBR = 718;;
+let _X86_INS_FISUBR = 719;;
+let _X86_INS_FSUBRP = 720;;
+let _X86_INS_SUBSD = 721;;
+let _X86_INS_SUBSS = 722;;
+let _X86_INS_FSUB = 723;;
+let _X86_INS_FISUB = 724;;
+let _X86_INS_FSUBP = 725;;
+let _X86_INS_SWAPGS = 726;;
+let _X86_INS_SYSCALL = 727;;
+let _X86_INS_SYSENTER = 728;;
+let _X86_INS_SYSEXIT = 729;;
+let _X86_INS_SYSEXITQ = 730;;
+let _X86_INS_SYSRET = 731;;
+let _X86_INS_SYSRETQ = 732;;
+let _X86_INS_T1MSKC = 733;;
+let _X86_INS_TEST = 734;;
+let _X86_INS_TPAUSE = 735;;
+let _X86_INS_FTST = 736;;
+let _X86_INS_TZCNT = 737;;
+let _X86_INS_TZMSK = 738;;
+let _X86_INS_UCOMISD = 739;;
+let _X86_INS_UCOMISS = 740;;
+let _X86_INS_FUCOMPI = 741;;
+let _X86_INS_FUCOMI = 742;;
+let _X86_INS_FUCOMPP = 743;;
+let _X86_INS_FUCOMP = 744;;
+let _X86_INS_FUCOM = 745;;
+let _X86_INS_UD0 = 746;;
+let _X86_INS_UD1 = 747;;
+let _X86_INS_UD2 = 748;;
+let _X86_INS_UMONITOR = 749;;
+let _X86_INS_UMWAIT = 750;;
+let _X86_INS_UNPCKHPD = 751;;
+let _X86_INS_UNPCKHPS = 752;;
+let _X86_INS_UNPCKLPD = 753;;
+let _X86_INS_UNPCKLPS = 754;;
+let _X86_INS_V4FMADDPS = 755;;
+let _X86_INS_V4FMADDSS = 756;;
+let _X86_INS_V4FNMADDPS = 757;;
+let _X86_INS_V4FNMADDSS = 758;;
+let _X86_INS_VADDPD = 759;;
+let _X86_INS_VADDPS = 760;;
+let _X86_INS_VADDSD = 761;;
+let _X86_INS_VADDSS = 762;;
+let _X86_INS_VADDSUBPD = 763;;
+let _X86_INS_VADDSUBPS = 764;;
+let _X86_INS_VAESDECLAST = 765;;
+let _X86_INS_VAESDEC = 766;;
+let _X86_INS_VAESENCLAST = 767;;
+let _X86_INS_VAESENC = 768;;
+let _X86_INS_VAESIMC = 769;;
+let _X86_INS_VAESKEYGENASSIST = 770;;
+let _X86_INS_VALIGND = 771;;
+let _X86_INS_VALIGNQ = 772;;
+let _X86_INS_VANDNPD = 773;;
+let _X86_INS_VANDNPS = 774;;
+let _X86_INS_VANDPD = 775;;
+let _X86_INS_VANDPS = 776;;
+let _X86_INS_VBLENDMPD = 777;;
+let _X86_INS_VBLENDMPS = 778;;
+let _X86_INS_VBLENDPD = 779;;
+let _X86_INS_VBLENDPS = 780;;
+let _X86_INS_VBLENDVPD = 781;;
+let _X86_INS_VBLENDVPS = 782;;
+let _X86_INS_VBROADCASTF128 = 783;;
+let _X86_INS_VBROADCASTF32X2 = 784;;
+let _X86_INS_VBROADCASTF32X4 = 785;;
+let _X86_INS_VBROADCASTF32X8 = 786;;
+let _X86_INS_VBROADCASTF64X2 = 787;;
+let _X86_INS_VBROADCASTF64X4 = 788;;
+let _X86_INS_VBROADCASTI128 = 789;;
+let _X86_INS_VBROADCASTI32X2 = 790;;
+let _X86_INS_VBROADCASTI32X4 = 791;;
+let _X86_INS_VBROADCASTI32X8 = 792;;
+let _X86_INS_VBROADCASTI64X2 = 793;;
+let _X86_INS_VBROADCASTI64X4 = 794;;
+let _X86_INS_VBROADCASTSD = 795;;
+let _X86_INS_VBROADCASTSS = 796;;
+let _X86_INS_VCMP = 797;;
+let _X86_INS_VCMPPD = 798;;
+let _X86_INS_VCMPPS = 799;;
+let _X86_INS_VCMPSD = 800;;
+let _X86_INS_VCMPSS = 801;;
+let _X86_INS_VCOMISD = 802;;
+let _X86_INS_VCOMISS = 803;;
+let _X86_INS_VCOMPRESSPD = 804;;
+let _X86_INS_VCOMPRESSPS = 805;;
+let _X86_INS_VCVTDQ2PD = 806;;
+let _X86_INS_VCVTDQ2PS = 807;;
+let _X86_INS_VCVTPD2DQ = 808;;
+let _X86_INS_VCVTPD2PS = 809;;
+let _X86_INS_VCVTPD2QQ = 810;;
+let _X86_INS_VCVTPD2UDQ = 811;;
+let _X86_INS_VCVTPD2UQQ = 812;;
+let _X86_INS_VCVTPH2PS = 813;;
+let _X86_INS_VCVTPS2DQ = 814;;
+let _X86_INS_VCVTPS2PD = 815;;
+let _X86_INS_VCVTPS2PH = 816;;
+let _X86_INS_VCVTPS2QQ = 817;;
+let _X86_INS_VCVTPS2UDQ = 818;;
+let _X86_INS_VCVTPS2UQQ = 819;;
+let _X86_INS_VCVTQQ2PD = 820;;
+let _X86_INS_VCVTQQ2PS = 821;;
+let _X86_INS_VCVTSD2SI = 822;;
+let _X86_INS_VCVTSD2SS = 823;;
+let _X86_INS_VCVTSD2USI = 824;;
+let _X86_INS_VCVTSI2SD = 825;;
+let _X86_INS_VCVTSI2SS = 826;;
+let _X86_INS_VCVTSS2SD = 827;;
+let _X86_INS_VCVTSS2SI = 828;;
+let _X86_INS_VCVTSS2USI = 829;;
+let _X86_INS_VCVTTPD2DQ = 830;;
+let _X86_INS_VCVTTPD2QQ = 831;;
+let _X86_INS_VCVTTPD2UDQ = 832;;
+let _X86_INS_VCVTTPD2UQQ = 833;;
+let _X86_INS_VCVTTPS2DQ = 834;;
+let _X86_INS_VCVTTPS2QQ = 835;;
+let _X86_INS_VCVTTPS2UDQ = 836;;
+let _X86_INS_VCVTTPS2UQQ = 837;;
+let _X86_INS_VCVTTSD2SI = 838;;
+let _X86_INS_VCVTTSD2USI = 839;;
+let _X86_INS_VCVTTSS2SI = 840;;
+let _X86_INS_VCVTTSS2USI = 841;;
+let _X86_INS_VCVTUDQ2PD = 842;;
+let _X86_INS_VCVTUDQ2PS = 843;;
+let _X86_INS_VCVTUQQ2PD = 844;;
+let _X86_INS_VCVTUQQ2PS = 845;;
+let _X86_INS_VCVTUSI2SD = 846;;
+let _X86_INS_VCVTUSI2SS = 847;;
+let _X86_INS_VDBPSADBW = 848;;
+let _X86_INS_VDIVPD = 849;;
+let _X86_INS_VDIVPS = 850;;
+let _X86_INS_VDIVSD = 851;;
+let _X86_INS_VDIVSS = 852;;
+let _X86_INS_VDPPD = 853;;
+let _X86_INS_VDPPS = 854;;
+let _X86_INS_VERR = 855;;
+let _X86_INS_VERW = 856;;
+let _X86_INS_VEXP2PD = 857;;
+let _X86_INS_VEXP2PS = 858;;
+let _X86_INS_VEXPANDPD = 859;;
+let _X86_INS_VEXPANDPS = 860;;
+let _X86_INS_VEXTRACTF128 = 861;;
+let _X86_INS_VEXTRACTF32X4 = 862;;
+let _X86_INS_VEXTRACTF32X8 = 863;;
+let _X86_INS_VEXTRACTF64X2 = 864;;
+let _X86_INS_VEXTRACTF64X4 = 865;;
+let _X86_INS_VEXTRACTI128 = 866;;
+let _X86_INS_VEXTRACTI32X4 = 867;;
+let _X86_INS_VEXTRACTI32X8 = 868;;
+let _X86_INS_VEXTRACTI64X2 = 869;;
+let _X86_INS_VEXTRACTI64X4 = 870;;
+let _X86_INS_VEXTRACTPS = 871;;
+let _X86_INS_VFIXUPIMMPD = 872;;
+let _X86_INS_VFIXUPIMMPS = 873;;
+let _X86_INS_VFIXUPIMMSD = 874;;
+let _X86_INS_VFIXUPIMMSS = 875;;
+let _X86_INS_VFMADD132PD = 876;;
+let _X86_INS_VFMADD132PS = 877;;
+let _X86_INS_VFMADD132SD = 878;;
+let _X86_INS_VFMADD132SS = 879;;
+let _X86_INS_VFMADD213PD = 880;;
+let _X86_INS_VFMADD213PS = 881;;
+let _X86_INS_VFMADD213SD = 882;;
+let _X86_INS_VFMADD213SS = 883;;
+let _X86_INS_VFMADD231PD = 884;;
+let _X86_INS_VFMADD231PS = 885;;
+let _X86_INS_VFMADD231SD = 886;;
+let _X86_INS_VFMADD231SS = 887;;
+let _X86_INS_VFMADDPD = 888;;
+let _X86_INS_VFMADDPS = 889;;
+let _X86_INS_VFMADDSD = 890;;
+let _X86_INS_VFMADDSS = 891;;
+let _X86_INS_VFMADDSUB132PD = 892;;
+let _X86_INS_VFMADDSUB132PS = 893;;
+let _X86_INS_VFMADDSUB213PD = 894;;
+let _X86_INS_VFMADDSUB213PS = 895;;
+let _X86_INS_VFMADDSUB231PD = 896;;
+let _X86_INS_VFMADDSUB231PS = 897;;
+let _X86_INS_VFMADDSUBPD = 898;;
+let _X86_INS_VFMADDSUBPS = 899;;
+let _X86_INS_VFMSUB132PD = 900;;
+let _X86_INS_VFMSUB132PS = 901;;
+let _X86_INS_VFMSUB132SD = 902;;
+let _X86_INS_VFMSUB132SS = 903;;
+let _X86_INS_VFMSUB213PD = 904;;
+let _X86_INS_VFMSUB213PS = 905;;
+let _X86_INS_VFMSUB213SD = 906;;
+let _X86_INS_VFMSUB213SS = 907;;
+let _X86_INS_VFMSUB231PD = 908;;
+let _X86_INS_VFMSUB231PS = 909;;
+let _X86_INS_VFMSUB231SD = 910;;
+let _X86_INS_VFMSUB231SS = 911;;
+let _X86_INS_VFMSUBADD132PD = 912;;
+let _X86_INS_VFMSUBADD132PS = 913;;
+let _X86_INS_VFMSUBADD213PD = 914;;
+let _X86_INS_VFMSUBADD213PS = 915;;
+let _X86_INS_VFMSUBADD231PD = 916;;
+let _X86_INS_VFMSUBADD231PS = 917;;
+let _X86_INS_VFMSUBADDPD = 918;;
+let _X86_INS_VFMSUBADDPS = 919;;
+let _X86_INS_VFMSUBPD = 920;;
+let _X86_INS_VFMSUBPS = 921;;
+let _X86_INS_VFMSUBSD = 922;;
+let _X86_INS_VFMSUBSS = 923;;
+let _X86_INS_VFNMADD132PD = 924;;
+let _X86_INS_VFNMADD132PS = 925;;
+let _X86_INS_VFNMADD132SD = 926;;
+let _X86_INS_VFNMADD132SS = 927;;
+let _X86_INS_VFNMADD213PD = 928;;
+let _X86_INS_VFNMADD213PS = 929;;
+let _X86_INS_VFNMADD213SD = 930;;
+let _X86_INS_VFNMADD213SS = 931;;
+let _X86_INS_VFNMADD231PD = 932;;
+let _X86_INS_VFNMADD231PS = 933;;
+let _X86_INS_VFNMADD231SD = 934;;
+let _X86_INS_VFNMADD231SS = 935;;
+let _X86_INS_VFNMADDPD = 936;;
+let _X86_INS_VFNMADDPS = 937;;
+let _X86_INS_VFNMADDSD = 938;;
+let _X86_INS_VFNMADDSS = 939;;
+let _X86_INS_VFNMSUB132PD = 940;;
+let _X86_INS_VFNMSUB132PS = 941;;
+let _X86_INS_VFNMSUB132SD = 942;;
+let _X86_INS_VFNMSUB132SS = 943;;
+let _X86_INS_VFNMSUB213PD = 944;;
+let _X86_INS_VFNMSUB213PS = 945;;
+let _X86_INS_VFNMSUB213SD = 946;;
+let _X86_INS_VFNMSUB213SS = 947;;
+let _X86_INS_VFNMSUB231PD = 948;;
+let _X86_INS_VFNMSUB231PS = 949;;
+let _X86_INS_VFNMSUB231SD = 950;;
+let _X86_INS_VFNMSUB231SS = 951;;
+let _X86_INS_VFNMSUBPD = 952;;
+let _X86_INS_VFNMSUBPS = 953;;
+let _X86_INS_VFNMSUBSD = 954;;
+let _X86_INS_VFNMSUBSS = 955;;
+let _X86_INS_VFPCLASSPD = 956;;
+let _X86_INS_VFPCLASSPS = 957;;
+let _X86_INS_VFPCLASSSD = 958;;
+let _X86_INS_VFPCLASSSS = 959;;
+let _X86_INS_VFRCZPD = 960;;
+let _X86_INS_VFRCZPS = 961;;
+let _X86_INS_VFRCZSD = 962;;
+let _X86_INS_VFRCZSS = 963;;
+let _X86_INS_VGATHERDPD = 964;;
+let _X86_INS_VGATHERDPS = 965;;
+let _X86_INS_VGATHERPF0DPD = 966;;
+let _X86_INS_VGATHERPF0DPS = 967;;
+let _X86_INS_VGATHERPF0QPD = 968;;
+let _X86_INS_VGATHERPF0QPS = 969;;
+let _X86_INS_VGATHERPF1DPD = 970;;
+let _X86_INS_VGATHERPF1DPS = 971;;
+let _X86_INS_VGATHERPF1QPD = 972;;
+let _X86_INS_VGATHERPF1QPS = 973;;
+let _X86_INS_VGATHERQPD = 974;;
+let _X86_INS_VGATHERQPS = 975;;
+let _X86_INS_VGETEXPPD = 976;;
+let _X86_INS_VGETEXPPS = 977;;
+let _X86_INS_VGETEXPSD = 978;;
+let _X86_INS_VGETEXPSS = 979;;
+let _X86_INS_VGETMANTPD = 980;;
+let _X86_INS_VGETMANTPS = 981;;
+let _X86_INS_VGETMANTSD = 982;;
+let _X86_INS_VGETMANTSS = 983;;
+let _X86_INS_VGF2P8AFFINEINVQB = 984;;
+let _X86_INS_VGF2P8AFFINEQB = 985;;
+let _X86_INS_VGF2P8MULB = 986;;
+let _X86_INS_VHADDPD = 987;;
+let _X86_INS_VHADDPS = 988;;
+let _X86_INS_VHSUBPD = 989;;
+let _X86_INS_VHSUBPS = 990;;
+let _X86_INS_VINSERTF128 = 991;;
+let _X86_INS_VINSERTF32X4 = 992;;
+let _X86_INS_VINSERTF32X8 = 993;;
+let _X86_INS_VINSERTF64X2 = 994;;
+let _X86_INS_VINSERTF64X4 = 995;;
+let _X86_INS_VINSERTI128 = 996;;
+let _X86_INS_VINSERTI32X4 = 997;;
+let _X86_INS_VINSERTI32X8 = 998;;
+let _X86_INS_VINSERTI64X2 = 999;;
+let _X86_INS_VINSERTI64X4 = 1000;;
+let _X86_INS_VINSERTPS = 1001;;
+let _X86_INS_VLDDQU = 1002;;
+let _X86_INS_VLDMXCSR = 1003;;
+let _X86_INS_VMASKMOVDQU = 1004;;
+let _X86_INS_VMASKMOVPD = 1005;;
+let _X86_INS_VMASKMOVPS = 1006;;
+let _X86_INS_VMAXPD = 1007;;
+let _X86_INS_VMAXPS = 1008;;
+let _X86_INS_VMAXSD = 1009;;
+let _X86_INS_VMAXSS = 1010;;
+let _X86_INS_VMCALL = 1011;;
+let _X86_INS_VMCLEAR = 1012;;
+let _X86_INS_VMFUNC = 1013;;
+let _X86_INS_VMINPD = 1014;;
+let _X86_INS_VMINPS = 1015;;
+let _X86_INS_VMINSD = 1016;;
+let _X86_INS_VMINSS = 1017;;
+let _X86_INS_VMLAUNCH = 1018;;
+let _X86_INS_VMLOAD = 1019;;
+let _X86_INS_VMMCALL = 1020;;
+let _X86_INS_VMOVQ = 1021;;
+let _X86_INS_VMOVAPD = 1022;;
+let _X86_INS_VMOVAPS = 1023;;
+let _X86_INS_VMOVDDUP = 1024;;
+let _X86_INS_VMOVD = 1025;;
+let _X86_INS_VMOVDQA32 = 1026;;
+let _X86_INS_VMOVDQA64 = 1027;;
+let _X86_INS_VMOVDQA = 1028;;
+let _X86_INS_VMOVDQU16 = 1029;;
+let _X86_INS_VMOVDQU32 = 1030;;
+let _X86_INS_VMOVDQU64 = 1031;;
+let _X86_INS_VMOVDQU8 = 1032;;
+let _X86_INS_VMOVDQU = 1033;;
+let _X86_INS_VMOVHLPS = 1034;;
+let _X86_INS_VMOVHPD = 1035;;
+let _X86_INS_VMOVHPS = 1036;;
+let _X86_INS_VMOVLHPS = 1037;;
+let _X86_INS_VMOVLPD = 1038;;
+let _X86_INS_VMOVLPS = 1039;;
+let _X86_INS_VMOVMSKPD = 1040;;
+let _X86_INS_VMOVMSKPS = 1041;;
+let _X86_INS_VMOVNTDQA = 1042;;
+let _X86_INS_VMOVNTDQ = 1043;;
+let _X86_INS_VMOVNTPD = 1044;;
+let _X86_INS_VMOVNTPS = 1045;;
+let _X86_INS_VMOVSD = 1046;;
+let _X86_INS_VMOVSHDUP = 1047;;
+let _X86_INS_VMOVSLDUP = 1048;;
+let _X86_INS_VMOVSS = 1049;;
+let _X86_INS_VMOVUPD = 1050;;
+let _X86_INS_VMOVUPS = 1051;;
+let _X86_INS_VMPSADBW = 1052;;
+let _X86_INS_VMPTRLD = 1053;;
+let _X86_INS_VMPTRST = 1054;;
+let _X86_INS_VMREAD = 1055;;
+let _X86_INS_VMRESUME = 1056;;
+let _X86_INS_VMRUN = 1057;;
+let _X86_INS_VMSAVE = 1058;;
+let _X86_INS_VMULPD = 1059;;
+let _X86_INS_VMULPS = 1060;;
+let _X86_INS_VMULSD = 1061;;
+let _X86_INS_VMULSS = 1062;;
+let _X86_INS_VMWRITE = 1063;;
+let _X86_INS_VMXOFF = 1064;;
+let _X86_INS_VMXON = 1065;;
+let _X86_INS_VORPD = 1066;;
+let _X86_INS_VORPS = 1067;;
+let _X86_INS_VP4DPWSSDS = 1068;;
+let _X86_INS_VP4DPWSSD = 1069;;
+let _X86_INS_VPABSB = 1070;;
+let _X86_INS_VPABSD = 1071;;
+let _X86_INS_VPABSQ = 1072;;
+let _X86_INS_VPABSW = 1073;;
+let _X86_INS_VPACKSSDW = 1074;;
+let _X86_INS_VPACKSSWB = 1075;;
+let _X86_INS_VPACKUSDW = 1076;;
+let _X86_INS_VPACKUSWB = 1077;;
+let _X86_INS_VPADDB = 1078;;
+let _X86_INS_VPADDD = 1079;;
+let _X86_INS_VPADDQ = 1080;;
+let _X86_INS_VPADDSB = 1081;;
+let _X86_INS_VPADDSW = 1082;;
+let _X86_INS_VPADDUSB = 1083;;
+let _X86_INS_VPADDUSW = 1084;;
+let _X86_INS_VPADDW = 1085;;
+let _X86_INS_VPALIGNR = 1086;;
+let _X86_INS_VPANDD = 1087;;
+let _X86_INS_VPANDND = 1088;;
+let _X86_INS_VPANDNQ = 1089;;
+let _X86_INS_VPANDN = 1090;;
+let _X86_INS_VPANDQ = 1091;;
+let _X86_INS_VPAND = 1092;;
+let _X86_INS_VPAVGB = 1093;;
+let _X86_INS_VPAVGW = 1094;;
+let _X86_INS_VPBLENDD = 1095;;
+let _X86_INS_VPBLENDMB = 1096;;
+let _X86_INS_VPBLENDMD = 1097;;
+let _X86_INS_VPBLENDMQ = 1098;;
+let _X86_INS_VPBLENDMW = 1099;;
+let _X86_INS_VPBLENDVB = 1100;;
+let _X86_INS_VPBLENDW = 1101;;
+let _X86_INS_VPBROADCASTB = 1102;;
+let _X86_INS_VPBROADCASTD = 1103;;
+let _X86_INS_VPBROADCASTMB2Q = 1104;;
+let _X86_INS_VPBROADCASTMW2D = 1105;;
+let _X86_INS_VPBROADCASTQ = 1106;;
+let _X86_INS_VPBROADCASTW = 1107;;
+let _X86_INS_VPCLMULQDQ = 1108;;
+let _X86_INS_VPCMOV = 1109;;
+let _X86_INS_VPCMP = 1110;;
+let _X86_INS_VPCMPB = 1111;;
+let _X86_INS_VPCMPD = 1112;;
+let _X86_INS_VPCMPEQB = 1113;;
+let _X86_INS_VPCMPEQD = 1114;;
+let _X86_INS_VPCMPEQQ = 1115;;
+let _X86_INS_VPCMPEQW = 1116;;
+let _X86_INS_VPCMPESTRI = 1117;;
+let _X86_INS_VPCMPESTRM = 1118;;
+let _X86_INS_VPCMPGTB = 1119;;
+let _X86_INS_VPCMPGTD = 1120;;
+let _X86_INS_VPCMPGTQ = 1121;;
+let _X86_INS_VPCMPGTW = 1122;;
+let _X86_INS_VPCMPISTRI = 1123;;
+let _X86_INS_VPCMPISTRM = 1124;;
+let _X86_INS_VPCMPQ = 1125;;
+let _X86_INS_VPCMPUB = 1126;;
+let _X86_INS_VPCMPUD = 1127;;
+let _X86_INS_VPCMPUQ = 1128;;
+let _X86_INS_VPCMPUW = 1129;;
+let _X86_INS_VPCMPW = 1130;;
+let _X86_INS_VPCOM = 1131;;
+let _X86_INS_VPCOMB = 1132;;
+let _X86_INS_VPCOMD = 1133;;
+let _X86_INS_VPCOMPRESSB = 1134;;
+let _X86_INS_VPCOMPRESSD = 1135;;
+let _X86_INS_VPCOMPRESSQ = 1136;;
+let _X86_INS_VPCOMPRESSW = 1137;;
+let _X86_INS_VPCOMQ = 1138;;
+let _X86_INS_VPCOMUB = 1139;;
+let _X86_INS_VPCOMUD = 1140;;
+let _X86_INS_VPCOMUQ = 1141;;
+let _X86_INS_VPCOMUW = 1142;;
+let _X86_INS_VPCOMW = 1143;;
+let _X86_INS_VPCONFLICTD = 1144;;
+let _X86_INS_VPCONFLICTQ = 1145;;
+let _X86_INS_VPDPBUSDS = 1146;;
+let _X86_INS_VPDPBUSD = 1147;;
+let _X86_INS_VPDPWSSDS = 1148;;
+let _X86_INS_VPDPWSSD = 1149;;
+let _X86_INS_VPERM2F128 = 1150;;
+let _X86_INS_VPERM2I128 = 1151;;
+let _X86_INS_VPERMB = 1152;;
+let _X86_INS_VPERMD = 1153;;
+let _X86_INS_VPERMI2B = 1154;;
+let _X86_INS_VPERMI2D = 1155;;
+let _X86_INS_VPERMI2PD = 1156;;
+let _X86_INS_VPERMI2PS = 1157;;
+let _X86_INS_VPERMI2Q = 1158;;
+let _X86_INS_VPERMI2W = 1159;;
+let _X86_INS_VPERMIL2PD = 1160;;
+let _X86_INS_VPERMILPD = 1161;;
+let _X86_INS_VPERMIL2PS = 1162;;
+let _X86_INS_VPERMILPS = 1163;;
+let _X86_INS_VPERMPD = 1164;;
+let _X86_INS_VPERMPS = 1165;;
+let _X86_INS_VPERMQ = 1166;;
+let _X86_INS_VPERMT2B = 1167;;
+let _X86_INS_VPERMT2D = 1168;;
+let _X86_INS_VPERMT2PD = 1169;;
+let _X86_INS_VPERMT2PS = 1170;;
+let _X86_INS_VPERMT2Q = 1171;;
+let _X86_INS_VPERMT2W = 1172;;
+let _X86_INS_VPERMW = 1173;;
+let _X86_INS_VPEXPANDB = 1174;;
+let _X86_INS_VPEXPANDD = 1175;;
+let _X86_INS_VPEXPANDQ = 1176;;
+let _X86_INS_VPEXPANDW = 1177;;
+let _X86_INS_VPEXTRB = 1178;;
+let _X86_INS_VPEXTRD = 1179;;
+let _X86_INS_VPEXTRQ = 1180;;
+let _X86_INS_VPEXTRW = 1181;;
+let _X86_INS_VPGATHERDD = 1182;;
+let _X86_INS_VPGATHERDQ = 1183;;
+let _X86_INS_VPGATHERQD = 1184;;
+let _X86_INS_VPGATHERQQ = 1185;;
+let _X86_INS_VPHADDBD = 1186;;
+let _X86_INS_VPHADDBQ = 1187;;
+let _X86_INS_VPHADDBW = 1188;;
+let _X86_INS_VPHADDDQ = 1189;;
+let _X86_INS_VPHADDD = 1190;;
+let _X86_INS_VPHADDSW = 1191;;
+let _X86_INS_VPHADDUBD = 1192;;
+let _X86_INS_VPHADDUBQ = 1193;;
+let _X86_INS_VPHADDUBW = 1194;;
+let _X86_INS_VPHADDUDQ = 1195;;
+let _X86_INS_VPHADDUWD = 1196;;
+let _X86_INS_VPHADDUWQ = 1197;;
+let _X86_INS_VPHADDWD = 1198;;
+let _X86_INS_VPHADDWQ = 1199;;
+let _X86_INS_VPHADDW = 1200;;
+let _X86_INS_VPHMINPOSUW = 1201;;
+let _X86_INS_VPHSUBBW = 1202;;
+let _X86_INS_VPHSUBDQ = 1203;;
+let _X86_INS_VPHSUBD = 1204;;
+let _X86_INS_VPHSUBSW = 1205;;
+let _X86_INS_VPHSUBWD = 1206;;
+let _X86_INS_VPHSUBW = 1207;;
+let _X86_INS_VPINSRB = 1208;;
+let _X86_INS_VPINSRD = 1209;;
+let _X86_INS_VPINSRQ = 1210;;
+let _X86_INS_VPINSRW = 1211;;
+let _X86_INS_VPLZCNTD = 1212;;
+let _X86_INS_VPLZCNTQ = 1213;;
+let _X86_INS_VPMACSDD = 1214;;
+let _X86_INS_VPMACSDQH = 1215;;
+let _X86_INS_VPMACSDQL = 1216;;
+let _X86_INS_VPMACSSDD = 1217;;
+let _X86_INS_VPMACSSDQH = 1218;;
+let _X86_INS_VPMACSSDQL = 1219;;
+let _X86_INS_VPMACSSWD = 1220;;
+let _X86_INS_VPMACSSWW = 1221;;
+let _X86_INS_VPMACSWD = 1222;;
+let _X86_INS_VPMACSWW = 1223;;
+let _X86_INS_VPMADCSSWD = 1224;;
+let _X86_INS_VPMADCSWD = 1225;;
+let _X86_INS_VPMADD52HUQ = 1226;;
+let _X86_INS_VPMADD52LUQ = 1227;;
+let _X86_INS_VPMADDUBSW = 1228;;
+let _X86_INS_VPMADDWD = 1229;;
+let _X86_INS_VPMASKMOVD = 1230;;
+let _X86_INS_VPMASKMOVQ = 1231;;
+let _X86_INS_VPMAXSB = 1232;;
+let _X86_INS_VPMAXSD = 1233;;
+let _X86_INS_VPMAXSQ = 1234;;
+let _X86_INS_VPMAXSW = 1235;;
+let _X86_INS_VPMAXUB = 1236;;
+let _X86_INS_VPMAXUD = 1237;;
+let _X86_INS_VPMAXUQ = 1238;;
+let _X86_INS_VPMAXUW = 1239;;
+let _X86_INS_VPMINSB = 1240;;
+let _X86_INS_VPMINSD = 1241;;
+let _X86_INS_VPMINSQ = 1242;;
+let _X86_INS_VPMINSW = 1243;;
+let _X86_INS_VPMINUB = 1244;;
+let _X86_INS_VPMINUD = 1245;;
+let _X86_INS_VPMINUQ = 1246;;
+let _X86_INS_VPMINUW = 1247;;
+let _X86_INS_VPMOVB2M = 1248;;
+let _X86_INS_VPMOVD2M = 1249;;
+let _X86_INS_VPMOVDB = 1250;;
+let _X86_INS_VPMOVDW = 1251;;
+let _X86_INS_VPMOVM2B = 1252;;
+let _X86_INS_VPMOVM2D = 1253;;
+let _X86_INS_VPMOVM2Q = 1254;;
+let _X86_INS_VPMOVM2W = 1255;;
+let _X86_INS_VPMOVMSKB = 1256;;
+let _X86_INS_VPMOVQ2M = 1257;;
+let _X86_INS_VPMOVQB = 1258;;
+let _X86_INS_VPMOVQD = 1259;;
+let _X86_INS_VPMOVQW = 1260;;
+let _X86_INS_VPMOVSDB = 1261;;
+let _X86_INS_VPMOVSDW = 1262;;
+let _X86_INS_VPMOVSQB = 1263;;
+let _X86_INS_VPMOVSQD = 1264;;
+let _X86_INS_VPMOVSQW = 1265;;
+let _X86_INS_VPMOVSWB = 1266;;
+let _X86_INS_VPMOVSXBD = 1267;;
+let _X86_INS_VPMOVSXBQ = 1268;;
+let _X86_INS_VPMOVSXBW = 1269;;
+let _X86_INS_VPMOVSXDQ = 1270;;
+let _X86_INS_VPMOVSXWD = 1271;;
+let _X86_INS_VPMOVSXWQ = 1272;;
+let _X86_INS_VPMOVUSDB = 1273;;
+let _X86_INS_VPMOVUSDW = 1274;;
+let _X86_INS_VPMOVUSQB = 1275;;
+let _X86_INS_VPMOVUSQD = 1276;;
+let _X86_INS_VPMOVUSQW = 1277;;
+let _X86_INS_VPMOVUSWB = 1278;;
+let _X86_INS_VPMOVW2M = 1279;;
+let _X86_INS_VPMOVWB = 1280;;
+let _X86_INS_VPMOVZXBD = 1281;;
+let _X86_INS_VPMOVZXBQ = 1282;;
+let _X86_INS_VPMOVZXBW = 1283;;
+let _X86_INS_VPMOVZXDQ = 1284;;
+let _X86_INS_VPMOVZXWD = 1285;;
+let _X86_INS_VPMOVZXWQ = 1286;;
+let _X86_INS_VPMULDQ = 1287;;
+let _X86_INS_VPMULHRSW = 1288;;
+let _X86_INS_VPMULHUW = 1289;;
+let _X86_INS_VPMULHW = 1290;;
+let _X86_INS_VPMULLD = 1291;;
+let _X86_INS_VPMULLQ = 1292;;
+let _X86_INS_VPMULLW = 1293;;
+let _X86_INS_VPMULTISHIFTQB = 1294;;
+let _X86_INS_VPMULUDQ = 1295;;
+let _X86_INS_VPOPCNTB = 1296;;
+let _X86_INS_VPOPCNTD = 1297;;
+let _X86_INS_VPOPCNTQ = 1298;;
+let _X86_INS_VPOPCNTW = 1299;;
+let _X86_INS_VPORD = 1300;;
+let _X86_INS_VPORQ = 1301;;
+let _X86_INS_VPOR = 1302;;
+let _X86_INS_VPPERM = 1303;;
+let _X86_INS_VPROLD = 1304;;
+let _X86_INS_VPROLQ = 1305;;
+let _X86_INS_VPROLVD = 1306;;
+let _X86_INS_VPROLVQ = 1307;;
+let _X86_INS_VPRORD = 1308;;
+let _X86_INS_VPRORQ = 1309;;
+let _X86_INS_VPRORVD = 1310;;
+let _X86_INS_VPRORVQ = 1311;;
+let _X86_INS_VPROTB = 1312;;
+let _X86_INS_VPROTD = 1313;;
+let _X86_INS_VPROTQ = 1314;;
+let _X86_INS_VPROTW = 1315;;
+let _X86_INS_VPSADBW = 1316;;
+let _X86_INS_VPSCATTERDD = 1317;;
+let _X86_INS_VPSCATTERDQ = 1318;;
+let _X86_INS_VPSCATTERQD = 1319;;
+let _X86_INS_VPSCATTERQQ = 1320;;
+let _X86_INS_VPSHAB = 1321;;
+let _X86_INS_VPSHAD = 1322;;
+let _X86_INS_VPSHAQ = 1323;;
+let _X86_INS_VPSHAW = 1324;;
+let _X86_INS_VPSHLB = 1325;;
+let _X86_INS_VPSHLDD = 1326;;
+let _X86_INS_VPSHLDQ = 1327;;
+let _X86_INS_VPSHLDVD = 1328;;
+let _X86_INS_VPSHLDVQ = 1329;;
+let _X86_INS_VPSHLDVW = 1330;;
+let _X86_INS_VPSHLDW = 1331;;
+let _X86_INS_VPSHLD = 1332;;
+let _X86_INS_VPSHLQ = 1333;;
+let _X86_INS_VPSHLW = 1334;;
+let _X86_INS_VPSHRDD = 1335;;
+let _X86_INS_VPSHRDQ = 1336;;
+let _X86_INS_VPSHRDVD = 1337;;
+let _X86_INS_VPSHRDVQ = 1338;;
+let _X86_INS_VPSHRDVW = 1339;;
+let _X86_INS_VPSHRDW = 1340;;
+let _X86_INS_VPSHUFBITQMB = 1341;;
+let _X86_INS_VPSHUFB = 1342;;
+let _X86_INS_VPSHUFD = 1343;;
+let _X86_INS_VPSHUFHW = 1344;;
+let _X86_INS_VPSHUFLW = 1345;;
+let _X86_INS_VPSIGNB = 1346;;
+let _X86_INS_VPSIGND = 1347;;
+let _X86_INS_VPSIGNW = 1348;;
+let _X86_INS_VPSLLDQ = 1349;;
+let _X86_INS_VPSLLD = 1350;;
+let _X86_INS_VPSLLQ = 1351;;
+let _X86_INS_VPSLLVD = 1352;;
+let _X86_INS_VPSLLVQ = 1353;;
+let _X86_INS_VPSLLVW = 1354;;
+let _X86_INS_VPSLLW = 1355;;
+let _X86_INS_VPSRAD = 1356;;
+let _X86_INS_VPSRAQ = 1357;;
+let _X86_INS_VPSRAVD = 1358;;
+let _X86_INS_VPSRAVQ = 1359;;
+let _X86_INS_VPSRAVW = 1360;;
+let _X86_INS_VPSRAW = 1361;;
+let _X86_INS_VPSRLDQ = 1362;;
+let _X86_INS_VPSRLD = 1363;;
+let _X86_INS_VPSRLQ = 1364;;
+let _X86_INS_VPSRLVD = 1365;;
+let _X86_INS_VPSRLVQ = 1366;;
+let _X86_INS_VPSRLVW = 1367;;
+let _X86_INS_VPSRLW = 1368;;
+let _X86_INS_VPSUBB = 1369;;
+let _X86_INS_VPSUBD = 1370;;
+let _X86_INS_VPSUBQ = 1371;;
+let _X86_INS_VPSUBSB = 1372;;
+let _X86_INS_VPSUBSW = 1373;;
+let _X86_INS_VPSUBUSB = 1374;;
+let _X86_INS_VPSUBUSW = 1375;;
+let _X86_INS_VPSUBW = 1376;;
+let _X86_INS_VPTERNLOGD = 1377;;
+let _X86_INS_VPTERNLOGQ = 1378;;
+let _X86_INS_VPTESTMB = 1379;;
+let _X86_INS_VPTESTMD = 1380;;
+let _X86_INS_VPTESTMQ = 1381;;
+let _X86_INS_VPTESTMW = 1382;;
+let _X86_INS_VPTESTNMB = 1383;;
+let _X86_INS_VPTESTNMD = 1384;;
+let _X86_INS_VPTESTNMQ = 1385;;
+let _X86_INS_VPTESTNMW = 1386;;
+let _X86_INS_VPTEST = 1387;;
+let _X86_INS_VPUNPCKHBW = 1388;;
+let _X86_INS_VPUNPCKHDQ = 1389;;
+let _X86_INS_VPUNPCKHQDQ = 1390;;
+let _X86_INS_VPUNPCKHWD = 1391;;
+let _X86_INS_VPUNPCKLBW = 1392;;
+let _X86_INS_VPUNPCKLDQ = 1393;;
+let _X86_INS_VPUNPCKLQDQ = 1394;;
+let _X86_INS_VPUNPCKLWD = 1395;;
+let _X86_INS_VPXORD = 1396;;
+let _X86_INS_VPXORQ = 1397;;
+let _X86_INS_VPXOR = 1398;;
+let _X86_INS_VRANGEPD = 1399;;
+let _X86_INS_VRANGEPS = 1400;;
+let _X86_INS_VRANGESD = 1401;;
+let _X86_INS_VRANGESS = 1402;;
+let _X86_INS_VRCP14PD = 1403;;
+let _X86_INS_VRCP14PS = 1404;;
+let _X86_INS_VRCP14SD = 1405;;
+let _X86_INS_VRCP14SS = 1406;;
+let _X86_INS_VRCP28PD = 1407;;
+let _X86_INS_VRCP28PS = 1408;;
+let _X86_INS_VRCP28SD = 1409;;
+let _X86_INS_VRCP28SS = 1410;;
+let _X86_INS_VRCPPS = 1411;;
+let _X86_INS_VRCPSS = 1412;;
+let _X86_INS_VREDUCEPD = 1413;;
+let _X86_INS_VREDUCEPS = 1414;;
+let _X86_INS_VREDUCESD = 1415;;
+let _X86_INS_VREDUCESS = 1416;;
+let _X86_INS_VRNDSCALEPD = 1417;;
+let _X86_INS_VRNDSCALEPS = 1418;;
+let _X86_INS_VRNDSCALESD = 1419;;
+let _X86_INS_VRNDSCALESS = 1420;;
+let _X86_INS_VROUNDPD = 1421;;
+let _X86_INS_VROUNDPS = 1422;;
+let _X86_INS_VROUNDSD = 1423;;
+let _X86_INS_VROUNDSS = 1424;;
+let _X86_INS_VRSQRT14PD = 1425;;
+let _X86_INS_VRSQRT14PS = 1426;;
+let _X86_INS_VRSQRT14SD = 1427;;
+let _X86_INS_VRSQRT14SS = 1428;;
+let _X86_INS_VRSQRT28PD = 1429;;
+let _X86_INS_VRSQRT28PS = 1430;;
+let _X86_INS_VRSQRT28SD = 1431;;
+let _X86_INS_VRSQRT28SS = 1432;;
+let _X86_INS_VRSQRTPS = 1433;;
+let _X86_INS_VRSQRTSS = 1434;;
+let _X86_INS_VSCALEFPD = 1435;;
+let _X86_INS_VSCALEFPS = 1436;;
+let _X86_INS_VSCALEFSD = 1437;;
+let _X86_INS_VSCALEFSS = 1438;;
+let _X86_INS_VSCATTERDPD = 1439;;
+let _X86_INS_VSCATTERDPS = 1440;;
+let _X86_INS_VSCATTERPF0DPD = 1441;;
+let _X86_INS_VSCATTERPF0DPS = 1442;;
+let _X86_INS_VSCATTERPF0QPD = 1443;;
+let _X86_INS_VSCATTERPF0QPS = 1444;;
+let _X86_INS_VSCATTERPF1DPD = 1445;;
+let _X86_INS_VSCATTERPF1DPS = 1446;;
+let _X86_INS_VSCATTERPF1QPD = 1447;;
+let _X86_INS_VSCATTERPF1QPS = 1448;;
+let _X86_INS_VSCATTERQPD = 1449;;
+let _X86_INS_VSCATTERQPS = 1450;;
+let _X86_INS_VSHUFF32X4 = 1451;;
+let _X86_INS_VSHUFF64X2 = 1452;;
+let _X86_INS_VSHUFI32X4 = 1453;;
+let _X86_INS_VSHUFI64X2 = 1454;;
+let _X86_INS_VSHUFPD = 1455;;
+let _X86_INS_VSHUFPS = 1456;;
+let _X86_INS_VSQRTPD = 1457;;
+let _X86_INS_VSQRTPS = 1458;;
+let _X86_INS_VSQRTSD = 1459;;
+let _X86_INS_VSQRTSS = 1460;;
+let _X86_INS_VSTMXCSR = 1461;;
+let _X86_INS_VSUBPD = 1462;;
+let _X86_INS_VSUBPS = 1463;;
+let _X86_INS_VSUBSD = 1464;;
+let _X86_INS_VSUBSS = 1465;;
+let _X86_INS_VTESTPD = 1466;;
+let _X86_INS_VTESTPS = 1467;;
+let _X86_INS_VUCOMISD = 1468;;
+let _X86_INS_VUCOMISS = 1469;;
+let _X86_INS_VUNPCKHPD = 1470;;
+let _X86_INS_VUNPCKHPS = 1471;;
+let _X86_INS_VUNPCKLPD = 1472;;
+let _X86_INS_VUNPCKLPS = 1473;;
+let _X86_INS_VXORPD = 1474;;
+let _X86_INS_VXORPS = 1475;;
+let _X86_INS_VZEROALL = 1476;;
+let _X86_INS_VZEROUPPER = 1477;;
+let _X86_INS_WAIT = 1478;;
+let _X86_INS_WBINVD = 1479;;
+let _X86_INS_WBNOINVD = 1480;;
+let _X86_INS_WRFSBASE = 1481;;
+let _X86_INS_WRGSBASE = 1482;;
+let _X86_INS_WRMSR = 1483;;
+let _X86_INS_WRPKRU = 1484;;
+let _X86_INS_WRSSD = 1485;;
+let _X86_INS_WRSSQ = 1486;;
+let _X86_INS_WRUSSD = 1487;;
+let _X86_INS_WRUSSQ = 1488;;
+let _X86_INS_XABORT = 1489;;
+let _X86_INS_XACQUIRE = 1490;;
+let _X86_INS_XADD = 1491;;
+let _X86_INS_XBEGIN = 1492;;
+let _X86_INS_XCHG = 1493;;
+let _X86_INS_FXCH = 1494;;
+let _X86_INS_XCRYPTCBC = 1495;;
+let _X86_INS_XCRYPTCFB = 1496;;
+let _X86_INS_XCRYPTCTR = 1497;;
+let _X86_INS_XCRYPTECB = 1498;;
+let _X86_INS_XCRYPTOFB = 1499;;
+let _X86_INS_XEND = 1500;;
+let _X86_INS_XGETBV = 1501;;
+let _X86_INS_XLATB = 1502;;
+let _X86_INS_XOR = 1503;;
+let _X86_INS_XORPD = 1504;;
+let _X86_INS_XORPS = 1505;;
+let _X86_INS_XRELEASE = 1506;;
+let _X86_INS_XRSTOR = 1507;;
+let _X86_INS_XRSTOR64 = 1508;;
+let _X86_INS_XRSTORS = 1509;;
+let _X86_INS_XRSTORS64 = 1510;;
+let _X86_INS_XSAVE = 1511;;
+let _X86_INS_XSAVE64 = 1512;;
+let _X86_INS_XSAVEC = 1513;;
+let _X86_INS_XSAVEC64 = 1514;;
+let _X86_INS_XSAVEOPT = 1515;;
+let _X86_INS_XSAVEOPT64 = 1516;;
+let _X86_INS_XSAVES = 1517;;
+let _X86_INS_XSAVES64 = 1518;;
+let _X86_INS_XSETBV = 1519;;
+let _X86_INS_XSHA1 = 1520;;
+let _X86_INS_XSHA256 = 1521;;
+let _X86_INS_XSTORE = 1522;;
+let _X86_INS_XTEST = 1523;;
+let _X86_INS_ENDING = 1524;;
+
+let _X86_GRP_INVALID = 0;;
+let _X86_GRP_JUMP = 1;;
+let _X86_GRP_CALL = 2;;
+let _X86_GRP_RET = 3;;
+let _X86_GRP_INT = 4;;
+let _X86_GRP_IRET = 5;;
+let _X86_GRP_PRIVILEGE = 6;;
+let _X86_GRP_BRANCH_RELATIVE = 7;;
+let _X86_GRP_VM = 128;;
+let _X86_GRP_3DNOW = 129;;
+let _X86_GRP_AES = 130;;
+let _X86_GRP_ADX = 131;;
+let _X86_GRP_AVX = 132;;
+let _X86_GRP_AVX2 = 133;;
+let _X86_GRP_AVX512 = 134;;
+let _X86_GRP_BMI = 135;;
+let _X86_GRP_BMI2 = 136;;
+let _X86_GRP_CMOV = 137;;
+let _X86_GRP_F16C = 138;;
+let _X86_GRP_FMA = 139;;
+let _X86_GRP_FMA4 = 140;;
+let _X86_GRP_FSGSBASE = 141;;
+let _X86_GRP_HLE = 142;;
+let _X86_GRP_MMX = 143;;
+let _X86_GRP_MODE32 = 144;;
+let _X86_GRP_MODE64 = 145;;
+let _X86_GRP_RTM = 146;;
+let _X86_GRP_SHA = 147;;
+let _X86_GRP_SSE1 = 148;;
+let _X86_GRP_SSE2 = 149;;
+let _X86_GRP_SSE3 = 150;;
+let _X86_GRP_SSE41 = 151;;
+let _X86_GRP_SSE42 = 152;;
+let _X86_GRP_SSE4A = 153;;
+let _X86_GRP_SSSE3 = 154;;
+let _X86_GRP_PCLMUL = 155;;
+let _X86_GRP_XOP = 156;;
+let _X86_GRP_CDI = 157;;
+let _X86_GRP_ERI = 158;;
+let _X86_GRP_TBM = 159;;
+let _X86_GRP_16BITMODE = 160;;
+let _X86_GRP_NOT64BITMODE = 161;;
+let _X86_GRP_SGX = 162;;
+let _X86_GRP_DQI = 163;;
+let _X86_GRP_BWI = 164;;
+let _X86_GRP_PFI = 165;;
+let _X86_GRP_VLX = 166;;
+let _X86_GRP_SMAP = 167;;
+let _X86_GRP_NOVLX = 168;;
+let _X86_GRP_FPU = 169;;
+let _X86_GRP_ENDING = 170;;
diff --git a/capstone/bindings/ocaml/xcore.ml b/capstone/bindings/ocaml/xcore.ml
new file mode 100644
index 000000000..ee993c137
--- /dev/null
+++ b/capstone/bindings/ocaml/xcore.ml
@@ -0,0 +1,26 @@
+(* Capstone Disassembly Engine
+ * By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
+
+open Xcore_const
+
+type xcore_op_mem = {
+	base: int;
+	index: int;
+	disp: int;
+	direct: int;
+}
+
+type xcore_op_value =
+	| XCORE_OP_INVALID of int
+	| XCORE_OP_REG of int
+	| XCORE_OP_IMM of int
+	| XCORE_OP_MEM of xcore_op_mem
+
+type xcore_op = {
+	value: xcore_op_value;
+}
+
+type cs_xcore = { 
+	operands: xcore_op array;
+}
+
diff --git a/capstone/bindings/ocaml/xcore_const.ml b/capstone/bindings/ocaml/xcore_const.ml
new file mode 100644
index 000000000..f32dd4ae4
--- /dev/null
+++ b/capstone/bindings/ocaml/xcore_const.ml
@@ -0,0 +1,161 @@
+(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.ml] *)
+
+let _XCORE_OP_INVALID = 0;;
+let _XCORE_OP_REG = 1;;
+let _XCORE_OP_IMM = 2;;
+let _XCORE_OP_MEM = 3;;
+
+let _XCORE_REG_INVALID = 0;;
+let _XCORE_REG_CP = 1;;
+let _XCORE_REG_DP = 2;;
+let _XCORE_REG_LR = 3;;
+let _XCORE_REG_SP = 4;;
+let _XCORE_REG_R0 = 5;;
+let _XCORE_REG_R1 = 6;;
+let _XCORE_REG_R2 = 7;;
+let _XCORE_REG_R3 = 8;;
+let _XCORE_REG_R4 = 9;;
+let _XCORE_REG_R5 = 10;;
+let _XCORE_REG_R6 = 11;;
+let _XCORE_REG_R7 = 12;;
+let _XCORE_REG_R8 = 13;;
+let _XCORE_REG_R9 = 14;;
+let _XCORE_REG_R10 = 15;;
+let _XCORE_REG_R11 = 16;;
+let _XCORE_REG_PC = 17;;
+let _XCORE_REG_SCP = 18;;
+let _XCORE_REG_SSR = 19;;
+let _XCORE_REG_ET = 20;;
+let _XCORE_REG_ED = 21;;
+let _XCORE_REG_SED = 22;;
+let _XCORE_REG_KEP = 23;;
+let _XCORE_REG_KSP = 24;;
+let _XCORE_REG_ID = 25;;
+let _XCORE_REG_ENDING = 26;;
+
+let _XCORE_INS_INVALID = 0;;
+let _XCORE_INS_ADD = 1;;
+let _XCORE_INS_ANDNOT = 2;;
+let _XCORE_INS_AND = 3;;
+let _XCORE_INS_ASHR = 4;;
+let _XCORE_INS_BAU = 5;;
+let _XCORE_INS_BITREV = 6;;
+let _XCORE_INS_BLA = 7;;
+let _XCORE_INS_BLAT = 8;;
+let _XCORE_INS_BL = 9;;
+let _XCORE_INS_BF = 10;;
+let _XCORE_INS_BT = 11;;
+let _XCORE_INS_BU = 12;;
+let _XCORE_INS_BRU = 13;;
+let _XCORE_INS_BYTEREV = 14;;
+let _XCORE_INS_CHKCT = 15;;
+let _XCORE_INS_CLRE = 16;;
+let _XCORE_INS_CLRPT = 17;;
+let _XCORE_INS_CLRSR = 18;;
+let _XCORE_INS_CLZ = 19;;
+let _XCORE_INS_CRC8 = 20;;
+let _XCORE_INS_CRC32 = 21;;
+let _XCORE_INS_DCALL = 22;;
+let _XCORE_INS_DENTSP = 23;;
+let _XCORE_INS_DGETREG = 24;;
+let _XCORE_INS_DIVS = 25;;
+let _XCORE_INS_DIVU = 26;;
+let _XCORE_INS_DRESTSP = 27;;
+let _XCORE_INS_DRET = 28;;
+let _XCORE_INS_ECALLF = 29;;
+let _XCORE_INS_ECALLT = 30;;
+let _XCORE_INS_EDU = 31;;
+let _XCORE_INS_EEF = 32;;
+let _XCORE_INS_EET = 33;;
+let _XCORE_INS_EEU = 34;;
+let _XCORE_INS_ENDIN = 35;;
+let _XCORE_INS_ENTSP = 36;;
+let _XCORE_INS_EQ = 37;;
+let _XCORE_INS_EXTDP = 38;;
+let _XCORE_INS_EXTSP = 39;;
+let _XCORE_INS_FREER = 40;;
+let _XCORE_INS_FREET = 41;;
+let _XCORE_INS_GETD = 42;;
+let _XCORE_INS_GET = 43;;
+let _XCORE_INS_GETN = 44;;
+let _XCORE_INS_GETR = 45;;
+let _XCORE_INS_GETSR = 46;;
+let _XCORE_INS_GETST = 47;;
+let _XCORE_INS_GETTS = 48;;
+let _XCORE_INS_INCT = 49;;
+let _XCORE_INS_INIT = 50;;
+let _XCORE_INS_INPW = 51;;
+let _XCORE_INS_INSHR = 52;;
+let _XCORE_INS_INT = 53;;
+let _XCORE_INS_IN = 54;;
+let _XCORE_INS_KCALL = 55;;
+let _XCORE_INS_KENTSP = 56;;
+let _XCORE_INS_KRESTSP = 57;;
+let _XCORE_INS_KRET = 58;;
+let _XCORE_INS_LADD = 59;;
+let _XCORE_INS_LD16S = 60;;
+let _XCORE_INS_LD8U = 61;;
+let _XCORE_INS_LDA16 = 62;;
+let _XCORE_INS_LDAP = 63;;
+let _XCORE_INS_LDAW = 64;;
+let _XCORE_INS_LDC = 65;;
+let _XCORE_INS_LDW = 66;;
+let _XCORE_INS_LDIVU = 67;;
+let _XCORE_INS_LMUL = 68;;
+let _XCORE_INS_LSS = 69;;
+let _XCORE_INS_LSUB = 70;;
+let _XCORE_INS_LSU = 71;;
+let _XCORE_INS_MACCS = 72;;
+let _XCORE_INS_MACCU = 73;;
+let _XCORE_INS_MJOIN = 74;;
+let _XCORE_INS_MKMSK = 75;;
+let _XCORE_INS_MSYNC = 76;;
+let _XCORE_INS_MUL = 77;;
+let _XCORE_INS_NEG = 78;;
+let _XCORE_INS_NOT = 79;;
+let _XCORE_INS_OR = 80;;
+let _XCORE_INS_OUTCT = 81;;
+let _XCORE_INS_OUTPW = 82;;
+let _XCORE_INS_OUTSHR = 83;;
+let _XCORE_INS_OUTT = 84;;
+let _XCORE_INS_OUT = 85;;
+let _XCORE_INS_PEEK = 86;;
+let _XCORE_INS_REMS = 87;;
+let _XCORE_INS_REMU = 88;;
+let _XCORE_INS_RETSP = 89;;
+let _XCORE_INS_SETCLK = 90;;
+let _XCORE_INS_SET = 91;;
+let _XCORE_INS_SETC = 92;;
+let _XCORE_INS_SETD = 93;;
+let _XCORE_INS_SETEV = 94;;
+let _XCORE_INS_SETN = 95;;
+let _XCORE_INS_SETPSC = 96;;
+let _XCORE_INS_SETPT = 97;;
+let _XCORE_INS_SETRDY = 98;;
+let _XCORE_INS_SETSR = 99;;
+let _XCORE_INS_SETTW = 100;;
+let _XCORE_INS_SETV = 101;;
+let _XCORE_INS_SEXT = 102;;
+let _XCORE_INS_SHL = 103;;
+let _XCORE_INS_SHR = 104;;
+let _XCORE_INS_SSYNC = 105;;
+let _XCORE_INS_ST16 = 106;;
+let _XCORE_INS_ST8 = 107;;
+let _XCORE_INS_STW = 108;;
+let _XCORE_INS_SUB = 109;;
+let _XCORE_INS_SYNCR = 110;;
+let _XCORE_INS_TESTCT = 111;;
+let _XCORE_INS_TESTLCL = 112;;
+let _XCORE_INS_TESTWCT = 113;;
+let _XCORE_INS_TSETMR = 114;;
+let _XCORE_INS_START = 115;;
+let _XCORE_INS_WAITEF = 116;;
+let _XCORE_INS_WAITET = 117;;
+let _XCORE_INS_WAITEU = 118;;
+let _XCORE_INS_XOR = 119;;
+let _XCORE_INS_ZEXT = 120;;
+let _XCORE_INS_ENDING = 121;;
+
+let _XCORE_GRP_INVALID = 0;;
+let _XCORE_GRP_JUMP = 1;;
+let _XCORE_GRP_ENDING = 2;;
diff --git a/capstone/bindings/powershell/Capstone/Capstone.Format.ps1xml b/capstone/bindings/powershell/Capstone/Capstone.Format.ps1xml
new file mode 100644
index 000000000..1c9ab0f62
--- /dev/null
+++ b/capstone/bindings/powershell/Capstone/Capstone.Format.ps1xml
@@ -0,0 +1,157 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<Configuration>
+  <DefaultSettings>
+    <EnumerableExpansions>
+        <EnumerableExpansion>
+            <Expand>Both</Expand>
+        </EnumerableExpansion>
+    </EnumerableExpansions>
+  </DefaultSettings>
+    <ViewDefinitions>
+        <View>
+            <Name>CapstoneDisassemblyViewSimple</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Simple</TypeName>
+                </ViewSelectedBy>
+                <ListControl>
+                <ListEntries>
+                    <ListEntry>
+                        <ListItems>
+                            <ListItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:X}</FormatString>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Instruction</PropertyName>
+                            </ListItem>
+                        </ListItems>
+                    </ListEntry>
+                </ListEntries>
+            </ListControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewSimple</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Simple</TypeName>
+                </ViewSelectedBy>
+            <TableControl>
+                <TableHeaders>
+                    <TableColumnHeader>
+                        <Label>Address</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Instruction</Label>
+                    </TableColumnHeader>
+                </TableHeaders>
+                <TableRowEntries>
+                    <TableRowEntry>
+                        <TableColumnItems>
+                            <TableColumnItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:x}</FormatString>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Instruction</PropertyName>
+                            </TableColumnItem>
+                        </TableColumnItems>
+                    </TableRowEntry>
+                 </TableRowEntries>
+            </TableControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewDetailed</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Detailed</TypeName>
+                </ViewSelectedBy>
+                <ListControl>
+                <ListEntries>
+                    <ListEntry>
+                        <ListItems>
+                            <ListItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:X}</FormatString>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Mnemonic</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Operands</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Bytes</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>Size</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>RegRead</PropertyName>
+                            </ListItem>
+                            <ListItem>
+                                <PropertyName>RegWrite</PropertyName>
+                            </ListItem>
+                        </ListItems>
+                    </ListEntry>
+                </ListEntries>
+            </ListControl>
+        </View>
+        <View>
+            <Name>CapstoneDisassemblyViewDetailed</Name>
+                <ViewSelectedBy>
+                    <TypeName>CapstoneDisassembly.Detailed</TypeName>
+                </ViewSelectedBy>
+            <TableControl>
+                <TableHeaders>
+                    <TableColumnHeader>
+                        <Label>Address</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Mnemonic</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Operands</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Bytes</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>Size</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>RegRead</Label>
+                    </TableColumnHeader>
+                    <TableColumnHeader>
+                        <Label>RegWrite</Label>
+                    </TableColumnHeader>
+                </TableHeaders>
+                <TableRowEntries>
+                    <TableRowEntry>
+                        <TableColumnItems>
+                            <TableColumnItem>
+                                <PropertyName>Address</PropertyName>
+                                <FormatString>0x{0:x}</FormatString>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Mnemonic</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Operands</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Bytes</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>Size</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>RegRead</PropertyName>
+                            </TableColumnItem>
+                            <TableColumnItem>
+                                <PropertyName>RegWrite</PropertyName>
+                            </TableColumnItem>
+                        </TableColumnItems>
+                    </TableRowEntry>
+                 </TableRowEntries>
+            </TableControl>
+        </View>
+    </ViewDefinitions>
+</Configuration>
+\ No newline at end of file
diff --git a/capstone/bindings/powershell/Capstone/Capstone.psd1 b/capstone/bindings/powershell/Capstone/Capstone.psd1
new file mode 100755
index 000000000..4224b0421
--- /dev/null
+++ b/capstone/bindings/powershell/Capstone/Capstone.psd1
@@ -0,0 +1,118 @@
+#
+# Module manifest for module 'Capstone'
+#
+
+@{
+
+# Script module or binary module file associated with this manifest.
+ModuleToProcess = 'Capstone.psm1'
+
+# Version number of this module.
+ModuleVersion = '0.0.0.2'
+
+# Supported PSEditions
+# CompatiblePSEditions = @()
+
+# ID used to uniquely identify this module
+GUID = 'd34db33f-9958-436d-a2d8-a77844a2bda5'
+
+# Author of this module
+Author = 'Ruben Boonen, beatcracker'
+
+# Company or vendor of this module
+# CompanyName = 'Unknown'
+
+# Copyright statement for this module
+Copyright = 'BSD 3-Clause'
+
+# Description of the functionality provided by this module
+Description = 'Capstone Engine Binding Module'
+
+# Minimum version of the Windows PowerShell engine required by this module
+PowerShellVersion = '2.0'
+
+# Name of the Windows PowerShell host required by this module
+# PowerShellHostName = ''
+
+# Minimum version of the Windows PowerShell host required by this module
+# PowerShellHostVersion = ''
+
+# Minimum version of Microsoft .NET Framework required by this module. This prerequisite is valid for the PowerShell Desktop edition only.
+# DotNetFrameworkVersion = ''
+
+# Minimum version of the common language runtime (CLR) required by this module. This prerequisite is valid for the PowerShell Desktop edition only.
+# CLRVersion = ''
+
+# Processor architecture (None, X86, Amd64) required by this module
+# ProcessorArchitecture = ''
+
+# Modules that must be imported into the global environment prior to importing this module
+# RequiredModules = @()
+
+# Assemblies that must be loaded prior to importing this module
+# RequiredAssemblies = @()
+
+# Script files (.ps1) that are run in the caller's environment prior to importing this module.
+# ScriptsToProcess = @()
+
+# Type files (.ps1xml) to be loaded when importing this module
+# TypesToProcess = @()
+
+# Format files (.ps1xml) to be loaded when importing this module
+FormatsToProcess = 'Capstone.Format.ps1xml'
+
+# Modules to import as nested modules of the module specified in RootModule/ModuleToProcess
+# NestedModules = @()
+
+# Functions to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no functions to export.
+FunctionsToExport = 'Get-CapstoneVersion', 'Get-CapstoneDisassembly'
+
+# Cmdlets to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no cmdlets to export.
+CmdletsToExport = @()
+
+# Variables to export from this module
+VariablesToExport = @()
+
+# Aliases to export from this module, for best performance, do not use wildcards and do not delete the entry, use an empty array if there are no aliases to export.
+AliasesToExport = @()
+
+# DSC resources to export from this module
+# DscResourcesToExport = @()
+
+# List of all modules packaged with this module
+# ModuleList = @()
+
+# List of all files packaged with this module
+# FileList = @()
+
+# Private data to pass to the module specified in RootModule/ModuleToProcess. This may also contain a PSData hashtable with additional module metadata used by PowerShell.
+PrivateData = @{
+
+    PSData = @{
+
+        # Tags applied to this module. These help with module discovery in online galleries.
+        # Tags = @()
+
+        # A URL to the license for this module.
+        # LicenseUri = ''
+
+        # A URL to the main website for this project.
+        # ProjectUri = ''
+
+        # A URL to an icon representing this module.
+        # IconUri = ''
+
+        # ReleaseNotes of this module
+        # ReleaseNotes = ''
+
+    } # End of PSData hashtable
+
+} # End of PrivateData hashtable
+
+# HelpInfo URI of this module
+# HelpInfoURI = ''
+
+# Default prefix for commands exported from this module. Override the default prefix using Import-Module -Prefix.
+# DefaultCommandPrefix = ''
+
+}
+\ No newline at end of file
diff --git a/capstone/bindings/powershell/Capstone/Capstone.psm1 b/capstone/bindings/powershell/Capstone/Capstone.psm1
new file mode 100755
index 000000000..ba50143a8
--- /dev/null
+++ b/capstone/bindings/powershell/Capstone/Capstone.psm1
@@ -0,0 +1,500 @@
+<#
+.SYNOPSIS
+    Get Capstone version as Version object
+#>
+function Get-CapstoneVersion {
+    $Version = [System.BitConverter]::GetBytes(
+        [Capstone]::cs_version($null, $null)
+    )
+
+    New-Object -TypeName version -ArgumentList @(
+        $Version[1]
+        $Version[0]
+        0
+        0
+    )
+}
+
+<#
+.SYNOPSIS
+    Create C# bindings for capstone.dll
+
+.PARAMETER DllPath
+    Path to capstone.dll
+#>
+function Initialize-Capstone {
+    [CmdletBinding()]
+    Param (
+        [Parameter(Mandatory = $true)]
+        [ValidateScript( {
+                try {
+                    Test-Path -Path $_ -PathType Leaf -ErrorAction Stop
+                } catch {
+                    throw "Capstone DLL is missing: $DllPath"
+                }
+            })]
+        [ValidateNotNullOrEmpty()]
+        [string]$DllPath
+    )
+
+    # Escape path for use in inline C#
+    $DllPath = $DllPath.Replace('\', '\\')
+
+    # Inline C# to parse the unmanaged capstone DLL
+    # http://stackoverflow.com/questions/16552801/how-do-i-conditionally-add-a-class-with-add-type-typedefinition-if-it-isnt-add
+    if (-not ([System.Management.Automation.PSTypeName]'Capstone').Type) {
+        Add-Type -TypeDefinition @"
+        using System;
+        using System.Diagnostics;
+        using System.Runtime.InteropServices;
+        using System.Security.Principal;
+
+        [StructLayout(LayoutKind.Sequential)]
+        public struct cs_insn
+        {
+            public uint id;
+            public ulong address;
+            public ushort size;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 24)]
+            public byte[] bytes;
+            [MarshalAs(UnmanagedType.ByValTStr, SizeConst = 32)]
+            public string mnemonic;
+            [MarshalAs(UnmanagedType.ByValTStr, SizeConst = 160)]
+            public string operands;
+            public IntPtr detail;
+        }
+
+        /// Partial, only architecture-independent internal data
+        [StructLayout(LayoutKind.Sequential)]
+        public struct cs_detail
+        {
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 16)]
+            public byte[] regs_read;
+            public byte regs_read_count;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 20)]
+            public byte[] regs_write;
+            public byte regs_write_count;
+            [MarshalAs(UnmanagedType.ByValArray, SizeConst = 8)]
+            public byte[] groups;
+            public byte groups_count;
+        }
+
+        public enum cs_err : int
+        {
+            CS_ERR_OK = 0,    /// No error: everything was fine
+            CS_ERR_MEM,       /// Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
+            CS_ERR_ARCH,      /// Unsupported architecture: cs_open()
+            CS_ERR_HANDLE,    /// Invalid handle: cs_op_count(), cs_op_index()
+            CS_ERR_CSH,       /// Invalid csh argument: cs_close(), cs_errno(), cs_option()
+            CS_ERR_MODE,      /// Invalid/unsupported mode: cs_open()
+            CS_ERR_OPTION,    /// Invalid/unsupported option: cs_option()
+            CS_ERR_DETAIL,    /// Information is unavailable because detail option is OFF
+            CS_ERR_MEMSETUP,  /// Dynamic memory management uninitialized (see CS_OPT_MEM)
+            CS_ERR_VERSION,   /// Unsupported version (bindings)
+            CS_ERR_DIET,      /// Access irrelevant data in "diet" engine
+            CS_ERR_SKIPDATA,  /// Access irrelevant data for "data" instruction in SKIPDATA mode
+            CS_ERR_X86_ATT,   /// X86 AT&T syntax is unsupported (opt-out at compile time)
+            CS_ERR_X86_INTEL, /// X86 Intel syntax is unsupported (opt-out at compile time)
+        }
+        public enum cs_arch : int
+        {
+            CS_ARCH_ARM = 0,      /// ARM architecture (including Thumb, Thumb-2)
+            CS_ARCH_ARM64,        /// ARM-64, also called AArch64
+            CS_ARCH_MIPS,         /// Mips architecture
+            CS_ARCH_X86,          /// X86 architecture (including x86 & x86-64)
+            CS_ARCH_PPC,          /// PowerPC architecture
+            CS_ARCH_SPARC,        /// Sparc architecture
+            CS_ARCH_SYSZ,         /// SystemZ architecture
+            CS_ARCH_XCORE,        /// XCore architecture
+            CS_ARCH_MAX,
+            CS_ARCH_ALL = 0xFFFF, /// All architectures - for cs_support()
+        }
+        public enum cs_mode : int
+        {
+            CS_MODE_LITTLE_ENDIAN = 0,    /// little-endian mode (default mode)
+            CS_MODE_ARM = 0,              /// 32-bit ARM
+            CS_MODE_16 = 1 << 1,          /// 16-bit mode (X86)
+            CS_MODE_32 = 1 << 2,          /// 32-bit mode (X86)
+            CS_MODE_64 = 1 << 3,          /// 64-bit mode (X86, PPC)
+            CS_MODE_THUMB = 1 << 4,       /// ARM's Thumb mode, including Thumb-2
+            CS_MODE_MCLASS = 1 << 5,      /// ARM's Cortex-M series
+            CS_MODE_V8 = 1 << 6,          /// ARMv8 A32 encodings for ARM
+            CS_MODE_MICRO = 1 << 4,       /// MicroMips mode (MIPS)
+            CS_MODE_MIPS3 = 1 << 5,       /// Mips III ISA
+            CS_MODE_MIPS32R6 = 1 << 6,    /// Mips32r6 ISA
+            CS_MODE_MIPSGP64 = 1 << 7,    /// General Purpose Registers are 64-bit wide (MIPS)
+            CS_MODE_V9 = 1 << 4,          /// SparcV9 mode (Sparc)
+            CS_MODE_BIG_ENDIAN = 1 << 31, /// big-endian mode
+            CS_MODE_MIPS32 = CS_MODE_32,  /// Mips32 ISA (Mips)
+            CS_MODE_MIPS64 = CS_MODE_64,  /// Mips64 ISA (Mips)
+        }
+
+        public static class Capstone
+        {
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_open(
+                cs_arch arch,
+                cs_mode mode,
+                ref IntPtr handle);
+
+            [DllImport("$DllPath")]
+            public static extern UInt32 cs_disasm(
+                IntPtr handle,
+                byte[] code,
+                int code_size,
+                ulong address,
+                int count,
+                ref IntPtr insn);
+
+            [DllImport("$DllPath")]
+            public static extern bool cs_free(
+                IntPtr insn,
+                int count);
+
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_close(
+                ref IntPtr handle);
+
+            [DllImport("$DllPath")]
+            public static extern cs_err cs_option(
+                IntPtr handle,
+                int type,
+                int value);
+
+            [DllImport("$DllPath", CallingConvention = CallingConvention.Cdecl)]
+            public static extern IntPtr cs_reg_name(
+                IntPtr handle,
+                uint reg_id);
+
+            [DllImport("$DllPath")]
+            public static extern int cs_version(
+                uint major,
+                uint minor);
+        }
+"@
+    } else {
+        Write-Verbose 'C# bindings are already compiled'
+    }
+}
+
+function Get-CapstoneDisassembly {
+<#
+.SYNOPSIS
+    Powershell wrapper for Capstone (using inline C#).
+
+.DESCRIPTION
+    Author: Ruben Boonen (@FuzzySec), @beatcracker
+    License: BSD 3-Clause
+    Required Dependencies: None
+    Optional Dependencies: None
+
+.PARAMETER Architecture
+    Architecture type.
+
+.PARAMETER Mode
+    Mode type.
+
+.PARAMETER Bytes
+    Byte array to be disassembled.
+
+.PARAMETER Syntax
+    Syntax for output assembly.
+
+.PARAMETER Address
+    Assign address for the first instruction to be disassembled.
+
+.PARAMETER Detailed
+    Return detailed output.
+
+.PARAMETER Version
+    Print ASCII version banner.
+
+.EXAMPLE
+
+    C:\PS> $Bytes = [byte[]] @( 0x10, 0xf1, 0x10, 0xe7, 0x11, 0xf2, 0x31, 0xe7, 0xdc, 0xa1, 0x2e, 0xf3, 0xe8, 0x4e, 0x62, 0xf3 )
+    C:\PS> Get-CapstoneDisassembly -Architecture CS_ARCH_ARM -Mode CS_MODE_ARM -Bytes $Bytes
+
+    Address     : 0x100000
+    Instruction : sdiv r0, r0, r1
+
+    Address     : 0x100004
+    Instruction : udiv r1, r1, r2
+
+    Address     : 0x100008
+    Instruction : vbit q5, q15, q6
+
+    Address     : 0x10000C
+    Instruction : vcgt.f32 q10, q9, q12
+
+.EXAMPLE
+
+    # Detailed mode & ATT syntax
+    C:\PS> $Bytes = [byte[]] @( 0xB8, 0x0A, 0x00, 0x00, 0x00, 0xF7, 0xF3 )
+    C:\PS> Get-CapstoneDisassembly -Architecture CS_ARCH_X86 -Mode CS_MODE_32 -Bytes $Bytes -Syntax ATT -Detailed
+
+    Address  : 0x100000
+    Mnemonic : movl
+    Operands : $0xa, %eax
+    Bytes    : {184, 10, 0, 0...}
+    Size     : 5
+    RegRead  :
+    RegWrite :
+
+    Address  : 0x100005
+    Mnemonic : divl
+    Operands : %ebx
+    Bytes    : {247, 243}
+    Size     : 2
+    RegRead  : {eax, edx}
+    RegWrite : {eax, edx, eflags}
+
+.EXAMPLE
+
+    # Get-CapstoneDisassembly emits objects
+    C:\PS> $Bytes = [byte[]] @( 0xB8, 0x0A, 0x00, 0x00, 0x00, 0xF7, 0xF3 )
+    C:\PS> $Object = Get-CapstoneDisassembly -Architecture CS_ARCH_X86 -Mode CS_MODE_32 -Bytes $Bytes -Detailed
+    C:\PS> $Object | Select-Object -Property Size, Mnemonic, Operands
+
+    Size Mnemonic Operands
+    ---- -------- --------
+    5 mov      eax, 0xa
+    2 div      ebx
+#>
+    [CmdletBinding(DefaultParameterSetName = 'Capstone')]
+    Param (
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateSet(
+            'CS_ARCH_ARM',
+            'CS_ARCH_ARM64',
+            'CS_ARCH_MIPS',
+            'CS_ARCH_X86',
+            'CS_ARCH_PPC',
+            'CS_ARCH_SPARC',
+            'CS_ARCH_SYSZ',
+            'CS_ARCH_XCORE',
+            'CS_ARCH_MAX',
+            'CS_ARCH_ALL'
+        )]
+        [string]$Architecture,
+
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateSet(
+            'CS_MODE_LITTLE_ENDIAN',
+            'CS_MODE_ARM',
+            'CS_MODE_16',
+            'CS_MODE_32',
+            'CS_MODE_64',
+            'CS_MODE_THUMB',
+            'CS_MODE_MCLASS',
+            'CS_MODE_V8',
+            'CS_MODE_MICRO',
+            'CS_MODE_MIPS3',
+            'CS_MODE_MIPS32R6',
+            'CS_MODE_MIPSGP64',
+            'CS_MODE_V9',
+            'CS_MODE_BIG_ENDIAN',
+            'CS_MODE_MIPS32',
+            'CS_MODE_MIPS64'
+        )]
+        [string]$Mode,
+
+        [Parameter(ParameterSetName = 'Capstone', Mandatory = $true)]
+        [ValidateNotNullOrEmpty()]
+        [byte[]]$Bytes,
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [ValidateSet(
+            'Intel',
+            'ATT'
+        )]
+        [string]$Syntax = 'Intel',
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [uint64]$Address = 0x100000,
+
+        [Parameter(ParameterSetName = 'Capstone')]
+        [switch]$Detailed,
+
+        [Parameter(ParameterSetName = 'Version')]
+        [switch]$Version
+    )
+
+    if ($Version) {
+        $Banner = @'
+
+                 (((;
+              (; "((((\
+           ;((((((; "((((;
+          ((((""\(((( "((((
+        ((((" ((\ "(((( "(((\
+      ;(((/ ((((((( "(((( \(((
+     ((((" (((* "(((( \(((;"(((\
+    ((((";((("/(( \(((;"(((\"(((\
+   (((( (((( ((((" "(((\ ((() (((\
+  ;((("(((( (((*     **"" ((()"(((;
+  (((" ((( (((( ((((((((((((((:*(((
+ (((( (((*)((( ********"""" ;;(((((;
+ (((* ((( (((((((((((((((((((((*"" (
+ ((("(((( """***********"""" ;;(((((
+  "" (((((((((((((((((((((((((((*""
+         """****(((((****"""
+
+     -=[Capstone Engine v{0}]=-
+
+'@ -f (Get-CapstoneVersion).ToString(2)
+        # Mmm ASCII version banner!
+        return $Banner
+    }
+
+    # Disasm Handle
+    $DisAsmHandle = [System.IntPtr]::Zero
+
+    # Initialize Capstone with cs_open()
+    $CallResult = [Capstone]::cs_open($Architecture, $Mode, [ref]$DisAsmHandle)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        if ($CallResult -eq 'CS_ERR_MODE') {
+            throw "Invalid Architecture/Mode combination: $Architecture/$Mode"
+        } else {
+            throw "cs_open error: $CallResult"
+        }
+    }
+
+    # Set disassembly syntax
+    #---
+    # cs_opt_type  -> CS_OPT_SYNTAX = 1
+    #---
+    # cs_opt_value -> CS_OPT_SYNTAX_INTEL = 1
+    #              -> CS_OPT_SYNTAX_ATT   = 2
+    if ($Syntax -eq 'Intel') {
+        $CS_OPT_SYNTAX = 1
+    } else {
+        $CS_OPT_SYNTAX = 2
+    }
+
+    $CallResult = [Capstone]::cs_option($DisAsmHandle, 1, $CS_OPT_SYNTAX)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw "cs_option error: $CallResult"
+    }
+
+    # Set disassembly detail
+    #---
+    # cs_opt_type  -> CS_OPT_DETAIL = 2
+    #---
+    # cs_opt_value -> CS_OPT_ON  = 3
+    #              -> CS_OPT_OFF = 0
+    if ($Detailed) {
+        $CS_OPT = 3
+    } else {
+        $CS_OPT = 0
+    }
+
+    $CallResult = [Capstone]::cs_option($DisAsmHandle, 2, $CS_OPT)
+    if ($CallResult -ne 'CS_ERR_OK') {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw "cs_option error: $CallResult"
+    }
+
+    # Out Buffer Handle
+    $InsnHandle = [System.IntPtr]::Zero
+
+    # Disassemble bytes
+    $Count = [Capstone]::cs_disasm($DisAsmHandle, $Bytes, $Bytes.Count, $Address, 0, [ref]$InsnHandle)
+
+    if ($Count -gt 0) {
+        # Result struct
+        $cs_insn = if ($PSVersionTable.PSVersion.Major -gt 2) {
+            [cs_insn]@{}
+        } else {
+            New-Object -TypeName cs_insn
+        }
+
+        $cs_insn_size = [System.Runtime.InteropServices.Marshal]::SizeOf($cs_insn)
+        $cs_insn = $cs_insn.GetType()
+
+        # Result detail struct
+        $cs_detail = if ($PSVersionTable.PSVersion.Major -gt 2) {
+            [cs_detail]@{}
+        } else {
+            New-Object -TypeName cs_detail
+        }
+        $cs_detail = $cs_detail.GetType()
+
+        # Result buffer offset
+        $BuffOffset = $InsnHandle.ToInt64()
+
+        for ($i = 0 ; $i -lt $Count ; $i++) {
+            # Cast Offset to cs_insn
+            $Cast = [System.Runtime.InteropServices.Marshal]::PtrToStructure([System.Intptr]$BuffOffset, [type]$cs_insn)
+
+            if ($CS_OPT -eq 0) {
+                $Disassembly = @{
+                    Address     = $Cast.address
+                    Instruction = '{0} {1}' -f $Cast.mnemonic, $Cast.operands
+                }
+
+                if ($PSVersionTable.PSVersion.Major -gt 2) {
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSTypeName ='CapstoneDisassembly.Simple'
+                    [pscustomobject]$Disassembly
+                } else {
+                    $Disassembly = New-Object -TypeName PSObject -Property $Disassembly
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSObject.TypeNames.Insert(0, 'CapstoneDisassembly.Simple')
+                    $Disassembly
+                }
+            } else {
+                $DetailCast = [System.Runtime.InteropServices.Marshal]::PtrToStructure($Cast.detail, [type]$cs_detail)
+                if ($DetailCast.regs_read_count -gt 0) {
+                    $RegRead = for ($r = 0 ; $r -lt $DetailCast.regs_read_count ; $r++) {
+                        $NamePointer = [Capstone]::cs_reg_name($DisAsmHandle, $DetailCast.regs_read[$r])
+                        [System.Runtime.InteropServices.Marshal]::PtrToStringAnsi($NamePointer)
+                    }
+                }
+
+                if ($DetailCast.regs_write_count -gt 0) {
+                    $RegWrite = for ($r = 0 ; $r -lt $DetailCast.regs_write_count ; $r++) {
+                        $NamePointer = [Capstone]::cs_reg_name($DisAsmHandle, $DetailCast.regs_write[$r])
+                        [System.Runtime.InteropServices.Marshal]::PtrToStringAnsi($NamePointer)
+                    }
+                }
+
+                $Disassembly = @{
+                    Address    = $Cast.address
+                    Mnemonic   = $Cast.mnemonic
+                    Operands   = $Cast.operands
+                    Bytes      = $Cast.bytes[0..($Cast.size - 1)]
+                    Size       = $Cast.size
+                    RegRead    = $RegRead
+                    RegWrite   = $RegWrite
+                }
+
+                if ($PSVersionTable.PSVersion.Major -gt 2) {
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSTypeName = 'CapstoneDisassembly.Detailed'
+                    [pscustomobject]$Disassembly
+                } else {
+                    $Disassembly = New-Object -TypeName PSObject -Property $Disassembly
+                    # Add TypeName for PS formatting and output result
+                    $Disassembly.PSObject.TypeNames.Insert(0, 'CapstoneDisassembly.Detailed')
+                    $Disassembly
+                }
+            }
+            $BuffOffset = $BuffOffset + $cs_insn_size
+        }
+    } else {
+        $CallResult = [Capstone]::cs_close([ref]$DisAsmHandle)
+        throw 'Disassembly Failed'
+    }
+
+    # Free Buffer Handle
+    $CallResult = [Capstone]::cs_free($InsnHandle, $Count)
+}
+
+#region Init
+
+Initialize-Capstone -DllPath (
+    Join-Path -Path $PSScriptRoot -ChildPath 'Lib\Capstone\capstone.dll'
+) -ErrorAction Stop
+
+#endregion
+\ No newline at end of file
diff --git a/capstone/bindings/powershell/Capstone/Lib/Capstone/.gitignore b/capstone/bindings/powershell/Capstone/Lib/Capstone/.gitignore
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/capstone/bindings/powershell/Capstone/Lib/Capstone/.gitignore
diff --git a/capstone/bindings/powershell/README.md b/capstone/bindings/powershell/README.md
new file mode 100755
index 000000000..1197a318f
--- /dev/null
+++ b/capstone/bindings/powershell/README.md
@@ -0,0 +1,30 @@
+This documentation explains how to install & use the PowerShell binding for Capstone.
+
+
+Install
+------
+
+Compile the relevant version (x86/x64) of `capstone.dll` and place it in
+`./Capstone/Lib/Capstone/`.
+
+Alternatively, pre-compiled DLL’s can be obtained from the Capstone homepage
+at http://capstone-engine.org/download
+
+
+Usage
+-----
+
+To use the PowerShell binding, the entire Capstone folder should be added to
+one of the PowerShell module directories:
+
+    # Global PSModulePath path
+    %Windir%\System32\WindowsPowerShell\v1.0\Modules
+
+    # User PSModulePath path
+    %UserProfile%\Documents\WindowsPowerShell\Modules
+
+Once this is done the module can be initialized by typing “Import-Module Capstone”
+in a new PowerShell terminal. Further information on the usage of the binding
+can be obtained with the following command:
+
+    Get-Help Get-CapstoneDisassembly -Full
+\ No newline at end of file
diff --git a/capstone/bindings/python/.gitignore b/capstone/bindings/python/.gitignore
new file mode 100644
index 000000000..61178e6a1
--- /dev/null
+++ b/capstone/bindings/python/.gitignore
@@ -0,0 +1,9 @@
+MANIFEST
+dist/
+src/
+capstone/lib
+capstone/include
+pyx/lib
+pyx/include
+pyx/*.c
+pyx/*.pyx
diff --git a/capstone/bindings/python/BUILDING.txt b/capstone/bindings/python/BUILDING.txt
new file mode 100644
index 000000000..e527b153e
--- /dev/null
+++ b/capstone/bindings/python/BUILDING.txt
@@ -0,0 +1,77 @@
+0. This documentation explains how to install the Python bindings for Capstone
+   from source. If you want to install it from a PyPi package (recommended if
+   you are on Windows), see README.txt.
+
+1. To install Capstone and the Python bindings on *nix, run the command below:
+
+		$ sudo make install
+
+   To install Capstone for Python 3, run the command below:
+   (Note: this requires python3 installed in your machine)
+
+		$ sudo make install3
+
+   To control the install destination, set the DESTDIR environment variable.
+
+2. For better Python performance, install cython-based binding with:
+
+		$ sudo make install_cython
+
+	Note that this requires Cython installed first. To install Cython, see
+	below.
+	
+3. To install Cython, you have to ensure that the header files
+   and the static library for Python are installed beforehand.
+
+	E.g. on Ubuntu, do:
+
+		$ sudo apt-get install python-dev
+
+	Depending on if you already have pip or easy_install installed, install
+	Cython with either:
+
+		$ sudo pip install cython
+	or:
+		$ sudo easy_install cython
+
+	NOTE: Depending on your distribution you might also be able to
+	      install the required Cython version using your repository.
+
+	E.g. on Ubuntu, do:
+	
+		$ sudo apt-get install cython
+
+	However, our cython-based binding requires Cython version 0.19 or newer,
+	but sometimes distributions only provide older version. Make sure to
+	verify the current installed version before going into section 2 above.
+	
+	E.g, on Ubuntu, you can verify the current Cython version with:
+
+		$ apt-cache policy cython
+
+	Which should at least print version 0.19
+
+4. This directory contains some test code to show how to use the Capstone API.
+
+- test_basic.py
+  This code shows the most simple form of API where we only want to get basic
+  information out of disassembled instruction, such as address, mnemonic and
+  operand string.
+
+- test_lite.py
+  Similarly to test_basic.py, but this code shows how to use disasm_lite(), a lighter
+  method to disassemble binary. Unlike disasm() API (used by test_basic.py), which returns
+  CsInsn objects, this API just returns tuples of (address, size, mnemonic, op_str).
+
+  The main reason for using this API is better performance: disasm_lite() is at least
+  20% faster than disasm(). Memory usage is also less. So if you just need basic
+  information out of disassembler, use disasm_lite() instead of disasm().
+
+- test_detail.py:
+  This code shows how to access to architecture-neutral information in disassembled
+  instructions, such as implicit registers read/written, or groups of instructions
+  that this instruction belong to.
+
+- test_<arch>.py
+  These code show how to access architecture-specific information for each
+  architecture.
diff --git a/capstone/bindings/python/LICENSE.TXT b/capstone/bindings/python/LICENSE.TXT
new file mode 100644
index 000000000..0dabdc749
--- /dev/null
+++ b/capstone/bindings/python/LICENSE.TXT
@@ -0,0 +1,31 @@
+This is the software license for Capstone disassembly framework.
+Capstone has been designed & implemented by Nguyen Anh Quynh <aquynh@gmail.com>
+
+See http://www.capstone-engine.org for further information.
+
+Copyright (c) 2013, COSEINC.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+* Neither the name of the developer(s) nor the names of its
+  contributors may be used to endorse or promote products derived from this
+  software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/capstone/bindings/python/MANIFEST.in b/capstone/bindings/python/MANIFEST.in
new file mode 100644
index 000000000..98776c7d9
--- /dev/null
+++ b/capstone/bindings/python/MANIFEST.in
@@ -0,0 +1,5 @@
+recursive-include src *
+include LICENSE.TXT
+include README.txt
+include BUILDING.txt
+include Makefile
diff --git a/capstone/bindings/python/Makefile b/capstone/bindings/python/Makefile
new file mode 100644
index 000000000..07f7e5230
--- /dev/null
+++ b/capstone/bindings/python/Makefile
@@ -0,0 +1,82 @@
+PYTHON2 ?= python
+PYTHON3 ?= python3
+
+.PHONY: gen_const install install3 install_cython sdist sdist3 bdist bdist3 clean check
+
+gen_const:
+	cd .. && $(PYTHON2) const_generator.py python
+
+install:
+	rm -rf src/
+	if test -n "${DESTDIR}"; then \
+		$(PYTHON2) setup.py build install --root="${DESTDIR}"; \
+	else \
+		$(PYTHON2) setup.py build install; \
+	fi
+
+install3:
+	rm -rf src/
+	if test -n "${DESTDIR}"; then \
+		$(PYTHON3) setup.py build install --root="${DESTDIR}"; \
+	else \
+		$(PYTHON3) setup.py build install; \
+	fi
+
+# NOTE: Newer cython can be installed by: sudo pip install --upgrade cython
+install_cython:
+	rm -rf src/
+	if test -n "${DESTDIR}"; then \
+		$(PYTHON2) setup_cython.py build install --root="${DESTDIR}"; \
+	else \
+		$(PYTHON2) setup_cython.py build install; \
+	fi
+
+install3_cython:
+	rm -rf src/
+	if test -n "${DESTDIR}"; then \
+		$(PYTHON3) setup_cython.py build install --root="${DESTDIR}"; \
+	else \
+		$(PYTHON3) setup_cython.py build install; \
+	fi
+
+# build & upload PyPi package with source code of the core
+sdist:
+	rm -rf src/ dist/
+	$(PYTHON2) setup.py sdist register upload
+
+# build & upload PyPi package with source code of the core
+sdist3:
+	rm -rf src/ dist/
+	$(PYTHON3) setup.py sdist register upload
+
+# build & upload PyPi package with prebuilt core
+bdist:
+	rm -rf src/ dist/
+	$(PYTHON2) setup.py bdist_wheel register upload
+
+# build & upload PyPi package with prebuilt core
+bdist3:
+	rm -rf src/ dist/
+	$(PYTHON3) setup.py bdist_wheel register upload
+
+clean:
+	rm -rf build/ src/ dist/ *.egg-info
+	rm -rf capstone/lib capstone/include pyx/lib pyx/include
+	rm -f pyx/*.c pyx/__init__.py
+	for f in capstone/*.py; do rm -f pyx/$$(basename $$f)x; done
+	rm -f MANIFEST
+	rm -f *.pyc capstone/*.pyc
+
+
+TESTS = test_basic.py test_detail.py test_arm.py test_arm64.py test_m68k.py test_mips.py
+TESTS += test_ppc.py test_sparc.py test_systemz.py test_x86.py test_xcore.py test_tms320c64x.py
+TESTS += test_m680x.py test_skipdata.py test_mos65xx.py test_bpf.py test_riscv.py
+TESTS += test_evm.py
+
+check:
+	@for t in $(TESTS); do \
+		echo Check $$t ... ; \
+		./$$t > /dev/null; \
+		if [ $$? -eq 0 ]; then echo OK; else echo FAILED; exit 1; fi \
+	done
+
diff --git a/capstone/bindings/python/README.txt b/capstone/bindings/python/README.txt
new file mode 100644
index 000000000..69e36bbbb
--- /dev/null
+++ b/capstone/bindings/python/README.txt
@@ -0,0 +1,65 @@
+To install Capstone, you should run `pip install capstone`.
+
+If you would like to build Capstone with just the source distribution, without
+pip, just run `python setup.py install` in the folder with setup.py in it.
+
+In order to use this source distribution, you will need an environment that can
+compile C code. On Linux, this is usually easy, but on Windows, this involves
+installing Visual Studio and using the "Developer Command Prompt" to perform the
+installation. See BUILDING.txt for more information.
+
+By default, attempting to install the python bindings will trigger a build of
+the capstone native core. If this is undesirable for whatever reason, for
+instance, you already have a globally installed copy of libcapstone, you may
+inhibit the build by setting the environment variable LIBCAPSTONE_PATH. The
+exact value is not checked, just setting it will inhibit the build. During
+execution, this variable may be set to the path of a directory containing a
+specific version of libcapstone you would like to use.
+
+If you don't want to build your own copy of Capstone, you can use a precompiled
+binary distribution from PyPI. Saying `pip install capstone` should
+automatically obtain an appropriate copy for your system. If it does not, please
+open an issue at https://github.com/aquynh/capstone and tag @rhelmot - she
+will fix this, probably!
+
+--------------------------------------------------------------------------------
+
+Capstone is a disassembly framework with the target of becoming the ultimate
+disasm engine for binary analysis and reversing in the security community.
+
+Created by Nguyen Anh Quynh, then developed and maintained by a small community,
+Capstone offers some unparalleled features:
+
+- Support multiple hardware architectures: ARM, ARM64 (ARMv8), Mips, PPC, Sparc,
+  SystemZ, XCore and X86 (including X86_64).
+
+- Having clean/simple/lightweight/intuitive architecture-neutral API.
+
+- Provide details on disassembled instruction (called “decomposer” by others).
+
+- Provide semantics of the disassembled instruction, such as list of implicit
+  registers read & written.
+
+- Implemented in pure C language, with lightweight wrappers for C++, C#, Go,
+  Java, NodeJS, Ocaml, Python, Ruby & Vala ready (available in main code,
+  or provided externally by the community).
+
+- Native support for all popular platforms: Windows, Mac OSX, iOS, Android,
+  Linux, *BSD, Solaris, etc.
+
+- Thread-safe by design.
+
+- Special support for embedding into firmware or OS kernel.
+
+- High performance & suitable for malware analysis (capable of handling various
+  X86 malware tricks).
+
+- Distributed under the open source BSD license.
+
+Further information is available at http://www.capstone-engine.org
+
+
+[License]
+
+This project is released under the BSD license. If you redistribute the binary
+or source code of Capstone, please attach file LICENSE.TXT with your products.
diff --git a/capstone/bindings/python/capstone/arm.py b/capstone/bindings/python/capstone/arm.py
new file mode 100644
index 000000000..4ed902efa
--- /dev/null
+++ b/capstone/bindings/python/capstone/arm.py
@@ -0,0 +1,82 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .arm_const import *
+
+# define the API
+class ArmOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('index', ctypes.c_uint),
+        ('scale', ctypes.c_int),
+        ('disp', ctypes.c_int),
+        ('lshift', ctypes.c_int),
+    )
+
+class ArmOpShift(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', ctypes.c_uint),
+    )
+
+class ArmOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int32),
+        ('fp', ctypes.c_double),
+        ('mem', ArmOpMem),
+        ('setend', ctypes.c_int),
+    )
+
+class ArmOp(ctypes.Structure):
+    _fields_ = (
+        ('vector_index', ctypes.c_int),
+        ('shift', ArmOpShift),
+        ('type', ctypes.c_uint),
+        ('value', ArmOpValue),
+        ('subtracted', ctypes.c_bool),
+        ('access', ctypes.c_uint8),
+        ('neon_lane', ctypes.c_int8),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def fp(self):
+        return self.value.fp
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def setend(self):
+        return self.value.setend
+
+
+class CsArm(ctypes.Structure):
+    _fields_ = (
+        ('usermode', ctypes.c_bool),
+        ('vector_size', ctypes.c_int),
+        ('vector_data', ctypes.c_int),
+        ('cps_mode', ctypes.c_int),
+        ('cps_flag', ctypes.c_int),
+        ('cc', ctypes.c_uint),
+        ('update_flags', ctypes.c_bool),
+        ('writeback', ctypes.c_bool),
+        ('mem_barrier', ctypes.c_int),
+        ('op_count', ctypes.c_uint8),
+        ('operands', ArmOp * 36),
+    )
+
+def get_arch_info(a):
+    return (a.usermode, a.vector_size, a.vector_data, a.cps_mode, a.cps_flag, a.cc, a.update_flags, \
+        a.writeback, a.mem_barrier, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/arm64.py b/capstone/bindings/python/capstone/arm64.py
new file mode 100644
index 000000000..ffd2469fe
--- /dev/null
+++ b/capstone/bindings/python/capstone/arm64.py
@@ -0,0 +1,89 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .arm64_const import *
+
+# define the API
+class Arm64OpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('index', ctypes.c_uint),
+        ('disp', ctypes.c_int32),
+    )
+
+class Arm64OpShift(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', ctypes.c_uint),
+    )
+
+class Arm64OpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('fp', ctypes.c_double),
+        ('mem', Arm64OpMem),
+        ('pstate', ctypes.c_int),
+        ('sys', ctypes.c_uint),
+        ('prefetch', ctypes.c_int),
+        ('barrier', ctypes.c_int),
+    )
+
+class Arm64Op(ctypes.Structure):
+    _fields_ = (
+        ('vector_index', ctypes.c_int),
+        ('vas', ctypes.c_int),
+        ('shift', Arm64OpShift),
+        ('ext', ctypes.c_uint),
+        ('type', ctypes.c_uint),
+        ('value', Arm64OpValue),
+        ('access', ctypes.c_uint8),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def fp(self):
+        return self.value.fp
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def pstate(self):
+        return self.value.pstate
+
+    @property
+    def sys(self):
+        return self.value.sys
+
+    @property
+    def prefetch(self):
+        return self.value.prefetch
+
+    @property
+    def barrier(self):
+        return self.value.barrier
+
+
+
+class CsArm64(ctypes.Structure):
+    _fields_ = (
+        ('cc', ctypes.c_uint),
+        ('update_flags', ctypes.c_bool),
+        ('writeback', ctypes.c_bool),
+        ('op_count', ctypes.c_uint8),
+        ('operands', Arm64Op * 8),
+    )
+
+def get_arch_info(a):
+    return (a.cc, a.update_flags, a.writeback, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/arm64_const.py b/capstone/bindings/python/capstone/arm64_const.py
new file mode 100644
index 000000000..b05792834
--- /dev/null
+++ b/capstone/bindings/python/capstone/arm64_const.py
@@ -0,0 +1,2249 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.py]
+
+ARM64_SFT_INVALID = 0
+ARM64_SFT_LSL = 1
+ARM64_SFT_MSL = 2
+ARM64_SFT_LSR = 3
+ARM64_SFT_ASR = 4
+ARM64_SFT_ROR = 5
+
+ARM64_EXT_INVALID = 0
+ARM64_EXT_UXTB = 1
+ARM64_EXT_UXTH = 2
+ARM64_EXT_UXTW = 3
+ARM64_EXT_UXTX = 4
+ARM64_EXT_SXTB = 5
+ARM64_EXT_SXTH = 6
+ARM64_EXT_SXTW = 7
+ARM64_EXT_SXTX = 8
+
+ARM64_CC_INVALID = 0
+ARM64_CC_EQ = 1
+ARM64_CC_NE = 2
+ARM64_CC_HS = 3
+ARM64_CC_LO = 4
+ARM64_CC_MI = 5
+ARM64_CC_PL = 6
+ARM64_CC_VS = 7
+ARM64_CC_VC = 8
+ARM64_CC_HI = 9
+ARM64_CC_LS = 10
+ARM64_CC_GE = 11
+ARM64_CC_LT = 12
+ARM64_CC_GT = 13
+ARM64_CC_LE = 14
+ARM64_CC_AL = 15
+ARM64_CC_NV = 16
+
+ARM64_SYSREG_INVALID = 0
+ARM64_SYSREG_MDCCSR_EL0 = 0x9808
+ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828
+ARM64_SYSREG_MDRAR_EL1 = 0x8080
+ARM64_SYSREG_OSLSR_EL1 = 0x808C
+ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83F6
+ARM64_SYSREG_PMCEID0_EL0 = 0xDCE6
+ARM64_SYSREG_PMCEID1_EL0 = 0xDCE7
+ARM64_SYSREG_MIDR_EL1 = 0xC000
+ARM64_SYSREG_CCSIDR_EL1 = 0xC800
+ARM64_SYSREG_CCSIDR2_EL1 = 0xC802
+ARM64_SYSREG_CLIDR_EL1 = 0xC801
+ARM64_SYSREG_CTR_EL0 = 0xD801
+ARM64_SYSREG_MPIDR_EL1 = 0xC005
+ARM64_SYSREG_REVIDR_EL1 = 0xC006
+ARM64_SYSREG_AIDR_EL1 = 0xC807
+ARM64_SYSREG_DCZID_EL0 = 0xD807
+ARM64_SYSREG_ID_PFR0_EL1 = 0xC008
+ARM64_SYSREG_ID_PFR1_EL1 = 0xC009
+ARM64_SYSREG_ID_DFR0_EL1 = 0xC00A
+ARM64_SYSREG_ID_AFR0_EL1 = 0xC00B
+ARM64_SYSREG_ID_MMFR0_EL1 = 0xC00C
+ARM64_SYSREG_ID_MMFR1_EL1 = 0xC00D
+ARM64_SYSREG_ID_MMFR2_EL1 = 0xC00E
+ARM64_SYSREG_ID_MMFR3_EL1 = 0xC00F
+ARM64_SYSREG_ID_ISAR0_EL1 = 0xC010
+ARM64_SYSREG_ID_ISAR1_EL1 = 0xC011
+ARM64_SYSREG_ID_ISAR2_EL1 = 0xC012
+ARM64_SYSREG_ID_ISAR3_EL1 = 0xC013
+ARM64_SYSREG_ID_ISAR4_EL1 = 0xC014
+ARM64_SYSREG_ID_ISAR5_EL1 = 0xC015
+ARM64_SYSREG_ID_ISAR6_EL1 = 0xC017
+ARM64_SYSREG_ID_AA64PFR0_EL1 = 0xC020
+ARM64_SYSREG_ID_AA64PFR1_EL1 = 0xC021
+ARM64_SYSREG_ID_AA64DFR0_EL1 = 0xC028
+ARM64_SYSREG_ID_AA64DFR1_EL1 = 0xC029
+ARM64_SYSREG_ID_AA64AFR0_EL1 = 0xC02C
+ARM64_SYSREG_ID_AA64AFR1_EL1 = 0xC02D
+ARM64_SYSREG_ID_AA64ISAR0_EL1 = 0xC030
+ARM64_SYSREG_ID_AA64ISAR1_EL1 = 0xC031
+ARM64_SYSREG_ID_AA64MMFR0_EL1 = 0xC038
+ARM64_SYSREG_ID_AA64MMFR1_EL1 = 0xC039
+ARM64_SYSREG_ID_AA64MMFR2_EL1 = 0xC03A
+ARM64_SYSREG_MVFR0_EL1 = 0xC018
+ARM64_SYSREG_MVFR1_EL1 = 0xC019
+ARM64_SYSREG_MVFR2_EL1 = 0xC01A
+ARM64_SYSREG_RVBAR_EL1 = 0xC601
+ARM64_SYSREG_RVBAR_EL2 = 0xE601
+ARM64_SYSREG_RVBAR_EL3 = 0xF601
+ARM64_SYSREG_ISR_EL1 = 0xC608
+ARM64_SYSREG_CNTPCT_EL0 = 0xDF01
+ARM64_SYSREG_CNTVCT_EL0 = 0xDF02
+ARM64_SYSREG_ID_MMFR4_EL1 = 0xC016
+ARM64_SYSREG_TRCSTATR = 0x8818
+ARM64_SYSREG_TRCIDR8 = 0x8806
+ARM64_SYSREG_TRCIDR9 = 0x880E
+ARM64_SYSREG_TRCIDR10 = 0x8816
+ARM64_SYSREG_TRCIDR11 = 0x881E
+ARM64_SYSREG_TRCIDR12 = 0x8826
+ARM64_SYSREG_TRCIDR13 = 0x882E
+ARM64_SYSREG_TRCIDR0 = 0x8847
+ARM64_SYSREG_TRCIDR1 = 0x884F
+ARM64_SYSREG_TRCIDR2 = 0x8857
+ARM64_SYSREG_TRCIDR3 = 0x885F
+ARM64_SYSREG_TRCIDR4 = 0x8867
+ARM64_SYSREG_TRCIDR5 = 0x886F
+ARM64_SYSREG_TRCIDR6 = 0x8877
+ARM64_SYSREG_TRCIDR7 = 0x887F
+ARM64_SYSREG_TRCOSLSR = 0x888C
+ARM64_SYSREG_TRCPDSR = 0x88AC
+ARM64_SYSREG_TRCDEVAFF0 = 0x8BD6
+ARM64_SYSREG_TRCDEVAFF1 = 0x8BDE
+ARM64_SYSREG_TRCLSR = 0x8BEE
+ARM64_SYSREG_TRCAUTHSTATUS = 0x8BF6
+ARM64_SYSREG_TRCDEVARCH = 0x8BFE
+ARM64_SYSREG_TRCDEVID = 0x8B97
+ARM64_SYSREG_TRCDEVTYPE = 0x8B9F
+ARM64_SYSREG_TRCPIDR4 = 0x8BA7
+ARM64_SYSREG_TRCPIDR5 = 0x8BAF
+ARM64_SYSREG_TRCPIDR6 = 0x8BB7
+ARM64_SYSREG_TRCPIDR7 = 0x8BBF
+ARM64_SYSREG_TRCPIDR0 = 0x8BC7
+ARM64_SYSREG_TRCPIDR1 = 0x8BCF
+ARM64_SYSREG_TRCPIDR2 = 0x8BD7
+ARM64_SYSREG_TRCPIDR3 = 0x8BDF
+ARM64_SYSREG_TRCCIDR0 = 0x8BE7
+ARM64_SYSREG_TRCCIDR1 = 0x8BEF
+ARM64_SYSREG_TRCCIDR2 = 0x8BF7
+ARM64_SYSREG_TRCCIDR3 = 0x8BFF
+ARM64_SYSREG_ICC_IAR1_EL1 = 0xC660
+ARM64_SYSREG_ICC_IAR0_EL1 = 0xC640
+ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xC662
+ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xC642
+ARM64_SYSREG_ICC_RPR_EL1 = 0xC65B
+ARM64_SYSREG_ICH_VTR_EL2 = 0xE659
+ARM64_SYSREG_ICH_EISR_EL2 = 0xE65B
+ARM64_SYSREG_ICH_ELRSR_EL2 = 0xE65D
+ARM64_SYSREG_ID_AA64ZFR0_EL1 = 0xC024
+ARM64_SYSREG_LORID_EL1 = 0xC527
+ARM64_SYSREG_ERRIDR_EL1 = 0xC298
+ARM64_SYSREG_ERXFR_EL1 = 0xC2A0
+ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828
+ARM64_SYSREG_OSLAR_EL1 = 0x8084
+ARM64_SYSREG_PMSWINC_EL0 = 0xDCE4
+ARM64_SYSREG_TRCOSLAR = 0x8884
+ARM64_SYSREG_TRCLAR = 0x8BE6
+ARM64_SYSREG_ICC_EOIR1_EL1 = 0xC661
+ARM64_SYSREG_ICC_EOIR0_EL1 = 0xC641
+ARM64_SYSREG_ICC_DIR_EL1 = 0xC659
+ARM64_SYSREG_ICC_SGI1R_EL1 = 0xC65D
+ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xC65E
+ARM64_SYSREG_ICC_SGI0R_EL1 = 0xC65F
+ARM64_SYSREG_OSDTRRX_EL1 = 0x8002
+ARM64_SYSREG_OSDTRTX_EL1 = 0x801A
+ARM64_SYSREG_TEECR32_EL1 = 0x9000
+ARM64_SYSREG_MDCCINT_EL1 = 0x8010
+ARM64_SYSREG_MDSCR_EL1 = 0x8012
+ARM64_SYSREG_DBGDTR_EL0 = 0x9820
+ARM64_SYSREG_OSECCR_EL1 = 0x8032
+ARM64_SYSREG_DBGVCR32_EL2 = 0xA038
+ARM64_SYSREG_DBGBVR0_EL1 = 0x8004
+ARM64_SYSREG_DBGBVR1_EL1 = 0x800C
+ARM64_SYSREG_DBGBVR2_EL1 = 0x8014
+ARM64_SYSREG_DBGBVR3_EL1 = 0x801C
+ARM64_SYSREG_DBGBVR4_EL1 = 0x8024
+ARM64_SYSREG_DBGBVR5_EL1 = 0x802C
+ARM64_SYSREG_DBGBVR6_EL1 = 0x8034
+ARM64_SYSREG_DBGBVR7_EL1 = 0x803C
+ARM64_SYSREG_DBGBVR8_EL1 = 0x8044
+ARM64_SYSREG_DBGBVR9_EL1 = 0x804C
+ARM64_SYSREG_DBGBVR10_EL1 = 0x8054
+ARM64_SYSREG_DBGBVR11_EL1 = 0x805C
+ARM64_SYSREG_DBGBVR12_EL1 = 0x8064
+ARM64_SYSREG_DBGBVR13_EL1 = 0x806C
+ARM64_SYSREG_DBGBVR14_EL1 = 0x8074
+ARM64_SYSREG_DBGBVR15_EL1 = 0x807C
+ARM64_SYSREG_DBGBCR0_EL1 = 0x8005
+ARM64_SYSREG_DBGBCR1_EL1 = 0x800D
+ARM64_SYSREG_DBGBCR2_EL1 = 0x8015
+ARM64_SYSREG_DBGBCR3_EL1 = 0x801D
+ARM64_SYSREG_DBGBCR4_EL1 = 0x8025
+ARM64_SYSREG_DBGBCR5_EL1 = 0x802D
+ARM64_SYSREG_DBGBCR6_EL1 = 0x8035
+ARM64_SYSREG_DBGBCR7_EL1 = 0x803D
+ARM64_SYSREG_DBGBCR8_EL1 = 0x8045
+ARM64_SYSREG_DBGBCR9_EL1 = 0x804D
+ARM64_SYSREG_DBGBCR10_EL1 = 0x8055
+ARM64_SYSREG_DBGBCR11_EL1 = 0x805D
+ARM64_SYSREG_DBGBCR12_EL1 = 0x8065
+ARM64_SYSREG_DBGBCR13_EL1 = 0x806D
+ARM64_SYSREG_DBGBCR14_EL1 = 0x8075
+ARM64_SYSREG_DBGBCR15_EL1 = 0x807D
+ARM64_SYSREG_DBGWVR0_EL1 = 0x8006
+ARM64_SYSREG_DBGWVR1_EL1 = 0x800E
+ARM64_SYSREG_DBGWVR2_EL1 = 0x8016
+ARM64_SYSREG_DBGWVR3_EL1 = 0x801E
+ARM64_SYSREG_DBGWVR4_EL1 = 0x8026
+ARM64_SYSREG_DBGWVR5_EL1 = 0x802E
+ARM64_SYSREG_DBGWVR6_EL1 = 0x8036
+ARM64_SYSREG_DBGWVR7_EL1 = 0x803E
+ARM64_SYSREG_DBGWVR8_EL1 = 0x8046
+ARM64_SYSREG_DBGWVR9_EL1 = 0x804E
+ARM64_SYSREG_DBGWVR10_EL1 = 0x8056
+ARM64_SYSREG_DBGWVR11_EL1 = 0x805E
+ARM64_SYSREG_DBGWVR12_EL1 = 0x8066
+ARM64_SYSREG_DBGWVR13_EL1 = 0x806E
+ARM64_SYSREG_DBGWVR14_EL1 = 0x8076
+ARM64_SYSREG_DBGWVR15_EL1 = 0x807E
+ARM64_SYSREG_DBGWCR0_EL1 = 0x8007
+ARM64_SYSREG_DBGWCR1_EL1 = 0x800F
+ARM64_SYSREG_DBGWCR2_EL1 = 0x8017
+ARM64_SYSREG_DBGWCR3_EL1 = 0x801F
+ARM64_SYSREG_DBGWCR4_EL1 = 0x8027
+ARM64_SYSREG_DBGWCR5_EL1 = 0x802F
+ARM64_SYSREG_DBGWCR6_EL1 = 0x8037
+ARM64_SYSREG_DBGWCR7_EL1 = 0x803F
+ARM64_SYSREG_DBGWCR8_EL1 = 0x8047
+ARM64_SYSREG_DBGWCR9_EL1 = 0x804F
+ARM64_SYSREG_DBGWCR10_EL1 = 0x8057
+ARM64_SYSREG_DBGWCR11_EL1 = 0x805F
+ARM64_SYSREG_DBGWCR12_EL1 = 0x8067
+ARM64_SYSREG_DBGWCR13_EL1 = 0x806F
+ARM64_SYSREG_DBGWCR14_EL1 = 0x8077
+ARM64_SYSREG_DBGWCR15_EL1 = 0x807F
+ARM64_SYSREG_TEEHBR32_EL1 = 0x9080
+ARM64_SYSREG_OSDLR_EL1 = 0x809C
+ARM64_SYSREG_DBGPRCR_EL1 = 0x80A4
+ARM64_SYSREG_DBGCLAIMSET_EL1 = 0x83C6
+ARM64_SYSREG_DBGCLAIMCLR_EL1 = 0x83CE
+ARM64_SYSREG_CSSELR_EL1 = 0xD000
+ARM64_SYSREG_VPIDR_EL2 = 0xE000
+ARM64_SYSREG_VMPIDR_EL2 = 0xE005
+ARM64_SYSREG_CPACR_EL1 = 0xC082
+ARM64_SYSREG_SCTLR_EL1 = 0xC080
+ARM64_SYSREG_SCTLR_EL2 = 0xE080
+ARM64_SYSREG_SCTLR_EL3 = 0xF080
+ARM64_SYSREG_ACTLR_EL1 = 0xC081
+ARM64_SYSREG_ACTLR_EL2 = 0xE081
+ARM64_SYSREG_ACTLR_EL3 = 0xF081
+ARM64_SYSREG_HCR_EL2 = 0xE088
+ARM64_SYSREG_SCR_EL3 = 0xF088
+ARM64_SYSREG_MDCR_EL2 = 0xE089
+ARM64_SYSREG_SDER32_EL3 = 0xF089
+ARM64_SYSREG_CPTR_EL2 = 0xE08A
+ARM64_SYSREG_CPTR_EL3 = 0xF08A
+ARM64_SYSREG_HSTR_EL2 = 0xE08B
+ARM64_SYSREG_HACR_EL2 = 0xE08F
+ARM64_SYSREG_MDCR_EL3 = 0xF099
+ARM64_SYSREG_TTBR0_EL1 = 0xC100
+ARM64_SYSREG_TTBR0_EL2 = 0xE100
+ARM64_SYSREG_TTBR0_EL3 = 0xF100
+ARM64_SYSREG_TTBR1_EL1 = 0xC101
+ARM64_SYSREG_TCR_EL1 = 0xC102
+ARM64_SYSREG_TCR_EL2 = 0xE102
+ARM64_SYSREG_TCR_EL3 = 0xF102
+ARM64_SYSREG_VTTBR_EL2 = 0xE108
+ARM64_SYSREG_VTCR_EL2 = 0xE10A
+ARM64_SYSREG_DACR32_EL2 = 0xE180
+ARM64_SYSREG_SPSR_EL1 = 0xC200
+ARM64_SYSREG_SPSR_EL2 = 0xE200
+ARM64_SYSREG_SPSR_EL3 = 0xF200
+ARM64_SYSREG_ELR_EL1 = 0xC201
+ARM64_SYSREG_ELR_EL2 = 0xE201
+ARM64_SYSREG_ELR_EL3 = 0xF201
+ARM64_SYSREG_SP_EL0 = 0xC208
+ARM64_SYSREG_SP_EL1 = 0xE208
+ARM64_SYSREG_SP_EL2 = 0xF208
+ARM64_SYSREG_SPSEL = 0xC210
+ARM64_SYSREG_NZCV = 0xDA10
+ARM64_SYSREG_DAIF = 0xDA11
+ARM64_SYSREG_CURRENTEL = 0xC212
+ARM64_SYSREG_SPSR_IRQ = 0xE218
+ARM64_SYSREG_SPSR_ABT = 0xE219
+ARM64_SYSREG_SPSR_UND = 0xE21A
+ARM64_SYSREG_SPSR_FIQ = 0xE21B
+ARM64_SYSREG_FPCR = 0xDA20
+ARM64_SYSREG_FPSR = 0xDA21
+ARM64_SYSREG_DSPSR_EL0 = 0xDA28
+ARM64_SYSREG_DLR_EL0 = 0xDA29
+ARM64_SYSREG_IFSR32_EL2 = 0xE281
+ARM64_SYSREG_AFSR0_EL1 = 0xC288
+ARM64_SYSREG_AFSR0_EL2 = 0xE288
+ARM64_SYSREG_AFSR0_EL3 = 0xF288
+ARM64_SYSREG_AFSR1_EL1 = 0xC289
+ARM64_SYSREG_AFSR1_EL2 = 0xE289
+ARM64_SYSREG_AFSR1_EL3 = 0xF289
+ARM64_SYSREG_ESR_EL1 = 0xC290
+ARM64_SYSREG_ESR_EL2 = 0xE290
+ARM64_SYSREG_ESR_EL3 = 0xF290
+ARM64_SYSREG_FPEXC32_EL2 = 0xE298
+ARM64_SYSREG_FAR_EL1 = 0xC300
+ARM64_SYSREG_FAR_EL2 = 0xE300
+ARM64_SYSREG_FAR_EL3 = 0xF300
+ARM64_SYSREG_HPFAR_EL2 = 0xE304
+ARM64_SYSREG_PAR_EL1 = 0xC3A0
+ARM64_SYSREG_PMCR_EL0 = 0xDCE0
+ARM64_SYSREG_PMCNTENSET_EL0 = 0xDCE1
+ARM64_SYSREG_PMCNTENCLR_EL0 = 0xDCE2
+ARM64_SYSREG_PMOVSCLR_EL0 = 0xDCE3
+ARM64_SYSREG_PMSELR_EL0 = 0xDCE5
+ARM64_SYSREG_PMCCNTR_EL0 = 0xDCE8
+ARM64_SYSREG_PMXEVTYPER_EL0 = 0xDCE9
+ARM64_SYSREG_PMXEVCNTR_EL0 = 0xDCEA
+ARM64_SYSREG_PMUSERENR_EL0 = 0xDCF0
+ARM64_SYSREG_PMINTENSET_EL1 = 0xC4F1
+ARM64_SYSREG_PMINTENCLR_EL1 = 0xC4F2
+ARM64_SYSREG_PMOVSSET_EL0 = 0xDCF3
+ARM64_SYSREG_MAIR_EL1 = 0xC510
+ARM64_SYSREG_MAIR_EL2 = 0xE510
+ARM64_SYSREG_MAIR_EL3 = 0xF510
+ARM64_SYSREG_AMAIR_EL1 = 0xC518
+ARM64_SYSREG_AMAIR_EL2 = 0xE518
+ARM64_SYSREG_AMAIR_EL3 = 0xF518
+ARM64_SYSREG_VBAR_EL1 = 0xC600
+ARM64_SYSREG_VBAR_EL2 = 0xE600
+ARM64_SYSREG_VBAR_EL3 = 0xF600
+ARM64_SYSREG_RMR_EL1 = 0xC602
+ARM64_SYSREG_RMR_EL2 = 0xE602
+ARM64_SYSREG_RMR_EL3 = 0xF602
+ARM64_SYSREG_CONTEXTIDR_EL1 = 0xC681
+ARM64_SYSREG_TPIDR_EL0 = 0xDE82
+ARM64_SYSREG_TPIDR_EL2 = 0xE682
+ARM64_SYSREG_TPIDR_EL3 = 0xF682
+ARM64_SYSREG_TPIDRRO_EL0 = 0xDE83
+ARM64_SYSREG_TPIDR_EL1 = 0xC684
+ARM64_SYSREG_CNTFRQ_EL0 = 0xDF00
+ARM64_SYSREG_CNTVOFF_EL2 = 0xE703
+ARM64_SYSREG_CNTKCTL_EL1 = 0xC708
+ARM64_SYSREG_CNTHCTL_EL2 = 0xE708
+ARM64_SYSREG_CNTP_TVAL_EL0 = 0xDF10
+ARM64_SYSREG_CNTHP_TVAL_EL2 = 0xE710
+ARM64_SYSREG_CNTPS_TVAL_EL1 = 0xFF10
+ARM64_SYSREG_CNTP_CTL_EL0 = 0xDF11
+ARM64_SYSREG_CNTHP_CTL_EL2 = 0xE711
+ARM64_SYSREG_CNTPS_CTL_EL1 = 0xFF11
+ARM64_SYSREG_CNTP_CVAL_EL0 = 0xDF12
+ARM64_SYSREG_CNTHP_CVAL_EL2 = 0xE712
+ARM64_SYSREG_CNTPS_CVAL_EL1 = 0xFF12
+ARM64_SYSREG_CNTV_TVAL_EL0 = 0xDF18
+ARM64_SYSREG_CNTV_CTL_EL0 = 0xDF19
+ARM64_SYSREG_CNTV_CVAL_EL0 = 0xDF1A
+ARM64_SYSREG_PMEVCNTR0_EL0 = 0xDF40
+ARM64_SYSREG_PMEVCNTR1_EL0 = 0xDF41
+ARM64_SYSREG_PMEVCNTR2_EL0 = 0xDF42
+ARM64_SYSREG_PMEVCNTR3_EL0 = 0xDF43
+ARM64_SYSREG_PMEVCNTR4_EL0 = 0xDF44
+ARM64_SYSREG_PMEVCNTR5_EL0 = 0xDF45
+ARM64_SYSREG_PMEVCNTR6_EL0 = 0xDF46
+ARM64_SYSREG_PMEVCNTR7_EL0 = 0xDF47
+ARM64_SYSREG_PMEVCNTR8_EL0 = 0xDF48
+ARM64_SYSREG_PMEVCNTR9_EL0 = 0xDF49
+ARM64_SYSREG_PMEVCNTR10_EL0 = 0xDF4A
+ARM64_SYSREG_PMEVCNTR11_EL0 = 0xDF4B
+ARM64_SYSREG_PMEVCNTR12_EL0 = 0xDF4C
+ARM64_SYSREG_PMEVCNTR13_EL0 = 0xDF4D
+ARM64_SYSREG_PMEVCNTR14_EL0 = 0xDF4E
+ARM64_SYSREG_PMEVCNTR15_EL0 = 0xDF4F
+ARM64_SYSREG_PMEVCNTR16_EL0 = 0xDF50
+ARM64_SYSREG_PMEVCNTR17_EL0 = 0xDF51
+ARM64_SYSREG_PMEVCNTR18_EL0 = 0xDF52
+ARM64_SYSREG_PMEVCNTR19_EL0 = 0xDF53
+ARM64_SYSREG_PMEVCNTR20_EL0 = 0xDF54
+ARM64_SYSREG_PMEVCNTR21_EL0 = 0xDF55
+ARM64_SYSREG_PMEVCNTR22_EL0 = 0xDF56
+ARM64_SYSREG_PMEVCNTR23_EL0 = 0xDF57
+ARM64_SYSREG_PMEVCNTR24_EL0 = 0xDF58
+ARM64_SYSREG_PMEVCNTR25_EL0 = 0xDF59
+ARM64_SYSREG_PMEVCNTR26_EL0 = 0xDF5A
+ARM64_SYSREG_PMEVCNTR27_EL0 = 0xDF5B
+ARM64_SYSREG_PMEVCNTR28_EL0 = 0xDF5C
+ARM64_SYSREG_PMEVCNTR29_EL0 = 0xDF5D
+ARM64_SYSREG_PMEVCNTR30_EL0 = 0xDF5E
+ARM64_SYSREG_PMCCFILTR_EL0 = 0xDF7F
+ARM64_SYSREG_PMEVTYPER0_EL0 = 0xDF60
+ARM64_SYSREG_PMEVTYPER1_EL0 = 0xDF61
+ARM64_SYSREG_PMEVTYPER2_EL0 = 0xDF62
+ARM64_SYSREG_PMEVTYPER3_EL0 = 0xDF63
+ARM64_SYSREG_PMEVTYPER4_EL0 = 0xDF64
+ARM64_SYSREG_PMEVTYPER5_EL0 = 0xDF65
+ARM64_SYSREG_PMEVTYPER6_EL0 = 0xDF66
+ARM64_SYSREG_PMEVTYPER7_EL0 = 0xDF67
+ARM64_SYSREG_PMEVTYPER8_EL0 = 0xDF68
+ARM64_SYSREG_PMEVTYPER9_EL0 = 0xDF69
+ARM64_SYSREG_PMEVTYPER10_EL0 = 0xDF6A
+ARM64_SYSREG_PMEVTYPER11_EL0 = 0xDF6B
+ARM64_SYSREG_PMEVTYPER12_EL0 = 0xDF6C
+ARM64_SYSREG_PMEVTYPER13_EL0 = 0xDF6D
+ARM64_SYSREG_PMEVTYPER14_EL0 = 0xDF6E
+ARM64_SYSREG_PMEVTYPER15_EL0 = 0xDF6F
+ARM64_SYSREG_PMEVTYPER16_EL0 = 0xDF70
+ARM64_SYSREG_PMEVTYPER17_EL0 = 0xDF71
+ARM64_SYSREG_PMEVTYPER18_EL0 = 0xDF72
+ARM64_SYSREG_PMEVTYPER19_EL0 = 0xDF73
+ARM64_SYSREG_PMEVTYPER20_EL0 = 0xDF74
+ARM64_SYSREG_PMEVTYPER21_EL0 = 0xDF75
+ARM64_SYSREG_PMEVTYPER22_EL0 = 0xDF76
+ARM64_SYSREG_PMEVTYPER23_EL0 = 0xDF77
+ARM64_SYSREG_PMEVTYPER24_EL0 = 0xDF78
+ARM64_SYSREG_PMEVTYPER25_EL0 = 0xDF79
+ARM64_SYSREG_PMEVTYPER26_EL0 = 0xDF7A
+ARM64_SYSREG_PMEVTYPER27_EL0 = 0xDF7B
+ARM64_SYSREG_PMEVTYPER28_EL0 = 0xDF7C
+ARM64_SYSREG_PMEVTYPER29_EL0 = 0xDF7D
+ARM64_SYSREG_PMEVTYPER30_EL0 = 0xDF7E
+ARM64_SYSREG_TRCPRGCTLR = 0x8808
+ARM64_SYSREG_TRCPROCSELR = 0x8810
+ARM64_SYSREG_TRCCONFIGR = 0x8820
+ARM64_SYSREG_TRCAUXCTLR = 0x8830
+ARM64_SYSREG_TRCEVENTCTL0R = 0x8840
+ARM64_SYSREG_TRCEVENTCTL1R = 0x8848
+ARM64_SYSREG_TRCSTALLCTLR = 0x8858
+ARM64_SYSREG_TRCTSCTLR = 0x8860
+ARM64_SYSREG_TRCSYNCPR = 0x8868
+ARM64_SYSREG_TRCCCCTLR = 0x8870
+ARM64_SYSREG_TRCBBCTLR = 0x8878
+ARM64_SYSREG_TRCTRACEIDR = 0x8801
+ARM64_SYSREG_TRCQCTLR = 0x8809
+ARM64_SYSREG_TRCVICTLR = 0x8802
+ARM64_SYSREG_TRCVIIECTLR = 0x880A
+ARM64_SYSREG_TRCVISSCTLR = 0x8812
+ARM64_SYSREG_TRCVIPCSSCTLR = 0x881A
+ARM64_SYSREG_TRCVDCTLR = 0x8842
+ARM64_SYSREG_TRCVDSACCTLR = 0x884A
+ARM64_SYSREG_TRCVDARCCTLR = 0x8852
+ARM64_SYSREG_TRCSEQEVR0 = 0x8804
+ARM64_SYSREG_TRCSEQEVR1 = 0x880C
+ARM64_SYSREG_TRCSEQEVR2 = 0x8814
+ARM64_SYSREG_TRCSEQRSTEVR = 0x8834
+ARM64_SYSREG_TRCSEQSTR = 0x883C
+ARM64_SYSREG_TRCEXTINSELR = 0x8844
+ARM64_SYSREG_TRCCNTRLDVR0 = 0x8805
+ARM64_SYSREG_TRCCNTRLDVR1 = 0x880D
+ARM64_SYSREG_TRCCNTRLDVR2 = 0x8815
+ARM64_SYSREG_TRCCNTRLDVR3 = 0x881D
+ARM64_SYSREG_TRCCNTCTLR0 = 0x8825
+ARM64_SYSREG_TRCCNTCTLR1 = 0x882D
+ARM64_SYSREG_TRCCNTCTLR2 = 0x8835
+ARM64_SYSREG_TRCCNTCTLR3 = 0x883D
+ARM64_SYSREG_TRCCNTVR0 = 0x8845
+ARM64_SYSREG_TRCCNTVR1 = 0x884D
+ARM64_SYSREG_TRCCNTVR2 = 0x8855
+ARM64_SYSREG_TRCCNTVR3 = 0x885D
+ARM64_SYSREG_TRCIMSPEC0 = 0x8807
+ARM64_SYSREG_TRCIMSPEC1 = 0x880F
+ARM64_SYSREG_TRCIMSPEC2 = 0x8817
+ARM64_SYSREG_TRCIMSPEC3 = 0x881F
+ARM64_SYSREG_TRCIMSPEC4 = 0x8827
+ARM64_SYSREG_TRCIMSPEC5 = 0x882F
+ARM64_SYSREG_TRCIMSPEC6 = 0x8837
+ARM64_SYSREG_TRCIMSPEC7 = 0x883F
+ARM64_SYSREG_TRCRSCTLR2 = 0x8890
+ARM64_SYSREG_TRCRSCTLR3 = 0x8898
+ARM64_SYSREG_TRCRSCTLR4 = 0x88A0
+ARM64_SYSREG_TRCRSCTLR5 = 0x88A8
+ARM64_SYSREG_TRCRSCTLR6 = 0x88B0
+ARM64_SYSREG_TRCRSCTLR7 = 0x88B8
+ARM64_SYSREG_TRCRSCTLR8 = 0x88C0
+ARM64_SYSREG_TRCRSCTLR9 = 0x88C8
+ARM64_SYSREG_TRCRSCTLR10 = 0x88D0
+ARM64_SYSREG_TRCRSCTLR11 = 0x88D8
+ARM64_SYSREG_TRCRSCTLR12 = 0x88E0
+ARM64_SYSREG_TRCRSCTLR13 = 0x88E8
+ARM64_SYSREG_TRCRSCTLR14 = 0x88F0
+ARM64_SYSREG_TRCRSCTLR15 = 0x88F8
+ARM64_SYSREG_TRCRSCTLR16 = 0x8881
+ARM64_SYSREG_TRCRSCTLR17 = 0x8889
+ARM64_SYSREG_TRCRSCTLR18 = 0x8891
+ARM64_SYSREG_TRCRSCTLR19 = 0x8899
+ARM64_SYSREG_TRCRSCTLR20 = 0x88A1
+ARM64_SYSREG_TRCRSCTLR21 = 0x88A9
+ARM64_SYSREG_TRCRSCTLR22 = 0x88B1
+ARM64_SYSREG_TRCRSCTLR23 = 0x88B9
+ARM64_SYSREG_TRCRSCTLR24 = 0x88C1
+ARM64_SYSREG_TRCRSCTLR25 = 0x88C9
+ARM64_SYSREG_TRCRSCTLR26 = 0x88D1
+ARM64_SYSREG_TRCRSCTLR27 = 0x88D9
+ARM64_SYSREG_TRCRSCTLR28 = 0x88E1
+ARM64_SYSREG_TRCRSCTLR29 = 0x88E9
+ARM64_SYSREG_TRCRSCTLR30 = 0x88F1
+ARM64_SYSREG_TRCRSCTLR31 = 0x88F9
+ARM64_SYSREG_TRCSSCCR0 = 0x8882
+ARM64_SYSREG_TRCSSCCR1 = 0x888A
+ARM64_SYSREG_TRCSSCCR2 = 0x8892
+ARM64_SYSREG_TRCSSCCR3 = 0x889A
+ARM64_SYSREG_TRCSSCCR4 = 0x88A2
+ARM64_SYSREG_TRCSSCCR5 = 0x88AA
+ARM64_SYSREG_TRCSSCCR6 = 0x88B2
+ARM64_SYSREG_TRCSSCCR7 = 0x88BA
+ARM64_SYSREG_TRCSSCSR0 = 0x88C2
+ARM64_SYSREG_TRCSSCSR1 = 0x88CA
+ARM64_SYSREG_TRCSSCSR2 = 0x88D2
+ARM64_SYSREG_TRCSSCSR3 = 0x88DA
+ARM64_SYSREG_TRCSSCSR4 = 0x88E2
+ARM64_SYSREG_TRCSSCSR5 = 0x88EA
+ARM64_SYSREG_TRCSSCSR6 = 0x88F2
+ARM64_SYSREG_TRCSSCSR7 = 0x88FA
+ARM64_SYSREG_TRCSSPCICR0 = 0x8883
+ARM64_SYSREG_TRCSSPCICR1 = 0x888B
+ARM64_SYSREG_TRCSSPCICR2 = 0x8893
+ARM64_SYSREG_TRCSSPCICR3 = 0x889B
+ARM64_SYSREG_TRCSSPCICR4 = 0x88A3
+ARM64_SYSREG_TRCSSPCICR5 = 0x88AB
+ARM64_SYSREG_TRCSSPCICR6 = 0x88B3
+ARM64_SYSREG_TRCSSPCICR7 = 0x88BB
+ARM64_SYSREG_TRCPDCR = 0x88A4
+ARM64_SYSREG_TRCACVR0 = 0x8900
+ARM64_SYSREG_TRCACVR1 = 0x8910
+ARM64_SYSREG_TRCACVR2 = 0x8920
+ARM64_SYSREG_TRCACVR3 = 0x8930
+ARM64_SYSREG_TRCACVR4 = 0x8940
+ARM64_SYSREG_TRCACVR5 = 0x8950
+ARM64_SYSREG_TRCACVR6 = 0x8960
+ARM64_SYSREG_TRCACVR7 = 0x8970
+ARM64_SYSREG_TRCACVR8 = 0x8901
+ARM64_SYSREG_TRCACVR9 = 0x8911
+ARM64_SYSREG_TRCACVR10 = 0x8921
+ARM64_SYSREG_TRCACVR11 = 0x8931
+ARM64_SYSREG_TRCACVR12 = 0x8941
+ARM64_SYSREG_TRCACVR13 = 0x8951
+ARM64_SYSREG_TRCACVR14 = 0x8961
+ARM64_SYSREG_TRCACVR15 = 0x8971
+ARM64_SYSREG_TRCACATR0 = 0x8902
+ARM64_SYSREG_TRCACATR1 = 0x8912
+ARM64_SYSREG_TRCACATR2 = 0x8922
+ARM64_SYSREG_TRCACATR3 = 0x8932
+ARM64_SYSREG_TRCACATR4 = 0x8942
+ARM64_SYSREG_TRCACATR5 = 0x8952
+ARM64_SYSREG_TRCACATR6 = 0x8962
+ARM64_SYSREG_TRCACATR7 = 0x8972
+ARM64_SYSREG_TRCACATR8 = 0x8903
+ARM64_SYSREG_TRCACATR9 = 0x8913
+ARM64_SYSREG_TRCACATR10 = 0x8923
+ARM64_SYSREG_TRCACATR11 = 0x8933
+ARM64_SYSREG_TRCACATR12 = 0x8943
+ARM64_SYSREG_TRCACATR13 = 0x8953
+ARM64_SYSREG_TRCACATR14 = 0x8963
+ARM64_SYSREG_TRCACATR15 = 0x8973
+ARM64_SYSREG_TRCDVCVR0 = 0x8904
+ARM64_SYSREG_TRCDVCVR1 = 0x8924
+ARM64_SYSREG_TRCDVCVR2 = 0x8944
+ARM64_SYSREG_TRCDVCVR3 = 0x8964
+ARM64_SYSREG_TRCDVCVR4 = 0x8905
+ARM64_SYSREG_TRCDVCVR5 = 0x8925
+ARM64_SYSREG_TRCDVCVR6 = 0x8945
+ARM64_SYSREG_TRCDVCVR7 = 0x8965
+ARM64_SYSREG_TRCDVCMR0 = 0x8906
+ARM64_SYSREG_TRCDVCMR1 = 0x8926
+ARM64_SYSREG_TRCDVCMR2 = 0x8946
+ARM64_SYSREG_TRCDVCMR3 = 0x8966
+ARM64_SYSREG_TRCDVCMR4 = 0x8907
+ARM64_SYSREG_TRCDVCMR5 = 0x8927
+ARM64_SYSREG_TRCDVCMR6 = 0x8947
+ARM64_SYSREG_TRCDVCMR7 = 0x8967
+ARM64_SYSREG_TRCCIDCVR0 = 0x8980
+ARM64_SYSREG_TRCCIDCVR1 = 0x8990
+ARM64_SYSREG_TRCCIDCVR2 = 0x89A0
+ARM64_SYSREG_TRCCIDCVR3 = 0x89B0
+ARM64_SYSREG_TRCCIDCVR4 = 0x89C0
+ARM64_SYSREG_TRCCIDCVR5 = 0x89D0
+ARM64_SYSREG_TRCCIDCVR6 = 0x89E0
+ARM64_SYSREG_TRCCIDCVR7 = 0x89F0
+ARM64_SYSREG_TRCVMIDCVR0 = 0x8981
+ARM64_SYSREG_TRCVMIDCVR1 = 0x8991
+ARM64_SYSREG_TRCVMIDCVR2 = 0x89A1
+ARM64_SYSREG_TRCVMIDCVR3 = 0x89B1
+ARM64_SYSREG_TRCVMIDCVR4 = 0x89C1
+ARM64_SYSREG_TRCVMIDCVR5 = 0x89D1
+ARM64_SYSREG_TRCVMIDCVR6 = 0x89E1
+ARM64_SYSREG_TRCVMIDCVR7 = 0x89F1
+ARM64_SYSREG_TRCCIDCCTLR0 = 0x8982
+ARM64_SYSREG_TRCCIDCCTLR1 = 0x898A
+ARM64_SYSREG_TRCVMIDCCTLR0 = 0x8992
+ARM64_SYSREG_TRCVMIDCCTLR1 = 0x899A
+ARM64_SYSREG_TRCITCTRL = 0x8B84
+ARM64_SYSREG_TRCCLAIMSET = 0x8BC6
+ARM64_SYSREG_TRCCLAIMCLR = 0x8BCE
+ARM64_SYSREG_ICC_BPR1_EL1 = 0xC663
+ARM64_SYSREG_ICC_BPR0_EL1 = 0xC643
+ARM64_SYSREG_ICC_PMR_EL1 = 0xC230
+ARM64_SYSREG_ICC_CTLR_EL1 = 0xC664
+ARM64_SYSREG_ICC_CTLR_EL3 = 0xF664
+ARM64_SYSREG_ICC_SRE_EL1 = 0xC665
+ARM64_SYSREG_ICC_SRE_EL2 = 0xE64D
+ARM64_SYSREG_ICC_SRE_EL3 = 0xF665
+ARM64_SYSREG_ICC_IGRPEN0_EL1 = 0xC666
+ARM64_SYSREG_ICC_IGRPEN1_EL1 = 0xC667
+ARM64_SYSREG_ICC_IGRPEN1_EL3 = 0xF667
+ARM64_SYSREG_ICC_SEIEN_EL1 = 0xC668
+ARM64_SYSREG_ICC_AP0R0_EL1 = 0xC644
+ARM64_SYSREG_ICC_AP0R1_EL1 = 0xC645
+ARM64_SYSREG_ICC_AP0R2_EL1 = 0xC646
+ARM64_SYSREG_ICC_AP0R3_EL1 = 0xC647
+ARM64_SYSREG_ICC_AP1R0_EL1 = 0xC648
+ARM64_SYSREG_ICC_AP1R1_EL1 = 0xC649
+ARM64_SYSREG_ICC_AP1R2_EL1 = 0xC64A
+ARM64_SYSREG_ICC_AP1R3_EL1 = 0xC64B
+ARM64_SYSREG_ICH_AP0R0_EL2 = 0xE640
+ARM64_SYSREG_ICH_AP0R1_EL2 = 0xE641
+ARM64_SYSREG_ICH_AP0R2_EL2 = 0xE642
+ARM64_SYSREG_ICH_AP0R3_EL2 = 0xE643
+ARM64_SYSREG_ICH_AP1R0_EL2 = 0xE648
+ARM64_SYSREG_ICH_AP1R1_EL2 = 0xE649
+ARM64_SYSREG_ICH_AP1R2_EL2 = 0xE64A
+ARM64_SYSREG_ICH_AP1R3_EL2 = 0xE64B
+ARM64_SYSREG_ICH_HCR_EL2 = 0xE658
+ARM64_SYSREG_ICH_MISR_EL2 = 0xE65A
+ARM64_SYSREG_ICH_VMCR_EL2 = 0xE65F
+ARM64_SYSREG_ICH_VSEIR_EL2 = 0xE64C
+ARM64_SYSREG_ICH_LR0_EL2 = 0xE660
+ARM64_SYSREG_ICH_LR1_EL2 = 0xE661
+ARM64_SYSREG_ICH_LR2_EL2 = 0xE662
+ARM64_SYSREG_ICH_LR3_EL2 = 0xE663
+ARM64_SYSREG_ICH_LR4_EL2 = 0xE664
+ARM64_SYSREG_ICH_LR5_EL2 = 0xE665
+ARM64_SYSREG_ICH_LR6_EL2 = 0xE666
+ARM64_SYSREG_ICH_LR7_EL2 = 0xE667
+ARM64_SYSREG_ICH_LR8_EL2 = 0xE668
+ARM64_SYSREG_ICH_LR9_EL2 = 0xE669
+ARM64_SYSREG_ICH_LR10_EL2 = 0xE66A
+ARM64_SYSREG_ICH_LR11_EL2 = 0xE66B
+ARM64_SYSREG_ICH_LR12_EL2 = 0xE66C
+ARM64_SYSREG_ICH_LR13_EL2 = 0xE66D
+ARM64_SYSREG_ICH_LR14_EL2 = 0xE66E
+ARM64_SYSREG_ICH_LR15_EL2 = 0xE66F
+ARM64_SYSREG_PAN = 0xC213
+ARM64_SYSREG_LORSA_EL1 = 0xC520
+ARM64_SYSREG_LOREA_EL1 = 0xC521
+ARM64_SYSREG_LORN_EL1 = 0xC522
+ARM64_SYSREG_LORC_EL1 = 0xC523
+ARM64_SYSREG_TTBR1_EL2 = 0xE101
+ARM64_SYSREG_CONTEXTIDR_EL2 = 0xE681
+ARM64_SYSREG_CNTHV_TVAL_EL2 = 0xE718
+ARM64_SYSREG_CNTHV_CVAL_EL2 = 0xE71A
+ARM64_SYSREG_CNTHV_CTL_EL2 = 0xE719
+ARM64_SYSREG_SCTLR_EL12 = 0xE880
+ARM64_SYSREG_CPACR_EL12 = 0xE882
+ARM64_SYSREG_TTBR0_EL12 = 0xE900
+ARM64_SYSREG_TTBR1_EL12 = 0xE901
+ARM64_SYSREG_TCR_EL12 = 0xE902
+ARM64_SYSREG_AFSR0_EL12 = 0xEA88
+ARM64_SYSREG_AFSR1_EL12 = 0xEA89
+ARM64_SYSREG_ESR_EL12 = 0xEA90
+ARM64_SYSREG_FAR_EL12 = 0xEB00
+ARM64_SYSREG_MAIR_EL12 = 0xED10
+ARM64_SYSREG_AMAIR_EL12 = 0xED18
+ARM64_SYSREG_VBAR_EL12 = 0xEE00
+ARM64_SYSREG_CONTEXTIDR_EL12 = 0xEE81
+ARM64_SYSREG_CNTKCTL_EL12 = 0xEF08
+ARM64_SYSREG_CNTP_TVAL_EL02 = 0xEF10
+ARM64_SYSREG_CNTP_CTL_EL02 = 0xEF11
+ARM64_SYSREG_CNTP_CVAL_EL02 = 0xEF12
+ARM64_SYSREG_CNTV_TVAL_EL02 = 0xEF18
+ARM64_SYSREG_CNTV_CTL_EL02 = 0xEF19
+ARM64_SYSREG_CNTV_CVAL_EL02 = 0xEF1A
+ARM64_SYSREG_SPSR_EL12 = 0xEA00
+ARM64_SYSREG_ELR_EL12 = 0xEA01
+ARM64_SYSREG_UAO = 0xC214
+ARM64_SYSREG_PMBLIMITR_EL1 = 0xC4D0
+ARM64_SYSREG_PMBPTR_EL1 = 0xC4D1
+ARM64_SYSREG_PMBSR_EL1 = 0xC4D3
+ARM64_SYSREG_PMBIDR_EL1 = 0xC4D7
+ARM64_SYSREG_PMSCR_EL2 = 0xE4C8
+ARM64_SYSREG_PMSCR_EL12 = 0xECC8
+ARM64_SYSREG_PMSCR_EL1 = 0xC4C8
+ARM64_SYSREG_PMSICR_EL1 = 0xC4CA
+ARM64_SYSREG_PMSIRR_EL1 = 0xC4CB
+ARM64_SYSREG_PMSFCR_EL1 = 0xC4CC
+ARM64_SYSREG_PMSEVFR_EL1 = 0xC4CD
+ARM64_SYSREG_PMSLATFR_EL1 = 0xC4CE
+ARM64_SYSREG_PMSIDR_EL1 = 0xC4CF
+ARM64_SYSREG_ERRSELR_EL1 = 0xC299
+ARM64_SYSREG_ERXCTLR_EL1 = 0xC2A1
+ARM64_SYSREG_ERXSTATUS_EL1 = 0xC2A2
+ARM64_SYSREG_ERXADDR_EL1 = 0xC2A3
+ARM64_SYSREG_ERXMISC0_EL1 = 0xC2A8
+ARM64_SYSREG_ERXMISC1_EL1 = 0xC2A9
+ARM64_SYSREG_DISR_EL1 = 0xC609
+ARM64_SYSREG_VDISR_EL2 = 0xE609
+ARM64_SYSREG_VSESR_EL2 = 0xE293
+ARM64_SYSREG_APIAKEYLO_EL1 = 0xC108
+ARM64_SYSREG_APIAKEYHI_EL1 = 0xC109
+ARM64_SYSREG_APIBKEYLO_EL1 = 0xC10A
+ARM64_SYSREG_APIBKEYHI_EL1 = 0xC10B
+ARM64_SYSREG_APDAKEYLO_EL1 = 0xC110
+ARM64_SYSREG_APDAKEYHI_EL1 = 0xC111
+ARM64_SYSREG_APDBKEYLO_EL1 = 0xC112
+ARM64_SYSREG_APDBKEYHI_EL1 = 0xC113
+ARM64_SYSREG_APGAKEYLO_EL1 = 0xC118
+ARM64_SYSREG_APGAKEYHI_EL1 = 0xC119
+ARM64_SYSREG_VSTCR_EL2 = 0xE132
+ARM64_SYSREG_VSTTBR_EL2 = 0xE130
+ARM64_SYSREG_CNTHVS_TVAL_EL2 = 0xE720
+ARM64_SYSREG_CNTHVS_CVAL_EL2 = 0xE722
+ARM64_SYSREG_CNTHVS_CTL_EL2 = 0xE721
+ARM64_SYSREG_CNTHPS_TVAL_EL2 = 0xE728
+ARM64_SYSREG_CNTHPS_CVAL_EL2 = 0xE72A
+ARM64_SYSREG_CNTHPS_CTL_EL2 = 0xE729
+ARM64_SYSREG_SDER32_EL2 = 0xE099
+ARM64_SYSREG_ERXPFGCTL_EL1 = 0xC2A5
+ARM64_SYSREG_ERXPFGCDN_EL1 = 0xC2A6
+ARM64_SYSREG_ERXTS_EL1 = 0xC2AF
+ARM64_SYSREG_ERXMISC2_EL1 = 0xC2AA
+ARM64_SYSREG_ERXMISC3_EL1 = 0xC2AB
+ARM64_SYSREG_ERXPFGF_EL1 = 0xC2A4
+ARM64_SYSREG_MPAM0_EL1 = 0xC529
+ARM64_SYSREG_MPAM1_EL1 = 0xC528
+ARM64_SYSREG_MPAM2_EL2 = 0xE528
+ARM64_SYSREG_MPAM3_EL3 = 0xF528
+ARM64_SYSREG_MPAM1_EL12 = 0xED28
+ARM64_SYSREG_MPAMHCR_EL2 = 0xE520
+ARM64_SYSREG_MPAMVPMV_EL2 = 0xE521
+ARM64_SYSREG_MPAMVPM0_EL2 = 0xE530
+ARM64_SYSREG_MPAMVPM1_EL2 = 0xE531
+ARM64_SYSREG_MPAMVPM2_EL2 = 0xE532
+ARM64_SYSREG_MPAMVPM3_EL2 = 0xE533
+ARM64_SYSREG_MPAMVPM4_EL2 = 0xE534
+ARM64_SYSREG_MPAMVPM5_EL2 = 0xE535
+ARM64_SYSREG_MPAMVPM6_EL2 = 0xE536
+ARM64_SYSREG_MPAMVPM7_EL2 = 0xE537
+ARM64_SYSREG_MPAMIDR_EL1 = 0xC524
+ARM64_SYSREG_AMCR_EL0 = 0xDE90
+ARM64_SYSREG_AMCFGR_EL0 = 0xDE91
+ARM64_SYSREG_AMCGCR_EL0 = 0xDE92
+ARM64_SYSREG_AMUSERENR_EL0 = 0xDE93
+ARM64_SYSREG_AMCNTENCLR0_EL0 = 0xDE94
+ARM64_SYSREG_AMCNTENSET0_EL0 = 0xDE95
+ARM64_SYSREG_AMEVCNTR00_EL0 = 0xDEA0
+ARM64_SYSREG_AMEVCNTR01_EL0 = 0xDEA1
+ARM64_SYSREG_AMEVCNTR02_EL0 = 0xDEA2
+ARM64_SYSREG_AMEVCNTR03_EL0 = 0xDEA3
+ARM64_SYSREG_AMEVTYPER00_EL0 = 0xDEB0
+ARM64_SYSREG_AMEVTYPER01_EL0 = 0xDEB1
+ARM64_SYSREG_AMEVTYPER02_EL0 = 0xDEB2
+ARM64_SYSREG_AMEVTYPER03_EL0 = 0xDEB3
+ARM64_SYSREG_AMCNTENCLR1_EL0 = 0xDE98
+ARM64_SYSREG_AMCNTENSET1_EL0 = 0xDE99
+ARM64_SYSREG_AMEVCNTR10_EL0 = 0xDEE0
+ARM64_SYSREG_AMEVCNTR11_EL0 = 0xDEE1
+ARM64_SYSREG_AMEVCNTR12_EL0 = 0xDEE2
+ARM64_SYSREG_AMEVCNTR13_EL0 = 0xDEE3
+ARM64_SYSREG_AMEVCNTR14_EL0 = 0xDEE4
+ARM64_SYSREG_AMEVCNTR15_EL0 = 0xDEE5
+ARM64_SYSREG_AMEVCNTR16_EL0 = 0xDEE6
+ARM64_SYSREG_AMEVCNTR17_EL0 = 0xDEE7
+ARM64_SYSREG_AMEVCNTR18_EL0 = 0xDEE8
+ARM64_SYSREG_AMEVCNTR19_EL0 = 0xDEE9
+ARM64_SYSREG_AMEVCNTR110_EL0 = 0xDEEA
+ARM64_SYSREG_AMEVCNTR111_EL0 = 0xDEEB
+ARM64_SYSREG_AMEVCNTR112_EL0 = 0xDEEC
+ARM64_SYSREG_AMEVCNTR113_EL0 = 0xDEED
+ARM64_SYSREG_AMEVCNTR114_EL0 = 0xDEEE
+ARM64_SYSREG_AMEVCNTR115_EL0 = 0xDEEF
+ARM64_SYSREG_AMEVTYPER10_EL0 = 0xDEF0
+ARM64_SYSREG_AMEVTYPER11_EL0 = 0xDEF1
+ARM64_SYSREG_AMEVTYPER12_EL0 = 0xDEF2
+ARM64_SYSREG_AMEVTYPER13_EL0 = 0xDEF3
+ARM64_SYSREG_AMEVTYPER14_EL0 = 0xDEF4
+ARM64_SYSREG_AMEVTYPER15_EL0 = 0xDEF5
+ARM64_SYSREG_AMEVTYPER16_EL0 = 0xDEF6
+ARM64_SYSREG_AMEVTYPER17_EL0 = 0xDEF7
+ARM64_SYSREG_AMEVTYPER18_EL0 = 0xDEF8
+ARM64_SYSREG_AMEVTYPER19_EL0 = 0xDEF9
+ARM64_SYSREG_AMEVTYPER110_EL0 = 0xDEFA
+ARM64_SYSREG_AMEVTYPER111_EL0 = 0xDEFB
+ARM64_SYSREG_AMEVTYPER112_EL0 = 0xDEFC
+ARM64_SYSREG_AMEVTYPER113_EL0 = 0xDEFD
+ARM64_SYSREG_AMEVTYPER114_EL0 = 0xDEFE
+ARM64_SYSREG_AMEVTYPER115_EL0 = 0xDEFF
+ARM64_SYSREG_TRFCR_EL1 = 0xC091
+ARM64_SYSREG_TRFCR_EL2 = 0xE091
+ARM64_SYSREG_TRFCR_EL12 = 0xE891
+ARM64_SYSREG_DIT = 0xDA15
+ARM64_SYSREG_VNCR_EL2 = 0xE110
+ARM64_SYSREG_ZCR_EL1 = 0xC090
+ARM64_SYSREG_ZCR_EL2 = 0xE090
+ARM64_SYSREG_ZCR_EL3 = 0xF090
+ARM64_SYSREG_ZCR_EL12 = 0xE890
+ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90
+
+ARM64_PSTATE_INVALID = 0
+ARM64_PSTATE_SPSEL = 0x05
+ARM64_PSTATE_DAIFSET = 0x1e
+ARM64_PSTATE_DAIFCLR = 0x1f
+ARM64_PSTATE_PAN = 0x4
+ARM64_PSTATE_UAO = 0x3
+ARM64_PSTATE_DIT = 0x1a
+
+ARM64_VAS_INVALID = 0
+ARM64_VAS_16B = 1
+ARM64_VAS_8B = 2
+ARM64_VAS_4B = 3
+ARM64_VAS_1B = 4
+ARM64_VAS_8H = 5
+ARM64_VAS_4H = 6
+ARM64_VAS_2H = 7
+ARM64_VAS_1H = 8
+ARM64_VAS_4S = 9
+ARM64_VAS_2S = 10
+ARM64_VAS_1S = 11
+ARM64_VAS_2D = 12
+ARM64_VAS_1D = 13
+ARM64_VAS_1Q = 14
+
+ARM64_BARRIER_INVALID = 0
+ARM64_BARRIER_OSHLD = 0x1
+ARM64_BARRIER_OSHST = 0x2
+ARM64_BARRIER_OSH = 0x3
+ARM64_BARRIER_NSHLD = 0x5
+ARM64_BARRIER_NSHST = 0x6
+ARM64_BARRIER_NSH = 0x7
+ARM64_BARRIER_ISHLD = 0x9
+ARM64_BARRIER_ISHST = 0xa
+ARM64_BARRIER_ISH = 0xb
+ARM64_BARRIER_LD = 0xd
+ARM64_BARRIER_ST = 0xe
+ARM64_BARRIER_SY = 0xf
+
+ARM64_OP_INVALID = 0
+ARM64_OP_REG = 1
+ARM64_OP_IMM = 2
+ARM64_OP_MEM = 3
+ARM64_OP_FP = 4
+ARM64_OP_CIMM = 64
+ARM64_OP_REG_MRS = 65
+ARM64_OP_REG_MSR = 66
+ARM64_OP_PSTATE = 67
+ARM64_OP_SYS = 68
+ARM64_OP_PREFETCH = 69
+ARM64_OP_BARRIER = 70
+
+ARM64_TLBI_INVALID = 0
+ARM64_TLBI_IPAS2E1IS = 1
+ARM64_TLBI_IPAS2LE1IS = 2
+ARM64_TLBI_VMALLE1IS = 3
+ARM64_TLBI_ALLE2IS = 4
+ARM64_TLBI_ALLE3IS = 5
+ARM64_TLBI_VAE1IS = 6
+ARM64_TLBI_VAE2IS = 7
+ARM64_TLBI_VAE3IS = 8
+ARM64_TLBI_ASIDE1IS = 9
+ARM64_TLBI_VAAE1IS = 10
+ARM64_TLBI_ALLE1IS = 11
+ARM64_TLBI_VALE1IS = 12
+ARM64_TLBI_VALE2IS = 13
+ARM64_TLBI_VALE3IS = 14
+ARM64_TLBI_VMALLS12E1IS = 15
+ARM64_TLBI_VAALE1IS = 16
+ARM64_TLBI_IPAS2E1 = 17
+ARM64_TLBI_IPAS2LE1 = 18
+ARM64_TLBI_VMALLE1 = 19
+ARM64_TLBI_ALLE2 = 20
+ARM64_TLBI_ALLE3 = 21
+ARM64_TLBI_VAE1 = 22
+ARM64_TLBI_VAE2 = 23
+ARM64_TLBI_VAE3 = 24
+ARM64_TLBI_ASIDE1 = 25
+ARM64_TLBI_VAAE1 = 26
+ARM64_TLBI_ALLE1 = 27
+ARM64_TLBI_VALE1 = 28
+ARM64_TLBI_VALE2 = 29
+ARM64_TLBI_VALE3 = 30
+ARM64_TLBI_VMALLS12E1 = 31
+ARM64_TLBI_VAALE1 = 32
+ARM64_TLBI_VMALLE1OS = 33
+ARM64_TLBI_VAE1OS = 34
+ARM64_TLBI_ASIDE1OS = 35
+ARM64_TLBI_VAAE1OS = 36
+ARM64_TLBI_VALE1OS = 37
+ARM64_TLBI_VAALE1OS = 38
+ARM64_TLBI_IPAS2E1OS = 39
+ARM64_TLBI_IPAS2LE1OS = 40
+ARM64_TLBI_VAE2OS = 41
+ARM64_TLBI_VALE2OS = 42
+ARM64_TLBI_VMALLS12E1OS = 43
+ARM64_TLBI_VAE3OS = 44
+ARM64_TLBI_VALE3OS = 45
+ARM64_TLBI_ALLE2OS = 46
+ARM64_TLBI_ALLE1OS = 47
+ARM64_TLBI_ALLE3OS = 48
+ARM64_TLBI_RVAE1 = 49
+ARM64_TLBI_RVAAE1 = 50
+ARM64_TLBI_RVALE1 = 51
+ARM64_TLBI_RVAALE1 = 52
+ARM64_TLBI_RVAE1IS = 53
+ARM64_TLBI_RVAAE1IS = 54
+ARM64_TLBI_RVALE1IS = 55
+ARM64_TLBI_RVAALE1IS = 56
+ARM64_TLBI_RVAE1OS = 57
+ARM64_TLBI_RVAAE1OS = 58
+ARM64_TLBI_RVALE1OS = 59
+ARM64_TLBI_RVAALE1OS = 60
+ARM64_TLBI_RIPAS2E1IS = 61
+ARM64_TLBI_RIPAS2LE1IS = 62
+ARM64_TLBI_RIPAS2E1 = 63
+ARM64_TLBI_RIPAS2LE1 = 64
+ARM64_TLBI_RIPAS2E1OS = 65
+ARM64_TLBI_RIPAS2LE1OS = 66
+ARM64_TLBI_RVAE2 = 67
+ARM64_TLBI_RVALE2 = 68
+ARM64_TLBI_RVAE2IS = 69
+ARM64_TLBI_RVALE2IS = 70
+ARM64_TLBI_RVAE2OS = 71
+ARM64_TLBI_RVALE2OS = 72
+ARM64_TLBI_RVAE3 = 73
+ARM64_TLBI_RVALE3 = 74
+ARM64_TLBI_RVAE3IS = 75
+ARM64_TLBI_RVALE3IS = 76
+ARM64_TLBI_RVAE3OS = 77
+ARM64_TLBI_RVALE3OS = 78
+ARM64_AT_S1E1R = 79
+ARM64_AT_S1E2R = 80
+ARM64_AT_S1E3R = 81
+ARM64_AT_S1E1W = 82
+ARM64_AT_S1E2W = 83
+ARM64_AT_S1E3W = 84
+ARM64_AT_S1E0R = 85
+ARM64_AT_S1E0W = 86
+ARM64_AT_S12E1R = 87
+ARM64_AT_S12E1W = 88
+ARM64_AT_S12E0R = 89
+ARM64_AT_S12E0W = 90
+ARM64_AT_S1E1RP = 91
+ARM64_AT_S1E1WP = 92
+
+ARM64_DC_INVALID = 0
+ARM64_DC_ZVA = 1
+ARM64_DC_IVAC = 2
+ARM64_DC_ISW = 3
+ARM64_DC_CVAC = 4
+ARM64_DC_CSW = 5
+ARM64_DC_CVAU = 6
+ARM64_DC_CIVAC = 7
+ARM64_DC_CISW = 8
+ARM64_DC_CVAP = 9
+
+ARM64_IC_INVALID = 0
+ARM64_IC_IALLUIS = 1
+ARM64_IC_IALLU = 2
+ARM64_IC_IVAU = 3
+
+ARM64_PRFM_INVALID = 0
+ARM64_PRFM_PLDL1KEEP = 0x00+1
+ARM64_PRFM_PLDL1STRM = 0x01+1
+ARM64_PRFM_PLDL2KEEP = 0x02+1
+ARM64_PRFM_PLDL2STRM = 0x03+1
+ARM64_PRFM_PLDL3KEEP = 0x04+1
+ARM64_PRFM_PLDL3STRM = 0x05+1
+ARM64_PRFM_PLIL1KEEP = 0x08+1
+ARM64_PRFM_PLIL1STRM = 0x09+1
+ARM64_PRFM_PLIL2KEEP = 0x0a+1
+ARM64_PRFM_PLIL2STRM = 0x0b+1
+ARM64_PRFM_PLIL3KEEP = 0x0c+1
+ARM64_PRFM_PLIL3STRM = 0x0d+1
+ARM64_PRFM_PSTL1KEEP = 0x10+1
+ARM64_PRFM_PSTL1STRM = 0x11+1
+ARM64_PRFM_PSTL2KEEP = 0x12+1
+ARM64_PRFM_PSTL2STRM = 0x13+1
+ARM64_PRFM_PSTL3KEEP = 0x14+1
+ARM64_PRFM_PSTL3STRM = 0x15+1
+
+ARM64_REG_INVALID = 0
+ARM64_REG_FFR = 1
+ARM64_REG_FP = 2
+ARM64_REG_LR = 3
+ARM64_REG_NZCV = 4
+ARM64_REG_SP = 5
+ARM64_REG_WSP = 6
+ARM64_REG_WZR = 7
+ARM64_REG_XZR = 8
+ARM64_REG_B0 = 9
+ARM64_REG_B1 = 10
+ARM64_REG_B2 = 11
+ARM64_REG_B3 = 12
+ARM64_REG_B4 = 13
+ARM64_REG_B5 = 14
+ARM64_REG_B6 = 15
+ARM64_REG_B7 = 16
+ARM64_REG_B8 = 17
+ARM64_REG_B9 = 18
+ARM64_REG_B10 = 19
+ARM64_REG_B11 = 20
+ARM64_REG_B12 = 21
+ARM64_REG_B13 = 22
+ARM64_REG_B14 = 23
+ARM64_REG_B15 = 24
+ARM64_REG_B16 = 25
+ARM64_REG_B17 = 26
+ARM64_REG_B18 = 27
+ARM64_REG_B19 = 28
+ARM64_REG_B20 = 29
+ARM64_REG_B21 = 30
+ARM64_REG_B22 = 31
+ARM64_REG_B23 = 32
+ARM64_REG_B24 = 33
+ARM64_REG_B25 = 34
+ARM64_REG_B26 = 35
+ARM64_REG_B27 = 36
+ARM64_REG_B28 = 37
+ARM64_REG_B29 = 38
+ARM64_REG_B30 = 39
+ARM64_REG_B31 = 40
+ARM64_REG_D0 = 41
+ARM64_REG_D1 = 42
+ARM64_REG_D2 = 43
+ARM64_REG_D3 = 44
+ARM64_REG_D4 = 45
+ARM64_REG_D5 = 46
+ARM64_REG_D6 = 47
+ARM64_REG_D7 = 48
+ARM64_REG_D8 = 49
+ARM64_REG_D9 = 50
+ARM64_REG_D10 = 51
+ARM64_REG_D11 = 52
+ARM64_REG_D12 = 53
+ARM64_REG_D13 = 54
+ARM64_REG_D14 = 55
+ARM64_REG_D15 = 56
+ARM64_REG_D16 = 57
+ARM64_REG_D17 = 58
+ARM64_REG_D18 = 59
+ARM64_REG_D19 = 60
+ARM64_REG_D20 = 61
+ARM64_REG_D21 = 62
+ARM64_REG_D22 = 63
+ARM64_REG_D23 = 64
+ARM64_REG_D24 = 65
+ARM64_REG_D25 = 66
+ARM64_REG_D26 = 67
+ARM64_REG_D27 = 68
+ARM64_REG_D28 = 69
+ARM64_REG_D29 = 70
+ARM64_REG_D30 = 71
+ARM64_REG_D31 = 72
+ARM64_REG_H0 = 73
+ARM64_REG_H1 = 74
+ARM64_REG_H2 = 75
+ARM64_REG_H3 = 76
+ARM64_REG_H4 = 77
+ARM64_REG_H5 = 78
+ARM64_REG_H6 = 79
+ARM64_REG_H7 = 80
+ARM64_REG_H8 = 81
+ARM64_REG_H9 = 82
+ARM64_REG_H10 = 83
+ARM64_REG_H11 = 84
+ARM64_REG_H12 = 85
+ARM64_REG_H13 = 86
+ARM64_REG_H14 = 87
+ARM64_REG_H15 = 88
+ARM64_REG_H16 = 89
+ARM64_REG_H17 = 90
+ARM64_REG_H18 = 91
+ARM64_REG_H19 = 92
+ARM64_REG_H20 = 93
+ARM64_REG_H21 = 94
+ARM64_REG_H22 = 95
+ARM64_REG_H23 = 96
+ARM64_REG_H24 = 97
+ARM64_REG_H25 = 98
+ARM64_REG_H26 = 99
+ARM64_REG_H27 = 100
+ARM64_REG_H28 = 101
+ARM64_REG_H29 = 102
+ARM64_REG_H30 = 103
+ARM64_REG_H31 = 104
+ARM64_REG_P0 = 105
+ARM64_REG_P1 = 106
+ARM64_REG_P2 = 107
+ARM64_REG_P3 = 108
+ARM64_REG_P4 = 109
+ARM64_REG_P5 = 110
+ARM64_REG_P6 = 111
+ARM64_REG_P7 = 112
+ARM64_REG_P8 = 113
+ARM64_REG_P9 = 114
+ARM64_REG_P10 = 115
+ARM64_REG_P11 = 116
+ARM64_REG_P12 = 117
+ARM64_REG_P13 = 118
+ARM64_REG_P14 = 119
+ARM64_REG_P15 = 120
+ARM64_REG_Q0 = 121
+ARM64_REG_Q1 = 122
+ARM64_REG_Q2 = 123
+ARM64_REG_Q3 = 124
+ARM64_REG_Q4 = 125
+ARM64_REG_Q5 = 126
+ARM64_REG_Q6 = 127
+ARM64_REG_Q7 = 128
+ARM64_REG_Q8 = 129
+ARM64_REG_Q9 = 130
+ARM64_REG_Q10 = 131
+ARM64_REG_Q11 = 132
+ARM64_REG_Q12 = 133
+ARM64_REG_Q13 = 134
+ARM64_REG_Q14 = 135
+ARM64_REG_Q15 = 136
+ARM64_REG_Q16 = 137
+ARM64_REG_Q17 = 138
+ARM64_REG_Q18 = 139
+ARM64_REG_Q19 = 140
+ARM64_REG_Q20 = 141
+ARM64_REG_Q21 = 142
+ARM64_REG_Q22 = 143
+ARM64_REG_Q23 = 144
+ARM64_REG_Q24 = 145
+ARM64_REG_Q25 = 146
+ARM64_REG_Q26 = 147
+ARM64_REG_Q27 = 148
+ARM64_REG_Q28 = 149
+ARM64_REG_Q29 = 150
+ARM64_REG_Q30 = 151
+ARM64_REG_Q31 = 152
+ARM64_REG_S0 = 153
+ARM64_REG_S1 = 154
+ARM64_REG_S2 = 155
+ARM64_REG_S3 = 156
+ARM64_REG_S4 = 157
+ARM64_REG_S5 = 158
+ARM64_REG_S6 = 159
+ARM64_REG_S7 = 160
+ARM64_REG_S8 = 161
+ARM64_REG_S9 = 162
+ARM64_REG_S10 = 163
+ARM64_REG_S11 = 164
+ARM64_REG_S12 = 165
+ARM64_REG_S13 = 166
+ARM64_REG_S14 = 167
+ARM64_REG_S15 = 168
+ARM64_REG_S16 = 169
+ARM64_REG_S17 = 170
+ARM64_REG_S18 = 171
+ARM64_REG_S19 = 172
+ARM64_REG_S20 = 173
+ARM64_REG_S21 = 174
+ARM64_REG_S22 = 175
+ARM64_REG_S23 = 176
+ARM64_REG_S24 = 177
+ARM64_REG_S25 = 178
+ARM64_REG_S26 = 179
+ARM64_REG_S27 = 180
+ARM64_REG_S28 = 181
+ARM64_REG_S29 = 182
+ARM64_REG_S30 = 183
+ARM64_REG_S31 = 184
+ARM64_REG_W0 = 185
+ARM64_REG_W1 = 186
+ARM64_REG_W2 = 187
+ARM64_REG_W3 = 188
+ARM64_REG_W4 = 189
+ARM64_REG_W5 = 190
+ARM64_REG_W6 = 191
+ARM64_REG_W7 = 192
+ARM64_REG_W8 = 193
+ARM64_REG_W9 = 194
+ARM64_REG_W10 = 195
+ARM64_REG_W11 = 196
+ARM64_REG_W12 = 197
+ARM64_REG_W13 = 198
+ARM64_REG_W14 = 199
+ARM64_REG_W15 = 200
+ARM64_REG_W16 = 201
+ARM64_REG_W17 = 202
+ARM64_REG_W18 = 203
+ARM64_REG_W19 = 204
+ARM64_REG_W20 = 205
+ARM64_REG_W21 = 206
+ARM64_REG_W22 = 207
+ARM64_REG_W23 = 208
+ARM64_REG_W24 = 209
+ARM64_REG_W25 = 210
+ARM64_REG_W26 = 211
+ARM64_REG_W27 = 212
+ARM64_REG_W28 = 213
+ARM64_REG_W29 = 214
+ARM64_REG_W30 = 215
+ARM64_REG_X0 = 216
+ARM64_REG_X1 = 217
+ARM64_REG_X2 = 218
+ARM64_REG_X3 = 219
+ARM64_REG_X4 = 220
+ARM64_REG_X5 = 221
+ARM64_REG_X6 = 222
+ARM64_REG_X7 = 223
+ARM64_REG_X8 = 224
+ARM64_REG_X9 = 225
+ARM64_REG_X10 = 226
+ARM64_REG_X11 = 227
+ARM64_REG_X12 = 228
+ARM64_REG_X13 = 229
+ARM64_REG_X14 = 230
+ARM64_REG_X15 = 231
+ARM64_REG_X16 = 232
+ARM64_REG_X17 = 233
+ARM64_REG_X18 = 234
+ARM64_REG_X19 = 235
+ARM64_REG_X20 = 236
+ARM64_REG_X21 = 237
+ARM64_REG_X22 = 238
+ARM64_REG_X23 = 239
+ARM64_REG_X24 = 240
+ARM64_REG_X25 = 241
+ARM64_REG_X26 = 242
+ARM64_REG_X27 = 243
+ARM64_REG_X28 = 244
+ARM64_REG_Z0 = 245
+ARM64_REG_Z1 = 246
+ARM64_REG_Z2 = 247
+ARM64_REG_Z3 = 248
+ARM64_REG_Z4 = 249
+ARM64_REG_Z5 = 250
+ARM64_REG_Z6 = 251
+ARM64_REG_Z7 = 252
+ARM64_REG_Z8 = 253
+ARM64_REG_Z9 = 254
+ARM64_REG_Z10 = 255
+ARM64_REG_Z11 = 256
+ARM64_REG_Z12 = 257
+ARM64_REG_Z13 = 258
+ARM64_REG_Z14 = 259
+ARM64_REG_Z15 = 260
+ARM64_REG_Z16 = 261
+ARM64_REG_Z17 = 262
+ARM64_REG_Z18 = 263
+ARM64_REG_Z19 = 264
+ARM64_REG_Z20 = 265
+ARM64_REG_Z21 = 266
+ARM64_REG_Z22 = 267
+ARM64_REG_Z23 = 268
+ARM64_REG_Z24 = 269
+ARM64_REG_Z25 = 270
+ARM64_REG_Z26 = 271
+ARM64_REG_Z27 = 272
+ARM64_REG_Z28 = 273
+ARM64_REG_Z29 = 274
+ARM64_REG_Z30 = 275
+ARM64_REG_Z31 = 276
+ARM64_REG_V0 = 277
+ARM64_REG_V1 = 278
+ARM64_REG_V2 = 279
+ARM64_REG_V3 = 280
+ARM64_REG_V4 = 281
+ARM64_REG_V5 = 282
+ARM64_REG_V6 = 283
+ARM64_REG_V7 = 284
+ARM64_REG_V8 = 285
+ARM64_REG_V9 = 286
+ARM64_REG_V10 = 287
+ARM64_REG_V11 = 288
+ARM64_REG_V12 = 289
+ARM64_REG_V13 = 290
+ARM64_REG_V14 = 291
+ARM64_REG_V15 = 292
+ARM64_REG_V16 = 293
+ARM64_REG_V17 = 294
+ARM64_REG_V18 = 295
+ARM64_REG_V19 = 296
+ARM64_REG_V20 = 297
+ARM64_REG_V21 = 298
+ARM64_REG_V22 = 299
+ARM64_REG_V23 = 300
+ARM64_REG_V24 = 301
+ARM64_REG_V25 = 302
+ARM64_REG_V26 = 303
+ARM64_REG_V27 = 304
+ARM64_REG_V28 = 305
+ARM64_REG_V29 = 306
+ARM64_REG_V30 = 307
+ARM64_REG_V31 = 308
+ARM64_REG_ENDING = 309
+ARM64_REG_IP0 = ARM64_REG_X16
+ARM64_REG_IP1 = ARM64_REG_X17
+ARM64_REG_X29 = ARM64_REG_FP
+ARM64_REG_X30 = ARM64_REG_LR
+
+ARM64_INS_INVALID = 0
+ARM64_INS_ABS = 1
+ARM64_INS_ADC = 2
+ARM64_INS_ADCS = 3
+ARM64_INS_ADD = 4
+ARM64_INS_ADDHN = 5
+ARM64_INS_ADDHN2 = 6
+ARM64_INS_ADDP = 7
+ARM64_INS_ADDPL = 8
+ARM64_INS_ADDS = 9
+ARM64_INS_ADDV = 10
+ARM64_INS_ADDVL = 11
+ARM64_INS_ADR = 12
+ARM64_INS_ADRP = 13
+ARM64_INS_AESD = 14
+ARM64_INS_AESE = 15
+ARM64_INS_AESIMC = 16
+ARM64_INS_AESMC = 17
+ARM64_INS_AND = 18
+ARM64_INS_ANDS = 19
+ARM64_INS_ANDV = 20
+ARM64_INS_ASR = 21
+ARM64_INS_ASRD = 22
+ARM64_INS_ASRR = 23
+ARM64_INS_ASRV = 24
+ARM64_INS_AUTDA = 25
+ARM64_INS_AUTDB = 26
+ARM64_INS_AUTDZA = 27
+ARM64_INS_AUTDZB = 28
+ARM64_INS_AUTIA = 29
+ARM64_INS_AUTIA1716 = 30
+ARM64_INS_AUTIASP = 31
+ARM64_INS_AUTIAZ = 32
+ARM64_INS_AUTIB = 33
+ARM64_INS_AUTIB1716 = 34
+ARM64_INS_AUTIBSP = 35
+ARM64_INS_AUTIBZ = 36
+ARM64_INS_AUTIZA = 37
+ARM64_INS_AUTIZB = 38
+ARM64_INS_B = 39
+ARM64_INS_BCAX = 40
+ARM64_INS_BFM = 41
+ARM64_INS_BIC = 42
+ARM64_INS_BICS = 43
+ARM64_INS_BIF = 44
+ARM64_INS_BIT = 45
+ARM64_INS_BL = 46
+ARM64_INS_BLR = 47
+ARM64_INS_BLRAA = 48
+ARM64_INS_BLRAAZ = 49
+ARM64_INS_BLRAB = 50
+ARM64_INS_BLRABZ = 51
+ARM64_INS_BR = 52
+ARM64_INS_BRAA = 53
+ARM64_INS_BRAAZ = 54
+ARM64_INS_BRAB = 55
+ARM64_INS_BRABZ = 56
+ARM64_INS_BRK = 57
+ARM64_INS_BRKA = 58
+ARM64_INS_BRKAS = 59
+ARM64_INS_BRKB = 60
+ARM64_INS_BRKBS = 61
+ARM64_INS_BRKN = 62
+ARM64_INS_BRKNS = 63
+ARM64_INS_BRKPA = 64
+ARM64_INS_BRKPAS = 65
+ARM64_INS_BRKPB = 66
+ARM64_INS_BRKPBS = 67
+ARM64_INS_BSL = 68
+ARM64_INS_CAS = 69
+ARM64_INS_CASA = 70
+ARM64_INS_CASAB = 71
+ARM64_INS_CASAH = 72
+ARM64_INS_CASAL = 73
+ARM64_INS_CASALB = 74
+ARM64_INS_CASALH = 75
+ARM64_INS_CASB = 76
+ARM64_INS_CASH = 77
+ARM64_INS_CASL = 78
+ARM64_INS_CASLB = 79
+ARM64_INS_CASLH = 80
+ARM64_INS_CASP = 81
+ARM64_INS_CASPA = 82
+ARM64_INS_CASPAL = 83
+ARM64_INS_CASPL = 84
+ARM64_INS_CBNZ = 85
+ARM64_INS_CBZ = 86
+ARM64_INS_CCMN = 87
+ARM64_INS_CCMP = 88
+ARM64_INS_CFINV = 89
+ARM64_INS_CINC = 90
+ARM64_INS_CINV = 91
+ARM64_INS_CLASTA = 92
+ARM64_INS_CLASTB = 93
+ARM64_INS_CLREX = 94
+ARM64_INS_CLS = 95
+ARM64_INS_CLZ = 96
+ARM64_INS_CMEQ = 97
+ARM64_INS_CMGE = 98
+ARM64_INS_CMGT = 99
+ARM64_INS_CMHI = 100
+ARM64_INS_CMHS = 101
+ARM64_INS_CMLE = 102
+ARM64_INS_CMLO = 103
+ARM64_INS_CMLS = 104
+ARM64_INS_CMLT = 105
+ARM64_INS_CMN = 106
+ARM64_INS_CMP = 107
+ARM64_INS_CMPEQ = 108
+ARM64_INS_CMPGE = 109
+ARM64_INS_CMPGT = 110
+ARM64_INS_CMPHI = 111
+ARM64_INS_CMPHS = 112
+ARM64_INS_CMPLE = 113
+ARM64_INS_CMPLO = 114
+ARM64_INS_CMPLS = 115
+ARM64_INS_CMPLT = 116
+ARM64_INS_CMPNE = 117
+ARM64_INS_CMTST = 118
+ARM64_INS_CNEG = 119
+ARM64_INS_CNOT = 120
+ARM64_INS_CNT = 121
+ARM64_INS_CNTB = 122
+ARM64_INS_CNTD = 123
+ARM64_INS_CNTH = 124
+ARM64_INS_CNTP = 125
+ARM64_INS_CNTW = 126
+ARM64_INS_COMPACT = 127
+ARM64_INS_CPY = 128
+ARM64_INS_CRC32B = 129
+ARM64_INS_CRC32CB = 130
+ARM64_INS_CRC32CH = 131
+ARM64_INS_CRC32CW = 132
+ARM64_INS_CRC32CX = 133
+ARM64_INS_CRC32H = 134
+ARM64_INS_CRC32W = 135
+ARM64_INS_CRC32X = 136
+ARM64_INS_CSDB = 137
+ARM64_INS_CSEL = 138
+ARM64_INS_CSET = 139
+ARM64_INS_CSETM = 140
+ARM64_INS_CSINC = 141
+ARM64_INS_CSINV = 142
+ARM64_INS_CSNEG = 143
+ARM64_INS_CTERMEQ = 144
+ARM64_INS_CTERMNE = 145
+ARM64_INS_DCPS1 = 146
+ARM64_INS_DCPS2 = 147
+ARM64_INS_DCPS3 = 148
+ARM64_INS_DECB = 149
+ARM64_INS_DECD = 150
+ARM64_INS_DECH = 151
+ARM64_INS_DECP = 152
+ARM64_INS_DECW = 153
+ARM64_INS_DMB = 154
+ARM64_INS_DRPS = 155
+ARM64_INS_DSB = 156
+ARM64_INS_DUP = 157
+ARM64_INS_DUPM = 158
+ARM64_INS_EON = 159
+ARM64_INS_EOR = 160
+ARM64_INS_EOR3 = 161
+ARM64_INS_EORS = 162
+ARM64_INS_EORV = 163
+ARM64_INS_ERET = 164
+ARM64_INS_ERETAA = 165
+ARM64_INS_ERETAB = 166
+ARM64_INS_ESB = 167
+ARM64_INS_EXT = 168
+ARM64_INS_EXTR = 169
+ARM64_INS_FABD = 170
+ARM64_INS_FABS = 171
+ARM64_INS_FACGE = 172
+ARM64_INS_FACGT = 173
+ARM64_INS_FACLE = 174
+ARM64_INS_FACLT = 175
+ARM64_INS_FADD = 176
+ARM64_INS_FADDA = 177
+ARM64_INS_FADDP = 178
+ARM64_INS_FADDV = 179
+ARM64_INS_FCADD = 180
+ARM64_INS_FCCMP = 181
+ARM64_INS_FCCMPE = 182
+ARM64_INS_FCMEQ = 183
+ARM64_INS_FCMGE = 184
+ARM64_INS_FCMGT = 185
+ARM64_INS_FCMLA = 186
+ARM64_INS_FCMLE = 187
+ARM64_INS_FCMLT = 188
+ARM64_INS_FCMNE = 189
+ARM64_INS_FCMP = 190
+ARM64_INS_FCMPE = 191
+ARM64_INS_FCMUO = 192
+ARM64_INS_FCPY = 193
+ARM64_INS_FCSEL = 194
+ARM64_INS_FCVT = 195
+ARM64_INS_FCVTAS = 196
+ARM64_INS_FCVTAU = 197
+ARM64_INS_FCVTL = 198
+ARM64_INS_FCVTL2 = 199
+ARM64_INS_FCVTMS = 200
+ARM64_INS_FCVTMU = 201
+ARM64_INS_FCVTN = 202
+ARM64_INS_FCVTN2 = 203
+ARM64_INS_FCVTNS = 204
+ARM64_INS_FCVTNU = 205
+ARM64_INS_FCVTPS = 206
+ARM64_INS_FCVTPU = 207
+ARM64_INS_FCVTXN = 208
+ARM64_INS_FCVTXN2 = 209
+ARM64_INS_FCVTZS = 210
+ARM64_INS_FCVTZU = 211
+ARM64_INS_FDIV = 212
+ARM64_INS_FDIVR = 213
+ARM64_INS_FDUP = 214
+ARM64_INS_FEXPA = 215
+ARM64_INS_FJCVTZS = 216
+ARM64_INS_FMAD = 217
+ARM64_INS_FMADD = 218
+ARM64_INS_FMAX = 219
+ARM64_INS_FMAXNM = 220
+ARM64_INS_FMAXNMP = 221
+ARM64_INS_FMAXNMV = 222
+ARM64_INS_FMAXP = 223
+ARM64_INS_FMAXV = 224
+ARM64_INS_FMIN = 225
+ARM64_INS_FMINNM = 226
+ARM64_INS_FMINNMP = 227
+ARM64_INS_FMINNMV = 228
+ARM64_INS_FMINP = 229
+ARM64_INS_FMINV = 230
+ARM64_INS_FMLA = 231
+ARM64_INS_FMLS = 232
+ARM64_INS_FMOV = 233
+ARM64_INS_FMSB = 234
+ARM64_INS_FMSUB = 235
+ARM64_INS_FMUL = 236
+ARM64_INS_FMULX = 237
+ARM64_INS_FNEG = 238
+ARM64_INS_FNMAD = 239
+ARM64_INS_FNMADD = 240
+ARM64_INS_FNMLA = 241
+ARM64_INS_FNMLS = 242
+ARM64_INS_FNMSB = 243
+ARM64_INS_FNMSUB = 244
+ARM64_INS_FNMUL = 245
+ARM64_INS_FRECPE = 246
+ARM64_INS_FRECPS = 247
+ARM64_INS_FRECPX = 248
+ARM64_INS_FRINTA = 249
+ARM64_INS_FRINTI = 250
+ARM64_INS_FRINTM = 251
+ARM64_INS_FRINTN = 252
+ARM64_INS_FRINTP = 253
+ARM64_INS_FRINTX = 254
+ARM64_INS_FRINTZ = 255
+ARM64_INS_FRSQRTE = 256
+ARM64_INS_FRSQRTS = 257
+ARM64_INS_FSCALE = 258
+ARM64_INS_FSQRT = 259
+ARM64_INS_FSUB = 260
+ARM64_INS_FSUBR = 261
+ARM64_INS_FTMAD = 262
+ARM64_INS_FTSMUL = 263
+ARM64_INS_FTSSEL = 264
+ARM64_INS_HINT = 265
+ARM64_INS_HLT = 266
+ARM64_INS_HVC = 267
+ARM64_INS_INCB = 268
+ARM64_INS_INCD = 269
+ARM64_INS_INCH = 270
+ARM64_INS_INCP = 271
+ARM64_INS_INCW = 272
+ARM64_INS_INDEX = 273
+ARM64_INS_INS = 274
+ARM64_INS_INSR = 275
+ARM64_INS_ISB = 276
+ARM64_INS_LASTA = 277
+ARM64_INS_LASTB = 278
+ARM64_INS_LD1 = 279
+ARM64_INS_LD1B = 280
+ARM64_INS_LD1D = 281
+ARM64_INS_LD1H = 282
+ARM64_INS_LD1R = 283
+ARM64_INS_LD1RB = 284
+ARM64_INS_LD1RD = 285
+ARM64_INS_LD1RH = 286
+ARM64_INS_LD1RQB = 287
+ARM64_INS_LD1RQD = 288
+ARM64_INS_LD1RQH = 289
+ARM64_INS_LD1RQW = 290
+ARM64_INS_LD1RSB = 291
+ARM64_INS_LD1RSH = 292
+ARM64_INS_LD1RSW = 293
+ARM64_INS_LD1RW = 294
+ARM64_INS_LD1SB = 295
+ARM64_INS_LD1SH = 296
+ARM64_INS_LD1SW = 297
+ARM64_INS_LD1W = 298
+ARM64_INS_LD2 = 299
+ARM64_INS_LD2B = 300
+ARM64_INS_LD2D = 301
+ARM64_INS_LD2H = 302
+ARM64_INS_LD2R = 303
+ARM64_INS_LD2W = 304
+ARM64_INS_LD3 = 305
+ARM64_INS_LD3B = 306
+ARM64_INS_LD3D = 307
+ARM64_INS_LD3H = 308
+ARM64_INS_LD3R = 309
+ARM64_INS_LD3W = 310
+ARM64_INS_LD4 = 311
+ARM64_INS_LD4B = 312
+ARM64_INS_LD4D = 313
+ARM64_INS_LD4H = 314
+ARM64_INS_LD4R = 315
+ARM64_INS_LD4W = 316
+ARM64_INS_LDADD = 317
+ARM64_INS_LDADDA = 318
+ARM64_INS_LDADDAB = 319
+ARM64_INS_LDADDAH = 320
+ARM64_INS_LDADDAL = 321
+ARM64_INS_LDADDALB = 322
+ARM64_INS_LDADDALH = 323
+ARM64_INS_LDADDB = 324
+ARM64_INS_LDADDH = 325
+ARM64_INS_LDADDL = 326
+ARM64_INS_LDADDLB = 327
+ARM64_INS_LDADDLH = 328
+ARM64_INS_LDAPR = 329
+ARM64_INS_LDAPRB = 330
+ARM64_INS_LDAPRH = 331
+ARM64_INS_LDAPUR = 332
+ARM64_INS_LDAPURB = 333
+ARM64_INS_LDAPURH = 334
+ARM64_INS_LDAPURSB = 335
+ARM64_INS_LDAPURSH = 336
+ARM64_INS_LDAPURSW = 337
+ARM64_INS_LDAR = 338
+ARM64_INS_LDARB = 339
+ARM64_INS_LDARH = 340
+ARM64_INS_LDAXP = 341
+ARM64_INS_LDAXR = 342
+ARM64_INS_LDAXRB = 343
+ARM64_INS_LDAXRH = 344
+ARM64_INS_LDCLR = 345
+ARM64_INS_LDCLRA = 346
+ARM64_INS_LDCLRAB = 347
+ARM64_INS_LDCLRAH = 348
+ARM64_INS_LDCLRAL = 349
+ARM64_INS_LDCLRALB = 350
+ARM64_INS_LDCLRALH = 351
+ARM64_INS_LDCLRB = 352
+ARM64_INS_LDCLRH = 353
+ARM64_INS_LDCLRL = 354
+ARM64_INS_LDCLRLB = 355
+ARM64_INS_LDCLRLH = 356
+ARM64_INS_LDEOR = 357
+ARM64_INS_LDEORA = 358
+ARM64_INS_LDEORAB = 359
+ARM64_INS_LDEORAH = 360
+ARM64_INS_LDEORAL = 361
+ARM64_INS_LDEORALB = 362
+ARM64_INS_LDEORALH = 363
+ARM64_INS_LDEORB = 364
+ARM64_INS_LDEORH = 365
+ARM64_INS_LDEORL = 366
+ARM64_INS_LDEORLB = 367
+ARM64_INS_LDEORLH = 368
+ARM64_INS_LDFF1B = 369
+ARM64_INS_LDFF1D = 370
+ARM64_INS_LDFF1H = 371
+ARM64_INS_LDFF1SB = 372
+ARM64_INS_LDFF1SH = 373
+ARM64_INS_LDFF1SW = 374
+ARM64_INS_LDFF1W = 375
+ARM64_INS_LDLAR = 376
+ARM64_INS_LDLARB = 377
+ARM64_INS_LDLARH = 378
+ARM64_INS_LDNF1B = 379
+ARM64_INS_LDNF1D = 380
+ARM64_INS_LDNF1H = 381
+ARM64_INS_LDNF1SB = 382
+ARM64_INS_LDNF1SH = 383
+ARM64_INS_LDNF1SW = 384
+ARM64_INS_LDNF1W = 385
+ARM64_INS_LDNP = 386
+ARM64_INS_LDNT1B = 387
+ARM64_INS_LDNT1D = 388
+ARM64_INS_LDNT1H = 389
+ARM64_INS_LDNT1W = 390
+ARM64_INS_LDP = 391
+ARM64_INS_LDPSW = 392
+ARM64_INS_LDR = 393
+ARM64_INS_LDRAA = 394
+ARM64_INS_LDRAB = 395
+ARM64_INS_LDRB = 396
+ARM64_INS_LDRH = 397
+ARM64_INS_LDRSB = 398
+ARM64_INS_LDRSH = 399
+ARM64_INS_LDRSW = 400
+ARM64_INS_LDSET = 401
+ARM64_INS_LDSETA = 402
+ARM64_INS_LDSETAB = 403
+ARM64_INS_LDSETAH = 404
+ARM64_INS_LDSETAL = 405
+ARM64_INS_LDSETALB = 406
+ARM64_INS_LDSETALH = 407
+ARM64_INS_LDSETB = 408
+ARM64_INS_LDSETH = 409
+ARM64_INS_LDSETL = 410
+ARM64_INS_LDSETLB = 411
+ARM64_INS_LDSETLH = 412
+ARM64_INS_LDSMAX = 413
+ARM64_INS_LDSMAXA = 414
+ARM64_INS_LDSMAXAB = 415
+ARM64_INS_LDSMAXAH = 416
+ARM64_INS_LDSMAXAL = 417
+ARM64_INS_LDSMAXALB = 418
+ARM64_INS_LDSMAXALH = 419
+ARM64_INS_LDSMAXB = 420
+ARM64_INS_LDSMAXH = 421
+ARM64_INS_LDSMAXL = 422
+ARM64_INS_LDSMAXLB = 423
+ARM64_INS_LDSMAXLH = 424
+ARM64_INS_LDSMIN = 425
+ARM64_INS_LDSMINA = 426
+ARM64_INS_LDSMINAB = 427
+ARM64_INS_LDSMINAH = 428
+ARM64_INS_LDSMINAL = 429
+ARM64_INS_LDSMINALB = 430
+ARM64_INS_LDSMINALH = 431
+ARM64_INS_LDSMINB = 432
+ARM64_INS_LDSMINH = 433
+ARM64_INS_LDSMINL = 434
+ARM64_INS_LDSMINLB = 435
+ARM64_INS_LDSMINLH = 436
+ARM64_INS_LDTR = 437
+ARM64_INS_LDTRB = 438
+ARM64_INS_LDTRH = 439
+ARM64_INS_LDTRSB = 440
+ARM64_INS_LDTRSH = 441
+ARM64_INS_LDTRSW = 442
+ARM64_INS_LDUMAX = 443
+ARM64_INS_LDUMAXA = 444
+ARM64_INS_LDUMAXAB = 445
+ARM64_INS_LDUMAXAH = 446
+ARM64_INS_LDUMAXAL = 447
+ARM64_INS_LDUMAXALB = 448
+ARM64_INS_LDUMAXALH = 449
+ARM64_INS_LDUMAXB = 450
+ARM64_INS_LDUMAXH = 451
+ARM64_INS_LDUMAXL = 452
+ARM64_INS_LDUMAXLB = 453
+ARM64_INS_LDUMAXLH = 454
+ARM64_INS_LDUMIN = 455
+ARM64_INS_LDUMINA = 456
+ARM64_INS_LDUMINAB = 457
+ARM64_INS_LDUMINAH = 458
+ARM64_INS_LDUMINAL = 459
+ARM64_INS_LDUMINALB = 460
+ARM64_INS_LDUMINALH = 461
+ARM64_INS_LDUMINB = 462
+ARM64_INS_LDUMINH = 463
+ARM64_INS_LDUMINL = 464
+ARM64_INS_LDUMINLB = 465
+ARM64_INS_LDUMINLH = 466
+ARM64_INS_LDUR = 467
+ARM64_INS_LDURB = 468
+ARM64_INS_LDURH = 469
+ARM64_INS_LDURSB = 470
+ARM64_INS_LDURSH = 471
+ARM64_INS_LDURSW = 472
+ARM64_INS_LDXP = 473
+ARM64_INS_LDXR = 474
+ARM64_INS_LDXRB = 475
+ARM64_INS_LDXRH = 476
+ARM64_INS_LSL = 477
+ARM64_INS_LSLR = 478
+ARM64_INS_LSLV = 479
+ARM64_INS_LSR = 480
+ARM64_INS_LSRR = 481
+ARM64_INS_LSRV = 482
+ARM64_INS_MAD = 483
+ARM64_INS_MADD = 484
+ARM64_INS_MLA = 485
+ARM64_INS_MLS = 486
+ARM64_INS_MNEG = 487
+ARM64_INS_MOV = 488
+ARM64_INS_MOVI = 489
+ARM64_INS_MOVK = 490
+ARM64_INS_MOVN = 491
+ARM64_INS_MOVPRFX = 492
+ARM64_INS_MOVS = 493
+ARM64_INS_MOVZ = 494
+ARM64_INS_MRS = 495
+ARM64_INS_MSB = 496
+ARM64_INS_MSR = 497
+ARM64_INS_MSUB = 498
+ARM64_INS_MUL = 499
+ARM64_INS_MVN = 500
+ARM64_INS_MVNI = 501
+ARM64_INS_NAND = 502
+ARM64_INS_NANDS = 503
+ARM64_INS_NEG = 504
+ARM64_INS_NEGS = 505
+ARM64_INS_NGC = 506
+ARM64_INS_NGCS = 507
+ARM64_INS_NOP = 508
+ARM64_INS_NOR = 509
+ARM64_INS_NORS = 510
+ARM64_INS_NOT = 511
+ARM64_INS_NOTS = 512
+ARM64_INS_ORN = 513
+ARM64_INS_ORNS = 514
+ARM64_INS_ORR = 515
+ARM64_INS_ORRS = 516
+ARM64_INS_ORV = 517
+ARM64_INS_PACDA = 518
+ARM64_INS_PACDB = 519
+ARM64_INS_PACDZA = 520
+ARM64_INS_PACDZB = 521
+ARM64_INS_PACGA = 522
+ARM64_INS_PACIA = 523
+ARM64_INS_PACIA1716 = 524
+ARM64_INS_PACIASP = 525
+ARM64_INS_PACIAZ = 526
+ARM64_INS_PACIB = 527
+ARM64_INS_PACIB1716 = 528
+ARM64_INS_PACIBSP = 529
+ARM64_INS_PACIBZ = 530
+ARM64_INS_PACIZA = 531
+ARM64_INS_PACIZB = 532
+ARM64_INS_PFALSE = 533
+ARM64_INS_PFIRST = 534
+ARM64_INS_PMUL = 535
+ARM64_INS_PMULL = 536
+ARM64_INS_PMULL2 = 537
+ARM64_INS_PNEXT = 538
+ARM64_INS_PRFB = 539
+ARM64_INS_PRFD = 540
+ARM64_INS_PRFH = 541
+ARM64_INS_PRFM = 542
+ARM64_INS_PRFUM = 543
+ARM64_INS_PRFW = 544
+ARM64_INS_PSB = 545
+ARM64_INS_PTEST = 546
+ARM64_INS_PTRUE = 547
+ARM64_INS_PTRUES = 548
+ARM64_INS_PUNPKHI = 549
+ARM64_INS_PUNPKLO = 550
+ARM64_INS_RADDHN = 551
+ARM64_INS_RADDHN2 = 552
+ARM64_INS_RAX1 = 553
+ARM64_INS_RBIT = 554
+ARM64_INS_RDFFR = 555
+ARM64_INS_RDFFRS = 556
+ARM64_INS_RDVL = 557
+ARM64_INS_RET = 558
+ARM64_INS_RETAA = 559
+ARM64_INS_RETAB = 560
+ARM64_INS_REV = 561
+ARM64_INS_REV16 = 562
+ARM64_INS_REV32 = 563
+ARM64_INS_REV64 = 564
+ARM64_INS_REVB = 565
+ARM64_INS_REVH = 566
+ARM64_INS_REVW = 567
+ARM64_INS_RMIF = 568
+ARM64_INS_ROR = 569
+ARM64_INS_RORV = 570
+ARM64_INS_RSHRN = 571
+ARM64_INS_RSHRN2 = 572
+ARM64_INS_RSUBHN = 573
+ARM64_INS_RSUBHN2 = 574
+ARM64_INS_SABA = 575
+ARM64_INS_SABAL = 576
+ARM64_INS_SABAL2 = 577
+ARM64_INS_SABD = 578
+ARM64_INS_SABDL = 579
+ARM64_INS_SABDL2 = 580
+ARM64_INS_SADALP = 581
+ARM64_INS_SADDL = 582
+ARM64_INS_SADDL2 = 583
+ARM64_INS_SADDLP = 584
+ARM64_INS_SADDLV = 585
+ARM64_INS_SADDV = 586
+ARM64_INS_SADDW = 587
+ARM64_INS_SADDW2 = 588
+ARM64_INS_SBC = 589
+ARM64_INS_SBCS = 590
+ARM64_INS_SBFM = 591
+ARM64_INS_SCVTF = 592
+ARM64_INS_SDIV = 593
+ARM64_INS_SDIVR = 594
+ARM64_INS_SDOT = 595
+ARM64_INS_SEL = 596
+ARM64_INS_SETF16 = 597
+ARM64_INS_SETF8 = 598
+ARM64_INS_SETFFR = 599
+ARM64_INS_SEV = 600
+ARM64_INS_SEVL = 601
+ARM64_INS_SHA1C = 602
+ARM64_INS_SHA1H = 603
+ARM64_INS_SHA1M = 604
+ARM64_INS_SHA1P = 605
+ARM64_INS_SHA1SU0 = 606
+ARM64_INS_SHA1SU1 = 607
+ARM64_INS_SHA256H = 608
+ARM64_INS_SHA256H2 = 609
+ARM64_INS_SHA256SU0 = 610
+ARM64_INS_SHA256SU1 = 611
+ARM64_INS_SHA512H = 612
+ARM64_INS_SHA512H2 = 613
+ARM64_INS_SHA512SU0 = 614
+ARM64_INS_SHA512SU1 = 615
+ARM64_INS_SHADD = 616
+ARM64_INS_SHL = 617
+ARM64_INS_SHLL = 618
+ARM64_INS_SHLL2 = 619
+ARM64_INS_SHRN = 620
+ARM64_INS_SHRN2 = 621
+ARM64_INS_SHSUB = 622
+ARM64_INS_SLI = 623
+ARM64_INS_SM3PARTW1 = 624
+ARM64_INS_SM3PARTW2 = 625
+ARM64_INS_SM3SS1 = 626
+ARM64_INS_SM3TT1A = 627
+ARM64_INS_SM3TT1B = 628
+ARM64_INS_SM3TT2A = 629
+ARM64_INS_SM3TT2B = 630
+ARM64_INS_SM4E = 631
+ARM64_INS_SM4EKEY = 632
+ARM64_INS_SMADDL = 633
+ARM64_INS_SMAX = 634
+ARM64_INS_SMAXP = 635
+ARM64_INS_SMAXV = 636
+ARM64_INS_SMC = 637
+ARM64_INS_SMIN = 638
+ARM64_INS_SMINP = 639
+ARM64_INS_SMINV = 640
+ARM64_INS_SMLAL = 641
+ARM64_INS_SMLAL2 = 642
+ARM64_INS_SMLSL = 643
+ARM64_INS_SMLSL2 = 644
+ARM64_INS_SMNEGL = 645
+ARM64_INS_SMOV = 646
+ARM64_INS_SMSUBL = 647
+ARM64_INS_SMULH = 648
+ARM64_INS_SMULL = 649
+ARM64_INS_SMULL2 = 650
+ARM64_INS_SPLICE = 651
+ARM64_INS_SQABS = 652
+ARM64_INS_SQADD = 653
+ARM64_INS_SQDECB = 654
+ARM64_INS_SQDECD = 655
+ARM64_INS_SQDECH = 656
+ARM64_INS_SQDECP = 657
+ARM64_INS_SQDECW = 658
+ARM64_INS_SQDMLAL = 659
+ARM64_INS_SQDMLAL2 = 660
+ARM64_INS_SQDMLSL = 661
+ARM64_INS_SQDMLSL2 = 662
+ARM64_INS_SQDMULH = 663
+ARM64_INS_SQDMULL = 664
+ARM64_INS_SQDMULL2 = 665
+ARM64_INS_SQINCB = 666
+ARM64_INS_SQINCD = 667
+ARM64_INS_SQINCH = 668
+ARM64_INS_SQINCP = 669
+ARM64_INS_SQINCW = 670
+ARM64_INS_SQNEG = 671
+ARM64_INS_SQRDMLAH = 672
+ARM64_INS_SQRDMLSH = 673
+ARM64_INS_SQRDMULH = 674
+ARM64_INS_SQRSHL = 675
+ARM64_INS_SQRSHRN = 676
+ARM64_INS_SQRSHRN2 = 677
+ARM64_INS_SQRSHRUN = 678
+ARM64_INS_SQRSHRUN2 = 679
+ARM64_INS_SQSHL = 680
+ARM64_INS_SQSHLU = 681
+ARM64_INS_SQSHRN = 682
+ARM64_INS_SQSHRN2 = 683
+ARM64_INS_SQSHRUN = 684
+ARM64_INS_SQSHRUN2 = 685
+ARM64_INS_SQSUB = 686
+ARM64_INS_SQXTN = 687
+ARM64_INS_SQXTN2 = 688
+ARM64_INS_SQXTUN = 689
+ARM64_INS_SQXTUN2 = 690
+ARM64_INS_SRHADD = 691
+ARM64_INS_SRI = 692
+ARM64_INS_SRSHL = 693
+ARM64_INS_SRSHR = 694
+ARM64_INS_SRSRA = 695
+ARM64_INS_SSHL = 696
+ARM64_INS_SSHLL = 697
+ARM64_INS_SSHLL2 = 698
+ARM64_INS_SSHR = 699
+ARM64_INS_SSRA = 700
+ARM64_INS_SSUBL = 701
+ARM64_INS_SSUBL2 = 702
+ARM64_INS_SSUBW = 703
+ARM64_INS_SSUBW2 = 704
+ARM64_INS_ST1 = 705
+ARM64_INS_ST1B = 706
+ARM64_INS_ST1D = 707
+ARM64_INS_ST1H = 708
+ARM64_INS_ST1W = 709
+ARM64_INS_ST2 = 710
+ARM64_INS_ST2B = 711
+ARM64_INS_ST2D = 712
+ARM64_INS_ST2H = 713
+ARM64_INS_ST2W = 714
+ARM64_INS_ST3 = 715
+ARM64_INS_ST3B = 716
+ARM64_INS_ST3D = 717
+ARM64_INS_ST3H = 718
+ARM64_INS_ST3W = 719
+ARM64_INS_ST4 = 720
+ARM64_INS_ST4B = 721
+ARM64_INS_ST4D = 722
+ARM64_INS_ST4H = 723
+ARM64_INS_ST4W = 724
+ARM64_INS_STADD = 725
+ARM64_INS_STADDB = 726
+ARM64_INS_STADDH = 727
+ARM64_INS_STADDL = 728
+ARM64_INS_STADDLB = 729
+ARM64_INS_STADDLH = 730
+ARM64_INS_STCLR = 731
+ARM64_INS_STCLRB = 732
+ARM64_INS_STCLRH = 733
+ARM64_INS_STCLRL = 734
+ARM64_INS_STCLRLB = 735
+ARM64_INS_STCLRLH = 736
+ARM64_INS_STEOR = 737
+ARM64_INS_STEORB = 738
+ARM64_INS_STEORH = 739
+ARM64_INS_STEORL = 740
+ARM64_INS_STEORLB = 741
+ARM64_INS_STEORLH = 742
+ARM64_INS_STLLR = 743
+ARM64_INS_STLLRB = 744
+ARM64_INS_STLLRH = 745
+ARM64_INS_STLR = 746
+ARM64_INS_STLRB = 747
+ARM64_INS_STLRH = 748
+ARM64_INS_STLUR = 749
+ARM64_INS_STLURB = 750
+ARM64_INS_STLURH = 751
+ARM64_INS_STLXP = 752
+ARM64_INS_STLXR = 753
+ARM64_INS_STLXRB = 754
+ARM64_INS_STLXRH = 755
+ARM64_INS_STNP = 756
+ARM64_INS_STNT1B = 757
+ARM64_INS_STNT1D = 758
+ARM64_INS_STNT1H = 759
+ARM64_INS_STNT1W = 760
+ARM64_INS_STP = 761
+ARM64_INS_STR = 762
+ARM64_INS_STRB = 763
+ARM64_INS_STRH = 764
+ARM64_INS_STSET = 765
+ARM64_INS_STSETB = 766
+ARM64_INS_STSETH = 767
+ARM64_INS_STSETL = 768
+ARM64_INS_STSETLB = 769
+ARM64_INS_STSETLH = 770
+ARM64_INS_STSMAX = 771
+ARM64_INS_STSMAXB = 772
+ARM64_INS_STSMAXH = 773
+ARM64_INS_STSMAXL = 774
+ARM64_INS_STSMAXLB = 775
+ARM64_INS_STSMAXLH = 776
+ARM64_INS_STSMIN = 777
+ARM64_INS_STSMINB = 778
+ARM64_INS_STSMINH = 779
+ARM64_INS_STSMINL = 780
+ARM64_INS_STSMINLB = 781
+ARM64_INS_STSMINLH = 782
+ARM64_INS_STTR = 783
+ARM64_INS_STTRB = 784
+ARM64_INS_STTRH = 785
+ARM64_INS_STUMAX = 786
+ARM64_INS_STUMAXB = 787
+ARM64_INS_STUMAXH = 788
+ARM64_INS_STUMAXL = 789
+ARM64_INS_STUMAXLB = 790
+ARM64_INS_STUMAXLH = 791
+ARM64_INS_STUMIN = 792
+ARM64_INS_STUMINB = 793
+ARM64_INS_STUMINH = 794
+ARM64_INS_STUMINL = 795
+ARM64_INS_STUMINLB = 796
+ARM64_INS_STUMINLH = 797
+ARM64_INS_STUR = 798
+ARM64_INS_STURB = 799
+ARM64_INS_STURH = 800
+ARM64_INS_STXP = 801
+ARM64_INS_STXR = 802
+ARM64_INS_STXRB = 803
+ARM64_INS_STXRH = 804
+ARM64_INS_SUB = 805
+ARM64_INS_SUBHN = 806
+ARM64_INS_SUBHN2 = 807
+ARM64_INS_SUBR = 808
+ARM64_INS_SUBS = 809
+ARM64_INS_SUNPKHI = 810
+ARM64_INS_SUNPKLO = 811
+ARM64_INS_SUQADD = 812
+ARM64_INS_SVC = 813
+ARM64_INS_SWP = 814
+ARM64_INS_SWPA = 815
+ARM64_INS_SWPAB = 816
+ARM64_INS_SWPAH = 817
+ARM64_INS_SWPAL = 818
+ARM64_INS_SWPALB = 819
+ARM64_INS_SWPALH = 820
+ARM64_INS_SWPB = 821
+ARM64_INS_SWPH = 822
+ARM64_INS_SWPL = 823
+ARM64_INS_SWPLB = 824
+ARM64_INS_SWPLH = 825
+ARM64_INS_SXTB = 826
+ARM64_INS_SXTH = 827
+ARM64_INS_SXTL = 828
+ARM64_INS_SXTL2 = 829
+ARM64_INS_SXTW = 830
+ARM64_INS_SYS = 831
+ARM64_INS_SYSL = 832
+ARM64_INS_TBL = 833
+ARM64_INS_TBNZ = 834
+ARM64_INS_TBX = 835
+ARM64_INS_TBZ = 836
+ARM64_INS_TRN1 = 837
+ARM64_INS_TRN2 = 838
+ARM64_INS_TSB = 839
+ARM64_INS_TST = 840
+ARM64_INS_UABA = 841
+ARM64_INS_UABAL = 842
+ARM64_INS_UABAL2 = 843
+ARM64_INS_UABD = 844
+ARM64_INS_UABDL = 845
+ARM64_INS_UABDL2 = 846
+ARM64_INS_UADALP = 847
+ARM64_INS_UADDL = 848
+ARM64_INS_UADDL2 = 849
+ARM64_INS_UADDLP = 850
+ARM64_INS_UADDLV = 851
+ARM64_INS_UADDV = 852
+ARM64_INS_UADDW = 853
+ARM64_INS_UADDW2 = 854
+ARM64_INS_UBFM = 855
+ARM64_INS_UCVTF = 856
+ARM64_INS_UDIV = 857
+ARM64_INS_UDIVR = 858
+ARM64_INS_UDOT = 859
+ARM64_INS_UHADD = 860
+ARM64_INS_UHSUB = 861
+ARM64_INS_UMADDL = 862
+ARM64_INS_UMAX = 863
+ARM64_INS_UMAXP = 864
+ARM64_INS_UMAXV = 865
+ARM64_INS_UMIN = 866
+ARM64_INS_UMINP = 867
+ARM64_INS_UMINV = 868
+ARM64_INS_UMLAL = 869
+ARM64_INS_UMLAL2 = 870
+ARM64_INS_UMLSL = 871
+ARM64_INS_UMLSL2 = 872
+ARM64_INS_UMNEGL = 873
+ARM64_INS_UMOV = 874
+ARM64_INS_UMSUBL = 875
+ARM64_INS_UMULH = 876
+ARM64_INS_UMULL = 877
+ARM64_INS_UMULL2 = 878
+ARM64_INS_UQADD = 879
+ARM64_INS_UQDECB = 880
+ARM64_INS_UQDECD = 881
+ARM64_INS_UQDECH = 882
+ARM64_INS_UQDECP = 883
+ARM64_INS_UQDECW = 884
+ARM64_INS_UQINCB = 885
+ARM64_INS_UQINCD = 886
+ARM64_INS_UQINCH = 887
+ARM64_INS_UQINCP = 888
+ARM64_INS_UQINCW = 889
+ARM64_INS_UQRSHL = 890
+ARM64_INS_UQRSHRN = 891
+ARM64_INS_UQRSHRN2 = 892
+ARM64_INS_UQSHL = 893
+ARM64_INS_UQSHRN = 894
+ARM64_INS_UQSHRN2 = 895
+ARM64_INS_UQSUB = 896
+ARM64_INS_UQXTN = 897
+ARM64_INS_UQXTN2 = 898
+ARM64_INS_URECPE = 899
+ARM64_INS_URHADD = 900
+ARM64_INS_URSHL = 901
+ARM64_INS_URSHR = 902
+ARM64_INS_URSQRTE = 903
+ARM64_INS_URSRA = 904
+ARM64_INS_USHL = 905
+ARM64_INS_USHLL = 906
+ARM64_INS_USHLL2 = 907
+ARM64_INS_USHR = 908
+ARM64_INS_USQADD = 909
+ARM64_INS_USRA = 910
+ARM64_INS_USUBL = 911
+ARM64_INS_USUBL2 = 912
+ARM64_INS_USUBW = 913
+ARM64_INS_USUBW2 = 914
+ARM64_INS_UUNPKHI = 915
+ARM64_INS_UUNPKLO = 916
+ARM64_INS_UXTB = 917
+ARM64_INS_UXTH = 918
+ARM64_INS_UXTL = 919
+ARM64_INS_UXTL2 = 920
+ARM64_INS_UXTW = 921
+ARM64_INS_UZP1 = 922
+ARM64_INS_UZP2 = 923
+ARM64_INS_WFE = 924
+ARM64_INS_WFI = 925
+ARM64_INS_WHILELE = 926
+ARM64_INS_WHILELO = 927
+ARM64_INS_WHILELS = 928
+ARM64_INS_WHILELT = 929
+ARM64_INS_WRFFR = 930
+ARM64_INS_XAR = 931
+ARM64_INS_XPACD = 932
+ARM64_INS_XPACI = 933
+ARM64_INS_XPACLRI = 934
+ARM64_INS_XTN = 935
+ARM64_INS_XTN2 = 936
+ARM64_INS_YIELD = 937
+ARM64_INS_ZIP1 = 938
+ARM64_INS_ZIP2 = 939
+ARM64_INS_SBFIZ = 940
+ARM64_INS_UBFIZ = 941
+ARM64_INS_SBFX = 942
+ARM64_INS_UBFX = 943
+ARM64_INS_BFI = 944
+ARM64_INS_BFXIL = 945
+ARM64_INS_IC = 946
+ARM64_INS_DC = 947
+ARM64_INS_AT = 948
+ARM64_INS_TLBI = 949
+ARM64_INS_ENDING = 950
+
+ARM64_GRP_INVALID = 0
+ARM64_GRP_JUMP = 1
+ARM64_GRP_CALL = 2
+ARM64_GRP_RET = 3
+ARM64_GRP_INT = 4
+ARM64_GRP_PRIVILEGE = 6
+ARM64_GRP_BRANCH_RELATIVE = 7
+ARM64_GRP_CRYPTO = 128
+ARM64_GRP_FPARMV8 = 129
+ARM64_GRP_NEON = 130
+ARM64_GRP_CRC = 131
+ARM64_GRP_AES = 132
+ARM64_GRP_DOTPROD = 133
+ARM64_GRP_FULLFP16 = 134
+ARM64_GRP_LSE = 135
+ARM64_GRP_RCPC = 136
+ARM64_GRP_RDM = 137
+ARM64_GRP_SHA2 = 138
+ARM64_GRP_SHA3 = 139
+ARM64_GRP_SM4 = 140
+ARM64_GRP_SVE = 141
+ARM64_GRP_V8_1A = 142
+ARM64_GRP_V8_3A = 143
+ARM64_GRP_V8_4A = 144
+ARM64_GRP_ENDING = 145
diff --git a/capstone/bindings/python/capstone/arm_const.py b/capstone/bindings/python/capstone/arm_const.py
new file mode 100644
index 000000000..4395f80e2
--- /dev/null
+++ b/capstone/bindings/python/capstone/arm_const.py
@@ -0,0 +1,830 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.py]
+
+ARM_SFT_INVALID = 0
+ARM_SFT_ASR = 1
+ARM_SFT_LSL = 2
+ARM_SFT_LSR = 3
+ARM_SFT_ROR = 4
+ARM_SFT_RRX = 5
+ARM_SFT_ASR_REG = 6
+ARM_SFT_LSL_REG = 7
+ARM_SFT_LSR_REG = 8
+ARM_SFT_ROR_REG = 9
+ARM_SFT_RRX_REG = 10
+
+ARM_CC_INVALID = 0
+ARM_CC_EQ = 1
+ARM_CC_NE = 2
+ARM_CC_HS = 3
+ARM_CC_LO = 4
+ARM_CC_MI = 5
+ARM_CC_PL = 6
+ARM_CC_VS = 7
+ARM_CC_VC = 8
+ARM_CC_HI = 9
+ARM_CC_LS = 10
+ARM_CC_GE = 11
+ARM_CC_LT = 12
+ARM_CC_GT = 13
+ARM_CC_LE = 14
+ARM_CC_AL = 15
+
+ARM_SYSREG_INVALID = 0
+ARM_SYSREG_SPSR_C = 1
+ARM_SYSREG_SPSR_X = 2
+ARM_SYSREG_SPSR_S = 4
+ARM_SYSREG_SPSR_F = 8
+ARM_SYSREG_CPSR_C = 16
+ARM_SYSREG_CPSR_X = 32
+ARM_SYSREG_CPSR_S = 64
+ARM_SYSREG_CPSR_F = 128
+ARM_SYSREG_APSR = 256
+ARM_SYSREG_APSR_G = 257
+ARM_SYSREG_APSR_NZCVQ = 258
+ARM_SYSREG_APSR_NZCVQG = 259
+ARM_SYSREG_IAPSR = 260
+ARM_SYSREG_IAPSR_G = 261
+ARM_SYSREG_IAPSR_NZCVQG = 262
+ARM_SYSREG_IAPSR_NZCVQ = 263
+ARM_SYSREG_EAPSR = 264
+ARM_SYSREG_EAPSR_G = 265
+ARM_SYSREG_EAPSR_NZCVQG = 266
+ARM_SYSREG_EAPSR_NZCVQ = 267
+ARM_SYSREG_XPSR = 268
+ARM_SYSREG_XPSR_G = 269
+ARM_SYSREG_XPSR_NZCVQG = 270
+ARM_SYSREG_XPSR_NZCVQ = 271
+ARM_SYSREG_IPSR = 272
+ARM_SYSREG_EPSR = 273
+ARM_SYSREG_IEPSR = 274
+ARM_SYSREG_MSP = 275
+ARM_SYSREG_PSP = 276
+ARM_SYSREG_PRIMASK = 277
+ARM_SYSREG_BASEPRI = 278
+ARM_SYSREG_BASEPRI_MAX = 279
+ARM_SYSREG_FAULTMASK = 280
+ARM_SYSREG_CONTROL = 281
+ARM_SYSREG_MSPLIM = 282
+ARM_SYSREG_PSPLIM = 283
+ARM_SYSREG_MSP_NS = 284
+ARM_SYSREG_PSP_NS = 285
+ARM_SYSREG_MSPLIM_NS = 286
+ARM_SYSREG_PSPLIM_NS = 287
+ARM_SYSREG_PRIMASK_NS = 288
+ARM_SYSREG_BASEPRI_NS = 289
+ARM_SYSREG_FAULTMASK_NS = 290
+ARM_SYSREG_CONTROL_NS = 291
+ARM_SYSREG_SP_NS = 292
+ARM_SYSREG_R8_USR = 293
+ARM_SYSREG_R9_USR = 294
+ARM_SYSREG_R10_USR = 295
+ARM_SYSREG_R11_USR = 296
+ARM_SYSREG_R12_USR = 297
+ARM_SYSREG_SP_USR = 298
+ARM_SYSREG_LR_USR = 299
+ARM_SYSREG_R8_FIQ = 300
+ARM_SYSREG_R9_FIQ = 301
+ARM_SYSREG_R10_FIQ = 302
+ARM_SYSREG_R11_FIQ = 303
+ARM_SYSREG_R12_FIQ = 304
+ARM_SYSREG_SP_FIQ = 305
+ARM_SYSREG_LR_FIQ = 306
+ARM_SYSREG_LR_IRQ = 307
+ARM_SYSREG_SP_IRQ = 308
+ARM_SYSREG_LR_SVC = 309
+ARM_SYSREG_SP_SVC = 310
+ARM_SYSREG_LR_ABT = 311
+ARM_SYSREG_SP_ABT = 312
+ARM_SYSREG_LR_UND = 313
+ARM_SYSREG_SP_UND = 314
+ARM_SYSREG_LR_MON = 315
+ARM_SYSREG_SP_MON = 316
+ARM_SYSREG_ELR_HYP = 317
+ARM_SYSREG_SP_HYP = 318
+ARM_SYSREG_SPSR_FIQ = 319
+ARM_SYSREG_SPSR_IRQ = 320
+ARM_SYSREG_SPSR_SVC = 321
+ARM_SYSREG_SPSR_ABT = 322
+ARM_SYSREG_SPSR_UND = 323
+ARM_SYSREG_SPSR_MON = 324
+ARM_SYSREG_SPSR_HYP = 325
+
+ARM_MB_INVALID = 0
+ARM_MB_RESERVED_0 = 1
+ARM_MB_OSHLD = 2
+ARM_MB_OSHST = 3
+ARM_MB_OSH = 4
+ARM_MB_RESERVED_4 = 5
+ARM_MB_NSHLD = 6
+ARM_MB_NSHST = 7
+ARM_MB_NSH = 8
+ARM_MB_RESERVED_8 = 9
+ARM_MB_ISHLD = 10
+ARM_MB_ISHST = 11
+ARM_MB_ISH = 12
+ARM_MB_RESERVED_12 = 13
+ARM_MB_LD = 14
+ARM_MB_ST = 15
+ARM_MB_SY = 16
+
+ARM_OP_INVALID = 0
+ARM_OP_REG = 1
+ARM_OP_IMM = 2
+ARM_OP_MEM = 3
+ARM_OP_FP = 4
+ARM_OP_CIMM = 64
+ARM_OP_PIMM = 65
+ARM_OP_SETEND = 66
+ARM_OP_SYSREG = 67
+
+ARM_SETEND_INVALID = 0
+ARM_SETEND_BE = 1
+ARM_SETEND_LE = 2
+
+ARM_CPSMODE_INVALID = 0
+ARM_CPSMODE_IE = 2
+ARM_CPSMODE_ID = 3
+
+ARM_CPSFLAG_INVALID = 0
+ARM_CPSFLAG_F = 1
+ARM_CPSFLAG_I = 2
+ARM_CPSFLAG_A = 4
+ARM_CPSFLAG_NONE = 16
+
+ARM_VECTORDATA_INVALID = 0
+ARM_VECTORDATA_I8 = 1
+ARM_VECTORDATA_I16 = 2
+ARM_VECTORDATA_I32 = 3
+ARM_VECTORDATA_I64 = 4
+ARM_VECTORDATA_S8 = 5
+ARM_VECTORDATA_S16 = 6
+ARM_VECTORDATA_S32 = 7
+ARM_VECTORDATA_S64 = 8
+ARM_VECTORDATA_U8 = 9
+ARM_VECTORDATA_U16 = 10
+ARM_VECTORDATA_U32 = 11
+ARM_VECTORDATA_U64 = 12
+ARM_VECTORDATA_P8 = 13
+ARM_VECTORDATA_F16 = 14
+ARM_VECTORDATA_F32 = 15
+ARM_VECTORDATA_F64 = 16
+ARM_VECTORDATA_F16F64 = 17
+ARM_VECTORDATA_F64F16 = 18
+ARM_VECTORDATA_F32F16 = 19
+ARM_VECTORDATA_F16F32 = 20
+ARM_VECTORDATA_F64F32 = 21
+ARM_VECTORDATA_F32F64 = 22
+ARM_VECTORDATA_S32F32 = 23
+ARM_VECTORDATA_U32F32 = 24
+ARM_VECTORDATA_F32S32 = 25
+ARM_VECTORDATA_F32U32 = 26
+ARM_VECTORDATA_F64S16 = 27
+ARM_VECTORDATA_F32S16 = 28
+ARM_VECTORDATA_F64S32 = 29
+ARM_VECTORDATA_S16F64 = 30
+ARM_VECTORDATA_S16F32 = 31
+ARM_VECTORDATA_S32F64 = 32
+ARM_VECTORDATA_U16F64 = 33
+ARM_VECTORDATA_U16F32 = 34
+ARM_VECTORDATA_U32F64 = 35
+ARM_VECTORDATA_F64U16 = 36
+ARM_VECTORDATA_F32U16 = 37
+ARM_VECTORDATA_F64U32 = 38
+ARM_VECTORDATA_F16U16 = 39
+ARM_VECTORDATA_U16F16 = 40
+ARM_VECTORDATA_F16U32 = 41
+ARM_VECTORDATA_U32F16 = 42
+
+ARM_REG_INVALID = 0
+ARM_REG_APSR = 1
+ARM_REG_APSR_NZCV = 2
+ARM_REG_CPSR = 3
+ARM_REG_FPEXC = 4
+ARM_REG_FPINST = 5
+ARM_REG_FPSCR = 6
+ARM_REG_FPSCR_NZCV = 7
+ARM_REG_FPSID = 8
+ARM_REG_ITSTATE = 9
+ARM_REG_LR = 10
+ARM_REG_PC = 11
+ARM_REG_SP = 12
+ARM_REG_SPSR = 13
+ARM_REG_D0 = 14
+ARM_REG_D1 = 15
+ARM_REG_D2 = 16
+ARM_REG_D3 = 17
+ARM_REG_D4 = 18
+ARM_REG_D5 = 19
+ARM_REG_D6 = 20
+ARM_REG_D7 = 21
+ARM_REG_D8 = 22
+ARM_REG_D9 = 23
+ARM_REG_D10 = 24
+ARM_REG_D11 = 25
+ARM_REG_D12 = 26
+ARM_REG_D13 = 27
+ARM_REG_D14 = 28
+ARM_REG_D15 = 29
+ARM_REG_D16 = 30
+ARM_REG_D17 = 31
+ARM_REG_D18 = 32
+ARM_REG_D19 = 33
+ARM_REG_D20 = 34
+ARM_REG_D21 = 35
+ARM_REG_D22 = 36
+ARM_REG_D23 = 37
+ARM_REG_D24 = 38
+ARM_REG_D25 = 39
+ARM_REG_D26 = 40
+ARM_REG_D27 = 41
+ARM_REG_D28 = 42
+ARM_REG_D29 = 43
+ARM_REG_D30 = 44
+ARM_REG_D31 = 45
+ARM_REG_FPINST2 = 46
+ARM_REG_MVFR0 = 47
+ARM_REG_MVFR1 = 48
+ARM_REG_MVFR2 = 49
+ARM_REG_Q0 = 50
+ARM_REG_Q1 = 51
+ARM_REG_Q2 = 52
+ARM_REG_Q3 = 53
+ARM_REG_Q4 = 54
+ARM_REG_Q5 = 55
+ARM_REG_Q6 = 56
+ARM_REG_Q7 = 57
+ARM_REG_Q8 = 58
+ARM_REG_Q9 = 59
+ARM_REG_Q10 = 60
+ARM_REG_Q11 = 61
+ARM_REG_Q12 = 62
+ARM_REG_Q13 = 63
+ARM_REG_Q14 = 64
+ARM_REG_Q15 = 65
+ARM_REG_R0 = 66
+ARM_REG_R1 = 67
+ARM_REG_R2 = 68
+ARM_REG_R3 = 69
+ARM_REG_R4 = 70
+ARM_REG_R5 = 71
+ARM_REG_R6 = 72
+ARM_REG_R7 = 73
+ARM_REG_R8 = 74
+ARM_REG_R9 = 75
+ARM_REG_R10 = 76
+ARM_REG_R11 = 77
+ARM_REG_R12 = 78
+ARM_REG_S0 = 79
+ARM_REG_S1 = 80
+ARM_REG_S2 = 81
+ARM_REG_S3 = 82
+ARM_REG_S4 = 83
+ARM_REG_S5 = 84
+ARM_REG_S6 = 85
+ARM_REG_S7 = 86
+ARM_REG_S8 = 87
+ARM_REG_S9 = 88
+ARM_REG_S10 = 89
+ARM_REG_S11 = 90
+ARM_REG_S12 = 91
+ARM_REG_S13 = 92
+ARM_REG_S14 = 93
+ARM_REG_S15 = 94
+ARM_REG_S16 = 95
+ARM_REG_S17 = 96
+ARM_REG_S18 = 97
+ARM_REG_S19 = 98
+ARM_REG_S20 = 99
+ARM_REG_S21 = 100
+ARM_REG_S22 = 101
+ARM_REG_S23 = 102
+ARM_REG_S24 = 103
+ARM_REG_S25 = 104
+ARM_REG_S26 = 105
+ARM_REG_S27 = 106
+ARM_REG_S28 = 107
+ARM_REG_S29 = 108
+ARM_REG_S30 = 109
+ARM_REG_S31 = 110
+ARM_REG_ENDING = 111
+ARM_REG_R13 = ARM_REG_SP
+ARM_REG_R14 = ARM_REG_LR
+ARM_REG_R15 = ARM_REG_PC
+ARM_REG_SB = ARM_REG_R9
+ARM_REG_SL = ARM_REG_R10
+ARM_REG_FP = ARM_REG_R11
+ARM_REG_IP = ARM_REG_R12
+
+ARM_INS_INVALID = 0
+ARM_INS_ADC = 1
+ARM_INS_ADD = 2
+ARM_INS_ADDW = 3
+ARM_INS_ADR = 4
+ARM_INS_AESD = 5
+ARM_INS_AESE = 6
+ARM_INS_AESIMC = 7
+ARM_INS_AESMC = 8
+ARM_INS_AND = 9
+ARM_INS_ASR = 10
+ARM_INS_B = 11
+ARM_INS_BFC = 12
+ARM_INS_BFI = 13
+ARM_INS_BIC = 14
+ARM_INS_BKPT = 15
+ARM_INS_BL = 16
+ARM_INS_BLX = 17
+ARM_INS_BLXNS = 18
+ARM_INS_BX = 19
+ARM_INS_BXJ = 20
+ARM_INS_BXNS = 21
+ARM_INS_CBNZ = 22
+ARM_INS_CBZ = 23
+ARM_INS_CDP = 24
+ARM_INS_CDP2 = 25
+ARM_INS_CLREX = 26
+ARM_INS_CLZ = 27
+ARM_INS_CMN = 28
+ARM_INS_CMP = 29
+ARM_INS_CPS = 30
+ARM_INS_CRC32B = 31
+ARM_INS_CRC32CB = 32
+ARM_INS_CRC32CH = 33
+ARM_INS_CRC32CW = 34
+ARM_INS_CRC32H = 35
+ARM_INS_CRC32W = 36
+ARM_INS_CSDB = 37
+ARM_INS_DBG = 38
+ARM_INS_DCPS1 = 39
+ARM_INS_DCPS2 = 40
+ARM_INS_DCPS3 = 41
+ARM_INS_DFB = 42
+ARM_INS_DMB = 43
+ARM_INS_DSB = 44
+ARM_INS_EOR = 45
+ARM_INS_ERET = 46
+ARM_INS_ESB = 47
+ARM_INS_FADDD = 48
+ARM_INS_FADDS = 49
+ARM_INS_FCMPZD = 50
+ARM_INS_FCMPZS = 51
+ARM_INS_FCONSTD = 52
+ARM_INS_FCONSTS = 53
+ARM_INS_FLDMDBX = 54
+ARM_INS_FLDMIAX = 55
+ARM_INS_FMDHR = 56
+ARM_INS_FMDLR = 57
+ARM_INS_FMSTAT = 58
+ARM_INS_FSTMDBX = 59
+ARM_INS_FSTMIAX = 60
+ARM_INS_FSUBD = 61
+ARM_INS_FSUBS = 62
+ARM_INS_HINT = 63
+ARM_INS_HLT = 64
+ARM_INS_HVC = 65
+ARM_INS_ISB = 66
+ARM_INS_IT = 67
+ARM_INS_LDA = 68
+ARM_INS_LDAB = 69
+ARM_INS_LDAEX = 70
+ARM_INS_LDAEXB = 71
+ARM_INS_LDAEXD = 72
+ARM_INS_LDAEXH = 73
+ARM_INS_LDAH = 74
+ARM_INS_LDC = 75
+ARM_INS_LDC2 = 76
+ARM_INS_LDC2L = 77
+ARM_INS_LDCL = 78
+ARM_INS_LDM = 79
+ARM_INS_LDMDA = 80
+ARM_INS_LDMDB = 81
+ARM_INS_LDMIB = 82
+ARM_INS_LDR = 83
+ARM_INS_LDRB = 84
+ARM_INS_LDRBT = 85
+ARM_INS_LDRD = 86
+ARM_INS_LDREX = 87
+ARM_INS_LDREXB = 88
+ARM_INS_LDREXD = 89
+ARM_INS_LDREXH = 90
+ARM_INS_LDRH = 91
+ARM_INS_LDRHT = 92
+ARM_INS_LDRSB = 93
+ARM_INS_LDRSBT = 94
+ARM_INS_LDRSH = 95
+ARM_INS_LDRSHT = 96
+ARM_INS_LDRT = 97
+ARM_INS_LSL = 98
+ARM_INS_LSR = 99
+ARM_INS_MCR = 100
+ARM_INS_MCR2 = 101
+ARM_INS_MCRR = 102
+ARM_INS_MCRR2 = 103
+ARM_INS_MLA = 104
+ARM_INS_MLS = 105
+ARM_INS_MOV = 106
+ARM_INS_MOVS = 107
+ARM_INS_MOVT = 108
+ARM_INS_MOVW = 109
+ARM_INS_MRC = 110
+ARM_INS_MRC2 = 111
+ARM_INS_MRRC = 112
+ARM_INS_MRRC2 = 113
+ARM_INS_MRS = 114
+ARM_INS_MSR = 115
+ARM_INS_MUL = 116
+ARM_INS_MVN = 117
+ARM_INS_NEG = 118
+ARM_INS_NOP = 119
+ARM_INS_ORN = 120
+ARM_INS_ORR = 121
+ARM_INS_PKHBT = 122
+ARM_INS_PKHTB = 123
+ARM_INS_PLD = 124
+ARM_INS_PLDW = 125
+ARM_INS_PLI = 126
+ARM_INS_POP = 127
+ARM_INS_PUSH = 128
+ARM_INS_QADD = 129
+ARM_INS_QADD16 = 130
+ARM_INS_QADD8 = 131
+ARM_INS_QASX = 132
+ARM_INS_QDADD = 133
+ARM_INS_QDSUB = 134
+ARM_INS_QSAX = 135
+ARM_INS_QSUB = 136
+ARM_INS_QSUB16 = 137
+ARM_INS_QSUB8 = 138
+ARM_INS_RBIT = 139
+ARM_INS_REV = 140
+ARM_INS_REV16 = 141
+ARM_INS_REVSH = 142
+ARM_INS_RFEDA = 143
+ARM_INS_RFEDB = 144
+ARM_INS_RFEIA = 145
+ARM_INS_RFEIB = 146
+ARM_INS_ROR = 147
+ARM_INS_RRX = 148
+ARM_INS_RSB = 149
+ARM_INS_RSC = 150
+ARM_INS_SADD16 = 151
+ARM_INS_SADD8 = 152
+ARM_INS_SASX = 153
+ARM_INS_SBC = 154
+ARM_INS_SBFX = 155
+ARM_INS_SDIV = 156
+ARM_INS_SEL = 157
+ARM_INS_SETEND = 158
+ARM_INS_SETPAN = 159
+ARM_INS_SEV = 160
+ARM_INS_SEVL = 161
+ARM_INS_SG = 162
+ARM_INS_SHA1C = 163
+ARM_INS_SHA1H = 164
+ARM_INS_SHA1M = 165
+ARM_INS_SHA1P = 166
+ARM_INS_SHA1SU0 = 167
+ARM_INS_SHA1SU1 = 168
+ARM_INS_SHA256H = 169
+ARM_INS_SHA256H2 = 170
+ARM_INS_SHA256SU0 = 171
+ARM_INS_SHA256SU1 = 172
+ARM_INS_SHADD16 = 173
+ARM_INS_SHADD8 = 174
+ARM_INS_SHASX = 175
+ARM_INS_SHSAX = 176
+ARM_INS_SHSUB16 = 177
+ARM_INS_SHSUB8 = 178
+ARM_INS_SMC = 179
+ARM_INS_SMLABB = 180
+ARM_INS_SMLABT = 181
+ARM_INS_SMLAD = 182
+ARM_INS_SMLADX = 183
+ARM_INS_SMLAL = 184
+ARM_INS_SMLALBB = 185
+ARM_INS_SMLALBT = 186
+ARM_INS_SMLALD = 187
+ARM_INS_SMLALDX = 188
+ARM_INS_SMLALTB = 189
+ARM_INS_SMLALTT = 190
+ARM_INS_SMLATB = 191
+ARM_INS_SMLATT = 192
+ARM_INS_SMLAWB = 193
+ARM_INS_SMLAWT = 194
+ARM_INS_SMLSD = 195
+ARM_INS_SMLSDX = 196
+ARM_INS_SMLSLD = 197
+ARM_INS_SMLSLDX = 198
+ARM_INS_SMMLA = 199
+ARM_INS_SMMLAR = 200
+ARM_INS_SMMLS = 201
+ARM_INS_SMMLSR = 202
+ARM_INS_SMMUL = 203
+ARM_INS_SMMULR = 204
+ARM_INS_SMUAD = 205
+ARM_INS_SMUADX = 206
+ARM_INS_SMULBB = 207
+ARM_INS_SMULBT = 208
+ARM_INS_SMULL = 209
+ARM_INS_SMULTB = 210
+ARM_INS_SMULTT = 211
+ARM_INS_SMULWB = 212
+ARM_INS_SMULWT = 213
+ARM_INS_SMUSD = 214
+ARM_INS_SMUSDX = 215
+ARM_INS_SRSDA = 216
+ARM_INS_SRSDB = 217
+ARM_INS_SRSIA = 218
+ARM_INS_SRSIB = 219
+ARM_INS_SSAT = 220
+ARM_INS_SSAT16 = 221
+ARM_INS_SSAX = 222
+ARM_INS_SSUB16 = 223
+ARM_INS_SSUB8 = 224
+ARM_INS_STC = 225
+ARM_INS_STC2 = 226
+ARM_INS_STC2L = 227
+ARM_INS_STCL = 228
+ARM_INS_STL = 229
+ARM_INS_STLB = 230
+ARM_INS_STLEX = 231
+ARM_INS_STLEXB = 232
+ARM_INS_STLEXD = 233
+ARM_INS_STLEXH = 234
+ARM_INS_STLH = 235
+ARM_INS_STM = 236
+ARM_INS_STMDA = 237
+ARM_INS_STMDB = 238
+ARM_INS_STMIB = 239
+ARM_INS_STR = 240
+ARM_INS_STRB = 241
+ARM_INS_STRBT = 242
+ARM_INS_STRD = 243
+ARM_INS_STREX = 244
+ARM_INS_STREXB = 245
+ARM_INS_STREXD = 246
+ARM_INS_STREXH = 247
+ARM_INS_STRH = 248
+ARM_INS_STRHT = 249
+ARM_INS_STRT = 250
+ARM_INS_SUB = 251
+ARM_INS_SUBS = 252
+ARM_INS_SUBW = 253
+ARM_INS_SVC = 254
+ARM_INS_SWP = 255
+ARM_INS_SWPB = 256
+ARM_INS_SXTAB = 257
+ARM_INS_SXTAB16 = 258
+ARM_INS_SXTAH = 259
+ARM_INS_SXTB = 260
+ARM_INS_SXTB16 = 261
+ARM_INS_SXTH = 262
+ARM_INS_TBB = 263
+ARM_INS_TBH = 264
+ARM_INS_TEQ = 265
+ARM_INS_TRAP = 266
+ARM_INS_TSB = 267
+ARM_INS_TST = 268
+ARM_INS_TT = 269
+ARM_INS_TTA = 270
+ARM_INS_TTAT = 271
+ARM_INS_TTT = 272
+ARM_INS_UADD16 = 273
+ARM_INS_UADD8 = 274
+ARM_INS_UASX = 275
+ARM_INS_UBFX = 276
+ARM_INS_UDF = 277
+ARM_INS_UDIV = 278
+ARM_INS_UHADD16 = 279
+ARM_INS_UHADD8 = 280
+ARM_INS_UHASX = 281
+ARM_INS_UHSAX = 282
+ARM_INS_UHSUB16 = 283
+ARM_INS_UHSUB8 = 284
+ARM_INS_UMAAL = 285
+ARM_INS_UMLAL = 286
+ARM_INS_UMULL = 287
+ARM_INS_UQADD16 = 288
+ARM_INS_UQADD8 = 289
+ARM_INS_UQASX = 290
+ARM_INS_UQSAX = 291
+ARM_INS_UQSUB16 = 292
+ARM_INS_UQSUB8 = 293
+ARM_INS_USAD8 = 294
+ARM_INS_USADA8 = 295
+ARM_INS_USAT = 296
+ARM_INS_USAT16 = 297
+ARM_INS_USAX = 298
+ARM_INS_USUB16 = 299
+ARM_INS_USUB8 = 300
+ARM_INS_UXTAB = 301
+ARM_INS_UXTAB16 = 302
+ARM_INS_UXTAH = 303
+ARM_INS_UXTB = 304
+ARM_INS_UXTB16 = 305
+ARM_INS_UXTH = 306
+ARM_INS_VABA = 307
+ARM_INS_VABAL = 308
+ARM_INS_VABD = 309
+ARM_INS_VABDL = 310
+ARM_INS_VABS = 311
+ARM_INS_VACGE = 312
+ARM_INS_VACGT = 313
+ARM_INS_VACLE = 314
+ARM_INS_VACLT = 315
+ARM_INS_VADD = 316
+ARM_INS_VADDHN = 317
+ARM_INS_VADDL = 318
+ARM_INS_VADDW = 319
+ARM_INS_VAND = 320
+ARM_INS_VBIC = 321
+ARM_INS_VBIF = 322
+ARM_INS_VBIT = 323
+ARM_INS_VBSL = 324
+ARM_INS_VCADD = 325
+ARM_INS_VCEQ = 326
+ARM_INS_VCGE = 327
+ARM_INS_VCGT = 328
+ARM_INS_VCLE = 329
+ARM_INS_VCLS = 330
+ARM_INS_VCLT = 331
+ARM_INS_VCLZ = 332
+ARM_INS_VCMLA = 333
+ARM_INS_VCMP = 334
+ARM_INS_VCMPE = 335
+ARM_INS_VCNT = 336
+ARM_INS_VCVT = 337
+ARM_INS_VCVTA = 338
+ARM_INS_VCVTB = 339
+ARM_INS_VCVTM = 340
+ARM_INS_VCVTN = 341
+ARM_INS_VCVTP = 342
+ARM_INS_VCVTR = 343
+ARM_INS_VCVTT = 344
+ARM_INS_VDIV = 345
+ARM_INS_VDUP = 346
+ARM_INS_VEOR = 347
+ARM_INS_VEXT = 348
+ARM_INS_VFMA = 349
+ARM_INS_VFMS = 350
+ARM_INS_VFNMA = 351
+ARM_INS_VFNMS = 352
+ARM_INS_VHADD = 353
+ARM_INS_VHSUB = 354
+ARM_INS_VINS = 355
+ARM_INS_VJCVT = 356
+ARM_INS_VLD1 = 357
+ARM_INS_VLD2 = 358
+ARM_INS_VLD3 = 359
+ARM_INS_VLD4 = 360
+ARM_INS_VLDMDB = 361
+ARM_INS_VLDMIA = 362
+ARM_INS_VLDR = 363
+ARM_INS_VLLDM = 364
+ARM_INS_VLSTM = 365
+ARM_INS_VMAX = 366
+ARM_INS_VMAXNM = 367
+ARM_INS_VMIN = 368
+ARM_INS_VMINNM = 369
+ARM_INS_VMLA = 370
+ARM_INS_VMLAL = 371
+ARM_INS_VMLS = 372
+ARM_INS_VMLSL = 373
+ARM_INS_VMOV = 374
+ARM_INS_VMOVL = 375
+ARM_INS_VMOVN = 376
+ARM_INS_VMOVX = 377
+ARM_INS_VMRS = 378
+ARM_INS_VMSR = 379
+ARM_INS_VMUL = 380
+ARM_INS_VMULL = 381
+ARM_INS_VMVN = 382
+ARM_INS_VNEG = 383
+ARM_INS_VNMLA = 384
+ARM_INS_VNMLS = 385
+ARM_INS_VNMUL = 386
+ARM_INS_VORN = 387
+ARM_INS_VORR = 388
+ARM_INS_VPADAL = 389
+ARM_INS_VPADD = 390
+ARM_INS_VPADDL = 391
+ARM_INS_VPMAX = 392
+ARM_INS_VPMIN = 393
+ARM_INS_VPOP = 394
+ARM_INS_VPUSH = 395
+ARM_INS_VQABS = 396
+ARM_INS_VQADD = 397
+ARM_INS_VQDMLAL = 398
+ARM_INS_VQDMLSL = 399
+ARM_INS_VQDMULH = 400
+ARM_INS_VQDMULL = 401
+ARM_INS_VQMOVN = 402
+ARM_INS_VQMOVUN = 403
+ARM_INS_VQNEG = 404
+ARM_INS_VQRDMLAH = 405
+ARM_INS_VQRDMLSH = 406
+ARM_INS_VQRDMULH = 407
+ARM_INS_VQRSHL = 408
+ARM_INS_VQRSHRN = 409
+ARM_INS_VQRSHRUN = 410
+ARM_INS_VQSHL = 411
+ARM_INS_VQSHLU = 412
+ARM_INS_VQSHRN = 413
+ARM_INS_VQSHRUN = 414
+ARM_INS_VQSUB = 415
+ARM_INS_VRADDHN = 416
+ARM_INS_VRECPE = 417
+ARM_INS_VRECPS = 418
+ARM_INS_VREV16 = 419
+ARM_INS_VREV32 = 420
+ARM_INS_VREV64 = 421
+ARM_INS_VRHADD = 422
+ARM_INS_VRINTA = 423
+ARM_INS_VRINTM = 424
+ARM_INS_VRINTN = 425
+ARM_INS_VRINTP = 426
+ARM_INS_VRINTR = 427
+ARM_INS_VRINTX = 428
+ARM_INS_VRINTZ = 429
+ARM_INS_VRSHL = 430
+ARM_INS_VRSHR = 431
+ARM_INS_VRSHRN = 432
+ARM_INS_VRSQRTE = 433
+ARM_INS_VRSQRTS = 434
+ARM_INS_VRSRA = 435
+ARM_INS_VRSUBHN = 436
+ARM_INS_VSDOT = 437
+ARM_INS_VSELEQ = 438
+ARM_INS_VSELGE = 439
+ARM_INS_VSELGT = 440
+ARM_INS_VSELVS = 441
+ARM_INS_VSHL = 442
+ARM_INS_VSHLL = 443
+ARM_INS_VSHR = 444
+ARM_INS_VSHRN = 445
+ARM_INS_VSLI = 446
+ARM_INS_VSQRT = 447
+ARM_INS_VSRA = 448
+ARM_INS_VSRI = 449
+ARM_INS_VST1 = 450
+ARM_INS_VST2 = 451
+ARM_INS_VST3 = 452
+ARM_INS_VST4 = 453
+ARM_INS_VSTMDB = 454
+ARM_INS_VSTMIA = 455
+ARM_INS_VSTR = 456
+ARM_INS_VSUB = 457
+ARM_INS_VSUBHN = 458
+ARM_INS_VSUBL = 459
+ARM_INS_VSUBW = 460
+ARM_INS_VSWP = 461
+ARM_INS_VTBL = 462
+ARM_INS_VTBX = 463
+ARM_INS_VTRN = 464
+ARM_INS_VTST = 465
+ARM_INS_VUDOT = 466
+ARM_INS_VUZP = 467
+ARM_INS_VZIP = 468
+ARM_INS_WFE = 469
+ARM_INS_WFI = 470
+ARM_INS_YIELD = 471
+ARM_INS_ENDING = 472
+
+ARM_GRP_INVALID = 0
+ARM_GRP_JUMP = 1
+ARM_GRP_CALL = 2
+ARM_GRP_INT = 4
+ARM_GRP_PRIVILEGE = 6
+ARM_GRP_BRANCH_RELATIVE = 7
+ARM_GRP_CRYPTO = 128
+ARM_GRP_DATABARRIER = 129
+ARM_GRP_DIVIDE = 130
+ARM_GRP_FPARMV8 = 131
+ARM_GRP_MULTPRO = 132
+ARM_GRP_NEON = 133
+ARM_GRP_T2EXTRACTPACK = 134
+ARM_GRP_THUMB2DSP = 135
+ARM_GRP_TRUSTZONE = 136
+ARM_GRP_V4T = 137
+ARM_GRP_V5T = 138
+ARM_GRP_V5TE = 139
+ARM_GRP_V6 = 140
+ARM_GRP_V6T2 = 141
+ARM_GRP_V7 = 142
+ARM_GRP_V8 = 143
+ARM_GRP_VFP2 = 144
+ARM_GRP_VFP3 = 145
+ARM_GRP_VFP4 = 146
+ARM_GRP_ARM = 147
+ARM_GRP_MCLASS = 148
+ARM_GRP_NOTMCLASS = 149
+ARM_GRP_THUMB = 150
+ARM_GRP_THUMB1ONLY = 151
+ARM_GRP_THUMB2 = 152
+ARM_GRP_PREV8 = 153
+ARM_GRP_FPVMLX = 154
+ARM_GRP_MULOPS = 155
+ARM_GRP_CRC = 156
+ARM_GRP_DPVFP = 157
+ARM_GRP_V6M = 158
+ARM_GRP_VIRTUALIZATION = 159
+ARM_GRP_ENDING = 160
diff --git a/capstone/bindings/python/capstone/bpf.py b/capstone/bindings/python/capstone/bpf.py
new file mode 100644
index 000000000..d6263bd3e
--- /dev/null
+++ b/capstone/bindings/python/capstone/bpf.py
@@ -0,0 +1,69 @@
+# Capstone Python bindings
+# BPF by david942j <david942j@gmail.com>, 2019
+
+import ctypes
+from . import copy_ctypes_list
+from .bpf_const import *
+
+class BPFOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('disp', ctypes.c_int32),
+    )
+
+class BPFOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint8),
+        ('imm', ctypes.c_uint64),
+        ('off', ctypes.c_uint32),
+        ('mem', BPFOpMem),
+        ('mmem', ctypes.c_uint32),
+        ('msh', ctypes.c_uint32),
+        ('ext', ctypes.c_uint32),
+    )
+
+class BPFOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', BPFOpValue),
+        ('access', ctypes.c_uint8),
+    )
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def off(self):
+        return self.value.off
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def mmem(self):
+        return self.value.mmem
+
+    @property
+    def msh(self):
+        return self.value.msh
+
+    @property
+    def ext(self):
+        return self.value.ext
+
+
+class CsBPF(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', BPFOp * 4),
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/bpf_const.py b/capstone/bindings/python/capstone/bpf_const.py
new file mode 100644
index 000000000..51dadb42c
--- /dev/null
+++ b/capstone/bindings/python/capstone/bpf_const.py
@@ -0,0 +1,113 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [bpf_const.py]
+
+BPF_OP_INVALID = 0
+BPF_OP_REG = 1
+BPF_OP_IMM = 2
+BPF_OP_OFF = 3
+BPF_OP_MEM = 4
+BPF_OP_MMEM = 5
+BPF_OP_MSH = 6
+BPF_OP_EXT = 7
+
+BPF_REG_INVALID = 0
+BPF_REG_A = 1
+BPF_REG_X = 2
+BPF_REG_R0 = 3
+BPF_REG_R1 = 4
+BPF_REG_R2 = 5
+BPF_REG_R3 = 6
+BPF_REG_R4 = 7
+BPF_REG_R5 = 8
+BPF_REG_R6 = 9
+BPF_REG_R7 = 10
+BPF_REG_R8 = 11
+BPF_REG_R9 = 12
+BPF_REG_R10 = 13
+BPF_REG_ENDING = 14
+
+BPF_EXT_INVALID = 0
+BPF_EXT_LEN = 1
+
+BPF_INS_INVALID = 0
+BPF_INS_ADD = 1
+BPF_INS_SUB = 2
+BPF_INS_MUL = 3
+BPF_INS_DIV = 4
+BPF_INS_OR = 5
+BPF_INS_AND = 6
+BPF_INS_LSH = 7
+BPF_INS_RSH = 8
+BPF_INS_NEG = 9
+BPF_INS_MOD = 10
+BPF_INS_XOR = 11
+BPF_INS_MOV = 12
+BPF_INS_ARSH = 13
+BPF_INS_ADD64 = 14
+BPF_INS_SUB64 = 15
+BPF_INS_MUL64 = 16
+BPF_INS_DIV64 = 17
+BPF_INS_OR64 = 18
+BPF_INS_AND64 = 19
+BPF_INS_LSH64 = 20
+BPF_INS_RSH64 = 21
+BPF_INS_NEG64 = 22
+BPF_INS_MOD64 = 23
+BPF_INS_XOR64 = 24
+BPF_INS_MOV64 = 25
+BPF_INS_ARSH64 = 26
+BPF_INS_LE16 = 27
+BPF_INS_LE32 = 28
+BPF_INS_LE64 = 29
+BPF_INS_BE16 = 30
+BPF_INS_BE32 = 31
+BPF_INS_BE64 = 32
+BPF_INS_LDW = 33
+BPF_INS_LDH = 34
+BPF_INS_LDB = 35
+BPF_INS_LDDW = 36
+BPF_INS_LDXW = 37
+BPF_INS_LDXH = 38
+BPF_INS_LDXB = 39
+BPF_INS_LDXDW = 40
+BPF_INS_STW = 41
+BPF_INS_STH = 42
+BPF_INS_STB = 43
+BPF_INS_STDW = 44
+BPF_INS_STXW = 45
+BPF_INS_STXH = 46
+BPF_INS_STXB = 47
+BPF_INS_STXDW = 48
+BPF_INS_XADDW = 49
+BPF_INS_XADDDW = 50
+BPF_INS_JMP = 51
+BPF_INS_JEQ = 52
+BPF_INS_JGT = 53
+BPF_INS_JGE = 54
+BPF_INS_JSET = 55
+BPF_INS_JNE = 56
+BPF_INS_JSGT = 57
+BPF_INS_JSGE = 58
+BPF_INS_CALL = 59
+BPF_INS_EXIT = 60
+BPF_INS_JLT = 61
+BPF_INS_JLE = 62
+BPF_INS_JSLT = 63
+BPF_INS_JSLE = 64
+BPF_INS_RET = 65
+BPF_INS_TAX = 66
+BPF_INS_TXA = 67
+BPF_INS_ENDING = 68
+BPF_INS_LD = BPF_INS_LDW
+BPF_INS_LDX = BPF_INS_LDXW
+BPF_INS_ST = BPF_INS_STW
+BPF_INS_STX = BPF_INS_STXW
+
+BPF_GRP_INVALID = 0
+BPF_GRP_LOAD = 1
+BPF_GRP_STORE = 2
+BPF_GRP_ALU = 3
+BPF_GRP_JUMP = 4
+BPF_GRP_CALL = 5
+BPF_GRP_RETURN = 6
+BPF_GRP_MISC = 7
+BPF_GRP_ENDING = 8
diff --git a/capstone/bindings/python/capstone/evm.py b/capstone/bindings/python/capstone/evm.py
new file mode 100644
index 000000000..5ddec6aba
--- /dev/null
+++ b/capstone/bindings/python/capstone/evm.py
@@ -0,0 +1,17 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .evm_const import *
+
+# define the API
+class CsEvm(ctypes.Structure):
+    _fields_ = (
+        ('pop', ctypes.c_byte),
+        ('push', ctypes.c_byte),
+        ('fee', ctypes.c_uint),
+    )
+
+def get_arch_info(a):
+    return (a.pop, a.push, a.fee)
+
diff --git a/capstone/bindings/python/capstone/evm_const.py b/capstone/bindings/python/capstone/evm_const.py
new file mode 100644
index 000000000..6bd0e5af3
--- /dev/null
+++ b/capstone/bindings/python/capstone/evm_const.py
@@ -0,0 +1,151 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.py]
+
+EVM_INS_STOP = 0
+EVM_INS_ADD = 1
+EVM_INS_MUL = 2
+EVM_INS_SUB = 3
+EVM_INS_DIV = 4
+EVM_INS_SDIV = 5
+EVM_INS_MOD = 6
+EVM_INS_SMOD = 7
+EVM_INS_ADDMOD = 8
+EVM_INS_MULMOD = 9
+EVM_INS_EXP = 10
+EVM_INS_SIGNEXTEND = 11
+EVM_INS_LT = 16
+EVM_INS_GT = 17
+EVM_INS_SLT = 18
+EVM_INS_SGT = 19
+EVM_INS_EQ = 20
+EVM_INS_ISZERO = 21
+EVM_INS_AND = 22
+EVM_INS_OR = 23
+EVM_INS_XOR = 24
+EVM_INS_NOT = 25
+EVM_INS_BYTE = 26
+EVM_INS_SHA3 = 32
+EVM_INS_ADDRESS = 48
+EVM_INS_BALANCE = 49
+EVM_INS_ORIGIN = 50
+EVM_INS_CALLER = 51
+EVM_INS_CALLVALUE = 52
+EVM_INS_CALLDATALOAD = 53
+EVM_INS_CALLDATASIZE = 54
+EVM_INS_CALLDATACOPY = 55
+EVM_INS_CODESIZE = 56
+EVM_INS_CODECOPY = 57
+EVM_INS_GASPRICE = 58
+EVM_INS_EXTCODESIZE = 59
+EVM_INS_EXTCODECOPY = 60
+EVM_INS_RETURNDATASIZE = 61
+EVM_INS_RETURNDATACOPY = 62
+EVM_INS_BLOCKHASH = 64
+EVM_INS_COINBASE = 65
+EVM_INS_TIMESTAMP = 66
+EVM_INS_NUMBER = 67
+EVM_INS_DIFFICULTY = 68
+EVM_INS_GASLIMIT = 69
+EVM_INS_POP = 80
+EVM_INS_MLOAD = 81
+EVM_INS_MSTORE = 82
+EVM_INS_MSTORE8 = 83
+EVM_INS_SLOAD = 84
+EVM_INS_SSTORE = 85
+EVM_INS_JUMP = 86
+EVM_INS_JUMPI = 87
+EVM_INS_PC = 88
+EVM_INS_MSIZE = 89
+EVM_INS_GAS = 90
+EVM_INS_JUMPDEST = 91
+EVM_INS_PUSH1 = 96
+EVM_INS_PUSH2 = 97
+EVM_INS_PUSH3 = 98
+EVM_INS_PUSH4 = 99
+EVM_INS_PUSH5 = 100
+EVM_INS_PUSH6 = 101
+EVM_INS_PUSH7 = 102
+EVM_INS_PUSH8 = 103
+EVM_INS_PUSH9 = 104
+EVM_INS_PUSH10 = 105
+EVM_INS_PUSH11 = 106
+EVM_INS_PUSH12 = 107
+EVM_INS_PUSH13 = 108
+EVM_INS_PUSH14 = 109
+EVM_INS_PUSH15 = 110
+EVM_INS_PUSH16 = 111
+EVM_INS_PUSH17 = 112
+EVM_INS_PUSH18 = 113
+EVM_INS_PUSH19 = 114
+EVM_INS_PUSH20 = 115
+EVM_INS_PUSH21 = 116
+EVM_INS_PUSH22 = 117
+EVM_INS_PUSH23 = 118
+EVM_INS_PUSH24 = 119
+EVM_INS_PUSH25 = 120
+EVM_INS_PUSH26 = 121
+EVM_INS_PUSH27 = 122
+EVM_INS_PUSH28 = 123
+EVM_INS_PUSH29 = 124
+EVM_INS_PUSH30 = 125
+EVM_INS_PUSH31 = 126
+EVM_INS_PUSH32 = 127
+EVM_INS_DUP1 = 128
+EVM_INS_DUP2 = 129
+EVM_INS_DUP3 = 130
+EVM_INS_DUP4 = 131
+EVM_INS_DUP5 = 132
+EVM_INS_DUP6 = 133
+EVM_INS_DUP7 = 134
+EVM_INS_DUP8 = 135
+EVM_INS_DUP9 = 136
+EVM_INS_DUP10 = 137
+EVM_INS_DUP11 = 138
+EVM_INS_DUP12 = 139
+EVM_INS_DUP13 = 140
+EVM_INS_DUP14 = 141
+EVM_INS_DUP15 = 142
+EVM_INS_DUP16 = 143
+EVM_INS_SWAP1 = 144
+EVM_INS_SWAP2 = 145
+EVM_INS_SWAP3 = 146
+EVM_INS_SWAP4 = 147
+EVM_INS_SWAP5 = 148
+EVM_INS_SWAP6 = 149
+EVM_INS_SWAP7 = 150
+EVM_INS_SWAP8 = 151
+EVM_INS_SWAP9 = 152
+EVM_INS_SWAP10 = 153
+EVM_INS_SWAP11 = 154
+EVM_INS_SWAP12 = 155
+EVM_INS_SWAP13 = 156
+EVM_INS_SWAP14 = 157
+EVM_INS_SWAP15 = 158
+EVM_INS_SWAP16 = 159
+EVM_INS_LOG0 = 160
+EVM_INS_LOG1 = 161
+EVM_INS_LOG2 = 162
+EVM_INS_LOG3 = 163
+EVM_INS_LOG4 = 164
+EVM_INS_CREATE = 240
+EVM_INS_CALL = 241
+EVM_INS_CALLCODE = 242
+EVM_INS_RETURN = 243
+EVM_INS_DELEGATECALL = 244
+EVM_INS_CALLBLACKBOX = 245
+EVM_INS_STATICCALL = 250
+EVM_INS_REVERT = 253
+EVM_INS_SUICIDE = 255
+EVM_INS_INVALID = 512
+EVM_INS_ENDING = 513
+
+EVM_GRP_INVALID = 0
+EVM_GRP_JUMP = 1
+EVM_GRP_MATH = 8
+EVM_GRP_STACK_WRITE = 9
+EVM_GRP_STACK_READ = 10
+EVM_GRP_MEM_WRITE = 11
+EVM_GRP_MEM_READ = 12
+EVM_GRP_STORE_WRITE = 13
+EVM_GRP_STORE_READ = 14
+EVM_GRP_HALT = 15
+EVM_GRP_ENDING = 16
diff --git a/capstone/bindings/python/capstone/m680x.py b/capstone/bindings/python/capstone/m680x.py
new file mode 100644
index 000000000..dae21be45
--- /dev/null
+++ b/capstone/bindings/python/capstone/m680x.py
@@ -0,0 +1,88 @@
+# Capstone Python bindings, by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net>
+
+import ctypes
+from . import copy_ctypes_list
+from .m680x_const import *
+
+# define the API
+class M680xOpIdx(ctypes.Structure):
+    _fields_ = (
+        ('base_reg', ctypes.c_uint),
+        ('offset_reg', ctypes.c_uint),
+        ('offset', ctypes.c_int16),
+        ('offset_addr', ctypes.c_uint16),
+        ('offset_bits', ctypes.c_uint8),
+        ('inc_dec', ctypes.c_int8),
+        ('flags', ctypes.c_uint8),
+    )
+
+class M680xOpRel(ctypes.Structure):
+    _fields_ = (
+        ('address', ctypes.c_uint16),
+        ('offset', ctypes.c_int16),
+    )
+
+class M680xOpExt(ctypes.Structure):
+    _fields_ = (
+        ('address', ctypes.c_uint16),
+        ('indirect', ctypes.c_bool),
+    )
+
+class M680xOpValue(ctypes.Union):
+    _fields_ = (
+        ('imm', ctypes.c_int32),
+        ('reg', ctypes.c_uint),
+        ('idx', M680xOpIdx),
+        ('rel', M680xOpRel),
+        ('ext', M680xOpExt),
+        ('direct_addr', ctypes.c_uint8),
+        ('const_val', ctypes.c_uint8),
+    )
+
+class M680xOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', M680xOpValue),
+        ('size', ctypes.c_uint8),
+        ('access', ctypes.c_uint8),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def idx(self):
+        return self.value.idx
+
+    @property
+    def rel(self):
+        return self.value.rel
+
+    @property
+    def ext(self):
+        return self.value.ext
+
+    @property
+    def direct_addr(self):
+        return self.value.direct_addr
+
+    @property
+    def const_val(self):
+        return self.value.const_val
+
+
+class CsM680x(ctypes.Structure):
+    _fields_ = (
+        ('flags', ctypes.c_uint8),
+        ('op_count', ctypes.c_uint8),
+        ('operands', M680xOp * 9),
+    )
+
+def get_arch_info(a):
+    return (a.flags, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/m680x_const.py b/capstone/bindings/python/capstone/m680x_const.py
new file mode 100644
index 000000000..2ed71ab5d
--- /dev/null
+++ b/capstone/bindings/python/capstone/m680x_const.py
@@ -0,0 +1,415 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.py]
+M680X_OPERAND_COUNT = 9
+
+M680X_REG_INVALID = 0
+M680X_REG_A = 1
+M680X_REG_B = 2
+M680X_REG_E = 3
+M680X_REG_F = 4
+M680X_REG_0 = 5
+M680X_REG_D = 6
+M680X_REG_W = 7
+M680X_REG_CC = 8
+M680X_REG_DP = 9
+M680X_REG_MD = 10
+M680X_REG_HX = 11
+M680X_REG_H = 12
+M680X_REG_X = 13
+M680X_REG_Y = 14
+M680X_REG_S = 15
+M680X_REG_U = 16
+M680X_REG_V = 17
+M680X_REG_Q = 18
+M680X_REG_PC = 19
+M680X_REG_TMP2 = 20
+M680X_REG_TMP3 = 21
+M680X_REG_ENDING = 22
+
+M680X_OP_INVALID = 0
+M680X_OP_REGISTER = 1
+M680X_OP_IMMEDIATE = 2
+M680X_OP_INDEXED = 3
+M680X_OP_EXTENDED = 4
+M680X_OP_DIRECT = 5
+M680X_OP_RELATIVE = 6
+M680X_OP_CONSTANT = 7
+
+M680X_OFFSET_NONE = 0
+M680X_OFFSET_BITS_5 = 5
+M680X_OFFSET_BITS_8 = 8
+M680X_OFFSET_BITS_9 = 9
+M680X_OFFSET_BITS_16 = 16
+M680X_IDX_INDIRECT = 1
+M680X_IDX_NO_COMMA = 2
+M680X_IDX_POST_INC_DEC = 4
+
+M680X_GRP_INVALID = 0
+M680X_GRP_JUMP = 1
+M680X_GRP_CALL = 2
+M680X_GRP_RET = 3
+M680X_GRP_INT = 4
+M680X_GRP_IRET = 5
+M680X_GRP_PRIV = 6
+M680X_GRP_BRAREL = 7
+M680X_GRP_ENDING = 8
+M680X_FIRST_OP_IN_MNEM = 1
+M680X_SECOND_OP_IN_MNEM = 2
+
+M680X_INS_INVLD = 0
+M680X_INS_ABA = 1
+M680X_INS_ABX = 2
+M680X_INS_ABY = 3
+M680X_INS_ADC = 4
+M680X_INS_ADCA = 5
+M680X_INS_ADCB = 6
+M680X_INS_ADCD = 7
+M680X_INS_ADCR = 8
+M680X_INS_ADD = 9
+M680X_INS_ADDA = 10
+M680X_INS_ADDB = 11
+M680X_INS_ADDD = 12
+M680X_INS_ADDE = 13
+M680X_INS_ADDF = 14
+M680X_INS_ADDR = 15
+M680X_INS_ADDW = 16
+M680X_INS_AIM = 17
+M680X_INS_AIS = 18
+M680X_INS_AIX = 19
+M680X_INS_AND = 20
+M680X_INS_ANDA = 21
+M680X_INS_ANDB = 22
+M680X_INS_ANDCC = 23
+M680X_INS_ANDD = 24
+M680X_INS_ANDR = 25
+M680X_INS_ASL = 26
+M680X_INS_ASLA = 27
+M680X_INS_ASLB = 28
+M680X_INS_ASLD = 29
+M680X_INS_ASR = 30
+M680X_INS_ASRA = 31
+M680X_INS_ASRB = 32
+M680X_INS_ASRD = 33
+M680X_INS_ASRX = 34
+M680X_INS_BAND = 35
+M680X_INS_BCC = 36
+M680X_INS_BCLR = 37
+M680X_INS_BCS = 38
+M680X_INS_BEOR = 39
+M680X_INS_BEQ = 40
+M680X_INS_BGE = 41
+M680X_INS_BGND = 42
+M680X_INS_BGT = 43
+M680X_INS_BHCC = 44
+M680X_INS_BHCS = 45
+M680X_INS_BHI = 46
+M680X_INS_BIAND = 47
+M680X_INS_BIEOR = 48
+M680X_INS_BIH = 49
+M680X_INS_BIL = 50
+M680X_INS_BIOR = 51
+M680X_INS_BIT = 52
+M680X_INS_BITA = 53
+M680X_INS_BITB = 54
+M680X_INS_BITD = 55
+M680X_INS_BITMD = 56
+M680X_INS_BLE = 57
+M680X_INS_BLS = 58
+M680X_INS_BLT = 59
+M680X_INS_BMC = 60
+M680X_INS_BMI = 61
+M680X_INS_BMS = 62
+M680X_INS_BNE = 63
+M680X_INS_BOR = 64
+M680X_INS_BPL = 65
+M680X_INS_BRCLR = 66
+M680X_INS_BRSET = 67
+M680X_INS_BRA = 68
+M680X_INS_BRN = 69
+M680X_INS_BSET = 70
+M680X_INS_BSR = 71
+M680X_INS_BVC = 72
+M680X_INS_BVS = 73
+M680X_INS_CALL = 74
+M680X_INS_CBA = 75
+M680X_INS_CBEQ = 76
+M680X_INS_CBEQA = 77
+M680X_INS_CBEQX = 78
+M680X_INS_CLC = 79
+M680X_INS_CLI = 80
+M680X_INS_CLR = 81
+M680X_INS_CLRA = 82
+M680X_INS_CLRB = 83
+M680X_INS_CLRD = 84
+M680X_INS_CLRE = 85
+M680X_INS_CLRF = 86
+M680X_INS_CLRH = 87
+M680X_INS_CLRW = 88
+M680X_INS_CLRX = 89
+M680X_INS_CLV = 90
+M680X_INS_CMP = 91
+M680X_INS_CMPA = 92
+M680X_INS_CMPB = 93
+M680X_INS_CMPD = 94
+M680X_INS_CMPE = 95
+M680X_INS_CMPF = 96
+M680X_INS_CMPR = 97
+M680X_INS_CMPS = 98
+M680X_INS_CMPU = 99
+M680X_INS_CMPW = 100
+M680X_INS_CMPX = 101
+M680X_INS_CMPY = 102
+M680X_INS_COM = 103
+M680X_INS_COMA = 104
+M680X_INS_COMB = 105
+M680X_INS_COMD = 106
+M680X_INS_COME = 107
+M680X_INS_COMF = 108
+M680X_INS_COMW = 109
+M680X_INS_COMX = 110
+M680X_INS_CPD = 111
+M680X_INS_CPHX = 112
+M680X_INS_CPS = 113
+M680X_INS_CPX = 114
+M680X_INS_CPY = 115
+M680X_INS_CWAI = 116
+M680X_INS_DAA = 117
+M680X_INS_DBEQ = 118
+M680X_INS_DBNE = 119
+M680X_INS_DBNZ = 120
+M680X_INS_DBNZA = 121
+M680X_INS_DBNZX = 122
+M680X_INS_DEC = 123
+M680X_INS_DECA = 124
+M680X_INS_DECB = 125
+M680X_INS_DECD = 126
+M680X_INS_DECE = 127
+M680X_INS_DECF = 128
+M680X_INS_DECW = 129
+M680X_INS_DECX = 130
+M680X_INS_DES = 131
+M680X_INS_DEX = 132
+M680X_INS_DEY = 133
+M680X_INS_DIV = 134
+M680X_INS_DIVD = 135
+M680X_INS_DIVQ = 136
+M680X_INS_EDIV = 137
+M680X_INS_EDIVS = 138
+M680X_INS_EIM = 139
+M680X_INS_EMACS = 140
+M680X_INS_EMAXD = 141
+M680X_INS_EMAXM = 142
+M680X_INS_EMIND = 143
+M680X_INS_EMINM = 144
+M680X_INS_EMUL = 145
+M680X_INS_EMULS = 146
+M680X_INS_EOR = 147
+M680X_INS_EORA = 148
+M680X_INS_EORB = 149
+M680X_INS_EORD = 150
+M680X_INS_EORR = 151
+M680X_INS_ETBL = 152
+M680X_INS_EXG = 153
+M680X_INS_FDIV = 154
+M680X_INS_IBEQ = 155
+M680X_INS_IBNE = 156
+M680X_INS_IDIV = 157
+M680X_INS_IDIVS = 158
+M680X_INS_ILLGL = 159
+M680X_INS_INC = 160
+M680X_INS_INCA = 161
+M680X_INS_INCB = 162
+M680X_INS_INCD = 163
+M680X_INS_INCE = 164
+M680X_INS_INCF = 165
+M680X_INS_INCW = 166
+M680X_INS_INCX = 167
+M680X_INS_INS = 168
+M680X_INS_INX = 169
+M680X_INS_INY = 170
+M680X_INS_JMP = 171
+M680X_INS_JSR = 172
+M680X_INS_LBCC = 173
+M680X_INS_LBCS = 174
+M680X_INS_LBEQ = 175
+M680X_INS_LBGE = 176
+M680X_INS_LBGT = 177
+M680X_INS_LBHI = 178
+M680X_INS_LBLE = 179
+M680X_INS_LBLS = 180
+M680X_INS_LBLT = 181
+M680X_INS_LBMI = 182
+M680X_INS_LBNE = 183
+M680X_INS_LBPL = 184
+M680X_INS_LBRA = 185
+M680X_INS_LBRN = 186
+M680X_INS_LBSR = 187
+M680X_INS_LBVC = 188
+M680X_INS_LBVS = 189
+M680X_INS_LDA = 190
+M680X_INS_LDAA = 191
+M680X_INS_LDAB = 192
+M680X_INS_LDB = 193
+M680X_INS_LDBT = 194
+M680X_INS_LDD = 195
+M680X_INS_LDE = 196
+M680X_INS_LDF = 197
+M680X_INS_LDHX = 198
+M680X_INS_LDMD = 199
+M680X_INS_LDQ = 200
+M680X_INS_LDS = 201
+M680X_INS_LDU = 202
+M680X_INS_LDW = 203
+M680X_INS_LDX = 204
+M680X_INS_LDY = 205
+M680X_INS_LEAS = 206
+M680X_INS_LEAU = 207
+M680X_INS_LEAX = 208
+M680X_INS_LEAY = 209
+M680X_INS_LSL = 210
+M680X_INS_LSLA = 211
+M680X_INS_LSLB = 212
+M680X_INS_LSLD = 213
+M680X_INS_LSLX = 214
+M680X_INS_LSR = 215
+M680X_INS_LSRA = 216
+M680X_INS_LSRB = 217
+M680X_INS_LSRD = 218
+M680X_INS_LSRW = 219
+M680X_INS_LSRX = 220
+M680X_INS_MAXA = 221
+M680X_INS_MAXM = 222
+M680X_INS_MEM = 223
+M680X_INS_MINA = 224
+M680X_INS_MINM = 225
+M680X_INS_MOV = 226
+M680X_INS_MOVB = 227
+M680X_INS_MOVW = 228
+M680X_INS_MUL = 229
+M680X_INS_MULD = 230
+M680X_INS_NEG = 231
+M680X_INS_NEGA = 232
+M680X_INS_NEGB = 233
+M680X_INS_NEGD = 234
+M680X_INS_NEGX = 235
+M680X_INS_NOP = 236
+M680X_INS_NSA = 237
+M680X_INS_OIM = 238
+M680X_INS_ORA = 239
+M680X_INS_ORAA = 240
+M680X_INS_ORAB = 241
+M680X_INS_ORB = 242
+M680X_INS_ORCC = 243
+M680X_INS_ORD = 244
+M680X_INS_ORR = 245
+M680X_INS_PSHA = 246
+M680X_INS_PSHB = 247
+M680X_INS_PSHC = 248
+M680X_INS_PSHD = 249
+M680X_INS_PSHH = 250
+M680X_INS_PSHS = 251
+M680X_INS_PSHSW = 252
+M680X_INS_PSHU = 253
+M680X_INS_PSHUW = 254
+M680X_INS_PSHX = 255
+M680X_INS_PSHY = 256
+M680X_INS_PULA = 257
+M680X_INS_PULB = 258
+M680X_INS_PULC = 259
+M680X_INS_PULD = 260
+M680X_INS_PULH = 261
+M680X_INS_PULS = 262
+M680X_INS_PULSW = 263
+M680X_INS_PULU = 264
+M680X_INS_PULUW = 265
+M680X_INS_PULX = 266
+M680X_INS_PULY = 267
+M680X_INS_REV = 268
+M680X_INS_REVW = 269
+M680X_INS_ROL = 270
+M680X_INS_ROLA = 271
+M680X_INS_ROLB = 272
+M680X_INS_ROLD = 273
+M680X_INS_ROLW = 274
+M680X_INS_ROLX = 275
+M680X_INS_ROR = 276
+M680X_INS_RORA = 277
+M680X_INS_RORB = 278
+M680X_INS_RORD = 279
+M680X_INS_RORW = 280
+M680X_INS_RORX = 281
+M680X_INS_RSP = 282
+M680X_INS_RTC = 283
+M680X_INS_RTI = 284
+M680X_INS_RTS = 285
+M680X_INS_SBA = 286
+M680X_INS_SBC = 287
+M680X_INS_SBCA = 288
+M680X_INS_SBCB = 289
+M680X_INS_SBCD = 290
+M680X_INS_SBCR = 291
+M680X_INS_SEC = 292
+M680X_INS_SEI = 293
+M680X_INS_SEV = 294
+M680X_INS_SEX = 295
+M680X_INS_SEXW = 296
+M680X_INS_SLP = 297
+M680X_INS_STA = 298
+M680X_INS_STAA = 299
+M680X_INS_STAB = 300
+M680X_INS_STB = 301
+M680X_INS_STBT = 302
+M680X_INS_STD = 303
+M680X_INS_STE = 304
+M680X_INS_STF = 305
+M680X_INS_STOP = 306
+M680X_INS_STHX = 307
+M680X_INS_STQ = 308
+M680X_INS_STS = 309
+M680X_INS_STU = 310
+M680X_INS_STW = 311
+M680X_INS_STX = 312
+M680X_INS_STY = 313
+M680X_INS_SUB = 314
+M680X_INS_SUBA = 315
+M680X_INS_SUBB = 316
+M680X_INS_SUBD = 317
+M680X_INS_SUBE = 318
+M680X_INS_SUBF = 319
+M680X_INS_SUBR = 320
+M680X_INS_SUBW = 321
+M680X_INS_SWI = 322
+M680X_INS_SWI2 = 323
+M680X_INS_SWI3 = 324
+M680X_INS_SYNC = 325
+M680X_INS_TAB = 326
+M680X_INS_TAP = 327
+M680X_INS_TAX = 328
+M680X_INS_TBA = 329
+M680X_INS_TBEQ = 330
+M680X_INS_TBL = 331
+M680X_INS_TBNE = 332
+M680X_INS_TEST = 333
+M680X_INS_TFM = 334
+M680X_INS_TFR = 335
+M680X_INS_TIM = 336
+M680X_INS_TPA = 337
+M680X_INS_TST = 338
+M680X_INS_TSTA = 339
+M680X_INS_TSTB = 340
+M680X_INS_TSTD = 341
+M680X_INS_TSTE = 342
+M680X_INS_TSTF = 343
+M680X_INS_TSTW = 344
+M680X_INS_TSTX = 345
+M680X_INS_TSX = 346
+M680X_INS_TSY = 347
+M680X_INS_TXA = 348
+M680X_INS_TXS = 349
+M680X_INS_TYS = 350
+M680X_INS_WAI = 351
+M680X_INS_WAIT = 352
+M680X_INS_WAV = 353
+M680X_INS_WAVR = 354
+M680X_INS_XGDX = 355
+M680X_INS_XGDY = 356
+M680X_INS_ENDING = 357
diff --git a/capstone/bindings/python/capstone/m68k.py b/capstone/bindings/python/capstone/m68k.py
new file mode 100644
index 000000000..9cc893654
--- /dev/null
+++ b/capstone/bindings/python/capstone/m68k.py
@@ -0,0 +1,96 @@
+# Capstone Python bindings, by Nicolas PLANEL <nplanel@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .m68k_const import *
+
+# define the API
+class M68KOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base_reg', ctypes.c_uint),
+        ('index_reg', ctypes.c_uint),
+        ('in_base_reg', ctypes.c_uint),
+        ('in_disp', ctypes.c_uint),
+        ('out_disp', ctypes.c_uint),
+        ('disp', ctypes.c_short),
+        ('scale', ctypes.c_ubyte),
+        ('bitfield', ctypes.c_ubyte),
+        ('width', ctypes.c_ubyte),
+        ('offset', ctypes.c_ubyte),
+        ('index_size', ctypes.c_ubyte),
+    )
+
+class M68KOpRegPair(ctypes.Structure):
+    _fields_ = (
+        ('reg_0', ctypes.c_uint),
+        ('reg_1', ctypes.c_uint),
+    )
+
+class M68KOpValue(ctypes.Union):
+    _fields_ = (
+        ('imm', ctypes.c_int64),
+        ('dimm', ctypes.c_double),
+        ('simm', ctypes.c_float),
+        ('reg', ctypes.c_uint),
+        ('reg_pair', M68KOpRegPair),
+    )
+
+class M68KOpBrDisp(ctypes.Structure):
+    _fields_ = (
+        ('disp', ctypes.c_int),
+        ('disp_size', ctypes.c_ubyte),
+    )
+    
+class M68KOp(ctypes.Structure):
+    _fields_ = (
+        ('value', M68KOpValue),
+        ('mem', M68KOpMem),
+        ('br_disp', M68KOpBrDisp),
+        ('register_bits', ctypes.c_uint),
+        ('type', ctypes.c_uint),
+        ('address_mode', ctypes.c_uint),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def dimm(self):
+        return self.value.dimm
+
+    @property
+    def simm(self):
+        return self.value.simm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.mem
+
+    @property
+    def register_bits(self):
+        return self.register_bits
+
+class M68KOpSize(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('size', ctypes.c_uint),
+    )
+
+    def get(a):
+        return copy_ctypes_list(type, size)
+
+class CsM68K(ctypes.Structure):
+    M68K_OPERAND_COUNT = 4
+    _fields_ = (
+        ('operands', M68KOp * M68K_OPERAND_COUNT),
+        ('op_size', M68KOpSize),
+        ('op_count', ctypes.c_uint8),
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]), a.op_size)
diff --git a/capstone/bindings/python/capstone/m68k_const.py b/capstone/bindings/python/capstone/m68k_const.py
new file mode 100644
index 000000000..39f54184c
--- /dev/null
+++ b/capstone/bindings/python/capstone/m68k_const.py
@@ -0,0 +1,485 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.py]
+M68K_OPERAND_COUNT = 4
+
+M68K_REG_INVALID = 0
+M68K_REG_D0 = 1
+M68K_REG_D1 = 2
+M68K_REG_D2 = 3
+M68K_REG_D3 = 4
+M68K_REG_D4 = 5
+M68K_REG_D5 = 6
+M68K_REG_D6 = 7
+M68K_REG_D7 = 8
+M68K_REG_A0 = 9
+M68K_REG_A1 = 10
+M68K_REG_A2 = 11
+M68K_REG_A3 = 12
+M68K_REG_A4 = 13
+M68K_REG_A5 = 14
+M68K_REG_A6 = 15
+M68K_REG_A7 = 16
+M68K_REG_FP0 = 17
+M68K_REG_FP1 = 18
+M68K_REG_FP2 = 19
+M68K_REG_FP3 = 20
+M68K_REG_FP4 = 21
+M68K_REG_FP5 = 22
+M68K_REG_FP6 = 23
+M68K_REG_FP7 = 24
+M68K_REG_PC = 25
+M68K_REG_SR = 26
+M68K_REG_CCR = 27
+M68K_REG_SFC = 28
+M68K_REG_DFC = 29
+M68K_REG_USP = 30
+M68K_REG_VBR = 31
+M68K_REG_CACR = 32
+M68K_REG_CAAR = 33
+M68K_REG_MSP = 34
+M68K_REG_ISP = 35
+M68K_REG_TC = 36
+M68K_REG_ITT0 = 37
+M68K_REG_ITT1 = 38
+M68K_REG_DTT0 = 39
+M68K_REG_DTT1 = 40
+M68K_REG_MMUSR = 41
+M68K_REG_URP = 42
+M68K_REG_SRP = 43
+M68K_REG_FPCR = 44
+M68K_REG_FPSR = 45
+M68K_REG_FPIAR = 46
+M68K_REG_ENDING = 47
+
+M68K_AM_NONE = 0
+M68K_AM_REG_DIRECT_DATA = 1
+M68K_AM_REG_DIRECT_ADDR = 2
+M68K_AM_REGI_ADDR = 3
+M68K_AM_REGI_ADDR_POST_INC = 4
+M68K_AM_REGI_ADDR_PRE_DEC = 5
+M68K_AM_REGI_ADDR_DISP = 6
+M68K_AM_AREGI_INDEX_8_BIT_DISP = 7
+M68K_AM_AREGI_INDEX_BASE_DISP = 8
+M68K_AM_MEMI_POST_INDEX = 9
+M68K_AM_MEMI_PRE_INDEX = 10
+M68K_AM_PCI_DISP = 11
+M68K_AM_PCI_INDEX_8_BIT_DISP = 12
+M68K_AM_PCI_INDEX_BASE_DISP = 13
+M68K_AM_PC_MEMI_POST_INDEX = 14
+M68K_AM_PC_MEMI_PRE_INDEX = 15
+M68K_AM_ABSOLUTE_DATA_SHORT = 16
+M68K_AM_ABSOLUTE_DATA_LONG = 17
+M68K_AM_IMMEDIATE = 18
+M68K_AM_BRANCH_DISPLACEMENT = 19
+
+M68K_OP_INVALID = 0
+M68K_OP_REG = 1
+M68K_OP_IMM = 2
+M68K_OP_MEM = 3
+M68K_OP_FP_SINGLE = 4
+M68K_OP_FP_DOUBLE = 5
+M68K_OP_REG_BITS = 6
+M68K_OP_REG_PAIR = 7
+M68K_OP_BR_DISP = 8
+
+M68K_OP_BR_DISP_SIZE_INVALID = 0
+M68K_OP_BR_DISP_SIZE_BYTE = 1
+M68K_OP_BR_DISP_SIZE_WORD = 2
+M68K_OP_BR_DISP_SIZE_LONG = 4
+
+M68K_CPU_SIZE_NONE = 0
+M68K_CPU_SIZE_BYTE = 1
+M68K_CPU_SIZE_WORD = 2
+M68K_CPU_SIZE_LONG = 4
+
+M68K_FPU_SIZE_NONE = 0
+M68K_FPU_SIZE_SINGLE = 4
+M68K_FPU_SIZE_DOUBLE = 8
+M68K_FPU_SIZE_EXTENDED = 12
+
+M68K_SIZE_TYPE_INVALID = 0
+M68K_SIZE_TYPE_CPU = 1
+M68K_SIZE_TYPE_FPU = 2
+
+M68K_INS_INVALID = 0
+M68K_INS_ABCD = 1
+M68K_INS_ADD = 2
+M68K_INS_ADDA = 3
+M68K_INS_ADDI = 4
+M68K_INS_ADDQ = 5
+M68K_INS_ADDX = 6
+M68K_INS_AND = 7
+M68K_INS_ANDI = 8
+M68K_INS_ASL = 9
+M68K_INS_ASR = 10
+M68K_INS_BHS = 11
+M68K_INS_BLO = 12
+M68K_INS_BHI = 13
+M68K_INS_BLS = 14
+M68K_INS_BCC = 15
+M68K_INS_BCS = 16
+M68K_INS_BNE = 17
+M68K_INS_BEQ = 18
+M68K_INS_BVC = 19
+M68K_INS_BVS = 20
+M68K_INS_BPL = 21
+M68K_INS_BMI = 22
+M68K_INS_BGE = 23
+M68K_INS_BLT = 24
+M68K_INS_BGT = 25
+M68K_INS_BLE = 26
+M68K_INS_BRA = 27
+M68K_INS_BSR = 28
+M68K_INS_BCHG = 29
+M68K_INS_BCLR = 30
+M68K_INS_BSET = 31
+M68K_INS_BTST = 32
+M68K_INS_BFCHG = 33
+M68K_INS_BFCLR = 34
+M68K_INS_BFEXTS = 35
+M68K_INS_BFEXTU = 36
+M68K_INS_BFFFO = 37
+M68K_INS_BFINS = 38
+M68K_INS_BFSET = 39
+M68K_INS_BFTST = 40
+M68K_INS_BKPT = 41
+M68K_INS_CALLM = 42
+M68K_INS_CAS = 43
+M68K_INS_CAS2 = 44
+M68K_INS_CHK = 45
+M68K_INS_CHK2 = 46
+M68K_INS_CLR = 47
+M68K_INS_CMP = 48
+M68K_INS_CMPA = 49
+M68K_INS_CMPI = 50
+M68K_INS_CMPM = 51
+M68K_INS_CMP2 = 52
+M68K_INS_CINVL = 53
+M68K_INS_CINVP = 54
+M68K_INS_CINVA = 55
+M68K_INS_CPUSHL = 56
+M68K_INS_CPUSHP = 57
+M68K_INS_CPUSHA = 58
+M68K_INS_DBT = 59
+M68K_INS_DBF = 60
+M68K_INS_DBHI = 61
+M68K_INS_DBLS = 62
+M68K_INS_DBCC = 63
+M68K_INS_DBCS = 64
+M68K_INS_DBNE = 65
+M68K_INS_DBEQ = 66
+M68K_INS_DBVC = 67
+M68K_INS_DBVS = 68
+M68K_INS_DBPL = 69
+M68K_INS_DBMI = 70
+M68K_INS_DBGE = 71
+M68K_INS_DBLT = 72
+M68K_INS_DBGT = 73
+M68K_INS_DBLE = 74
+M68K_INS_DBRA = 75
+M68K_INS_DIVS = 76
+M68K_INS_DIVSL = 77
+M68K_INS_DIVU = 78
+M68K_INS_DIVUL = 79
+M68K_INS_EOR = 80
+M68K_INS_EORI = 81
+M68K_INS_EXG = 82
+M68K_INS_EXT = 83
+M68K_INS_EXTB = 84
+M68K_INS_FABS = 85
+M68K_INS_FSABS = 86
+M68K_INS_FDABS = 87
+M68K_INS_FACOS = 88
+M68K_INS_FADD = 89
+M68K_INS_FSADD = 90
+M68K_INS_FDADD = 91
+M68K_INS_FASIN = 92
+M68K_INS_FATAN = 93
+M68K_INS_FATANH = 94
+M68K_INS_FBF = 95
+M68K_INS_FBEQ = 96
+M68K_INS_FBOGT = 97
+M68K_INS_FBOGE = 98
+M68K_INS_FBOLT = 99
+M68K_INS_FBOLE = 100
+M68K_INS_FBOGL = 101
+M68K_INS_FBOR = 102
+M68K_INS_FBUN = 103
+M68K_INS_FBUEQ = 104
+M68K_INS_FBUGT = 105
+M68K_INS_FBUGE = 106
+M68K_INS_FBULT = 107
+M68K_INS_FBULE = 108
+M68K_INS_FBNE = 109
+M68K_INS_FBT = 110
+M68K_INS_FBSF = 111
+M68K_INS_FBSEQ = 112
+M68K_INS_FBGT = 113
+M68K_INS_FBGE = 114
+M68K_INS_FBLT = 115
+M68K_INS_FBLE = 116
+M68K_INS_FBGL = 117
+M68K_INS_FBGLE = 118
+M68K_INS_FBNGLE = 119
+M68K_INS_FBNGL = 120
+M68K_INS_FBNLE = 121
+M68K_INS_FBNLT = 122
+M68K_INS_FBNGE = 123
+M68K_INS_FBNGT = 124
+M68K_INS_FBSNE = 125
+M68K_INS_FBST = 126
+M68K_INS_FCMP = 127
+M68K_INS_FCOS = 128
+M68K_INS_FCOSH = 129
+M68K_INS_FDBF = 130
+M68K_INS_FDBEQ = 131
+M68K_INS_FDBOGT = 132
+M68K_INS_FDBOGE = 133
+M68K_INS_FDBOLT = 134
+M68K_INS_FDBOLE = 135
+M68K_INS_FDBOGL = 136
+M68K_INS_FDBOR = 137
+M68K_INS_FDBUN = 138
+M68K_INS_FDBUEQ = 139
+M68K_INS_FDBUGT = 140
+M68K_INS_FDBUGE = 141
+M68K_INS_FDBULT = 142
+M68K_INS_FDBULE = 143
+M68K_INS_FDBNE = 144
+M68K_INS_FDBT = 145
+M68K_INS_FDBSF = 146
+M68K_INS_FDBSEQ = 147
+M68K_INS_FDBGT = 148
+M68K_INS_FDBGE = 149
+M68K_INS_FDBLT = 150
+M68K_INS_FDBLE = 151
+M68K_INS_FDBGL = 152
+M68K_INS_FDBGLE = 153
+M68K_INS_FDBNGLE = 154
+M68K_INS_FDBNGL = 155
+M68K_INS_FDBNLE = 156
+M68K_INS_FDBNLT = 157
+M68K_INS_FDBNGE = 158
+M68K_INS_FDBNGT = 159
+M68K_INS_FDBSNE = 160
+M68K_INS_FDBST = 161
+M68K_INS_FDIV = 162
+M68K_INS_FSDIV = 163
+M68K_INS_FDDIV = 164
+M68K_INS_FETOX = 165
+M68K_INS_FETOXM1 = 166
+M68K_INS_FGETEXP = 167
+M68K_INS_FGETMAN = 168
+M68K_INS_FINT = 169
+M68K_INS_FINTRZ = 170
+M68K_INS_FLOG10 = 171
+M68K_INS_FLOG2 = 172
+M68K_INS_FLOGN = 173
+M68K_INS_FLOGNP1 = 174
+M68K_INS_FMOD = 175
+M68K_INS_FMOVE = 176
+M68K_INS_FSMOVE = 177
+M68K_INS_FDMOVE = 178
+M68K_INS_FMOVECR = 179
+M68K_INS_FMOVEM = 180
+M68K_INS_FMUL = 181
+M68K_INS_FSMUL = 182
+M68K_INS_FDMUL = 183
+M68K_INS_FNEG = 184
+M68K_INS_FSNEG = 185
+M68K_INS_FDNEG = 186
+M68K_INS_FNOP = 187
+M68K_INS_FREM = 188
+M68K_INS_FRESTORE = 189
+M68K_INS_FSAVE = 190
+M68K_INS_FSCALE = 191
+M68K_INS_FSGLDIV = 192
+M68K_INS_FSGLMUL = 193
+M68K_INS_FSIN = 194
+M68K_INS_FSINCOS = 195
+M68K_INS_FSINH = 196
+M68K_INS_FSQRT = 197
+M68K_INS_FSSQRT = 198
+M68K_INS_FDSQRT = 199
+M68K_INS_FSF = 200
+M68K_INS_FSBEQ = 201
+M68K_INS_FSOGT = 202
+M68K_INS_FSOGE = 203
+M68K_INS_FSOLT = 204
+M68K_INS_FSOLE = 205
+M68K_INS_FSOGL = 206
+M68K_INS_FSOR = 207
+M68K_INS_FSUN = 208
+M68K_INS_FSUEQ = 209
+M68K_INS_FSUGT = 210
+M68K_INS_FSUGE = 211
+M68K_INS_FSULT = 212
+M68K_INS_FSULE = 213
+M68K_INS_FSNE = 214
+M68K_INS_FST = 215
+M68K_INS_FSSF = 216
+M68K_INS_FSSEQ = 217
+M68K_INS_FSGT = 218
+M68K_INS_FSGE = 219
+M68K_INS_FSLT = 220
+M68K_INS_FSLE = 221
+M68K_INS_FSGL = 222
+M68K_INS_FSGLE = 223
+M68K_INS_FSNGLE = 224
+M68K_INS_FSNGL = 225
+M68K_INS_FSNLE = 226
+M68K_INS_FSNLT = 227
+M68K_INS_FSNGE = 228
+M68K_INS_FSNGT = 229
+M68K_INS_FSSNE = 230
+M68K_INS_FSST = 231
+M68K_INS_FSUB = 232
+M68K_INS_FSSUB = 233
+M68K_INS_FDSUB = 234
+M68K_INS_FTAN = 235
+M68K_INS_FTANH = 236
+M68K_INS_FTENTOX = 237
+M68K_INS_FTRAPF = 238
+M68K_INS_FTRAPEQ = 239
+M68K_INS_FTRAPOGT = 240
+M68K_INS_FTRAPOGE = 241
+M68K_INS_FTRAPOLT = 242
+M68K_INS_FTRAPOLE = 243
+M68K_INS_FTRAPOGL = 244
+M68K_INS_FTRAPOR = 245
+M68K_INS_FTRAPUN = 246
+M68K_INS_FTRAPUEQ = 247
+M68K_INS_FTRAPUGT = 248
+M68K_INS_FTRAPUGE = 249
+M68K_INS_FTRAPULT = 250
+M68K_INS_FTRAPULE = 251
+M68K_INS_FTRAPNE = 252
+M68K_INS_FTRAPT = 253
+M68K_INS_FTRAPSF = 254
+M68K_INS_FTRAPSEQ = 255
+M68K_INS_FTRAPGT = 256
+M68K_INS_FTRAPGE = 257
+M68K_INS_FTRAPLT = 258
+M68K_INS_FTRAPLE = 259
+M68K_INS_FTRAPGL = 260
+M68K_INS_FTRAPGLE = 261
+M68K_INS_FTRAPNGLE = 262
+M68K_INS_FTRAPNGL = 263
+M68K_INS_FTRAPNLE = 264
+M68K_INS_FTRAPNLT = 265
+M68K_INS_FTRAPNGE = 266
+M68K_INS_FTRAPNGT = 267
+M68K_INS_FTRAPSNE = 268
+M68K_INS_FTRAPST = 269
+M68K_INS_FTST = 270
+M68K_INS_FTWOTOX = 271
+M68K_INS_HALT = 272
+M68K_INS_ILLEGAL = 273
+M68K_INS_JMP = 274
+M68K_INS_JSR = 275
+M68K_INS_LEA = 276
+M68K_INS_LINK = 277
+M68K_INS_LPSTOP = 278
+M68K_INS_LSL = 279
+M68K_INS_LSR = 280
+M68K_INS_MOVE = 281
+M68K_INS_MOVEA = 282
+M68K_INS_MOVEC = 283
+M68K_INS_MOVEM = 284
+M68K_INS_MOVEP = 285
+M68K_INS_MOVEQ = 286
+M68K_INS_MOVES = 287
+M68K_INS_MOVE16 = 288
+M68K_INS_MULS = 289
+M68K_INS_MULU = 290
+M68K_INS_NBCD = 291
+M68K_INS_NEG = 292
+M68K_INS_NEGX = 293
+M68K_INS_NOP = 294
+M68K_INS_NOT = 295
+M68K_INS_OR = 296
+M68K_INS_ORI = 297
+M68K_INS_PACK = 298
+M68K_INS_PEA = 299
+M68K_INS_PFLUSH = 300
+M68K_INS_PFLUSHA = 301
+M68K_INS_PFLUSHAN = 302
+M68K_INS_PFLUSHN = 303
+M68K_INS_PLOADR = 304
+M68K_INS_PLOADW = 305
+M68K_INS_PLPAR = 306
+M68K_INS_PLPAW = 307
+M68K_INS_PMOVE = 308
+M68K_INS_PMOVEFD = 309
+M68K_INS_PTESTR = 310
+M68K_INS_PTESTW = 311
+M68K_INS_PULSE = 312
+M68K_INS_REMS = 313
+M68K_INS_REMU = 314
+M68K_INS_RESET = 315
+M68K_INS_ROL = 316
+M68K_INS_ROR = 317
+M68K_INS_ROXL = 318
+M68K_INS_ROXR = 319
+M68K_INS_RTD = 320
+M68K_INS_RTE = 321
+M68K_INS_RTM = 322
+M68K_INS_RTR = 323
+M68K_INS_RTS = 324
+M68K_INS_SBCD = 325
+M68K_INS_ST = 326
+M68K_INS_SF = 327
+M68K_INS_SHI = 328
+M68K_INS_SLS = 329
+M68K_INS_SCC = 330
+M68K_INS_SHS = 331
+M68K_INS_SCS = 332
+M68K_INS_SLO = 333
+M68K_INS_SNE = 334
+M68K_INS_SEQ = 335
+M68K_INS_SVC = 336
+M68K_INS_SVS = 337
+M68K_INS_SPL = 338
+M68K_INS_SMI = 339
+M68K_INS_SGE = 340
+M68K_INS_SLT = 341
+M68K_INS_SGT = 342
+M68K_INS_SLE = 343
+M68K_INS_STOP = 344
+M68K_INS_SUB = 345
+M68K_INS_SUBA = 346
+M68K_INS_SUBI = 347
+M68K_INS_SUBQ = 348
+M68K_INS_SUBX = 349
+M68K_INS_SWAP = 350
+M68K_INS_TAS = 351
+M68K_INS_TRAP = 352
+M68K_INS_TRAPV = 353
+M68K_INS_TRAPT = 354
+M68K_INS_TRAPF = 355
+M68K_INS_TRAPHI = 356
+M68K_INS_TRAPLS = 357
+M68K_INS_TRAPCC = 358
+M68K_INS_TRAPHS = 359
+M68K_INS_TRAPCS = 360
+M68K_INS_TRAPLO = 361
+M68K_INS_TRAPNE = 362
+M68K_INS_TRAPEQ = 363
+M68K_INS_TRAPVC = 364
+M68K_INS_TRAPVS = 365
+M68K_INS_TRAPPL = 366
+M68K_INS_TRAPMI = 367
+M68K_INS_TRAPGE = 368
+M68K_INS_TRAPLT = 369
+M68K_INS_TRAPGT = 370
+M68K_INS_TRAPLE = 371
+M68K_INS_TST = 372
+M68K_INS_UNLK = 373
+M68K_INS_UNPK = 374
+M68K_INS_ENDING = 375
+
+M68K_GRP_INVALID = 0
+M68K_GRP_JUMP = 1
+M68K_GRP_RET = 3
+M68K_GRP_IRET = 5
+M68K_GRP_BRANCH_RELATIVE = 7
+M68K_GRP_ENDING = 8
diff --git a/capstone/bindings/python/capstone/mips.py b/capstone/bindings/python/capstone/mips.py
new file mode 100644
index 000000000..44513d252
--- /dev/null
+++ b/capstone/bindings/python/capstone/mips.py
@@ -0,0 +1,48 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .mips_const import *
+
+# define the API
+class MipsOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('disp', ctypes.c_int64),
+    )
+
+class MipsOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', MipsOpMem),
+    )
+
+class MipsOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', MipsOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsMips(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', MipsOp * 10),
+    )
+
+def get_arch_info(a):
+    return copy_ctypes_list(a.operands[:a.op_count])
+
diff --git a/capstone/bindings/python/capstone/mips_const.py b/capstone/bindings/python/capstone/mips_const.py
new file mode 100644
index 000000000..af2f2094b
--- /dev/null
+++ b/capstone/bindings/python/capstone/mips_const.py
@@ -0,0 +1,861 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.py]
+
+MIPS_OP_INVALID = 0
+MIPS_OP_REG = 1
+MIPS_OP_IMM = 2
+MIPS_OP_MEM = 3
+
+MIPS_REG_INVALID = 0
+MIPS_REG_PC = 1
+MIPS_REG_0 = 2
+MIPS_REG_1 = 3
+MIPS_REG_2 = 4
+MIPS_REG_3 = 5
+MIPS_REG_4 = 6
+MIPS_REG_5 = 7
+MIPS_REG_6 = 8
+MIPS_REG_7 = 9
+MIPS_REG_8 = 10
+MIPS_REG_9 = 11
+MIPS_REG_10 = 12
+MIPS_REG_11 = 13
+MIPS_REG_12 = 14
+MIPS_REG_13 = 15
+MIPS_REG_14 = 16
+MIPS_REG_15 = 17
+MIPS_REG_16 = 18
+MIPS_REG_17 = 19
+MIPS_REG_18 = 20
+MIPS_REG_19 = 21
+MIPS_REG_20 = 22
+MIPS_REG_21 = 23
+MIPS_REG_22 = 24
+MIPS_REG_23 = 25
+MIPS_REG_24 = 26
+MIPS_REG_25 = 27
+MIPS_REG_26 = 28
+MIPS_REG_27 = 29
+MIPS_REG_28 = 30
+MIPS_REG_29 = 31
+MIPS_REG_30 = 32
+MIPS_REG_31 = 33
+MIPS_REG_DSPCCOND = 34
+MIPS_REG_DSPCARRY = 35
+MIPS_REG_DSPEFI = 36
+MIPS_REG_DSPOUTFLAG = 37
+MIPS_REG_DSPOUTFLAG16_19 = 38
+MIPS_REG_DSPOUTFLAG20 = 39
+MIPS_REG_DSPOUTFLAG21 = 40
+MIPS_REG_DSPOUTFLAG22 = 41
+MIPS_REG_DSPOUTFLAG23 = 42
+MIPS_REG_DSPPOS = 43
+MIPS_REG_DSPSCOUNT = 44
+MIPS_REG_AC0 = 45
+MIPS_REG_AC1 = 46
+MIPS_REG_AC2 = 47
+MIPS_REG_AC3 = 48
+MIPS_REG_CC0 = 49
+MIPS_REG_CC1 = 50
+MIPS_REG_CC2 = 51
+MIPS_REG_CC3 = 52
+MIPS_REG_CC4 = 53
+MIPS_REG_CC5 = 54
+MIPS_REG_CC6 = 55
+MIPS_REG_CC7 = 56
+MIPS_REG_F0 = 57
+MIPS_REG_F1 = 58
+MIPS_REG_F2 = 59
+MIPS_REG_F3 = 60
+MIPS_REG_F4 = 61
+MIPS_REG_F5 = 62
+MIPS_REG_F6 = 63
+MIPS_REG_F7 = 64
+MIPS_REG_F8 = 65
+MIPS_REG_F9 = 66
+MIPS_REG_F10 = 67
+MIPS_REG_F11 = 68
+MIPS_REG_F12 = 69
+MIPS_REG_F13 = 70
+MIPS_REG_F14 = 71
+MIPS_REG_F15 = 72
+MIPS_REG_F16 = 73
+MIPS_REG_F17 = 74
+MIPS_REG_F18 = 75
+MIPS_REG_F19 = 76
+MIPS_REG_F20 = 77
+MIPS_REG_F21 = 78
+MIPS_REG_F22 = 79
+MIPS_REG_F23 = 80
+MIPS_REG_F24 = 81
+MIPS_REG_F25 = 82
+MIPS_REG_F26 = 83
+MIPS_REG_F27 = 84
+MIPS_REG_F28 = 85
+MIPS_REG_F29 = 86
+MIPS_REG_F30 = 87
+MIPS_REG_F31 = 88
+MIPS_REG_FCC0 = 89
+MIPS_REG_FCC1 = 90
+MIPS_REG_FCC2 = 91
+MIPS_REG_FCC3 = 92
+MIPS_REG_FCC4 = 93
+MIPS_REG_FCC5 = 94
+MIPS_REG_FCC6 = 95
+MIPS_REG_FCC7 = 96
+MIPS_REG_W0 = 97
+MIPS_REG_W1 = 98
+MIPS_REG_W2 = 99
+MIPS_REG_W3 = 100
+MIPS_REG_W4 = 101
+MIPS_REG_W5 = 102
+MIPS_REG_W6 = 103
+MIPS_REG_W7 = 104
+MIPS_REG_W8 = 105
+MIPS_REG_W9 = 106
+MIPS_REG_W10 = 107
+MIPS_REG_W11 = 108
+MIPS_REG_W12 = 109
+MIPS_REG_W13 = 110
+MIPS_REG_W14 = 111
+MIPS_REG_W15 = 112
+MIPS_REG_W16 = 113
+MIPS_REG_W17 = 114
+MIPS_REG_W18 = 115
+MIPS_REG_W19 = 116
+MIPS_REG_W20 = 117
+MIPS_REG_W21 = 118
+MIPS_REG_W22 = 119
+MIPS_REG_W23 = 120
+MIPS_REG_W24 = 121
+MIPS_REG_W25 = 122
+MIPS_REG_W26 = 123
+MIPS_REG_W27 = 124
+MIPS_REG_W28 = 125
+MIPS_REG_W29 = 126
+MIPS_REG_W30 = 127
+MIPS_REG_W31 = 128
+MIPS_REG_HI = 129
+MIPS_REG_LO = 130
+MIPS_REG_P0 = 131
+MIPS_REG_P1 = 132
+MIPS_REG_P2 = 133
+MIPS_REG_MPL0 = 134
+MIPS_REG_MPL1 = 135
+MIPS_REG_MPL2 = 136
+MIPS_REG_ENDING = 137
+MIPS_REG_ZERO = MIPS_REG_0
+MIPS_REG_AT = MIPS_REG_1
+MIPS_REG_V0 = MIPS_REG_2
+MIPS_REG_V1 = MIPS_REG_3
+MIPS_REG_A0 = MIPS_REG_4
+MIPS_REG_A1 = MIPS_REG_5
+MIPS_REG_A2 = MIPS_REG_6
+MIPS_REG_A3 = MIPS_REG_7
+MIPS_REG_T0 = MIPS_REG_8
+MIPS_REG_T1 = MIPS_REG_9
+MIPS_REG_T2 = MIPS_REG_10
+MIPS_REG_T3 = MIPS_REG_11
+MIPS_REG_T4 = MIPS_REG_12
+MIPS_REG_T5 = MIPS_REG_13
+MIPS_REG_T6 = MIPS_REG_14
+MIPS_REG_T7 = MIPS_REG_15
+MIPS_REG_S0 = MIPS_REG_16
+MIPS_REG_S1 = MIPS_REG_17
+MIPS_REG_S2 = MIPS_REG_18
+MIPS_REG_S3 = MIPS_REG_19
+MIPS_REG_S4 = MIPS_REG_20
+MIPS_REG_S5 = MIPS_REG_21
+MIPS_REG_S6 = MIPS_REG_22
+MIPS_REG_S7 = MIPS_REG_23
+MIPS_REG_T8 = MIPS_REG_24
+MIPS_REG_T9 = MIPS_REG_25
+MIPS_REG_K0 = MIPS_REG_26
+MIPS_REG_K1 = MIPS_REG_27
+MIPS_REG_GP = MIPS_REG_28
+MIPS_REG_SP = MIPS_REG_29
+MIPS_REG_FP = MIPS_REG_30
+MIPS_REG_S8 = MIPS_REG_30
+MIPS_REG_RA = MIPS_REG_31
+MIPS_REG_HI0 = MIPS_REG_AC0
+MIPS_REG_HI1 = MIPS_REG_AC1
+MIPS_REG_HI2 = MIPS_REG_AC2
+MIPS_REG_HI3 = MIPS_REG_AC3
+MIPS_REG_LO0 = MIPS_REG_HI0
+MIPS_REG_LO1 = MIPS_REG_HI1
+MIPS_REG_LO2 = MIPS_REG_HI2
+MIPS_REG_LO3 = MIPS_REG_HI3
+
+MIPS_INS_INVALID = 0
+MIPS_INS_ABSQ_S = 1
+MIPS_INS_ADD = 2
+MIPS_INS_ADDIUPC = 3
+MIPS_INS_ADDIUR1SP = 4
+MIPS_INS_ADDIUR2 = 5
+MIPS_INS_ADDIUS5 = 6
+MIPS_INS_ADDIUSP = 7
+MIPS_INS_ADDQH = 8
+MIPS_INS_ADDQH_R = 9
+MIPS_INS_ADDQ = 10
+MIPS_INS_ADDQ_S = 11
+MIPS_INS_ADDSC = 12
+MIPS_INS_ADDS_A = 13
+MIPS_INS_ADDS_S = 14
+MIPS_INS_ADDS_U = 15
+MIPS_INS_ADDU16 = 16
+MIPS_INS_ADDUH = 17
+MIPS_INS_ADDUH_R = 18
+MIPS_INS_ADDU = 19
+MIPS_INS_ADDU_S = 20
+MIPS_INS_ADDVI = 21
+MIPS_INS_ADDV = 22
+MIPS_INS_ADDWC = 23
+MIPS_INS_ADD_A = 24
+MIPS_INS_ADDI = 25
+MIPS_INS_ADDIU = 26
+MIPS_INS_ALIGN = 27
+MIPS_INS_ALUIPC = 28
+MIPS_INS_AND = 29
+MIPS_INS_AND16 = 30
+MIPS_INS_ANDI16 = 31
+MIPS_INS_ANDI = 32
+MIPS_INS_APPEND = 33
+MIPS_INS_ASUB_S = 34
+MIPS_INS_ASUB_U = 35
+MIPS_INS_AUI = 36
+MIPS_INS_AUIPC = 37
+MIPS_INS_AVER_S = 38
+MIPS_INS_AVER_U = 39
+MIPS_INS_AVE_S = 40
+MIPS_INS_AVE_U = 41
+MIPS_INS_B16 = 42
+MIPS_INS_BADDU = 43
+MIPS_INS_BAL = 44
+MIPS_INS_BALC = 45
+MIPS_INS_BALIGN = 46
+MIPS_INS_BBIT0 = 47
+MIPS_INS_BBIT032 = 48
+MIPS_INS_BBIT1 = 49
+MIPS_INS_BBIT132 = 50
+MIPS_INS_BC = 51
+MIPS_INS_BC0F = 52
+MIPS_INS_BC0FL = 53
+MIPS_INS_BC0T = 54
+MIPS_INS_BC0TL = 55
+MIPS_INS_BC1EQZ = 56
+MIPS_INS_BC1F = 57
+MIPS_INS_BC1FL = 58
+MIPS_INS_BC1NEZ = 59
+MIPS_INS_BC1T = 60
+MIPS_INS_BC1TL = 61
+MIPS_INS_BC2EQZ = 62
+MIPS_INS_BC2F = 63
+MIPS_INS_BC2FL = 64
+MIPS_INS_BC2NEZ = 65
+MIPS_INS_BC2T = 66
+MIPS_INS_BC2TL = 67
+MIPS_INS_BC3F = 68
+MIPS_INS_BC3FL = 69
+MIPS_INS_BC3T = 70
+MIPS_INS_BC3TL = 71
+MIPS_INS_BCLRI = 72
+MIPS_INS_BCLR = 73
+MIPS_INS_BEQ = 74
+MIPS_INS_BEQC = 75
+MIPS_INS_BEQL = 76
+MIPS_INS_BEQZ16 = 77
+MIPS_INS_BEQZALC = 78
+MIPS_INS_BEQZC = 79
+MIPS_INS_BGEC = 80
+MIPS_INS_BGEUC = 81
+MIPS_INS_BGEZ = 82
+MIPS_INS_BGEZAL = 83
+MIPS_INS_BGEZALC = 84
+MIPS_INS_BGEZALL = 85
+MIPS_INS_BGEZALS = 86
+MIPS_INS_BGEZC = 87
+MIPS_INS_BGEZL = 88
+MIPS_INS_BGTZ = 89
+MIPS_INS_BGTZALC = 90
+MIPS_INS_BGTZC = 91
+MIPS_INS_BGTZL = 92
+MIPS_INS_BINSLI = 93
+MIPS_INS_BINSL = 94
+MIPS_INS_BINSRI = 95
+MIPS_INS_BINSR = 96
+MIPS_INS_BITREV = 97
+MIPS_INS_BITSWAP = 98
+MIPS_INS_BLEZ = 99
+MIPS_INS_BLEZALC = 100
+MIPS_INS_BLEZC = 101
+MIPS_INS_BLEZL = 102
+MIPS_INS_BLTC = 103
+MIPS_INS_BLTUC = 104
+MIPS_INS_BLTZ = 105
+MIPS_INS_BLTZAL = 106
+MIPS_INS_BLTZALC = 107
+MIPS_INS_BLTZALL = 108
+MIPS_INS_BLTZALS = 109
+MIPS_INS_BLTZC = 110
+MIPS_INS_BLTZL = 111
+MIPS_INS_BMNZI = 112
+MIPS_INS_BMNZ = 113
+MIPS_INS_BMZI = 114
+MIPS_INS_BMZ = 115
+MIPS_INS_BNE = 116
+MIPS_INS_BNEC = 117
+MIPS_INS_BNEGI = 118
+MIPS_INS_BNEG = 119
+MIPS_INS_BNEL = 120
+MIPS_INS_BNEZ16 = 121
+MIPS_INS_BNEZALC = 122
+MIPS_INS_BNEZC = 123
+MIPS_INS_BNVC = 124
+MIPS_INS_BNZ = 125
+MIPS_INS_BOVC = 126
+MIPS_INS_BPOSGE32 = 127
+MIPS_INS_BREAK = 128
+MIPS_INS_BREAK16 = 129
+MIPS_INS_BSELI = 130
+MIPS_INS_BSEL = 131
+MIPS_INS_BSETI = 132
+MIPS_INS_BSET = 133
+MIPS_INS_BZ = 134
+MIPS_INS_BEQZ = 135
+MIPS_INS_B = 136
+MIPS_INS_BNEZ = 137
+MIPS_INS_BTEQZ = 138
+MIPS_INS_BTNEZ = 139
+MIPS_INS_CACHE = 140
+MIPS_INS_CEIL = 141
+MIPS_INS_CEQI = 142
+MIPS_INS_CEQ = 143
+MIPS_INS_CFC1 = 144
+MIPS_INS_CFCMSA = 145
+MIPS_INS_CINS = 146
+MIPS_INS_CINS32 = 147
+MIPS_INS_CLASS = 148
+MIPS_INS_CLEI_S = 149
+MIPS_INS_CLEI_U = 150
+MIPS_INS_CLE_S = 151
+MIPS_INS_CLE_U = 152
+MIPS_INS_CLO = 153
+MIPS_INS_CLTI_S = 154
+MIPS_INS_CLTI_U = 155
+MIPS_INS_CLT_S = 156
+MIPS_INS_CLT_U = 157
+MIPS_INS_CLZ = 158
+MIPS_INS_CMPGDU = 159
+MIPS_INS_CMPGU = 160
+MIPS_INS_CMPU = 161
+MIPS_INS_CMP = 162
+MIPS_INS_COPY_S = 163
+MIPS_INS_COPY_U = 164
+MIPS_INS_CTC1 = 165
+MIPS_INS_CTCMSA = 166
+MIPS_INS_CVT = 167
+MIPS_INS_C = 168
+MIPS_INS_CMPI = 169
+MIPS_INS_DADD = 170
+MIPS_INS_DADDI = 171
+MIPS_INS_DADDIU = 172
+MIPS_INS_DADDU = 173
+MIPS_INS_DAHI = 174
+MIPS_INS_DALIGN = 175
+MIPS_INS_DATI = 176
+MIPS_INS_DAUI = 177
+MIPS_INS_DBITSWAP = 178
+MIPS_INS_DCLO = 179
+MIPS_INS_DCLZ = 180
+MIPS_INS_DDIV = 181
+MIPS_INS_DDIVU = 182
+MIPS_INS_DERET = 183
+MIPS_INS_DEXT = 184
+MIPS_INS_DEXTM = 185
+MIPS_INS_DEXTU = 186
+MIPS_INS_DI = 187
+MIPS_INS_DINS = 188
+MIPS_INS_DINSM = 189
+MIPS_INS_DINSU = 190
+MIPS_INS_DIV = 191
+MIPS_INS_DIVU = 192
+MIPS_INS_DIV_S = 193
+MIPS_INS_DIV_U = 194
+MIPS_INS_DLSA = 195
+MIPS_INS_DMFC0 = 196
+MIPS_INS_DMFC1 = 197
+MIPS_INS_DMFC2 = 198
+MIPS_INS_DMOD = 199
+MIPS_INS_DMODU = 200
+MIPS_INS_DMTC0 = 201
+MIPS_INS_DMTC1 = 202
+MIPS_INS_DMTC2 = 203
+MIPS_INS_DMUH = 204
+MIPS_INS_DMUHU = 205
+MIPS_INS_DMUL = 206
+MIPS_INS_DMULT = 207
+MIPS_INS_DMULTU = 208
+MIPS_INS_DMULU = 209
+MIPS_INS_DOTP_S = 210
+MIPS_INS_DOTP_U = 211
+MIPS_INS_DPADD_S = 212
+MIPS_INS_DPADD_U = 213
+MIPS_INS_DPAQX_SA = 214
+MIPS_INS_DPAQX_S = 215
+MIPS_INS_DPAQ_SA = 216
+MIPS_INS_DPAQ_S = 217
+MIPS_INS_DPAU = 218
+MIPS_INS_DPAX = 219
+MIPS_INS_DPA = 220
+MIPS_INS_DPOP = 221
+MIPS_INS_DPSQX_SA = 222
+MIPS_INS_DPSQX_S = 223
+MIPS_INS_DPSQ_SA = 224
+MIPS_INS_DPSQ_S = 225
+MIPS_INS_DPSUB_S = 226
+MIPS_INS_DPSUB_U = 227
+MIPS_INS_DPSU = 228
+MIPS_INS_DPSX = 229
+MIPS_INS_DPS = 230
+MIPS_INS_DROTR = 231
+MIPS_INS_DROTR32 = 232
+MIPS_INS_DROTRV = 233
+MIPS_INS_DSBH = 234
+MIPS_INS_DSHD = 235
+MIPS_INS_DSLL = 236
+MIPS_INS_DSLL32 = 237
+MIPS_INS_DSLLV = 238
+MIPS_INS_DSRA = 239
+MIPS_INS_DSRA32 = 240
+MIPS_INS_DSRAV = 241
+MIPS_INS_DSRL = 242
+MIPS_INS_DSRL32 = 243
+MIPS_INS_DSRLV = 244
+MIPS_INS_DSUB = 245
+MIPS_INS_DSUBU = 246
+MIPS_INS_EHB = 247
+MIPS_INS_EI = 248
+MIPS_INS_ERET = 249
+MIPS_INS_EXT = 250
+MIPS_INS_EXTP = 251
+MIPS_INS_EXTPDP = 252
+MIPS_INS_EXTPDPV = 253
+MIPS_INS_EXTPV = 254
+MIPS_INS_EXTRV_RS = 255
+MIPS_INS_EXTRV_R = 256
+MIPS_INS_EXTRV_S = 257
+MIPS_INS_EXTRV = 258
+MIPS_INS_EXTR_RS = 259
+MIPS_INS_EXTR_R = 260
+MIPS_INS_EXTR_S = 261
+MIPS_INS_EXTR = 262
+MIPS_INS_EXTS = 263
+MIPS_INS_EXTS32 = 264
+MIPS_INS_ABS = 265
+MIPS_INS_FADD = 266
+MIPS_INS_FCAF = 267
+MIPS_INS_FCEQ = 268
+MIPS_INS_FCLASS = 269
+MIPS_INS_FCLE = 270
+MIPS_INS_FCLT = 271
+MIPS_INS_FCNE = 272
+MIPS_INS_FCOR = 273
+MIPS_INS_FCUEQ = 274
+MIPS_INS_FCULE = 275
+MIPS_INS_FCULT = 276
+MIPS_INS_FCUNE = 277
+MIPS_INS_FCUN = 278
+MIPS_INS_FDIV = 279
+MIPS_INS_FEXDO = 280
+MIPS_INS_FEXP2 = 281
+MIPS_INS_FEXUPL = 282
+MIPS_INS_FEXUPR = 283
+MIPS_INS_FFINT_S = 284
+MIPS_INS_FFINT_U = 285
+MIPS_INS_FFQL = 286
+MIPS_INS_FFQR = 287
+MIPS_INS_FILL = 288
+MIPS_INS_FLOG2 = 289
+MIPS_INS_FLOOR = 290
+MIPS_INS_FMADD = 291
+MIPS_INS_FMAX_A = 292
+MIPS_INS_FMAX = 293
+MIPS_INS_FMIN_A = 294
+MIPS_INS_FMIN = 295
+MIPS_INS_MOV = 296
+MIPS_INS_FMSUB = 297
+MIPS_INS_FMUL = 298
+MIPS_INS_MUL = 299
+MIPS_INS_NEG = 300
+MIPS_INS_FRCP = 301
+MIPS_INS_FRINT = 302
+MIPS_INS_FRSQRT = 303
+MIPS_INS_FSAF = 304
+MIPS_INS_FSEQ = 305
+MIPS_INS_FSLE = 306
+MIPS_INS_FSLT = 307
+MIPS_INS_FSNE = 308
+MIPS_INS_FSOR = 309
+MIPS_INS_FSQRT = 310
+MIPS_INS_SQRT = 311
+MIPS_INS_FSUB = 312
+MIPS_INS_SUB = 313
+MIPS_INS_FSUEQ = 314
+MIPS_INS_FSULE = 315
+MIPS_INS_FSULT = 316
+MIPS_INS_FSUNE = 317
+MIPS_INS_FSUN = 318
+MIPS_INS_FTINT_S = 319
+MIPS_INS_FTINT_U = 320
+MIPS_INS_FTQ = 321
+MIPS_INS_FTRUNC_S = 322
+MIPS_INS_FTRUNC_U = 323
+MIPS_INS_HADD_S = 324
+MIPS_INS_HADD_U = 325
+MIPS_INS_HSUB_S = 326
+MIPS_INS_HSUB_U = 327
+MIPS_INS_ILVEV = 328
+MIPS_INS_ILVL = 329
+MIPS_INS_ILVOD = 330
+MIPS_INS_ILVR = 331
+MIPS_INS_INS = 332
+MIPS_INS_INSERT = 333
+MIPS_INS_INSV = 334
+MIPS_INS_INSVE = 335
+MIPS_INS_J = 336
+MIPS_INS_JAL = 337
+MIPS_INS_JALR = 338
+MIPS_INS_JALRS16 = 339
+MIPS_INS_JALRS = 340
+MIPS_INS_JALS = 341
+MIPS_INS_JALX = 342
+MIPS_INS_JIALC = 343
+MIPS_INS_JIC = 344
+MIPS_INS_JR = 345
+MIPS_INS_JR16 = 346
+MIPS_INS_JRADDIUSP = 347
+MIPS_INS_JRC = 348
+MIPS_INS_JALRC = 349
+MIPS_INS_LB = 350
+MIPS_INS_LBU16 = 351
+MIPS_INS_LBUX = 352
+MIPS_INS_LBU = 353
+MIPS_INS_LD = 354
+MIPS_INS_LDC1 = 355
+MIPS_INS_LDC2 = 356
+MIPS_INS_LDC3 = 357
+MIPS_INS_LDI = 358
+MIPS_INS_LDL = 359
+MIPS_INS_LDPC = 360
+MIPS_INS_LDR = 361
+MIPS_INS_LDXC1 = 362
+MIPS_INS_LH = 363
+MIPS_INS_LHU16 = 364
+MIPS_INS_LHX = 365
+MIPS_INS_LHU = 366
+MIPS_INS_LI16 = 367
+MIPS_INS_LL = 368
+MIPS_INS_LLD = 369
+MIPS_INS_LSA = 370
+MIPS_INS_LUXC1 = 371
+MIPS_INS_LUI = 372
+MIPS_INS_LW = 373
+MIPS_INS_LW16 = 374
+MIPS_INS_LWC1 = 375
+MIPS_INS_LWC2 = 376
+MIPS_INS_LWC3 = 377
+MIPS_INS_LWL = 378
+MIPS_INS_LWM16 = 379
+MIPS_INS_LWM32 = 380
+MIPS_INS_LWPC = 381
+MIPS_INS_LWP = 382
+MIPS_INS_LWR = 383
+MIPS_INS_LWUPC = 384
+MIPS_INS_LWU = 385
+MIPS_INS_LWX = 386
+MIPS_INS_LWXC1 = 387
+MIPS_INS_LWXS = 388
+MIPS_INS_LI = 389
+MIPS_INS_MADD = 390
+MIPS_INS_MADDF = 391
+MIPS_INS_MADDR_Q = 392
+MIPS_INS_MADDU = 393
+MIPS_INS_MADDV = 394
+MIPS_INS_MADD_Q = 395
+MIPS_INS_MAQ_SA = 396
+MIPS_INS_MAQ_S = 397
+MIPS_INS_MAXA = 398
+MIPS_INS_MAXI_S = 399
+MIPS_INS_MAXI_U = 400
+MIPS_INS_MAX_A = 401
+MIPS_INS_MAX = 402
+MIPS_INS_MAX_S = 403
+MIPS_INS_MAX_U = 404
+MIPS_INS_MFC0 = 405
+MIPS_INS_MFC1 = 406
+MIPS_INS_MFC2 = 407
+MIPS_INS_MFHC1 = 408
+MIPS_INS_MFHI = 409
+MIPS_INS_MFLO = 410
+MIPS_INS_MINA = 411
+MIPS_INS_MINI_S = 412
+MIPS_INS_MINI_U = 413
+MIPS_INS_MIN_A = 414
+MIPS_INS_MIN = 415
+MIPS_INS_MIN_S = 416
+MIPS_INS_MIN_U = 417
+MIPS_INS_MOD = 418
+MIPS_INS_MODSUB = 419
+MIPS_INS_MODU = 420
+MIPS_INS_MOD_S = 421
+MIPS_INS_MOD_U = 422
+MIPS_INS_MOVE = 423
+MIPS_INS_MOVEP = 424
+MIPS_INS_MOVF = 425
+MIPS_INS_MOVN = 426
+MIPS_INS_MOVT = 427
+MIPS_INS_MOVZ = 428
+MIPS_INS_MSUB = 429
+MIPS_INS_MSUBF = 430
+MIPS_INS_MSUBR_Q = 431
+MIPS_INS_MSUBU = 432
+MIPS_INS_MSUBV = 433
+MIPS_INS_MSUB_Q = 434
+MIPS_INS_MTC0 = 435
+MIPS_INS_MTC1 = 436
+MIPS_INS_MTC2 = 437
+MIPS_INS_MTHC1 = 438
+MIPS_INS_MTHI = 439
+MIPS_INS_MTHLIP = 440
+MIPS_INS_MTLO = 441
+MIPS_INS_MTM0 = 442
+MIPS_INS_MTM1 = 443
+MIPS_INS_MTM2 = 444
+MIPS_INS_MTP0 = 445
+MIPS_INS_MTP1 = 446
+MIPS_INS_MTP2 = 447
+MIPS_INS_MUH = 448
+MIPS_INS_MUHU = 449
+MIPS_INS_MULEQ_S = 450
+MIPS_INS_MULEU_S = 451
+MIPS_INS_MULQ_RS = 452
+MIPS_INS_MULQ_S = 453
+MIPS_INS_MULR_Q = 454
+MIPS_INS_MULSAQ_S = 455
+MIPS_INS_MULSA = 456
+MIPS_INS_MULT = 457
+MIPS_INS_MULTU = 458
+MIPS_INS_MULU = 459
+MIPS_INS_MULV = 460
+MIPS_INS_MUL_Q = 461
+MIPS_INS_MUL_S = 462
+MIPS_INS_NLOC = 463
+MIPS_INS_NLZC = 464
+MIPS_INS_NMADD = 465
+MIPS_INS_NMSUB = 466
+MIPS_INS_NOR = 467
+MIPS_INS_NORI = 468
+MIPS_INS_NOT16 = 469
+MIPS_INS_NOT = 470
+MIPS_INS_OR = 471
+MIPS_INS_OR16 = 472
+MIPS_INS_ORI = 473
+MIPS_INS_PACKRL = 474
+MIPS_INS_PAUSE = 475
+MIPS_INS_PCKEV = 476
+MIPS_INS_PCKOD = 477
+MIPS_INS_PCNT = 478
+MIPS_INS_PICK = 479
+MIPS_INS_POP = 480
+MIPS_INS_PRECEQU = 481
+MIPS_INS_PRECEQ = 482
+MIPS_INS_PRECEU = 483
+MIPS_INS_PRECRQU_S = 484
+MIPS_INS_PRECRQ = 485
+MIPS_INS_PRECRQ_RS = 486
+MIPS_INS_PRECR = 487
+MIPS_INS_PRECR_SRA = 488
+MIPS_INS_PRECR_SRA_R = 489
+MIPS_INS_PREF = 490
+MIPS_INS_PREPEND = 491
+MIPS_INS_RADDU = 492
+MIPS_INS_RDDSP = 493
+MIPS_INS_RDHWR = 494
+MIPS_INS_REPLV = 495
+MIPS_INS_REPL = 496
+MIPS_INS_RINT = 497
+MIPS_INS_ROTR = 498
+MIPS_INS_ROTRV = 499
+MIPS_INS_ROUND = 500
+MIPS_INS_SAT_S = 501
+MIPS_INS_SAT_U = 502
+MIPS_INS_SB = 503
+MIPS_INS_SB16 = 504
+MIPS_INS_SC = 505
+MIPS_INS_SCD = 506
+MIPS_INS_SD = 507
+MIPS_INS_SDBBP = 508
+MIPS_INS_SDBBP16 = 509
+MIPS_INS_SDC1 = 510
+MIPS_INS_SDC2 = 511
+MIPS_INS_SDC3 = 512
+MIPS_INS_SDL = 513
+MIPS_INS_SDR = 514
+MIPS_INS_SDXC1 = 515
+MIPS_INS_SEB = 516
+MIPS_INS_SEH = 517
+MIPS_INS_SELEQZ = 518
+MIPS_INS_SELNEZ = 519
+MIPS_INS_SEL = 520
+MIPS_INS_SEQ = 521
+MIPS_INS_SEQI = 522
+MIPS_INS_SH = 523
+MIPS_INS_SH16 = 524
+MIPS_INS_SHF = 525
+MIPS_INS_SHILO = 526
+MIPS_INS_SHILOV = 527
+MIPS_INS_SHLLV = 528
+MIPS_INS_SHLLV_S = 529
+MIPS_INS_SHLL = 530
+MIPS_INS_SHLL_S = 531
+MIPS_INS_SHRAV = 532
+MIPS_INS_SHRAV_R = 533
+MIPS_INS_SHRA = 534
+MIPS_INS_SHRA_R = 535
+MIPS_INS_SHRLV = 536
+MIPS_INS_SHRL = 537
+MIPS_INS_SLDI = 538
+MIPS_INS_SLD = 539
+MIPS_INS_SLL = 540
+MIPS_INS_SLL16 = 541
+MIPS_INS_SLLI = 542
+MIPS_INS_SLLV = 543
+MIPS_INS_SLT = 544
+MIPS_INS_SLTI = 545
+MIPS_INS_SLTIU = 546
+MIPS_INS_SLTU = 547
+MIPS_INS_SNE = 548
+MIPS_INS_SNEI = 549
+MIPS_INS_SPLATI = 550
+MIPS_INS_SPLAT = 551
+MIPS_INS_SRA = 552
+MIPS_INS_SRAI = 553
+MIPS_INS_SRARI = 554
+MIPS_INS_SRAR = 555
+MIPS_INS_SRAV = 556
+MIPS_INS_SRL = 557
+MIPS_INS_SRL16 = 558
+MIPS_INS_SRLI = 559
+MIPS_INS_SRLRI = 560
+MIPS_INS_SRLR = 561
+MIPS_INS_SRLV = 562
+MIPS_INS_SSNOP = 563
+MIPS_INS_ST = 564
+MIPS_INS_SUBQH = 565
+MIPS_INS_SUBQH_R = 566
+MIPS_INS_SUBQ = 567
+MIPS_INS_SUBQ_S = 568
+MIPS_INS_SUBSUS_U = 569
+MIPS_INS_SUBSUU_S = 570
+MIPS_INS_SUBS_S = 571
+MIPS_INS_SUBS_U = 572
+MIPS_INS_SUBU16 = 573
+MIPS_INS_SUBUH = 574
+MIPS_INS_SUBUH_R = 575
+MIPS_INS_SUBU = 576
+MIPS_INS_SUBU_S = 577
+MIPS_INS_SUBVI = 578
+MIPS_INS_SUBV = 579
+MIPS_INS_SUXC1 = 580
+MIPS_INS_SW = 581
+MIPS_INS_SW16 = 582
+MIPS_INS_SWC1 = 583
+MIPS_INS_SWC2 = 584
+MIPS_INS_SWC3 = 585
+MIPS_INS_SWL = 586
+MIPS_INS_SWM16 = 587
+MIPS_INS_SWM32 = 588
+MIPS_INS_SWP = 589
+MIPS_INS_SWR = 590
+MIPS_INS_SWXC1 = 591
+MIPS_INS_SYNC = 592
+MIPS_INS_SYNCI = 593
+MIPS_INS_SYSCALL = 594
+MIPS_INS_TEQ = 595
+MIPS_INS_TEQI = 596
+MIPS_INS_TGE = 597
+MIPS_INS_TGEI = 598
+MIPS_INS_TGEIU = 599
+MIPS_INS_TGEU = 600
+MIPS_INS_TLBP = 601
+MIPS_INS_TLBR = 602
+MIPS_INS_TLBWI = 603
+MIPS_INS_TLBWR = 604
+MIPS_INS_TLT = 605
+MIPS_INS_TLTI = 606
+MIPS_INS_TLTIU = 607
+MIPS_INS_TLTU = 608
+MIPS_INS_TNE = 609
+MIPS_INS_TNEI = 610
+MIPS_INS_TRUNC = 611
+MIPS_INS_V3MULU = 612
+MIPS_INS_VMM0 = 613
+MIPS_INS_VMULU = 614
+MIPS_INS_VSHF = 615
+MIPS_INS_WAIT = 616
+MIPS_INS_WRDSP = 617
+MIPS_INS_WSBH = 618
+MIPS_INS_XOR = 619
+MIPS_INS_XOR16 = 620
+MIPS_INS_XORI = 621
+
+# some alias instructions
+MIPS_INS_NOP = 622
+MIPS_INS_NEGU = 623
+
+# special instructions
+MIPS_INS_JALR_HB = 624
+MIPS_INS_JR_HB = 625
+MIPS_INS_ENDING = 626
+
+MIPS_GRP_INVALID = 0
+MIPS_GRP_JUMP = 1
+MIPS_GRP_CALL = 2
+MIPS_GRP_RET = 3
+MIPS_GRP_INT = 4
+MIPS_GRP_IRET = 5
+MIPS_GRP_PRIVILEGE = 6
+MIPS_GRP_BRANCH_RELATIVE = 7
+MIPS_GRP_BITCOUNT = 128
+MIPS_GRP_DSP = 129
+MIPS_GRP_DSPR2 = 130
+MIPS_GRP_FPIDX = 131
+MIPS_GRP_MSA = 132
+MIPS_GRP_MIPS32R2 = 133
+MIPS_GRP_MIPS64 = 134
+MIPS_GRP_MIPS64R2 = 135
+MIPS_GRP_SEINREG = 136
+MIPS_GRP_STDENC = 137
+MIPS_GRP_SWAP = 138
+MIPS_GRP_MICROMIPS = 139
+MIPS_GRP_MIPS16MODE = 140
+MIPS_GRP_FP64BIT = 141
+MIPS_GRP_NONANSFPMATH = 142
+MIPS_GRP_NOTFP64BIT = 143
+MIPS_GRP_NOTINMICROMIPS = 144
+MIPS_GRP_NOTNACL = 145
+MIPS_GRP_NOTMIPS32R6 = 146
+MIPS_GRP_NOTMIPS64R6 = 147
+MIPS_GRP_CNMIPS = 148
+MIPS_GRP_MIPS32 = 149
+MIPS_GRP_MIPS32R6 = 150
+MIPS_GRP_MIPS64R6 = 151
+MIPS_GRP_MIPS2 = 152
+MIPS_GRP_MIPS3 = 153
+MIPS_GRP_MIPS3_32 = 154
+MIPS_GRP_MIPS3_32R2 = 155
+MIPS_GRP_MIPS4_32 = 156
+MIPS_GRP_MIPS4_32R2 = 157
+MIPS_GRP_MIPS5_32R2 = 158
+MIPS_GRP_GP32BIT = 159
+MIPS_GRP_GP64BIT = 160
+MIPS_GRP_ENDING = 161
diff --git a/capstone/bindings/python/capstone/mos65xx.py b/capstone/bindings/python/capstone/mos65xx.py
new file mode 100644
index 000000000..11b3462a5
--- /dev/null
+++ b/capstone/bindings/python/capstone/mos65xx.py
@@ -0,0 +1,45 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .mos65xx_const import *
+
+# define the API
+class MOS65xxOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_uint8),
+        ('mem', ctypes.c_uint16),
+    )
+
+class MOS65xxOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', MOS65xxOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsMOS65xx(ctypes.Structure):
+    _fields_ = (
+        ('am', ctypes.c_uint),
+        ('modifies_flags', ctypes.c_uint8),
+        ('op_count', ctypes.c_uint8),
+        ('operands', MOS65xxOp * 3),
+    )
+
+def get_arch_info(a):
+    return (a.am, a.modifies_flags, copy_ctypes_list(a.operands[:a.op_count]))
+
+
diff --git a/capstone/bindings/python/capstone/mos65xx_const.py b/capstone/bindings/python/capstone/mos65xx_const.py
new file mode 100644
index 000000000..44c807a38
--- /dev/null
+++ b/capstone/bindings/python/capstone/mos65xx_const.py
@@ -0,0 +1,152 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mos65xx_const.py]
+
+MOS65XX_REG_INVALID = 0
+MOS65XX_REG_ACC = 1
+MOS65XX_REG_X = 2
+MOS65XX_REG_Y = 3
+MOS65XX_REG_P = 4
+MOS65XX_REG_SP = 5
+MOS65XX_REG_DP = 6
+MOS65XX_REG_B = 7
+MOS65XX_REG_K = 8
+MOS65XX_REG_ENDING = 9
+
+MOS65XX_AM_NONE = 0
+MOS65XX_AM_IMP = 1
+MOS65XX_AM_ACC = 2
+MOS65XX_AM_IMM = 3
+MOS65XX_AM_REL = 4
+MOS65XX_AM_INT = 5
+MOS65XX_AM_BLOCK = 6
+MOS65XX_AM_ZP = 7
+MOS65XX_AM_ZP_X = 8
+MOS65XX_AM_ZP_Y = 9
+MOS65XX_AM_ZP_REL = 10
+MOS65XX_AM_ZP_IND = 11
+MOS65XX_AM_ZP_X_IND = 12
+MOS65XX_AM_ZP_IND_Y = 13
+MOS65XX_AM_ZP_IND_LONG = 14
+MOS65XX_AM_ZP_IND_LONG_Y = 15
+MOS65XX_AM_ABS = 16
+MOS65XX_AM_ABS_X = 17
+MOS65XX_AM_ABS_Y = 18
+MOS65XX_AM_ABS_IND = 19
+MOS65XX_AM_ABS_X_IND = 20
+MOS65XX_AM_ABS_IND_LONG = 21
+MOS65XX_AM_ABS_LONG = 22
+MOS65XX_AM_ABS_LONG_X = 23
+MOS65XX_AM_SR = 24
+MOS65XX_AM_SR_IND_Y = 25
+
+MOS65XX_INS_INVALID = 0
+MOS65XX_INS_ADC = 1
+MOS65XX_INS_AND = 2
+MOS65XX_INS_ASL = 3
+MOS65XX_INS_BBR = 4
+MOS65XX_INS_BBS = 5
+MOS65XX_INS_BCC = 6
+MOS65XX_INS_BCS = 7
+MOS65XX_INS_BEQ = 8
+MOS65XX_INS_BIT = 9
+MOS65XX_INS_BMI = 10
+MOS65XX_INS_BNE = 11
+MOS65XX_INS_BPL = 12
+MOS65XX_INS_BRA = 13
+MOS65XX_INS_BRK = 14
+MOS65XX_INS_BRL = 15
+MOS65XX_INS_BVC = 16
+MOS65XX_INS_BVS = 17
+MOS65XX_INS_CLC = 18
+MOS65XX_INS_CLD = 19
+MOS65XX_INS_CLI = 20
+MOS65XX_INS_CLV = 21
+MOS65XX_INS_CMP = 22
+MOS65XX_INS_COP = 23
+MOS65XX_INS_CPX = 24
+MOS65XX_INS_CPY = 25
+MOS65XX_INS_DEC = 26
+MOS65XX_INS_DEX = 27
+MOS65XX_INS_DEY = 28
+MOS65XX_INS_EOR = 29
+MOS65XX_INS_INC = 30
+MOS65XX_INS_INX = 31
+MOS65XX_INS_INY = 32
+MOS65XX_INS_JML = 33
+MOS65XX_INS_JMP = 34
+MOS65XX_INS_JSL = 35
+MOS65XX_INS_JSR = 36
+MOS65XX_INS_LDA = 37
+MOS65XX_INS_LDX = 38
+MOS65XX_INS_LDY = 39
+MOS65XX_INS_LSR = 40
+MOS65XX_INS_MVN = 41
+MOS65XX_INS_MVP = 42
+MOS65XX_INS_NOP = 43
+MOS65XX_INS_ORA = 44
+MOS65XX_INS_PEA = 45
+MOS65XX_INS_PEI = 46
+MOS65XX_INS_PER = 47
+MOS65XX_INS_PHA = 48
+MOS65XX_INS_PHB = 49
+MOS65XX_INS_PHD = 50
+MOS65XX_INS_PHK = 51
+MOS65XX_INS_PHP = 52
+MOS65XX_INS_PHX = 53
+MOS65XX_INS_PHY = 54
+MOS65XX_INS_PLA = 55
+MOS65XX_INS_PLB = 56
+MOS65XX_INS_PLD = 57
+MOS65XX_INS_PLP = 58
+MOS65XX_INS_PLX = 59
+MOS65XX_INS_PLY = 60
+MOS65XX_INS_REP = 61
+MOS65XX_INS_RMB = 62
+MOS65XX_INS_ROL = 63
+MOS65XX_INS_ROR = 64
+MOS65XX_INS_RTI = 65
+MOS65XX_INS_RTL = 66
+MOS65XX_INS_RTS = 67
+MOS65XX_INS_SBC = 68
+MOS65XX_INS_SEC = 69
+MOS65XX_INS_SED = 70
+MOS65XX_INS_SEI = 71
+MOS65XX_INS_SEP = 72
+MOS65XX_INS_SMB = 73
+MOS65XX_INS_STA = 74
+MOS65XX_INS_STP = 75
+MOS65XX_INS_STX = 76
+MOS65XX_INS_STY = 77
+MOS65XX_INS_STZ = 78
+MOS65XX_INS_TAX = 79
+MOS65XX_INS_TAY = 80
+MOS65XX_INS_TCD = 81
+MOS65XX_INS_TCS = 82
+MOS65XX_INS_TDC = 83
+MOS65XX_INS_TRB = 84
+MOS65XX_INS_TSB = 85
+MOS65XX_INS_TSC = 86
+MOS65XX_INS_TSX = 87
+MOS65XX_INS_TXA = 88
+MOS65XX_INS_TXS = 89
+MOS65XX_INS_TXY = 90
+MOS65XX_INS_TYA = 91
+MOS65XX_INS_TYX = 92
+MOS65XX_INS_WAI = 93
+MOS65XX_INS_WDM = 94
+MOS65XX_INS_XBA = 95
+MOS65XX_INS_XCE = 96
+MOS65XX_INS_ENDING = 97
+
+MOS65XX_GRP_INVALID = 0
+MOS65XX_GRP_JUMP = 1
+MOS65XX_GRP_CALL = 2
+MOS65XX_GRP_RET = 3
+MOS65XX_GRP_INT = 4
+MOS65XX_GRP_IRET = 5
+MOS65XX_GRP_BRANCH_RELATIVE = 6
+MOS65XX_GRP_ENDING = 7
+
+MOS65XX_OP_INVALID = 0
+MOS65XX_OP_REG = 1
+MOS65XX_OP_IMM = 2
+MOS65XX_OP_MEM = 3
diff --git a/capstone/bindings/python/capstone/ppc.py b/capstone/bindings/python/capstone/ppc.py
new file mode 100644
index 000000000..6ab177db1
--- /dev/null
+++ b/capstone/bindings/python/capstone/ppc.py
@@ -0,0 +1,63 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .ppc_const import *
+
+# define the API
+class PpcOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint),
+        ('disp', ctypes.c_int32),
+    )
+
+class PpcOpCrx(ctypes.Structure):
+    _fields_ = (
+        ('scale', ctypes.c_uint),
+        ('reg', ctypes.c_uint),
+        ('cond', ctypes.c_uint),
+    )
+
+class PpcOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', PpcOpMem),
+        ('crx', PpcOpCrx),
+    )
+
+class PpcOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', PpcOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+    @property
+    def crx(self):
+        return self.value.crx
+
+
+class CsPpc(ctypes.Structure):
+    _fields_ = (
+        ('bc', ctypes.c_uint),
+        ('bh', ctypes.c_uint),
+        ('update_cr0', ctypes.c_bool),
+        ('op_count', ctypes.c_uint8),
+        ('operands', PpcOp * 8),
+    )
+
+def get_arch_info(a):
+    return (a.bc, a.bh, a.update_cr0, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/ppc_const.py b/capstone/bindings/python/capstone/ppc_const.py
new file mode 100644
index 000000000..d2cf70301
--- /dev/null
+++ b/capstone/bindings/python/capstone/ppc_const.py
@@ -0,0 +1,1976 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.py]
+
+PPC_BC_INVALID = 0
+PPC_BC_LT = (0<<5)|12
+PPC_BC_LE = (1<<5)|4
+PPC_BC_EQ = (2<<5)|12
+PPC_BC_GE = (0<<5)|4
+PPC_BC_GT = (1<<5)|12
+PPC_BC_NE = (2<<5)|4
+PPC_BC_UN = (3<<5)|12
+PPC_BC_NU = (3<<5)|4
+PPC_BC_SO = (4<<5)|12
+PPC_BC_NS = (4<<5)|4
+
+PPC_BH_INVALID = 0
+PPC_BH_PLUS = 1
+PPC_BH_MINUS = 2
+
+PPC_OP_INVALID = 0
+PPC_OP_REG = 1
+PPC_OP_IMM = 2
+PPC_OP_MEM = 3
+PPC_OP_CRX = 64
+
+PPC_REG_INVALID = 0
+PPC_REG_CARRY = 2
+PPC_REG_CTR = 3
+PPC_REG_LR = 5
+PPC_REG_RM = 6
+PPC_REG_VRSAVE = 8
+PPC_REG_XER = 9
+PPC_REG_ZERO = 10
+PPC_REG_CR0 = 12
+PPC_REG_CR1 = 13
+PPC_REG_CR2 = 14
+PPC_REG_CR3 = 15
+PPC_REG_CR4 = 16
+PPC_REG_CR5 = 17
+PPC_REG_CR6 = 18
+PPC_REG_CR7 = 19
+PPC_REG_CTR8 = 20
+PPC_REG_F0 = 21
+PPC_REG_F1 = 22
+PPC_REG_F2 = 23
+PPC_REG_F3 = 24
+PPC_REG_F4 = 25
+PPC_REG_F5 = 26
+PPC_REG_F6 = 27
+PPC_REG_F7 = 28
+PPC_REG_F8 = 29
+PPC_REG_F9 = 30
+PPC_REG_F10 = 31
+PPC_REG_F11 = 32
+PPC_REG_F12 = 33
+PPC_REG_F13 = 34
+PPC_REG_F14 = 35
+PPC_REG_F15 = 36
+PPC_REG_F16 = 37
+PPC_REG_F17 = 38
+PPC_REG_F18 = 39
+PPC_REG_F19 = 40
+PPC_REG_F20 = 41
+PPC_REG_F21 = 42
+PPC_REG_F22 = 43
+PPC_REG_F23 = 44
+PPC_REG_F24 = 45
+PPC_REG_F25 = 46
+PPC_REG_F26 = 47
+PPC_REG_F27 = 48
+PPC_REG_F28 = 49
+PPC_REG_F29 = 50
+PPC_REG_F30 = 51
+PPC_REG_F31 = 52
+PPC_REG_LR8 = 54
+PPC_REG_Q0 = 55
+PPC_REG_Q1 = 56
+PPC_REG_Q2 = 57
+PPC_REG_Q3 = 58
+PPC_REG_Q4 = 59
+PPC_REG_Q5 = 60
+PPC_REG_Q6 = 61
+PPC_REG_Q7 = 62
+PPC_REG_Q8 = 63
+PPC_REG_Q9 = 64
+PPC_REG_Q10 = 65
+PPC_REG_Q11 = 66
+PPC_REG_Q12 = 67
+PPC_REG_Q13 = 68
+PPC_REG_Q14 = 69
+PPC_REG_Q15 = 70
+PPC_REG_Q16 = 71
+PPC_REG_Q17 = 72
+PPC_REG_Q18 = 73
+PPC_REG_Q19 = 74
+PPC_REG_Q20 = 75
+PPC_REG_Q21 = 76
+PPC_REG_Q22 = 77
+PPC_REG_Q23 = 78
+PPC_REG_Q24 = 79
+PPC_REG_Q25 = 80
+PPC_REG_Q26 = 81
+PPC_REG_Q27 = 82
+PPC_REG_Q28 = 83
+PPC_REG_Q29 = 84
+PPC_REG_Q30 = 85
+PPC_REG_Q31 = 86
+PPC_REG_R0 = 87
+PPC_REG_R1 = 88
+PPC_REG_R2 = 89
+PPC_REG_R3 = 90
+PPC_REG_R4 = 91
+PPC_REG_R5 = 92
+PPC_REG_R6 = 93
+PPC_REG_R7 = 94
+PPC_REG_R8 = 95
+PPC_REG_R9 = 96
+PPC_REG_R10 = 97
+PPC_REG_R11 = 98
+PPC_REG_R12 = 99
+PPC_REG_R13 = 100
+PPC_REG_R14 = 101
+PPC_REG_R15 = 102
+PPC_REG_R16 = 103
+PPC_REG_R17 = 104
+PPC_REG_R18 = 105
+PPC_REG_R19 = 106
+PPC_REG_R20 = 107
+PPC_REG_R21 = 108
+PPC_REG_R22 = 109
+PPC_REG_R23 = 110
+PPC_REG_R24 = 111
+PPC_REG_R25 = 112
+PPC_REG_R26 = 113
+PPC_REG_R27 = 114
+PPC_REG_R28 = 115
+PPC_REG_R29 = 116
+PPC_REG_R30 = 117
+PPC_REG_R31 = 118
+PPC_REG_V0 = 151
+PPC_REG_V1 = 152
+PPC_REG_V2 = 153
+PPC_REG_V3 = 154
+PPC_REG_V4 = 155
+PPC_REG_V5 = 156
+PPC_REG_V6 = 157
+PPC_REG_V7 = 158
+PPC_REG_V8 = 159
+PPC_REG_V9 = 160
+PPC_REG_V10 = 161
+PPC_REG_V11 = 162
+PPC_REG_V12 = 163
+PPC_REG_V13 = 164
+PPC_REG_V14 = 165
+PPC_REG_V15 = 166
+PPC_REG_V16 = 167
+PPC_REG_V17 = 168
+PPC_REG_V18 = 169
+PPC_REG_V19 = 170
+PPC_REG_V20 = 171
+PPC_REG_V21 = 172
+PPC_REG_V22 = 173
+PPC_REG_V23 = 174
+PPC_REG_V24 = 175
+PPC_REG_V25 = 176
+PPC_REG_V26 = 177
+PPC_REG_V27 = 178
+PPC_REG_V28 = 179
+PPC_REG_V29 = 180
+PPC_REG_V30 = 181
+PPC_REG_V31 = 182
+PPC_REG_VS0 = 215
+PPC_REG_VS1 = 216
+PPC_REG_VS2 = 217
+PPC_REG_VS3 = 218
+PPC_REG_VS4 = 219
+PPC_REG_VS5 = 220
+PPC_REG_VS6 = 221
+PPC_REG_VS7 = 222
+PPC_REG_VS8 = 223
+PPC_REG_VS9 = 224
+PPC_REG_VS10 = 225
+PPC_REG_VS11 = 226
+PPC_REG_VS12 = 227
+PPC_REG_VS13 = 228
+PPC_REG_VS14 = 229
+PPC_REG_VS15 = 230
+PPC_REG_VS16 = 231
+PPC_REG_VS17 = 232
+PPC_REG_VS18 = 233
+PPC_REG_VS19 = 234
+PPC_REG_VS20 = 235
+PPC_REG_VS21 = 236
+PPC_REG_VS22 = 237
+PPC_REG_VS23 = 238
+PPC_REG_VS24 = 239
+PPC_REG_VS25 = 240
+PPC_REG_VS26 = 241
+PPC_REG_VS27 = 242
+PPC_REG_VS28 = 243
+PPC_REG_VS29 = 244
+PPC_REG_VS30 = 245
+PPC_REG_VS31 = 246
+PPC_REG_VS32 = 247
+PPC_REG_VS33 = 248
+PPC_REG_VS34 = 249
+PPC_REG_VS35 = 250
+PPC_REG_VS36 = 251
+PPC_REG_VS37 = 252
+PPC_REG_VS38 = 253
+PPC_REG_VS39 = 254
+PPC_REG_VS40 = 255
+PPC_REG_VS41 = 256
+PPC_REG_VS42 = 257
+PPC_REG_VS43 = 258
+PPC_REG_VS44 = 259
+PPC_REG_VS45 = 260
+PPC_REG_VS46 = 261
+PPC_REG_VS47 = 262
+PPC_REG_VS48 = 263
+PPC_REG_VS49 = 264
+PPC_REG_VS50 = 265
+PPC_REG_VS51 = 266
+PPC_REG_VS52 = 267
+PPC_REG_VS53 = 268
+PPC_REG_VS54 = 269
+PPC_REG_VS55 = 270
+PPC_REG_VS56 = 271
+PPC_REG_VS57 = 272
+PPC_REG_VS58 = 273
+PPC_REG_VS59 = 274
+PPC_REG_VS60 = 275
+PPC_REG_VS61 = 276
+PPC_REG_VS62 = 277
+PPC_REG_VS63 = 278
+PPC_REG_CR0EQ = 312
+PPC_REG_CR1EQ = 313
+PPC_REG_CR2EQ = 314
+PPC_REG_CR3EQ = 315
+PPC_REG_CR4EQ = 316
+PPC_REG_CR5EQ = 317
+PPC_REG_CR6EQ = 318
+PPC_REG_CR7EQ = 319
+PPC_REG_CR0GT = 320
+PPC_REG_CR1GT = 321
+PPC_REG_CR2GT = 322
+PPC_REG_CR3GT = 323
+PPC_REG_CR4GT = 324
+PPC_REG_CR5GT = 325
+PPC_REG_CR6GT = 326
+PPC_REG_CR7GT = 327
+PPC_REG_CR0LT = 328
+PPC_REG_CR1LT = 329
+PPC_REG_CR2LT = 330
+PPC_REG_CR3LT = 331
+PPC_REG_CR4LT = 332
+PPC_REG_CR5LT = 333
+PPC_REG_CR6LT = 334
+PPC_REG_CR7LT = 335
+PPC_REG_CR0UN = 336
+PPC_REG_CR1UN = 337
+PPC_REG_CR2UN = 338
+PPC_REG_CR3UN = 339
+PPC_REG_CR4UN = 340
+PPC_REG_CR5UN = 341
+PPC_REG_CR6UN = 342
+PPC_REG_CR7UN = 343
+PPC_REG_ENDING = 344
+
+PPC_INS_INVALID = 0
+PPC_INS_ADD = 1
+PPC_INS_ADDC = 2
+PPC_INS_ADDE = 3
+PPC_INS_ADDI = 4
+PPC_INS_ADDIC = 5
+PPC_INS_ADDIS = 6
+PPC_INS_ADDME = 7
+PPC_INS_ADDPCIS = 8
+PPC_INS_ADDZE = 9
+PPC_INS_AND = 10
+PPC_INS_ANDC = 11
+PPC_INS_ANDI = 12
+PPC_INS_ANDIS = 13
+PPC_INS_ATTN = 14
+PPC_INS_B = 15
+PPC_INS_BA = 16
+PPC_INS_BC = 17
+PPC_INS_BCA = 18
+PPC_INS_BCCTR = 19
+PPC_INS_BCCTRL = 20
+PPC_INS_BCDCFN = 21
+PPC_INS_BCDCFSQ = 22
+PPC_INS_BCDCFZ = 23
+PPC_INS_BCDCPSGN = 24
+PPC_INS_BCDCTN = 25
+PPC_INS_BCDCTSQ = 26
+PPC_INS_BCDCTZ = 27
+PPC_INS_BCDS = 28
+PPC_INS_BCDSETSGN = 29
+PPC_INS_BCDSR = 30
+PPC_INS_BCDTRUNC = 31
+PPC_INS_BCDUS = 32
+PPC_INS_BCDUTRUNC = 33
+PPC_INS_BCL = 34
+PPC_INS_BCLA = 35
+PPC_INS_BCLR = 36
+PPC_INS_BCLRL = 37
+PPC_INS_BCTR = 38
+PPC_INS_BCTRL = 39
+PPC_INS_BDNZ = 40
+PPC_INS_BDNZA = 41
+PPC_INS_BDNZF = 42
+PPC_INS_BDNZFA = 43
+PPC_INS_BDNZFL = 44
+PPC_INS_BDNZFLA = 45
+PPC_INS_BDNZFLR = 46
+PPC_INS_BDNZFLRL = 47
+PPC_INS_BDNZL = 48
+PPC_INS_BDNZLA = 49
+PPC_INS_BDNZLR = 50
+PPC_INS_BDNZLRL = 51
+PPC_INS_BDNZT = 52
+PPC_INS_BDNZTA = 53
+PPC_INS_BDNZTL = 54
+PPC_INS_BDNZTLA = 55
+PPC_INS_BDNZTLR = 56
+PPC_INS_BDNZTLRL = 57
+PPC_INS_BDZ = 58
+PPC_INS_BDZA = 59
+PPC_INS_BDZF = 60
+PPC_INS_BDZFA = 61
+PPC_INS_BDZFL = 62
+PPC_INS_BDZFLA = 63
+PPC_INS_BDZFLR = 64
+PPC_INS_BDZFLRL = 65
+PPC_INS_BDZL = 66
+PPC_INS_BDZLA = 67
+PPC_INS_BDZLR = 68
+PPC_INS_BDZLRL = 69
+PPC_INS_BDZT = 70
+PPC_INS_BDZTA = 71
+PPC_INS_BDZTL = 72
+PPC_INS_BDZTLA = 73
+PPC_INS_BDZTLR = 74
+PPC_INS_BDZTLRL = 75
+PPC_INS_BEQ = 76
+PPC_INS_BEQA = 77
+PPC_INS_BEQCTR = 78
+PPC_INS_BEQCTRL = 79
+PPC_INS_BEQL = 80
+PPC_INS_BEQLA = 81
+PPC_INS_BEQLR = 82
+PPC_INS_BEQLRL = 83
+PPC_INS_BF = 84
+PPC_INS_BFA = 85
+PPC_INS_BFCTR = 86
+PPC_INS_BFCTRL = 87
+PPC_INS_BFL = 88
+PPC_INS_BFLA = 89
+PPC_INS_BFLR = 90
+PPC_INS_BFLRL = 91
+PPC_INS_BGE = 92
+PPC_INS_BGEA = 93
+PPC_INS_BGECTR = 94
+PPC_INS_BGECTRL = 95
+PPC_INS_BGEL = 96
+PPC_INS_BGELA = 97
+PPC_INS_BGELR = 98
+PPC_INS_BGELRL = 99
+PPC_INS_BGT = 100
+PPC_INS_BGTA = 101
+PPC_INS_BGTCTR = 102
+PPC_INS_BGTCTRL = 103
+PPC_INS_BGTL = 104
+PPC_INS_BGTLA = 105
+PPC_INS_BGTLR = 106
+PPC_INS_BGTLRL = 107
+PPC_INS_BL = 108
+PPC_INS_BLA = 109
+PPC_INS_BLE = 110
+PPC_INS_BLEA = 111
+PPC_INS_BLECTR = 112
+PPC_INS_BLECTRL = 113
+PPC_INS_BLEL = 114
+PPC_INS_BLELA = 115
+PPC_INS_BLELR = 116
+PPC_INS_BLELRL = 117
+PPC_INS_BLR = 118
+PPC_INS_BLRL = 119
+PPC_INS_BLT = 120
+PPC_INS_BLTA = 121
+PPC_INS_BLTCTR = 122
+PPC_INS_BLTCTRL = 123
+PPC_INS_BLTL = 124
+PPC_INS_BLTLA = 125
+PPC_INS_BLTLR = 126
+PPC_INS_BLTLRL = 127
+PPC_INS_BNE = 128
+PPC_INS_BNEA = 129
+PPC_INS_BNECTR = 130
+PPC_INS_BNECTRL = 131
+PPC_INS_BNEL = 132
+PPC_INS_BNELA = 133
+PPC_INS_BNELR = 134
+PPC_INS_BNELRL = 135
+PPC_INS_BNG = 136
+PPC_INS_BNGA = 137
+PPC_INS_BNGCTR = 138
+PPC_INS_BNGCTRL = 139
+PPC_INS_BNGL = 140
+PPC_INS_BNGLA = 141
+PPC_INS_BNGLR = 142
+PPC_INS_BNGLRL = 143
+PPC_INS_BNL = 144
+PPC_INS_BNLA = 145
+PPC_INS_BNLCTR = 146
+PPC_INS_BNLCTRL = 147
+PPC_INS_BNLL = 148
+PPC_INS_BNLLA = 149
+PPC_INS_BNLLR = 150
+PPC_INS_BNLLRL = 151
+PPC_INS_BNS = 152
+PPC_INS_BNSA = 153
+PPC_INS_BNSCTR = 154
+PPC_INS_BNSCTRL = 155
+PPC_INS_BNSL = 156
+PPC_INS_BNSLA = 157
+PPC_INS_BNSLR = 158
+PPC_INS_BNSLRL = 159
+PPC_INS_BNU = 160
+PPC_INS_BNUA = 161
+PPC_INS_BNUCTR = 162
+PPC_INS_BNUCTRL = 163
+PPC_INS_BNUL = 164
+PPC_INS_BNULA = 165
+PPC_INS_BNULR = 166
+PPC_INS_BNULRL = 167
+PPC_INS_BPERMD = 168
+PPC_INS_BRINC = 169
+PPC_INS_BSO = 170
+PPC_INS_BSOA = 171
+PPC_INS_BSOCTR = 172
+PPC_INS_BSOCTRL = 173
+PPC_INS_BSOL = 174
+PPC_INS_BSOLA = 175
+PPC_INS_BSOLR = 176
+PPC_INS_BSOLRL = 177
+PPC_INS_BT = 178
+PPC_INS_BTA = 179
+PPC_INS_BTCTR = 180
+PPC_INS_BTCTRL = 181
+PPC_INS_BTL = 182
+PPC_INS_BTLA = 183
+PPC_INS_BTLR = 184
+PPC_INS_BTLRL = 185
+PPC_INS_BUN = 186
+PPC_INS_BUNA = 187
+PPC_INS_BUNCTR = 188
+PPC_INS_BUNCTRL = 189
+PPC_INS_BUNL = 190
+PPC_INS_BUNLA = 191
+PPC_INS_BUNLR = 192
+PPC_INS_BUNLRL = 193
+PPC_INS_CLRBHRB = 194
+PPC_INS_CLRLDI = 195
+PPC_INS_CLRLSLDI = 196
+PPC_INS_CLRLSLWI = 197
+PPC_INS_CLRLWI = 198
+PPC_INS_CLRRDI = 199
+PPC_INS_CLRRWI = 200
+PPC_INS_CMP = 201
+PPC_INS_CMPB = 202
+PPC_INS_CMPD = 203
+PPC_INS_CMPDI = 204
+PPC_INS_CMPEQB = 205
+PPC_INS_CMPI = 206
+PPC_INS_CMPL = 207
+PPC_INS_CMPLD = 208
+PPC_INS_CMPLDI = 209
+PPC_INS_CMPLI = 210
+PPC_INS_CMPLW = 211
+PPC_INS_CMPLWI = 212
+PPC_INS_CMPRB = 213
+PPC_INS_CMPW = 214
+PPC_INS_CMPWI = 215
+PPC_INS_CNTLZD = 216
+PPC_INS_CNTLZW = 217
+PPC_INS_CNTTZD = 218
+PPC_INS_CNTTZW = 219
+PPC_INS_COPY = 220
+PPC_INS_COPY_FIRST = 221
+PPC_INS_CP_ABORT = 222
+PPC_INS_CRAND = 223
+PPC_INS_CRANDC = 224
+PPC_INS_CRCLR = 225
+PPC_INS_CREQV = 226
+PPC_INS_CRMOVE = 227
+PPC_INS_CRNAND = 228
+PPC_INS_CRNOR = 229
+PPC_INS_CRNOT = 230
+PPC_INS_CROR = 231
+PPC_INS_CRORC = 232
+PPC_INS_CRSET = 233
+PPC_INS_CRXOR = 234
+PPC_INS_DARN = 235
+PPC_INS_DCBA = 236
+PPC_INS_DCBF = 237
+PPC_INS_DCBFEP = 238
+PPC_INS_DCBFL = 239
+PPC_INS_DCBFLP = 240
+PPC_INS_DCBI = 241
+PPC_INS_DCBST = 242
+PPC_INS_DCBSTEP = 243
+PPC_INS_DCBT = 244
+PPC_INS_DCBTCT = 245
+PPC_INS_DCBTDS = 246
+PPC_INS_DCBTEP = 247
+PPC_INS_DCBTST = 248
+PPC_INS_DCBTSTCT = 249
+PPC_INS_DCBTSTDS = 250
+PPC_INS_DCBTSTEP = 251
+PPC_INS_DCBTSTT = 252
+PPC_INS_DCBTT = 253
+PPC_INS_DCBZ = 254
+PPC_INS_DCBZEP = 255
+PPC_INS_DCBZL = 256
+PPC_INS_DCBZLEP = 257
+PPC_INS_DCCCI = 258
+PPC_INS_DCI = 259
+PPC_INS_DIVD = 260
+PPC_INS_DIVDE = 261
+PPC_INS_DIVDEU = 262
+PPC_INS_DIVDU = 263
+PPC_INS_DIVW = 264
+PPC_INS_DIVWE = 265
+PPC_INS_DIVWEU = 266
+PPC_INS_DIVWU = 267
+PPC_INS_DSS = 268
+PPC_INS_DSSALL = 269
+PPC_INS_DST = 270
+PPC_INS_DSTST = 271
+PPC_INS_DSTSTT = 272
+PPC_INS_DSTT = 273
+PPC_INS_EFDABS = 274
+PPC_INS_EFDADD = 275
+PPC_INS_EFDCFS = 276
+PPC_INS_EFDCFSF = 277
+PPC_INS_EFDCFSI = 278
+PPC_INS_EFDCFSID = 279
+PPC_INS_EFDCFUF = 280
+PPC_INS_EFDCFUI = 281
+PPC_INS_EFDCFUID = 282
+PPC_INS_EFDCMPEQ = 283
+PPC_INS_EFDCMPGT = 284
+PPC_INS_EFDCMPLT = 285
+PPC_INS_EFDCTSF = 286
+PPC_INS_EFDCTSI = 287
+PPC_INS_EFDCTSIDZ = 288
+PPC_INS_EFDCTSIZ = 289
+PPC_INS_EFDCTUF = 290
+PPC_INS_EFDCTUI = 291
+PPC_INS_EFDCTUIDZ = 292
+PPC_INS_EFDCTUIZ = 293
+PPC_INS_EFDDIV = 294
+PPC_INS_EFDMUL = 295
+PPC_INS_EFDNABS = 296
+PPC_INS_EFDNEG = 297
+PPC_INS_EFDSUB = 298
+PPC_INS_EFDTSTEQ = 299
+PPC_INS_EFDTSTGT = 300
+PPC_INS_EFDTSTLT = 301
+PPC_INS_EFSABS = 302
+PPC_INS_EFSADD = 303
+PPC_INS_EFSCFD = 304
+PPC_INS_EFSCFSF = 305
+PPC_INS_EFSCFSI = 306
+PPC_INS_EFSCFUF = 307
+PPC_INS_EFSCFUI = 308
+PPC_INS_EFSCMPEQ = 309
+PPC_INS_EFSCMPGT = 310
+PPC_INS_EFSCMPLT = 311
+PPC_INS_EFSCTSF = 312
+PPC_INS_EFSCTSI = 313
+PPC_INS_EFSCTSIZ = 314
+PPC_INS_EFSCTUF = 315
+PPC_INS_EFSCTUI = 316
+PPC_INS_EFSCTUIZ = 317
+PPC_INS_EFSDIV = 318
+PPC_INS_EFSMUL = 319
+PPC_INS_EFSNABS = 320
+PPC_INS_EFSNEG = 321
+PPC_INS_EFSSUB = 322
+PPC_INS_EFSTSTEQ = 323
+PPC_INS_EFSTSTGT = 324
+PPC_INS_EFSTSTLT = 325
+PPC_INS_EIEIO = 326
+PPC_INS_EQV = 327
+PPC_INS_EVABS = 328
+PPC_INS_EVADDIW = 329
+PPC_INS_EVADDSMIAAW = 330
+PPC_INS_EVADDSSIAAW = 331
+PPC_INS_EVADDUMIAAW = 332
+PPC_INS_EVADDUSIAAW = 333
+PPC_INS_EVADDW = 334
+PPC_INS_EVAND = 335
+PPC_INS_EVANDC = 336
+PPC_INS_EVCMPEQ = 337
+PPC_INS_EVCMPGTS = 338
+PPC_INS_EVCMPGTU = 339
+PPC_INS_EVCMPLTS = 340
+PPC_INS_EVCMPLTU = 341
+PPC_INS_EVCNTLSW = 342
+PPC_INS_EVCNTLZW = 343
+PPC_INS_EVDIVWS = 344
+PPC_INS_EVDIVWU = 345
+PPC_INS_EVEQV = 346
+PPC_INS_EVEXTSB = 347
+PPC_INS_EVEXTSH = 348
+PPC_INS_EVFSABS = 349
+PPC_INS_EVFSADD = 350
+PPC_INS_EVFSCFSF = 351
+PPC_INS_EVFSCFSI = 352
+PPC_INS_EVFSCFUF = 353
+PPC_INS_EVFSCFUI = 354
+PPC_INS_EVFSCMPEQ = 355
+PPC_INS_EVFSCMPGT = 356
+PPC_INS_EVFSCMPLT = 357
+PPC_INS_EVFSCTSF = 358
+PPC_INS_EVFSCTSI = 359
+PPC_INS_EVFSCTSIZ = 360
+PPC_INS_EVFSCTUI = 361
+PPC_INS_EVFSDIV = 362
+PPC_INS_EVFSMUL = 363
+PPC_INS_EVFSNABS = 364
+PPC_INS_EVFSNEG = 365
+PPC_INS_EVFSSUB = 366
+PPC_INS_EVFSTSTEQ = 367
+PPC_INS_EVFSTSTGT = 368
+PPC_INS_EVFSTSTLT = 369
+PPC_INS_EVLDD = 370
+PPC_INS_EVLDDX = 371
+PPC_INS_EVLDH = 372
+PPC_INS_EVLDHX = 373
+PPC_INS_EVLDW = 374
+PPC_INS_EVLDWX = 375
+PPC_INS_EVLHHESPLAT = 376
+PPC_INS_EVLHHESPLATX = 377
+PPC_INS_EVLHHOSSPLAT = 378
+PPC_INS_EVLHHOSSPLATX = 379
+PPC_INS_EVLHHOUSPLAT = 380
+PPC_INS_EVLHHOUSPLATX = 381
+PPC_INS_EVLWHE = 382
+PPC_INS_EVLWHEX = 383
+PPC_INS_EVLWHOS = 384
+PPC_INS_EVLWHOSX = 385
+PPC_INS_EVLWHOU = 386
+PPC_INS_EVLWHOUX = 387
+PPC_INS_EVLWHSPLAT = 388
+PPC_INS_EVLWHSPLATX = 389
+PPC_INS_EVLWWSPLAT = 390
+PPC_INS_EVLWWSPLATX = 391
+PPC_INS_EVMERGEHI = 392
+PPC_INS_EVMERGEHILO = 393
+PPC_INS_EVMERGELO = 394
+PPC_INS_EVMERGELOHI = 395
+PPC_INS_EVMHEGSMFAA = 396
+PPC_INS_EVMHEGSMFAN = 397
+PPC_INS_EVMHEGSMIAA = 398
+PPC_INS_EVMHEGSMIAN = 399
+PPC_INS_EVMHEGUMIAA = 400
+PPC_INS_EVMHEGUMIAN = 401
+PPC_INS_EVMHESMF = 402
+PPC_INS_EVMHESMFA = 403
+PPC_INS_EVMHESMFAAW = 404
+PPC_INS_EVMHESMFANW = 405
+PPC_INS_EVMHESMI = 406
+PPC_INS_EVMHESMIA = 407
+PPC_INS_EVMHESMIAAW = 408
+PPC_INS_EVMHESMIANW = 409
+PPC_INS_EVMHESSF = 410
+PPC_INS_EVMHESSFA = 411
+PPC_INS_EVMHESSFAAW = 412
+PPC_INS_EVMHESSFANW = 413
+PPC_INS_EVMHESSIAAW = 414
+PPC_INS_EVMHESSIANW = 415
+PPC_INS_EVMHEUMI = 416
+PPC_INS_EVMHEUMIA = 417
+PPC_INS_EVMHEUMIAAW = 418
+PPC_INS_EVMHEUMIANW = 419
+PPC_INS_EVMHEUSIAAW = 420
+PPC_INS_EVMHEUSIANW = 421
+PPC_INS_EVMHOGSMFAA = 422
+PPC_INS_EVMHOGSMFAN = 423
+PPC_INS_EVMHOGSMIAA = 424
+PPC_INS_EVMHOGSMIAN = 425
+PPC_INS_EVMHOGUMIAA = 426
+PPC_INS_EVMHOGUMIAN = 427
+PPC_INS_EVMHOSMF = 428
+PPC_INS_EVMHOSMFA = 429
+PPC_INS_EVMHOSMFAAW = 430
+PPC_INS_EVMHOSMFANW = 431
+PPC_INS_EVMHOSMI = 432
+PPC_INS_EVMHOSMIA = 433
+PPC_INS_EVMHOSMIAAW = 434
+PPC_INS_EVMHOSMIANW = 435
+PPC_INS_EVMHOSSF = 436
+PPC_INS_EVMHOSSFA = 437
+PPC_INS_EVMHOSSFAAW = 438
+PPC_INS_EVMHOSSFANW = 439
+PPC_INS_EVMHOSSIAAW = 440
+PPC_INS_EVMHOSSIANW = 441
+PPC_INS_EVMHOUMI = 442
+PPC_INS_EVMHOUMIA = 443
+PPC_INS_EVMHOUMIAAW = 444
+PPC_INS_EVMHOUMIANW = 445
+PPC_INS_EVMHOUSIAAW = 446
+PPC_INS_EVMHOUSIANW = 447
+PPC_INS_EVMRA = 448
+PPC_INS_EVMWHSMF = 449
+PPC_INS_EVMWHSMFA = 450
+PPC_INS_EVMWHSMI = 451
+PPC_INS_EVMWHSMIA = 452
+PPC_INS_EVMWHSSF = 453
+PPC_INS_EVMWHSSFA = 454
+PPC_INS_EVMWHUMI = 455
+PPC_INS_EVMWHUMIA = 456
+PPC_INS_EVMWLSMIAAW = 457
+PPC_INS_EVMWLSMIANW = 458
+PPC_INS_EVMWLSSIAAW = 459
+PPC_INS_EVMWLSSIANW = 460
+PPC_INS_EVMWLUMI = 461
+PPC_INS_EVMWLUMIA = 462
+PPC_INS_EVMWLUMIAAW = 463
+PPC_INS_EVMWLUMIANW = 464
+PPC_INS_EVMWLUSIAAW = 465
+PPC_INS_EVMWLUSIANW = 466
+PPC_INS_EVMWSMF = 467
+PPC_INS_EVMWSMFA = 468
+PPC_INS_EVMWSMFAA = 469
+PPC_INS_EVMWSMFAN = 470
+PPC_INS_EVMWSMI = 471
+PPC_INS_EVMWSMIA = 472
+PPC_INS_EVMWSMIAA = 473
+PPC_INS_EVMWSMIAN = 474
+PPC_INS_EVMWSSF = 475
+PPC_INS_EVMWSSFA = 476
+PPC_INS_EVMWSSFAA = 477
+PPC_INS_EVMWSSFAN = 478
+PPC_INS_EVMWUMI = 479
+PPC_INS_EVMWUMIA = 480
+PPC_INS_EVMWUMIAA = 481
+PPC_INS_EVMWUMIAN = 482
+PPC_INS_EVNAND = 483
+PPC_INS_EVNEG = 484
+PPC_INS_EVNOR = 485
+PPC_INS_EVOR = 486
+PPC_INS_EVORC = 487
+PPC_INS_EVRLW = 488
+PPC_INS_EVRLWI = 489
+PPC_INS_EVRNDW = 490
+PPC_INS_EVSEL = 491
+PPC_INS_EVSLW = 492
+PPC_INS_EVSLWI = 493
+PPC_INS_EVSPLATFI = 494
+PPC_INS_EVSPLATI = 495
+PPC_INS_EVSRWIS = 496
+PPC_INS_EVSRWIU = 497
+PPC_INS_EVSRWS = 498
+PPC_INS_EVSRWU = 499
+PPC_INS_EVSTDD = 500
+PPC_INS_EVSTDDX = 501
+PPC_INS_EVSTDH = 502
+PPC_INS_EVSTDHX = 503
+PPC_INS_EVSTDW = 504
+PPC_INS_EVSTDWX = 505
+PPC_INS_EVSTWHE = 506
+PPC_INS_EVSTWHEX = 507
+PPC_INS_EVSTWHO = 508
+PPC_INS_EVSTWHOX = 509
+PPC_INS_EVSTWWE = 510
+PPC_INS_EVSTWWEX = 511
+PPC_INS_EVSTWWO = 512
+PPC_INS_EVSTWWOX = 513
+PPC_INS_EVSUBFSMIAAW = 514
+PPC_INS_EVSUBFSSIAAW = 515
+PPC_INS_EVSUBFUMIAAW = 516
+PPC_INS_EVSUBFUSIAAW = 517
+PPC_INS_EVSUBFW = 518
+PPC_INS_EVSUBIFW = 519
+PPC_INS_EVXOR = 520
+PPC_INS_EXTLDI = 521
+PPC_INS_EXTLWI = 522
+PPC_INS_EXTRDI = 523
+PPC_INS_EXTRWI = 524
+PPC_INS_EXTSB = 525
+PPC_INS_EXTSH = 526
+PPC_INS_EXTSW = 527
+PPC_INS_EXTSWSLI = 528
+PPC_INS_FABS = 529
+PPC_INS_FADD = 530
+PPC_INS_FADDS = 531
+PPC_INS_FCFID = 532
+PPC_INS_FCFIDS = 533
+PPC_INS_FCFIDU = 534
+PPC_INS_FCFIDUS = 535
+PPC_INS_FCMPU = 536
+PPC_INS_FCPSGN = 537
+PPC_INS_FCTID = 538
+PPC_INS_FCTIDU = 539
+PPC_INS_FCTIDUZ = 540
+PPC_INS_FCTIDZ = 541
+PPC_INS_FCTIW = 542
+PPC_INS_FCTIWU = 543
+PPC_INS_FCTIWUZ = 544
+PPC_INS_FCTIWZ = 545
+PPC_INS_FDIV = 546
+PPC_INS_FDIVS = 547
+PPC_INS_FMADD = 548
+PPC_INS_FMADDS = 549
+PPC_INS_FMR = 550
+PPC_INS_FMSUB = 551
+PPC_INS_FMSUBS = 552
+PPC_INS_FMUL = 553
+PPC_INS_FMULS = 554
+PPC_INS_FNABS = 555
+PPC_INS_FNEG = 556
+PPC_INS_FNMADD = 557
+PPC_INS_FNMADDS = 558
+PPC_INS_FNMSUB = 559
+PPC_INS_FNMSUBS = 560
+PPC_INS_FRE = 561
+PPC_INS_FRES = 562
+PPC_INS_FRIM = 563
+PPC_INS_FRIN = 564
+PPC_INS_FRIP = 565
+PPC_INS_FRIZ = 566
+PPC_INS_FRSP = 567
+PPC_INS_FRSQRTE = 568
+PPC_INS_FRSQRTES = 569
+PPC_INS_FSEL = 570
+PPC_INS_FSQRT = 571
+PPC_INS_FSQRTS = 572
+PPC_INS_FSUB = 573
+PPC_INS_FSUBS = 574
+PPC_INS_FTDIV = 575
+PPC_INS_FTSQRT = 576
+PPC_INS_HRFID = 577
+PPC_INS_ICBI = 578
+PPC_INS_ICBIEP = 579
+PPC_INS_ICBLC = 580
+PPC_INS_ICBLQ = 581
+PPC_INS_ICBT = 582
+PPC_INS_ICBTLS = 583
+PPC_INS_ICCCI = 584
+PPC_INS_ICI = 585
+PPC_INS_INSLWI = 586
+PPC_INS_INSRDI = 587
+PPC_INS_INSRWI = 588
+PPC_INS_ISEL = 589
+PPC_INS_ISYNC = 590
+PPC_INS_LA = 591
+PPC_INS_LBARX = 592
+PPC_INS_LBEPX = 593
+PPC_INS_LBZ = 594
+PPC_INS_LBZCIX = 595
+PPC_INS_LBZU = 596
+PPC_INS_LBZUX = 597
+PPC_INS_LBZX = 598
+PPC_INS_LD = 599
+PPC_INS_LDARX = 600
+PPC_INS_LDAT = 601
+PPC_INS_LDBRX = 602
+PPC_INS_LDCIX = 603
+PPC_INS_LDMX = 604
+PPC_INS_LDU = 605
+PPC_INS_LDUX = 606
+PPC_INS_LDX = 607
+PPC_INS_LFD = 608
+PPC_INS_LFDEPX = 609
+PPC_INS_LFDU = 610
+PPC_INS_LFDUX = 611
+PPC_INS_LFDX = 612
+PPC_INS_LFIWAX = 613
+PPC_INS_LFIWZX = 614
+PPC_INS_LFS = 615
+PPC_INS_LFSU = 616
+PPC_INS_LFSUX = 617
+PPC_INS_LFSX = 618
+PPC_INS_LHA = 619
+PPC_INS_LHARX = 620
+PPC_INS_LHAU = 621
+PPC_INS_LHAUX = 622
+PPC_INS_LHAX = 623
+PPC_INS_LHBRX = 624
+PPC_INS_LHEPX = 625
+PPC_INS_LHZ = 626
+PPC_INS_LHZCIX = 627
+PPC_INS_LHZU = 628
+PPC_INS_LHZUX = 629
+PPC_INS_LHZX = 630
+PPC_INS_LI = 631
+PPC_INS_LIS = 632
+PPC_INS_LMW = 633
+PPC_INS_LNIA = 634
+PPC_INS_LSWI = 635
+PPC_INS_LVEBX = 636
+PPC_INS_LVEHX = 637
+PPC_INS_LVEWX = 638
+PPC_INS_LVSL = 639
+PPC_INS_LVSR = 640
+PPC_INS_LVX = 641
+PPC_INS_LVXL = 642
+PPC_INS_LWA = 643
+PPC_INS_LWARX = 644
+PPC_INS_LWAT = 645
+PPC_INS_LWAUX = 646
+PPC_INS_LWAX = 647
+PPC_INS_LWBRX = 648
+PPC_INS_LWEPX = 649
+PPC_INS_LWSYNC = 650
+PPC_INS_LWZ = 651
+PPC_INS_LWZCIX = 652
+PPC_INS_LWZU = 653
+PPC_INS_LWZUX = 654
+PPC_INS_LWZX = 655
+PPC_INS_LXSD = 656
+PPC_INS_LXSDX = 657
+PPC_INS_LXSIBZX = 658
+PPC_INS_LXSIHZX = 659
+PPC_INS_LXSIWAX = 660
+PPC_INS_LXSIWZX = 661
+PPC_INS_LXSSP = 662
+PPC_INS_LXSSPX = 663
+PPC_INS_LXV = 664
+PPC_INS_LXVB16X = 665
+PPC_INS_LXVD2X = 666
+PPC_INS_LXVDSX = 667
+PPC_INS_LXVH8X = 668
+PPC_INS_LXVL = 669
+PPC_INS_LXVLL = 670
+PPC_INS_LXVW4X = 671
+PPC_INS_LXVWSX = 672
+PPC_INS_LXVX = 673
+PPC_INS_MADDHD = 674
+PPC_INS_MADDHDU = 675
+PPC_INS_MADDLD = 676
+PPC_INS_MBAR = 677
+PPC_INS_MCRF = 678
+PPC_INS_MCRFS = 679
+PPC_INS_MCRXRX = 680
+PPC_INS_MFAMR = 681
+PPC_INS_MFASR = 682
+PPC_INS_MFBHRBE = 683
+PPC_INS_MFBR0 = 684
+PPC_INS_MFBR1 = 685
+PPC_INS_MFBR2 = 686
+PPC_INS_MFBR3 = 687
+PPC_INS_MFBR4 = 688
+PPC_INS_MFBR5 = 689
+PPC_INS_MFBR6 = 690
+PPC_INS_MFBR7 = 691
+PPC_INS_MFCFAR = 692
+PPC_INS_MFCR = 693
+PPC_INS_MFCTR = 694
+PPC_INS_MFDAR = 695
+PPC_INS_MFDBATL = 696
+PPC_INS_MFDBATU = 697
+PPC_INS_MFDCCR = 698
+PPC_INS_MFDCR = 699
+PPC_INS_MFDEAR = 700
+PPC_INS_MFDEC = 701
+PPC_INS_MFDSCR = 702
+PPC_INS_MFDSISR = 703
+PPC_INS_MFESR = 704
+PPC_INS_MFFPRD = 705
+PPC_INS_MFFS = 706
+PPC_INS_MFFSCDRN = 707
+PPC_INS_MFFSCDRNI = 708
+PPC_INS_MFFSCE = 709
+PPC_INS_MFFSCRN = 710
+PPC_INS_MFFSCRNI = 711
+PPC_INS_MFFSL = 712
+PPC_INS_MFIBATL = 713
+PPC_INS_MFIBATU = 714
+PPC_INS_MFICCR = 715
+PPC_INS_MFLR = 716
+PPC_INS_MFMSR = 717
+PPC_INS_MFOCRF = 718
+PPC_INS_MFPID = 719
+PPC_INS_MFPMR = 720
+PPC_INS_MFPVR = 721
+PPC_INS_MFRTCL = 722
+PPC_INS_MFRTCU = 723
+PPC_INS_MFSDR1 = 724
+PPC_INS_MFSPEFSCR = 725
+PPC_INS_MFSPR = 726
+PPC_INS_MFSPRG = 727
+PPC_INS_MFSPRG0 = 728
+PPC_INS_MFSPRG1 = 729
+PPC_INS_MFSPRG2 = 730
+PPC_INS_MFSPRG3 = 731
+PPC_INS_MFSPRG4 = 732
+PPC_INS_MFSPRG5 = 733
+PPC_INS_MFSPRG6 = 734
+PPC_INS_MFSPRG7 = 735
+PPC_INS_MFSR = 736
+PPC_INS_MFSRIN = 737
+PPC_INS_MFSRR0 = 738
+PPC_INS_MFSRR1 = 739
+PPC_INS_MFSRR2 = 740
+PPC_INS_MFSRR3 = 741
+PPC_INS_MFTB = 742
+PPC_INS_MFTBHI = 743
+PPC_INS_MFTBL = 744
+PPC_INS_MFTBLO = 745
+PPC_INS_MFTBU = 746
+PPC_INS_MFTCR = 747
+PPC_INS_MFVRD = 748
+PPC_INS_MFVRSAVE = 749
+PPC_INS_MFVSCR = 750
+PPC_INS_MFVSRD = 751
+PPC_INS_MFVSRLD = 752
+PPC_INS_MFVSRWZ = 753
+PPC_INS_MFXER = 754
+PPC_INS_MODSD = 755
+PPC_INS_MODSW = 756
+PPC_INS_MODUD = 757
+PPC_INS_MODUW = 758
+PPC_INS_MR = 759
+PPC_INS_MSGSYNC = 760
+PPC_INS_MSYNC = 761
+PPC_INS_MTAMR = 762
+PPC_INS_MTASR = 763
+PPC_INS_MTBR0 = 764
+PPC_INS_MTBR1 = 765
+PPC_INS_MTBR2 = 766
+PPC_INS_MTBR3 = 767
+PPC_INS_MTBR4 = 768
+PPC_INS_MTBR5 = 769
+PPC_INS_MTBR6 = 770
+PPC_INS_MTBR7 = 771
+PPC_INS_MTCFAR = 772
+PPC_INS_MTCR = 773
+PPC_INS_MTCRF = 774
+PPC_INS_MTCTR = 775
+PPC_INS_MTDAR = 776
+PPC_INS_MTDBATL = 777
+PPC_INS_MTDBATU = 778
+PPC_INS_MTDCCR = 779
+PPC_INS_MTDCR = 780
+PPC_INS_MTDEAR = 781
+PPC_INS_MTDEC = 782
+PPC_INS_MTDSCR = 783
+PPC_INS_MTDSISR = 784
+PPC_INS_MTESR = 785
+PPC_INS_MTFSB0 = 786
+PPC_INS_MTFSB1 = 787
+PPC_INS_MTFSF = 788
+PPC_INS_MTFSFI = 789
+PPC_INS_MTIBATL = 790
+PPC_INS_MTIBATU = 791
+PPC_INS_MTICCR = 792
+PPC_INS_MTLR = 793
+PPC_INS_MTMSR = 794
+PPC_INS_MTMSRD = 795
+PPC_INS_MTOCRF = 796
+PPC_INS_MTPID = 797
+PPC_INS_MTPMR = 798
+PPC_INS_MTSDR1 = 799
+PPC_INS_MTSPEFSCR = 800
+PPC_INS_MTSPR = 801
+PPC_INS_MTSPRG = 802
+PPC_INS_MTSPRG0 = 803
+PPC_INS_MTSPRG1 = 804
+PPC_INS_MTSPRG2 = 805
+PPC_INS_MTSPRG3 = 806
+PPC_INS_MTSPRG4 = 807
+PPC_INS_MTSPRG5 = 808
+PPC_INS_MTSPRG6 = 809
+PPC_INS_MTSPRG7 = 810
+PPC_INS_MTSR = 811
+PPC_INS_MTSRIN = 812
+PPC_INS_MTSRR0 = 813
+PPC_INS_MTSRR1 = 814
+PPC_INS_MTSRR2 = 815
+PPC_INS_MTSRR3 = 816
+PPC_INS_MTTBHI = 817
+PPC_INS_MTTBL = 818
+PPC_INS_MTTBLO = 819
+PPC_INS_MTTBU = 820
+PPC_INS_MTTCR = 821
+PPC_INS_MTVRSAVE = 822
+PPC_INS_MTVSCR = 823
+PPC_INS_MTVSRD = 824
+PPC_INS_MTVSRDD = 825
+PPC_INS_MTVSRWA = 826
+PPC_INS_MTVSRWS = 827
+PPC_INS_MTVSRWZ = 828
+PPC_INS_MTXER = 829
+PPC_INS_MULHD = 830
+PPC_INS_MULHDU = 831
+PPC_INS_MULHW = 832
+PPC_INS_MULHWU = 833
+PPC_INS_MULLD = 834
+PPC_INS_MULLI = 835
+PPC_INS_MULLW = 836
+PPC_INS_NAND = 837
+PPC_INS_NAP = 838
+PPC_INS_NEG = 839
+PPC_INS_NOP = 840
+PPC_INS_NOR = 841
+PPC_INS_NOT = 842
+PPC_INS_OR = 843
+PPC_INS_ORC = 844
+PPC_INS_ORI = 845
+PPC_INS_ORIS = 846
+PPC_INS_PASTE = 847
+PPC_INS_PASTE_LAST = 848
+PPC_INS_POPCNTB = 849
+PPC_INS_POPCNTD = 850
+PPC_INS_POPCNTW = 851
+PPC_INS_PTESYNC = 852
+PPC_INS_QVALIGNI = 853
+PPC_INS_QVESPLATI = 854
+PPC_INS_QVFABS = 855
+PPC_INS_QVFADD = 856
+PPC_INS_QVFADDS = 857
+PPC_INS_QVFAND = 858
+PPC_INS_QVFANDC = 859
+PPC_INS_QVFCFID = 860
+PPC_INS_QVFCFIDS = 861
+PPC_INS_QVFCFIDU = 862
+PPC_INS_QVFCFIDUS = 863
+PPC_INS_QVFCLR = 864
+PPC_INS_QVFCMPEQ = 865
+PPC_INS_QVFCMPGT = 866
+PPC_INS_QVFCMPLT = 867
+PPC_INS_QVFCPSGN = 868
+PPC_INS_QVFCTFB = 869
+PPC_INS_QVFCTID = 870
+PPC_INS_QVFCTIDU = 871
+PPC_INS_QVFCTIDUZ = 872
+PPC_INS_QVFCTIDZ = 873
+PPC_INS_QVFCTIW = 874
+PPC_INS_QVFCTIWU = 875
+PPC_INS_QVFCTIWUZ = 876
+PPC_INS_QVFCTIWZ = 877
+PPC_INS_QVFEQU = 878
+PPC_INS_QVFLOGICAL = 879
+PPC_INS_QVFMADD = 880
+PPC_INS_QVFMADDS = 881
+PPC_INS_QVFMR = 882
+PPC_INS_QVFMSUB = 883
+PPC_INS_QVFMSUBS = 884
+PPC_INS_QVFMUL = 885
+PPC_INS_QVFMULS = 886
+PPC_INS_QVFNABS = 887
+PPC_INS_QVFNAND = 888
+PPC_INS_QVFNEG = 889
+PPC_INS_QVFNMADD = 890
+PPC_INS_QVFNMADDS = 891
+PPC_INS_QVFNMSUB = 892
+PPC_INS_QVFNMSUBS = 893
+PPC_INS_QVFNOR = 894
+PPC_INS_QVFNOT = 895
+PPC_INS_QVFOR = 896
+PPC_INS_QVFORC = 897
+PPC_INS_QVFPERM = 898
+PPC_INS_QVFRE = 899
+PPC_INS_QVFRES = 900
+PPC_INS_QVFRIM = 901
+PPC_INS_QVFRIN = 902
+PPC_INS_QVFRIP = 903
+PPC_INS_QVFRIZ = 904
+PPC_INS_QVFRSP = 905
+PPC_INS_QVFRSQRTE = 906
+PPC_INS_QVFRSQRTES = 907
+PPC_INS_QVFSEL = 908
+PPC_INS_QVFSET = 909
+PPC_INS_QVFSUB = 910
+PPC_INS_QVFSUBS = 911
+PPC_INS_QVFTSTNAN = 912
+PPC_INS_QVFXMADD = 913
+PPC_INS_QVFXMADDS = 914
+PPC_INS_QVFXMUL = 915
+PPC_INS_QVFXMULS = 916
+PPC_INS_QVFXOR = 917
+PPC_INS_QVFXXCPNMADD = 918
+PPC_INS_QVFXXCPNMADDS = 919
+PPC_INS_QVFXXMADD = 920
+PPC_INS_QVFXXMADDS = 921
+PPC_INS_QVFXXNPMADD = 922
+PPC_INS_QVFXXNPMADDS = 923
+PPC_INS_QVGPCI = 924
+PPC_INS_QVLFCDUX = 925
+PPC_INS_QVLFCDUXA = 926
+PPC_INS_QVLFCDX = 927
+PPC_INS_QVLFCDXA = 928
+PPC_INS_QVLFCSUX = 929
+PPC_INS_QVLFCSUXA = 930
+PPC_INS_QVLFCSX = 931
+PPC_INS_QVLFCSXA = 932
+PPC_INS_QVLFDUX = 933
+PPC_INS_QVLFDUXA = 934
+PPC_INS_QVLFDX = 935
+PPC_INS_QVLFDXA = 936
+PPC_INS_QVLFIWAX = 937
+PPC_INS_QVLFIWAXA = 938
+PPC_INS_QVLFIWZX = 939
+PPC_INS_QVLFIWZXA = 940
+PPC_INS_QVLFSUX = 941
+PPC_INS_QVLFSUXA = 942
+PPC_INS_QVLFSX = 943
+PPC_INS_QVLFSXA = 944
+PPC_INS_QVLPCLDX = 945
+PPC_INS_QVLPCLSX = 946
+PPC_INS_QVLPCRDX = 947
+PPC_INS_QVLPCRSX = 948
+PPC_INS_QVSTFCDUX = 949
+PPC_INS_QVSTFCDUXA = 950
+PPC_INS_QVSTFCDUXI = 951
+PPC_INS_QVSTFCDUXIA = 952
+PPC_INS_QVSTFCDX = 953
+PPC_INS_QVSTFCDXA = 954
+PPC_INS_QVSTFCDXI = 955
+PPC_INS_QVSTFCDXIA = 956
+PPC_INS_QVSTFCSUX = 957
+PPC_INS_QVSTFCSUXA = 958
+PPC_INS_QVSTFCSUXI = 959
+PPC_INS_QVSTFCSUXIA = 960
+PPC_INS_QVSTFCSX = 961
+PPC_INS_QVSTFCSXA = 962
+PPC_INS_QVSTFCSXI = 963
+PPC_INS_QVSTFCSXIA = 964
+PPC_INS_QVSTFDUX = 965
+PPC_INS_QVSTFDUXA = 966
+PPC_INS_QVSTFDUXI = 967
+PPC_INS_QVSTFDUXIA = 968
+PPC_INS_QVSTFDX = 969
+PPC_INS_QVSTFDXA = 970
+PPC_INS_QVSTFDXI = 971
+PPC_INS_QVSTFDXIA = 972
+PPC_INS_QVSTFIWX = 973
+PPC_INS_QVSTFIWXA = 974
+PPC_INS_QVSTFSUX = 975
+PPC_INS_QVSTFSUXA = 976
+PPC_INS_QVSTFSUXI = 977
+PPC_INS_QVSTFSUXIA = 978
+PPC_INS_QVSTFSX = 979
+PPC_INS_QVSTFSXA = 980
+PPC_INS_QVSTFSXI = 981
+PPC_INS_QVSTFSXIA = 982
+PPC_INS_RFCI = 983
+PPC_INS_RFDI = 984
+PPC_INS_RFEBB = 985
+PPC_INS_RFI = 986
+PPC_INS_RFID = 987
+PPC_INS_RFMCI = 988
+PPC_INS_RLDCL = 989
+PPC_INS_RLDCR = 990
+PPC_INS_RLDIC = 991
+PPC_INS_RLDICL = 992
+PPC_INS_RLDICR = 993
+PPC_INS_RLDIMI = 994
+PPC_INS_RLWIMI = 995
+PPC_INS_RLWINM = 996
+PPC_INS_RLWNM = 997
+PPC_INS_ROTLD = 998
+PPC_INS_ROTLDI = 999
+PPC_INS_ROTLW = 1000
+PPC_INS_ROTLWI = 1001
+PPC_INS_ROTRDI = 1002
+PPC_INS_ROTRWI = 1003
+PPC_INS_SC = 1004
+PPC_INS_SETB = 1005
+PPC_INS_SLBIA = 1006
+PPC_INS_SLBIE = 1007
+PPC_INS_SLBIEG = 1008
+PPC_INS_SLBMFEE = 1009
+PPC_INS_SLBMFEV = 1010
+PPC_INS_SLBMTE = 1011
+PPC_INS_SLBSYNC = 1012
+PPC_INS_SLD = 1013
+PPC_INS_SLDI = 1014
+PPC_INS_SLW = 1015
+PPC_INS_SLWI = 1016
+PPC_INS_SRAD = 1017
+PPC_INS_SRADI = 1018
+PPC_INS_SRAW = 1019
+PPC_INS_SRAWI = 1020
+PPC_INS_SRD = 1021
+PPC_INS_SRDI = 1022
+PPC_INS_SRW = 1023
+PPC_INS_SRWI = 1024
+PPC_INS_STB = 1025
+PPC_INS_STBCIX = 1026
+PPC_INS_STBCX = 1027
+PPC_INS_STBEPX = 1028
+PPC_INS_STBU = 1029
+PPC_INS_STBUX = 1030
+PPC_INS_STBX = 1031
+PPC_INS_STD = 1032
+PPC_INS_STDAT = 1033
+PPC_INS_STDBRX = 1034
+PPC_INS_STDCIX = 1035
+PPC_INS_STDCX = 1036
+PPC_INS_STDU = 1037
+PPC_INS_STDUX = 1038
+PPC_INS_STDX = 1039
+PPC_INS_STFD = 1040
+PPC_INS_STFDEPX = 1041
+PPC_INS_STFDU = 1042
+PPC_INS_STFDUX = 1043
+PPC_INS_STFDX = 1044
+PPC_INS_STFIWX = 1045
+PPC_INS_STFS = 1046
+PPC_INS_STFSU = 1047
+PPC_INS_STFSUX = 1048
+PPC_INS_STFSX = 1049
+PPC_INS_STH = 1050
+PPC_INS_STHBRX = 1051
+PPC_INS_STHCIX = 1052
+PPC_INS_STHCX = 1053
+PPC_INS_STHEPX = 1054
+PPC_INS_STHU = 1055
+PPC_INS_STHUX = 1056
+PPC_INS_STHX = 1057
+PPC_INS_STMW = 1058
+PPC_INS_STOP = 1059
+PPC_INS_STSWI = 1060
+PPC_INS_STVEBX = 1061
+PPC_INS_STVEHX = 1062
+PPC_INS_STVEWX = 1063
+PPC_INS_STVX = 1064
+PPC_INS_STVXL = 1065
+PPC_INS_STW = 1066
+PPC_INS_STWAT = 1067
+PPC_INS_STWBRX = 1068
+PPC_INS_STWCIX = 1069
+PPC_INS_STWCX = 1070
+PPC_INS_STWEPX = 1071
+PPC_INS_STWU = 1072
+PPC_INS_STWUX = 1073
+PPC_INS_STWX = 1074
+PPC_INS_STXSD = 1075
+PPC_INS_STXSDX = 1076
+PPC_INS_STXSIBX = 1077
+PPC_INS_STXSIHX = 1078
+PPC_INS_STXSIWX = 1079
+PPC_INS_STXSSP = 1080
+PPC_INS_STXSSPX = 1081
+PPC_INS_STXV = 1082
+PPC_INS_STXVB16X = 1083
+PPC_INS_STXVD2X = 1084
+PPC_INS_STXVH8X = 1085
+PPC_INS_STXVL = 1086
+PPC_INS_STXVLL = 1087
+PPC_INS_STXVW4X = 1088
+PPC_INS_STXVX = 1089
+PPC_INS_SUB = 1090
+PPC_INS_SUBC = 1091
+PPC_INS_SUBF = 1092
+PPC_INS_SUBFC = 1093
+PPC_INS_SUBFE = 1094
+PPC_INS_SUBFIC = 1095
+PPC_INS_SUBFME = 1096
+PPC_INS_SUBFZE = 1097
+PPC_INS_SUBI = 1098
+PPC_INS_SUBIC = 1099
+PPC_INS_SUBIS = 1100
+PPC_INS_SUBPCIS = 1101
+PPC_INS_SYNC = 1102
+PPC_INS_TABORT = 1103
+PPC_INS_TABORTDC = 1104
+PPC_INS_TABORTDCI = 1105
+PPC_INS_TABORTWC = 1106
+PPC_INS_TABORTWCI = 1107
+PPC_INS_TBEGIN = 1108
+PPC_INS_TCHECK = 1109
+PPC_INS_TD = 1110
+PPC_INS_TDEQ = 1111
+PPC_INS_TDEQI = 1112
+PPC_INS_TDGE = 1113
+PPC_INS_TDGEI = 1114
+PPC_INS_TDGT = 1115
+PPC_INS_TDGTI = 1116
+PPC_INS_TDI = 1117
+PPC_INS_TDLE = 1118
+PPC_INS_TDLEI = 1119
+PPC_INS_TDLGE = 1120
+PPC_INS_TDLGEI = 1121
+PPC_INS_TDLGT = 1122
+PPC_INS_TDLGTI = 1123
+PPC_INS_TDLLE = 1124
+PPC_INS_TDLLEI = 1125
+PPC_INS_TDLLT = 1126
+PPC_INS_TDLLTI = 1127
+PPC_INS_TDLNG = 1128
+PPC_INS_TDLNGI = 1129
+PPC_INS_TDLNL = 1130
+PPC_INS_TDLNLI = 1131
+PPC_INS_TDLT = 1132
+PPC_INS_TDLTI = 1133
+PPC_INS_TDNE = 1134
+PPC_INS_TDNEI = 1135
+PPC_INS_TDNG = 1136
+PPC_INS_TDNGI = 1137
+PPC_INS_TDNL = 1138
+PPC_INS_TDNLI = 1139
+PPC_INS_TDU = 1140
+PPC_INS_TDUI = 1141
+PPC_INS_TEND = 1142
+PPC_INS_TLBIA = 1143
+PPC_INS_TLBIE = 1144
+PPC_INS_TLBIEL = 1145
+PPC_INS_TLBIVAX = 1146
+PPC_INS_TLBLD = 1147
+PPC_INS_TLBLI = 1148
+PPC_INS_TLBRE = 1149
+PPC_INS_TLBREHI = 1150
+PPC_INS_TLBRELO = 1151
+PPC_INS_TLBSX = 1152
+PPC_INS_TLBSYNC = 1153
+PPC_INS_TLBWE = 1154
+PPC_INS_TLBWEHI = 1155
+PPC_INS_TLBWELO = 1156
+PPC_INS_TRAP = 1157
+PPC_INS_TRECHKPT = 1158
+PPC_INS_TRECLAIM = 1159
+PPC_INS_TSR = 1160
+PPC_INS_TW = 1161
+PPC_INS_TWEQ = 1162
+PPC_INS_TWEQI = 1163
+PPC_INS_TWGE = 1164
+PPC_INS_TWGEI = 1165
+PPC_INS_TWGT = 1166
+PPC_INS_TWGTI = 1167
+PPC_INS_TWI = 1168
+PPC_INS_TWLE = 1169
+PPC_INS_TWLEI = 1170
+PPC_INS_TWLGE = 1171
+PPC_INS_TWLGEI = 1172
+PPC_INS_TWLGT = 1173
+PPC_INS_TWLGTI = 1174
+PPC_INS_TWLLE = 1175
+PPC_INS_TWLLEI = 1176
+PPC_INS_TWLLT = 1177
+PPC_INS_TWLLTI = 1178
+PPC_INS_TWLNG = 1179
+PPC_INS_TWLNGI = 1180
+PPC_INS_TWLNL = 1181
+PPC_INS_TWLNLI = 1182
+PPC_INS_TWLT = 1183
+PPC_INS_TWLTI = 1184
+PPC_INS_TWNE = 1185
+PPC_INS_TWNEI = 1186
+PPC_INS_TWNG = 1187
+PPC_INS_TWNGI = 1188
+PPC_INS_TWNL = 1189
+PPC_INS_TWNLI = 1190
+PPC_INS_TWU = 1191
+PPC_INS_TWUI = 1192
+PPC_INS_VABSDUB = 1193
+PPC_INS_VABSDUH = 1194
+PPC_INS_VABSDUW = 1195
+PPC_INS_VADDCUQ = 1196
+PPC_INS_VADDCUW = 1197
+PPC_INS_VADDECUQ = 1198
+PPC_INS_VADDEUQM = 1199
+PPC_INS_VADDFP = 1200
+PPC_INS_VADDSBS = 1201
+PPC_INS_VADDSHS = 1202
+PPC_INS_VADDSWS = 1203
+PPC_INS_VADDUBM = 1204
+PPC_INS_VADDUBS = 1205
+PPC_INS_VADDUDM = 1206
+PPC_INS_VADDUHM = 1207
+PPC_INS_VADDUHS = 1208
+PPC_INS_VADDUQM = 1209
+PPC_INS_VADDUWM = 1210
+PPC_INS_VADDUWS = 1211
+PPC_INS_VAND = 1212
+PPC_INS_VANDC = 1213
+PPC_INS_VAVGSB = 1214
+PPC_INS_VAVGSH = 1215
+PPC_INS_VAVGSW = 1216
+PPC_INS_VAVGUB = 1217
+PPC_INS_VAVGUH = 1218
+PPC_INS_VAVGUW = 1219
+PPC_INS_VBPERMD = 1220
+PPC_INS_VBPERMQ = 1221
+PPC_INS_VCFSX = 1222
+PPC_INS_VCFUX = 1223
+PPC_INS_VCIPHER = 1224
+PPC_INS_VCIPHERLAST = 1225
+PPC_INS_VCLZB = 1226
+PPC_INS_VCLZD = 1227
+PPC_INS_VCLZH = 1228
+PPC_INS_VCLZLSBB = 1229
+PPC_INS_VCLZW = 1230
+PPC_INS_VCMPBFP = 1231
+PPC_INS_VCMPEQFP = 1232
+PPC_INS_VCMPEQUB = 1233
+PPC_INS_VCMPEQUD = 1234
+PPC_INS_VCMPEQUH = 1235
+PPC_INS_VCMPEQUW = 1236
+PPC_INS_VCMPGEFP = 1237
+PPC_INS_VCMPGTFP = 1238
+PPC_INS_VCMPGTSB = 1239
+PPC_INS_VCMPGTSD = 1240
+PPC_INS_VCMPGTSH = 1241
+PPC_INS_VCMPGTSW = 1242
+PPC_INS_VCMPGTUB = 1243
+PPC_INS_VCMPGTUD = 1244
+PPC_INS_VCMPGTUH = 1245
+PPC_INS_VCMPGTUW = 1246
+PPC_INS_VCMPNEB = 1247
+PPC_INS_VCMPNEH = 1248
+PPC_INS_VCMPNEW = 1249
+PPC_INS_VCMPNEZB = 1250
+PPC_INS_VCMPNEZH = 1251
+PPC_INS_VCMPNEZW = 1252
+PPC_INS_VCTSXS = 1253
+PPC_INS_VCTUXS = 1254
+PPC_INS_VCTZB = 1255
+PPC_INS_VCTZD = 1256
+PPC_INS_VCTZH = 1257
+PPC_INS_VCTZLSBB = 1258
+PPC_INS_VCTZW = 1259
+PPC_INS_VEQV = 1260
+PPC_INS_VEXPTEFP = 1261
+PPC_INS_VEXTRACTD = 1262
+PPC_INS_VEXTRACTUB = 1263
+PPC_INS_VEXTRACTUH = 1264
+PPC_INS_VEXTRACTUW = 1265
+PPC_INS_VEXTSB2D = 1266
+PPC_INS_VEXTSB2W = 1267
+PPC_INS_VEXTSH2D = 1268
+PPC_INS_VEXTSH2W = 1269
+PPC_INS_VEXTSW2D = 1270
+PPC_INS_VEXTUBLX = 1271
+PPC_INS_VEXTUBRX = 1272
+PPC_INS_VEXTUHLX = 1273
+PPC_INS_VEXTUHRX = 1274
+PPC_INS_VEXTUWLX = 1275
+PPC_INS_VEXTUWRX = 1276
+PPC_INS_VGBBD = 1277
+PPC_INS_VINSERTB = 1278
+PPC_INS_VINSERTD = 1279
+PPC_INS_VINSERTH = 1280
+PPC_INS_VINSERTW = 1281
+PPC_INS_VLOGEFP = 1282
+PPC_INS_VMADDFP = 1283
+PPC_INS_VMAXFP = 1284
+PPC_INS_VMAXSB = 1285
+PPC_INS_VMAXSD = 1286
+PPC_INS_VMAXSH = 1287
+PPC_INS_VMAXSW = 1288
+PPC_INS_VMAXUB = 1289
+PPC_INS_VMAXUD = 1290
+PPC_INS_VMAXUH = 1291
+PPC_INS_VMAXUW = 1292
+PPC_INS_VMHADDSHS = 1293
+PPC_INS_VMHRADDSHS = 1294
+PPC_INS_VMINFP = 1295
+PPC_INS_VMINSB = 1296
+PPC_INS_VMINSD = 1297
+PPC_INS_VMINSH = 1298
+PPC_INS_VMINSW = 1299
+PPC_INS_VMINUB = 1300
+PPC_INS_VMINUD = 1301
+PPC_INS_VMINUH = 1302
+PPC_INS_VMINUW = 1303
+PPC_INS_VMLADDUHM = 1304
+PPC_INS_VMR = 1305
+PPC_INS_VMRGEW = 1306
+PPC_INS_VMRGHB = 1307
+PPC_INS_VMRGHH = 1308
+PPC_INS_VMRGHW = 1309
+PPC_INS_VMRGLB = 1310
+PPC_INS_VMRGLH = 1311
+PPC_INS_VMRGLW = 1312
+PPC_INS_VMRGOW = 1313
+PPC_INS_VMSUMMBM = 1314
+PPC_INS_VMSUMSHM = 1315
+PPC_INS_VMSUMSHS = 1316
+PPC_INS_VMSUMUBM = 1317
+PPC_INS_VMSUMUHM = 1318
+PPC_INS_VMSUMUHS = 1319
+PPC_INS_VMUL10CUQ = 1320
+PPC_INS_VMUL10ECUQ = 1321
+PPC_INS_VMUL10EUQ = 1322
+PPC_INS_VMUL10UQ = 1323
+PPC_INS_VMULESB = 1324
+PPC_INS_VMULESH = 1325
+PPC_INS_VMULESW = 1326
+PPC_INS_VMULEUB = 1327
+PPC_INS_VMULEUH = 1328
+PPC_INS_VMULEUW = 1329
+PPC_INS_VMULOSB = 1330
+PPC_INS_VMULOSH = 1331
+PPC_INS_VMULOSW = 1332
+PPC_INS_VMULOUB = 1333
+PPC_INS_VMULOUH = 1334
+PPC_INS_VMULOUW = 1335
+PPC_INS_VMULUWM = 1336
+PPC_INS_VNAND = 1337
+PPC_INS_VNCIPHER = 1338
+PPC_INS_VNCIPHERLAST = 1339
+PPC_INS_VNEGD = 1340
+PPC_INS_VNEGW = 1341
+PPC_INS_VNMSUBFP = 1342
+PPC_INS_VNOR = 1343
+PPC_INS_VNOT = 1344
+PPC_INS_VOR = 1345
+PPC_INS_VORC = 1346
+PPC_INS_VPERM = 1347
+PPC_INS_VPERMR = 1348
+PPC_INS_VPERMXOR = 1349
+PPC_INS_VPKPX = 1350
+PPC_INS_VPKSDSS = 1351
+PPC_INS_VPKSDUS = 1352
+PPC_INS_VPKSHSS = 1353
+PPC_INS_VPKSHUS = 1354
+PPC_INS_VPKSWSS = 1355
+PPC_INS_VPKSWUS = 1356
+PPC_INS_VPKUDUM = 1357
+PPC_INS_VPKUDUS = 1358
+PPC_INS_VPKUHUM = 1359
+PPC_INS_VPKUHUS = 1360
+PPC_INS_VPKUWUM = 1361
+PPC_INS_VPKUWUS = 1362
+PPC_INS_VPMSUMB = 1363
+PPC_INS_VPMSUMD = 1364
+PPC_INS_VPMSUMH = 1365
+PPC_INS_VPMSUMW = 1366
+PPC_INS_VPOPCNTB = 1367
+PPC_INS_VPOPCNTD = 1368
+PPC_INS_VPOPCNTH = 1369
+PPC_INS_VPOPCNTW = 1370
+PPC_INS_VPRTYBD = 1371
+PPC_INS_VPRTYBQ = 1372
+PPC_INS_VPRTYBW = 1373
+PPC_INS_VREFP = 1374
+PPC_INS_VRFIM = 1375
+PPC_INS_VRFIN = 1376
+PPC_INS_VRFIP = 1377
+PPC_INS_VRFIZ = 1378
+PPC_INS_VRLB = 1379
+PPC_INS_VRLD = 1380
+PPC_INS_VRLDMI = 1381
+PPC_INS_VRLDNM = 1382
+PPC_INS_VRLH = 1383
+PPC_INS_VRLW = 1384
+PPC_INS_VRLWMI = 1385
+PPC_INS_VRLWNM = 1386
+PPC_INS_VRSQRTEFP = 1387
+PPC_INS_VSBOX = 1388
+PPC_INS_VSEL = 1389
+PPC_INS_VSHASIGMAD = 1390
+PPC_INS_VSHASIGMAW = 1391
+PPC_INS_VSL = 1392
+PPC_INS_VSLB = 1393
+PPC_INS_VSLD = 1394
+PPC_INS_VSLDOI = 1395
+PPC_INS_VSLH = 1396
+PPC_INS_VSLO = 1397
+PPC_INS_VSLV = 1398
+PPC_INS_VSLW = 1399
+PPC_INS_VSPLTB = 1400
+PPC_INS_VSPLTH = 1401
+PPC_INS_VSPLTISB = 1402
+PPC_INS_VSPLTISH = 1403
+PPC_INS_VSPLTISW = 1404
+PPC_INS_VSPLTW = 1405
+PPC_INS_VSR = 1406
+PPC_INS_VSRAB = 1407
+PPC_INS_VSRAD = 1408
+PPC_INS_VSRAH = 1409
+PPC_INS_VSRAW = 1410
+PPC_INS_VSRB = 1411
+PPC_INS_VSRD = 1412
+PPC_INS_VSRH = 1413
+PPC_INS_VSRO = 1414
+PPC_INS_VSRV = 1415
+PPC_INS_VSRW = 1416
+PPC_INS_VSUBCUQ = 1417
+PPC_INS_VSUBCUW = 1418
+PPC_INS_VSUBECUQ = 1419
+PPC_INS_VSUBEUQM = 1420
+PPC_INS_VSUBFP = 1421
+PPC_INS_VSUBSBS = 1422
+PPC_INS_VSUBSHS = 1423
+PPC_INS_VSUBSWS = 1424
+PPC_INS_VSUBUBM = 1425
+PPC_INS_VSUBUBS = 1426
+PPC_INS_VSUBUDM = 1427
+PPC_INS_VSUBUHM = 1428
+PPC_INS_VSUBUHS = 1429
+PPC_INS_VSUBUQM = 1430
+PPC_INS_VSUBUWM = 1431
+PPC_INS_VSUBUWS = 1432
+PPC_INS_VSUM2SWS = 1433
+PPC_INS_VSUM4SBS = 1434
+PPC_INS_VSUM4SHS = 1435
+PPC_INS_VSUM4UBS = 1436
+PPC_INS_VSUMSWS = 1437
+PPC_INS_VUPKHPX = 1438
+PPC_INS_VUPKHSB = 1439
+PPC_INS_VUPKHSH = 1440
+PPC_INS_VUPKHSW = 1441
+PPC_INS_VUPKLPX = 1442
+PPC_INS_VUPKLSB = 1443
+PPC_INS_VUPKLSH = 1444
+PPC_INS_VUPKLSW = 1445
+PPC_INS_VXOR = 1446
+PPC_INS_WAIT = 1447
+PPC_INS_WAITIMPL = 1448
+PPC_INS_WAITRSV = 1449
+PPC_INS_WRTEE = 1450
+PPC_INS_WRTEEI = 1451
+PPC_INS_XNOP = 1452
+PPC_INS_XOR = 1453
+PPC_INS_XORI = 1454
+PPC_INS_XORIS = 1455
+PPC_INS_XSABSDP = 1456
+PPC_INS_XSABSQP = 1457
+PPC_INS_XSADDDP = 1458
+PPC_INS_XSADDQP = 1459
+PPC_INS_XSADDQPO = 1460
+PPC_INS_XSADDSP = 1461
+PPC_INS_XSCMPEQDP = 1462
+PPC_INS_XSCMPEXPDP = 1463
+PPC_INS_XSCMPEXPQP = 1464
+PPC_INS_XSCMPGEDP = 1465
+PPC_INS_XSCMPGTDP = 1466
+PPC_INS_XSCMPODP = 1467
+PPC_INS_XSCMPOQP = 1468
+PPC_INS_XSCMPUDP = 1469
+PPC_INS_XSCMPUQP = 1470
+PPC_INS_XSCPSGNDP = 1471
+PPC_INS_XSCPSGNQP = 1472
+PPC_INS_XSCVDPHP = 1473
+PPC_INS_XSCVDPQP = 1474
+PPC_INS_XSCVDPSP = 1475
+PPC_INS_XSCVDPSPN = 1476
+PPC_INS_XSCVDPSXDS = 1477
+PPC_INS_XSCVDPSXWS = 1478
+PPC_INS_XSCVDPUXDS = 1479
+PPC_INS_XSCVDPUXWS = 1480
+PPC_INS_XSCVHPDP = 1481
+PPC_INS_XSCVQPDP = 1482
+PPC_INS_XSCVQPDPO = 1483
+PPC_INS_XSCVQPSDZ = 1484
+PPC_INS_XSCVQPSWZ = 1485
+PPC_INS_XSCVQPUDZ = 1486
+PPC_INS_XSCVQPUWZ = 1487
+PPC_INS_XSCVSDQP = 1488
+PPC_INS_XSCVSPDP = 1489
+PPC_INS_XSCVSPDPN = 1490
+PPC_INS_XSCVSXDDP = 1491
+PPC_INS_XSCVSXDSP = 1492
+PPC_INS_XSCVUDQP = 1493
+PPC_INS_XSCVUXDDP = 1494
+PPC_INS_XSCVUXDSP = 1495
+PPC_INS_XSDIVDP = 1496
+PPC_INS_XSDIVQP = 1497
+PPC_INS_XSDIVQPO = 1498
+PPC_INS_XSDIVSP = 1499
+PPC_INS_XSIEXPDP = 1500
+PPC_INS_XSIEXPQP = 1501
+PPC_INS_XSMADDADP = 1502
+PPC_INS_XSMADDASP = 1503
+PPC_INS_XSMADDMDP = 1504
+PPC_INS_XSMADDMSP = 1505
+PPC_INS_XSMADDQP = 1506
+PPC_INS_XSMADDQPO = 1507
+PPC_INS_XSMAXCDP = 1508
+PPC_INS_XSMAXDP = 1509
+PPC_INS_XSMAXJDP = 1510
+PPC_INS_XSMINCDP = 1511
+PPC_INS_XSMINDP = 1512
+PPC_INS_XSMINJDP = 1513
+PPC_INS_XSMSUBADP = 1514
+PPC_INS_XSMSUBASP = 1515
+PPC_INS_XSMSUBMDP = 1516
+PPC_INS_XSMSUBMSP = 1517
+PPC_INS_XSMSUBQP = 1518
+PPC_INS_XSMSUBQPO = 1519
+PPC_INS_XSMULDP = 1520
+PPC_INS_XSMULQP = 1521
+PPC_INS_XSMULQPO = 1522
+PPC_INS_XSMULSP = 1523
+PPC_INS_XSNABSDP = 1524
+PPC_INS_XSNABSQP = 1525
+PPC_INS_XSNEGDP = 1526
+PPC_INS_XSNEGQP = 1527
+PPC_INS_XSNMADDADP = 1528
+PPC_INS_XSNMADDASP = 1529
+PPC_INS_XSNMADDMDP = 1530
+PPC_INS_XSNMADDMSP = 1531
+PPC_INS_XSNMADDQP = 1532
+PPC_INS_XSNMADDQPO = 1533
+PPC_INS_XSNMSUBADP = 1534
+PPC_INS_XSNMSUBASP = 1535
+PPC_INS_XSNMSUBMDP = 1536
+PPC_INS_XSNMSUBMSP = 1537
+PPC_INS_XSNMSUBQP = 1538
+PPC_INS_XSNMSUBQPO = 1539
+PPC_INS_XSRDPI = 1540
+PPC_INS_XSRDPIC = 1541
+PPC_INS_XSRDPIM = 1542
+PPC_INS_XSRDPIP = 1543
+PPC_INS_XSRDPIZ = 1544
+PPC_INS_XSREDP = 1545
+PPC_INS_XSRESP = 1546
+PPC_INS_XSRQPI = 1547
+PPC_INS_XSRQPIX = 1548
+PPC_INS_XSRQPXP = 1549
+PPC_INS_XSRSP = 1550
+PPC_INS_XSRSQRTEDP = 1551
+PPC_INS_XSRSQRTESP = 1552
+PPC_INS_XSSQRTDP = 1553
+PPC_INS_XSSQRTQP = 1554
+PPC_INS_XSSQRTQPO = 1555
+PPC_INS_XSSQRTSP = 1556
+PPC_INS_XSSUBDP = 1557
+PPC_INS_XSSUBQP = 1558
+PPC_INS_XSSUBQPO = 1559
+PPC_INS_XSSUBSP = 1560
+PPC_INS_XSTDIVDP = 1561
+PPC_INS_XSTSQRTDP = 1562
+PPC_INS_XSTSTDCDP = 1563
+PPC_INS_XSTSTDCQP = 1564
+PPC_INS_XSTSTDCSP = 1565
+PPC_INS_XSXEXPDP = 1566
+PPC_INS_XSXEXPQP = 1567
+PPC_INS_XSXSIGDP = 1568
+PPC_INS_XSXSIGQP = 1569
+PPC_INS_XVABSDP = 1570
+PPC_INS_XVABSSP = 1571
+PPC_INS_XVADDDP = 1572
+PPC_INS_XVADDSP = 1573
+PPC_INS_XVCMPEQDP = 1574
+PPC_INS_XVCMPEQSP = 1575
+PPC_INS_XVCMPGEDP = 1576
+PPC_INS_XVCMPGESP = 1577
+PPC_INS_XVCMPGTDP = 1578
+PPC_INS_XVCMPGTSP = 1579
+PPC_INS_XVCPSGNDP = 1580
+PPC_INS_XVCPSGNSP = 1581
+PPC_INS_XVCVDPSP = 1582
+PPC_INS_XVCVDPSXDS = 1583
+PPC_INS_XVCVDPSXWS = 1584
+PPC_INS_XVCVDPUXDS = 1585
+PPC_INS_XVCVDPUXWS = 1586
+PPC_INS_XVCVHPSP = 1587
+PPC_INS_XVCVSPDP = 1588
+PPC_INS_XVCVSPHP = 1589
+PPC_INS_XVCVSPSXDS = 1590
+PPC_INS_XVCVSPSXWS = 1591
+PPC_INS_XVCVSPUXDS = 1592
+PPC_INS_XVCVSPUXWS = 1593
+PPC_INS_XVCVSXDDP = 1594
+PPC_INS_XVCVSXDSP = 1595
+PPC_INS_XVCVSXWDP = 1596
+PPC_INS_XVCVSXWSP = 1597
+PPC_INS_XVCVUXDDP = 1598
+PPC_INS_XVCVUXDSP = 1599
+PPC_INS_XVCVUXWDP = 1600
+PPC_INS_XVCVUXWSP = 1601
+PPC_INS_XVDIVDP = 1602
+PPC_INS_XVDIVSP = 1603
+PPC_INS_XVIEXPDP = 1604
+PPC_INS_XVIEXPSP = 1605
+PPC_INS_XVMADDADP = 1606
+PPC_INS_XVMADDASP = 1607
+PPC_INS_XVMADDMDP = 1608
+PPC_INS_XVMADDMSP = 1609
+PPC_INS_XVMAXDP = 1610
+PPC_INS_XVMAXSP = 1611
+PPC_INS_XVMINDP = 1612
+PPC_INS_XVMINSP = 1613
+PPC_INS_XVMOVDP = 1614
+PPC_INS_XVMOVSP = 1615
+PPC_INS_XVMSUBADP = 1616
+PPC_INS_XVMSUBASP = 1617
+PPC_INS_XVMSUBMDP = 1618
+PPC_INS_XVMSUBMSP = 1619
+PPC_INS_XVMULDP = 1620
+PPC_INS_XVMULSP = 1621
+PPC_INS_XVNABSDP = 1622
+PPC_INS_XVNABSSP = 1623
+PPC_INS_XVNEGDP = 1624
+PPC_INS_XVNEGSP = 1625
+PPC_INS_XVNMADDADP = 1626
+PPC_INS_XVNMADDASP = 1627
+PPC_INS_XVNMADDMDP = 1628
+PPC_INS_XVNMADDMSP = 1629
+PPC_INS_XVNMSUBADP = 1630
+PPC_INS_XVNMSUBASP = 1631
+PPC_INS_XVNMSUBMDP = 1632
+PPC_INS_XVNMSUBMSP = 1633
+PPC_INS_XVRDPI = 1634
+PPC_INS_XVRDPIC = 1635
+PPC_INS_XVRDPIM = 1636
+PPC_INS_XVRDPIP = 1637
+PPC_INS_XVRDPIZ = 1638
+PPC_INS_XVREDP = 1639
+PPC_INS_XVRESP = 1640
+PPC_INS_XVRSPI = 1641
+PPC_INS_XVRSPIC = 1642
+PPC_INS_XVRSPIM = 1643
+PPC_INS_XVRSPIP = 1644
+PPC_INS_XVRSPIZ = 1645
+PPC_INS_XVRSQRTEDP = 1646
+PPC_INS_XVRSQRTESP = 1647
+PPC_INS_XVSQRTDP = 1648
+PPC_INS_XVSQRTSP = 1649
+PPC_INS_XVSUBDP = 1650
+PPC_INS_XVSUBSP = 1651
+PPC_INS_XVTDIVDP = 1652
+PPC_INS_XVTDIVSP = 1653
+PPC_INS_XVTSQRTDP = 1654
+PPC_INS_XVTSQRTSP = 1655
+PPC_INS_XVTSTDCDP = 1656
+PPC_INS_XVTSTDCSP = 1657
+PPC_INS_XVXEXPDP = 1658
+PPC_INS_XVXEXPSP = 1659
+PPC_INS_XVXSIGDP = 1660
+PPC_INS_XVXSIGSP = 1661
+PPC_INS_XXBRD = 1662
+PPC_INS_XXBRH = 1663
+PPC_INS_XXBRQ = 1664
+PPC_INS_XXBRW = 1665
+PPC_INS_XXEXTRACTUW = 1666
+PPC_INS_XXINSERTW = 1667
+PPC_INS_XXLAND = 1668
+PPC_INS_XXLANDC = 1669
+PPC_INS_XXLEQV = 1670
+PPC_INS_XXLNAND = 1671
+PPC_INS_XXLNOR = 1672
+PPC_INS_XXLOR = 1673
+PPC_INS_XXLORC = 1674
+PPC_INS_XXLXOR = 1675
+PPC_INS_XXMRGHD = 1676
+PPC_INS_XXMRGHW = 1677
+PPC_INS_XXMRGLD = 1678
+PPC_INS_XXMRGLW = 1679
+PPC_INS_XXPERM = 1680
+PPC_INS_XXPERMDI = 1681
+PPC_INS_XXPERMR = 1682
+PPC_INS_XXSEL = 1683
+PPC_INS_XXSLDWI = 1684
+PPC_INS_XXSPLTD = 1685
+PPC_INS_XXSPLTIB = 1686
+PPC_INS_XXSPLTW = 1687
+PPC_INS_XXSWAPD = 1688
+PPC_INS_ENDING = 1689
+
+PPC_GRP_INVALID = 0
+PPC_GRP_JUMP = 1
+PPC_GRP_ALTIVEC = 128
+PPC_GRP_MODE32 = 129
+PPC_GRP_MODE64 = 130
+PPC_GRP_BOOKE = 131
+PPC_GRP_NOTBOOKE = 132
+PPC_GRP_SPE = 133
+PPC_GRP_VSX = 134
+PPC_GRP_E500 = 135
+PPC_GRP_PPC4XX = 136
+PPC_GRP_PPC6XX = 137
+PPC_GRP_ICBT = 138
+PPC_GRP_P8ALTIVEC = 139
+PPC_GRP_P8VECTOR = 140
+PPC_GRP_QPX = 141
+PPC_GRP_ENDING = 142
diff --git a/capstone/bindings/python/capstone/riscv.py b/capstone/bindings/python/capstone/riscv.py
new file mode 100644
index 000000000..6e33a75f7
--- /dev/null
+++ b/capstone/bindings/python/capstone/riscv.py
@@ -0,0 +1,49 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .riscv_const import *
+
+# define the API
+class RISCVOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('disp', ctypes.c_int64),
+    )
+
+class RISCVOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', RISCVOpMem),
+    )
+
+class RISCVOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', RISCVOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsRISCV(ctypes.Structure):
+    _fields_ = (
+	('need_effective_addr', ctypes.c_bool),
+        ('op_count',            ctypes.c_uint8),
+        ('operands',            RISCVOp * 8),
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/riscv_const.py b/capstone/bindings/python/capstone/riscv_const.py
new file mode 100644
index 000000000..811d965ba
--- /dev/null
+++ b/capstone/bindings/python/capstone/riscv_const.py
@@ -0,0 +1,449 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [riscv_const.py]
+
+# Operand type for instruction's operands
+
+RISCV_OP_INVALID = 0
+RISCV_OP_REG = 1
+RISCV_OP_IMM = 2
+RISCV_OP_MEM = 3
+
+# RISCV registers
+
+RISCV_REG_INVALID = 0
+
+# General purpose registers
+RISCV_REG_X0 = 1
+RISCV_REG_ZERO = RISCV_REG_X0
+RISCV_REG_X1 = 2
+RISCV_REG_RA = RISCV_REG_X1
+RISCV_REG_X2 = 3
+RISCV_REG_SP = RISCV_REG_X2
+RISCV_REG_X3 = 4
+RISCV_REG_GP = RISCV_REG_X3
+RISCV_REG_X4 = 5
+RISCV_REG_TP = RISCV_REG_X4
+RISCV_REG_X5 = 6
+RISCV_REG_T0 = RISCV_REG_X5
+RISCV_REG_X6 = 7
+RISCV_REG_T1 = RISCV_REG_X6
+RISCV_REG_X7 = 8
+RISCV_REG_T2 = RISCV_REG_X7
+RISCV_REG_X8 = 9
+RISCV_REG_S0 = RISCV_REG_X8
+RISCV_REG_FP = RISCV_REG_X8
+RISCV_REG_X9 = 10
+RISCV_REG_S1 = RISCV_REG_X9
+RISCV_REG_X10 = 11
+RISCV_REG_A0 = RISCV_REG_X10
+RISCV_REG_X11 = 12
+RISCV_REG_A1 = RISCV_REG_X11
+RISCV_REG_X12 = 13
+RISCV_REG_A2 = RISCV_REG_X12
+RISCV_REG_X13 = 14
+RISCV_REG_A3 = RISCV_REG_X13
+RISCV_REG_X14 = 15
+RISCV_REG_A4 = RISCV_REG_X14
+RISCV_REG_X15 = 16
+RISCV_REG_A5 = RISCV_REG_X15
+RISCV_REG_X16 = 17
+RISCV_REG_A6 = RISCV_REG_X16
+RISCV_REG_X17 = 18
+RISCV_REG_A7 = RISCV_REG_X17
+RISCV_REG_X18 = 19
+RISCV_REG_S2 = RISCV_REG_X18
+RISCV_REG_X19 = 20
+RISCV_REG_S3 = RISCV_REG_X19
+RISCV_REG_X20 = 21
+RISCV_REG_S4 = RISCV_REG_X20
+RISCV_REG_X21 = 22
+RISCV_REG_S5 = RISCV_REG_X21
+RISCV_REG_X22 = 23
+RISCV_REG_S6 = RISCV_REG_X22
+RISCV_REG_X23 = 24
+RISCV_REG_S7 = RISCV_REG_X23
+RISCV_REG_X24 = 25
+RISCV_REG_S8 = RISCV_REG_X24
+RISCV_REG_X25 = 26
+RISCV_REG_S9 = RISCV_REG_X25
+RISCV_REG_X26 = 27
+RISCV_REG_S10 = RISCV_REG_X26
+RISCV_REG_X27 = 28
+RISCV_REG_S11 = RISCV_REG_X27
+RISCV_REG_X28 = 29
+RISCV_REG_T3 = RISCV_REG_X28
+RISCV_REG_X29 = 30
+RISCV_REG_T4 = RISCV_REG_X29
+RISCV_REG_X30 = 31
+RISCV_REG_T5 = RISCV_REG_X30
+RISCV_REG_X31 = 32
+RISCV_REG_T6 = RISCV_REG_X31
+
+# Floating-point registers
+RISCV_REG_F0_32 = 33
+RISCV_REG_F0_64 = 34
+RISCV_REG_F1_32 = 35
+RISCV_REG_F1_64 = 36
+RISCV_REG_F2_32 = 37
+RISCV_REG_F2_64 = 38
+RISCV_REG_F3_32 = 39
+RISCV_REG_F3_64 = 40
+RISCV_REG_F4_32 = 41
+RISCV_REG_F4_64 = 42
+RISCV_REG_F5_32 = 43
+RISCV_REG_F5_64 = 44
+RISCV_REG_F6_32 = 45
+RISCV_REG_F6_64 = 46
+RISCV_REG_F7_32 = 47
+RISCV_REG_F7_64 = 48
+RISCV_REG_F8_32 = 49
+RISCV_REG_F8_64 = 50
+RISCV_REG_F9_32 = 51
+RISCV_REG_F9_64 = 52
+RISCV_REG_F10_32 = 53
+RISCV_REG_F10_64 = 54
+RISCV_REG_F11_32 = 55
+RISCV_REG_F11_64 = 56
+RISCV_REG_F12_32 = 57
+RISCV_REG_F12_64 = 58
+RISCV_REG_F13_32 = 59
+RISCV_REG_F13_64 = 60
+RISCV_REG_F14_32 = 61
+RISCV_REG_F14_64 = 62
+RISCV_REG_F15_32 = 63
+RISCV_REG_F15_64 = 64
+RISCV_REG_F16_32 = 65
+RISCV_REG_F16_64 = 66
+RISCV_REG_F17_32 = 67
+RISCV_REG_F17_64 = 68
+RISCV_REG_F18_32 = 69
+RISCV_REG_F18_64 = 70
+RISCV_REG_F19_32 = 71
+RISCV_REG_F19_64 = 72
+RISCV_REG_F20_32 = 73
+RISCV_REG_F20_64 = 74
+RISCV_REG_F21_32 = 75
+RISCV_REG_F21_64 = 76
+RISCV_REG_F22_32 = 77
+RISCV_REG_F22_64 = 78
+RISCV_REG_F23_32 = 79
+RISCV_REG_F23_64 = 80
+RISCV_REG_F24_32 = 81
+RISCV_REG_F24_64 = 82
+RISCV_REG_F25_32 = 83
+RISCV_REG_F25_64 = 84
+RISCV_REG_F26_32 = 85
+RISCV_REG_F26_64 = 86
+RISCV_REG_F27_32 = 87
+RISCV_REG_F27_64 = 88
+RISCV_REG_F28_32 = 89
+RISCV_REG_F28_64 = 90
+RISCV_REG_F29_32 = 91
+RISCV_REG_F29_64 = 92
+RISCV_REG_F30_32 = 93
+RISCV_REG_F30_64 = 94
+RISCV_REG_F31_32 = 95
+RISCV_REG_F31_64 = 96
+RISCV_REG_ENDING = 97
+
+# RISCV instruction
+
+RISCV_INS_INVALID = 0
+RISCV_INS_ADD = 1
+RISCV_INS_ADDI = 2
+RISCV_INS_ADDIW = 3
+RISCV_INS_ADDW = 4
+RISCV_INS_AMOADD_D = 5
+RISCV_INS_AMOADD_D_AQ = 6
+RISCV_INS_AMOADD_D_AQ_RL = 7
+RISCV_INS_AMOADD_D_RL = 8
+RISCV_INS_AMOADD_W = 9
+RISCV_INS_AMOADD_W_AQ = 10
+RISCV_INS_AMOADD_W_AQ_RL = 11
+RISCV_INS_AMOADD_W_RL = 12
+RISCV_INS_AMOAND_D = 13
+RISCV_INS_AMOAND_D_AQ = 14
+RISCV_INS_AMOAND_D_AQ_RL = 15
+RISCV_INS_AMOAND_D_RL = 16
+RISCV_INS_AMOAND_W = 17
+RISCV_INS_AMOAND_W_AQ = 18
+RISCV_INS_AMOAND_W_AQ_RL = 19
+RISCV_INS_AMOAND_W_RL = 20
+RISCV_INS_AMOMAXU_D = 21
+RISCV_INS_AMOMAXU_D_AQ = 22
+RISCV_INS_AMOMAXU_D_AQ_RL = 23
+RISCV_INS_AMOMAXU_D_RL = 24
+RISCV_INS_AMOMAXU_W = 25
+RISCV_INS_AMOMAXU_W_AQ = 26
+RISCV_INS_AMOMAXU_W_AQ_RL = 27
+RISCV_INS_AMOMAXU_W_RL = 28
+RISCV_INS_AMOMAX_D = 29
+RISCV_INS_AMOMAX_D_AQ = 30
+RISCV_INS_AMOMAX_D_AQ_RL = 31
+RISCV_INS_AMOMAX_D_RL = 32
+RISCV_INS_AMOMAX_W = 33
+RISCV_INS_AMOMAX_W_AQ = 34
+RISCV_INS_AMOMAX_W_AQ_RL = 35
+RISCV_INS_AMOMAX_W_RL = 36
+RISCV_INS_AMOMINU_D = 37
+RISCV_INS_AMOMINU_D_AQ = 38
+RISCV_INS_AMOMINU_D_AQ_RL = 39
+RISCV_INS_AMOMINU_D_RL = 40
+RISCV_INS_AMOMINU_W = 41
+RISCV_INS_AMOMINU_W_AQ = 42
+RISCV_INS_AMOMINU_W_AQ_RL = 43
+RISCV_INS_AMOMINU_W_RL = 44
+RISCV_INS_AMOMIN_D = 45
+RISCV_INS_AMOMIN_D_AQ = 46
+RISCV_INS_AMOMIN_D_AQ_RL = 47
+RISCV_INS_AMOMIN_D_RL = 48
+RISCV_INS_AMOMIN_W = 49
+RISCV_INS_AMOMIN_W_AQ = 50
+RISCV_INS_AMOMIN_W_AQ_RL = 51
+RISCV_INS_AMOMIN_W_RL = 52
+RISCV_INS_AMOOR_D = 53
+RISCV_INS_AMOOR_D_AQ = 54
+RISCV_INS_AMOOR_D_AQ_RL = 55
+RISCV_INS_AMOOR_D_RL = 56
+RISCV_INS_AMOOR_W = 57
+RISCV_INS_AMOOR_W_AQ = 58
+RISCV_INS_AMOOR_W_AQ_RL = 59
+RISCV_INS_AMOOR_W_RL = 60
+RISCV_INS_AMOSWAP_D = 61
+RISCV_INS_AMOSWAP_D_AQ = 62
+RISCV_INS_AMOSWAP_D_AQ_RL = 63
+RISCV_INS_AMOSWAP_D_RL = 64
+RISCV_INS_AMOSWAP_W = 65
+RISCV_INS_AMOSWAP_W_AQ = 66
+RISCV_INS_AMOSWAP_W_AQ_RL = 67
+RISCV_INS_AMOSWAP_W_RL = 68
+RISCV_INS_AMOXOR_D = 69
+RISCV_INS_AMOXOR_D_AQ = 70
+RISCV_INS_AMOXOR_D_AQ_RL = 71
+RISCV_INS_AMOXOR_D_RL = 72
+RISCV_INS_AMOXOR_W = 73
+RISCV_INS_AMOXOR_W_AQ = 74
+RISCV_INS_AMOXOR_W_AQ_RL = 75
+RISCV_INS_AMOXOR_W_RL = 76
+RISCV_INS_AND = 77
+RISCV_INS_ANDI = 78
+RISCV_INS_AUIPC = 79
+RISCV_INS_BEQ = 80
+RISCV_INS_BGE = 81
+RISCV_INS_BGEU = 82
+RISCV_INS_BLT = 83
+RISCV_INS_BLTU = 84
+RISCV_INS_BNE = 85
+RISCV_INS_CSRRC = 86
+RISCV_INS_CSRRCI = 87
+RISCV_INS_CSRRS = 88
+RISCV_INS_CSRRSI = 89
+RISCV_INS_CSRRW = 90
+RISCV_INS_CSRRWI = 91
+RISCV_INS_C_ADD = 92
+RISCV_INS_C_ADDI = 93
+RISCV_INS_C_ADDI16SP = 94
+RISCV_INS_C_ADDI4SPN = 95
+RISCV_INS_C_ADDIW = 96
+RISCV_INS_C_ADDW = 97
+RISCV_INS_C_AND = 98
+RISCV_INS_C_ANDI = 99
+RISCV_INS_C_BEQZ = 100
+RISCV_INS_C_BNEZ = 101
+RISCV_INS_C_EBREAK = 102
+RISCV_INS_C_FLD = 103
+RISCV_INS_C_FLDSP = 104
+RISCV_INS_C_FLW = 105
+RISCV_INS_C_FLWSP = 106
+RISCV_INS_C_FSD = 107
+RISCV_INS_C_FSDSP = 108
+RISCV_INS_C_FSW = 109
+RISCV_INS_C_FSWSP = 110
+RISCV_INS_C_J = 111
+RISCV_INS_C_JAL = 112
+RISCV_INS_C_JALR = 113
+RISCV_INS_C_JR = 114
+RISCV_INS_C_LD = 115
+RISCV_INS_C_LDSP = 116
+RISCV_INS_C_LI = 117
+RISCV_INS_C_LUI = 118
+RISCV_INS_C_LW = 119
+RISCV_INS_C_LWSP = 120
+RISCV_INS_C_MV = 121
+RISCV_INS_C_NOP = 122
+RISCV_INS_C_OR = 123
+RISCV_INS_C_SD = 124
+RISCV_INS_C_SDSP = 125
+RISCV_INS_C_SLLI = 126
+RISCV_INS_C_SRAI = 127
+RISCV_INS_C_SRLI = 128
+RISCV_INS_C_SUB = 129
+RISCV_INS_C_SUBW = 130
+RISCV_INS_C_SW = 131
+RISCV_INS_C_SWSP = 132
+RISCV_INS_C_UNIMP = 133
+RISCV_INS_C_XOR = 134
+RISCV_INS_DIV = 135
+RISCV_INS_DIVU = 136
+RISCV_INS_DIVUW = 137
+RISCV_INS_DIVW = 138
+RISCV_INS_EBREAK = 139
+RISCV_INS_ECALL = 140
+RISCV_INS_FADD_D = 141
+RISCV_INS_FADD_S = 142
+RISCV_INS_FCLASS_D = 143
+RISCV_INS_FCLASS_S = 144
+RISCV_INS_FCVT_D_L = 145
+RISCV_INS_FCVT_D_LU = 146
+RISCV_INS_FCVT_D_S = 147
+RISCV_INS_FCVT_D_W = 148
+RISCV_INS_FCVT_D_WU = 149
+RISCV_INS_FCVT_LU_D = 150
+RISCV_INS_FCVT_LU_S = 151
+RISCV_INS_FCVT_L_D = 152
+RISCV_INS_FCVT_L_S = 153
+RISCV_INS_FCVT_S_D = 154
+RISCV_INS_FCVT_S_L = 155
+RISCV_INS_FCVT_S_LU = 156
+RISCV_INS_FCVT_S_W = 157
+RISCV_INS_FCVT_S_WU = 158
+RISCV_INS_FCVT_WU_D = 159
+RISCV_INS_FCVT_WU_S = 160
+RISCV_INS_FCVT_W_D = 161
+RISCV_INS_FCVT_W_S = 162
+RISCV_INS_FDIV_D = 163
+RISCV_INS_FDIV_S = 164
+RISCV_INS_FENCE = 165
+RISCV_INS_FENCE_I = 166
+RISCV_INS_FENCE_TSO = 167
+RISCV_INS_FEQ_D = 168
+RISCV_INS_FEQ_S = 169
+RISCV_INS_FLD = 170
+RISCV_INS_FLE_D = 171
+RISCV_INS_FLE_S = 172
+RISCV_INS_FLT_D = 173
+RISCV_INS_FLT_S = 174
+RISCV_INS_FLW = 175
+RISCV_INS_FMADD_D = 176
+RISCV_INS_FMADD_S = 177
+RISCV_INS_FMAX_D = 178
+RISCV_INS_FMAX_S = 179
+RISCV_INS_FMIN_D = 180
+RISCV_INS_FMIN_S = 181
+RISCV_INS_FMSUB_D = 182
+RISCV_INS_FMSUB_S = 183
+RISCV_INS_FMUL_D = 184
+RISCV_INS_FMUL_S = 185
+RISCV_INS_FMV_D_X = 186
+RISCV_INS_FMV_W_X = 187
+RISCV_INS_FMV_X_D = 188
+RISCV_INS_FMV_X_W = 189
+RISCV_INS_FNMADD_D = 190
+RISCV_INS_FNMADD_S = 191
+RISCV_INS_FNMSUB_D = 192
+RISCV_INS_FNMSUB_S = 193
+RISCV_INS_FSD = 194
+RISCV_INS_FSGNJN_D = 195
+RISCV_INS_FSGNJN_S = 196
+RISCV_INS_FSGNJX_D = 197
+RISCV_INS_FSGNJX_S = 198
+RISCV_INS_FSGNJ_D = 199
+RISCV_INS_FSGNJ_S = 200
+RISCV_INS_FSQRT_D = 201
+RISCV_INS_FSQRT_S = 202
+RISCV_INS_FSUB_D = 203
+RISCV_INS_FSUB_S = 204
+RISCV_INS_FSW = 205
+RISCV_INS_JAL = 206
+RISCV_INS_JALR = 207
+RISCV_INS_LB = 208
+RISCV_INS_LBU = 209
+RISCV_INS_LD = 210
+RISCV_INS_LH = 211
+RISCV_INS_LHU = 212
+RISCV_INS_LR_D = 213
+RISCV_INS_LR_D_AQ = 214
+RISCV_INS_LR_D_AQ_RL = 215
+RISCV_INS_LR_D_RL = 216
+RISCV_INS_LR_W = 217
+RISCV_INS_LR_W_AQ = 218
+RISCV_INS_LR_W_AQ_RL = 219
+RISCV_INS_LR_W_RL = 220
+RISCV_INS_LUI = 221
+RISCV_INS_LW = 222
+RISCV_INS_LWU = 223
+RISCV_INS_MRET = 224
+RISCV_INS_MUL = 225
+RISCV_INS_MULH = 226
+RISCV_INS_MULHSU = 227
+RISCV_INS_MULHU = 228
+RISCV_INS_MULW = 229
+RISCV_INS_OR = 230
+RISCV_INS_ORI = 231
+RISCV_INS_REM = 232
+RISCV_INS_REMU = 233
+RISCV_INS_REMUW = 234
+RISCV_INS_REMW = 235
+RISCV_INS_SB = 236
+RISCV_INS_SC_D = 237
+RISCV_INS_SC_D_AQ = 238
+RISCV_INS_SC_D_AQ_RL = 239
+RISCV_INS_SC_D_RL = 240
+RISCV_INS_SC_W = 241
+RISCV_INS_SC_W_AQ = 242
+RISCV_INS_SC_W_AQ_RL = 243
+RISCV_INS_SC_W_RL = 244
+RISCV_INS_SD = 245
+RISCV_INS_SFENCE_VMA = 246
+RISCV_INS_SH = 247
+RISCV_INS_SLL = 248
+RISCV_INS_SLLI = 249
+RISCV_INS_SLLIW = 250
+RISCV_INS_SLLW = 251
+RISCV_INS_SLT = 252
+RISCV_INS_SLTI = 253
+RISCV_INS_SLTIU = 254
+RISCV_INS_SLTU = 255
+RISCV_INS_SRA = 256
+RISCV_INS_SRAI = 257
+RISCV_INS_SRAIW = 258
+RISCV_INS_SRAW = 259
+RISCV_INS_SRET = 260
+RISCV_INS_SRL = 261
+RISCV_INS_SRLI = 262
+RISCV_INS_SRLIW = 263
+RISCV_INS_SRLW = 264
+RISCV_INS_SUB = 265
+RISCV_INS_SUBW = 266
+RISCV_INS_SW = 267
+RISCV_INS_UNIMP = 268
+RISCV_INS_URET = 269
+RISCV_INS_WFI = 270
+RISCV_INS_XOR = 271
+RISCV_INS_XORI = 272
+RISCV_INS_ENDING = 273
+
+# Group of RISCV instructions
+
+RISCV_GRP_INVALID = 0
+RISCV_GRP_JUMP = 1
+RISCV_GRP_ISRV32 = 128
+RISCV_GRP_ISRV64 = 129
+RISCV_GRP_HASSTDEXTA = 130
+RISCV_GRP_HASSTDEXTC = 131
+RISCV_GRP_HASSTDEXTD = 132
+RISCV_GRP_HASSTDEXTF = 133
+RISCV_GRP_HASSTDEXTM = 134
+RISCV_GRP_ISRVA = 135
+RISCV_GRP_ISRVC = 136
+RISCV_GRP_ISRVD = 137
+RISCV_GRP_ISRVCD = 138
+RISCV_GRP_ISRVF = 139
+RISCV_GRP_ISRV32C = 140
+RISCV_GRP_ISRV32CF = 141
+RISCV_GRP_ISRVM = 142
+RISCV_GRP_ISRV64A = 143
+RISCV_GRP_ISRV64C = 144
+RISCV_GRP_ISRV64D = 145
+RISCV_GRP_ISRV64F = 146
+RISCV_GRP_ISRV64M = 147
+RISCV_GRP_ENDING = 148
diff --git a/capstone/bindings/python/capstone/sparc.py b/capstone/bindings/python/capstone/sparc.py
new file mode 100644
index 000000000..1c536ff05
--- /dev/null
+++ b/capstone/bindings/python/capstone/sparc.py
@@ -0,0 +1,51 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .sparc_const import *
+
+# define the API
+class SparcOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('index', ctypes.c_uint8),
+        ('disp', ctypes.c_int32),
+    )
+
+class SparcOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', SparcOpMem),
+    )
+
+class SparcOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', SparcOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsSparc(ctypes.Structure):
+    _fields_ = (
+        ('cc', ctypes.c_uint),
+        ('hint', ctypes.c_uint),
+        ('op_count', ctypes.c_uint8),
+        ('operands', SparcOp * 4),
+    )
+
+def get_arch_info(a):
+    return (a.cc, a.hint, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/sparc_const.py b/capstone/bindings/python/capstone/sparc_const.py
new file mode 100644
index 000000000..6187691f8
--- /dev/null
+++ b/capstone/bindings/python/capstone/sparc_const.py
@@ -0,0 +1,429 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.py]
+
+SPARC_CC_INVALID = 0
+SPARC_CC_ICC_A = 8+256
+SPARC_CC_ICC_N = 0+256
+SPARC_CC_ICC_NE = 9+256
+SPARC_CC_ICC_E = 1+256
+SPARC_CC_ICC_G = 10+256
+SPARC_CC_ICC_LE = 2+256
+SPARC_CC_ICC_GE = 11+256
+SPARC_CC_ICC_L = 3+256
+SPARC_CC_ICC_GU = 12+256
+SPARC_CC_ICC_LEU = 4+256
+SPARC_CC_ICC_CC = 13+256
+SPARC_CC_ICC_CS = 5+256
+SPARC_CC_ICC_POS = 14+256
+SPARC_CC_ICC_NEG = 6+256
+SPARC_CC_ICC_VC = 15+256
+SPARC_CC_ICC_VS = 7+256
+SPARC_CC_FCC_A = 8+16+256
+SPARC_CC_FCC_N = 0+16+256
+SPARC_CC_FCC_U = 7+16+256
+SPARC_CC_FCC_G = 6+16+256
+SPARC_CC_FCC_UG = 5+16+256
+SPARC_CC_FCC_L = 4+16+256
+SPARC_CC_FCC_UL = 3+16+256
+SPARC_CC_FCC_LG = 2+16+256
+SPARC_CC_FCC_NE = 1+16+256
+SPARC_CC_FCC_E = 9+16+256
+SPARC_CC_FCC_UE = 10+16+256
+SPARC_CC_FCC_GE = 11+16+256
+SPARC_CC_FCC_UGE = 12+16+256
+SPARC_CC_FCC_LE = 13+16+256
+SPARC_CC_FCC_ULE = 14+16+256
+SPARC_CC_FCC_O = 15+16+256
+
+SPARC_HINT_INVALID = 0
+SPARC_HINT_A = 1<<0
+SPARC_HINT_PT = 1<<1
+SPARC_HINT_PN = 1<<2
+
+SPARC_OP_INVALID = 0
+SPARC_OP_REG = 1
+SPARC_OP_IMM = 2
+SPARC_OP_MEM = 3
+
+SPARC_REG_INVALID = 0
+SPARC_REG_F0 = 1
+SPARC_REG_F1 = 2
+SPARC_REG_F2 = 3
+SPARC_REG_F3 = 4
+SPARC_REG_F4 = 5
+SPARC_REG_F5 = 6
+SPARC_REG_F6 = 7
+SPARC_REG_F7 = 8
+SPARC_REG_F8 = 9
+SPARC_REG_F9 = 10
+SPARC_REG_F10 = 11
+SPARC_REG_F11 = 12
+SPARC_REG_F12 = 13
+SPARC_REG_F13 = 14
+SPARC_REG_F14 = 15
+SPARC_REG_F15 = 16
+SPARC_REG_F16 = 17
+SPARC_REG_F17 = 18
+SPARC_REG_F18 = 19
+SPARC_REG_F19 = 20
+SPARC_REG_F20 = 21
+SPARC_REG_F21 = 22
+SPARC_REG_F22 = 23
+SPARC_REG_F23 = 24
+SPARC_REG_F24 = 25
+SPARC_REG_F25 = 26
+SPARC_REG_F26 = 27
+SPARC_REG_F27 = 28
+SPARC_REG_F28 = 29
+SPARC_REG_F29 = 30
+SPARC_REG_F30 = 31
+SPARC_REG_F31 = 32
+SPARC_REG_F32 = 33
+SPARC_REG_F34 = 34
+SPARC_REG_F36 = 35
+SPARC_REG_F38 = 36
+SPARC_REG_F40 = 37
+SPARC_REG_F42 = 38
+SPARC_REG_F44 = 39
+SPARC_REG_F46 = 40
+SPARC_REG_F48 = 41
+SPARC_REG_F50 = 42
+SPARC_REG_F52 = 43
+SPARC_REG_F54 = 44
+SPARC_REG_F56 = 45
+SPARC_REG_F58 = 46
+SPARC_REG_F60 = 47
+SPARC_REG_F62 = 48
+SPARC_REG_FCC0 = 49
+SPARC_REG_FCC1 = 50
+SPARC_REG_FCC2 = 51
+SPARC_REG_FCC3 = 52
+SPARC_REG_FP = 53
+SPARC_REG_G0 = 54
+SPARC_REG_G1 = 55
+SPARC_REG_G2 = 56
+SPARC_REG_G3 = 57
+SPARC_REG_G4 = 58
+SPARC_REG_G5 = 59
+SPARC_REG_G6 = 60
+SPARC_REG_G7 = 61
+SPARC_REG_I0 = 62
+SPARC_REG_I1 = 63
+SPARC_REG_I2 = 64
+SPARC_REG_I3 = 65
+SPARC_REG_I4 = 66
+SPARC_REG_I5 = 67
+SPARC_REG_I7 = 68
+SPARC_REG_ICC = 69
+SPARC_REG_L0 = 70
+SPARC_REG_L1 = 71
+SPARC_REG_L2 = 72
+SPARC_REG_L3 = 73
+SPARC_REG_L4 = 74
+SPARC_REG_L5 = 75
+SPARC_REG_L6 = 76
+SPARC_REG_L7 = 77
+SPARC_REG_O0 = 78
+SPARC_REG_O1 = 79
+SPARC_REG_O2 = 80
+SPARC_REG_O3 = 81
+SPARC_REG_O4 = 82
+SPARC_REG_O5 = 83
+SPARC_REG_O7 = 84
+SPARC_REG_SP = 85
+SPARC_REG_Y = 86
+SPARC_REG_XCC = 87
+SPARC_REG_ENDING = 88
+SPARC_REG_O6 = SPARC_REG_SP
+SPARC_REG_I6 = SPARC_REG_FP
+
+SPARC_INS_INVALID = 0
+SPARC_INS_ADDCC = 1
+SPARC_INS_ADDX = 2
+SPARC_INS_ADDXCC = 3
+SPARC_INS_ADDXC = 4
+SPARC_INS_ADDXCCC = 5
+SPARC_INS_ADD = 6
+SPARC_INS_ALIGNADDR = 7
+SPARC_INS_ALIGNADDRL = 8
+SPARC_INS_ANDCC = 9
+SPARC_INS_ANDNCC = 10
+SPARC_INS_ANDN = 11
+SPARC_INS_AND = 12
+SPARC_INS_ARRAY16 = 13
+SPARC_INS_ARRAY32 = 14
+SPARC_INS_ARRAY8 = 15
+SPARC_INS_B = 16
+SPARC_INS_JMP = 17
+SPARC_INS_BMASK = 18
+SPARC_INS_FB = 19
+SPARC_INS_BRGEZ = 20
+SPARC_INS_BRGZ = 21
+SPARC_INS_BRLEZ = 22
+SPARC_INS_BRLZ = 23
+SPARC_INS_BRNZ = 24
+SPARC_INS_BRZ = 25
+SPARC_INS_BSHUFFLE = 26
+SPARC_INS_CALL = 27
+SPARC_INS_CASX = 28
+SPARC_INS_CAS = 29
+SPARC_INS_CMASK16 = 30
+SPARC_INS_CMASK32 = 31
+SPARC_INS_CMASK8 = 32
+SPARC_INS_CMP = 33
+SPARC_INS_EDGE16 = 34
+SPARC_INS_EDGE16L = 35
+SPARC_INS_EDGE16LN = 36
+SPARC_INS_EDGE16N = 37
+SPARC_INS_EDGE32 = 38
+SPARC_INS_EDGE32L = 39
+SPARC_INS_EDGE32LN = 40
+SPARC_INS_EDGE32N = 41
+SPARC_INS_EDGE8 = 42
+SPARC_INS_EDGE8L = 43
+SPARC_INS_EDGE8LN = 44
+SPARC_INS_EDGE8N = 45
+SPARC_INS_FABSD = 46
+SPARC_INS_FABSQ = 47
+SPARC_INS_FABSS = 48
+SPARC_INS_FADDD = 49
+SPARC_INS_FADDQ = 50
+SPARC_INS_FADDS = 51
+SPARC_INS_FALIGNDATA = 52
+SPARC_INS_FAND = 53
+SPARC_INS_FANDNOT1 = 54
+SPARC_INS_FANDNOT1S = 55
+SPARC_INS_FANDNOT2 = 56
+SPARC_INS_FANDNOT2S = 57
+SPARC_INS_FANDS = 58
+SPARC_INS_FCHKSM16 = 59
+SPARC_INS_FCMPD = 60
+SPARC_INS_FCMPEQ16 = 61
+SPARC_INS_FCMPEQ32 = 62
+SPARC_INS_FCMPGT16 = 63
+SPARC_INS_FCMPGT32 = 64
+SPARC_INS_FCMPLE16 = 65
+SPARC_INS_FCMPLE32 = 66
+SPARC_INS_FCMPNE16 = 67
+SPARC_INS_FCMPNE32 = 68
+SPARC_INS_FCMPQ = 69
+SPARC_INS_FCMPS = 70
+SPARC_INS_FDIVD = 71
+SPARC_INS_FDIVQ = 72
+SPARC_INS_FDIVS = 73
+SPARC_INS_FDMULQ = 74
+SPARC_INS_FDTOI = 75
+SPARC_INS_FDTOQ = 76
+SPARC_INS_FDTOS = 77
+SPARC_INS_FDTOX = 78
+SPARC_INS_FEXPAND = 79
+SPARC_INS_FHADDD = 80
+SPARC_INS_FHADDS = 81
+SPARC_INS_FHSUBD = 82
+SPARC_INS_FHSUBS = 83
+SPARC_INS_FITOD = 84
+SPARC_INS_FITOQ = 85
+SPARC_INS_FITOS = 86
+SPARC_INS_FLCMPD = 87
+SPARC_INS_FLCMPS = 88
+SPARC_INS_FLUSHW = 89
+SPARC_INS_FMEAN16 = 90
+SPARC_INS_FMOVD = 91
+SPARC_INS_FMOVQ = 92
+SPARC_INS_FMOVRDGEZ = 93
+SPARC_INS_FMOVRQGEZ = 94
+SPARC_INS_FMOVRSGEZ = 95
+SPARC_INS_FMOVRDGZ = 96
+SPARC_INS_FMOVRQGZ = 97
+SPARC_INS_FMOVRSGZ = 98
+SPARC_INS_FMOVRDLEZ = 99
+SPARC_INS_FMOVRQLEZ = 100
+SPARC_INS_FMOVRSLEZ = 101
+SPARC_INS_FMOVRDLZ = 102
+SPARC_INS_FMOVRQLZ = 103
+SPARC_INS_FMOVRSLZ = 104
+SPARC_INS_FMOVRDNZ = 105
+SPARC_INS_FMOVRQNZ = 106
+SPARC_INS_FMOVRSNZ = 107
+SPARC_INS_FMOVRDZ = 108
+SPARC_INS_FMOVRQZ = 109
+SPARC_INS_FMOVRSZ = 110
+SPARC_INS_FMOVS = 111
+SPARC_INS_FMUL8SUX16 = 112
+SPARC_INS_FMUL8ULX16 = 113
+SPARC_INS_FMUL8X16 = 114
+SPARC_INS_FMUL8X16AL = 115
+SPARC_INS_FMUL8X16AU = 116
+SPARC_INS_FMULD = 117
+SPARC_INS_FMULD8SUX16 = 118
+SPARC_INS_FMULD8ULX16 = 119
+SPARC_INS_FMULQ = 120
+SPARC_INS_FMULS = 121
+SPARC_INS_FNADDD = 122
+SPARC_INS_FNADDS = 123
+SPARC_INS_FNAND = 124
+SPARC_INS_FNANDS = 125
+SPARC_INS_FNEGD = 126
+SPARC_INS_FNEGQ = 127
+SPARC_INS_FNEGS = 128
+SPARC_INS_FNHADDD = 129
+SPARC_INS_FNHADDS = 130
+SPARC_INS_FNOR = 131
+SPARC_INS_FNORS = 132
+SPARC_INS_FNOT1 = 133
+SPARC_INS_FNOT1S = 134
+SPARC_INS_FNOT2 = 135
+SPARC_INS_FNOT2S = 136
+SPARC_INS_FONE = 137
+SPARC_INS_FONES = 138
+SPARC_INS_FOR = 139
+SPARC_INS_FORNOT1 = 140
+SPARC_INS_FORNOT1S = 141
+SPARC_INS_FORNOT2 = 142
+SPARC_INS_FORNOT2S = 143
+SPARC_INS_FORS = 144
+SPARC_INS_FPACK16 = 145
+SPARC_INS_FPACK32 = 146
+SPARC_INS_FPACKFIX = 147
+SPARC_INS_FPADD16 = 148
+SPARC_INS_FPADD16S = 149
+SPARC_INS_FPADD32 = 150
+SPARC_INS_FPADD32S = 151
+SPARC_INS_FPADD64 = 152
+SPARC_INS_FPMERGE = 153
+SPARC_INS_FPSUB16 = 154
+SPARC_INS_FPSUB16S = 155
+SPARC_INS_FPSUB32 = 156
+SPARC_INS_FPSUB32S = 157
+SPARC_INS_FQTOD = 158
+SPARC_INS_FQTOI = 159
+SPARC_INS_FQTOS = 160
+SPARC_INS_FQTOX = 161
+SPARC_INS_FSLAS16 = 162
+SPARC_INS_FSLAS32 = 163
+SPARC_INS_FSLL16 = 164
+SPARC_INS_FSLL32 = 165
+SPARC_INS_FSMULD = 166
+SPARC_INS_FSQRTD = 167
+SPARC_INS_FSQRTQ = 168
+SPARC_INS_FSQRTS = 169
+SPARC_INS_FSRA16 = 170
+SPARC_INS_FSRA32 = 171
+SPARC_INS_FSRC1 = 172
+SPARC_INS_FSRC1S = 173
+SPARC_INS_FSRC2 = 174
+SPARC_INS_FSRC2S = 175
+SPARC_INS_FSRL16 = 176
+SPARC_INS_FSRL32 = 177
+SPARC_INS_FSTOD = 178
+SPARC_INS_FSTOI = 179
+SPARC_INS_FSTOQ = 180
+SPARC_INS_FSTOX = 181
+SPARC_INS_FSUBD = 182
+SPARC_INS_FSUBQ = 183
+SPARC_INS_FSUBS = 184
+SPARC_INS_FXNOR = 185
+SPARC_INS_FXNORS = 186
+SPARC_INS_FXOR = 187
+SPARC_INS_FXORS = 188
+SPARC_INS_FXTOD = 189
+SPARC_INS_FXTOQ = 190
+SPARC_INS_FXTOS = 191
+SPARC_INS_FZERO = 192
+SPARC_INS_FZEROS = 193
+SPARC_INS_JMPL = 194
+SPARC_INS_LDD = 195
+SPARC_INS_LD = 196
+SPARC_INS_LDQ = 197
+SPARC_INS_LDSB = 198
+SPARC_INS_LDSH = 199
+SPARC_INS_LDSW = 200
+SPARC_INS_LDUB = 201
+SPARC_INS_LDUH = 202
+SPARC_INS_LDX = 203
+SPARC_INS_LZCNT = 204
+SPARC_INS_MEMBAR = 205
+SPARC_INS_MOVDTOX = 206
+SPARC_INS_MOV = 207
+SPARC_INS_MOVRGEZ = 208
+SPARC_INS_MOVRGZ = 209
+SPARC_INS_MOVRLEZ = 210
+SPARC_INS_MOVRLZ = 211
+SPARC_INS_MOVRNZ = 212
+SPARC_INS_MOVRZ = 213
+SPARC_INS_MOVSTOSW = 214
+SPARC_INS_MOVSTOUW = 215
+SPARC_INS_MULX = 216
+SPARC_INS_NOP = 217
+SPARC_INS_ORCC = 218
+SPARC_INS_ORNCC = 219
+SPARC_INS_ORN = 220
+SPARC_INS_OR = 221
+SPARC_INS_PDIST = 222
+SPARC_INS_PDISTN = 223
+SPARC_INS_POPC = 224
+SPARC_INS_RD = 225
+SPARC_INS_RESTORE = 226
+SPARC_INS_RETT = 227
+SPARC_INS_SAVE = 228
+SPARC_INS_SDIVCC = 229
+SPARC_INS_SDIVX = 230
+SPARC_INS_SDIV = 231
+SPARC_INS_SETHI = 232
+SPARC_INS_SHUTDOWN = 233
+SPARC_INS_SIAM = 234
+SPARC_INS_SLLX = 235
+SPARC_INS_SLL = 236
+SPARC_INS_SMULCC = 237
+SPARC_INS_SMUL = 238
+SPARC_INS_SRAX = 239
+SPARC_INS_SRA = 240
+SPARC_INS_SRLX = 241
+SPARC_INS_SRL = 242
+SPARC_INS_STBAR = 243
+SPARC_INS_STB = 244
+SPARC_INS_STD = 245
+SPARC_INS_ST = 246
+SPARC_INS_STH = 247
+SPARC_INS_STQ = 248
+SPARC_INS_STX = 249
+SPARC_INS_SUBCC = 250
+SPARC_INS_SUBX = 251
+SPARC_INS_SUBXCC = 252
+SPARC_INS_SUB = 253
+SPARC_INS_SWAP = 254
+SPARC_INS_TADDCCTV = 255
+SPARC_INS_TADDCC = 256
+SPARC_INS_T = 257
+SPARC_INS_TSUBCCTV = 258
+SPARC_INS_TSUBCC = 259
+SPARC_INS_UDIVCC = 260
+SPARC_INS_UDIVX = 261
+SPARC_INS_UDIV = 262
+SPARC_INS_UMULCC = 263
+SPARC_INS_UMULXHI = 264
+SPARC_INS_UMUL = 265
+SPARC_INS_UNIMP = 266
+SPARC_INS_FCMPED = 267
+SPARC_INS_FCMPEQ = 268
+SPARC_INS_FCMPES = 269
+SPARC_INS_WR = 270
+SPARC_INS_XMULX = 271
+SPARC_INS_XMULXHI = 272
+SPARC_INS_XNORCC = 273
+SPARC_INS_XNOR = 274
+SPARC_INS_XORCC = 275
+SPARC_INS_XOR = 276
+SPARC_INS_RET = 277
+SPARC_INS_RETL = 278
+SPARC_INS_ENDING = 279
+
+SPARC_GRP_INVALID = 0
+SPARC_GRP_JUMP = 1
+SPARC_GRP_HARDQUAD = 128
+SPARC_GRP_V9 = 129
+SPARC_GRP_VIS = 130
+SPARC_GRP_VIS2 = 131
+SPARC_GRP_VIS3 = 132
+SPARC_GRP_32BIT = 133
+SPARC_GRP_64BIT = 134
+SPARC_GRP_ENDING = 135
diff --git a/capstone/bindings/python/capstone/systemz.py b/capstone/bindings/python/capstone/systemz.py
new file mode 100644
index 000000000..398018b25
--- /dev/null
+++ b/capstone/bindings/python/capstone/systemz.py
@@ -0,0 +1,51 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .sysz_const import *
+
+# define the API
+class SyszOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('index', ctypes.c_uint8),
+        ('length', ctypes.c_uint64),
+        ('disp', ctypes.c_int64),
+    )
+
+class SyszOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', SyszOpMem),
+    )
+
+class SyszOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', SyszOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsSysz(ctypes.Structure):
+    _fields_ = (
+        ('cc', ctypes.c_uint),
+        ('op_count', ctypes.c_uint8),
+        ('operands', SyszOp * 6),
+    )
+
+def get_arch_info(a):
+    return (a.cc, copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/sysz_const.py b/capstone/bindings/python/capstone/sysz_const.py
new file mode 100644
index 000000000..e2e9cdd4b
--- /dev/null
+++ b/capstone/bindings/python/capstone/sysz_const.py
@@ -0,0 +1,2523 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sysz_const.py]
+
+SYSZ_CC_INVALID = 0
+SYSZ_CC_O = 1
+SYSZ_CC_H = 2
+SYSZ_CC_NLE = 3
+SYSZ_CC_L = 4
+SYSZ_CC_NHE = 5
+SYSZ_CC_LH = 6
+SYSZ_CC_NE = 7
+SYSZ_CC_E = 8
+SYSZ_CC_NLH = 9
+SYSZ_CC_HE = 10
+SYSZ_CC_NL = 11
+SYSZ_CC_LE = 12
+SYSZ_CC_NH = 13
+SYSZ_CC_NO = 14
+
+SYSZ_OP_INVALID = 0
+SYSZ_OP_REG = 1
+SYSZ_OP_IMM = 2
+SYSZ_OP_MEM = 3
+SYSZ_OP_ACREG = 64
+
+SYSZ_REG_INVALID = 0
+SYSZ_REG_0 = 1
+SYSZ_REG_1 = 2
+SYSZ_REG_2 = 3
+SYSZ_REG_3 = 4
+SYSZ_REG_4 = 5
+SYSZ_REG_5 = 6
+SYSZ_REG_6 = 7
+SYSZ_REG_7 = 8
+SYSZ_REG_8 = 9
+SYSZ_REG_9 = 10
+SYSZ_REG_10 = 11
+SYSZ_REG_11 = 12
+SYSZ_REG_12 = 13
+SYSZ_REG_13 = 14
+SYSZ_REG_14 = 15
+SYSZ_REG_15 = 16
+SYSZ_REG_CC = 17
+SYSZ_REG_F0 = 18
+SYSZ_REG_F1 = 19
+SYSZ_REG_F2 = 20
+SYSZ_REG_F3 = 21
+SYSZ_REG_F4 = 22
+SYSZ_REG_F5 = 23
+SYSZ_REG_F6 = 24
+SYSZ_REG_F7 = 25
+SYSZ_REG_F8 = 26
+SYSZ_REG_F9 = 27
+SYSZ_REG_F10 = 28
+SYSZ_REG_F11 = 29
+SYSZ_REG_F12 = 30
+SYSZ_REG_F13 = 31
+SYSZ_REG_F14 = 32
+SYSZ_REG_F15 = 33
+SYSZ_REG_R0L = 34
+SYSZ_REG_A0 = 35
+SYSZ_REG_A1 = 36
+SYSZ_REG_A2 = 37
+SYSZ_REG_A3 = 38
+SYSZ_REG_A4 = 39
+SYSZ_REG_A5 = 40
+SYSZ_REG_A6 = 41
+SYSZ_REG_A7 = 42
+SYSZ_REG_A8 = 43
+SYSZ_REG_A9 = 44
+SYSZ_REG_A10 = 45
+SYSZ_REG_A11 = 46
+SYSZ_REG_A12 = 47
+SYSZ_REG_A13 = 48
+SYSZ_REG_A14 = 49
+SYSZ_REG_A15 = 50
+SYSZ_REG_C0 = 51
+SYSZ_REG_C1 = 52
+SYSZ_REG_C2 = 53
+SYSZ_REG_C3 = 54
+SYSZ_REG_C4 = 55
+SYSZ_REG_C5 = 56
+SYSZ_REG_C6 = 57
+SYSZ_REG_C7 = 58
+SYSZ_REG_C8 = 59
+SYSZ_REG_C9 = 60
+SYSZ_REG_C10 = 61
+SYSZ_REG_C11 = 62
+SYSZ_REG_C12 = 63
+SYSZ_REG_C13 = 64
+SYSZ_REG_C14 = 65
+SYSZ_REG_C15 = 66
+SYSZ_REG_V0 = 67
+SYSZ_REG_V1 = 68
+SYSZ_REG_V2 = 69
+SYSZ_REG_V3 = 70
+SYSZ_REG_V4 = 71
+SYSZ_REG_V5 = 72
+SYSZ_REG_V6 = 73
+SYSZ_REG_V7 = 74
+SYSZ_REG_V8 = 75
+SYSZ_REG_V9 = 76
+SYSZ_REG_V10 = 77
+SYSZ_REG_V11 = 78
+SYSZ_REG_V12 = 79
+SYSZ_REG_V13 = 80
+SYSZ_REG_V14 = 81
+SYSZ_REG_V15 = 82
+SYSZ_REG_V16 = 83
+SYSZ_REG_V17 = 84
+SYSZ_REG_V18 = 85
+SYSZ_REG_V19 = 86
+SYSZ_REG_V20 = 87
+SYSZ_REG_V21 = 88
+SYSZ_REG_V22 = 89
+SYSZ_REG_V23 = 90
+SYSZ_REG_V24 = 91
+SYSZ_REG_V25 = 92
+SYSZ_REG_V26 = 93
+SYSZ_REG_V27 = 94
+SYSZ_REG_V28 = 95
+SYSZ_REG_V29 = 96
+SYSZ_REG_V30 = 97
+SYSZ_REG_V31 = 98
+SYSZ_REG_F16 = 99
+SYSZ_REG_F17 = 100
+SYSZ_REG_F18 = 101
+SYSZ_REG_F19 = 102
+SYSZ_REG_F20 = 103
+SYSZ_REG_F21 = 104
+SYSZ_REG_F22 = 105
+SYSZ_REG_F23 = 106
+SYSZ_REG_F24 = 107
+SYSZ_REG_F25 = 108
+SYSZ_REG_F26 = 109
+SYSZ_REG_F27 = 110
+SYSZ_REG_F28 = 111
+SYSZ_REG_F29 = 112
+SYSZ_REG_F30 = 113
+SYSZ_REG_F31 = 114
+SYSZ_REG_F0Q = 115
+SYSZ_REG_F4Q = 116
+SYSZ_REG_ENDING = 117
+
+SYSZ_INS_INVALID = 0
+SYSZ_INS_A = 1
+SYSZ_INS_ADB = 2
+SYSZ_INS_ADBR = 3
+SYSZ_INS_AEB = 4
+SYSZ_INS_AEBR = 5
+SYSZ_INS_AFI = 6
+SYSZ_INS_AG = 7
+SYSZ_INS_AGF = 8
+SYSZ_INS_AGFI = 9
+SYSZ_INS_AGFR = 10
+SYSZ_INS_AGHI = 11
+SYSZ_INS_AGHIK = 12
+SYSZ_INS_AGR = 13
+SYSZ_INS_AGRK = 14
+SYSZ_INS_AGSI = 15
+SYSZ_INS_AH = 16
+SYSZ_INS_AHI = 17
+SYSZ_INS_AHIK = 18
+SYSZ_INS_AHY = 19
+SYSZ_INS_AIH = 20
+SYSZ_INS_AL = 21
+SYSZ_INS_ALC = 22
+SYSZ_INS_ALCG = 23
+SYSZ_INS_ALCGR = 24
+SYSZ_INS_ALCR = 25
+SYSZ_INS_ALFI = 26
+SYSZ_INS_ALG = 27
+SYSZ_INS_ALGF = 28
+SYSZ_INS_ALGFI = 29
+SYSZ_INS_ALGFR = 30
+SYSZ_INS_ALGHSIK = 31
+SYSZ_INS_ALGR = 32
+SYSZ_INS_ALGRK = 33
+SYSZ_INS_ALHSIK = 34
+SYSZ_INS_ALR = 35
+SYSZ_INS_ALRK = 36
+SYSZ_INS_ALY = 37
+SYSZ_INS_AR = 38
+SYSZ_INS_ARK = 39
+SYSZ_INS_ASI = 40
+SYSZ_INS_AXBR = 41
+SYSZ_INS_AY = 42
+SYSZ_INS_BCR = 43
+SYSZ_INS_BRC = 44
+SYSZ_INS_BRCL = 45
+SYSZ_INS_CGIJ = 46
+SYSZ_INS_CGRJ = 47
+SYSZ_INS_CIJ = 48
+SYSZ_INS_CLGIJ = 49
+SYSZ_INS_CLGRJ = 50
+SYSZ_INS_CLIJ = 51
+SYSZ_INS_CLRJ = 52
+SYSZ_INS_CRJ = 53
+SYSZ_INS_BER = 54
+SYSZ_INS_JE = 55
+SYSZ_INS_JGE = 56
+SYSZ_INS_LOCE = 57
+SYSZ_INS_LOCGE = 58
+SYSZ_INS_LOCGRE = 59
+SYSZ_INS_LOCRE = 60
+SYSZ_INS_STOCE = 61
+SYSZ_INS_STOCGE = 62
+SYSZ_INS_BHR = 63
+SYSZ_INS_BHER = 64
+SYSZ_INS_JHE = 65
+SYSZ_INS_JGHE = 66
+SYSZ_INS_LOCHE = 67
+SYSZ_INS_LOCGHE = 68
+SYSZ_INS_LOCGRHE = 69
+SYSZ_INS_LOCRHE = 70
+SYSZ_INS_STOCHE = 71
+SYSZ_INS_STOCGHE = 72
+SYSZ_INS_JH = 73
+SYSZ_INS_JGH = 74
+SYSZ_INS_LOCH = 75
+SYSZ_INS_LOCGH = 76
+SYSZ_INS_LOCGRH = 77
+SYSZ_INS_LOCRH = 78
+SYSZ_INS_STOCH = 79
+SYSZ_INS_STOCGH = 80
+SYSZ_INS_CGIJNLH = 81
+SYSZ_INS_CGRJNLH = 82
+SYSZ_INS_CIJNLH = 83
+SYSZ_INS_CLGIJNLH = 84
+SYSZ_INS_CLGRJNLH = 85
+SYSZ_INS_CLIJNLH = 86
+SYSZ_INS_CLRJNLH = 87
+SYSZ_INS_CRJNLH = 88
+SYSZ_INS_CGIJE = 89
+SYSZ_INS_CGRJE = 90
+SYSZ_INS_CIJE = 91
+SYSZ_INS_CLGIJE = 92
+SYSZ_INS_CLGRJE = 93
+SYSZ_INS_CLIJE = 94
+SYSZ_INS_CLRJE = 95
+SYSZ_INS_CRJE = 96
+SYSZ_INS_CGIJNLE = 97
+SYSZ_INS_CGRJNLE = 98
+SYSZ_INS_CIJNLE = 99
+SYSZ_INS_CLGIJNLE = 100
+SYSZ_INS_CLGRJNLE = 101
+SYSZ_INS_CLIJNLE = 102
+SYSZ_INS_CLRJNLE = 103
+SYSZ_INS_CRJNLE = 104
+SYSZ_INS_CGIJH = 105
+SYSZ_INS_CGRJH = 106
+SYSZ_INS_CIJH = 107
+SYSZ_INS_CLGIJH = 108
+SYSZ_INS_CLGRJH = 109
+SYSZ_INS_CLIJH = 110
+SYSZ_INS_CLRJH = 111
+SYSZ_INS_CRJH = 112
+SYSZ_INS_CGIJNL = 113
+SYSZ_INS_CGRJNL = 114
+SYSZ_INS_CIJNL = 115
+SYSZ_INS_CLGIJNL = 116
+SYSZ_INS_CLGRJNL = 117
+SYSZ_INS_CLIJNL = 118
+SYSZ_INS_CLRJNL = 119
+SYSZ_INS_CRJNL = 120
+SYSZ_INS_CGIJHE = 121
+SYSZ_INS_CGRJHE = 122
+SYSZ_INS_CIJHE = 123
+SYSZ_INS_CLGIJHE = 124
+SYSZ_INS_CLGRJHE = 125
+SYSZ_INS_CLIJHE = 126
+SYSZ_INS_CLRJHE = 127
+SYSZ_INS_CRJHE = 128
+SYSZ_INS_CGIJNHE = 129
+SYSZ_INS_CGRJNHE = 130
+SYSZ_INS_CIJNHE = 131
+SYSZ_INS_CLGIJNHE = 132
+SYSZ_INS_CLGRJNHE = 133
+SYSZ_INS_CLIJNHE = 134
+SYSZ_INS_CLRJNHE = 135
+SYSZ_INS_CRJNHE = 136
+SYSZ_INS_CGIJL = 137
+SYSZ_INS_CGRJL = 138
+SYSZ_INS_CIJL = 139
+SYSZ_INS_CLGIJL = 140
+SYSZ_INS_CLGRJL = 141
+SYSZ_INS_CLIJL = 142
+SYSZ_INS_CLRJL = 143
+SYSZ_INS_CRJL = 144
+SYSZ_INS_CGIJNH = 145
+SYSZ_INS_CGRJNH = 146
+SYSZ_INS_CIJNH = 147
+SYSZ_INS_CLGIJNH = 148
+SYSZ_INS_CLGRJNH = 149
+SYSZ_INS_CLIJNH = 150
+SYSZ_INS_CLRJNH = 151
+SYSZ_INS_CRJNH = 152
+SYSZ_INS_CGIJLE = 153
+SYSZ_INS_CGRJLE = 154
+SYSZ_INS_CIJLE = 155
+SYSZ_INS_CLGIJLE = 156
+SYSZ_INS_CLGRJLE = 157
+SYSZ_INS_CLIJLE = 158
+SYSZ_INS_CLRJLE = 159
+SYSZ_INS_CRJLE = 160
+SYSZ_INS_CGIJNE = 161
+SYSZ_INS_CGRJNE = 162
+SYSZ_INS_CIJNE = 163
+SYSZ_INS_CLGIJNE = 164
+SYSZ_INS_CLGRJNE = 165
+SYSZ_INS_CLIJNE = 166
+SYSZ_INS_CLRJNE = 167
+SYSZ_INS_CRJNE = 168
+SYSZ_INS_CGIJLH = 169
+SYSZ_INS_CGRJLH = 170
+SYSZ_INS_CIJLH = 171
+SYSZ_INS_CLGIJLH = 172
+SYSZ_INS_CLGRJLH = 173
+SYSZ_INS_CLIJLH = 174
+SYSZ_INS_CLRJLH = 175
+SYSZ_INS_CRJLH = 176
+SYSZ_INS_BLR = 177
+SYSZ_INS_BLER = 178
+SYSZ_INS_JLE = 179
+SYSZ_INS_JGLE = 180
+SYSZ_INS_LOCLE = 181
+SYSZ_INS_LOCGLE = 182
+SYSZ_INS_LOCGRLE = 183
+SYSZ_INS_LOCRLE = 184
+SYSZ_INS_STOCLE = 185
+SYSZ_INS_STOCGLE = 186
+SYSZ_INS_BLHR = 187
+SYSZ_INS_JLH = 188
+SYSZ_INS_JGLH = 189
+SYSZ_INS_LOCLH = 190
+SYSZ_INS_LOCGLH = 191
+SYSZ_INS_LOCGRLH = 192
+SYSZ_INS_LOCRLH = 193
+SYSZ_INS_STOCLH = 194
+SYSZ_INS_STOCGLH = 195
+SYSZ_INS_JL = 196
+SYSZ_INS_JGL = 197
+SYSZ_INS_LOCL = 198
+SYSZ_INS_LOCGL = 199
+SYSZ_INS_LOCGRL = 200
+SYSZ_INS_LOCRL = 201
+SYSZ_INS_LOC = 202
+SYSZ_INS_LOCG = 203
+SYSZ_INS_LOCGR = 204
+SYSZ_INS_LOCR = 205
+SYSZ_INS_STOCL = 206
+SYSZ_INS_STOCGL = 207
+SYSZ_INS_BNER = 208
+SYSZ_INS_JNE = 209
+SYSZ_INS_JGNE = 210
+SYSZ_INS_LOCNE = 211
+SYSZ_INS_LOCGNE = 212
+SYSZ_INS_LOCGRNE = 213
+SYSZ_INS_LOCRNE = 214
+SYSZ_INS_STOCNE = 215
+SYSZ_INS_STOCGNE = 216
+SYSZ_INS_BNHR = 217
+SYSZ_INS_BNHER = 218
+SYSZ_INS_JNHE = 219
+SYSZ_INS_JGNHE = 220
+SYSZ_INS_LOCNHE = 221
+SYSZ_INS_LOCGNHE = 222
+SYSZ_INS_LOCGRNHE = 223
+SYSZ_INS_LOCRNHE = 224
+SYSZ_INS_STOCNHE = 225
+SYSZ_INS_STOCGNHE = 226
+SYSZ_INS_JNH = 227
+SYSZ_INS_JGNH = 228
+SYSZ_INS_LOCNH = 229
+SYSZ_INS_LOCGNH = 230
+SYSZ_INS_LOCGRNH = 231
+SYSZ_INS_LOCRNH = 232
+SYSZ_INS_STOCNH = 233
+SYSZ_INS_STOCGNH = 234
+SYSZ_INS_BNLR = 235
+SYSZ_INS_BNLER = 236
+SYSZ_INS_JNLE = 237
+SYSZ_INS_JGNLE = 238
+SYSZ_INS_LOCNLE = 239
+SYSZ_INS_LOCGNLE = 240
+SYSZ_INS_LOCGRNLE = 241
+SYSZ_INS_LOCRNLE = 242
+SYSZ_INS_STOCNLE = 243
+SYSZ_INS_STOCGNLE = 244
+SYSZ_INS_BNLHR = 245
+SYSZ_INS_JNLH = 246
+SYSZ_INS_JGNLH = 247
+SYSZ_INS_LOCNLH = 248
+SYSZ_INS_LOCGNLH = 249
+SYSZ_INS_LOCGRNLH = 250
+SYSZ_INS_LOCRNLH = 251
+SYSZ_INS_STOCNLH = 252
+SYSZ_INS_STOCGNLH = 253
+SYSZ_INS_JNL = 254
+SYSZ_INS_JGNL = 255
+SYSZ_INS_LOCNL = 256
+SYSZ_INS_LOCGNL = 257
+SYSZ_INS_LOCGRNL = 258
+SYSZ_INS_LOCRNL = 259
+SYSZ_INS_STOCNL = 260
+SYSZ_INS_STOCGNL = 261
+SYSZ_INS_BNOR = 262
+SYSZ_INS_JNO = 263
+SYSZ_INS_JGNO = 264
+SYSZ_INS_LOCNO = 265
+SYSZ_INS_LOCGNO = 266
+SYSZ_INS_LOCGRNO = 267
+SYSZ_INS_LOCRNO = 268
+SYSZ_INS_STOCNO = 269
+SYSZ_INS_STOCGNO = 270
+SYSZ_INS_BOR = 271
+SYSZ_INS_JO = 272
+SYSZ_INS_JGO = 273
+SYSZ_INS_LOCO = 274
+SYSZ_INS_LOCGO = 275
+SYSZ_INS_LOCGRO = 276
+SYSZ_INS_LOCRO = 277
+SYSZ_INS_STOCO = 278
+SYSZ_INS_STOCGO = 279
+SYSZ_INS_STOC = 280
+SYSZ_INS_STOCG = 281
+SYSZ_INS_BASR = 282
+SYSZ_INS_BR = 283
+SYSZ_INS_BRAS = 284
+SYSZ_INS_BRASL = 285
+SYSZ_INS_J = 286
+SYSZ_INS_JG = 287
+SYSZ_INS_BRCT = 288
+SYSZ_INS_BRCTG = 289
+SYSZ_INS_C = 290
+SYSZ_INS_CDB = 291
+SYSZ_INS_CDBR = 292
+SYSZ_INS_CDFBR = 293
+SYSZ_INS_CDGBR = 294
+SYSZ_INS_CDLFBR = 295
+SYSZ_INS_CDLGBR = 296
+SYSZ_INS_CEB = 297
+SYSZ_INS_CEBR = 298
+SYSZ_INS_CEFBR = 299
+SYSZ_INS_CEGBR = 300
+SYSZ_INS_CELFBR = 301
+SYSZ_INS_CELGBR = 302
+SYSZ_INS_CFDBR = 303
+SYSZ_INS_CFEBR = 304
+SYSZ_INS_CFI = 305
+SYSZ_INS_CFXBR = 306
+SYSZ_INS_CG = 307
+SYSZ_INS_CGDBR = 308
+SYSZ_INS_CGEBR = 309
+SYSZ_INS_CGF = 310
+SYSZ_INS_CGFI = 311
+SYSZ_INS_CGFR = 312
+SYSZ_INS_CGFRL = 313
+SYSZ_INS_CGH = 314
+SYSZ_INS_CGHI = 315
+SYSZ_INS_CGHRL = 316
+SYSZ_INS_CGHSI = 317
+SYSZ_INS_CGR = 318
+SYSZ_INS_CGRL = 319
+SYSZ_INS_CGXBR = 320
+SYSZ_INS_CH = 321
+SYSZ_INS_CHF = 322
+SYSZ_INS_CHHSI = 323
+SYSZ_INS_CHI = 324
+SYSZ_INS_CHRL = 325
+SYSZ_INS_CHSI = 326
+SYSZ_INS_CHY = 327
+SYSZ_INS_CIH = 328
+SYSZ_INS_CL = 329
+SYSZ_INS_CLC = 330
+SYSZ_INS_CLFDBR = 331
+SYSZ_INS_CLFEBR = 332
+SYSZ_INS_CLFHSI = 333
+SYSZ_INS_CLFI = 334
+SYSZ_INS_CLFXBR = 335
+SYSZ_INS_CLG = 336
+SYSZ_INS_CLGDBR = 337
+SYSZ_INS_CLGEBR = 338
+SYSZ_INS_CLGF = 339
+SYSZ_INS_CLGFI = 340
+SYSZ_INS_CLGFR = 341
+SYSZ_INS_CLGFRL = 342
+SYSZ_INS_CLGHRL = 343
+SYSZ_INS_CLGHSI = 344
+SYSZ_INS_CLGR = 345
+SYSZ_INS_CLGRL = 346
+SYSZ_INS_CLGXBR = 347
+SYSZ_INS_CLHF = 348
+SYSZ_INS_CLHHSI = 349
+SYSZ_INS_CLHRL = 350
+SYSZ_INS_CLI = 351
+SYSZ_INS_CLIH = 352
+SYSZ_INS_CLIY = 353
+SYSZ_INS_CLR = 354
+SYSZ_INS_CLRL = 355
+SYSZ_INS_CLST = 356
+SYSZ_INS_CLY = 357
+SYSZ_INS_CPSDR = 358
+SYSZ_INS_CR = 359
+SYSZ_INS_CRL = 360
+SYSZ_INS_CS = 361
+SYSZ_INS_CSG = 362
+SYSZ_INS_CSY = 363
+SYSZ_INS_CXBR = 364
+SYSZ_INS_CXFBR = 365
+SYSZ_INS_CXGBR = 366
+SYSZ_INS_CXLFBR = 367
+SYSZ_INS_CXLGBR = 368
+SYSZ_INS_CY = 369
+SYSZ_INS_DDB = 370
+SYSZ_INS_DDBR = 371
+SYSZ_INS_DEB = 372
+SYSZ_INS_DEBR = 373
+SYSZ_INS_DL = 374
+SYSZ_INS_DLG = 375
+SYSZ_INS_DLGR = 376
+SYSZ_INS_DLR = 377
+SYSZ_INS_DSG = 378
+SYSZ_INS_DSGF = 379
+SYSZ_INS_DSGFR = 380
+SYSZ_INS_DSGR = 381
+SYSZ_INS_DXBR = 382
+SYSZ_INS_EAR = 383
+SYSZ_INS_FIDBR = 384
+SYSZ_INS_FIDBRA = 385
+SYSZ_INS_FIEBR = 386
+SYSZ_INS_FIEBRA = 387
+SYSZ_INS_FIXBR = 388
+SYSZ_INS_FIXBRA = 389
+SYSZ_INS_FLOGR = 390
+SYSZ_INS_IC = 391
+SYSZ_INS_ICY = 392
+SYSZ_INS_IIHF = 393
+SYSZ_INS_IIHH = 394
+SYSZ_INS_IIHL = 395
+SYSZ_INS_IILF = 396
+SYSZ_INS_IILH = 397
+SYSZ_INS_IILL = 398
+SYSZ_INS_IPM = 399
+SYSZ_INS_L = 400
+SYSZ_INS_LA = 401
+SYSZ_INS_LAA = 402
+SYSZ_INS_LAAG = 403
+SYSZ_INS_LAAL = 404
+SYSZ_INS_LAALG = 405
+SYSZ_INS_LAN = 406
+SYSZ_INS_LANG = 407
+SYSZ_INS_LAO = 408
+SYSZ_INS_LAOG = 409
+SYSZ_INS_LARL = 410
+SYSZ_INS_LAX = 411
+SYSZ_INS_LAXG = 412
+SYSZ_INS_LAY = 413
+SYSZ_INS_LB = 414
+SYSZ_INS_LBH = 415
+SYSZ_INS_LBR = 416
+SYSZ_INS_LCDBR = 417
+SYSZ_INS_LCEBR = 418
+SYSZ_INS_LCGFR = 419
+SYSZ_INS_LCGR = 420
+SYSZ_INS_LCR = 421
+SYSZ_INS_LCXBR = 422
+SYSZ_INS_LD = 423
+SYSZ_INS_LDEB = 424
+SYSZ_INS_LDEBR = 425
+SYSZ_INS_LDGR = 426
+SYSZ_INS_LDR = 427
+SYSZ_INS_LDXBR = 428
+SYSZ_INS_LDXBRA = 429
+SYSZ_INS_LDY = 430
+SYSZ_INS_LE = 431
+SYSZ_INS_LEDBR = 432
+SYSZ_INS_LEDBRA = 433
+SYSZ_INS_LER = 434
+SYSZ_INS_LEXBR = 435
+SYSZ_INS_LEXBRA = 436
+SYSZ_INS_LEY = 437
+SYSZ_INS_LFH = 438
+SYSZ_INS_LG = 439
+SYSZ_INS_LGB = 440
+SYSZ_INS_LGBR = 441
+SYSZ_INS_LGDR = 442
+SYSZ_INS_LGF = 443
+SYSZ_INS_LGFI = 444
+SYSZ_INS_LGFR = 445
+SYSZ_INS_LGFRL = 446
+SYSZ_INS_LGH = 447
+SYSZ_INS_LGHI = 448
+SYSZ_INS_LGHR = 449
+SYSZ_INS_LGHRL = 450
+SYSZ_INS_LGR = 451
+SYSZ_INS_LGRL = 452
+SYSZ_INS_LH = 453
+SYSZ_INS_LHH = 454
+SYSZ_INS_LHI = 455
+SYSZ_INS_LHR = 456
+SYSZ_INS_LHRL = 457
+SYSZ_INS_LHY = 458
+SYSZ_INS_LLC = 459
+SYSZ_INS_LLCH = 460
+SYSZ_INS_LLCR = 461
+SYSZ_INS_LLGC = 462
+SYSZ_INS_LLGCR = 463
+SYSZ_INS_LLGF = 464
+SYSZ_INS_LLGFR = 465
+SYSZ_INS_LLGFRL = 466
+SYSZ_INS_LLGH = 467
+SYSZ_INS_LLGHR = 468
+SYSZ_INS_LLGHRL = 469
+SYSZ_INS_LLH = 470
+SYSZ_INS_LLHH = 471
+SYSZ_INS_LLHR = 472
+SYSZ_INS_LLHRL = 473
+SYSZ_INS_LLIHF = 474
+SYSZ_INS_LLIHH = 475
+SYSZ_INS_LLIHL = 476
+SYSZ_INS_LLILF = 477
+SYSZ_INS_LLILH = 478
+SYSZ_INS_LLILL = 479
+SYSZ_INS_LMG = 480
+SYSZ_INS_LNDBR = 481
+SYSZ_INS_LNEBR = 482
+SYSZ_INS_LNGFR = 483
+SYSZ_INS_LNGR = 484
+SYSZ_INS_LNR = 485
+SYSZ_INS_LNXBR = 486
+SYSZ_INS_LPDBR = 487
+SYSZ_INS_LPEBR = 488
+SYSZ_INS_LPGFR = 489
+SYSZ_INS_LPGR = 490
+SYSZ_INS_LPR = 491
+SYSZ_INS_LPXBR = 492
+SYSZ_INS_LR = 493
+SYSZ_INS_LRL = 494
+SYSZ_INS_LRV = 495
+SYSZ_INS_LRVG = 496
+SYSZ_INS_LRVGR = 497
+SYSZ_INS_LRVR = 498
+SYSZ_INS_LT = 499
+SYSZ_INS_LTDBR = 500
+SYSZ_INS_LTEBR = 501
+SYSZ_INS_LTG = 502
+SYSZ_INS_LTGF = 503
+SYSZ_INS_LTGFR = 504
+SYSZ_INS_LTGR = 505
+SYSZ_INS_LTR = 506
+SYSZ_INS_LTXBR = 507
+SYSZ_INS_LXDB = 508
+SYSZ_INS_LXDBR = 509
+SYSZ_INS_LXEB = 510
+SYSZ_INS_LXEBR = 511
+SYSZ_INS_LXR = 512
+SYSZ_INS_LY = 513
+SYSZ_INS_LZDR = 514
+SYSZ_INS_LZER = 515
+SYSZ_INS_LZXR = 516
+SYSZ_INS_MADB = 517
+SYSZ_INS_MADBR = 518
+SYSZ_INS_MAEB = 519
+SYSZ_INS_MAEBR = 520
+SYSZ_INS_MDB = 521
+SYSZ_INS_MDBR = 522
+SYSZ_INS_MDEB = 523
+SYSZ_INS_MDEBR = 524
+SYSZ_INS_MEEB = 525
+SYSZ_INS_MEEBR = 526
+SYSZ_INS_MGHI = 527
+SYSZ_INS_MH = 528
+SYSZ_INS_MHI = 529
+SYSZ_INS_MHY = 530
+SYSZ_INS_MLG = 531
+SYSZ_INS_MLGR = 532
+SYSZ_INS_MS = 533
+SYSZ_INS_MSDB = 534
+SYSZ_INS_MSDBR = 535
+SYSZ_INS_MSEB = 536
+SYSZ_INS_MSEBR = 537
+SYSZ_INS_MSFI = 538
+SYSZ_INS_MSG = 539
+SYSZ_INS_MSGF = 540
+SYSZ_INS_MSGFI = 541
+SYSZ_INS_MSGFR = 542
+SYSZ_INS_MSGR = 543
+SYSZ_INS_MSR = 544
+SYSZ_INS_MSY = 545
+SYSZ_INS_MVC = 546
+SYSZ_INS_MVGHI = 547
+SYSZ_INS_MVHHI = 548
+SYSZ_INS_MVHI = 549
+SYSZ_INS_MVI = 550
+SYSZ_INS_MVIY = 551
+SYSZ_INS_MVST = 552
+SYSZ_INS_MXBR = 553
+SYSZ_INS_MXDB = 554
+SYSZ_INS_MXDBR = 555
+SYSZ_INS_N = 556
+SYSZ_INS_NC = 557
+SYSZ_INS_NG = 558
+SYSZ_INS_NGR = 559
+SYSZ_INS_NGRK = 560
+SYSZ_INS_NI = 561
+SYSZ_INS_NIHF = 562
+SYSZ_INS_NIHH = 563
+SYSZ_INS_NIHL = 564
+SYSZ_INS_NILF = 565
+SYSZ_INS_NILH = 566
+SYSZ_INS_NILL = 567
+SYSZ_INS_NIY = 568
+SYSZ_INS_NR = 569
+SYSZ_INS_NRK = 570
+SYSZ_INS_NY = 571
+SYSZ_INS_O = 572
+SYSZ_INS_OC = 573
+SYSZ_INS_OG = 574
+SYSZ_INS_OGR = 575
+SYSZ_INS_OGRK = 576
+SYSZ_INS_OI = 577
+SYSZ_INS_OIHF = 578
+SYSZ_INS_OIHH = 579
+SYSZ_INS_OIHL = 580
+SYSZ_INS_OILF = 581
+SYSZ_INS_OILH = 582
+SYSZ_INS_OILL = 583
+SYSZ_INS_OIY = 584
+SYSZ_INS_OR = 585
+SYSZ_INS_ORK = 586
+SYSZ_INS_OY = 587
+SYSZ_INS_PFD = 588
+SYSZ_INS_PFDRL = 589
+SYSZ_INS_RISBG = 590
+SYSZ_INS_RISBHG = 591
+SYSZ_INS_RISBLG = 592
+SYSZ_INS_RLL = 593
+SYSZ_INS_RLLG = 594
+SYSZ_INS_RNSBG = 595
+SYSZ_INS_ROSBG = 596
+SYSZ_INS_RXSBG = 597
+SYSZ_INS_S = 598
+SYSZ_INS_SDB = 599
+SYSZ_INS_SDBR = 600
+SYSZ_INS_SEB = 601
+SYSZ_INS_SEBR = 602
+SYSZ_INS_SG = 603
+SYSZ_INS_SGF = 604
+SYSZ_INS_SGFR = 605
+SYSZ_INS_SGR = 606
+SYSZ_INS_SGRK = 607
+SYSZ_INS_SH = 608
+SYSZ_INS_SHY = 609
+SYSZ_INS_SL = 610
+SYSZ_INS_SLB = 611
+SYSZ_INS_SLBG = 612
+SYSZ_INS_SLBR = 613
+SYSZ_INS_SLFI = 614
+SYSZ_INS_SLG = 615
+SYSZ_INS_SLBGR = 616
+SYSZ_INS_SLGF = 617
+SYSZ_INS_SLGFI = 618
+SYSZ_INS_SLGFR = 619
+SYSZ_INS_SLGR = 620
+SYSZ_INS_SLGRK = 621
+SYSZ_INS_SLL = 622
+SYSZ_INS_SLLG = 623
+SYSZ_INS_SLLK = 624
+SYSZ_INS_SLR = 625
+SYSZ_INS_SLRK = 626
+SYSZ_INS_SLY = 627
+SYSZ_INS_SQDB = 628
+SYSZ_INS_SQDBR = 629
+SYSZ_INS_SQEB = 630
+SYSZ_INS_SQEBR = 631
+SYSZ_INS_SQXBR = 632
+SYSZ_INS_SR = 633
+SYSZ_INS_SRA = 634
+SYSZ_INS_SRAG = 635
+SYSZ_INS_SRAK = 636
+SYSZ_INS_SRK = 637
+SYSZ_INS_SRL = 638
+SYSZ_INS_SRLG = 639
+SYSZ_INS_SRLK = 640
+SYSZ_INS_SRST = 641
+SYSZ_INS_ST = 642
+SYSZ_INS_STC = 643
+SYSZ_INS_STCH = 644
+SYSZ_INS_STCY = 645
+SYSZ_INS_STD = 646
+SYSZ_INS_STDY = 647
+SYSZ_INS_STE = 648
+SYSZ_INS_STEY = 649
+SYSZ_INS_STFH = 650
+SYSZ_INS_STG = 651
+SYSZ_INS_STGRL = 652
+SYSZ_INS_STH = 653
+SYSZ_INS_STHH = 654
+SYSZ_INS_STHRL = 655
+SYSZ_INS_STHY = 656
+SYSZ_INS_STMG = 657
+SYSZ_INS_STRL = 658
+SYSZ_INS_STRV = 659
+SYSZ_INS_STRVG = 660
+SYSZ_INS_STY = 661
+SYSZ_INS_SXBR = 662
+SYSZ_INS_SY = 663
+SYSZ_INS_TM = 664
+SYSZ_INS_TMHH = 665
+SYSZ_INS_TMHL = 666
+SYSZ_INS_TMLH = 667
+SYSZ_INS_TMLL = 668
+SYSZ_INS_TMY = 669
+SYSZ_INS_X = 670
+SYSZ_INS_XC = 671
+SYSZ_INS_XG = 672
+SYSZ_INS_XGR = 673
+SYSZ_INS_XGRK = 674
+SYSZ_INS_XI = 675
+SYSZ_INS_XIHF = 676
+SYSZ_INS_XILF = 677
+SYSZ_INS_XIY = 678
+SYSZ_INS_XR = 679
+SYSZ_INS_XRK = 680
+SYSZ_INS_XY = 681
+SYSZ_INS_AD = 682
+SYSZ_INS_ADR = 683
+SYSZ_INS_ADTR = 684
+SYSZ_INS_ADTRA = 685
+SYSZ_INS_AE = 686
+SYSZ_INS_AER = 687
+SYSZ_INS_AGH = 688
+SYSZ_INS_AHHHR = 689
+SYSZ_INS_AHHLR = 690
+SYSZ_INS_ALGSI = 691
+SYSZ_INS_ALHHHR = 692
+SYSZ_INS_ALHHLR = 693
+SYSZ_INS_ALSI = 694
+SYSZ_INS_ALSIH = 695
+SYSZ_INS_ALSIHN = 696
+SYSZ_INS_AP = 697
+SYSZ_INS_AU = 698
+SYSZ_INS_AUR = 699
+SYSZ_INS_AW = 700
+SYSZ_INS_AWR = 701
+SYSZ_INS_AXR = 702
+SYSZ_INS_AXTR = 703
+SYSZ_INS_AXTRA = 704
+SYSZ_INS_B = 705
+SYSZ_INS_BAKR = 706
+SYSZ_INS_BAL = 707
+SYSZ_INS_BALR = 708
+SYSZ_INS_BAS = 709
+SYSZ_INS_BASSM = 710
+SYSZ_INS_BC = 711
+SYSZ_INS_BCT = 712
+SYSZ_INS_BCTG = 713
+SYSZ_INS_BCTGR = 714
+SYSZ_INS_BCTR = 715
+SYSZ_INS_BE = 716
+SYSZ_INS_BH = 717
+SYSZ_INS_BHE = 718
+SYSZ_INS_BI = 719
+SYSZ_INS_BIC = 720
+SYSZ_INS_BIE = 721
+SYSZ_INS_BIH = 722
+SYSZ_INS_BIHE = 723
+SYSZ_INS_BIL = 724
+SYSZ_INS_BILE = 725
+SYSZ_INS_BILH = 726
+SYSZ_INS_BIM = 727
+SYSZ_INS_BINE = 728
+SYSZ_INS_BINH = 729
+SYSZ_INS_BINHE = 730
+SYSZ_INS_BINL = 731
+SYSZ_INS_BINLE = 732
+SYSZ_INS_BINLH = 733
+SYSZ_INS_BINM = 734
+SYSZ_INS_BINO = 735
+SYSZ_INS_BINP = 736
+SYSZ_INS_BINZ = 737
+SYSZ_INS_BIO = 738
+SYSZ_INS_BIP = 739
+SYSZ_INS_BIZ = 740
+SYSZ_INS_BL = 741
+SYSZ_INS_BLE = 742
+SYSZ_INS_BLH = 743
+SYSZ_INS_BM = 744
+SYSZ_INS_BMR = 745
+SYSZ_INS_BNE = 746
+SYSZ_INS_BNH = 747
+SYSZ_INS_BNHE = 748
+SYSZ_INS_BNL = 749
+SYSZ_INS_BNLE = 750
+SYSZ_INS_BNLH = 751
+SYSZ_INS_BNM = 752
+SYSZ_INS_BNMR = 753
+SYSZ_INS_BNO = 754
+SYSZ_INS_BNP = 755
+SYSZ_INS_BNPR = 756
+SYSZ_INS_BNZ = 757
+SYSZ_INS_BNZR = 758
+SYSZ_INS_BO = 759
+SYSZ_INS_BP = 760
+SYSZ_INS_BPP = 761
+SYSZ_INS_BPR = 762
+SYSZ_INS_BPRP = 763
+SYSZ_INS_BRCTH = 764
+SYSZ_INS_BRXH = 765
+SYSZ_INS_BRXHG = 766
+SYSZ_INS_BRXLE = 767
+SYSZ_INS_BRXLG = 768
+SYSZ_INS_BSA = 769
+SYSZ_INS_BSG = 770
+SYSZ_INS_BSM = 771
+SYSZ_INS_BXH = 772
+SYSZ_INS_BXHG = 773
+SYSZ_INS_BXLE = 774
+SYSZ_INS_BXLEG = 775
+SYSZ_INS_BZ = 776
+SYSZ_INS_BZR = 777
+SYSZ_INS_CD = 778
+SYSZ_INS_CDFBRA = 779
+SYSZ_INS_CDFR = 780
+SYSZ_INS_CDFTR = 781
+SYSZ_INS_CDGBRA = 782
+SYSZ_INS_CDGR = 783
+SYSZ_INS_CDGTR = 784
+SYSZ_INS_CDGTRA = 785
+SYSZ_INS_CDLFTR = 786
+SYSZ_INS_CDLGTR = 787
+SYSZ_INS_CDPT = 788
+SYSZ_INS_CDR = 789
+SYSZ_INS_CDS = 790
+SYSZ_INS_CDSG = 791
+SYSZ_INS_CDSTR = 792
+SYSZ_INS_CDSY = 793
+SYSZ_INS_CDTR = 794
+SYSZ_INS_CDUTR = 795
+SYSZ_INS_CDZT = 796
+SYSZ_INS_CE = 797
+SYSZ_INS_CEDTR = 798
+SYSZ_INS_CEFBRA = 799
+SYSZ_INS_CEFR = 800
+SYSZ_INS_CEGBRA = 801
+SYSZ_INS_CEGR = 802
+SYSZ_INS_CER = 803
+SYSZ_INS_CEXTR = 804
+SYSZ_INS_CFC = 805
+SYSZ_INS_CFDBRA = 806
+SYSZ_INS_CFDR = 807
+SYSZ_INS_CFDTR = 808
+SYSZ_INS_CFEBRA = 809
+SYSZ_INS_CFER = 810
+SYSZ_INS_CFXBRA = 811
+SYSZ_INS_CFXR = 812
+SYSZ_INS_CFXTR = 813
+SYSZ_INS_CGDBRA = 814
+SYSZ_INS_CGDR = 815
+SYSZ_INS_CGDTR = 816
+SYSZ_INS_CGDTRA = 817
+SYSZ_INS_CGEBRA = 818
+SYSZ_INS_CGER = 819
+SYSZ_INS_CGIB = 820
+SYSZ_INS_CGIBE = 821
+SYSZ_INS_CGIBH = 822
+SYSZ_INS_CGIBHE = 823
+SYSZ_INS_CGIBL = 824
+SYSZ_INS_CGIBLE = 825
+SYSZ_INS_CGIBLH = 826
+SYSZ_INS_CGIBNE = 827
+SYSZ_INS_CGIBNH = 828
+SYSZ_INS_CGIBNHE = 829
+SYSZ_INS_CGIBNL = 830
+SYSZ_INS_CGIBNLE = 831
+SYSZ_INS_CGIBNLH = 832
+SYSZ_INS_CGIT = 833
+SYSZ_INS_CGITE = 834
+SYSZ_INS_CGITH = 835
+SYSZ_INS_CGITHE = 836
+SYSZ_INS_CGITL = 837
+SYSZ_INS_CGITLE = 838
+SYSZ_INS_CGITLH = 839
+SYSZ_INS_CGITNE = 840
+SYSZ_INS_CGITNH = 841
+SYSZ_INS_CGITNHE = 842
+SYSZ_INS_CGITNL = 843
+SYSZ_INS_CGITNLE = 844
+SYSZ_INS_CGITNLH = 845
+SYSZ_INS_CGRB = 846
+SYSZ_INS_CGRBE = 847
+SYSZ_INS_CGRBH = 848
+SYSZ_INS_CGRBHE = 849
+SYSZ_INS_CGRBL = 850
+SYSZ_INS_CGRBLE = 851
+SYSZ_INS_CGRBLH = 852
+SYSZ_INS_CGRBNE = 853
+SYSZ_INS_CGRBNH = 854
+SYSZ_INS_CGRBNHE = 855
+SYSZ_INS_CGRBNL = 856
+SYSZ_INS_CGRBNLE = 857
+SYSZ_INS_CGRBNLH = 858
+SYSZ_INS_CGRT = 859
+SYSZ_INS_CGRTE = 860
+SYSZ_INS_CGRTH = 861
+SYSZ_INS_CGRTHE = 862
+SYSZ_INS_CGRTL = 863
+SYSZ_INS_CGRTLE = 864
+SYSZ_INS_CGRTLH = 865
+SYSZ_INS_CGRTNE = 866
+SYSZ_INS_CGRTNH = 867
+SYSZ_INS_CGRTNHE = 868
+SYSZ_INS_CGRTNL = 869
+SYSZ_INS_CGRTNLE = 870
+SYSZ_INS_CGRTNLH = 871
+SYSZ_INS_CGXBRA = 872
+SYSZ_INS_CGXR = 873
+SYSZ_INS_CGXTR = 874
+SYSZ_INS_CGXTRA = 875
+SYSZ_INS_CHHR = 876
+SYSZ_INS_CHLR = 877
+SYSZ_INS_CIB = 878
+SYSZ_INS_CIBE = 879
+SYSZ_INS_CIBH = 880
+SYSZ_INS_CIBHE = 881
+SYSZ_INS_CIBL = 882
+SYSZ_INS_CIBLE = 883
+SYSZ_INS_CIBLH = 884
+SYSZ_INS_CIBNE = 885
+SYSZ_INS_CIBNH = 886
+SYSZ_INS_CIBNHE = 887
+SYSZ_INS_CIBNL = 888
+SYSZ_INS_CIBNLE = 889
+SYSZ_INS_CIBNLH = 890
+SYSZ_INS_CIT = 891
+SYSZ_INS_CITE = 892
+SYSZ_INS_CITH = 893
+SYSZ_INS_CITHE = 894
+SYSZ_INS_CITL = 895
+SYSZ_INS_CITLE = 896
+SYSZ_INS_CITLH = 897
+SYSZ_INS_CITNE = 898
+SYSZ_INS_CITNH = 899
+SYSZ_INS_CITNHE = 900
+SYSZ_INS_CITNL = 901
+SYSZ_INS_CITNLE = 902
+SYSZ_INS_CITNLH = 903
+SYSZ_INS_CKSM = 904
+SYSZ_INS_CLCL = 905
+SYSZ_INS_CLCLE = 906
+SYSZ_INS_CLCLU = 907
+SYSZ_INS_CLFDTR = 908
+SYSZ_INS_CLFIT = 909
+SYSZ_INS_CLFITE = 910
+SYSZ_INS_CLFITH = 911
+SYSZ_INS_CLFITHE = 912
+SYSZ_INS_CLFITL = 913
+SYSZ_INS_CLFITLE = 914
+SYSZ_INS_CLFITLH = 915
+SYSZ_INS_CLFITNE = 916
+SYSZ_INS_CLFITNH = 917
+SYSZ_INS_CLFITNHE = 918
+SYSZ_INS_CLFITNL = 919
+SYSZ_INS_CLFITNLE = 920
+SYSZ_INS_CLFITNLH = 921
+SYSZ_INS_CLFXTR = 922
+SYSZ_INS_CLGDTR = 923
+SYSZ_INS_CLGIB = 924
+SYSZ_INS_CLGIBE = 925
+SYSZ_INS_CLGIBH = 926
+SYSZ_INS_CLGIBHE = 927
+SYSZ_INS_CLGIBL = 928
+SYSZ_INS_CLGIBLE = 929
+SYSZ_INS_CLGIBLH = 930
+SYSZ_INS_CLGIBNE = 931
+SYSZ_INS_CLGIBNH = 932
+SYSZ_INS_CLGIBNHE = 933
+SYSZ_INS_CLGIBNL = 934
+SYSZ_INS_CLGIBNLE = 935
+SYSZ_INS_CLGIBNLH = 936
+SYSZ_INS_CLGIT = 937
+SYSZ_INS_CLGITE = 938
+SYSZ_INS_CLGITH = 939
+SYSZ_INS_CLGITHE = 940
+SYSZ_INS_CLGITL = 941
+SYSZ_INS_CLGITLE = 942
+SYSZ_INS_CLGITLH = 943
+SYSZ_INS_CLGITNE = 944
+SYSZ_INS_CLGITNH = 945
+SYSZ_INS_CLGITNHE = 946
+SYSZ_INS_CLGITNL = 947
+SYSZ_INS_CLGITNLE = 948
+SYSZ_INS_CLGITNLH = 949
+SYSZ_INS_CLGRB = 950
+SYSZ_INS_CLGRBE = 951
+SYSZ_INS_CLGRBH = 952
+SYSZ_INS_CLGRBHE = 953
+SYSZ_INS_CLGRBL = 954
+SYSZ_INS_CLGRBLE = 955
+SYSZ_INS_CLGRBLH = 956
+SYSZ_INS_CLGRBNE = 957
+SYSZ_INS_CLGRBNH = 958
+SYSZ_INS_CLGRBNHE = 959
+SYSZ_INS_CLGRBNL = 960
+SYSZ_INS_CLGRBNLE = 961
+SYSZ_INS_CLGRBNLH = 962
+SYSZ_INS_CLGRT = 963
+SYSZ_INS_CLGRTE = 964
+SYSZ_INS_CLGRTH = 965
+SYSZ_INS_CLGRTHE = 966
+SYSZ_INS_CLGRTL = 967
+SYSZ_INS_CLGRTLE = 968
+SYSZ_INS_CLGRTLH = 969
+SYSZ_INS_CLGRTNE = 970
+SYSZ_INS_CLGRTNH = 971
+SYSZ_INS_CLGRTNHE = 972
+SYSZ_INS_CLGRTNL = 973
+SYSZ_INS_CLGRTNLE = 974
+SYSZ_INS_CLGRTNLH = 975
+SYSZ_INS_CLGT = 976
+SYSZ_INS_CLGTE = 977
+SYSZ_INS_CLGTH = 978
+SYSZ_INS_CLGTHE = 979
+SYSZ_INS_CLGTL = 980
+SYSZ_INS_CLGTLE = 981
+SYSZ_INS_CLGTLH = 982
+SYSZ_INS_CLGTNE = 983
+SYSZ_INS_CLGTNH = 984
+SYSZ_INS_CLGTNHE = 985
+SYSZ_INS_CLGTNL = 986
+SYSZ_INS_CLGTNLE = 987
+SYSZ_INS_CLGTNLH = 988
+SYSZ_INS_CLGXTR = 989
+SYSZ_INS_CLHHR = 990
+SYSZ_INS_CLHLR = 991
+SYSZ_INS_CLIB = 992
+SYSZ_INS_CLIBE = 993
+SYSZ_INS_CLIBH = 994
+SYSZ_INS_CLIBHE = 995
+SYSZ_INS_CLIBL = 996
+SYSZ_INS_CLIBLE = 997
+SYSZ_INS_CLIBLH = 998
+SYSZ_INS_CLIBNE = 999
+SYSZ_INS_CLIBNH = 1000
+SYSZ_INS_CLIBNHE = 1001
+SYSZ_INS_CLIBNL = 1002
+SYSZ_INS_CLIBNLE = 1003
+SYSZ_INS_CLIBNLH = 1004
+SYSZ_INS_CLM = 1005
+SYSZ_INS_CLMH = 1006
+SYSZ_INS_CLMY = 1007
+SYSZ_INS_CLRB = 1008
+SYSZ_INS_CLRBE = 1009
+SYSZ_INS_CLRBH = 1010
+SYSZ_INS_CLRBHE = 1011
+SYSZ_INS_CLRBL = 1012
+SYSZ_INS_CLRBLE = 1013
+SYSZ_INS_CLRBLH = 1014
+SYSZ_INS_CLRBNE = 1015
+SYSZ_INS_CLRBNH = 1016
+SYSZ_INS_CLRBNHE = 1017
+SYSZ_INS_CLRBNL = 1018
+SYSZ_INS_CLRBNLE = 1019
+SYSZ_INS_CLRBNLH = 1020
+SYSZ_INS_CLRT = 1021
+SYSZ_INS_CLRTE = 1022
+SYSZ_INS_CLRTH = 1023
+SYSZ_INS_CLRTHE = 1024
+SYSZ_INS_CLRTL = 1025
+SYSZ_INS_CLRTLE = 1026
+SYSZ_INS_CLRTLH = 1027
+SYSZ_INS_CLRTNE = 1028
+SYSZ_INS_CLRTNH = 1029
+SYSZ_INS_CLRTNHE = 1030
+SYSZ_INS_CLRTNL = 1031
+SYSZ_INS_CLRTNLE = 1032
+SYSZ_INS_CLRTNLH = 1033
+SYSZ_INS_CLT = 1034
+SYSZ_INS_CLTE = 1035
+SYSZ_INS_CLTH = 1036
+SYSZ_INS_CLTHE = 1037
+SYSZ_INS_CLTL = 1038
+SYSZ_INS_CLTLE = 1039
+SYSZ_INS_CLTLH = 1040
+SYSZ_INS_CLTNE = 1041
+SYSZ_INS_CLTNH = 1042
+SYSZ_INS_CLTNHE = 1043
+SYSZ_INS_CLTNL = 1044
+SYSZ_INS_CLTNLE = 1045
+SYSZ_INS_CLTNLH = 1046
+SYSZ_INS_CMPSC = 1047
+SYSZ_INS_CP = 1048
+SYSZ_INS_CPDT = 1049
+SYSZ_INS_CPXT = 1050
+SYSZ_INS_CPYA = 1051
+SYSZ_INS_CRB = 1052
+SYSZ_INS_CRBE = 1053
+SYSZ_INS_CRBH = 1054
+SYSZ_INS_CRBHE = 1055
+SYSZ_INS_CRBL = 1056
+SYSZ_INS_CRBLE = 1057
+SYSZ_INS_CRBLH = 1058
+SYSZ_INS_CRBNE = 1059
+SYSZ_INS_CRBNH = 1060
+SYSZ_INS_CRBNHE = 1061
+SYSZ_INS_CRBNL = 1062
+SYSZ_INS_CRBNLE = 1063
+SYSZ_INS_CRBNLH = 1064
+SYSZ_INS_CRDTE = 1065
+SYSZ_INS_CRT = 1066
+SYSZ_INS_CRTE = 1067
+SYSZ_INS_CRTH = 1068
+SYSZ_INS_CRTHE = 1069
+SYSZ_INS_CRTL = 1070
+SYSZ_INS_CRTLE = 1071
+SYSZ_INS_CRTLH = 1072
+SYSZ_INS_CRTNE = 1073
+SYSZ_INS_CRTNH = 1074
+SYSZ_INS_CRTNHE = 1075
+SYSZ_INS_CRTNL = 1076
+SYSZ_INS_CRTNLE = 1077
+SYSZ_INS_CRTNLH = 1078
+SYSZ_INS_CSCH = 1079
+SYSZ_INS_CSDTR = 1080
+SYSZ_INS_CSP = 1081
+SYSZ_INS_CSPG = 1082
+SYSZ_INS_CSST = 1083
+SYSZ_INS_CSXTR = 1084
+SYSZ_INS_CU12 = 1085
+SYSZ_INS_CU14 = 1086
+SYSZ_INS_CU21 = 1087
+SYSZ_INS_CU24 = 1088
+SYSZ_INS_CU41 = 1089
+SYSZ_INS_CU42 = 1090
+SYSZ_INS_CUDTR = 1091
+SYSZ_INS_CUSE = 1092
+SYSZ_INS_CUTFU = 1093
+SYSZ_INS_CUUTF = 1094
+SYSZ_INS_CUXTR = 1095
+SYSZ_INS_CVB = 1096
+SYSZ_INS_CVBG = 1097
+SYSZ_INS_CVBY = 1098
+SYSZ_INS_CVD = 1099
+SYSZ_INS_CVDG = 1100
+SYSZ_INS_CVDY = 1101
+SYSZ_INS_CXFBRA = 1102
+SYSZ_INS_CXFR = 1103
+SYSZ_INS_CXFTR = 1104
+SYSZ_INS_CXGBRA = 1105
+SYSZ_INS_CXGR = 1106
+SYSZ_INS_CXGTR = 1107
+SYSZ_INS_CXGTRA = 1108
+SYSZ_INS_CXLFTR = 1109
+SYSZ_INS_CXLGTR = 1110
+SYSZ_INS_CXPT = 1111
+SYSZ_INS_CXR = 1112
+SYSZ_INS_CXSTR = 1113
+SYSZ_INS_CXTR = 1114
+SYSZ_INS_CXUTR = 1115
+SYSZ_INS_CXZT = 1116
+SYSZ_INS_CZDT = 1117
+SYSZ_INS_CZXT = 1118
+SYSZ_INS_D = 1119
+SYSZ_INS_DD = 1120
+SYSZ_INS_DDR = 1121
+SYSZ_INS_DDTR = 1122
+SYSZ_INS_DDTRA = 1123
+SYSZ_INS_DE = 1124
+SYSZ_INS_DER = 1125
+SYSZ_INS_DIAG = 1126
+SYSZ_INS_DIDBR = 1127
+SYSZ_INS_DIEBR = 1128
+SYSZ_INS_DP = 1129
+SYSZ_INS_DR = 1130
+SYSZ_INS_DXR = 1131
+SYSZ_INS_DXTR = 1132
+SYSZ_INS_DXTRA = 1133
+SYSZ_INS_ECAG = 1134
+SYSZ_INS_ECCTR = 1135
+SYSZ_INS_ECPGA = 1136
+SYSZ_INS_ECTG = 1137
+SYSZ_INS_ED = 1138
+SYSZ_INS_EDMK = 1139
+SYSZ_INS_EEDTR = 1140
+SYSZ_INS_EEXTR = 1141
+SYSZ_INS_EFPC = 1142
+SYSZ_INS_EPAIR = 1143
+SYSZ_INS_EPAR = 1144
+SYSZ_INS_EPCTR = 1145
+SYSZ_INS_EPSW = 1146
+SYSZ_INS_EREG = 1147
+SYSZ_INS_EREGG = 1148
+SYSZ_INS_ESAIR = 1149
+SYSZ_INS_ESAR = 1150
+SYSZ_INS_ESDTR = 1151
+SYSZ_INS_ESEA = 1152
+SYSZ_INS_ESTA = 1153
+SYSZ_INS_ESXTR = 1154
+SYSZ_INS_ETND = 1155
+SYSZ_INS_EX = 1156
+SYSZ_INS_EXRL = 1157
+SYSZ_INS_FIDR = 1158
+SYSZ_INS_FIDTR = 1159
+SYSZ_INS_FIER = 1160
+SYSZ_INS_FIXR = 1161
+SYSZ_INS_FIXTR = 1162
+SYSZ_INS_HDR = 1163
+SYSZ_INS_HER = 1164
+SYSZ_INS_HSCH = 1165
+SYSZ_INS_IAC = 1166
+SYSZ_INS_ICM = 1167
+SYSZ_INS_ICMH = 1168
+SYSZ_INS_ICMY = 1169
+SYSZ_INS_IDTE = 1170
+SYSZ_INS_IEDTR = 1171
+SYSZ_INS_IEXTR = 1172
+SYSZ_INS_IPK = 1173
+SYSZ_INS_IPTE = 1174
+SYSZ_INS_IRBM = 1175
+SYSZ_INS_ISKE = 1176
+SYSZ_INS_IVSK = 1177
+SYSZ_INS_JGM = 1178
+SYSZ_INS_JGNM = 1179
+SYSZ_INS_JGNP = 1180
+SYSZ_INS_JGNZ = 1181
+SYSZ_INS_JGP = 1182
+SYSZ_INS_JGZ = 1183
+SYSZ_INS_JM = 1184
+SYSZ_INS_JNM = 1185
+SYSZ_INS_JNP = 1186
+SYSZ_INS_JNZ = 1187
+SYSZ_INS_JP = 1188
+SYSZ_INS_JZ = 1189
+SYSZ_INS_KDB = 1190
+SYSZ_INS_KDBR = 1191
+SYSZ_INS_KDTR = 1192
+SYSZ_INS_KEB = 1193
+SYSZ_INS_KEBR = 1194
+SYSZ_INS_KIMD = 1195
+SYSZ_INS_KLMD = 1196
+SYSZ_INS_KM = 1197
+SYSZ_INS_KMA = 1198
+SYSZ_INS_KMAC = 1199
+SYSZ_INS_KMC = 1200
+SYSZ_INS_KMCTR = 1201
+SYSZ_INS_KMF = 1202
+SYSZ_INS_KMO = 1203
+SYSZ_INS_KXBR = 1204
+SYSZ_INS_KXTR = 1205
+SYSZ_INS_LAE = 1206
+SYSZ_INS_LAEY = 1207
+SYSZ_INS_LAM = 1208
+SYSZ_INS_LAMY = 1209
+SYSZ_INS_LASP = 1210
+SYSZ_INS_LAT = 1211
+SYSZ_INS_LCBB = 1212
+SYSZ_INS_LCCTL = 1213
+SYSZ_INS_LCDFR = 1214
+SYSZ_INS_LCDR = 1215
+SYSZ_INS_LCER = 1216
+SYSZ_INS_LCTL = 1217
+SYSZ_INS_LCTLG = 1218
+SYSZ_INS_LCXR = 1219
+SYSZ_INS_LDE = 1220
+SYSZ_INS_LDER = 1221
+SYSZ_INS_LDETR = 1222
+SYSZ_INS_LDXR = 1223
+SYSZ_INS_LDXTR = 1224
+SYSZ_INS_LEDR = 1225
+SYSZ_INS_LEDTR = 1226
+SYSZ_INS_LEXR = 1227
+SYSZ_INS_LFAS = 1228
+SYSZ_INS_LFHAT = 1229
+SYSZ_INS_LFPC = 1230
+SYSZ_INS_LGAT = 1231
+SYSZ_INS_LGG = 1232
+SYSZ_INS_LGSC = 1233
+SYSZ_INS_LLGFAT = 1234
+SYSZ_INS_LLGFSG = 1235
+SYSZ_INS_LLGT = 1236
+SYSZ_INS_LLGTAT = 1237
+SYSZ_INS_LLGTR = 1238
+SYSZ_INS_LLZRGF = 1239
+SYSZ_INS_LM = 1240
+SYSZ_INS_LMD = 1241
+SYSZ_INS_LMH = 1242
+SYSZ_INS_LMY = 1243
+SYSZ_INS_LNDFR = 1244
+SYSZ_INS_LNDR = 1245
+SYSZ_INS_LNER = 1246
+SYSZ_INS_LNXR = 1247
+SYSZ_INS_LOCFH = 1248
+SYSZ_INS_LOCFHE = 1249
+SYSZ_INS_LOCFHH = 1250
+SYSZ_INS_LOCFHHE = 1251
+SYSZ_INS_LOCFHL = 1252
+SYSZ_INS_LOCFHLE = 1253
+SYSZ_INS_LOCFHLH = 1254
+SYSZ_INS_LOCFHM = 1255
+SYSZ_INS_LOCFHNE = 1256
+SYSZ_INS_LOCFHNH = 1257
+SYSZ_INS_LOCFHNHE = 1258
+SYSZ_INS_LOCFHNL = 1259
+SYSZ_INS_LOCFHNLE = 1260
+SYSZ_INS_LOCFHNLH = 1261
+SYSZ_INS_LOCFHNM = 1262
+SYSZ_INS_LOCFHNO = 1263
+SYSZ_INS_LOCFHNP = 1264
+SYSZ_INS_LOCFHNZ = 1265
+SYSZ_INS_LOCFHO = 1266
+SYSZ_INS_LOCFHP = 1267
+SYSZ_INS_LOCFHR = 1268
+SYSZ_INS_LOCFHRE = 1269
+SYSZ_INS_LOCFHRH = 1270
+SYSZ_INS_LOCFHRHE = 1271
+SYSZ_INS_LOCFHRL = 1272
+SYSZ_INS_LOCFHRLE = 1273
+SYSZ_INS_LOCFHRLH = 1274
+SYSZ_INS_LOCFHRM = 1275
+SYSZ_INS_LOCFHRNE = 1276
+SYSZ_INS_LOCFHRNH = 1277
+SYSZ_INS_LOCFHRNHE = 1278
+SYSZ_INS_LOCFHRNL = 1279
+SYSZ_INS_LOCFHRNLE = 1280
+SYSZ_INS_LOCFHRNLH = 1281
+SYSZ_INS_LOCFHRNM = 1282
+SYSZ_INS_LOCFHRNO = 1283
+SYSZ_INS_LOCFHRNP = 1284
+SYSZ_INS_LOCFHRNZ = 1285
+SYSZ_INS_LOCFHRO = 1286
+SYSZ_INS_LOCFHRP = 1287
+SYSZ_INS_LOCFHRZ = 1288
+SYSZ_INS_LOCFHZ = 1289
+SYSZ_INS_LOCGHI = 1290
+SYSZ_INS_LOCGHIE = 1291
+SYSZ_INS_LOCGHIH = 1292
+SYSZ_INS_LOCGHIHE = 1293
+SYSZ_INS_LOCGHIL = 1294
+SYSZ_INS_LOCGHILE = 1295
+SYSZ_INS_LOCGHILH = 1296
+SYSZ_INS_LOCGHIM = 1297
+SYSZ_INS_LOCGHINE = 1298
+SYSZ_INS_LOCGHINH = 1299
+SYSZ_INS_LOCGHINHE = 1300
+SYSZ_INS_LOCGHINL = 1301
+SYSZ_INS_LOCGHINLE = 1302
+SYSZ_INS_LOCGHINLH = 1303
+SYSZ_INS_LOCGHINM = 1304
+SYSZ_INS_LOCGHINO = 1305
+SYSZ_INS_LOCGHINP = 1306
+SYSZ_INS_LOCGHINZ = 1307
+SYSZ_INS_LOCGHIO = 1308
+SYSZ_INS_LOCGHIP = 1309
+SYSZ_INS_LOCGHIZ = 1310
+SYSZ_INS_LOCGM = 1311
+SYSZ_INS_LOCGNM = 1312
+SYSZ_INS_LOCGNP = 1313
+SYSZ_INS_LOCGNZ = 1314
+SYSZ_INS_LOCGP = 1315
+SYSZ_INS_LOCGRM = 1316
+SYSZ_INS_LOCGRNM = 1317
+SYSZ_INS_LOCGRNP = 1318
+SYSZ_INS_LOCGRNZ = 1319
+SYSZ_INS_LOCGRP = 1320
+SYSZ_INS_LOCGRZ = 1321
+SYSZ_INS_LOCGZ = 1322
+SYSZ_INS_LOCHHI = 1323
+SYSZ_INS_LOCHHIE = 1324
+SYSZ_INS_LOCHHIH = 1325
+SYSZ_INS_LOCHHIHE = 1326
+SYSZ_INS_LOCHHIL = 1327
+SYSZ_INS_LOCHHILE = 1328
+SYSZ_INS_LOCHHILH = 1329
+SYSZ_INS_LOCHHIM = 1330
+SYSZ_INS_LOCHHINE = 1331
+SYSZ_INS_LOCHHINH = 1332
+SYSZ_INS_LOCHHINHE = 1333
+SYSZ_INS_LOCHHINL = 1334
+SYSZ_INS_LOCHHINLE = 1335
+SYSZ_INS_LOCHHINLH = 1336
+SYSZ_INS_LOCHHINM = 1337
+SYSZ_INS_LOCHHINO = 1338
+SYSZ_INS_LOCHHINP = 1339
+SYSZ_INS_LOCHHINZ = 1340
+SYSZ_INS_LOCHHIO = 1341
+SYSZ_INS_LOCHHIP = 1342
+SYSZ_INS_LOCHHIZ = 1343
+SYSZ_INS_LOCHI = 1344
+SYSZ_INS_LOCHIE = 1345
+SYSZ_INS_LOCHIH = 1346
+SYSZ_INS_LOCHIHE = 1347
+SYSZ_INS_LOCHIL = 1348
+SYSZ_INS_LOCHILE = 1349
+SYSZ_INS_LOCHILH = 1350
+SYSZ_INS_LOCHIM = 1351
+SYSZ_INS_LOCHINE = 1352
+SYSZ_INS_LOCHINH = 1353
+SYSZ_INS_LOCHINHE = 1354
+SYSZ_INS_LOCHINL = 1355
+SYSZ_INS_LOCHINLE = 1356
+SYSZ_INS_LOCHINLH = 1357
+SYSZ_INS_LOCHINM = 1358
+SYSZ_INS_LOCHINO = 1359
+SYSZ_INS_LOCHINP = 1360
+SYSZ_INS_LOCHINZ = 1361
+SYSZ_INS_LOCHIO = 1362
+SYSZ_INS_LOCHIP = 1363
+SYSZ_INS_LOCHIZ = 1364
+SYSZ_INS_LOCM = 1365
+SYSZ_INS_LOCNM = 1366
+SYSZ_INS_LOCNP = 1367
+SYSZ_INS_LOCNZ = 1368
+SYSZ_INS_LOCP = 1369
+SYSZ_INS_LOCRM = 1370
+SYSZ_INS_LOCRNM = 1371
+SYSZ_INS_LOCRNP = 1372
+SYSZ_INS_LOCRNZ = 1373
+SYSZ_INS_LOCRP = 1374
+SYSZ_INS_LOCRZ = 1375
+SYSZ_INS_LOCZ = 1376
+SYSZ_INS_LPCTL = 1377
+SYSZ_INS_LPD = 1378
+SYSZ_INS_LPDFR = 1379
+SYSZ_INS_LPDG = 1380
+SYSZ_INS_LPDR = 1381
+SYSZ_INS_LPER = 1382
+SYSZ_INS_LPP = 1383
+SYSZ_INS_LPQ = 1384
+SYSZ_INS_LPSW = 1385
+SYSZ_INS_LPSWE = 1386
+SYSZ_INS_LPTEA = 1387
+SYSZ_INS_LPXR = 1388
+SYSZ_INS_LRA = 1389
+SYSZ_INS_LRAG = 1390
+SYSZ_INS_LRAY = 1391
+SYSZ_INS_LRDR = 1392
+SYSZ_INS_LRER = 1393
+SYSZ_INS_LRVH = 1394
+SYSZ_INS_LSCTL = 1395
+SYSZ_INS_LTDR = 1396
+SYSZ_INS_LTDTR = 1397
+SYSZ_INS_LTER = 1398
+SYSZ_INS_LTXR = 1399
+SYSZ_INS_LTXTR = 1400
+SYSZ_INS_LURA = 1401
+SYSZ_INS_LURAG = 1402
+SYSZ_INS_LXD = 1403
+SYSZ_INS_LXDR = 1404
+SYSZ_INS_LXDTR = 1405
+SYSZ_INS_LXE = 1406
+SYSZ_INS_LXER = 1407
+SYSZ_INS_LZRF = 1408
+SYSZ_INS_LZRG = 1409
+SYSZ_INS_M = 1410
+SYSZ_INS_MAD = 1411
+SYSZ_INS_MADR = 1412
+SYSZ_INS_MAE = 1413
+SYSZ_INS_MAER = 1414
+SYSZ_INS_MAY = 1415
+SYSZ_INS_MAYH = 1416
+SYSZ_INS_MAYHR = 1417
+SYSZ_INS_MAYL = 1418
+SYSZ_INS_MAYLR = 1419
+SYSZ_INS_MAYR = 1420
+SYSZ_INS_MC = 1421
+SYSZ_INS_MD = 1422
+SYSZ_INS_MDE = 1423
+SYSZ_INS_MDER = 1424
+SYSZ_INS_MDR = 1425
+SYSZ_INS_MDTR = 1426
+SYSZ_INS_MDTRA = 1427
+SYSZ_INS_ME = 1428
+SYSZ_INS_MEE = 1429
+SYSZ_INS_MEER = 1430
+SYSZ_INS_MER = 1431
+SYSZ_INS_MFY = 1432
+SYSZ_INS_MG = 1433
+SYSZ_INS_MGH = 1434
+SYSZ_INS_MGRK = 1435
+SYSZ_INS_ML = 1436
+SYSZ_INS_MLR = 1437
+SYSZ_INS_MP = 1438
+SYSZ_INS_MR = 1439
+SYSZ_INS_MSC = 1440
+SYSZ_INS_MSCH = 1441
+SYSZ_INS_MSD = 1442
+SYSZ_INS_MSDR = 1443
+SYSZ_INS_MSE = 1444
+SYSZ_INS_MSER = 1445
+SYSZ_INS_MSGC = 1446
+SYSZ_INS_MSGRKC = 1447
+SYSZ_INS_MSRKC = 1448
+SYSZ_INS_MSTA = 1449
+SYSZ_INS_MVCDK = 1450
+SYSZ_INS_MVCIN = 1451
+SYSZ_INS_MVCK = 1452
+SYSZ_INS_MVCL = 1453
+SYSZ_INS_MVCLE = 1454
+SYSZ_INS_MVCLU = 1455
+SYSZ_INS_MVCOS = 1456
+SYSZ_INS_MVCP = 1457
+SYSZ_INS_MVCS = 1458
+SYSZ_INS_MVCSK = 1459
+SYSZ_INS_MVN = 1460
+SYSZ_INS_MVO = 1461
+SYSZ_INS_MVPG = 1462
+SYSZ_INS_MVZ = 1463
+SYSZ_INS_MXD = 1464
+SYSZ_INS_MXDR = 1465
+SYSZ_INS_MXR = 1466
+SYSZ_INS_MXTR = 1467
+SYSZ_INS_MXTRA = 1468
+SYSZ_INS_MY = 1469
+SYSZ_INS_MYH = 1470
+SYSZ_INS_MYHR = 1471
+SYSZ_INS_MYL = 1472
+SYSZ_INS_MYLR = 1473
+SYSZ_INS_MYR = 1474
+SYSZ_INS_NIAI = 1475
+SYSZ_INS_NTSTG = 1476
+SYSZ_INS_PACK = 1477
+SYSZ_INS_PALB = 1478
+SYSZ_INS_PC = 1479
+SYSZ_INS_PCC = 1480
+SYSZ_INS_PCKMO = 1481
+SYSZ_INS_PFMF = 1482
+SYSZ_INS_PFPO = 1483
+SYSZ_INS_PGIN = 1484
+SYSZ_INS_PGOUT = 1485
+SYSZ_INS_PKA = 1486
+SYSZ_INS_PKU = 1487
+SYSZ_INS_PLO = 1488
+SYSZ_INS_POPCNT = 1489
+SYSZ_INS_PPA = 1490
+SYSZ_INS_PPNO = 1491
+SYSZ_INS_PR = 1492
+SYSZ_INS_PRNO = 1493
+SYSZ_INS_PT = 1494
+SYSZ_INS_PTF = 1495
+SYSZ_INS_PTFF = 1496
+SYSZ_INS_PTI = 1497
+SYSZ_INS_PTLB = 1498
+SYSZ_INS_QADTR = 1499
+SYSZ_INS_QAXTR = 1500
+SYSZ_INS_QCTRI = 1501
+SYSZ_INS_QSI = 1502
+SYSZ_INS_RCHP = 1503
+SYSZ_INS_RISBGN = 1504
+SYSZ_INS_RP = 1505
+SYSZ_INS_RRBE = 1506
+SYSZ_INS_RRBM = 1507
+SYSZ_INS_RRDTR = 1508
+SYSZ_INS_RRXTR = 1509
+SYSZ_INS_RSCH = 1510
+SYSZ_INS_SAC = 1511
+SYSZ_INS_SACF = 1512
+SYSZ_INS_SAL = 1513
+SYSZ_INS_SAM24 = 1514
+SYSZ_INS_SAM31 = 1515
+SYSZ_INS_SAM64 = 1516
+SYSZ_INS_SAR = 1517
+SYSZ_INS_SCCTR = 1518
+SYSZ_INS_SCHM = 1519
+SYSZ_INS_SCK = 1520
+SYSZ_INS_SCKC = 1521
+SYSZ_INS_SCKPF = 1522
+SYSZ_INS_SD = 1523
+SYSZ_INS_SDR = 1524
+SYSZ_INS_SDTR = 1525
+SYSZ_INS_SDTRA = 1526
+SYSZ_INS_SE = 1527
+SYSZ_INS_SER = 1528
+SYSZ_INS_SFASR = 1529
+SYSZ_INS_SFPC = 1530
+SYSZ_INS_SGH = 1531
+SYSZ_INS_SHHHR = 1532
+SYSZ_INS_SHHLR = 1533
+SYSZ_INS_SIE = 1534
+SYSZ_INS_SIGA = 1535
+SYSZ_INS_SIGP = 1536
+SYSZ_INS_SLA = 1537
+SYSZ_INS_SLAG = 1538
+SYSZ_INS_SLAK = 1539
+SYSZ_INS_SLDA = 1540
+SYSZ_INS_SLDL = 1541
+SYSZ_INS_SLDT = 1542
+SYSZ_INS_SLHHHR = 1543
+SYSZ_INS_SLHHLR = 1544
+SYSZ_INS_SLXT = 1545
+SYSZ_INS_SP = 1546
+SYSZ_INS_SPCTR = 1547
+SYSZ_INS_SPKA = 1548
+SYSZ_INS_SPM = 1549
+SYSZ_INS_SPT = 1550
+SYSZ_INS_SPX = 1551
+SYSZ_INS_SQD = 1552
+SYSZ_INS_SQDR = 1553
+SYSZ_INS_SQE = 1554
+SYSZ_INS_SQER = 1555
+SYSZ_INS_SQXR = 1556
+SYSZ_INS_SRDA = 1557
+SYSZ_INS_SRDL = 1558
+SYSZ_INS_SRDT = 1559
+SYSZ_INS_SRNM = 1560
+SYSZ_INS_SRNMB = 1561
+SYSZ_INS_SRNMT = 1562
+SYSZ_INS_SRP = 1563
+SYSZ_INS_SRSTU = 1564
+SYSZ_INS_SRXT = 1565
+SYSZ_INS_SSAIR = 1566
+SYSZ_INS_SSAR = 1567
+SYSZ_INS_SSCH = 1568
+SYSZ_INS_SSKE = 1569
+SYSZ_INS_SSM = 1570
+SYSZ_INS_STAM = 1571
+SYSZ_INS_STAMY = 1572
+SYSZ_INS_STAP = 1573
+SYSZ_INS_STCK = 1574
+SYSZ_INS_STCKC = 1575
+SYSZ_INS_STCKE = 1576
+SYSZ_INS_STCKF = 1577
+SYSZ_INS_STCM = 1578
+SYSZ_INS_STCMH = 1579
+SYSZ_INS_STCMY = 1580
+SYSZ_INS_STCPS = 1581
+SYSZ_INS_STCRW = 1582
+SYSZ_INS_STCTG = 1583
+SYSZ_INS_STCTL = 1584
+SYSZ_INS_STFL = 1585
+SYSZ_INS_STFLE = 1586
+SYSZ_INS_STFPC = 1587
+SYSZ_INS_STGSC = 1588
+SYSZ_INS_STIDP = 1589
+SYSZ_INS_STM = 1590
+SYSZ_INS_STMH = 1591
+SYSZ_INS_STMY = 1592
+SYSZ_INS_STNSM = 1593
+SYSZ_INS_STOCFH = 1594
+SYSZ_INS_STOCFHE = 1595
+SYSZ_INS_STOCFHH = 1596
+SYSZ_INS_STOCFHHE = 1597
+SYSZ_INS_STOCFHL = 1598
+SYSZ_INS_STOCFHLE = 1599
+SYSZ_INS_STOCFHLH = 1600
+SYSZ_INS_STOCFHM = 1601
+SYSZ_INS_STOCFHNE = 1602
+SYSZ_INS_STOCFHNH = 1603
+SYSZ_INS_STOCFHNHE = 1604
+SYSZ_INS_STOCFHNL = 1605
+SYSZ_INS_STOCFHNLE = 1606
+SYSZ_INS_STOCFHNLH = 1607
+SYSZ_INS_STOCFHNM = 1608
+SYSZ_INS_STOCFHNO = 1609
+SYSZ_INS_STOCFHNP = 1610
+SYSZ_INS_STOCFHNZ = 1611
+SYSZ_INS_STOCFHO = 1612
+SYSZ_INS_STOCFHP = 1613
+SYSZ_INS_STOCFHZ = 1614
+SYSZ_INS_STOCGM = 1615
+SYSZ_INS_STOCGNM = 1616
+SYSZ_INS_STOCGNP = 1617
+SYSZ_INS_STOCGNZ = 1618
+SYSZ_INS_STOCGP = 1619
+SYSZ_INS_STOCGZ = 1620
+SYSZ_INS_STOCM = 1621
+SYSZ_INS_STOCNM = 1622
+SYSZ_INS_STOCNP = 1623
+SYSZ_INS_STOCNZ = 1624
+SYSZ_INS_STOCP = 1625
+SYSZ_INS_STOCZ = 1626
+SYSZ_INS_STOSM = 1627
+SYSZ_INS_STPQ = 1628
+SYSZ_INS_STPT = 1629
+SYSZ_INS_STPX = 1630
+SYSZ_INS_STRAG = 1631
+SYSZ_INS_STRVH = 1632
+SYSZ_INS_STSCH = 1633
+SYSZ_INS_STSI = 1634
+SYSZ_INS_STURA = 1635
+SYSZ_INS_STURG = 1636
+SYSZ_INS_SU = 1637
+SYSZ_INS_SUR = 1638
+SYSZ_INS_SVC = 1639
+SYSZ_INS_SW = 1640
+SYSZ_INS_SWR = 1641
+SYSZ_INS_SXR = 1642
+SYSZ_INS_SXTR = 1643
+SYSZ_INS_SXTRA = 1644
+SYSZ_INS_TABORT = 1645
+SYSZ_INS_TAM = 1646
+SYSZ_INS_TAR = 1647
+SYSZ_INS_TB = 1648
+SYSZ_INS_TBDR = 1649
+SYSZ_INS_TBEDR = 1650
+SYSZ_INS_TBEGIN = 1651
+SYSZ_INS_TBEGINC = 1652
+SYSZ_INS_TCDB = 1653
+SYSZ_INS_TCEB = 1654
+SYSZ_INS_TCXB = 1655
+SYSZ_INS_TDCDT = 1656
+SYSZ_INS_TDCET = 1657
+SYSZ_INS_TDCXT = 1658
+SYSZ_INS_TDGDT = 1659
+SYSZ_INS_TDGET = 1660
+SYSZ_INS_TDGXT = 1661
+SYSZ_INS_TEND = 1662
+SYSZ_INS_THDER = 1663
+SYSZ_INS_THDR = 1664
+SYSZ_INS_TP = 1665
+SYSZ_INS_TPI = 1666
+SYSZ_INS_TPROT = 1667
+SYSZ_INS_TR = 1668
+SYSZ_INS_TRACE = 1669
+SYSZ_INS_TRACG = 1670
+SYSZ_INS_TRAP2 = 1671
+SYSZ_INS_TRAP4 = 1672
+SYSZ_INS_TRE = 1673
+SYSZ_INS_TROO = 1674
+SYSZ_INS_TROT = 1675
+SYSZ_INS_TRT = 1676
+SYSZ_INS_TRTE = 1677
+SYSZ_INS_TRTO = 1678
+SYSZ_INS_TRTR = 1679
+SYSZ_INS_TRTRE = 1680
+SYSZ_INS_TRTT = 1681
+SYSZ_INS_TS = 1682
+SYSZ_INS_TSCH = 1683
+SYSZ_INS_UNPK = 1684
+SYSZ_INS_UNPKA = 1685
+SYSZ_INS_UNPKU = 1686
+SYSZ_INS_UPT = 1687
+SYSZ_INS_VA = 1688
+SYSZ_INS_VAB = 1689
+SYSZ_INS_VAC = 1690
+SYSZ_INS_VACC = 1691
+SYSZ_INS_VACCB = 1692
+SYSZ_INS_VACCC = 1693
+SYSZ_INS_VACCCQ = 1694
+SYSZ_INS_VACCF = 1695
+SYSZ_INS_VACCG = 1696
+SYSZ_INS_VACCH = 1697
+SYSZ_INS_VACCQ = 1698
+SYSZ_INS_VACQ = 1699
+SYSZ_INS_VAF = 1700
+SYSZ_INS_VAG = 1701
+SYSZ_INS_VAH = 1702
+SYSZ_INS_VAP = 1703
+SYSZ_INS_VAQ = 1704
+SYSZ_INS_VAVG = 1705
+SYSZ_INS_VAVGB = 1706
+SYSZ_INS_VAVGF = 1707
+SYSZ_INS_VAVGG = 1708
+SYSZ_INS_VAVGH = 1709
+SYSZ_INS_VAVGL = 1710
+SYSZ_INS_VAVGLB = 1711
+SYSZ_INS_VAVGLF = 1712
+SYSZ_INS_VAVGLG = 1713
+SYSZ_INS_VAVGLH = 1714
+SYSZ_INS_VBPERM = 1715
+SYSZ_INS_VCDG = 1716
+SYSZ_INS_VCDGB = 1717
+SYSZ_INS_VCDLG = 1718
+SYSZ_INS_VCDLGB = 1719
+SYSZ_INS_VCEQ = 1720
+SYSZ_INS_VCEQB = 1721
+SYSZ_INS_VCEQBS = 1722
+SYSZ_INS_VCEQF = 1723
+SYSZ_INS_VCEQFS = 1724
+SYSZ_INS_VCEQG = 1725
+SYSZ_INS_VCEQGS = 1726
+SYSZ_INS_VCEQH = 1727
+SYSZ_INS_VCEQHS = 1728
+SYSZ_INS_VCGD = 1729
+SYSZ_INS_VCGDB = 1730
+SYSZ_INS_VCH = 1731
+SYSZ_INS_VCHB = 1732
+SYSZ_INS_VCHBS = 1733
+SYSZ_INS_VCHF = 1734
+SYSZ_INS_VCHFS = 1735
+SYSZ_INS_VCHG = 1736
+SYSZ_INS_VCHGS = 1737
+SYSZ_INS_VCHH = 1738
+SYSZ_INS_VCHHS = 1739
+SYSZ_INS_VCHL = 1740
+SYSZ_INS_VCHLB = 1741
+SYSZ_INS_VCHLBS = 1742
+SYSZ_INS_VCHLF = 1743
+SYSZ_INS_VCHLFS = 1744
+SYSZ_INS_VCHLG = 1745
+SYSZ_INS_VCHLGS = 1746
+SYSZ_INS_VCHLH = 1747
+SYSZ_INS_VCHLHS = 1748
+SYSZ_INS_VCKSM = 1749
+SYSZ_INS_VCLGD = 1750
+SYSZ_INS_VCLGDB = 1751
+SYSZ_INS_VCLZ = 1752
+SYSZ_INS_VCLZB = 1753
+SYSZ_INS_VCLZF = 1754
+SYSZ_INS_VCLZG = 1755
+SYSZ_INS_VCLZH = 1756
+SYSZ_INS_VCP = 1757
+SYSZ_INS_VCTZ = 1758
+SYSZ_INS_VCTZB = 1759
+SYSZ_INS_VCTZF = 1760
+SYSZ_INS_VCTZG = 1761
+SYSZ_INS_VCTZH = 1762
+SYSZ_INS_VCVB = 1763
+SYSZ_INS_VCVBG = 1764
+SYSZ_INS_VCVD = 1765
+SYSZ_INS_VCVDG = 1766
+SYSZ_INS_VDP = 1767
+SYSZ_INS_VEC = 1768
+SYSZ_INS_VECB = 1769
+SYSZ_INS_VECF = 1770
+SYSZ_INS_VECG = 1771
+SYSZ_INS_VECH = 1772
+SYSZ_INS_VECL = 1773
+SYSZ_INS_VECLB = 1774
+SYSZ_INS_VECLF = 1775
+SYSZ_INS_VECLG = 1776
+SYSZ_INS_VECLH = 1777
+SYSZ_INS_VERIM = 1778
+SYSZ_INS_VERIMB = 1779
+SYSZ_INS_VERIMF = 1780
+SYSZ_INS_VERIMG = 1781
+SYSZ_INS_VERIMH = 1782
+SYSZ_INS_VERLL = 1783
+SYSZ_INS_VERLLB = 1784
+SYSZ_INS_VERLLF = 1785
+SYSZ_INS_VERLLG = 1786
+SYSZ_INS_VERLLH = 1787
+SYSZ_INS_VERLLV = 1788
+SYSZ_INS_VERLLVB = 1789
+SYSZ_INS_VERLLVF = 1790
+SYSZ_INS_VERLLVG = 1791
+SYSZ_INS_VERLLVH = 1792
+SYSZ_INS_VESL = 1793
+SYSZ_INS_VESLB = 1794
+SYSZ_INS_VESLF = 1795
+SYSZ_INS_VESLG = 1796
+SYSZ_INS_VESLH = 1797
+SYSZ_INS_VESLV = 1798
+SYSZ_INS_VESLVB = 1799
+SYSZ_INS_VESLVF = 1800
+SYSZ_INS_VESLVG = 1801
+SYSZ_INS_VESLVH = 1802
+SYSZ_INS_VESRA = 1803
+SYSZ_INS_VESRAB = 1804
+SYSZ_INS_VESRAF = 1805
+SYSZ_INS_VESRAG = 1806
+SYSZ_INS_VESRAH = 1807
+SYSZ_INS_VESRAV = 1808
+SYSZ_INS_VESRAVB = 1809
+SYSZ_INS_VESRAVF = 1810
+SYSZ_INS_VESRAVG = 1811
+SYSZ_INS_VESRAVH = 1812
+SYSZ_INS_VESRL = 1813
+SYSZ_INS_VESRLB = 1814
+SYSZ_INS_VESRLF = 1815
+SYSZ_INS_VESRLG = 1816
+SYSZ_INS_VESRLH = 1817
+SYSZ_INS_VESRLV = 1818
+SYSZ_INS_VESRLVB = 1819
+SYSZ_INS_VESRLVF = 1820
+SYSZ_INS_VESRLVG = 1821
+SYSZ_INS_VESRLVH = 1822
+SYSZ_INS_VFA = 1823
+SYSZ_INS_VFADB = 1824
+SYSZ_INS_VFAE = 1825
+SYSZ_INS_VFAEB = 1826
+SYSZ_INS_VFAEBS = 1827
+SYSZ_INS_VFAEF = 1828
+SYSZ_INS_VFAEFS = 1829
+SYSZ_INS_VFAEH = 1830
+SYSZ_INS_VFAEHS = 1831
+SYSZ_INS_VFAEZB = 1832
+SYSZ_INS_VFAEZBS = 1833
+SYSZ_INS_VFAEZF = 1834
+SYSZ_INS_VFAEZFS = 1835
+SYSZ_INS_VFAEZH = 1836
+SYSZ_INS_VFAEZHS = 1837
+SYSZ_INS_VFASB = 1838
+SYSZ_INS_VFCE = 1839
+SYSZ_INS_VFCEDB = 1840
+SYSZ_INS_VFCEDBS = 1841
+SYSZ_INS_VFCESB = 1842
+SYSZ_INS_VFCESBS = 1843
+SYSZ_INS_VFCH = 1844
+SYSZ_INS_VFCHDB = 1845
+SYSZ_INS_VFCHDBS = 1846
+SYSZ_INS_VFCHE = 1847
+SYSZ_INS_VFCHEDB = 1848
+SYSZ_INS_VFCHEDBS = 1849
+SYSZ_INS_VFCHESB = 1850
+SYSZ_INS_VFCHESBS = 1851
+SYSZ_INS_VFCHSB = 1852
+SYSZ_INS_VFCHSBS = 1853
+SYSZ_INS_VFD = 1854
+SYSZ_INS_VFDDB = 1855
+SYSZ_INS_VFDSB = 1856
+SYSZ_INS_VFEE = 1857
+SYSZ_INS_VFEEB = 1858
+SYSZ_INS_VFEEBS = 1859
+SYSZ_INS_VFEEF = 1860
+SYSZ_INS_VFEEFS = 1861
+SYSZ_INS_VFEEH = 1862
+SYSZ_INS_VFEEHS = 1863
+SYSZ_INS_VFEEZB = 1864
+SYSZ_INS_VFEEZBS = 1865
+SYSZ_INS_VFEEZF = 1866
+SYSZ_INS_VFEEZFS = 1867
+SYSZ_INS_VFEEZH = 1868
+SYSZ_INS_VFEEZHS = 1869
+SYSZ_INS_VFENE = 1870
+SYSZ_INS_VFENEB = 1871
+SYSZ_INS_VFENEBS = 1872
+SYSZ_INS_VFENEF = 1873
+SYSZ_INS_VFENEFS = 1874
+SYSZ_INS_VFENEH = 1875
+SYSZ_INS_VFENEHS = 1876
+SYSZ_INS_VFENEZB = 1877
+SYSZ_INS_VFENEZBS = 1878
+SYSZ_INS_VFENEZF = 1879
+SYSZ_INS_VFENEZFS = 1880
+SYSZ_INS_VFENEZH = 1881
+SYSZ_INS_VFENEZHS = 1882
+SYSZ_INS_VFI = 1883
+SYSZ_INS_VFIDB = 1884
+SYSZ_INS_VFISB = 1885
+SYSZ_INS_VFKEDB = 1886
+SYSZ_INS_VFKEDBS = 1887
+SYSZ_INS_VFKESB = 1888
+SYSZ_INS_VFKESBS = 1889
+SYSZ_INS_VFKHDB = 1890
+SYSZ_INS_VFKHDBS = 1891
+SYSZ_INS_VFKHEDB = 1892
+SYSZ_INS_VFKHEDBS = 1893
+SYSZ_INS_VFKHESB = 1894
+SYSZ_INS_VFKHESBS = 1895
+SYSZ_INS_VFKHSB = 1896
+SYSZ_INS_VFKHSBS = 1897
+SYSZ_INS_VFLCDB = 1898
+SYSZ_INS_VFLCSB = 1899
+SYSZ_INS_VFLL = 1900
+SYSZ_INS_VFLLS = 1901
+SYSZ_INS_VFLNDB = 1902
+SYSZ_INS_VFLNSB = 1903
+SYSZ_INS_VFLPDB = 1904
+SYSZ_INS_VFLPSB = 1905
+SYSZ_INS_VFLR = 1906
+SYSZ_INS_VFLRD = 1907
+SYSZ_INS_VFM = 1908
+SYSZ_INS_VFMA = 1909
+SYSZ_INS_VFMADB = 1910
+SYSZ_INS_VFMASB = 1911
+SYSZ_INS_VFMAX = 1912
+SYSZ_INS_VFMAXDB = 1913
+SYSZ_INS_VFMAXSB = 1914
+SYSZ_INS_VFMDB = 1915
+SYSZ_INS_VFMIN = 1916
+SYSZ_INS_VFMINDB = 1917
+SYSZ_INS_VFMINSB = 1918
+SYSZ_INS_VFMS = 1919
+SYSZ_INS_VFMSB = 1920
+SYSZ_INS_VFMSDB = 1921
+SYSZ_INS_VFMSSB = 1922
+SYSZ_INS_VFNMA = 1923
+SYSZ_INS_VFNMADB = 1924
+SYSZ_INS_VFNMASB = 1925
+SYSZ_INS_VFNMS = 1926
+SYSZ_INS_VFNMSDB = 1927
+SYSZ_INS_VFNMSSB = 1928
+SYSZ_INS_VFPSO = 1929
+SYSZ_INS_VFPSODB = 1930
+SYSZ_INS_VFPSOSB = 1931
+SYSZ_INS_VFS = 1932
+SYSZ_INS_VFSDB = 1933
+SYSZ_INS_VFSQ = 1934
+SYSZ_INS_VFSQDB = 1935
+SYSZ_INS_VFSQSB = 1936
+SYSZ_INS_VFSSB = 1937
+SYSZ_INS_VFTCI = 1938
+SYSZ_INS_VFTCIDB = 1939
+SYSZ_INS_VFTCISB = 1940
+SYSZ_INS_VGBM = 1941
+SYSZ_INS_VGEF = 1942
+SYSZ_INS_VGEG = 1943
+SYSZ_INS_VGFM = 1944
+SYSZ_INS_VGFMA = 1945
+SYSZ_INS_VGFMAB = 1946
+SYSZ_INS_VGFMAF = 1947
+SYSZ_INS_VGFMAG = 1948
+SYSZ_INS_VGFMAH = 1949
+SYSZ_INS_VGFMB = 1950
+SYSZ_INS_VGFMF = 1951
+SYSZ_INS_VGFMG = 1952
+SYSZ_INS_VGFMH = 1953
+SYSZ_INS_VGM = 1954
+SYSZ_INS_VGMB = 1955
+SYSZ_INS_VGMF = 1956
+SYSZ_INS_VGMG = 1957
+SYSZ_INS_VGMH = 1958
+SYSZ_INS_VISTR = 1959
+SYSZ_INS_VISTRB = 1960
+SYSZ_INS_VISTRBS = 1961
+SYSZ_INS_VISTRF = 1962
+SYSZ_INS_VISTRFS = 1963
+SYSZ_INS_VISTRH = 1964
+SYSZ_INS_VISTRHS = 1965
+SYSZ_INS_VL = 1966
+SYSZ_INS_VLBB = 1967
+SYSZ_INS_VLC = 1968
+SYSZ_INS_VLCB = 1969
+SYSZ_INS_VLCF = 1970
+SYSZ_INS_VLCG = 1971
+SYSZ_INS_VLCH = 1972
+SYSZ_INS_VLDE = 1973
+SYSZ_INS_VLDEB = 1974
+SYSZ_INS_VLEB = 1975
+SYSZ_INS_VLED = 1976
+SYSZ_INS_VLEDB = 1977
+SYSZ_INS_VLEF = 1978
+SYSZ_INS_VLEG = 1979
+SYSZ_INS_VLEH = 1980
+SYSZ_INS_VLEIB = 1981
+SYSZ_INS_VLEIF = 1982
+SYSZ_INS_VLEIG = 1983
+SYSZ_INS_VLEIH = 1984
+SYSZ_INS_VLGV = 1985
+SYSZ_INS_VLGVB = 1986
+SYSZ_INS_VLGVF = 1987
+SYSZ_INS_VLGVG = 1988
+SYSZ_INS_VLGVH = 1989
+SYSZ_INS_VLIP = 1990
+SYSZ_INS_VLL = 1991
+SYSZ_INS_VLLEZ = 1992
+SYSZ_INS_VLLEZB = 1993
+SYSZ_INS_VLLEZF = 1994
+SYSZ_INS_VLLEZG = 1995
+SYSZ_INS_VLLEZH = 1996
+SYSZ_INS_VLLEZLF = 1997
+SYSZ_INS_VLM = 1998
+SYSZ_INS_VLP = 1999
+SYSZ_INS_VLPB = 2000
+SYSZ_INS_VLPF = 2001
+SYSZ_INS_VLPG = 2002
+SYSZ_INS_VLPH = 2003
+SYSZ_INS_VLR = 2004
+SYSZ_INS_VLREP = 2005
+SYSZ_INS_VLREPB = 2006
+SYSZ_INS_VLREPF = 2007
+SYSZ_INS_VLREPG = 2008
+SYSZ_INS_VLREPH = 2009
+SYSZ_INS_VLRL = 2010
+SYSZ_INS_VLRLR = 2011
+SYSZ_INS_VLVG = 2012
+SYSZ_INS_VLVGB = 2013
+SYSZ_INS_VLVGF = 2014
+SYSZ_INS_VLVGG = 2015
+SYSZ_INS_VLVGH = 2016
+SYSZ_INS_VLVGP = 2017
+SYSZ_INS_VMAE = 2018
+SYSZ_INS_VMAEB = 2019
+SYSZ_INS_VMAEF = 2020
+SYSZ_INS_VMAEH = 2021
+SYSZ_INS_VMAH = 2022
+SYSZ_INS_VMAHB = 2023
+SYSZ_INS_VMAHF = 2024
+SYSZ_INS_VMAHH = 2025
+SYSZ_INS_VMAL = 2026
+SYSZ_INS_VMALB = 2027
+SYSZ_INS_VMALE = 2028
+SYSZ_INS_VMALEB = 2029
+SYSZ_INS_VMALEF = 2030
+SYSZ_INS_VMALEH = 2031
+SYSZ_INS_VMALF = 2032
+SYSZ_INS_VMALH = 2033
+SYSZ_INS_VMALHB = 2034
+SYSZ_INS_VMALHF = 2035
+SYSZ_INS_VMALHH = 2036
+SYSZ_INS_VMALHW = 2037
+SYSZ_INS_VMALO = 2038
+SYSZ_INS_VMALOB = 2039
+SYSZ_INS_VMALOF = 2040
+SYSZ_INS_VMALOH = 2041
+SYSZ_INS_VMAO = 2042
+SYSZ_INS_VMAOB = 2043
+SYSZ_INS_VMAOF = 2044
+SYSZ_INS_VMAOH = 2045
+SYSZ_INS_VME = 2046
+SYSZ_INS_VMEB = 2047
+SYSZ_INS_VMEF = 2048
+SYSZ_INS_VMEH = 2049
+SYSZ_INS_VMH = 2050
+SYSZ_INS_VMHB = 2051
+SYSZ_INS_VMHF = 2052
+SYSZ_INS_VMHH = 2053
+SYSZ_INS_VML = 2054
+SYSZ_INS_VMLB = 2055
+SYSZ_INS_VMLE = 2056
+SYSZ_INS_VMLEB = 2057
+SYSZ_INS_VMLEF = 2058
+SYSZ_INS_VMLEH = 2059
+SYSZ_INS_VMLF = 2060
+SYSZ_INS_VMLH = 2061
+SYSZ_INS_VMLHB = 2062
+SYSZ_INS_VMLHF = 2063
+SYSZ_INS_VMLHH = 2064
+SYSZ_INS_VMLHW = 2065
+SYSZ_INS_VMLO = 2066
+SYSZ_INS_VMLOB = 2067
+SYSZ_INS_VMLOF = 2068
+SYSZ_INS_VMLOH = 2069
+SYSZ_INS_VMN = 2070
+SYSZ_INS_VMNB = 2071
+SYSZ_INS_VMNF = 2072
+SYSZ_INS_VMNG = 2073
+SYSZ_INS_VMNH = 2074
+SYSZ_INS_VMNL = 2075
+SYSZ_INS_VMNLB = 2076
+SYSZ_INS_VMNLF = 2077
+SYSZ_INS_VMNLG = 2078
+SYSZ_INS_VMNLH = 2079
+SYSZ_INS_VMO = 2080
+SYSZ_INS_VMOB = 2081
+SYSZ_INS_VMOF = 2082
+SYSZ_INS_VMOH = 2083
+SYSZ_INS_VMP = 2084
+SYSZ_INS_VMRH = 2085
+SYSZ_INS_VMRHB = 2086
+SYSZ_INS_VMRHF = 2087
+SYSZ_INS_VMRHG = 2088
+SYSZ_INS_VMRHH = 2089
+SYSZ_INS_VMRL = 2090
+SYSZ_INS_VMRLB = 2091
+SYSZ_INS_VMRLF = 2092
+SYSZ_INS_VMRLG = 2093
+SYSZ_INS_VMRLH = 2094
+SYSZ_INS_VMSL = 2095
+SYSZ_INS_VMSLG = 2096
+SYSZ_INS_VMSP = 2097
+SYSZ_INS_VMX = 2098
+SYSZ_INS_VMXB = 2099
+SYSZ_INS_VMXF = 2100
+SYSZ_INS_VMXG = 2101
+SYSZ_INS_VMXH = 2102
+SYSZ_INS_VMXL = 2103
+SYSZ_INS_VMXLB = 2104
+SYSZ_INS_VMXLF = 2105
+SYSZ_INS_VMXLG = 2106
+SYSZ_INS_VMXLH = 2107
+SYSZ_INS_VN = 2108
+SYSZ_INS_VNC = 2109
+SYSZ_INS_VNN = 2110
+SYSZ_INS_VNO = 2111
+SYSZ_INS_VNX = 2112
+SYSZ_INS_VO = 2113
+SYSZ_INS_VOC = 2114
+SYSZ_INS_VONE = 2115
+SYSZ_INS_VPDI = 2116
+SYSZ_INS_VPERM = 2117
+SYSZ_INS_VPK = 2118
+SYSZ_INS_VPKF = 2119
+SYSZ_INS_VPKG = 2120
+SYSZ_INS_VPKH = 2121
+SYSZ_INS_VPKLS = 2122
+SYSZ_INS_VPKLSF = 2123
+SYSZ_INS_VPKLSFS = 2124
+SYSZ_INS_VPKLSG = 2125
+SYSZ_INS_VPKLSGS = 2126
+SYSZ_INS_VPKLSH = 2127
+SYSZ_INS_VPKLSHS = 2128
+SYSZ_INS_VPKS = 2129
+SYSZ_INS_VPKSF = 2130
+SYSZ_INS_VPKSFS = 2131
+SYSZ_INS_VPKSG = 2132
+SYSZ_INS_VPKSGS = 2133
+SYSZ_INS_VPKSH = 2134
+SYSZ_INS_VPKSHS = 2135
+SYSZ_INS_VPKZ = 2136
+SYSZ_INS_VPOPCT = 2137
+SYSZ_INS_VPOPCTB = 2138
+SYSZ_INS_VPOPCTF = 2139
+SYSZ_INS_VPOPCTG = 2140
+SYSZ_INS_VPOPCTH = 2141
+SYSZ_INS_VPSOP = 2142
+SYSZ_INS_VREP = 2143
+SYSZ_INS_VREPB = 2144
+SYSZ_INS_VREPF = 2145
+SYSZ_INS_VREPG = 2146
+SYSZ_INS_VREPH = 2147
+SYSZ_INS_VREPI = 2148
+SYSZ_INS_VREPIB = 2149
+SYSZ_INS_VREPIF = 2150
+SYSZ_INS_VREPIG = 2151
+SYSZ_INS_VREPIH = 2152
+SYSZ_INS_VRP = 2153
+SYSZ_INS_VS = 2154
+SYSZ_INS_VSB = 2155
+SYSZ_INS_VSBCBI = 2156
+SYSZ_INS_VSBCBIQ = 2157
+SYSZ_INS_VSBI = 2158
+SYSZ_INS_VSBIQ = 2159
+SYSZ_INS_VSCBI = 2160
+SYSZ_INS_VSCBIB = 2161
+SYSZ_INS_VSCBIF = 2162
+SYSZ_INS_VSCBIG = 2163
+SYSZ_INS_VSCBIH = 2164
+SYSZ_INS_VSCBIQ = 2165
+SYSZ_INS_VSCEF = 2166
+SYSZ_INS_VSCEG = 2167
+SYSZ_INS_VSDP = 2168
+SYSZ_INS_VSEG = 2169
+SYSZ_INS_VSEGB = 2170
+SYSZ_INS_VSEGF = 2171
+SYSZ_INS_VSEGH = 2172
+SYSZ_INS_VSEL = 2173
+SYSZ_INS_VSF = 2174
+SYSZ_INS_VSG = 2175
+SYSZ_INS_VSH = 2176
+SYSZ_INS_VSL = 2177
+SYSZ_INS_VSLB = 2178
+SYSZ_INS_VSLDB = 2179
+SYSZ_INS_VSP = 2180
+SYSZ_INS_VSQ = 2181
+SYSZ_INS_VSRA = 2182
+SYSZ_INS_VSRAB = 2183
+SYSZ_INS_VSRL = 2184
+SYSZ_INS_VSRLB = 2185
+SYSZ_INS_VSRP = 2186
+SYSZ_INS_VST = 2187
+SYSZ_INS_VSTEB = 2188
+SYSZ_INS_VSTEF = 2189
+SYSZ_INS_VSTEG = 2190
+SYSZ_INS_VSTEH = 2191
+SYSZ_INS_VSTL = 2192
+SYSZ_INS_VSTM = 2193
+SYSZ_INS_VSTRC = 2194
+SYSZ_INS_VSTRCB = 2195
+SYSZ_INS_VSTRCBS = 2196
+SYSZ_INS_VSTRCF = 2197
+SYSZ_INS_VSTRCFS = 2198
+SYSZ_INS_VSTRCH = 2199
+SYSZ_INS_VSTRCHS = 2200
+SYSZ_INS_VSTRCZB = 2201
+SYSZ_INS_VSTRCZBS = 2202
+SYSZ_INS_VSTRCZF = 2203
+SYSZ_INS_VSTRCZFS = 2204
+SYSZ_INS_VSTRCZH = 2205
+SYSZ_INS_VSTRCZHS = 2206
+SYSZ_INS_VSTRL = 2207
+SYSZ_INS_VSTRLR = 2208
+SYSZ_INS_VSUM = 2209
+SYSZ_INS_VSUMB = 2210
+SYSZ_INS_VSUMG = 2211
+SYSZ_INS_VSUMGF = 2212
+SYSZ_INS_VSUMGH = 2213
+SYSZ_INS_VSUMH = 2214
+SYSZ_INS_VSUMQ = 2215
+SYSZ_INS_VSUMQF = 2216
+SYSZ_INS_VSUMQG = 2217
+SYSZ_INS_VTM = 2218
+SYSZ_INS_VTP = 2219
+SYSZ_INS_VUPH = 2220
+SYSZ_INS_VUPHB = 2221
+SYSZ_INS_VUPHF = 2222
+SYSZ_INS_VUPHH = 2223
+SYSZ_INS_VUPKZ = 2224
+SYSZ_INS_VUPL = 2225
+SYSZ_INS_VUPLB = 2226
+SYSZ_INS_VUPLF = 2227
+SYSZ_INS_VUPLH = 2228
+SYSZ_INS_VUPLHB = 2229
+SYSZ_INS_VUPLHF = 2230
+SYSZ_INS_VUPLHH = 2231
+SYSZ_INS_VUPLHW = 2232
+SYSZ_INS_VUPLL = 2233
+SYSZ_INS_VUPLLB = 2234
+SYSZ_INS_VUPLLF = 2235
+SYSZ_INS_VUPLLH = 2236
+SYSZ_INS_VX = 2237
+SYSZ_INS_VZERO = 2238
+SYSZ_INS_WCDGB = 2239
+SYSZ_INS_WCDLGB = 2240
+SYSZ_INS_WCGDB = 2241
+SYSZ_INS_WCLGDB = 2242
+SYSZ_INS_WFADB = 2243
+SYSZ_INS_WFASB = 2244
+SYSZ_INS_WFAXB = 2245
+SYSZ_INS_WFC = 2246
+SYSZ_INS_WFCDB = 2247
+SYSZ_INS_WFCEDB = 2248
+SYSZ_INS_WFCEDBS = 2249
+SYSZ_INS_WFCESB = 2250
+SYSZ_INS_WFCESBS = 2251
+SYSZ_INS_WFCEXB = 2252
+SYSZ_INS_WFCEXBS = 2253
+SYSZ_INS_WFCHDB = 2254
+SYSZ_INS_WFCHDBS = 2255
+SYSZ_INS_WFCHEDB = 2256
+SYSZ_INS_WFCHEDBS = 2257
+SYSZ_INS_WFCHESB = 2258
+SYSZ_INS_WFCHESBS = 2259
+SYSZ_INS_WFCHEXB = 2260
+SYSZ_INS_WFCHEXBS = 2261
+SYSZ_INS_WFCHSB = 2262
+SYSZ_INS_WFCHSBS = 2263
+SYSZ_INS_WFCHXB = 2264
+SYSZ_INS_WFCHXBS = 2265
+SYSZ_INS_WFCSB = 2266
+SYSZ_INS_WFCXB = 2267
+SYSZ_INS_WFDDB = 2268
+SYSZ_INS_WFDSB = 2269
+SYSZ_INS_WFDXB = 2270
+SYSZ_INS_WFIDB = 2271
+SYSZ_INS_WFISB = 2272
+SYSZ_INS_WFIXB = 2273
+SYSZ_INS_WFK = 2274
+SYSZ_INS_WFKDB = 2275
+SYSZ_INS_WFKEDB = 2276
+SYSZ_INS_WFKEDBS = 2277
+SYSZ_INS_WFKESB = 2278
+SYSZ_INS_WFKESBS = 2279
+SYSZ_INS_WFKEXB = 2280
+SYSZ_INS_WFKEXBS = 2281
+SYSZ_INS_WFKHDB = 2282
+SYSZ_INS_WFKHDBS = 2283
+SYSZ_INS_WFKHEDB = 2284
+SYSZ_INS_WFKHEDBS = 2285
+SYSZ_INS_WFKHESB = 2286
+SYSZ_INS_WFKHESBS = 2287
+SYSZ_INS_WFKHEXB = 2288
+SYSZ_INS_WFKHEXBS = 2289
+SYSZ_INS_WFKHSB = 2290
+SYSZ_INS_WFKHSBS = 2291
+SYSZ_INS_WFKHXB = 2292
+SYSZ_INS_WFKHXBS = 2293
+SYSZ_INS_WFKSB = 2294
+SYSZ_INS_WFKXB = 2295
+SYSZ_INS_WFLCDB = 2296
+SYSZ_INS_WFLCSB = 2297
+SYSZ_INS_WFLCXB = 2298
+SYSZ_INS_WFLLD = 2299
+SYSZ_INS_WFLLS = 2300
+SYSZ_INS_WFLNDB = 2301
+SYSZ_INS_WFLNSB = 2302
+SYSZ_INS_WFLNXB = 2303
+SYSZ_INS_WFLPDB = 2304
+SYSZ_INS_WFLPSB = 2305
+SYSZ_INS_WFLPXB = 2306
+SYSZ_INS_WFLRD = 2307
+SYSZ_INS_WFLRX = 2308
+SYSZ_INS_WFMADB = 2309
+SYSZ_INS_WFMASB = 2310
+SYSZ_INS_WFMAXB = 2311
+SYSZ_INS_WFMAXDB = 2312
+SYSZ_INS_WFMAXSB = 2313
+SYSZ_INS_WFMAXXB = 2314
+SYSZ_INS_WFMDB = 2315
+SYSZ_INS_WFMINDB = 2316
+SYSZ_INS_WFMINSB = 2317
+SYSZ_INS_WFMINXB = 2318
+SYSZ_INS_WFMSB = 2319
+SYSZ_INS_WFMSDB = 2320
+SYSZ_INS_WFMSSB = 2321
+SYSZ_INS_WFMSXB = 2322
+SYSZ_INS_WFMXB = 2323
+SYSZ_INS_WFNMADB = 2324
+SYSZ_INS_WFNMASB = 2325
+SYSZ_INS_WFNMAXB = 2326
+SYSZ_INS_WFNMSDB = 2327
+SYSZ_INS_WFNMSSB = 2328
+SYSZ_INS_WFNMSXB = 2329
+SYSZ_INS_WFPSODB = 2330
+SYSZ_INS_WFPSOSB = 2331
+SYSZ_INS_WFPSOXB = 2332
+SYSZ_INS_WFSDB = 2333
+SYSZ_INS_WFSQDB = 2334
+SYSZ_INS_WFSQSB = 2335
+SYSZ_INS_WFSQXB = 2336
+SYSZ_INS_WFSSB = 2337
+SYSZ_INS_WFSXB = 2338
+SYSZ_INS_WFTCIDB = 2339
+SYSZ_INS_WFTCISB = 2340
+SYSZ_INS_WFTCIXB = 2341
+SYSZ_INS_WLDEB = 2342
+SYSZ_INS_WLEDB = 2343
+SYSZ_INS_XSCH = 2344
+SYSZ_INS_ZAP = 2345
+SYSZ_INS_ENDING = 2346
+
+SYSZ_GRP_INVALID = 0
+SYSZ_GRP_JUMP = 1
+SYSZ_GRP_DISTINCTOPS = 128
+SYSZ_GRP_FPEXTENSION = 129
+SYSZ_GRP_HIGHWORD = 130
+SYSZ_GRP_INTERLOCKEDACCESS1 = 131
+SYSZ_GRP_LOADSTOREONCOND = 132
+SYSZ_GRP_DFPPACKEDCONVERSION = 133
+SYSZ_GRP_DFPZONEDCONVERSION = 134
+SYSZ_GRP_ENHANCEDDAT2 = 135
+SYSZ_GRP_EXECUTIONHINT = 136
+SYSZ_GRP_GUARDEDSTORAGE = 137
+SYSZ_GRP_INSERTREFERENCEBITSMULTIPLE = 138
+SYSZ_GRP_LOADANDTRAP = 139
+SYSZ_GRP_LOADANDZERORIGHTMOSTBYTE = 140
+SYSZ_GRP_LOADSTOREONCOND2 = 141
+SYSZ_GRP_MESSAGESECURITYASSIST3 = 142
+SYSZ_GRP_MESSAGESECURITYASSIST4 = 143
+SYSZ_GRP_MESSAGESECURITYASSIST5 = 144
+SYSZ_GRP_MESSAGESECURITYASSIST7 = 145
+SYSZ_GRP_MESSAGESECURITYASSIST8 = 146
+SYSZ_GRP_MISCELLANEOUSEXTENSIONS = 147
+SYSZ_GRP_MISCELLANEOUSEXTENSIONS2 = 148
+SYSZ_GRP_NOVECTOR = 149
+SYSZ_GRP_POPULATIONCOUNT = 150
+SYSZ_GRP_PROCESSORASSIST = 151
+SYSZ_GRP_RESETREFERENCEBITSMULTIPLE = 152
+SYSZ_GRP_TRANSACTIONALEXECUTION = 153
+SYSZ_GRP_VECTOR = 154
+SYSZ_GRP_VECTORENHANCEMENTS1 = 155
+SYSZ_GRP_VECTORPACKEDDECIMAL = 156
+SYSZ_GRP_ENDING = 157
diff --git a/capstone/bindings/python/capstone/tms320c64x.py b/capstone/bindings/python/capstone/tms320c64x.py
new file mode 100644
index 000000000..1323dc37c
--- /dev/null
+++ b/capstone/bindings/python/capstone/tms320c64x.py
@@ -0,0 +1,66 @@
+# Capstone Python bindings, by Fotis Loukos <me@fotisl.com>
+
+import ctypes, copy
+from .tms320c64x_const import *
+
+# define the API
+class TMS320C64xOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_int),
+        ('disp', ctypes.c_int),
+        ('unit', ctypes.c_int),
+        ('scaled', ctypes.c_int),
+        ('disptype', ctypes.c_int),
+        ('direction', ctypes.c_int),
+        ('modify', ctypes.c_int),
+    )
+
+class TMS320C64xOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int32),
+        ('mem', TMS320C64xOpMem),
+    )
+
+class TMS320C64xCondition(ctypes.Structure):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('zero', ctypes.c_uint),
+    )
+
+class TMS320C64xFunctionalUnit(ctypes.Structure):
+    _fields_ = (
+        ('unit', ctypes.c_uint),
+        ('side', ctypes.c_uint),
+        ('crosspath', ctypes.c_uint),
+    )
+
+class TMS320C64xOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', TMS320C64xOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+class CsTMS320C64x(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', TMS320C64xOp * 8),
+        ('condition', TMS320C64xCondition),
+        ('funit', TMS320C64xFunctionalUnit),
+        ('parallel', ctypes.c_uint),
+    )
+
+def get_arch_info(a):
+    return (a.condition, a.funit, a.parallel, copy.deepcopy(a.operands[:a.op_count]))
diff --git a/capstone/bindings/python/capstone/tms320c64x_const.py b/capstone/bindings/python/capstone/tms320c64x_const.py
new file mode 100644
index 000000000..7f8daaeb6
--- /dev/null
+++ b/capstone/bindings/python/capstone/tms320c64x_const.py
@@ -0,0 +1,277 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.py]
+
+TMS320C64X_OP_INVALID = 0
+TMS320C64X_OP_REG = 1
+TMS320C64X_OP_IMM = 2
+TMS320C64X_OP_MEM = 3
+TMS320C64X_OP_REGPAIR = 64
+
+TMS320C64X_MEM_DISP_INVALID = 0
+TMS320C64X_MEM_DISP_CONSTANT = 1
+TMS320C64X_MEM_DISP_REGISTER = 2
+
+TMS320C64X_MEM_DIR_INVALID = 0
+TMS320C64X_MEM_DIR_FW = 1
+TMS320C64X_MEM_DIR_BW = 2
+
+TMS320C64X_MEM_MOD_INVALID = 0
+TMS320C64X_MEM_MOD_NO = 1
+TMS320C64X_MEM_MOD_PRE = 2
+TMS320C64X_MEM_MOD_POST = 3
+
+TMS320C64X_REG_INVALID = 0
+TMS320C64X_REG_AMR = 1
+TMS320C64X_REG_CSR = 2
+TMS320C64X_REG_DIER = 3
+TMS320C64X_REG_DNUM = 4
+TMS320C64X_REG_ECR = 5
+TMS320C64X_REG_GFPGFR = 6
+TMS320C64X_REG_GPLYA = 7
+TMS320C64X_REG_GPLYB = 8
+TMS320C64X_REG_ICR = 9
+TMS320C64X_REG_IER = 10
+TMS320C64X_REG_IERR = 11
+TMS320C64X_REG_ILC = 12
+TMS320C64X_REG_IRP = 13
+TMS320C64X_REG_ISR = 14
+TMS320C64X_REG_ISTP = 15
+TMS320C64X_REG_ITSR = 16
+TMS320C64X_REG_NRP = 17
+TMS320C64X_REG_NTSR = 18
+TMS320C64X_REG_REP = 19
+TMS320C64X_REG_RILC = 20
+TMS320C64X_REG_SSR = 21
+TMS320C64X_REG_TSCH = 22
+TMS320C64X_REG_TSCL = 23
+TMS320C64X_REG_TSR = 24
+TMS320C64X_REG_A0 = 25
+TMS320C64X_REG_A1 = 26
+TMS320C64X_REG_A2 = 27
+TMS320C64X_REG_A3 = 28
+TMS320C64X_REG_A4 = 29
+TMS320C64X_REG_A5 = 30
+TMS320C64X_REG_A6 = 31
+TMS320C64X_REG_A7 = 32
+TMS320C64X_REG_A8 = 33
+TMS320C64X_REG_A9 = 34
+TMS320C64X_REG_A10 = 35
+TMS320C64X_REG_A11 = 36
+TMS320C64X_REG_A12 = 37
+TMS320C64X_REG_A13 = 38
+TMS320C64X_REG_A14 = 39
+TMS320C64X_REG_A15 = 40
+TMS320C64X_REG_A16 = 41
+TMS320C64X_REG_A17 = 42
+TMS320C64X_REG_A18 = 43
+TMS320C64X_REG_A19 = 44
+TMS320C64X_REG_A20 = 45
+TMS320C64X_REG_A21 = 46
+TMS320C64X_REG_A22 = 47
+TMS320C64X_REG_A23 = 48
+TMS320C64X_REG_A24 = 49
+TMS320C64X_REG_A25 = 50
+TMS320C64X_REG_A26 = 51
+TMS320C64X_REG_A27 = 52
+TMS320C64X_REG_A28 = 53
+TMS320C64X_REG_A29 = 54
+TMS320C64X_REG_A30 = 55
+TMS320C64X_REG_A31 = 56
+TMS320C64X_REG_B0 = 57
+TMS320C64X_REG_B1 = 58
+TMS320C64X_REG_B2 = 59
+TMS320C64X_REG_B3 = 60
+TMS320C64X_REG_B4 = 61
+TMS320C64X_REG_B5 = 62
+TMS320C64X_REG_B6 = 63
+TMS320C64X_REG_B7 = 64
+TMS320C64X_REG_B8 = 65
+TMS320C64X_REG_B9 = 66
+TMS320C64X_REG_B10 = 67
+TMS320C64X_REG_B11 = 68
+TMS320C64X_REG_B12 = 69
+TMS320C64X_REG_B13 = 70
+TMS320C64X_REG_B14 = 71
+TMS320C64X_REG_B15 = 72
+TMS320C64X_REG_B16 = 73
+TMS320C64X_REG_B17 = 74
+TMS320C64X_REG_B18 = 75
+TMS320C64X_REG_B19 = 76
+TMS320C64X_REG_B20 = 77
+TMS320C64X_REG_B21 = 78
+TMS320C64X_REG_B22 = 79
+TMS320C64X_REG_B23 = 80
+TMS320C64X_REG_B24 = 81
+TMS320C64X_REG_B25 = 82
+TMS320C64X_REG_B26 = 83
+TMS320C64X_REG_B27 = 84
+TMS320C64X_REG_B28 = 85
+TMS320C64X_REG_B29 = 86
+TMS320C64X_REG_B30 = 87
+TMS320C64X_REG_B31 = 88
+TMS320C64X_REG_PCE1 = 89
+TMS320C64X_REG_ENDING = 90
+TMS320C64X_REG_EFR = TMS320C64X_REG_ECR
+TMS320C64X_REG_IFR = TMS320C64X_REG_ISR
+
+TMS320C64X_INS_INVALID = 0
+TMS320C64X_INS_ABS = 1
+TMS320C64X_INS_ABS2 = 2
+TMS320C64X_INS_ADD = 3
+TMS320C64X_INS_ADD2 = 4
+TMS320C64X_INS_ADD4 = 5
+TMS320C64X_INS_ADDAB = 6
+TMS320C64X_INS_ADDAD = 7
+TMS320C64X_INS_ADDAH = 8
+TMS320C64X_INS_ADDAW = 9
+TMS320C64X_INS_ADDK = 10
+TMS320C64X_INS_ADDKPC = 11
+TMS320C64X_INS_ADDU = 12
+TMS320C64X_INS_AND = 13
+TMS320C64X_INS_ANDN = 14
+TMS320C64X_INS_AVG2 = 15
+TMS320C64X_INS_AVGU4 = 16
+TMS320C64X_INS_B = 17
+TMS320C64X_INS_BDEC = 18
+TMS320C64X_INS_BITC4 = 19
+TMS320C64X_INS_BNOP = 20
+TMS320C64X_INS_BPOS = 21
+TMS320C64X_INS_CLR = 22
+TMS320C64X_INS_CMPEQ = 23
+TMS320C64X_INS_CMPEQ2 = 24
+TMS320C64X_INS_CMPEQ4 = 25
+TMS320C64X_INS_CMPGT = 26
+TMS320C64X_INS_CMPGT2 = 27
+TMS320C64X_INS_CMPGTU4 = 28
+TMS320C64X_INS_CMPLT = 29
+TMS320C64X_INS_CMPLTU = 30
+TMS320C64X_INS_DEAL = 31
+TMS320C64X_INS_DOTP2 = 32
+TMS320C64X_INS_DOTPN2 = 33
+TMS320C64X_INS_DOTPNRSU2 = 34
+TMS320C64X_INS_DOTPRSU2 = 35
+TMS320C64X_INS_DOTPSU4 = 36
+TMS320C64X_INS_DOTPU4 = 37
+TMS320C64X_INS_EXT = 38
+TMS320C64X_INS_EXTU = 39
+TMS320C64X_INS_GMPGTU = 40
+TMS320C64X_INS_GMPY4 = 41
+TMS320C64X_INS_LDB = 42
+TMS320C64X_INS_LDBU = 43
+TMS320C64X_INS_LDDW = 44
+TMS320C64X_INS_LDH = 45
+TMS320C64X_INS_LDHU = 46
+TMS320C64X_INS_LDNDW = 47
+TMS320C64X_INS_LDNW = 48
+TMS320C64X_INS_LDW = 49
+TMS320C64X_INS_LMBD = 50
+TMS320C64X_INS_MAX2 = 51
+TMS320C64X_INS_MAXU4 = 52
+TMS320C64X_INS_MIN2 = 53
+TMS320C64X_INS_MINU4 = 54
+TMS320C64X_INS_MPY = 55
+TMS320C64X_INS_MPY2 = 56
+TMS320C64X_INS_MPYH = 57
+TMS320C64X_INS_MPYHI = 58
+TMS320C64X_INS_MPYHIR = 59
+TMS320C64X_INS_MPYHL = 60
+TMS320C64X_INS_MPYHLU = 61
+TMS320C64X_INS_MPYHSLU = 62
+TMS320C64X_INS_MPYHSU = 63
+TMS320C64X_INS_MPYHU = 64
+TMS320C64X_INS_MPYHULS = 65
+TMS320C64X_INS_MPYHUS = 66
+TMS320C64X_INS_MPYLH = 67
+TMS320C64X_INS_MPYLHU = 68
+TMS320C64X_INS_MPYLI = 69
+TMS320C64X_INS_MPYLIR = 70
+TMS320C64X_INS_MPYLSHU = 71
+TMS320C64X_INS_MPYLUHS = 72
+TMS320C64X_INS_MPYSU = 73
+TMS320C64X_INS_MPYSU4 = 74
+TMS320C64X_INS_MPYU = 75
+TMS320C64X_INS_MPYU4 = 76
+TMS320C64X_INS_MPYUS = 77
+TMS320C64X_INS_MVC = 78
+TMS320C64X_INS_MVD = 79
+TMS320C64X_INS_MVK = 80
+TMS320C64X_INS_MVKL = 81
+TMS320C64X_INS_MVKLH = 82
+TMS320C64X_INS_NOP = 83
+TMS320C64X_INS_NORM = 84
+TMS320C64X_INS_OR = 85
+TMS320C64X_INS_PACK2 = 86
+TMS320C64X_INS_PACKH2 = 87
+TMS320C64X_INS_PACKH4 = 88
+TMS320C64X_INS_PACKHL2 = 89
+TMS320C64X_INS_PACKL4 = 90
+TMS320C64X_INS_PACKLH2 = 91
+TMS320C64X_INS_ROTL = 92
+TMS320C64X_INS_SADD = 93
+TMS320C64X_INS_SADD2 = 94
+TMS320C64X_INS_SADDU4 = 95
+TMS320C64X_INS_SADDUS2 = 96
+TMS320C64X_INS_SAT = 97
+TMS320C64X_INS_SET = 98
+TMS320C64X_INS_SHFL = 99
+TMS320C64X_INS_SHL = 100
+TMS320C64X_INS_SHLMB = 101
+TMS320C64X_INS_SHR = 102
+TMS320C64X_INS_SHR2 = 103
+TMS320C64X_INS_SHRMB = 104
+TMS320C64X_INS_SHRU = 105
+TMS320C64X_INS_SHRU2 = 106
+TMS320C64X_INS_SMPY = 107
+TMS320C64X_INS_SMPY2 = 108
+TMS320C64X_INS_SMPYH = 109
+TMS320C64X_INS_SMPYHL = 110
+TMS320C64X_INS_SMPYLH = 111
+TMS320C64X_INS_SPACK2 = 112
+TMS320C64X_INS_SPACKU4 = 113
+TMS320C64X_INS_SSHL = 114
+TMS320C64X_INS_SSHVL = 115
+TMS320C64X_INS_SSHVR = 116
+TMS320C64X_INS_SSUB = 117
+TMS320C64X_INS_STB = 118
+TMS320C64X_INS_STDW = 119
+TMS320C64X_INS_STH = 120
+TMS320C64X_INS_STNDW = 121
+TMS320C64X_INS_STNW = 122
+TMS320C64X_INS_STW = 123
+TMS320C64X_INS_SUB = 124
+TMS320C64X_INS_SUB2 = 125
+TMS320C64X_INS_SUB4 = 126
+TMS320C64X_INS_SUBAB = 127
+TMS320C64X_INS_SUBABS4 = 128
+TMS320C64X_INS_SUBAH = 129
+TMS320C64X_INS_SUBAW = 130
+TMS320C64X_INS_SUBC = 131
+TMS320C64X_INS_SUBU = 132
+TMS320C64X_INS_SWAP4 = 133
+TMS320C64X_INS_UNPKHU4 = 134
+TMS320C64X_INS_UNPKLU4 = 135
+TMS320C64X_INS_XOR = 136
+TMS320C64X_INS_XPND2 = 137
+TMS320C64X_INS_XPND4 = 138
+TMS320C64X_INS_IDLE = 139
+TMS320C64X_INS_MV = 140
+TMS320C64X_INS_NEG = 141
+TMS320C64X_INS_NOT = 142
+TMS320C64X_INS_SWAP2 = 143
+TMS320C64X_INS_ZERO = 144
+TMS320C64X_INS_ENDING = 145
+
+TMS320C64X_GRP_INVALID = 0
+TMS320C64X_GRP_JUMP = 1
+TMS320C64X_GRP_FUNIT_D = 128
+TMS320C64X_GRP_FUNIT_L = 129
+TMS320C64X_GRP_FUNIT_M = 130
+TMS320C64X_GRP_FUNIT_S = 131
+TMS320C64X_GRP_FUNIT_NO = 132
+TMS320C64X_GRP_ENDING = 133
+
+TMS320C64X_FUNIT_INVALID = 0
+TMS320C64X_FUNIT_D = 1
+TMS320C64X_FUNIT_L = 2
+TMS320C64X_FUNIT_M = 3
+TMS320C64X_FUNIT_S = 4
+TMS320C64X_FUNIT_NO = 5
diff --git a/capstone/bindings/python/capstone/wasm_const.py b/capstone/bindings/python/capstone/wasm_const.py
new file mode 100644
index 000000000..eaa078d43
--- /dev/null
+++ b/capstone/bindings/python/capstone/wasm_const.py
@@ -0,0 +1,191 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [wasm_const.py]
+
+WASM_OP_INVALID = 0
+WASM_OP_NONE = 1
+WASM_OP_INT7 = 2
+WASM_OP_VARUINT32 = 3
+WASM_OP_VARUINT64 = 4
+WASM_OP_UINT32 = 5
+WASM_OP_UINT64 = 6
+WASM_OP_IMM = 7
+WASM_OP_BRTABLE = 8
+WASM_INS_UNREACHABLE = 0x0
+WASM_INS_NOP = 0x1
+WASM_INS_BLOCK = 0x2
+WASM_INS_LOOP = 0x3
+WASM_INS_IF = 0x4
+WASM_INS_ELSE = 0x5
+WASM_INS_END = 0xb
+WASM_INS_BR = 0xc
+WASM_INS_BR_IF = 0xd
+WASM_INS_BR_TABLE = 0xe
+WASM_INS_RETURN = 0xf
+WASM_INS_CALL = 0x10
+WASM_INS_CALL_INDIRECT = 0x11
+WASM_INS_DROP = 0x1a
+WASM_INS_SELECT = 0x1b
+WASM_INS_GET_LOCAL = 0x20
+WASM_INS_SET_LOCAL = 0x21
+WASM_INS_TEE_LOCAL = 0x22
+WASM_INS_GET_GLOBAL = 0x23
+WASM_INS_SET_GLOBAL = 0x24
+WASM_INS_I32_LOAD = 0x28
+WASM_INS_I64_LOAD = 0x29
+WASM_INS_F32_LOAD = 0x2a
+WASM_INS_F64_LOAD = 0x2b
+WASM_INS_I32_LOAD8_S = 0x2c
+WASM_INS_I32_LOAD8_U = 0x2d
+WASM_INS_I32_LOAD16_S = 0x2e
+WASM_INS_I32_LOAD16_U = 0x2f
+WASM_INS_I64_LOAD8_S = 0x30
+WASM_INS_I64_LOAD8_U = 0x31
+WASM_INS_I64_LOAD16_S = 0x32
+WASM_INS_I64_LOAD16_U = 0x33
+WASM_INS_I64_LOAD32_S = 0x34
+WASM_INS_I64_LOAD32_U = 0x35
+WASM_INS_I32_STORE = 0x36
+WASM_INS_I64_STORE = 0x37
+WASM_INS_F32_STORE = 0x38
+WASM_INS_F64_STORE = 0x39
+WASM_INS_I32_STORE8 = 0x3a
+WASM_INS_I32_STORE16 = 0x3b
+WASM_INS_I64_STORE8 = 0x3c
+WASM_INS_I64_STORE16 = 0x3d
+WASM_INS_I64_STORE32 = 0x3e
+WASM_INS_CURRENT_MEMORY = 0x3f
+WASM_INS_GROW_MEMORY = 0x40
+WASM_INS_I32_CONST = 0x41
+WASM_INS_I64_CONST = 0x42
+WASM_INS_F32_CONST = 0x43
+WASM_INS_F64_CONST = 0x44
+WASM_INS_I32_EQZ = 0x45
+WASM_INS_I32_EQ = 0x46
+WASM_INS_I32_NE = 0x47
+WASM_INS_I32_LT_S = 0x48
+WASM_INS_I32_LT_U = 0x49
+WASM_INS_I32_GT_S = 0x4a
+WASM_INS_I32_GT_U = 0x4b
+WASM_INS_I32_LE_S = 0x4c
+WASM_INS_I32_LE_U = 0x4d
+WASM_INS_I32_GE_S = 0x4e
+WASM_INS_I32_GE_U = 0x4f
+WASM_INS_I64_EQZ = 0x50
+WASM_INS_I64_EQ = 0x51
+WASM_INS_I64_NE = 0x52
+WASM_INS_I64_LT_S = 0x53
+WASM_INS_I64_LT_U = 0x54
+WASM_INS_I64_GT_U = 0x56
+WASM_INS_I64_LE_S = 0x57
+WASM_INS_I64_LE_U = 0x58
+WASM_INS_I64_GE_S = 0x59
+WASM_INS_I64_GE_U = 0x5a
+WASM_INS_F32_EQ = 0x5b
+WASM_INS_F32_NE = 0x5c
+WASM_INS_F32_LT = 0x5d
+WASM_INS_F32_GT = 0x5e
+WASM_INS_F32_LE = 0x5f
+WASM_INS_F32_GE = 0x60
+WASM_INS_F64_EQ = 0x61
+WASM_INS_F64_NE = 0x62
+WASM_INS_F64_LT = 0x63
+WASM_INS_F64_GT = 0x64
+WASM_INS_F64_LE = 0x65
+WASM_INS_F64_GE = 0x66
+WASM_INS_I32_CLZ = 0x67
+WASM_INS_I32_CTZ = 0x68
+WASM_INS_I32_POPCNT = 0x69
+WASM_INS_I32_ADD = 0x6a
+WASM_INS_I32_SUB = 0x6b
+WASM_INS_I32_MUL = 0x6c
+WASM_INS_I32_DIV_S = 0x6d
+WASM_INS_I32_DIV_U = 0x6e
+WASM_INS_I32_REM_S = 0x6f
+WASM_INS_I32_REM_U = 0x70
+WASM_INS_I32_AND = 0x71
+WASM_INS_I32_OR = 0x72
+WASM_INS_I32_XOR = 0x73
+WASM_INS_I32_SHL = 0x74
+WASM_INS_I32_SHR_S = 0x75
+WASM_INS_I32_SHR_U = 0x76
+WASM_INS_I32_ROTL = 0x77
+WASM_INS_I32_ROTR = 0x78
+WASM_INS_I64_CLZ = 0x79
+WASM_INS_I64_CTZ = 0x7a
+WASM_INS_I64_POPCNT = 0x7b
+WASM_INS_I64_ADD = 0x7c
+WASM_INS_I64_SUB = 0x7d
+WASM_INS_I64_MUL = 0x7e
+WASM_INS_I64_DIV_S = 0x7f
+WASM_INS_I64_DIV_U = 0x80
+WASM_INS_I64_REM_S = 0x81
+WASM_INS_I64_REM_U = 0x82
+WASM_INS_I64_AND = 0x83
+WASM_INS_I64_OR = 0x84
+WASM_INS_I64_XOR = 0x85
+WASM_INS_I64_SHL = 0x86
+WASM_INS_I64_SHR_S = 0x87
+WASM_INS_I64_SHR_U = 0x88
+WASM_INS_I64_ROTL = 0x89
+WASM_INS_I64_ROTR = 0x8a
+WASM_INS_F32_ABS = 0x8b
+WASM_INS_F32_NEG = 0x8c
+WASM_INS_F32_CEIL = 0x8d
+WASM_INS_F32_FLOOR = 0x8e
+WASM_INS_F32_TRUNC = 0x8f
+WASM_INS_F32_NEAREST = 0x90
+WASM_INS_F32_SQRT = 0x91
+WASM_INS_F32_ADD = 0x92
+WASM_INS_F32_SUB = 0x93
+WASM_INS_F32_MUL = 0x94
+WASM_INS_F32_DIV = 0x95
+WASM_INS_F32_MIN = 0x96
+WASM_INS_F32_MAX = 0x97
+WASM_INS_F32_COPYSIGN = 0x98
+WASM_INS_F64_ABS = 0x99
+WASM_INS_F64_NEG = 0x9a
+WASM_INS_F64_CEIL = 0x9b
+WASM_INS_F64_FLOOR = 0x9c
+WASM_INS_F64_TRUNC = 0x9d
+WASM_INS_F64_NEAREST = 0x9e
+WASM_INS_F64_SQRT = 0x9f
+WASM_INS_F64_ADD = 0xa0
+WASM_INS_F64_SUB = 0xa1
+WASM_INS_F64_MUL = 0xa2
+WASM_INS_F64_DIV = 0xa3
+WASM_INS_F64_MIN = 0xa4
+WASM_INS_F64_MAX = 0xa5
+WASM_INS_F64_COPYSIGN = 0xa6
+WASM_INS_I32_WARP_I64 = 0xa7
+WASM_INS_I32_TRUNC_U_F32 = 0xa9
+WASM_INS_I32_TRUNC_S_F64 = 0xaa
+WASM_INS_I32_TRUNC_U_F64 = 0xab
+WASM_INS_I64_EXTEND_S_I32 = 0xac
+WASM_INS_I64_EXTEND_U_I32 = 0xad
+WASM_INS_I64_TRUNC_S_F32 = 0xae
+WASM_INS_I64_TRUNC_U_F32 = 0xaf
+WASM_INS_I64_TRUNC_S_F64 = 0xb0
+WASM_INS_I64_TRUNC_U_F64 = 0xb1
+WASM_INS_F32_CONVERT_S_I32 = 0xb2
+WASM_INS_F32_CONVERT_U_I32 = 0xb3
+WASM_INS_F32_CONVERT_S_I64 = 0xb4
+WASM_INS_F32_CONVERT_U_I64 = 0xb5
+WASM_INS_F32_DEMOTE_F64 = 0xb6
+WASM_INS_F64_CONVERT_S_I32 = 0xb7
+WASM_INS_F64_CONVERT_U_I32 = 0xb8
+WASM_INS_F64_CONVERT_S_I64 = 0xb9
+WASM_INS_F64_CONVERT_U_I64 = 0xba
+WASM_INS_F64_PROMOTE_F32 = 0xbb
+WASM_INS_I32_REINTERPRET_F32 = 0xbc
+WASM_INS_I64_REINTERPRET_F64 = 0xbd
+WASM_INS_F32_REINTERPRET_I32 = 0xbe
+WASM_INS_F64_REINTERPRET_I64 = 0xbf
+WASM_INS_INVALID = 512
+WASM_INS_ENDING = 513
+
+WASM_GRP_INVALID = 0
+WASM_GRP_NUMBERIC = 8
+WASM_GRP_PARAMETRIC = 9
+WASM_GRP_VARIABLE = 10
+WASM_GRP_MEMORY = 11
+WASM_GRP_CONTROL = 12
+WASM_GRP_ENDING = 13
diff --git a/capstone/bindings/python/capstone/x86.py b/capstone/bindings/python/capstone/x86.py
new file mode 100644
index 000000000..63bcd9922
--- /dev/null
+++ b/capstone/bindings/python/capstone/x86.py
@@ -0,0 +1,85 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .x86_const import *
+
+# define the API
+class X86OpMem(ctypes.Structure):
+    _fields_ = (
+        ('segment', ctypes.c_uint),
+        ('base', ctypes.c_uint),
+        ('index', ctypes.c_uint),
+        ('scale', ctypes.c_int),
+        ('disp', ctypes.c_int64),
+    )
+
+class X86OpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int64),
+        ('mem', X86OpMem),
+    )
+
+class X86Op(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', X86OpValue),
+        ('size', ctypes.c_uint8),
+        ('access', ctypes.c_uint8),
+        ('avx_bcast', ctypes.c_uint),
+        ('avx_zero_opmask', ctypes.c_bool),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsX86Encoding(ctypes.Structure):
+    _fields_ = (
+        ('modrm_offset', ctypes.c_uint8),
+        ('disp_offset', ctypes.c_uint8),
+        ('disp_size', ctypes.c_uint8),
+        ('imm_offset', ctypes.c_uint8),
+        ('imm_size', ctypes.c_uint8),
+    )
+
+class CsX86(ctypes.Structure):
+    _fields_ = (
+        ('prefix', ctypes.c_uint8 * 4),
+        ('opcode', ctypes.c_uint8 * 4),
+        ('rex', ctypes.c_uint8),
+        ('addr_size', ctypes.c_uint8),
+        ('modrm', ctypes.c_uint8),
+        ('sib', ctypes.c_uint8),
+        ('disp', ctypes.c_int64),
+        ('sib_index', ctypes.c_uint),
+        ('sib_scale', ctypes.c_int8),
+        ('sib_base', ctypes.c_uint),
+        ('xop_cc', ctypes.c_uint),
+        ('sse_cc', ctypes.c_uint),
+        ('avx_cc', ctypes.c_uint),
+        ('avx_sae', ctypes.c_bool),
+        ('avx_rm', ctypes.c_uint),
+        ('eflags', ctypes.c_uint64),
+        ('op_count', ctypes.c_uint8),
+        ('operands', X86Op * 8),
+        ('encoding', CsX86Encoding),
+    )
+
+def get_arch_info(a):
+    return (a.prefix[:], a.opcode[:], a.rex, a.addr_size, \
+            a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
+            a.sib_base, a.xop_cc, a.sse_cc, a.avx_cc, a.avx_sae, a.avx_rm, a.eflags, \
+            a.encoding.modrm_offset, a.encoding.disp_offset, a.encoding.disp_size, a.encoding.imm_offset, a.encoding.imm_size, \
+            copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/x86_const.py b/capstone/bindings/python/capstone/x86_const.py
new file mode 100644
index 000000000..a1d339635
--- /dev/null
+++ b/capstone/bindings/python/capstone/x86_const.py
@@ -0,0 +1,1989 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.py]
+
+X86_REG_INVALID = 0
+X86_REG_AH = 1
+X86_REG_AL = 2
+X86_REG_AX = 3
+X86_REG_BH = 4
+X86_REG_BL = 5
+X86_REG_BP = 6
+X86_REG_BPL = 7
+X86_REG_BX = 8
+X86_REG_CH = 9
+X86_REG_CL = 10
+X86_REG_CS = 11
+X86_REG_CX = 12
+X86_REG_DH = 13
+X86_REG_DI = 14
+X86_REG_DIL = 15
+X86_REG_DL = 16
+X86_REG_DS = 17
+X86_REG_DX = 18
+X86_REG_EAX = 19
+X86_REG_EBP = 20
+X86_REG_EBX = 21
+X86_REG_ECX = 22
+X86_REG_EDI = 23
+X86_REG_EDX = 24
+X86_REG_EFLAGS = 25
+X86_REG_EIP = 26
+X86_REG_EIZ = 27
+X86_REG_ES = 28
+X86_REG_ESI = 29
+X86_REG_ESP = 30
+X86_REG_FPSW = 31
+X86_REG_FS = 32
+X86_REG_GS = 33
+X86_REG_IP = 34
+X86_REG_RAX = 35
+X86_REG_RBP = 36
+X86_REG_RBX = 37
+X86_REG_RCX = 38
+X86_REG_RDI = 39
+X86_REG_RDX = 40
+X86_REG_RIP = 41
+X86_REG_RIZ = 42
+X86_REG_RSI = 43
+X86_REG_RSP = 44
+X86_REG_SI = 45
+X86_REG_SIL = 46
+X86_REG_SP = 47
+X86_REG_SPL = 48
+X86_REG_SS = 49
+X86_REG_CR0 = 50
+X86_REG_CR1 = 51
+X86_REG_CR2 = 52
+X86_REG_CR3 = 53
+X86_REG_CR4 = 54
+X86_REG_CR5 = 55
+X86_REG_CR6 = 56
+X86_REG_CR7 = 57
+X86_REG_CR8 = 58
+X86_REG_CR9 = 59
+X86_REG_CR10 = 60
+X86_REG_CR11 = 61
+X86_REG_CR12 = 62
+X86_REG_CR13 = 63
+X86_REG_CR14 = 64
+X86_REG_CR15 = 65
+X86_REG_DR0 = 66
+X86_REG_DR1 = 67
+X86_REG_DR2 = 68
+X86_REG_DR3 = 69
+X86_REG_DR4 = 70
+X86_REG_DR5 = 71
+X86_REG_DR6 = 72
+X86_REG_DR7 = 73
+X86_REG_DR8 = 74
+X86_REG_DR9 = 75
+X86_REG_DR10 = 76
+X86_REG_DR11 = 77
+X86_REG_DR12 = 78
+X86_REG_DR13 = 79
+X86_REG_DR14 = 80
+X86_REG_DR15 = 81
+X86_REG_FP0 = 82
+X86_REG_FP1 = 83
+X86_REG_FP2 = 84
+X86_REG_FP3 = 85
+X86_REG_FP4 = 86
+X86_REG_FP5 = 87
+X86_REG_FP6 = 88
+X86_REG_FP7 = 89
+X86_REG_K0 = 90
+X86_REG_K1 = 91
+X86_REG_K2 = 92
+X86_REG_K3 = 93
+X86_REG_K4 = 94
+X86_REG_K5 = 95
+X86_REG_K6 = 96
+X86_REG_K7 = 97
+X86_REG_MM0 = 98
+X86_REG_MM1 = 99
+X86_REG_MM2 = 100
+X86_REG_MM3 = 101
+X86_REG_MM4 = 102
+X86_REG_MM5 = 103
+X86_REG_MM6 = 104
+X86_REG_MM7 = 105
+X86_REG_R8 = 106
+X86_REG_R9 = 107
+X86_REG_R10 = 108
+X86_REG_R11 = 109
+X86_REG_R12 = 110
+X86_REG_R13 = 111
+X86_REG_R14 = 112
+X86_REG_R15 = 113
+X86_REG_ST0 = 114
+X86_REG_ST1 = 115
+X86_REG_ST2 = 116
+X86_REG_ST3 = 117
+X86_REG_ST4 = 118
+X86_REG_ST5 = 119
+X86_REG_ST6 = 120
+X86_REG_ST7 = 121
+X86_REG_XMM0 = 122
+X86_REG_XMM1 = 123
+X86_REG_XMM2 = 124
+X86_REG_XMM3 = 125
+X86_REG_XMM4 = 126
+X86_REG_XMM5 = 127
+X86_REG_XMM6 = 128
+X86_REG_XMM7 = 129
+X86_REG_XMM8 = 130
+X86_REG_XMM9 = 131
+X86_REG_XMM10 = 132
+X86_REG_XMM11 = 133
+X86_REG_XMM12 = 134
+X86_REG_XMM13 = 135
+X86_REG_XMM14 = 136
+X86_REG_XMM15 = 137
+X86_REG_XMM16 = 138
+X86_REG_XMM17 = 139
+X86_REG_XMM18 = 140
+X86_REG_XMM19 = 141
+X86_REG_XMM20 = 142
+X86_REG_XMM21 = 143
+X86_REG_XMM22 = 144
+X86_REG_XMM23 = 145
+X86_REG_XMM24 = 146
+X86_REG_XMM25 = 147
+X86_REG_XMM26 = 148
+X86_REG_XMM27 = 149
+X86_REG_XMM28 = 150
+X86_REG_XMM29 = 151
+X86_REG_XMM30 = 152
+X86_REG_XMM31 = 153
+X86_REG_YMM0 = 154
+X86_REG_YMM1 = 155
+X86_REG_YMM2 = 156
+X86_REG_YMM3 = 157
+X86_REG_YMM4 = 158
+X86_REG_YMM5 = 159
+X86_REG_YMM6 = 160
+X86_REG_YMM7 = 161
+X86_REG_YMM8 = 162
+X86_REG_YMM9 = 163
+X86_REG_YMM10 = 164
+X86_REG_YMM11 = 165
+X86_REG_YMM12 = 166
+X86_REG_YMM13 = 167
+X86_REG_YMM14 = 168
+X86_REG_YMM15 = 169
+X86_REG_YMM16 = 170
+X86_REG_YMM17 = 171
+X86_REG_YMM18 = 172
+X86_REG_YMM19 = 173
+X86_REG_YMM20 = 174
+X86_REG_YMM21 = 175
+X86_REG_YMM22 = 176
+X86_REG_YMM23 = 177
+X86_REG_YMM24 = 178
+X86_REG_YMM25 = 179
+X86_REG_YMM26 = 180
+X86_REG_YMM27 = 181
+X86_REG_YMM28 = 182
+X86_REG_YMM29 = 183
+X86_REG_YMM30 = 184
+X86_REG_YMM31 = 185
+X86_REG_ZMM0 = 186
+X86_REG_ZMM1 = 187
+X86_REG_ZMM2 = 188
+X86_REG_ZMM3 = 189
+X86_REG_ZMM4 = 190
+X86_REG_ZMM5 = 191
+X86_REG_ZMM6 = 192
+X86_REG_ZMM7 = 193
+X86_REG_ZMM8 = 194
+X86_REG_ZMM9 = 195
+X86_REG_ZMM10 = 196
+X86_REG_ZMM11 = 197
+X86_REG_ZMM12 = 198
+X86_REG_ZMM13 = 199
+X86_REG_ZMM14 = 200
+X86_REG_ZMM15 = 201
+X86_REG_ZMM16 = 202
+X86_REG_ZMM17 = 203
+X86_REG_ZMM18 = 204
+X86_REG_ZMM19 = 205
+X86_REG_ZMM20 = 206
+X86_REG_ZMM21 = 207
+X86_REG_ZMM22 = 208
+X86_REG_ZMM23 = 209
+X86_REG_ZMM24 = 210
+X86_REG_ZMM25 = 211
+X86_REG_ZMM26 = 212
+X86_REG_ZMM27 = 213
+X86_REG_ZMM28 = 214
+X86_REG_ZMM29 = 215
+X86_REG_ZMM30 = 216
+X86_REG_ZMM31 = 217
+X86_REG_R8B = 218
+X86_REG_R9B = 219
+X86_REG_R10B = 220
+X86_REG_R11B = 221
+X86_REG_R12B = 222
+X86_REG_R13B = 223
+X86_REG_R14B = 224
+X86_REG_R15B = 225
+X86_REG_R8D = 226
+X86_REG_R9D = 227
+X86_REG_R10D = 228
+X86_REG_R11D = 229
+X86_REG_R12D = 230
+X86_REG_R13D = 231
+X86_REG_R14D = 232
+X86_REG_R15D = 233
+X86_REG_R8W = 234
+X86_REG_R9W = 235
+X86_REG_R10W = 236
+X86_REG_R11W = 237
+X86_REG_R12W = 238
+X86_REG_R13W = 239
+X86_REG_R14W = 240
+X86_REG_R15W = 241
+X86_REG_BND0 = 242
+X86_REG_BND1 = 243
+X86_REG_BND2 = 244
+X86_REG_BND3 = 245
+X86_REG_ENDING = 246
+X86_EFLAGS_MODIFY_AF = 1<<0
+X86_EFLAGS_MODIFY_CF = 1<<1
+X86_EFLAGS_MODIFY_SF = 1<<2
+X86_EFLAGS_MODIFY_ZF = 1<<3
+X86_EFLAGS_MODIFY_PF = 1<<4
+X86_EFLAGS_MODIFY_OF = 1<<5
+X86_EFLAGS_MODIFY_TF = 1<<6
+X86_EFLAGS_MODIFY_IF = 1<<7
+X86_EFLAGS_MODIFY_DF = 1<<8
+X86_EFLAGS_MODIFY_NT = 1<<9
+X86_EFLAGS_MODIFY_RF = 1<<10
+X86_EFLAGS_PRIOR_OF = 1<<11
+X86_EFLAGS_PRIOR_SF = 1<<12
+X86_EFLAGS_PRIOR_ZF = 1<<13
+X86_EFLAGS_PRIOR_AF = 1<<14
+X86_EFLAGS_PRIOR_PF = 1<<15
+X86_EFLAGS_PRIOR_CF = 1<<16
+X86_EFLAGS_PRIOR_TF = 1<<17
+X86_EFLAGS_PRIOR_IF = 1<<18
+X86_EFLAGS_PRIOR_DF = 1<<19
+X86_EFLAGS_PRIOR_NT = 1<<20
+X86_EFLAGS_RESET_OF = 1<<21
+X86_EFLAGS_RESET_CF = 1<<22
+X86_EFLAGS_RESET_DF = 1<<23
+X86_EFLAGS_RESET_IF = 1<<24
+X86_EFLAGS_RESET_SF = 1<<25
+X86_EFLAGS_RESET_AF = 1<<26
+X86_EFLAGS_RESET_TF = 1<<27
+X86_EFLAGS_RESET_NT = 1<<28
+X86_EFLAGS_RESET_PF = 1<<29
+X86_EFLAGS_SET_CF = 1<<30
+X86_EFLAGS_SET_DF = 1<<31
+X86_EFLAGS_SET_IF = 1<<32
+X86_EFLAGS_TEST_OF = 1<<33
+X86_EFLAGS_TEST_SF = 1<<34
+X86_EFLAGS_TEST_ZF = 1<<35
+X86_EFLAGS_TEST_PF = 1<<36
+X86_EFLAGS_TEST_CF = 1<<37
+X86_EFLAGS_TEST_NT = 1<<38
+X86_EFLAGS_TEST_DF = 1<<39
+X86_EFLAGS_UNDEFINED_OF = 1<<40
+X86_EFLAGS_UNDEFINED_SF = 1<<41
+X86_EFLAGS_UNDEFINED_ZF = 1<<42
+X86_EFLAGS_UNDEFINED_PF = 1<<43
+X86_EFLAGS_UNDEFINED_AF = 1<<44
+X86_EFLAGS_UNDEFINED_CF = 1<<45
+X86_EFLAGS_RESET_RF = 1<<46
+X86_EFLAGS_TEST_RF = 1<<47
+X86_EFLAGS_TEST_IF = 1<<48
+X86_EFLAGS_TEST_TF = 1<<49
+X86_EFLAGS_TEST_AF = 1<<50
+X86_EFLAGS_RESET_ZF = 1<<51
+X86_EFLAGS_SET_OF = 1<<52
+X86_EFLAGS_SET_SF = 1<<53
+X86_EFLAGS_SET_ZF = 1<<54
+X86_EFLAGS_SET_AF = 1<<55
+X86_EFLAGS_SET_PF = 1<<56
+X86_EFLAGS_RESET_0F = 1<<57
+X86_EFLAGS_RESET_AC = 1<<58
+X86_FPU_FLAGS_MODIFY_C0 = 1<<0
+X86_FPU_FLAGS_MODIFY_C1 = 1<<1
+X86_FPU_FLAGS_MODIFY_C2 = 1<<2
+X86_FPU_FLAGS_MODIFY_C3 = 1<<3
+X86_FPU_FLAGS_RESET_C0 = 1<<4
+X86_FPU_FLAGS_RESET_C1 = 1<<5
+X86_FPU_FLAGS_RESET_C2 = 1<<6
+X86_FPU_FLAGS_RESET_C3 = 1<<7
+X86_FPU_FLAGS_SET_C0 = 1<<8
+X86_FPU_FLAGS_SET_C1 = 1<<9
+X86_FPU_FLAGS_SET_C2 = 1<<10
+X86_FPU_FLAGS_SET_C3 = 1<<11
+X86_FPU_FLAGS_UNDEFINED_C0 = 1<<12
+X86_FPU_FLAGS_UNDEFINED_C1 = 1<<13
+X86_FPU_FLAGS_UNDEFINED_C2 = 1<<14
+X86_FPU_FLAGS_UNDEFINED_C3 = 1<<15
+X86_FPU_FLAGS_TEST_C0 = 1<<16
+X86_FPU_FLAGS_TEST_C1 = 1<<17
+X86_FPU_FLAGS_TEST_C2 = 1<<18
+X86_FPU_FLAGS_TEST_C3 = 1<<19
+
+X86_OP_INVALID = 0
+X86_OP_REG = 1
+X86_OP_IMM = 2
+X86_OP_MEM = 3
+
+X86_XOP_CC_INVALID = 0
+X86_XOP_CC_LT = 1
+X86_XOP_CC_LE = 2
+X86_XOP_CC_GT = 3
+X86_XOP_CC_GE = 4
+X86_XOP_CC_EQ = 5
+X86_XOP_CC_NEQ = 6
+X86_XOP_CC_FALSE = 7
+X86_XOP_CC_TRUE = 8
+
+X86_AVX_BCAST_INVALID = 0
+X86_AVX_BCAST_2 = 1
+X86_AVX_BCAST_4 = 2
+X86_AVX_BCAST_8 = 3
+X86_AVX_BCAST_16 = 4
+
+X86_SSE_CC_INVALID = 0
+X86_SSE_CC_EQ = 1
+X86_SSE_CC_LT = 2
+X86_SSE_CC_LE = 3
+X86_SSE_CC_UNORD = 4
+X86_SSE_CC_NEQ = 5
+X86_SSE_CC_NLT = 6
+X86_SSE_CC_NLE = 7
+X86_SSE_CC_ORD = 8
+
+X86_AVX_CC_INVALID = 0
+X86_AVX_CC_EQ = 1
+X86_AVX_CC_LT = 2
+X86_AVX_CC_LE = 3
+X86_AVX_CC_UNORD = 4
+X86_AVX_CC_NEQ = 5
+X86_AVX_CC_NLT = 6
+X86_AVX_CC_NLE = 7
+X86_AVX_CC_ORD = 8
+X86_AVX_CC_EQ_UQ = 9
+X86_AVX_CC_NGE = 10
+X86_AVX_CC_NGT = 11
+X86_AVX_CC_FALSE = 12
+X86_AVX_CC_NEQ_OQ = 13
+X86_AVX_CC_GE = 14
+X86_AVX_CC_GT = 15
+X86_AVX_CC_TRUE = 16
+X86_AVX_CC_EQ_OS = 17
+X86_AVX_CC_LT_OQ = 18
+X86_AVX_CC_LE_OQ = 19
+X86_AVX_CC_UNORD_S = 20
+X86_AVX_CC_NEQ_US = 21
+X86_AVX_CC_NLT_UQ = 22
+X86_AVX_CC_NLE_UQ = 23
+X86_AVX_CC_ORD_S = 24
+X86_AVX_CC_EQ_US = 25
+X86_AVX_CC_NGE_UQ = 26
+X86_AVX_CC_NGT_UQ = 27
+X86_AVX_CC_FALSE_OS = 28
+X86_AVX_CC_NEQ_OS = 29
+X86_AVX_CC_GE_OQ = 30
+X86_AVX_CC_GT_OQ = 31
+X86_AVX_CC_TRUE_US = 32
+
+X86_AVX_RM_INVALID = 0
+X86_AVX_RM_RN = 1
+X86_AVX_RM_RD = 2
+X86_AVX_RM_RU = 3
+X86_AVX_RM_RZ = 4
+X86_PREFIX_LOCK = 0xf0
+X86_PREFIX_REP = 0xf3
+X86_PREFIX_REPE = 0xf3
+X86_PREFIX_REPNE = 0xf2
+X86_PREFIX_CS = 0x2e
+X86_PREFIX_SS = 0x36
+X86_PREFIX_DS = 0x3e
+X86_PREFIX_ES = 0x26
+X86_PREFIX_FS = 0x64
+X86_PREFIX_GS = 0x65
+X86_PREFIX_OPSIZE = 0x66
+X86_PREFIX_ADDRSIZE = 0x67
+
+X86_INS_INVALID = 0
+X86_INS_AAA = 1
+X86_INS_AAD = 2
+X86_INS_AAM = 3
+X86_INS_AAS = 4
+X86_INS_FABS = 5
+X86_INS_ADC = 6
+X86_INS_ADCX = 7
+X86_INS_ADD = 8
+X86_INS_ADDPD = 9
+X86_INS_ADDPS = 10
+X86_INS_ADDSD = 11
+X86_INS_ADDSS = 12
+X86_INS_ADDSUBPD = 13
+X86_INS_ADDSUBPS = 14
+X86_INS_FADD = 15
+X86_INS_FIADD = 16
+X86_INS_ADOX = 17
+X86_INS_AESDECLAST = 18
+X86_INS_AESDEC = 19
+X86_INS_AESENCLAST = 20
+X86_INS_AESENC = 21
+X86_INS_AESIMC = 22
+X86_INS_AESKEYGENASSIST = 23
+X86_INS_AND = 24
+X86_INS_ANDN = 25
+X86_INS_ANDNPD = 26
+X86_INS_ANDNPS = 27
+X86_INS_ANDPD = 28
+X86_INS_ANDPS = 29
+X86_INS_ARPL = 30
+X86_INS_BEXTR = 31
+X86_INS_BLCFILL = 32
+X86_INS_BLCI = 33
+X86_INS_BLCIC = 34
+X86_INS_BLCMSK = 35
+X86_INS_BLCS = 36
+X86_INS_BLENDPD = 37
+X86_INS_BLENDPS = 38
+X86_INS_BLENDVPD = 39
+X86_INS_BLENDVPS = 40
+X86_INS_BLSFILL = 41
+X86_INS_BLSI = 42
+X86_INS_BLSIC = 43
+X86_INS_BLSMSK = 44
+X86_INS_BLSR = 45
+X86_INS_BNDCL = 46
+X86_INS_BNDCN = 47
+X86_INS_BNDCU = 48
+X86_INS_BNDLDX = 49
+X86_INS_BNDMK = 50
+X86_INS_BNDMOV = 51
+X86_INS_BNDSTX = 52
+X86_INS_BOUND = 53
+X86_INS_BSF = 54
+X86_INS_BSR = 55
+X86_INS_BSWAP = 56
+X86_INS_BT = 57
+X86_INS_BTC = 58
+X86_INS_BTR = 59
+X86_INS_BTS = 60
+X86_INS_BZHI = 61
+X86_INS_CALL = 62
+X86_INS_CBW = 63
+X86_INS_CDQ = 64
+X86_INS_CDQE = 65
+X86_INS_FCHS = 66
+X86_INS_CLAC = 67
+X86_INS_CLC = 68
+X86_INS_CLD = 69
+X86_INS_CLDEMOTE = 70
+X86_INS_CLFLUSH = 71
+X86_INS_CLFLUSHOPT = 72
+X86_INS_CLGI = 73
+X86_INS_CLI = 74
+X86_INS_CLRSSBSY = 75
+X86_INS_CLTS = 76
+X86_INS_CLWB = 77
+X86_INS_CLZERO = 78
+X86_INS_CMC = 79
+X86_INS_CMOVA = 80
+X86_INS_CMOVAE = 81
+X86_INS_CMOVB = 82
+X86_INS_CMOVBE = 83
+X86_INS_FCMOVBE = 84
+X86_INS_FCMOVB = 85
+X86_INS_CMOVE = 86
+X86_INS_FCMOVE = 87
+X86_INS_CMOVG = 88
+X86_INS_CMOVGE = 89
+X86_INS_CMOVL = 90
+X86_INS_CMOVLE = 91
+X86_INS_FCMOVNBE = 92
+X86_INS_FCMOVNB = 93
+X86_INS_CMOVNE = 94
+X86_INS_FCMOVNE = 95
+X86_INS_CMOVNO = 96
+X86_INS_CMOVNP = 97
+X86_INS_FCMOVNU = 98
+X86_INS_FCMOVNP = 99
+X86_INS_CMOVNS = 100
+X86_INS_CMOVO = 101
+X86_INS_CMOVP = 102
+X86_INS_FCMOVU = 103
+X86_INS_CMOVS = 104
+X86_INS_CMP = 105
+X86_INS_CMPPD = 106
+X86_INS_CMPPS = 107
+X86_INS_CMPSB = 108
+X86_INS_CMPSD = 109
+X86_INS_CMPSQ = 110
+X86_INS_CMPSS = 111
+X86_INS_CMPSW = 112
+X86_INS_CMPXCHG16B = 113
+X86_INS_CMPXCHG = 114
+X86_INS_CMPXCHG8B = 115
+X86_INS_COMISD = 116
+X86_INS_COMISS = 117
+X86_INS_FCOMP = 118
+X86_INS_FCOMPI = 119
+X86_INS_FCOMI = 120
+X86_INS_FCOM = 121
+X86_INS_FCOS = 122
+X86_INS_CPUID = 123
+X86_INS_CQO = 124
+X86_INS_CRC32 = 125
+X86_INS_CVTDQ2PD = 126
+X86_INS_CVTDQ2PS = 127
+X86_INS_CVTPD2DQ = 128
+X86_INS_CVTPD2PS = 129
+X86_INS_CVTPS2DQ = 130
+X86_INS_CVTPS2PD = 131
+X86_INS_CVTSD2SI = 132
+X86_INS_CVTSD2SS = 133
+X86_INS_CVTSI2SD = 134
+X86_INS_CVTSI2SS = 135
+X86_INS_CVTSS2SD = 136
+X86_INS_CVTSS2SI = 137
+X86_INS_CVTTPD2DQ = 138
+X86_INS_CVTTPS2DQ = 139
+X86_INS_CVTTSD2SI = 140
+X86_INS_CVTTSS2SI = 141
+X86_INS_CWD = 142
+X86_INS_CWDE = 143
+X86_INS_DAA = 144
+X86_INS_DAS = 145
+X86_INS_DATA16 = 146
+X86_INS_DEC = 147
+X86_INS_DIV = 148
+X86_INS_DIVPD = 149
+X86_INS_DIVPS = 150
+X86_INS_FDIVR = 151
+X86_INS_FIDIVR = 152
+X86_INS_FDIVRP = 153
+X86_INS_DIVSD = 154
+X86_INS_DIVSS = 155
+X86_INS_FDIV = 156
+X86_INS_FIDIV = 157
+X86_INS_FDIVP = 158
+X86_INS_DPPD = 159
+X86_INS_DPPS = 160
+X86_INS_ENCLS = 161
+X86_INS_ENCLU = 162
+X86_INS_ENCLV = 163
+X86_INS_ENDBR32 = 164
+X86_INS_ENDBR64 = 165
+X86_INS_ENTER = 166
+X86_INS_EXTRACTPS = 167
+X86_INS_EXTRQ = 168
+X86_INS_F2XM1 = 169
+X86_INS_LCALL = 170
+X86_INS_LJMP = 171
+X86_INS_JMP = 172
+X86_INS_FBLD = 173
+X86_INS_FBSTP = 174
+X86_INS_FCOMPP = 175
+X86_INS_FDECSTP = 176
+X86_INS_FDISI8087_NOP = 177
+X86_INS_FEMMS = 178
+X86_INS_FENI8087_NOP = 179
+X86_INS_FFREE = 180
+X86_INS_FFREEP = 181
+X86_INS_FICOM = 182
+X86_INS_FICOMP = 183
+X86_INS_FINCSTP = 184
+X86_INS_FLDCW = 185
+X86_INS_FLDENV = 186
+X86_INS_FLDL2E = 187
+X86_INS_FLDL2T = 188
+X86_INS_FLDLG2 = 189
+X86_INS_FLDLN2 = 190
+X86_INS_FLDPI = 191
+X86_INS_FNCLEX = 192
+X86_INS_FNINIT = 193
+X86_INS_FNOP = 194
+X86_INS_FNSTCW = 195
+X86_INS_FNSTSW = 196
+X86_INS_FPATAN = 197
+X86_INS_FSTPNCE = 198
+X86_INS_FPREM = 199
+X86_INS_FPREM1 = 200
+X86_INS_FPTAN = 201
+X86_INS_FRNDINT = 202
+X86_INS_FRSTOR = 203
+X86_INS_FNSAVE = 204
+X86_INS_FSCALE = 205
+X86_INS_FSETPM = 206
+X86_INS_FSINCOS = 207
+X86_INS_FNSTENV = 208
+X86_INS_FXAM = 209
+X86_INS_FXRSTOR = 210
+X86_INS_FXRSTOR64 = 211
+X86_INS_FXSAVE = 212
+X86_INS_FXSAVE64 = 213
+X86_INS_FXTRACT = 214
+X86_INS_FYL2X = 215
+X86_INS_FYL2XP1 = 216
+X86_INS_GETSEC = 217
+X86_INS_GF2P8AFFINEINVQB = 218
+X86_INS_GF2P8AFFINEQB = 219
+X86_INS_GF2P8MULB = 220
+X86_INS_HADDPD = 221
+X86_INS_HADDPS = 222
+X86_INS_HLT = 223
+X86_INS_HSUBPD = 224
+X86_INS_HSUBPS = 225
+X86_INS_IDIV = 226
+X86_INS_FILD = 227
+X86_INS_IMUL = 228
+X86_INS_IN = 229
+X86_INS_INC = 230
+X86_INS_INCSSPD = 231
+X86_INS_INCSSPQ = 232
+X86_INS_INSB = 233
+X86_INS_INSERTPS = 234
+X86_INS_INSERTQ = 235
+X86_INS_INSD = 236
+X86_INS_INSW = 237
+X86_INS_INT = 238
+X86_INS_INT1 = 239
+X86_INS_INT3 = 240
+X86_INS_INTO = 241
+X86_INS_INVD = 242
+X86_INS_INVEPT = 243
+X86_INS_INVLPG = 244
+X86_INS_INVLPGA = 245
+X86_INS_INVPCID = 246
+X86_INS_INVVPID = 247
+X86_INS_IRET = 248
+X86_INS_IRETD = 249
+X86_INS_IRETQ = 250
+X86_INS_FISTTP = 251
+X86_INS_FIST = 252
+X86_INS_FISTP = 253
+X86_INS_JAE = 254
+X86_INS_JA = 255
+X86_INS_JBE = 256
+X86_INS_JB = 257
+X86_INS_JCXZ = 258
+X86_INS_JECXZ = 259
+X86_INS_JE = 260
+X86_INS_JGE = 261
+X86_INS_JG = 262
+X86_INS_JLE = 263
+X86_INS_JL = 264
+X86_INS_JNE = 265
+X86_INS_JNO = 266
+X86_INS_JNP = 267
+X86_INS_JNS = 268
+X86_INS_JO = 269
+X86_INS_JP = 270
+X86_INS_JRCXZ = 271
+X86_INS_JS = 272
+X86_INS_KADDB = 273
+X86_INS_KADDD = 274
+X86_INS_KADDQ = 275
+X86_INS_KADDW = 276
+X86_INS_KANDB = 277
+X86_INS_KANDD = 278
+X86_INS_KANDNB = 279
+X86_INS_KANDND = 280
+X86_INS_KANDNQ = 281
+X86_INS_KANDNW = 282
+X86_INS_KANDQ = 283
+X86_INS_KANDW = 284
+X86_INS_KMOVB = 285
+X86_INS_KMOVD = 286
+X86_INS_KMOVQ = 287
+X86_INS_KMOVW = 288
+X86_INS_KNOTB = 289
+X86_INS_KNOTD = 290
+X86_INS_KNOTQ = 291
+X86_INS_KNOTW = 292
+X86_INS_KORB = 293
+X86_INS_KORD = 294
+X86_INS_KORQ = 295
+X86_INS_KORTESTB = 296
+X86_INS_KORTESTD = 297
+X86_INS_KORTESTQ = 298
+X86_INS_KORTESTW = 299
+X86_INS_KORW = 300
+X86_INS_KSHIFTLB = 301
+X86_INS_KSHIFTLD = 302
+X86_INS_KSHIFTLQ = 303
+X86_INS_KSHIFTLW = 304
+X86_INS_KSHIFTRB = 305
+X86_INS_KSHIFTRD = 306
+X86_INS_KSHIFTRQ = 307
+X86_INS_KSHIFTRW = 308
+X86_INS_KTESTB = 309
+X86_INS_KTESTD = 310
+X86_INS_KTESTQ = 311
+X86_INS_KTESTW = 312
+X86_INS_KUNPCKBW = 313
+X86_INS_KUNPCKDQ = 314
+X86_INS_KUNPCKWD = 315
+X86_INS_KXNORB = 316
+X86_INS_KXNORD = 317
+X86_INS_KXNORQ = 318
+X86_INS_KXNORW = 319
+X86_INS_KXORB = 320
+X86_INS_KXORD = 321
+X86_INS_KXORQ = 322
+X86_INS_KXORW = 323
+X86_INS_LAHF = 324
+X86_INS_LAR = 325
+X86_INS_LDDQU = 326
+X86_INS_LDMXCSR = 327
+X86_INS_LDS = 328
+X86_INS_FLDZ = 329
+X86_INS_FLD1 = 330
+X86_INS_FLD = 331
+X86_INS_LEA = 332
+X86_INS_LEAVE = 333
+X86_INS_LES = 334
+X86_INS_LFENCE = 335
+X86_INS_LFS = 336
+X86_INS_LGDT = 337
+X86_INS_LGS = 338
+X86_INS_LIDT = 339
+X86_INS_LLDT = 340
+X86_INS_LLWPCB = 341
+X86_INS_LMSW = 342
+X86_INS_LOCK = 343
+X86_INS_LODSB = 344
+X86_INS_LODSD = 345
+X86_INS_LODSQ = 346
+X86_INS_LODSW = 347
+X86_INS_LOOP = 348
+X86_INS_LOOPE = 349
+X86_INS_LOOPNE = 350
+X86_INS_RETF = 351
+X86_INS_RETFQ = 352
+X86_INS_LSL = 353
+X86_INS_LSS = 354
+X86_INS_LTR = 355
+X86_INS_LWPINS = 356
+X86_INS_LWPVAL = 357
+X86_INS_LZCNT = 358
+X86_INS_MASKMOVDQU = 359
+X86_INS_MAXPD = 360
+X86_INS_MAXPS = 361
+X86_INS_MAXSD = 362
+X86_INS_MAXSS = 363
+X86_INS_MFENCE = 364
+X86_INS_MINPD = 365
+X86_INS_MINPS = 366
+X86_INS_MINSD = 367
+X86_INS_MINSS = 368
+X86_INS_CVTPD2PI = 369
+X86_INS_CVTPI2PD = 370
+X86_INS_CVTPI2PS = 371
+X86_INS_CVTPS2PI = 372
+X86_INS_CVTTPD2PI = 373
+X86_INS_CVTTPS2PI = 374
+X86_INS_EMMS = 375
+X86_INS_MASKMOVQ = 376
+X86_INS_MOVD = 377
+X86_INS_MOVQ = 378
+X86_INS_MOVDQ2Q = 379
+X86_INS_MOVNTQ = 380
+X86_INS_MOVQ2DQ = 381
+X86_INS_PABSB = 382
+X86_INS_PABSD = 383
+X86_INS_PABSW = 384
+X86_INS_PACKSSDW = 385
+X86_INS_PACKSSWB = 386
+X86_INS_PACKUSWB = 387
+X86_INS_PADDB = 388
+X86_INS_PADDD = 389
+X86_INS_PADDQ = 390
+X86_INS_PADDSB = 391
+X86_INS_PADDSW = 392
+X86_INS_PADDUSB = 393
+X86_INS_PADDUSW = 394
+X86_INS_PADDW = 395
+X86_INS_PALIGNR = 396
+X86_INS_PANDN = 397
+X86_INS_PAND = 398
+X86_INS_PAVGB = 399
+X86_INS_PAVGW = 400
+X86_INS_PCMPEQB = 401
+X86_INS_PCMPEQD = 402
+X86_INS_PCMPEQW = 403
+X86_INS_PCMPGTB = 404
+X86_INS_PCMPGTD = 405
+X86_INS_PCMPGTW = 406
+X86_INS_PEXTRW = 407
+X86_INS_PHADDD = 408
+X86_INS_PHADDSW = 409
+X86_INS_PHADDW = 410
+X86_INS_PHSUBD = 411
+X86_INS_PHSUBSW = 412
+X86_INS_PHSUBW = 413
+X86_INS_PINSRW = 414
+X86_INS_PMADDUBSW = 415
+X86_INS_PMADDWD = 416
+X86_INS_PMAXSW = 417
+X86_INS_PMAXUB = 418
+X86_INS_PMINSW = 419
+X86_INS_PMINUB = 420
+X86_INS_PMOVMSKB = 421
+X86_INS_PMULHRSW = 422
+X86_INS_PMULHUW = 423
+X86_INS_PMULHW = 424
+X86_INS_PMULLW = 425
+X86_INS_PMULUDQ = 426
+X86_INS_POR = 427
+X86_INS_PSADBW = 428
+X86_INS_PSHUFB = 429
+X86_INS_PSHUFW = 430
+X86_INS_PSIGNB = 431
+X86_INS_PSIGND = 432
+X86_INS_PSIGNW = 433
+X86_INS_PSLLD = 434
+X86_INS_PSLLQ = 435
+X86_INS_PSLLW = 436
+X86_INS_PSRAD = 437
+X86_INS_PSRAW = 438
+X86_INS_PSRLD = 439
+X86_INS_PSRLQ = 440
+X86_INS_PSRLW = 441
+X86_INS_PSUBB = 442
+X86_INS_PSUBD = 443
+X86_INS_PSUBQ = 444
+X86_INS_PSUBSB = 445
+X86_INS_PSUBSW = 446
+X86_INS_PSUBUSB = 447
+X86_INS_PSUBUSW = 448
+X86_INS_PSUBW = 449
+X86_INS_PUNPCKHBW = 450
+X86_INS_PUNPCKHDQ = 451
+X86_INS_PUNPCKHWD = 452
+X86_INS_PUNPCKLBW = 453
+X86_INS_PUNPCKLDQ = 454
+X86_INS_PUNPCKLWD = 455
+X86_INS_PXOR = 456
+X86_INS_MONITORX = 457
+X86_INS_MONITOR = 458
+X86_INS_MONTMUL = 459
+X86_INS_MOV = 460
+X86_INS_MOVABS = 461
+X86_INS_MOVAPD = 462
+X86_INS_MOVAPS = 463
+X86_INS_MOVBE = 464
+X86_INS_MOVDDUP = 465
+X86_INS_MOVDIR64B = 466
+X86_INS_MOVDIRI = 467
+X86_INS_MOVDQA = 468
+X86_INS_MOVDQU = 469
+X86_INS_MOVHLPS = 470
+X86_INS_MOVHPD = 471
+X86_INS_MOVHPS = 472
+X86_INS_MOVLHPS = 473
+X86_INS_MOVLPD = 474
+X86_INS_MOVLPS = 475
+X86_INS_MOVMSKPD = 476
+X86_INS_MOVMSKPS = 477
+X86_INS_MOVNTDQA = 478
+X86_INS_MOVNTDQ = 479
+X86_INS_MOVNTI = 480
+X86_INS_MOVNTPD = 481
+X86_INS_MOVNTPS = 482
+X86_INS_MOVNTSD = 483
+X86_INS_MOVNTSS = 484
+X86_INS_MOVSB = 485
+X86_INS_MOVSD = 486
+X86_INS_MOVSHDUP = 487
+X86_INS_MOVSLDUP = 488
+X86_INS_MOVSQ = 489
+X86_INS_MOVSS = 490
+X86_INS_MOVSW = 491
+X86_INS_MOVSX = 492
+X86_INS_MOVSXD = 493
+X86_INS_MOVUPD = 494
+X86_INS_MOVUPS = 495
+X86_INS_MOVZX = 496
+X86_INS_MPSADBW = 497
+X86_INS_MUL = 498
+X86_INS_MULPD = 499
+X86_INS_MULPS = 500
+X86_INS_MULSD = 501
+X86_INS_MULSS = 502
+X86_INS_MULX = 503
+X86_INS_FMUL = 504
+X86_INS_FIMUL = 505
+X86_INS_FMULP = 506
+X86_INS_MWAITX = 507
+X86_INS_MWAIT = 508
+X86_INS_NEG = 509
+X86_INS_NOP = 510
+X86_INS_NOT = 511
+X86_INS_OR = 512
+X86_INS_ORPD = 513
+X86_INS_ORPS = 514
+X86_INS_OUT = 515
+X86_INS_OUTSB = 516
+X86_INS_OUTSD = 517
+X86_INS_OUTSW = 518
+X86_INS_PACKUSDW = 519
+X86_INS_PAUSE = 520
+X86_INS_PAVGUSB = 521
+X86_INS_PBLENDVB = 522
+X86_INS_PBLENDW = 523
+X86_INS_PCLMULQDQ = 524
+X86_INS_PCMPEQQ = 525
+X86_INS_PCMPESTRI = 526
+X86_INS_PCMPESTRM = 527
+X86_INS_PCMPGTQ = 528
+X86_INS_PCMPISTRI = 529
+X86_INS_PCMPISTRM = 530
+X86_INS_PCONFIG = 531
+X86_INS_PDEP = 532
+X86_INS_PEXT = 533
+X86_INS_PEXTRB = 534
+X86_INS_PEXTRD = 535
+X86_INS_PEXTRQ = 536
+X86_INS_PF2ID = 537
+X86_INS_PF2IW = 538
+X86_INS_PFACC = 539
+X86_INS_PFADD = 540
+X86_INS_PFCMPEQ = 541
+X86_INS_PFCMPGE = 542
+X86_INS_PFCMPGT = 543
+X86_INS_PFMAX = 544
+X86_INS_PFMIN = 545
+X86_INS_PFMUL = 546
+X86_INS_PFNACC = 547
+X86_INS_PFPNACC = 548
+X86_INS_PFRCPIT1 = 549
+X86_INS_PFRCPIT2 = 550
+X86_INS_PFRCP = 551
+X86_INS_PFRSQIT1 = 552
+X86_INS_PFRSQRT = 553
+X86_INS_PFSUBR = 554
+X86_INS_PFSUB = 555
+X86_INS_PHMINPOSUW = 556
+X86_INS_PI2FD = 557
+X86_INS_PI2FW = 558
+X86_INS_PINSRB = 559
+X86_INS_PINSRD = 560
+X86_INS_PINSRQ = 561
+X86_INS_PMAXSB = 562
+X86_INS_PMAXSD = 563
+X86_INS_PMAXUD = 564
+X86_INS_PMAXUW = 565
+X86_INS_PMINSB = 566
+X86_INS_PMINSD = 567
+X86_INS_PMINUD = 568
+X86_INS_PMINUW = 569
+X86_INS_PMOVSXBD = 570
+X86_INS_PMOVSXBQ = 571
+X86_INS_PMOVSXBW = 572
+X86_INS_PMOVSXDQ = 573
+X86_INS_PMOVSXWD = 574
+X86_INS_PMOVSXWQ = 575
+X86_INS_PMOVZXBD = 576
+X86_INS_PMOVZXBQ = 577
+X86_INS_PMOVZXBW = 578
+X86_INS_PMOVZXDQ = 579
+X86_INS_PMOVZXWD = 580
+X86_INS_PMOVZXWQ = 581
+X86_INS_PMULDQ = 582
+X86_INS_PMULHRW = 583
+X86_INS_PMULLD = 584
+X86_INS_POP = 585
+X86_INS_POPAW = 586
+X86_INS_POPAL = 587
+X86_INS_POPCNT = 588
+X86_INS_POPF = 589
+X86_INS_POPFD = 590
+X86_INS_POPFQ = 591
+X86_INS_PREFETCH = 592
+X86_INS_PREFETCHNTA = 593
+X86_INS_PREFETCHT0 = 594
+X86_INS_PREFETCHT1 = 595
+X86_INS_PREFETCHT2 = 596
+X86_INS_PREFETCHW = 597
+X86_INS_PREFETCHWT1 = 598
+X86_INS_PSHUFD = 599
+X86_INS_PSHUFHW = 600
+X86_INS_PSHUFLW = 601
+X86_INS_PSLLDQ = 602
+X86_INS_PSRLDQ = 603
+X86_INS_PSWAPD = 604
+X86_INS_PTEST = 605
+X86_INS_PTWRITE = 606
+X86_INS_PUNPCKHQDQ = 607
+X86_INS_PUNPCKLQDQ = 608
+X86_INS_PUSH = 609
+X86_INS_PUSHAW = 610
+X86_INS_PUSHAL = 611
+X86_INS_PUSHF = 612
+X86_INS_PUSHFD = 613
+X86_INS_PUSHFQ = 614
+X86_INS_RCL = 615
+X86_INS_RCPPS = 616
+X86_INS_RCPSS = 617
+X86_INS_RCR = 618
+X86_INS_RDFSBASE = 619
+X86_INS_RDGSBASE = 620
+X86_INS_RDMSR = 621
+X86_INS_RDPID = 622
+X86_INS_RDPKRU = 623
+X86_INS_RDPMC = 624
+X86_INS_RDRAND = 625
+X86_INS_RDSEED = 626
+X86_INS_RDSSPD = 627
+X86_INS_RDSSPQ = 628
+X86_INS_RDTSC = 629
+X86_INS_RDTSCP = 630
+X86_INS_REPNE = 631
+X86_INS_REP = 632
+X86_INS_RET = 633
+X86_INS_REX64 = 634
+X86_INS_ROL = 635
+X86_INS_ROR = 636
+X86_INS_RORX = 637
+X86_INS_ROUNDPD = 638
+X86_INS_ROUNDPS = 639
+X86_INS_ROUNDSD = 640
+X86_INS_ROUNDSS = 641
+X86_INS_RSM = 642
+X86_INS_RSQRTPS = 643
+X86_INS_RSQRTSS = 644
+X86_INS_RSTORSSP = 645
+X86_INS_SAHF = 646
+X86_INS_SAL = 647
+X86_INS_SALC = 648
+X86_INS_SAR = 649
+X86_INS_SARX = 650
+X86_INS_SAVEPREVSSP = 651
+X86_INS_SBB = 652
+X86_INS_SCASB = 653
+X86_INS_SCASD = 654
+X86_INS_SCASQ = 655
+X86_INS_SCASW = 656
+X86_INS_SETAE = 657
+X86_INS_SETA = 658
+X86_INS_SETBE = 659
+X86_INS_SETB = 660
+X86_INS_SETE = 661
+X86_INS_SETGE = 662
+X86_INS_SETG = 663
+X86_INS_SETLE = 664
+X86_INS_SETL = 665
+X86_INS_SETNE = 666
+X86_INS_SETNO = 667
+X86_INS_SETNP = 668
+X86_INS_SETNS = 669
+X86_INS_SETO = 670
+X86_INS_SETP = 671
+X86_INS_SETSSBSY = 672
+X86_INS_SETS = 673
+X86_INS_SFENCE = 674
+X86_INS_SGDT = 675
+X86_INS_SHA1MSG1 = 676
+X86_INS_SHA1MSG2 = 677
+X86_INS_SHA1NEXTE = 678
+X86_INS_SHA1RNDS4 = 679
+X86_INS_SHA256MSG1 = 680
+X86_INS_SHA256MSG2 = 681
+X86_INS_SHA256RNDS2 = 682
+X86_INS_SHL = 683
+X86_INS_SHLD = 684
+X86_INS_SHLX = 685
+X86_INS_SHR = 686
+X86_INS_SHRD = 687
+X86_INS_SHRX = 688
+X86_INS_SHUFPD = 689
+X86_INS_SHUFPS = 690
+X86_INS_SIDT = 691
+X86_INS_FSIN = 692
+X86_INS_SKINIT = 693
+X86_INS_SLDT = 694
+X86_INS_SLWPCB = 695
+X86_INS_SMSW = 696
+X86_INS_SQRTPD = 697
+X86_INS_SQRTPS = 698
+X86_INS_SQRTSD = 699
+X86_INS_SQRTSS = 700
+X86_INS_FSQRT = 701
+X86_INS_STAC = 702
+X86_INS_STC = 703
+X86_INS_STD = 704
+X86_INS_STGI = 705
+X86_INS_STI = 706
+X86_INS_STMXCSR = 707
+X86_INS_STOSB = 708
+X86_INS_STOSD = 709
+X86_INS_STOSQ = 710
+X86_INS_STOSW = 711
+X86_INS_STR = 712
+X86_INS_FST = 713
+X86_INS_FSTP = 714
+X86_INS_SUB = 715
+X86_INS_SUBPD = 716
+X86_INS_SUBPS = 717
+X86_INS_FSUBR = 718
+X86_INS_FISUBR = 719
+X86_INS_FSUBRP = 720
+X86_INS_SUBSD = 721
+X86_INS_SUBSS = 722
+X86_INS_FSUB = 723
+X86_INS_FISUB = 724
+X86_INS_FSUBP = 725
+X86_INS_SWAPGS = 726
+X86_INS_SYSCALL = 727
+X86_INS_SYSENTER = 728
+X86_INS_SYSEXIT = 729
+X86_INS_SYSEXITQ = 730
+X86_INS_SYSRET = 731
+X86_INS_SYSRETQ = 732
+X86_INS_T1MSKC = 733
+X86_INS_TEST = 734
+X86_INS_TPAUSE = 735
+X86_INS_FTST = 736
+X86_INS_TZCNT = 737
+X86_INS_TZMSK = 738
+X86_INS_UCOMISD = 739
+X86_INS_UCOMISS = 740
+X86_INS_FUCOMPI = 741
+X86_INS_FUCOMI = 742
+X86_INS_FUCOMPP = 743
+X86_INS_FUCOMP = 744
+X86_INS_FUCOM = 745
+X86_INS_UD0 = 746
+X86_INS_UD1 = 747
+X86_INS_UD2 = 748
+X86_INS_UMONITOR = 749
+X86_INS_UMWAIT = 750
+X86_INS_UNPCKHPD = 751
+X86_INS_UNPCKHPS = 752
+X86_INS_UNPCKLPD = 753
+X86_INS_UNPCKLPS = 754
+X86_INS_V4FMADDPS = 755
+X86_INS_V4FMADDSS = 756
+X86_INS_V4FNMADDPS = 757
+X86_INS_V4FNMADDSS = 758
+X86_INS_VADDPD = 759
+X86_INS_VADDPS = 760
+X86_INS_VADDSD = 761
+X86_INS_VADDSS = 762
+X86_INS_VADDSUBPD = 763
+X86_INS_VADDSUBPS = 764
+X86_INS_VAESDECLAST = 765
+X86_INS_VAESDEC = 766
+X86_INS_VAESENCLAST = 767
+X86_INS_VAESENC = 768
+X86_INS_VAESIMC = 769
+X86_INS_VAESKEYGENASSIST = 770
+X86_INS_VALIGND = 771
+X86_INS_VALIGNQ = 772
+X86_INS_VANDNPD = 773
+X86_INS_VANDNPS = 774
+X86_INS_VANDPD = 775
+X86_INS_VANDPS = 776
+X86_INS_VBLENDMPD = 777
+X86_INS_VBLENDMPS = 778
+X86_INS_VBLENDPD = 779
+X86_INS_VBLENDPS = 780
+X86_INS_VBLENDVPD = 781
+X86_INS_VBLENDVPS = 782
+X86_INS_VBROADCASTF128 = 783
+X86_INS_VBROADCASTF32X2 = 784
+X86_INS_VBROADCASTF32X4 = 785
+X86_INS_VBROADCASTF32X8 = 786
+X86_INS_VBROADCASTF64X2 = 787
+X86_INS_VBROADCASTF64X4 = 788
+X86_INS_VBROADCASTI128 = 789
+X86_INS_VBROADCASTI32X2 = 790
+X86_INS_VBROADCASTI32X4 = 791
+X86_INS_VBROADCASTI32X8 = 792
+X86_INS_VBROADCASTI64X2 = 793
+X86_INS_VBROADCASTI64X4 = 794
+X86_INS_VBROADCASTSD = 795
+X86_INS_VBROADCASTSS = 796
+X86_INS_VCMP = 797
+X86_INS_VCMPPD = 798
+X86_INS_VCMPPS = 799
+X86_INS_VCMPSD = 800
+X86_INS_VCMPSS = 801
+X86_INS_VCOMISD = 802
+X86_INS_VCOMISS = 803
+X86_INS_VCOMPRESSPD = 804
+X86_INS_VCOMPRESSPS = 805
+X86_INS_VCVTDQ2PD = 806
+X86_INS_VCVTDQ2PS = 807
+X86_INS_VCVTPD2DQ = 808
+X86_INS_VCVTPD2PS = 809
+X86_INS_VCVTPD2QQ = 810
+X86_INS_VCVTPD2UDQ = 811
+X86_INS_VCVTPD2UQQ = 812
+X86_INS_VCVTPH2PS = 813
+X86_INS_VCVTPS2DQ = 814
+X86_INS_VCVTPS2PD = 815
+X86_INS_VCVTPS2PH = 816
+X86_INS_VCVTPS2QQ = 817
+X86_INS_VCVTPS2UDQ = 818
+X86_INS_VCVTPS2UQQ = 819
+X86_INS_VCVTQQ2PD = 820
+X86_INS_VCVTQQ2PS = 821
+X86_INS_VCVTSD2SI = 822
+X86_INS_VCVTSD2SS = 823
+X86_INS_VCVTSD2USI = 824
+X86_INS_VCVTSI2SD = 825
+X86_INS_VCVTSI2SS = 826
+X86_INS_VCVTSS2SD = 827
+X86_INS_VCVTSS2SI = 828
+X86_INS_VCVTSS2USI = 829
+X86_INS_VCVTTPD2DQ = 830
+X86_INS_VCVTTPD2QQ = 831
+X86_INS_VCVTTPD2UDQ = 832
+X86_INS_VCVTTPD2UQQ = 833
+X86_INS_VCVTTPS2DQ = 834
+X86_INS_VCVTTPS2QQ = 835
+X86_INS_VCVTTPS2UDQ = 836
+X86_INS_VCVTTPS2UQQ = 837
+X86_INS_VCVTTSD2SI = 838
+X86_INS_VCVTTSD2USI = 839
+X86_INS_VCVTTSS2SI = 840
+X86_INS_VCVTTSS2USI = 841
+X86_INS_VCVTUDQ2PD = 842
+X86_INS_VCVTUDQ2PS = 843
+X86_INS_VCVTUQQ2PD = 844
+X86_INS_VCVTUQQ2PS = 845
+X86_INS_VCVTUSI2SD = 846
+X86_INS_VCVTUSI2SS = 847
+X86_INS_VDBPSADBW = 848
+X86_INS_VDIVPD = 849
+X86_INS_VDIVPS = 850
+X86_INS_VDIVSD = 851
+X86_INS_VDIVSS = 852
+X86_INS_VDPPD = 853
+X86_INS_VDPPS = 854
+X86_INS_VERR = 855
+X86_INS_VERW = 856
+X86_INS_VEXP2PD = 857
+X86_INS_VEXP2PS = 858
+X86_INS_VEXPANDPD = 859
+X86_INS_VEXPANDPS = 860
+X86_INS_VEXTRACTF128 = 861
+X86_INS_VEXTRACTF32X4 = 862
+X86_INS_VEXTRACTF32X8 = 863
+X86_INS_VEXTRACTF64X2 = 864
+X86_INS_VEXTRACTF64X4 = 865
+X86_INS_VEXTRACTI128 = 866
+X86_INS_VEXTRACTI32X4 = 867
+X86_INS_VEXTRACTI32X8 = 868
+X86_INS_VEXTRACTI64X2 = 869
+X86_INS_VEXTRACTI64X4 = 870
+X86_INS_VEXTRACTPS = 871
+X86_INS_VFIXUPIMMPD = 872
+X86_INS_VFIXUPIMMPS = 873
+X86_INS_VFIXUPIMMSD = 874
+X86_INS_VFIXUPIMMSS = 875
+X86_INS_VFMADD132PD = 876
+X86_INS_VFMADD132PS = 877
+X86_INS_VFMADD132SD = 878
+X86_INS_VFMADD132SS = 879
+X86_INS_VFMADD213PD = 880
+X86_INS_VFMADD213PS = 881
+X86_INS_VFMADD213SD = 882
+X86_INS_VFMADD213SS = 883
+X86_INS_VFMADD231PD = 884
+X86_INS_VFMADD231PS = 885
+X86_INS_VFMADD231SD = 886
+X86_INS_VFMADD231SS = 887
+X86_INS_VFMADDPD = 888
+X86_INS_VFMADDPS = 889
+X86_INS_VFMADDSD = 890
+X86_INS_VFMADDSS = 891
+X86_INS_VFMADDSUB132PD = 892
+X86_INS_VFMADDSUB132PS = 893
+X86_INS_VFMADDSUB213PD = 894
+X86_INS_VFMADDSUB213PS = 895
+X86_INS_VFMADDSUB231PD = 896
+X86_INS_VFMADDSUB231PS = 897
+X86_INS_VFMADDSUBPD = 898
+X86_INS_VFMADDSUBPS = 899
+X86_INS_VFMSUB132PD = 900
+X86_INS_VFMSUB132PS = 901
+X86_INS_VFMSUB132SD = 902
+X86_INS_VFMSUB132SS = 903
+X86_INS_VFMSUB213PD = 904
+X86_INS_VFMSUB213PS = 905
+X86_INS_VFMSUB213SD = 906
+X86_INS_VFMSUB213SS = 907
+X86_INS_VFMSUB231PD = 908
+X86_INS_VFMSUB231PS = 909
+X86_INS_VFMSUB231SD = 910
+X86_INS_VFMSUB231SS = 911
+X86_INS_VFMSUBADD132PD = 912
+X86_INS_VFMSUBADD132PS = 913
+X86_INS_VFMSUBADD213PD = 914
+X86_INS_VFMSUBADD213PS = 915
+X86_INS_VFMSUBADD231PD = 916
+X86_INS_VFMSUBADD231PS = 917
+X86_INS_VFMSUBADDPD = 918
+X86_INS_VFMSUBADDPS = 919
+X86_INS_VFMSUBPD = 920
+X86_INS_VFMSUBPS = 921
+X86_INS_VFMSUBSD = 922
+X86_INS_VFMSUBSS = 923
+X86_INS_VFNMADD132PD = 924
+X86_INS_VFNMADD132PS = 925
+X86_INS_VFNMADD132SD = 926
+X86_INS_VFNMADD132SS = 927
+X86_INS_VFNMADD213PD = 928
+X86_INS_VFNMADD213PS = 929
+X86_INS_VFNMADD213SD = 930
+X86_INS_VFNMADD213SS = 931
+X86_INS_VFNMADD231PD = 932
+X86_INS_VFNMADD231PS = 933
+X86_INS_VFNMADD231SD = 934
+X86_INS_VFNMADD231SS = 935
+X86_INS_VFNMADDPD = 936
+X86_INS_VFNMADDPS = 937
+X86_INS_VFNMADDSD = 938
+X86_INS_VFNMADDSS = 939
+X86_INS_VFNMSUB132PD = 940
+X86_INS_VFNMSUB132PS = 941
+X86_INS_VFNMSUB132SD = 942
+X86_INS_VFNMSUB132SS = 943
+X86_INS_VFNMSUB213PD = 944
+X86_INS_VFNMSUB213PS = 945
+X86_INS_VFNMSUB213SD = 946
+X86_INS_VFNMSUB213SS = 947
+X86_INS_VFNMSUB231PD = 948
+X86_INS_VFNMSUB231PS = 949
+X86_INS_VFNMSUB231SD = 950
+X86_INS_VFNMSUB231SS = 951
+X86_INS_VFNMSUBPD = 952
+X86_INS_VFNMSUBPS = 953
+X86_INS_VFNMSUBSD = 954
+X86_INS_VFNMSUBSS = 955
+X86_INS_VFPCLASSPD = 956
+X86_INS_VFPCLASSPS = 957
+X86_INS_VFPCLASSSD = 958
+X86_INS_VFPCLASSSS = 959
+X86_INS_VFRCZPD = 960
+X86_INS_VFRCZPS = 961
+X86_INS_VFRCZSD = 962
+X86_INS_VFRCZSS = 963
+X86_INS_VGATHERDPD = 964
+X86_INS_VGATHERDPS = 965
+X86_INS_VGATHERPF0DPD = 966
+X86_INS_VGATHERPF0DPS = 967
+X86_INS_VGATHERPF0QPD = 968
+X86_INS_VGATHERPF0QPS = 969
+X86_INS_VGATHERPF1DPD = 970
+X86_INS_VGATHERPF1DPS = 971
+X86_INS_VGATHERPF1QPD = 972
+X86_INS_VGATHERPF1QPS = 973
+X86_INS_VGATHERQPD = 974
+X86_INS_VGATHERQPS = 975
+X86_INS_VGETEXPPD = 976
+X86_INS_VGETEXPPS = 977
+X86_INS_VGETEXPSD = 978
+X86_INS_VGETEXPSS = 979
+X86_INS_VGETMANTPD = 980
+X86_INS_VGETMANTPS = 981
+X86_INS_VGETMANTSD = 982
+X86_INS_VGETMANTSS = 983
+X86_INS_VGF2P8AFFINEINVQB = 984
+X86_INS_VGF2P8AFFINEQB = 985
+X86_INS_VGF2P8MULB = 986
+X86_INS_VHADDPD = 987
+X86_INS_VHADDPS = 988
+X86_INS_VHSUBPD = 989
+X86_INS_VHSUBPS = 990
+X86_INS_VINSERTF128 = 991
+X86_INS_VINSERTF32X4 = 992
+X86_INS_VINSERTF32X8 = 993
+X86_INS_VINSERTF64X2 = 994
+X86_INS_VINSERTF64X4 = 995
+X86_INS_VINSERTI128 = 996
+X86_INS_VINSERTI32X4 = 997
+X86_INS_VINSERTI32X8 = 998
+X86_INS_VINSERTI64X2 = 999
+X86_INS_VINSERTI64X4 = 1000
+X86_INS_VINSERTPS = 1001
+X86_INS_VLDDQU = 1002
+X86_INS_VLDMXCSR = 1003
+X86_INS_VMASKMOVDQU = 1004
+X86_INS_VMASKMOVPD = 1005
+X86_INS_VMASKMOVPS = 1006
+X86_INS_VMAXPD = 1007
+X86_INS_VMAXPS = 1008
+X86_INS_VMAXSD = 1009
+X86_INS_VMAXSS = 1010
+X86_INS_VMCALL = 1011
+X86_INS_VMCLEAR = 1012
+X86_INS_VMFUNC = 1013
+X86_INS_VMINPD = 1014
+X86_INS_VMINPS = 1015
+X86_INS_VMINSD = 1016
+X86_INS_VMINSS = 1017
+X86_INS_VMLAUNCH = 1018
+X86_INS_VMLOAD = 1019
+X86_INS_VMMCALL = 1020
+X86_INS_VMOVQ = 1021
+X86_INS_VMOVAPD = 1022
+X86_INS_VMOVAPS = 1023
+X86_INS_VMOVDDUP = 1024
+X86_INS_VMOVD = 1025
+X86_INS_VMOVDQA32 = 1026
+X86_INS_VMOVDQA64 = 1027
+X86_INS_VMOVDQA = 1028
+X86_INS_VMOVDQU16 = 1029
+X86_INS_VMOVDQU32 = 1030
+X86_INS_VMOVDQU64 = 1031
+X86_INS_VMOVDQU8 = 1032
+X86_INS_VMOVDQU = 1033
+X86_INS_VMOVHLPS = 1034
+X86_INS_VMOVHPD = 1035
+X86_INS_VMOVHPS = 1036
+X86_INS_VMOVLHPS = 1037
+X86_INS_VMOVLPD = 1038
+X86_INS_VMOVLPS = 1039
+X86_INS_VMOVMSKPD = 1040
+X86_INS_VMOVMSKPS = 1041
+X86_INS_VMOVNTDQA = 1042
+X86_INS_VMOVNTDQ = 1043
+X86_INS_VMOVNTPD = 1044
+X86_INS_VMOVNTPS = 1045
+X86_INS_VMOVSD = 1046
+X86_INS_VMOVSHDUP = 1047
+X86_INS_VMOVSLDUP = 1048
+X86_INS_VMOVSS = 1049
+X86_INS_VMOVUPD = 1050
+X86_INS_VMOVUPS = 1051
+X86_INS_VMPSADBW = 1052
+X86_INS_VMPTRLD = 1053
+X86_INS_VMPTRST = 1054
+X86_INS_VMREAD = 1055
+X86_INS_VMRESUME = 1056
+X86_INS_VMRUN = 1057
+X86_INS_VMSAVE = 1058
+X86_INS_VMULPD = 1059
+X86_INS_VMULPS = 1060
+X86_INS_VMULSD = 1061
+X86_INS_VMULSS = 1062
+X86_INS_VMWRITE = 1063
+X86_INS_VMXOFF = 1064
+X86_INS_VMXON = 1065
+X86_INS_VORPD = 1066
+X86_INS_VORPS = 1067
+X86_INS_VP4DPWSSDS = 1068
+X86_INS_VP4DPWSSD = 1069
+X86_INS_VPABSB = 1070
+X86_INS_VPABSD = 1071
+X86_INS_VPABSQ = 1072
+X86_INS_VPABSW = 1073
+X86_INS_VPACKSSDW = 1074
+X86_INS_VPACKSSWB = 1075
+X86_INS_VPACKUSDW = 1076
+X86_INS_VPACKUSWB = 1077
+X86_INS_VPADDB = 1078
+X86_INS_VPADDD = 1079
+X86_INS_VPADDQ = 1080
+X86_INS_VPADDSB = 1081
+X86_INS_VPADDSW = 1082
+X86_INS_VPADDUSB = 1083
+X86_INS_VPADDUSW = 1084
+X86_INS_VPADDW = 1085
+X86_INS_VPALIGNR = 1086
+X86_INS_VPANDD = 1087
+X86_INS_VPANDND = 1088
+X86_INS_VPANDNQ = 1089
+X86_INS_VPANDN = 1090
+X86_INS_VPANDQ = 1091
+X86_INS_VPAND = 1092
+X86_INS_VPAVGB = 1093
+X86_INS_VPAVGW = 1094
+X86_INS_VPBLENDD = 1095
+X86_INS_VPBLENDMB = 1096
+X86_INS_VPBLENDMD = 1097
+X86_INS_VPBLENDMQ = 1098
+X86_INS_VPBLENDMW = 1099
+X86_INS_VPBLENDVB = 1100
+X86_INS_VPBLENDW = 1101
+X86_INS_VPBROADCASTB = 1102
+X86_INS_VPBROADCASTD = 1103
+X86_INS_VPBROADCASTMB2Q = 1104
+X86_INS_VPBROADCASTMW2D = 1105
+X86_INS_VPBROADCASTQ = 1106
+X86_INS_VPBROADCASTW = 1107
+X86_INS_VPCLMULQDQ = 1108
+X86_INS_VPCMOV = 1109
+X86_INS_VPCMP = 1110
+X86_INS_VPCMPB = 1111
+X86_INS_VPCMPD = 1112
+X86_INS_VPCMPEQB = 1113
+X86_INS_VPCMPEQD = 1114
+X86_INS_VPCMPEQQ = 1115
+X86_INS_VPCMPEQW = 1116
+X86_INS_VPCMPESTRI = 1117
+X86_INS_VPCMPESTRM = 1118
+X86_INS_VPCMPGTB = 1119
+X86_INS_VPCMPGTD = 1120
+X86_INS_VPCMPGTQ = 1121
+X86_INS_VPCMPGTW = 1122
+X86_INS_VPCMPISTRI = 1123
+X86_INS_VPCMPISTRM = 1124
+X86_INS_VPCMPQ = 1125
+X86_INS_VPCMPUB = 1126
+X86_INS_VPCMPUD = 1127
+X86_INS_VPCMPUQ = 1128
+X86_INS_VPCMPUW = 1129
+X86_INS_VPCMPW = 1130
+X86_INS_VPCOM = 1131
+X86_INS_VPCOMB = 1132
+X86_INS_VPCOMD = 1133
+X86_INS_VPCOMPRESSB = 1134
+X86_INS_VPCOMPRESSD = 1135
+X86_INS_VPCOMPRESSQ = 1136
+X86_INS_VPCOMPRESSW = 1137
+X86_INS_VPCOMQ = 1138
+X86_INS_VPCOMUB = 1139
+X86_INS_VPCOMUD = 1140
+X86_INS_VPCOMUQ = 1141
+X86_INS_VPCOMUW = 1142
+X86_INS_VPCOMW = 1143
+X86_INS_VPCONFLICTD = 1144
+X86_INS_VPCONFLICTQ = 1145
+X86_INS_VPDPBUSDS = 1146
+X86_INS_VPDPBUSD = 1147
+X86_INS_VPDPWSSDS = 1148
+X86_INS_VPDPWSSD = 1149
+X86_INS_VPERM2F128 = 1150
+X86_INS_VPERM2I128 = 1151
+X86_INS_VPERMB = 1152
+X86_INS_VPERMD = 1153
+X86_INS_VPERMI2B = 1154
+X86_INS_VPERMI2D = 1155
+X86_INS_VPERMI2PD = 1156
+X86_INS_VPERMI2PS = 1157
+X86_INS_VPERMI2Q = 1158
+X86_INS_VPERMI2W = 1159
+X86_INS_VPERMIL2PD = 1160
+X86_INS_VPERMILPD = 1161
+X86_INS_VPERMIL2PS = 1162
+X86_INS_VPERMILPS = 1163
+X86_INS_VPERMPD = 1164
+X86_INS_VPERMPS = 1165
+X86_INS_VPERMQ = 1166
+X86_INS_VPERMT2B = 1167
+X86_INS_VPERMT2D = 1168
+X86_INS_VPERMT2PD = 1169
+X86_INS_VPERMT2PS = 1170
+X86_INS_VPERMT2Q = 1171
+X86_INS_VPERMT2W = 1172
+X86_INS_VPERMW = 1173
+X86_INS_VPEXPANDB = 1174
+X86_INS_VPEXPANDD = 1175
+X86_INS_VPEXPANDQ = 1176
+X86_INS_VPEXPANDW = 1177
+X86_INS_VPEXTRB = 1178
+X86_INS_VPEXTRD = 1179
+X86_INS_VPEXTRQ = 1180
+X86_INS_VPEXTRW = 1181
+X86_INS_VPGATHERDD = 1182
+X86_INS_VPGATHERDQ = 1183
+X86_INS_VPGATHERQD = 1184
+X86_INS_VPGATHERQQ = 1185
+X86_INS_VPHADDBD = 1186
+X86_INS_VPHADDBQ = 1187
+X86_INS_VPHADDBW = 1188
+X86_INS_VPHADDDQ = 1189
+X86_INS_VPHADDD = 1190
+X86_INS_VPHADDSW = 1191
+X86_INS_VPHADDUBD = 1192
+X86_INS_VPHADDUBQ = 1193
+X86_INS_VPHADDUBW = 1194
+X86_INS_VPHADDUDQ = 1195
+X86_INS_VPHADDUWD = 1196
+X86_INS_VPHADDUWQ = 1197
+X86_INS_VPHADDWD = 1198
+X86_INS_VPHADDWQ = 1199
+X86_INS_VPHADDW = 1200
+X86_INS_VPHMINPOSUW = 1201
+X86_INS_VPHSUBBW = 1202
+X86_INS_VPHSUBDQ = 1203
+X86_INS_VPHSUBD = 1204
+X86_INS_VPHSUBSW = 1205
+X86_INS_VPHSUBWD = 1206
+X86_INS_VPHSUBW = 1207
+X86_INS_VPINSRB = 1208
+X86_INS_VPINSRD = 1209
+X86_INS_VPINSRQ = 1210
+X86_INS_VPINSRW = 1211
+X86_INS_VPLZCNTD = 1212
+X86_INS_VPLZCNTQ = 1213
+X86_INS_VPMACSDD = 1214
+X86_INS_VPMACSDQH = 1215
+X86_INS_VPMACSDQL = 1216
+X86_INS_VPMACSSDD = 1217
+X86_INS_VPMACSSDQH = 1218
+X86_INS_VPMACSSDQL = 1219
+X86_INS_VPMACSSWD = 1220
+X86_INS_VPMACSSWW = 1221
+X86_INS_VPMACSWD = 1222
+X86_INS_VPMACSWW = 1223
+X86_INS_VPMADCSSWD = 1224
+X86_INS_VPMADCSWD = 1225
+X86_INS_VPMADD52HUQ = 1226
+X86_INS_VPMADD52LUQ = 1227
+X86_INS_VPMADDUBSW = 1228
+X86_INS_VPMADDWD = 1229
+X86_INS_VPMASKMOVD = 1230
+X86_INS_VPMASKMOVQ = 1231
+X86_INS_VPMAXSB = 1232
+X86_INS_VPMAXSD = 1233
+X86_INS_VPMAXSQ = 1234
+X86_INS_VPMAXSW = 1235
+X86_INS_VPMAXUB = 1236
+X86_INS_VPMAXUD = 1237
+X86_INS_VPMAXUQ = 1238
+X86_INS_VPMAXUW = 1239
+X86_INS_VPMINSB = 1240
+X86_INS_VPMINSD = 1241
+X86_INS_VPMINSQ = 1242
+X86_INS_VPMINSW = 1243
+X86_INS_VPMINUB = 1244
+X86_INS_VPMINUD = 1245
+X86_INS_VPMINUQ = 1246
+X86_INS_VPMINUW = 1247
+X86_INS_VPMOVB2M = 1248
+X86_INS_VPMOVD2M = 1249
+X86_INS_VPMOVDB = 1250
+X86_INS_VPMOVDW = 1251
+X86_INS_VPMOVM2B = 1252
+X86_INS_VPMOVM2D = 1253
+X86_INS_VPMOVM2Q = 1254
+X86_INS_VPMOVM2W = 1255
+X86_INS_VPMOVMSKB = 1256
+X86_INS_VPMOVQ2M = 1257
+X86_INS_VPMOVQB = 1258
+X86_INS_VPMOVQD = 1259
+X86_INS_VPMOVQW = 1260
+X86_INS_VPMOVSDB = 1261
+X86_INS_VPMOVSDW = 1262
+X86_INS_VPMOVSQB = 1263
+X86_INS_VPMOVSQD = 1264
+X86_INS_VPMOVSQW = 1265
+X86_INS_VPMOVSWB = 1266
+X86_INS_VPMOVSXBD = 1267
+X86_INS_VPMOVSXBQ = 1268
+X86_INS_VPMOVSXBW = 1269
+X86_INS_VPMOVSXDQ = 1270
+X86_INS_VPMOVSXWD = 1271
+X86_INS_VPMOVSXWQ = 1272
+X86_INS_VPMOVUSDB = 1273
+X86_INS_VPMOVUSDW = 1274
+X86_INS_VPMOVUSQB = 1275
+X86_INS_VPMOVUSQD = 1276
+X86_INS_VPMOVUSQW = 1277
+X86_INS_VPMOVUSWB = 1278
+X86_INS_VPMOVW2M = 1279
+X86_INS_VPMOVWB = 1280
+X86_INS_VPMOVZXBD = 1281
+X86_INS_VPMOVZXBQ = 1282
+X86_INS_VPMOVZXBW = 1283
+X86_INS_VPMOVZXDQ = 1284
+X86_INS_VPMOVZXWD = 1285
+X86_INS_VPMOVZXWQ = 1286
+X86_INS_VPMULDQ = 1287
+X86_INS_VPMULHRSW = 1288
+X86_INS_VPMULHUW = 1289
+X86_INS_VPMULHW = 1290
+X86_INS_VPMULLD = 1291
+X86_INS_VPMULLQ = 1292
+X86_INS_VPMULLW = 1293
+X86_INS_VPMULTISHIFTQB = 1294
+X86_INS_VPMULUDQ = 1295
+X86_INS_VPOPCNTB = 1296
+X86_INS_VPOPCNTD = 1297
+X86_INS_VPOPCNTQ = 1298
+X86_INS_VPOPCNTW = 1299
+X86_INS_VPORD = 1300
+X86_INS_VPORQ = 1301
+X86_INS_VPOR = 1302
+X86_INS_VPPERM = 1303
+X86_INS_VPROLD = 1304
+X86_INS_VPROLQ = 1305
+X86_INS_VPROLVD = 1306
+X86_INS_VPROLVQ = 1307
+X86_INS_VPRORD = 1308
+X86_INS_VPRORQ = 1309
+X86_INS_VPRORVD = 1310
+X86_INS_VPRORVQ = 1311
+X86_INS_VPROTB = 1312
+X86_INS_VPROTD = 1313
+X86_INS_VPROTQ = 1314
+X86_INS_VPROTW = 1315
+X86_INS_VPSADBW = 1316
+X86_INS_VPSCATTERDD = 1317
+X86_INS_VPSCATTERDQ = 1318
+X86_INS_VPSCATTERQD = 1319
+X86_INS_VPSCATTERQQ = 1320
+X86_INS_VPSHAB = 1321
+X86_INS_VPSHAD = 1322
+X86_INS_VPSHAQ = 1323
+X86_INS_VPSHAW = 1324
+X86_INS_VPSHLB = 1325
+X86_INS_VPSHLDD = 1326
+X86_INS_VPSHLDQ = 1327
+X86_INS_VPSHLDVD = 1328
+X86_INS_VPSHLDVQ = 1329
+X86_INS_VPSHLDVW = 1330
+X86_INS_VPSHLDW = 1331
+X86_INS_VPSHLD = 1332
+X86_INS_VPSHLQ = 1333
+X86_INS_VPSHLW = 1334
+X86_INS_VPSHRDD = 1335
+X86_INS_VPSHRDQ = 1336
+X86_INS_VPSHRDVD = 1337
+X86_INS_VPSHRDVQ = 1338
+X86_INS_VPSHRDVW = 1339
+X86_INS_VPSHRDW = 1340
+X86_INS_VPSHUFBITQMB = 1341
+X86_INS_VPSHUFB = 1342
+X86_INS_VPSHUFD = 1343
+X86_INS_VPSHUFHW = 1344
+X86_INS_VPSHUFLW = 1345
+X86_INS_VPSIGNB = 1346
+X86_INS_VPSIGND = 1347
+X86_INS_VPSIGNW = 1348
+X86_INS_VPSLLDQ = 1349
+X86_INS_VPSLLD = 1350
+X86_INS_VPSLLQ = 1351
+X86_INS_VPSLLVD = 1352
+X86_INS_VPSLLVQ = 1353
+X86_INS_VPSLLVW = 1354
+X86_INS_VPSLLW = 1355
+X86_INS_VPSRAD = 1356
+X86_INS_VPSRAQ = 1357
+X86_INS_VPSRAVD = 1358
+X86_INS_VPSRAVQ = 1359
+X86_INS_VPSRAVW = 1360
+X86_INS_VPSRAW = 1361
+X86_INS_VPSRLDQ = 1362
+X86_INS_VPSRLD = 1363
+X86_INS_VPSRLQ = 1364
+X86_INS_VPSRLVD = 1365
+X86_INS_VPSRLVQ = 1366
+X86_INS_VPSRLVW = 1367
+X86_INS_VPSRLW = 1368
+X86_INS_VPSUBB = 1369
+X86_INS_VPSUBD = 1370
+X86_INS_VPSUBQ = 1371
+X86_INS_VPSUBSB = 1372
+X86_INS_VPSUBSW = 1373
+X86_INS_VPSUBUSB = 1374
+X86_INS_VPSUBUSW = 1375
+X86_INS_VPSUBW = 1376
+X86_INS_VPTERNLOGD = 1377
+X86_INS_VPTERNLOGQ = 1378
+X86_INS_VPTESTMB = 1379
+X86_INS_VPTESTMD = 1380
+X86_INS_VPTESTMQ = 1381
+X86_INS_VPTESTMW = 1382
+X86_INS_VPTESTNMB = 1383
+X86_INS_VPTESTNMD = 1384
+X86_INS_VPTESTNMQ = 1385
+X86_INS_VPTESTNMW = 1386
+X86_INS_VPTEST = 1387
+X86_INS_VPUNPCKHBW = 1388
+X86_INS_VPUNPCKHDQ = 1389
+X86_INS_VPUNPCKHQDQ = 1390
+X86_INS_VPUNPCKHWD = 1391
+X86_INS_VPUNPCKLBW = 1392
+X86_INS_VPUNPCKLDQ = 1393
+X86_INS_VPUNPCKLQDQ = 1394
+X86_INS_VPUNPCKLWD = 1395
+X86_INS_VPXORD = 1396
+X86_INS_VPXORQ = 1397
+X86_INS_VPXOR = 1398
+X86_INS_VRANGEPD = 1399
+X86_INS_VRANGEPS = 1400
+X86_INS_VRANGESD = 1401
+X86_INS_VRANGESS = 1402
+X86_INS_VRCP14PD = 1403
+X86_INS_VRCP14PS = 1404
+X86_INS_VRCP14SD = 1405
+X86_INS_VRCP14SS = 1406
+X86_INS_VRCP28PD = 1407
+X86_INS_VRCP28PS = 1408
+X86_INS_VRCP28SD = 1409
+X86_INS_VRCP28SS = 1410
+X86_INS_VRCPPS = 1411
+X86_INS_VRCPSS = 1412
+X86_INS_VREDUCEPD = 1413
+X86_INS_VREDUCEPS = 1414
+X86_INS_VREDUCESD = 1415
+X86_INS_VREDUCESS = 1416
+X86_INS_VRNDSCALEPD = 1417
+X86_INS_VRNDSCALEPS = 1418
+X86_INS_VRNDSCALESD = 1419
+X86_INS_VRNDSCALESS = 1420
+X86_INS_VROUNDPD = 1421
+X86_INS_VROUNDPS = 1422
+X86_INS_VROUNDSD = 1423
+X86_INS_VROUNDSS = 1424
+X86_INS_VRSQRT14PD = 1425
+X86_INS_VRSQRT14PS = 1426
+X86_INS_VRSQRT14SD = 1427
+X86_INS_VRSQRT14SS = 1428
+X86_INS_VRSQRT28PD = 1429
+X86_INS_VRSQRT28PS = 1430
+X86_INS_VRSQRT28SD = 1431
+X86_INS_VRSQRT28SS = 1432
+X86_INS_VRSQRTPS = 1433
+X86_INS_VRSQRTSS = 1434
+X86_INS_VSCALEFPD = 1435
+X86_INS_VSCALEFPS = 1436
+X86_INS_VSCALEFSD = 1437
+X86_INS_VSCALEFSS = 1438
+X86_INS_VSCATTERDPD = 1439
+X86_INS_VSCATTERDPS = 1440
+X86_INS_VSCATTERPF0DPD = 1441
+X86_INS_VSCATTERPF0DPS = 1442
+X86_INS_VSCATTERPF0QPD = 1443
+X86_INS_VSCATTERPF0QPS = 1444
+X86_INS_VSCATTERPF1DPD = 1445
+X86_INS_VSCATTERPF1DPS = 1446
+X86_INS_VSCATTERPF1QPD = 1447
+X86_INS_VSCATTERPF1QPS = 1448
+X86_INS_VSCATTERQPD = 1449
+X86_INS_VSCATTERQPS = 1450
+X86_INS_VSHUFF32X4 = 1451
+X86_INS_VSHUFF64X2 = 1452
+X86_INS_VSHUFI32X4 = 1453
+X86_INS_VSHUFI64X2 = 1454
+X86_INS_VSHUFPD = 1455
+X86_INS_VSHUFPS = 1456
+X86_INS_VSQRTPD = 1457
+X86_INS_VSQRTPS = 1458
+X86_INS_VSQRTSD = 1459
+X86_INS_VSQRTSS = 1460
+X86_INS_VSTMXCSR = 1461
+X86_INS_VSUBPD = 1462
+X86_INS_VSUBPS = 1463
+X86_INS_VSUBSD = 1464
+X86_INS_VSUBSS = 1465
+X86_INS_VTESTPD = 1466
+X86_INS_VTESTPS = 1467
+X86_INS_VUCOMISD = 1468
+X86_INS_VUCOMISS = 1469
+X86_INS_VUNPCKHPD = 1470
+X86_INS_VUNPCKHPS = 1471
+X86_INS_VUNPCKLPD = 1472
+X86_INS_VUNPCKLPS = 1473
+X86_INS_VXORPD = 1474
+X86_INS_VXORPS = 1475
+X86_INS_VZEROALL = 1476
+X86_INS_VZEROUPPER = 1477
+X86_INS_WAIT = 1478
+X86_INS_WBINVD = 1479
+X86_INS_WBNOINVD = 1480
+X86_INS_WRFSBASE = 1481
+X86_INS_WRGSBASE = 1482
+X86_INS_WRMSR = 1483
+X86_INS_WRPKRU = 1484
+X86_INS_WRSSD = 1485
+X86_INS_WRSSQ = 1486
+X86_INS_WRUSSD = 1487
+X86_INS_WRUSSQ = 1488
+X86_INS_XABORT = 1489
+X86_INS_XACQUIRE = 1490
+X86_INS_XADD = 1491
+X86_INS_XBEGIN = 1492
+X86_INS_XCHG = 1493
+X86_INS_FXCH = 1494
+X86_INS_XCRYPTCBC = 1495
+X86_INS_XCRYPTCFB = 1496
+X86_INS_XCRYPTCTR = 1497
+X86_INS_XCRYPTECB = 1498
+X86_INS_XCRYPTOFB = 1499
+X86_INS_XEND = 1500
+X86_INS_XGETBV = 1501
+X86_INS_XLATB = 1502
+X86_INS_XOR = 1503
+X86_INS_XORPD = 1504
+X86_INS_XORPS = 1505
+X86_INS_XRELEASE = 1506
+X86_INS_XRSTOR = 1507
+X86_INS_XRSTOR64 = 1508
+X86_INS_XRSTORS = 1509
+X86_INS_XRSTORS64 = 1510
+X86_INS_XSAVE = 1511
+X86_INS_XSAVE64 = 1512
+X86_INS_XSAVEC = 1513
+X86_INS_XSAVEC64 = 1514
+X86_INS_XSAVEOPT = 1515
+X86_INS_XSAVEOPT64 = 1516
+X86_INS_XSAVES = 1517
+X86_INS_XSAVES64 = 1518
+X86_INS_XSETBV = 1519
+X86_INS_XSHA1 = 1520
+X86_INS_XSHA256 = 1521
+X86_INS_XSTORE = 1522
+X86_INS_XTEST = 1523
+X86_INS_ENDING = 1524
+
+X86_GRP_INVALID = 0
+X86_GRP_JUMP = 1
+X86_GRP_CALL = 2
+X86_GRP_RET = 3
+X86_GRP_INT = 4
+X86_GRP_IRET = 5
+X86_GRP_PRIVILEGE = 6
+X86_GRP_BRANCH_RELATIVE = 7
+X86_GRP_VM = 128
+X86_GRP_3DNOW = 129
+X86_GRP_AES = 130
+X86_GRP_ADX = 131
+X86_GRP_AVX = 132
+X86_GRP_AVX2 = 133
+X86_GRP_AVX512 = 134
+X86_GRP_BMI = 135
+X86_GRP_BMI2 = 136
+X86_GRP_CMOV = 137
+X86_GRP_F16C = 138
+X86_GRP_FMA = 139
+X86_GRP_FMA4 = 140
+X86_GRP_FSGSBASE = 141
+X86_GRP_HLE = 142
+X86_GRP_MMX = 143
+X86_GRP_MODE32 = 144
+X86_GRP_MODE64 = 145
+X86_GRP_RTM = 146
+X86_GRP_SHA = 147
+X86_GRP_SSE1 = 148
+X86_GRP_SSE2 = 149
+X86_GRP_SSE3 = 150
+X86_GRP_SSE41 = 151
+X86_GRP_SSE42 = 152
+X86_GRP_SSE4A = 153
+X86_GRP_SSSE3 = 154
+X86_GRP_PCLMUL = 155
+X86_GRP_XOP = 156
+X86_GRP_CDI = 157
+X86_GRP_ERI = 158
+X86_GRP_TBM = 159
+X86_GRP_16BITMODE = 160
+X86_GRP_NOT64BITMODE = 161
+X86_GRP_SGX = 162
+X86_GRP_DQI = 163
+X86_GRP_BWI = 164
+X86_GRP_PFI = 165
+X86_GRP_VLX = 166
+X86_GRP_SMAP = 167
+X86_GRP_NOVLX = 168
+X86_GRP_FPU = 169
+X86_GRP_ENDING = 170
diff --git a/capstone/bindings/python/capstone/xcore.py b/capstone/bindings/python/capstone/xcore.py
new file mode 100644
index 000000000..ec95b78bc
--- /dev/null
+++ b/capstone/bindings/python/capstone/xcore.py
@@ -0,0 +1,50 @@
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+import ctypes
+from . import copy_ctypes_list
+from .xcore_const import *
+
+# define the API
+class XcoreOpMem(ctypes.Structure):
+    _fields_ = (
+        ('base', ctypes.c_uint8),
+        ('index', ctypes.c_uint8),
+        ('disp', ctypes.c_int32),
+        ('direct', ctypes.c_int),
+    )
+
+class XcoreOpValue(ctypes.Union):
+    _fields_ = (
+        ('reg', ctypes.c_uint),
+        ('imm', ctypes.c_int32),
+        ('mem', XcoreOpMem),
+    )
+
+class XcoreOp(ctypes.Structure):
+    _fields_ = (
+        ('type', ctypes.c_uint),
+        ('value', XcoreOpValue),
+    )
+
+    @property
+    def imm(self):
+        return self.value.imm
+
+    @property
+    def reg(self):
+        return self.value.reg
+
+    @property
+    def mem(self):
+        return self.value.mem
+
+
+class CsXcore(ctypes.Structure):
+    _fields_ = (
+        ('op_count', ctypes.c_uint8),
+        ('operands', XcoreOp * 8),
+    )
+
+def get_arch_info(a):
+    return (copy_ctypes_list(a.operands[:a.op_count]))
+
diff --git a/capstone/bindings/python/capstone/xcore_const.py b/capstone/bindings/python/capstone/xcore_const.py
new file mode 100644
index 000000000..f1b74855d
--- /dev/null
+++ b/capstone/bindings/python/capstone/xcore_const.py
@@ -0,0 +1,161 @@
+# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.py]
+
+XCORE_OP_INVALID = 0
+XCORE_OP_REG = 1
+XCORE_OP_IMM = 2
+XCORE_OP_MEM = 3
+
+XCORE_REG_INVALID = 0
+XCORE_REG_CP = 1
+XCORE_REG_DP = 2
+XCORE_REG_LR = 3
+XCORE_REG_SP = 4
+XCORE_REG_R0 = 5
+XCORE_REG_R1 = 6
+XCORE_REG_R2 = 7
+XCORE_REG_R3 = 8
+XCORE_REG_R4 = 9
+XCORE_REG_R5 = 10
+XCORE_REG_R6 = 11
+XCORE_REG_R7 = 12
+XCORE_REG_R8 = 13
+XCORE_REG_R9 = 14
+XCORE_REG_R10 = 15
+XCORE_REG_R11 = 16
+XCORE_REG_PC = 17
+XCORE_REG_SCP = 18
+XCORE_REG_SSR = 19
+XCORE_REG_ET = 20
+XCORE_REG_ED = 21
+XCORE_REG_SED = 22
+XCORE_REG_KEP = 23
+XCORE_REG_KSP = 24
+XCORE_REG_ID = 25
+XCORE_REG_ENDING = 26
+
+XCORE_INS_INVALID = 0
+XCORE_INS_ADD = 1
+XCORE_INS_ANDNOT = 2
+XCORE_INS_AND = 3
+XCORE_INS_ASHR = 4
+XCORE_INS_BAU = 5
+XCORE_INS_BITREV = 6
+XCORE_INS_BLA = 7
+XCORE_INS_BLAT = 8
+XCORE_INS_BL = 9
+XCORE_INS_BF = 10
+XCORE_INS_BT = 11
+XCORE_INS_BU = 12
+XCORE_INS_BRU = 13
+XCORE_INS_BYTEREV = 14
+XCORE_INS_CHKCT = 15
+XCORE_INS_CLRE = 16
+XCORE_INS_CLRPT = 17
+XCORE_INS_CLRSR = 18
+XCORE_INS_CLZ = 19
+XCORE_INS_CRC8 = 20
+XCORE_INS_CRC32 = 21
+XCORE_INS_DCALL = 22
+XCORE_INS_DENTSP = 23
+XCORE_INS_DGETREG = 24
+XCORE_INS_DIVS = 25
+XCORE_INS_DIVU = 26
+XCORE_INS_DRESTSP = 27
+XCORE_INS_DRET = 28
+XCORE_INS_ECALLF = 29
+XCORE_INS_ECALLT = 30
+XCORE_INS_EDU = 31
+XCORE_INS_EEF = 32
+XCORE_INS_EET = 33
+XCORE_INS_EEU = 34
+XCORE_INS_ENDIN = 35
+XCORE_INS_ENTSP = 36
+XCORE_INS_EQ = 37
+XCORE_INS_EXTDP = 38
+XCORE_INS_EXTSP = 39
+XCORE_INS_FREER = 40
+XCORE_INS_FREET = 41
+XCORE_INS_GETD = 42
+XCORE_INS_GET = 43
+XCORE_INS_GETN = 44
+XCORE_INS_GETR = 45
+XCORE_INS_GETSR = 46
+XCORE_INS_GETST = 47
+XCORE_INS_GETTS = 48
+XCORE_INS_INCT = 49
+XCORE_INS_INIT = 50
+XCORE_INS_INPW = 51
+XCORE_INS_INSHR = 52
+XCORE_INS_INT = 53
+XCORE_INS_IN = 54
+XCORE_INS_KCALL = 55
+XCORE_INS_KENTSP = 56
+XCORE_INS_KRESTSP = 57
+XCORE_INS_KRET = 58
+XCORE_INS_LADD = 59
+XCORE_INS_LD16S = 60
+XCORE_INS_LD8U = 61
+XCORE_INS_LDA16 = 62
+XCORE_INS_LDAP = 63
+XCORE_INS_LDAW = 64
+XCORE_INS_LDC = 65
+XCORE_INS_LDW = 66
+XCORE_INS_LDIVU = 67
+XCORE_INS_LMUL = 68
+XCORE_INS_LSS = 69
+XCORE_INS_LSUB = 70
+XCORE_INS_LSU = 71
+XCORE_INS_MACCS = 72
+XCORE_INS_MACCU = 73
+XCORE_INS_MJOIN = 74
+XCORE_INS_MKMSK = 75
+XCORE_INS_MSYNC = 76
+XCORE_INS_MUL = 77
+XCORE_INS_NEG = 78
+XCORE_INS_NOT = 79
+XCORE_INS_OR = 80
+XCORE_INS_OUTCT = 81
+XCORE_INS_OUTPW = 82
+XCORE_INS_OUTSHR = 83
+XCORE_INS_OUTT = 84
+XCORE_INS_OUT = 85
+XCORE_INS_PEEK = 86
+XCORE_INS_REMS = 87
+XCORE_INS_REMU = 88
+XCORE_INS_RETSP = 89
+XCORE_INS_SETCLK = 90
+XCORE_INS_SET = 91
+XCORE_INS_SETC = 92
+XCORE_INS_SETD = 93
+XCORE_INS_SETEV = 94
+XCORE_INS_SETN = 95
+XCORE_INS_SETPSC = 96
+XCORE_INS_SETPT = 97
+XCORE_INS_SETRDY = 98
+XCORE_INS_SETSR = 99
+XCORE_INS_SETTW = 100
+XCORE_INS_SETV = 101
+XCORE_INS_SEXT = 102
+XCORE_INS_SHL = 103
+XCORE_INS_SHR = 104
+XCORE_INS_SSYNC = 105
+XCORE_INS_ST16 = 106
+XCORE_INS_ST8 = 107
+XCORE_INS_STW = 108
+XCORE_INS_SUB = 109
+XCORE_INS_SYNCR = 110
+XCORE_INS_TESTCT = 111
+XCORE_INS_TESTLCL = 112
+XCORE_INS_TESTWCT = 113
+XCORE_INS_TSETMR = 114
+XCORE_INS_START = 115
+XCORE_INS_WAITEF = 116
+XCORE_INS_WAITET = 117
+XCORE_INS_WAITEU = 118
+XCORE_INS_XOR = 119
+XCORE_INS_ZEXT = 120
+XCORE_INS_ENDING = 121
+
+XCORE_GRP_INVALID = 0
+XCORE_GRP_JUMP = 1
+XCORE_GRP_ENDING = 2
diff --git a/capstone/bindings/python/prebuilt/.gitkeep b/capstone/bindings/python/prebuilt/.gitkeep
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/capstone/bindings/python/prebuilt/.gitkeep
diff --git a/capstone/bindings/python/pyx/README b/capstone/bindings/python/pyx/README
new file mode 100644
index 000000000..2b8862015
--- /dev/null
+++ b/capstone/bindings/python/pyx/README
@@ -0,0 +1 @@
+This directory contains Cython files.
diff --git a/capstone/bindings/python/pyx/ccapstone.pxd b/capstone/bindings/python/pyx/ccapstone.pxd
new file mode 100644
index 000000000..8b163f2f6
--- /dev/null
+++ b/capstone/bindings/python/pyx/ccapstone.pxd
@@ -0,0 +1,72 @@
+# By Dang Hoang Vu <danghvu@gmail.com>, 2014
+
+from libcpp cimport bool
+from libc.stdint cimport uint8_t, uint64_t, uint16_t
+
+cdef extern from "<capstone/capstone.h>":
+
+    ctypedef size_t csh
+
+    ctypedef enum cs_mode:
+        pass
+
+    ctypedef enum cs_arch:
+        pass
+
+    ctypedef struct cs_detail:
+        pass
+
+    ctypedef struct cs_insn:
+        unsigned int id
+        uint64_t address
+        uint16_t size
+        uint8_t bytes[24]
+        char mnemonic[32]
+        char op_str[160]
+        cs_detail *detail
+
+    ctypedef enum cs_err:
+        pass
+
+    ctypedef enum cs_opt_type:
+        pass
+
+    unsigned int cs_version(int *major, int *minor)
+
+    bool cs_support(int arch)
+
+    cs_err cs_open(cs_arch arch, cs_mode mode, csh *handle)
+
+    cs_err cs_close(csh *handle)
+
+    cs_err cs_errno(csh handle)
+
+    size_t cs_disasm(csh handle,
+        const uint8_t *code, size_t code_size,
+        uint64_t address,
+        size_t count,
+        cs_insn **insn)
+
+    cs_err cs_option(csh handle, cs_opt_type type, size_t value)
+
+    void cs_free(cs_insn *insn, size_t count)
+
+    const char *cs_reg_name(csh handle, unsigned int reg_id)
+
+    const char *cs_insn_name(csh handle, unsigned int insn_id)
+
+    const char *cs_group_name(csh handle, unsigned int group_id)
+
+    bool cs_insn_group(csh handle, cs_insn *insn, unsigned int group_id)
+
+    bool cs_reg_read(csh handle, cs_insn *insn, unsigned int reg_id)
+
+    bool cs_reg_write(csh handle, cs_insn *insn, unsigned int reg_id)
+
+    int cs_op_count(csh handle, cs_insn *insn, unsigned int op_type)
+
+    cs_err cs_regs_access(csh handle, cs_insn *insn, uint16_t *regs_read, uint8_t *read_count, uint16_t *regs_write, uint8_t *write_count)
+
+    int cs_op_index(csh handle, cs_insn *insn, unsigned int op_type,
+        unsigned int position)
+
diff --git a/capstone/bindings/python/setup.py b/capstone/bindings/python/setup.py
new file mode 100755
index 000000000..55934b5e0
--- /dev/null
+++ b/capstone/bindings/python/setup.py
@@ -0,0 +1,233 @@
+#!/usr/bin/env python
+
+import glob
+import os
+import shutil
+import sys
+import platform
+
+from distutils import log
+from setuptools import setup
+from distutils.util import get_platform
+from distutils.command.build import build
+from distutils.command.sdist import sdist
+from setuptools.command.bdist_egg import bdist_egg
+
+SYSTEM = sys.platform
+
+# adapted from commit e504b81 of Nguyen Tan Cong
+# Reference: https://docs.python.org/2/library/platform.html#cross-platform
+IS_64BITS = sys.maxsize > 2**32
+
+# are we building from the repository or from a source distribution?
+ROOT_DIR = os.path.dirname(os.path.realpath(__file__))
+LIBS_DIR = os.path.join(ROOT_DIR, 'capstone', 'lib')
+HEADERS_DIR = os.path.join(ROOT_DIR, 'capstone', 'include')
+SRC_DIR = os.path.join(ROOT_DIR, 'src')
+BUILD_DIR = SRC_DIR if os.path.exists(SRC_DIR) else os.path.join(ROOT_DIR, '../..')
+
+# Parse version from pkgconfig.mk
+VERSION_DATA = {}
+with open(os.path.join(BUILD_DIR, 'pkgconfig.mk')) as fp:
+    lines = fp.readlines()
+    for line in lines:
+        line = line.strip()
+        if len(line) == 0:
+            continue
+        if line.startswith('#'):
+            continue
+        if '=' not in line:
+            continue
+
+        k, v = line.split('=', 1)
+        k = k.strip()
+        v = v.strip()
+        if len(k) == 0 or len(v) == 0:
+            continue
+        VERSION_DATA[k] = v
+
+if 'PKG_MAJOR' not in VERSION_DATA or \
+        'PKG_MINOR' not in VERSION_DATA or \
+        'PKG_EXTRA' not in VERSION_DATA:
+    raise Exception("Malformed pkgconfig.mk")
+
+if 'PKG_TAG' in VERSION_DATA:
+    VERSION = '{PKG_MAJOR}.{PKG_MINOR}.{PKG_EXTRA}.{PKG_TAG}'.format(**VERSION_DATA)
+else:
+    VERSION = '{PKG_MAJOR}.{PKG_MINOR}.{PKG_EXTRA}'.format(**VERSION_DATA)
+
+if SYSTEM == 'darwin':
+    VERSIONED_LIBRARY_FILE = "libcapstone.{PKG_MAJOR}.dylib".format(**VERSION_DATA)
+    LIBRARY_FILE = "libcapstone.dylib"
+    STATIC_LIBRARY_FILE = 'libcapstone.a'
+elif SYSTEM in ('win32', 'cygwin'):
+    VERSIONED_LIBRARY_FILE = "capstone.dll"
+    LIBRARY_FILE = "capstone.dll"
+    STATIC_LIBRARY_FILE = None
+else:
+    VERSIONED_LIBRARY_FILE = "libcapstone.so.{PKG_MAJOR}".format(**VERSION_DATA)
+    LIBRARY_FILE = "libcapstone.so"
+    STATIC_LIBRARY_FILE = 'libcapstone.a'
+
+def clean_bins():
+    shutil.rmtree(LIBS_DIR, ignore_errors=True)
+    shutil.rmtree(HEADERS_DIR, ignore_errors=True)
+
+def copy_sources():
+    """Copy the C sources into the source directory.
+    This rearranges the source files under the python distribution
+    directory.
+    """
+    src = []
+
+    try:
+        shutil.rmtree("src/")
+    except (IOError, OSError):
+        pass
+
+    shutil.copytree(os.path.join(BUILD_DIR, "arch"), os.path.join(SRC_DIR, "arch"))
+    shutil.copytree(os.path.join(BUILD_DIR, "include"), os.path.join(SRC_DIR, "include"))
+
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "*.[ch]")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "*.mk")))
+
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "Makefile")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "LICENSE*")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "README")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "*.TXT")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "RELEASE_NOTES")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "make.sh")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "CMakeLists.txt")))
+    src.extend(glob.glob(os.path.join(BUILD_DIR, "pkgconfig.mk")))
+
+    for filename in src:
+        outpath = os.path.join(SRC_DIR, os.path.basename(filename))
+        log.info("%s -> %s" % (filename, outpath))
+        shutil.copy(filename, outpath)
+
+def build_libraries():
+    """
+    Prepare the capstone directory for a binary distribution or installation.
+    Builds shared libraries and copies header files.
+
+    Will use a src/ dir if one exists in the current directory, otherwise assumes it's in the repo
+    """
+    cwd = os.getcwd()
+    clean_bins()
+    os.mkdir(HEADERS_DIR)
+    os.mkdir(LIBS_DIR)
+
+    # copy public headers
+    shutil.copytree(os.path.join(BUILD_DIR, 'include', 'capstone'), os.path.join(HEADERS_DIR, 'capstone'))
+
+    # if prebuilt libraries are available, use those and cancel build
+    if os.path.exists(os.path.join(ROOT_DIR, 'prebuilt', LIBRARY_FILE)) and \
+            (not STATIC_LIBRARY_FILE or os.path.exists(os.path.join(ROOT_DIR, 'prebuilt', STATIC_LIBRARY_FILE))):
+        shutil.copy(os.path.join(ROOT_DIR, 'prebuilt', LIBRARY_FILE), LIBS_DIR)
+        if STATIC_LIBRARY_FILE is not None:
+            shutil.copy(os.path.join(ROOT_DIR, 'prebuilt', STATIC_LIBRARY_FILE), LIBS_DIR)
+        return
+
+    os.chdir(BUILD_DIR)
+
+    # platform description refers at https://docs.python.org/2/library/sys.html#sys.platform
+    if SYSTEM == "win32":
+        # Windows build: this process requires few things:
+        #    - CMake + MSVC installed
+        #    - Run this command in an environment setup for MSVC
+        if not os.path.exists("build"): os.mkdir("build")
+        os.chdir("build")
+        # Do not build tests & static library
+        os.system('cmake -DCMAKE_BUILD_TYPE=RELEASE -DCAPSTONE_BUILD_TESTS=0 -DCAPSTONE_BUILD_STATIC=0 -G "NMake Makefiles" ..')
+        os.system("nmake")
+    else:   # Unix incl. cygwin
+        os.system("CAPSTONE_BUILD_CORE_ONLY=yes bash ./make.sh")
+
+    shutil.copy(VERSIONED_LIBRARY_FILE, os.path.join(LIBS_DIR, LIBRARY_FILE))
+
+    # only copy static library if it exists (it's a build option)
+    if STATIC_LIBRARY_FILE and os.path.exists(STATIC_LIBRARY_FILE):
+        shutil.copy(STATIC_LIBRARY_FILE, LIBS_DIR)
+    os.chdir(cwd)
+
+
+class custom_sdist(sdist):
+    def run(self):
+        clean_bins()
+        copy_sources()
+        return sdist.run(self)
+
+
+class custom_build(build):
+    def run(self):
+        if 'LIBCAPSTONE_PATH' in os.environ:
+            log.info('Skipping building C extensions since LIBCAPSTONE_PATH is set')
+        else:
+            log.info('Building C extensions')
+            build_libraries()
+        return build.run(self)
+
+
+class custom_bdist_egg(bdist_egg):
+    def run(self):
+        self.run_command('build')
+        return bdist_egg.run(self)
+
+def dummy_src():
+    return []
+
+cmdclass = {}
+cmdclass['build'] = custom_build
+cmdclass['sdist'] = custom_sdist
+cmdclass['bdist_egg'] = custom_bdist_egg
+
+try:
+    from setuptools.command.develop import develop
+    class custom_develop(develop):
+        def run(self):
+            log.info("Building C extensions")
+            build_libraries()
+            return develop.run(self)
+
+    cmdclass['develop'] = custom_develop
+except ImportError:
+    print("Proper 'develop' support unavailable.")
+
+if 'bdist_wheel' in sys.argv and '--plat-name' not in sys.argv:
+    idx = sys.argv.index('bdist_wheel') + 1
+    sys.argv.insert(idx, '--plat-name')
+    name = get_platform()
+    if 'linux' in name:
+        # linux_* platform tags are disallowed because the python ecosystem is fubar
+        # linux builds should be built in the centos 5 vm for maximum compatibility
+        # see https://github.com/pypa/manylinux
+        # see also https://github.com/angr/angr-dev/blob/master/bdist.sh
+        sys.argv.insert(idx + 1, 'manylinux1_' + platform.machine())
+    else:
+        # https://www.python.org/dev/peps/pep-0425/
+        sys.argv.insert(idx + 1, name.replace('.', '_').replace('-', '_'))
+
+setup(
+    provides=['capstone'],
+    packages=['capstone'],
+    name='capstone',
+    version=VERSION,
+    author='Nguyen Anh Quynh',
+    author_email='aquynh@gmail.com',
+    description='Capstone disassembly engine',
+    url='http://www.capstone-engine.org',
+    python_requires='>=2.7, !=3.0.*, !=3.1.*, !=3.2.*, !=3.3.*',
+    classifiers=[
+        'License :: OSI Approved :: BSD License',
+        'Programming Language :: Python :: 2',
+        'Programming Language :: Python :: 2.7',
+        'Programming Language :: Python :: 3',
+    ],
+    requires=['ctypes'],
+    cmdclass=cmdclass,
+    zip_safe=True,
+    include_package_data=True,
+    package_data={
+        "capstone": ["lib/*", "include/capstone/*"],
+    }
+)
diff --git a/capstone/bindings/python/setup_cython.py b/capstone/bindings/python/setup_cython.py
new file mode 100644
index 000000000..d36769a02
--- /dev/null
+++ b/capstone/bindings/python/setup_cython.py
@@ -0,0 +1,144 @@
+import os
+import sys
+import shutil
+
+from distutils import log
+from distutils.core import setup
+from distutils.extension import Extension
+from distutils.command.build import build
+from Cython.Distutils import build_ext
+
+SYSTEM = sys.platform
+VERSION = '4.0.0'
+
+# adapted from commit e504b81 of Nguyen Tan Cong
+# Reference: https://docs.python.org/2/library/platform.html#cross-platform
+IS_64BITS = sys.maxsize > 2**32
+
+# are we building from the repository or from a source distribution?
+ROOT_DIR = os.path.dirname(os.path.realpath(__file__))
+LIBS_DIR = os.path.join(ROOT_DIR, 'pyx', 'lib')
+HEADERS_DIR = os.path.join(ROOT_DIR, 'pyx', 'include')
+SRC_DIR = os.path.join(ROOT_DIR, 'src')
+BUILD_DIR = SRC_DIR if os.path.exists(SRC_DIR) else os.path.join(ROOT_DIR, '../..')
+PYPACKAGE_DIR = os.path.join(ROOT_DIR, 'capstone')
+CYPACKAGE_DIR = os.path.join(ROOT_DIR, 'pyx')
+
+if SYSTEM == 'darwin':
+    VERSIONED_LIBRARY_FILE = "libcapstone.4.dylib"
+    LIBRARY_FILE = "libcapstone.dylib"
+    STATIC_LIBRARY_FILE = 'libcapstone.a'
+elif SYSTEM in ('win32', 'cygwin'):
+    VERSIONED_LIBRARY_FILE = "capstone.dll"
+    LIBRARY_FILE = "capstone.dll"
+    STATIC_LIBRARY_FILE = None
+else:
+    VERSIONED_LIBRARY_FILE = "libcapstone.so.4"
+    LIBRARY_FILE = "libcapstone.so"
+    STATIC_LIBRARY_FILE = 'libcapstone.a'
+
+compile_args = ['-O3', '-fomit-frame-pointer', '-I' + HEADERS_DIR]
+link_args = ['-L' + LIBS_DIR]
+
+ext_module_names = ['arm', 'arm_const', 'arm64', 'arm64_const', 'm68k', 'm68k_const', 'm680x', 'm680x_const', 'mips', 'mips_const', 'ppc', 'ppc_const', 'x86', 'x86_const', 'sparc', 'sparc_const', 'systemz', 'sysz_const', 'xcore', 'xcore_const', 'tms320c64x', 'tms320c64x_const', 'evm', 'evm_const' ]
+
+ext_modules = [Extension("capstone.ccapstone",
+                         ["pyx/ccapstone.pyx"],
+                         libraries=["capstone"],
+                         extra_compile_args=compile_args,
+                         extra_link_args=link_args)]
+ext_modules += [Extension("capstone.%s" % name,
+                          ["pyx/%s.pyx" % name],
+                          extra_compile_args=compile_args,
+                          extra_link_args=link_args)
+                for name in ext_module_names]
+
+def clean_bins():
+    shutil.rmtree(LIBS_DIR, ignore_errors=True)
+    shutil.rmtree(HEADERS_DIR, ignore_errors=True)
+
+def copy_pysources():
+    for fname in os.listdir(PYPACKAGE_DIR):
+        if not fname.endswith('.py'):
+            continue
+
+        if fname == '__init__.py':
+            shutil.copy(os.path.join(PYPACKAGE_DIR, fname), os.path.join(CYPACKAGE_DIR, fname))
+        else:
+            shutil.copy(os.path.join(PYPACKAGE_DIR, fname), os.path.join(CYPACKAGE_DIR, fname + 'x'))
+
+def build_libraries():
+    """
+    Prepare the capstone directory for a binary distribution or installation.
+    Builds shared libraries and copies header files.
+
+    Will use a src/ dir if one exists in the current directory, otherwise assumes it's in the repo
+    """
+    cwd = os.getcwd()
+    clean_bins()
+    os.mkdir(HEADERS_DIR)
+    os.mkdir(LIBS_DIR)
+
+    # copy public headers
+    shutil.copytree(os.path.join(BUILD_DIR, 'include', 'capstone'), os.path.join(HEADERS_DIR, 'capstone'))
+
+    os.chdir(BUILD_DIR)
+
+    # platform description refers at https://docs.python.org/2/library/sys.html#sys.platform
+    if SYSTEM == "win32":
+        # Windows build: this process requires few things:
+        #    - CMake + MSVC installed
+        #    - Run this command in an environment setup for MSVC
+        if not os.path.exists("build"): os.mkdir("build")
+        os.chdir("build")
+        # Do not build tests & static library
+        os.system('cmake -DCMAKE_BUILD_TYPE=RELEASE -DCAPSTONE_BUILD_TESTS=0 -DCAPSTONE_BUILD_STATIC=0 -G "NMake Makefiles" ..')
+        os.system("nmake")
+    else:   # Unix incl. cygwin
+        os.system("CAPSTONE_BUILD_CORE_ONLY=yes bash ./make.sh")
+
+    shutil.copy(VERSIONED_LIBRARY_FILE, os.path.join(LIBS_DIR, LIBRARY_FILE))
+    if STATIC_LIBRARY_FILE: shutil.copy(STATIC_LIBRARY_FILE, LIBS_DIR)
+    os.chdir(cwd)
+
+
+class custom_build(build):
+    def run(self):
+        log.info('Copying python sources')
+        copy_pysources()
+        log.info('Building C extensions')
+        build_libraries()
+        return build.run(self)
+
+# clean package directory first
+#import os.path, shutil, sys
+#for f in sys.path:
+#    if f.endswith('packages'):
+#        pkgdir = os.path.join(f, 'capstone')
+#        #print(pkgdir)
+#        try:
+#            shutil.rmtree(pkgdir)
+#        except:
+#            pass
+
+setup(
+    provides     = ['capstone'],
+    package_dir  = {'capstone' : 'pyx'},
+    packages     = ['capstone'],
+    name         = 'capstone',
+    version      = VERSION,
+    cmdclass     = {'build_ext': build_ext, 'build': custom_build},
+    ext_modules  = ext_modules,
+    author       = 'Nguyen Anh Quynh',
+    author_email = 'aquynh@gmail.com',
+    description  = 'Capstone disassembly engine',
+    url          = 'http://www.capstone-engine.org',
+    classifiers  = [
+                'License :: OSI Approved :: BSD License',
+                'Programming Language :: Python :: 2',
+                ],
+    include_package_data=True,
+    package_data={
+        "capstone": ["lib/*", "include/capstone/*"],
+    }
+)
diff --git a/capstone/bindings/python/test_all.py b/capstone/bindings/python/test_all.py
new file mode 100755
index 000000000..a01fc6598
--- /dev/null
+++ b/capstone/bindings/python/test_all.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python
+
+import test_basic, test_arm, test_arm64, test_detail, test_lite, test_m68k, test_mips, \
+    test_ppc, test_x86, test_skipdata, test_sparc, test_systemz, test_tms320c64x, test_customized_mnem, \
+    test_m680x, test_mos65xx, test_xcore, test_riscv
+
+test_basic.test_class()
+test_arm.test_class()
+test_arm64.test_class()
+test_detail.test_class()
+test_lite.test_class()
+test_m68k.test_class()
+test_mips.test_class()
+test_mos65xx.test_class()
+test_ppc.test_class()
+test_sparc.test_class()
+test_systemz.test_class()
+test_x86.test_class()
+test_tms320c64x.test_class()
+test_m680x.test_class()
+test_skipdata.test_class()
+test_customized_mnem.test()
+test_xcore.test_class()
+test_riscv.test_class()
diff --git a/capstone/bindings/python/test_arm.py b/capstone/bindings/python/test_arm.py
new file mode 100755
index 000000000..8f11ce433
--- /dev/null
+++ b/capstone/bindings/python/test_arm.py
@@ -0,0 +1,151 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.arm import *
+from xprint import to_hex, to_x_32
+
+
+ARM_CODE = b"\x86\x48\x60\xf4\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3\x00\x02\x01\xf1\x05\x40\xd0\xe8\xf4\x80\x00\x00"
+ARM_CODE2 = b"\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c"
+THUMB_CODE = b"\x70\x47\x00\xf0\x10\xe8\xeb\x46\x83\xb0\xc9\x68\x1f\xb1\x30\xbf\xaf\xf3\x20\x84\x52\xf8\x23\xf0"
+THUMB_CODE2 = b"\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0\x18\xbf\xad\xbf\xf3\xff\x0b\x0c\x86\xf3\x00\x89\x80\xf3\x00\x8c\x4f\xfa\x99\xf6\xd0\xff\xa2\x01"
+THUMB_MCLASS = b"\xef\xf3\x02\x80"
+ARMV8 = b"\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
+
+all_tests = (
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "Thumb", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, ARM_CODE2, "Thumb-mixed", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "Thumb-2 & register named with numbers", CS_OPT_SYNTAX_NOREGNAME),
+        (CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS, THUMB_MCLASS, "Thumb-MClass", None),
+        (CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8, ARMV8, "Arm-V8", None),
+        )
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == ARM_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == ARM_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x_32(i.imm)))
+            if i.type == ARM_OP_PIMM:
+                print("\t\toperands[%u].type: P-IMM = %u" % (c, i.imm))
+            if i.type == ARM_OP_CIMM:
+                print("\t\toperands[%u].type: C-IMM = %u" % (c, i.imm))
+            if i.type == ARM_OP_FP:
+                print("\t\toperands[%u].type: FP = %f" % (c, i.fp))
+            if i.type == ARM_OP_SYSREG:
+                print("\t\toperands[%u].type: SYSREG = %u" % (c, i.reg))
+            if i.type == ARM_OP_SETEND:
+                if i.setend == ARM_SETEND_BE:
+                    print("\t\toperands[%u].type: SETEND = be" % c)
+                else:
+                    print("\t\toperands[%u].type: SETEND = le" % c)
+            if i.type == ARM_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" \
+                        % (c, insn.reg_name(i.mem.index)))
+                if i.mem.scale != 1:
+                    print("\t\t\toperands[%u].mem.scale: %u" \
+                        % (c, i.mem.scale))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x_32(i.mem.disp)))
+                if i.mem.lshift != 0:
+                    print("\t\t\toperands[%u].mem.lshift: 0x%s" \
+                        % (c, to_x_32(i.mem.lshift)))
+
+            if i.neon_lane != -1:
+                print("\t\toperands[%u].neon_lane = %u" % (c, i.neon_lane))
+
+            if i.access == CS_AC_READ:
+                print("\t\toperands[%u].access: READ\n" % (c))
+            elif i.access == CS_AC_WRITE:
+                print("\t\toperands[%u].access: WRITE\n" % (c))
+            elif i.access == CS_AC_READ | CS_AC_WRITE:
+                print("\t\toperands[%u].access: READ | WRITE\n" % (c))
+
+            if i.shift.type != ARM_SFT_INVALID and i.shift.value:
+                print("\t\t\tShift: %u = %u" \
+                    % (i.shift.type, i.shift.value))
+            if i.vector_index != -1:
+                print("\t\t\toperands[%u].vector_index = %u" %(c, i.vector_index))
+            if i.subtracted:
+                print("\t\t\toperands[%u].subtracted = True" %c)
+
+            c += 1
+
+    if insn.update_flags:
+        print("\tUpdate-flags: True")
+    if insn.writeback:
+        print("\tWrite-back: True")
+    if not insn.cc in [ARM_CC_AL, ARM_CC_INVALID]:
+        print("\tCode condition: %u" % insn.cc)
+    if insn.cps_mode:
+        print("\tCPSI-mode: %u" %(insn.cps_mode))
+    if insn.cps_flag:
+        print("\tCPSI-flag: %u" %(insn.cps_flag))
+    if insn.vector_data:
+        print("\tVector-data: %u" %(insn.vector_data))
+    if insn.vector_size:
+        print("\tVector-size: %u" %(insn.vector_size))
+    if insn.usermode:
+        print("\tUser-mode: True")
+    if insn.mem_barrier:
+        print("\tMemory-barrier: %u" %(insn.mem_barrier))
+
+    (regs_read, regs_write) = insn.regs_access()
+
+    if len(regs_read) > 0:
+        print("\tRegisters read:", end="")
+        for r in regs_read:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+    if len(regs_write) > 0:
+        print("\tRegisters modified:", end="")
+        for r in regs_write:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            if syntax is not None:
+                md.syntax = syntax
+            md.detail = True
+            for insn in md.disasm(code, 0x80001000):
+                print_insn_detail(insn)
+                print ()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_arm64.py b/capstone/bindings/python/test_arm64.py
new file mode 100755
index 000000000..6addbaeb3
--- /dev/null
+++ b/capstone/bindings/python/test_arm64.py
@@ -0,0 +1,126 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.arm64 import *
+from xprint import to_hex, to_x
+
+
+ARM64_CODE = b"\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"
+
+all_tests = (
+        (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64"),
+        )
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = -1
+        for i in insn.operands:
+            c += 1
+            if i.type == ARM64_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == ARM64_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == ARM64_OP_CIMM:
+                print("\t\toperands[%u].type: C-IMM = %u" % (c, i.imm))
+            if i.type == ARM64_OP_FP:
+                print("\t\toperands[%u].type: FP = %f" % (c, i.fp))
+            if i.type == ARM64_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" \
+                        % (c, insn.reg_name(i.mem.index)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+            if i.type == ARM64_OP_REG_MRS:
+                print("\t\toperands[%u].type: REG_MRS = 0x%x" % (c, i.reg))
+            if i.type == ARM64_OP_REG_MSR:
+                print("\t\toperands[%u].type: REG_MSR = 0x%x" % (c, i.reg))
+            if i.type == ARM64_OP_PSTATE:
+                print("\t\toperands[%u].type: PSTATE = 0x%x" % (c, i.pstate))
+            if i.type == ARM64_OP_SYS:
+                print("\t\toperands[%u].type: SYS = 0x%x" % (c, i.sys))
+            if i.type == ARM64_OP_PREFETCH:
+                print("\t\toperands[%u].type: PREFETCH = 0x%x" % (c, i.prefetch))
+            if i.type == ARM64_OP_BARRIER:
+                print("\t\toperands[%u].type: BARRIER = 0x%x" % (c, i.barrier))
+
+            if i.shift.type != ARM64_SFT_INVALID and i.shift.value:
+                print("\t\t\tShift: type = %u, value = %u" % (i.shift.type, i.shift.value))
+
+            if i.ext != ARM64_EXT_INVALID:
+                print("\t\t\tExt: %u" % i.ext)
+
+            if i.vas != ARM64_VAS_INVALID:
+                print("\t\t\tVector Arrangement Specifier: 0x%x" % i.vas)
+
+            if i.vector_index != -1:
+                print("\t\t\tVector Index: %u" % i.vector_index)
+
+            if i.access == CS_AC_READ:
+                print("\t\toperands[%u].access: READ\n" % (c))
+            elif i.access == CS_AC_WRITE:
+                print("\t\toperands[%u].access: WRITE\n" % (c))
+            elif i.access == CS_AC_READ | CS_AC_WRITE:
+                print("\t\toperands[%u].access: READ | WRITE\n" % (c))
+
+
+    if insn.writeback:
+        print("\tWrite-back: True")
+    if not insn.cc in [ARM64_CC_AL, ARM64_CC_INVALID]:
+        print("\tCode-condition: %u" % insn.cc)
+    if insn.update_flags:
+        print("\tUpdate-flags: True")
+
+    (regs_read, regs_write) = insn.regs_access()
+
+    if len(regs_read) > 0:
+        print("\tRegisters read:", end="")
+        for r in regs_read:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+    if len(regs_write) > 0:
+        print("\tRegisters modified:", end="")
+        for r in regs_write:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x2c):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_basic.py b/capstone/bindings/python/test_basic.py
new file mode 100755
index 000000000..22007c565
--- /dev/null
+++ b/capstone/bindings/python/test_basic.py
@@ -0,0 +1,112 @@
+#!/usr/bin/env python
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+import binascii
+import sys
+
+from xprint import to_hex
+
+_python3 = sys.version_info.major == 3
+
+
+X86_CODE16 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE32 = b"\xba\xcd\xab\x00\x00\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE64 = b"\x55\x48\x8b\x05\xb8\x13\x00\x00"
+ARM_CODE = b"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
+ARM_CODE2 = b"\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
+THUMB_CODE = b"\x70\x47\xeb\x46\x83\xb0\xc9\x68"
+THUMB_CODE2 = b"\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
+THUMB_MCLASS = b"\xef\xf3\x02\x80"
+ARMV8 = b"\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
+MIPS_CODE = b"\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
+MIPS_CODE2 = b"\x56\x34\x21\x34\xc2\x17\x01\x00"
+MIPS_32R6M = b"\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
+MIPS_32R6 = b"\xec\x80\x00\x19\x7c\x43\x22\xa0"
+ARM64_CODE = b"\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
+PPC_CODE = b"\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
+PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
+SPARC_CODE = b"\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
+SPARCV9_CODE = b"\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
+SYSZ_CODE = b"\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
+XCORE_CODE = b"\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
+M68K_CODE = b"\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75"
+TMS320C64X_CODE = b"\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24"
+M680X_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39"
+RISCV_CODE32 = b"\x37\x34\x00\x00\x97\x82\x00\x00\xef\x00\x80\x00\xef\xf0\x1f\xff\xe7\x00\x45\x00\xe7\x00\xc0\xff\x63\x05\x41\x00\xe3\x9d\x61\xfe\x63\xca\x93\x00\x63\x53\xb5\x00\x63\x65\xd6\x00\x63\x76\xf7\x00\x03\x88\x18\x00\x03\x99\x49\x00\x03\xaa\x6a\x00\x03\xcb\x2b\x01\x03\xdc\x8c\x01\x23\x86\xad\x03\x23\x9a\xce\x03\x23\x8f\xef\x01\x93\x00\xe0\x00\x13\xa1\x01\x01\x13\xb2\x02\x7d\x13\xc3\x03\xdd\x13\xe4\xc4\x12\x13\xf5\x85\x0c\x13\x96\xe6\x01\x13\xd7\x97\x01\x13\xd8\xf8\x40\x33\x89\x49\x01\xb3\x0a\x7b\x41\x33\xac\xac\x01\xb3\x3d\xde\x01\x33\xd2\x62\x40\xb3\x43\x94\x00\x33\xe5\xc5\x00\xb3\x76\xf7\x00\xb3\x54\x39\x01\xb3\x50\x31\x00\x33\x9f\x0f\x00"
+RISCV_CODE64 = b"\x13\x04\xa8\x7a"
+
+
+all_tests = (
+        (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX_ATT),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (MASM syntax)", CS_OPT_SYNTAX_MASM),
+        (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS, THUMB_MCLASS, "Thumb-MClass", None),
+        (CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8, ARMV8, "Arm-V8", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
+        (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", CS_OPT_SYNTAX_NOREGNAME),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, SPARC_CODE, "Sparc", None),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9, SPARCV9_CODE, "SparcV9", None),
+        (CS_ARCH_SYSZ, 0, SYSZ_CODE, "SystemZ", None),
+        (CS_ARCH_XCORE, 0, XCORE_CODE, "XCore", None),
+        (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE, "M68K (68040)", None),
+        (CS_ARCH_TMS320C64X, 0, TMS320C64X_CODE, "TMS320C64x", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6809, M680X_CODE, "M680X_M6809", None),
+        (CS_ARCH_RISCV, CS_MODE_RISCV32, RISCV_CODE32, "riscv32", None),
+        (CS_ARCH_RISCV, CS_MODE_RISCV64, RISCV_CODE64, "riscv64", None),
+)
+
+# ## Test cs_disasm_quick()
+def test_cs_disasm_quick():
+    for arch, mode, code, comment, syntax in all_tests:
+        print('*' * 40)
+        print("Platform: %s" % comment)
+        print("Disasm:"),
+        print(to_hex(code))
+        for insn in cs_disasm_quick(arch, mode, code, 0x1000):
+            print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+        print()
+
+
+# ## Test class Cs
+def test_class():
+    for arch, mode, code, comment, syntax in all_tests:
+        print('*' * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+
+            if syntax is not None:
+                md.syntax = syntax
+
+            for insn in md.disasm(code, 0x1000):
+                # bytes = binascii.hexlify(insn.bytes)
+                # print("0x%x:\t%s\t%s\t// hex-code: %s" %(insn.address, insn.mnemonic, insn.op_str, bytes))
+                print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+            print("0x%x:" % (insn.address + insn.size))
+            print()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+# test_cs_disasm_quick()
+# print ("*" * 40)
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_bpf.py b/capstone/bindings/python/test_bpf.py
new file mode 100755
index 000000000..4df7f3599
--- /dev/null
+++ b/capstone/bindings/python/test_bpf.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings
+# BPF tests by david942j <david942j@gmail.com>, 2019
+
+from __future__ import print_function
+from capstone import *
+from capstone.bpf import *
+from xprint import to_hex, to_x_32
+
+
+CBPF_CODE = b"\x94\x09\x00\x00\x37\x13\x03\x00\x87\x00\x00\x00\x00\x00\x00\x00\x07\x00\x00\x00\x00\x00\x00\x00\x16\x00\x00\x00\x00\x00\x00\x00\x80\x00\x00\x00\x00\x00\x00\x00"
+EBPF_CODE = b"\x97\x09\x00\x00\x37\x13\x03\x00\xdc\x02\x00\x00\x20\x00\x00\x00\x30\x00\x00\x00\x00\x00\x00\x00\xdb\x3a\x00\x01\x00\x00\x00\x00\x84\x02\x00\x00\x00\x00\x00\x00\x6d\x33\x17\x02\x00\x00\x00\x00"
+
+all_tests = (
+        (CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_CLASSIC, CBPF_CODE, "cBPF Le", None),
+        (CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_EXTENDED, EBPF_CODE, "eBPF Le", None),
+        )
+
+ext_name = {}
+ext_name[BPF_EXT_LEN] = '#len'
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.groups) > 0:
+        print('\tGroups: ' + ' '.join(map(lambda g: insn.group_name(g), insn.groups)))
+
+    print("\tOperand count: %u" % len(insn.operands))
+    for c, op in enumerate(insn.operands):
+        print("\t\toperands[%u].type: " % c, end='')
+        if op.type == BPF_OP_REG:
+            print("REG = " + insn.reg_name(op.reg))
+        elif op.type == BPF_OP_IMM:
+            print("IMM = " + hex(op.imm)[:-1])
+        elif op.type == BPF_OP_OFF:
+            print("OFF = +0x" + to_x_32(op.off))
+        elif op.type == BPF_OP_MEM:
+            print("MEM")
+            if op.mem.base != 0:
+                print("\t\t\toperands[%u].mem.base: REG = %s" \
+                    % (c, insn.reg_name(op.mem.base)))
+            print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                % (c, to_x_32(op.mem.disp)))
+        elif op.type == BPF_OP_MMEM:
+            print("MMEM = 0x" + to_x_32(op.mmem))
+        elif op.type == BPF_OP_MSH:
+            print("MSH = 4*([0x%s]&0xf)" % to_x_32(op.msh))
+        elif op.type == BPF_OP_EXT:
+            print("EXT = " + ext_name[op.ext])
+
+    (regs_read, regs_write) = insn.regs_access()
+
+    if len(regs_read) > 0:
+        print("\tRegisters read:", end="")
+        for r in regs_read:
+            print(" %s" % insn.reg_name(r), end="")
+        print("")
+
+    if len(regs_write) > 0:
+        print("\tRegisters modified:", end="")
+        for r in regs_write:
+            print(" %s" % insn.reg_name(r), end="")
+        print("")
+
+def test_class():
+
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            if syntax is not None:
+                md.syntax = syntax
+            md.detail = True
+            for insn in md.disasm(code, 0x0):
+                print_insn_detail(insn)
+                print ()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_customized_mnem.py b/capstone/bindings/python/test_customized_mnem.py
new file mode 100755
index 000000000..a09cc727f
--- /dev/null
+++ b/capstone/bindings/python/test_customized_mnem.py
@@ -0,0 +1,40 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.x86 import *
+from xprint import to_hex
+
+
+X86_CODE32 = b"\x75\x01"
+
+
+def print_insn(md, code):
+    print("%s\t" % to_hex(code, False), end="")
+
+    for insn in md.disasm(code, 0x1000):
+        print("\t%s\t%s\n" % (insn.mnemonic, insn.op_str))
+
+
+def test():
+    try:
+        md = Cs(CS_ARCH_X86, CS_MODE_32)
+
+        print("Disassemble X86 code with default instruction mnemonic")
+        print_insn(md, X86_CODE32)
+
+        print("Now customize engine to change mnemonic from 'JNE' to 'JNZ'")
+        md.mnemonic_setup(X86_INS_JNE, "jnz")
+        print_insn(md, X86_CODE32)
+
+        print("Reset engine to use the default mnemonic")
+        md.mnemonic_setup(X86_INS_JNE, None)
+        print_insn(md, X86_CODE32)
+    except CsError as e:
+        print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test()
diff --git a/capstone/bindings/python/test_detail.py b/capstone/bindings/python/test_detail.py
new file mode 100755
index 000000000..e7cc6a882
--- /dev/null
+++ b/capstone/bindings/python/test_detail.py
@@ -0,0 +1,108 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+
+
+X86_CODE16 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE32 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE64 = b"\x55\x48\x8b\x05\xb8\x13\x00\x00"
+ARM_CODE = b"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
+ARM_CODE2 = b"\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
+THUMB_CODE = b"\x70\x47\xeb\x46\x83\xb0\xc9\x68"
+THUMB_CODE2 = b"\x4f\xf0\x00\x01\xbd\xe8\x00\x88"
+THUMB_MCLASS = b"\xef\xf3\x02\x80"
+ARMV8 = b"\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
+MIPS_CODE = b"\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
+MIPS_CODE2 = b"\x56\x34\x21\x34\xc2\x17\x01\x00"
+MIPS_32R6M = b"\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
+MIPS_32R6 = b"\xec\x80\x00\x19\x7c\x43\x22\xa0"
+ARM64_CODE = b"\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"
+PPC_CODE = b"\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
+PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
+SPARC_CODE = b"\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
+SPARCV9_CODE = b"\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
+SYSZ_CODE = b"\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
+XCORE_CODE = b"\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
+M68K_CODE = b"\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75"
+M680X_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39"
+
+all_tests = (
+        (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX_ATT),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS, THUMB_MCLASS, "Thumb-MClass", None),
+        (CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8, ARMV8, "Arm-V8", None),
+        (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", None),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, SPARC_CODE, "Sparc", None),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9, SPARCV9_CODE, "SparcV9", None),
+        (CS_ARCH_SYSZ, 0, SYSZ_CODE, "SystemZ", None),
+        (CS_ARCH_XCORE, 0, XCORE_CODE, "XCore", None),
+        (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE, "M68K (68040)", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6809, M680X_CODE, "M680X_M6809", None),
+)
+
+
+def print_detail(insn):
+    print("0x%x:\t%s\t%s  // insn-ID: %u, insn-mnem: %s" \
+        % (insn.address, insn.mnemonic, insn.op_str, insn.id, \
+        insn.insn_name()))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.regs_read) > 0:
+        print("\tImplicit registers read: ", end=''),
+        for m in insn.regs_read:
+            print("%s " % insn.reg_name(m), end=''),
+        print()
+
+    if len(insn.regs_write) > 0:
+        print("\tImplicit registers modified: ", end=''),
+        for m in insn.regs_write:
+            print("%s " % insn.reg_name(m), end=''),
+        print()
+
+    if len(insn.groups) > 0:
+        print("\tThis instruction belongs to groups: ", end=''),
+        for m in insn.groups:
+            print("%s " % insn.group_name(m), end=''),
+        print()
+
+
+# ## Test class Cs
+def test_class():
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print('*' * 40)
+        print("Platform: %s" % comment)
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+
+            if syntax is not None:
+                md.syntax = syntax
+
+            for insn in md.disasm(code, 0x1000):
+                print_detail(insn)
+
+            print()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_evm.py b/capstone/bindings/python/test_evm.py
new file mode 100755
index 000000000..81f646423
--- /dev/null
+++ b/capstone/bindings/python/test_evm.py
@@ -0,0 +1,29 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from xprint import to_hex
+
+CODE = "\x60\x61\x50"
+cs = Cs(CS_ARCH_EVM, 0)
+cs.detail = True
+
+print("Platform: EVM")
+print("Code: %s" %to_hex(CODE))
+print("Disasm:")
+
+for i in cs.disasm(CODE, 0x80001000):
+    print("0x%x:\t%s\t%s" %(i.address, i.mnemonic, i.op_str))
+    if i.pop > 0:
+        print("\tPop:     %u" %i.pop)
+    if i.push > 0:
+        print("\tPush:    %u" %i.push)
+    if i.fee > 0:
+        print("\tGas fee: %u" %i.fee)
+    if len(i.groups) > 0:
+        print("\tGroups: ", end=''),
+        for m in i.groups:
+            print("%s " % i.group_name(m), end=''),
+        print()
diff --git a/capstone/bindings/python/test_lite.py b/capstone/bindings/python/test_lite.py
new file mode 100755
index 000000000..41b16cadd
--- /dev/null
+++ b/capstone/bindings/python/test_lite.py
@@ -0,0 +1,99 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+from xprint import to_hex
+
+
+X86_CODE16 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE32 = b"\xba\xcd\xab\x00\x00\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
+X86_CODE64 = b"\x55\x48\x8b\x05\xb8\x13\x00\x00"
+ARM_CODE = b"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
+ARM_CODE2 = b"\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
+THUMB_CODE = b"\x70\x47\xeb\x46\x83\xb0\xc9\x68"
+THUMB_CODE2 = b"\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
+THUMB_MCLASS = b"\xef\xf3\x02\x80"
+ARMV8 = b"\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
+MIPS_CODE = b"\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
+MIPS_CODE2 = b"\x56\x34\x21\x34\xc2\x17\x01\x00"
+MIPS_32R6M = b"\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
+MIPS_32R6 = b"\xec\x80\x00\x19\x7c\x43\x22\xa0"
+ARM64_CODE = b"\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
+PPC_CODE = b"\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
+PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
+SPARC_CODE = b"\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
+SPARCV9_CODE = b"\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
+SYSZ_CODE = b"\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
+XCORE_CODE = b"\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
+M68K_CODE = b"\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75"
+M680X_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39"
+
+all_tests = (
+        (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX_ATT),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (MASM syntax)", CS_OPT_SYNTAX_MASM),
+        (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", None),
+        (CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS, THUMB_MCLASS, "Thumb-MClass", None),
+        (CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8, ARMV8, "Arm-V8", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
+        (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", CS_OPT_SYNTAX_NOREGNAME),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, SPARC_CODE, "Sparc", None),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9, SPARCV9_CODE, "SparcV9", None),
+        (CS_ARCH_SYSZ, 0, SYSZ_CODE, "SystemZ", None),
+        (CS_ARCH_XCORE, 0, XCORE_CODE, "XCore", None),
+        (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE, "M68K (68040)", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6809, M680X_CODE, "M680X_M6809", None),
+        )
+
+
+# ## Test cs_disasm_quick()
+def test_cs_disasm_quick():
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print('*' * 40)
+        print("Platform: %s" % comment)
+        print("Disasm:"),
+        print(to_hex(code))
+        for (addr, size, mnemonic, op_str) in cs_disasm_lite(arch, mode, code, 0x1000):
+            print("0x%x:\t%s\t%s" % (addr, mnemonic, op_str))
+        print()
+
+
+# ## Test class Cs
+def test_class():
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print('*' * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+
+            if syntax is not None:
+                md.syntax = syntax
+
+            for (addr, size, mnemonic, op_str) in md.disasm_lite(code, 0x1000):
+                print("0x%x:\t%s\t%s" % (addr, mnemonic, op_str))
+
+            print("0x%x:" % (addr + size))
+            print()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+# test_cs_disasm_quick()
+# print "*" * 40
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_m680x.py b/capstone/bindings/python/test_m680x.py
new file mode 100755
index 000000000..efe28a3dc
--- /dev/null
+++ b/capstone/bindings/python/test_m680x.py
@@ -0,0 +1,159 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net>
+
+from __future__ import print_function
+import sys
+from capstone import *
+from capstone.m680x import *
+_python3 = sys.version_info.major == 3
+
+
+s_access = (
+	"UNCHANGED", "READ", "WRITE", "READ | WRITE",
+	)
+
+M6800_CODE = b"\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39"
+
+M6801_CODE = b"\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39"
+M6805_CODE = b"\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe"
+M6808_CODE = b"\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f"
+HCS08_CODE = b"\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82"
+HD6301_CODE = b"\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39"
+M6809_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00"
+M6811_CODE = b"\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f"
+CPU12_CODE = b"\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00"
+HD6309_CODE = b"\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00"
+
+all_tests = (
+        (CS_ARCH_M680X, CS_MODE_M680X_6301, HD6301_CODE, "M680X_HD6301", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6309, HD6309_CODE, "M680X_HD6309", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6800, M6800_CODE, "M680X_M6800", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6801, M6801_CODE, "M680X_M6801", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6805, M6805_CODE, "M680X_M68HC05", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6808, M6808_CODE, "M680X_M68HC08", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6809, M6809_CODE, "M680X_M6809", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_6811, M6811_CODE, "M680X_M68HC11", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_CPU12, CPU12_CODE, "M680X_CPU12", None),
+        (CS_ARCH_M680X, CS_MODE_M680X_HCS08, HCS08_CODE, "M680X_HCS08", None),
+        )
+
+# print hex dump from string all upper case
+def to_hex_uc(string):
+    if _python3:
+        return " ".join("0x%02x" % c for c in string)
+    else:
+        return " ".join("0x%02x" % ord(c) for c in string)
+
+# print short hex dump from byte array all upper case
+def to_hex_short_uc(byte_array):
+    return "".join("%02x" % b for b in byte_array)
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    #print("0x%x:\t%s\t%s\t%s" % (insn.address, binascii.hexlify(bytearray(insn.bytes)), \
+    print("0x%04x: %s\t%s\t%s" % (insn.address, to_hex_short_uc(insn.bytes), \
+	insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == M680X_OP_REGISTER:
+                comment = "";
+                if (((c == 0) and (insn.flags & M680X_FIRST_OP_IN_MNEM)) or
+                    ((c == 1) and (insn.flags & M680X_SECOND_OP_IN_MNEM))):
+                    comment = " (in mnemonic)";
+                print("\t\toperands[%u].type: REGISTER = %s%s" % (c,
+                    insn.reg_name(i.reg), comment))
+            if i.type == M680X_OP_CONSTANT:
+                print("\t\toperands[%u].type: CONSTANT = %u" % (c, i.const_val))
+            if i.type == M680X_OP_IMMEDIATE:
+                print("\t\toperands[%u].type: IMMEDIATE = #%d" % (c, i.imm))
+            if i.type == M680X_OP_DIRECT:
+                print("\t\toperands[%u].type: DIRECT = 0x%02x" % (c, i.direct_addr))
+            if i.type == M680X_OP_EXTENDED:
+                if i.ext.indirect:
+                    indirect = "INDIRECT"
+                else:
+                    indirect = ""
+                print("\t\toperands[%u].type: EXTENDED %s = 0x%04x" % (c, indirect, i.ext.address))
+            if i.type == M680X_OP_RELATIVE:
+                print("\t\toperands[%u].type: RELATIVE = 0x%04x" % (c, i.rel.address))
+            if i.type == M680X_OP_INDEXED:
+                if (i.idx.flags & M680X_IDX_INDIRECT):
+                    indirect = " INDIRECT"
+                else:
+                    indirect = ""
+                print("\t\toperands[%u].type: INDEXED%s" % (c, indirect))
+                if i.idx.base_reg != M680X_REG_INVALID:
+                    print("\t\t\tbase register: %s" % insn.reg_name(i.idx.base_reg))
+                if i.idx.offset_reg != M680X_REG_INVALID:
+                    print("\t\t\toffset register: %s" % insn.reg_name(i.idx.offset_reg))
+                if (i.idx.offset_bits != 0) and (i.idx.offset_reg == M680X_REG_INVALID) and (i.idx.inc_dec == 0):
+                    print("\t\t\toffset: %u" % i.idx.offset)
+                    if i.idx.base_reg == M680X_REG_PC:
+                        print("\t\t\toffset address: 0x%04x" % i.idx.offset_addr)
+                    print("\t\t\toffset bits: %u" % i.idx.offset_bits)
+                if i.idx.inc_dec != 0:
+                    if i.idx.flags & M680X_IDX_POST_INC_DEC:
+                       s_post_pre = "post"
+                    else:
+                       s_post_pre = "pre"
+                    if i.idx.inc_dec > 0:
+                        s_inc_dec = "increment"
+                    else:
+                        s_inc_dec = "decrement"
+                    print("\t\t\t%s %s: %d" %
+			(s_post_pre, s_inc_dec, abs(i.idx.inc_dec)))
+            if (i.size != 0):
+                print("\t\t\tsize: %d" % i.size)
+            if (i.access != CS_AC_INVALID):
+                print("\t\t\taccess: %s" % s_access[i.access])
+
+            c += 1
+
+    (regs_read, regs_write) = insn.regs_access()
+
+    if len(regs_read) > 0:
+        print("\tRegisters read:", end="")
+        for r in regs_read:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+    if len(regs_write) > 0:
+        print("\tRegisters modified:", end="")
+        for r in regs_write:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+    if len(insn.groups) > 0:
+         print("\tgroups_count: %u" % len(insn.groups))
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print("*" * 20)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex_uc(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            if syntax is not None:
+                md.syntax = syntax
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_m68k.py b/capstone/bindings/python/test_m68k.py
new file mode 100755
index 000000000..557369cca
--- /dev/null
+++ b/capstone/bindings/python/test_m68k.py
@@ -0,0 +1,120 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nicolas PLANEL <nplanel@gmail.com>
+from __future__ import print_function
+from capstone import *
+from capstone.m68k import *
+from xprint import to_hex, to_x
+
+M68K_CODE = b"\x4c\x00\x54\x04\x48\xe7\xe0\x30\x4c\xdf\x0c\x07\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4e\xb9\x00\x00\x00\x12\x4e\x75"
+
+all_tests = (
+        (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE, "M68K"),
+)
+
+s_addressing_modes = {
+	0:  "<invalid mode>",
+
+	1:  "Register Direct - Data",
+	2:  "Register Direct - Address",
+
+	3:  "Register Indirect - Address",
+	4:  "Register Indirect - Address with Postincrement",
+	5:  "Register Indirect - Address with Predecrement",
+	6:  "Register Indirect - Address with Displacement",
+
+	7:  "Address Register Indirect With Index - 8-bit displacement",
+	8:  "Address Register Indirect With Index - Base displacement",
+
+	9:  "Memory indirect - Postindex",
+	10: "Memory indirect - Preindex",
+
+	11: "Program Counter Indirect - with Displacement",
+
+	12: "Program Counter Indirect with Index - with 8-Bit Displacement",
+	13: "Program Counter Indirect with Index - with Base Displacement",
+
+	14: "Program Counter Memory Indirect - Postindexed",
+	15: "Program Counter Memory Indirect - Preindexed",
+
+	16: "Absolute Data Addressing  - Short",
+	17: "Absolute Data Addressing  - Long",
+	18: "Immediate value",
+    
+    19: "Branch Displacement",
+}
+
+def print_read_write_regs(insn):
+    for m in insn.regs_read:
+        print("\treading from reg: %s" % insn.reg_name(m))
+
+    for m in insn.regs_write:
+        print("\twriting to reg:   %s" % insn.reg_name(m))
+
+def print_insn_detail(insn):
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % (len(insn.operands)))
+        print("\tgroups_count: %u" % len(insn.groups))
+
+    print_read_write_regs(insn)
+
+    for i, op in enumerate(insn.operands):
+        if op.type == M68K_OP_REG:
+            print("\t\toperands[%u].type: REG = %s" % (i, insn.reg_name(op.reg)))
+        elif op.type == M68K_OP_IMM:
+            print("\t\toperands[%u].type: IMM = 0x%x" % (i, op.imm & 0xffffffff))
+        elif op.type == M68K_OP_MEM:
+            print("\t\toperands[%u].type: MEM" % (i))
+            if op.mem.base_reg != M68K_REG_INVALID:
+                print("\t\t\toperands[%u].mem.base: REG = %s" % (i, insn.reg_name(op.mem.base_reg)))
+            if op.mem.index_reg != M68K_REG_INVALID:
+                print("\t\t\toperands[%u].mem.index: REG = %s" % (i, insn.reg_name(op.mem.index_reg)))
+                mem_index_str = "w"
+                if op.mem.index_size > 0:
+                    mem_index_str = "l"
+                print("\t\t\toperands[%u].mem.index: size = %s" % (i, mem_index_str))
+            if op.mem.disp != 0:
+                print("\t\t\toperands[%u].mem.disp: 0x%x" % (i, op.mem.disp))
+            if op.mem.scale != 0:
+                print("\t\t\toperands[%u].mem.scale: %d" % (i, op.mem.scale))
+            print("\t\taddress mode: %s" % (s_addressing_modes[op.address_mode]))
+        elif op.type == M68K_OP_FP_SINGLE:
+            print("\t\toperands[%u].type: FP_SINGLE" % i)
+            print("\t\toperands[%u].simm: %f", i, op.simm)
+        elif op.type == M68K_OP_FP_DOUBLE:
+            print("\t\toperands[%u].type: FP_DOUBLE" % i)
+            print("\t\toperands[%u].dimm: %lf", i, op.dimm)
+        elif op.type == M68K_OP_BR_DISP:
+            print("\t\toperands[%u].br_disp.disp: 0x%x" % (i, op.br_disp.disp))
+            print("\t\toperands[%u].br_disp.disp_size: %d" % (i, op.br_disp.disp_size))
+    print()
+
+# ## Test class Cs
+def test_class():
+    address = 0x01000
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s " % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            last_address = 0
+            for insn in md.disasm(code, address):
+                last_address = insn.address + insn.size
+                print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+                print_insn_detail(insn)
+            print("0x%x:\n" % (last_address))
+
+        except CsError as e:
+            print("ERROR: %s" % e.__str__())
+
+if __name__ == '__main__':
+    test_class()
+
+
+
+
+
diff --git a/capstone/bindings/python/test_mips.py b/capstone/bindings/python/test_mips.py
new file mode 100755
index 000000000..976380c2d
--- /dev/null
+++ b/capstone/bindings/python/test_mips.py
@@ -0,0 +1,71 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+from capstone.mips import *
+from xprint import to_hex, to_x
+
+
+MIPS_CODE = b"\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
+MIPS_CODE2 = b"\x56\x34\x21\x34\xc2\x17\x01\x00"
+MIPS_32R6M = b"\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
+MIPS_32R6 = b"\xec\x80\x00\x19\x7c\x43\x22\xa0"
+
+all_tests = (
+        (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)"),
+        (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)"),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)"),
+        (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = -1
+        for i in insn.operands:
+            c += 1
+            if i.type == MIPS_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == MIPS_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == MIPS_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+
+
+# ## Test class Cs
+def test_class():
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print()
+
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_mos65xx.py b/capstone/bindings/python/test_mos65xx.py
new file mode 100755
index 000000000..5b667b1f0
--- /dev/null
+++ b/capstone/bindings/python/test_mos65xx.py
@@ -0,0 +1,83 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Sebastian Macke <Sebastian Macke>
+from __future__ import print_function
+from capstone import *
+from capstone.mos65xx import *
+from xprint import to_hex, to_x
+
+MOS65XX_CODE = b"\x0d\x34\x12\x00\x81\x65\x6c\x01\x00\x85\xFF\x10\x00\x19\x42\x42\x00\x49\x42"
+
+address_modes=[
+    "No address mode",
+    "implied",
+    "accumulator",
+    "immediate value",
+    "relative",
+    "interrupt signature",
+    "block move",
+    "zero page",
+    "zero page indexed with x",
+    "zero page indexed with y",
+    "relative bit branch",
+    "zero page indirect",
+    "zero page indexed with x indirect",
+    "zero page indirect indexed with y",
+    "zero page indirect long",
+    "zero page indirect long indexed with y",
+    "absolute",
+    "absolute indexed with x",
+    "absolute indexed with y",
+    "absolute indirect",
+    "absolute indexed with x indirect",
+    "absolute indirect long",
+    "absolute long",
+    "absolute long indexed with x",
+    "stack relative",
+    "stack relative indirect indexed with y",
+];
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+    print("\taddress mode: %s" % (address_modes[insn.am]))
+    print("\tmodifies flags: %s" % ('true' if insn.modifies_flags != 0 else 'false'))
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = -1
+        for i in insn.operands:
+            c += 1
+            if i.type == MOS65XX_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == MOS65XX_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == MOS65XX_OP_MEM:
+                print("\t\toperands[%u].type: MEM = 0x%s" % (c, to_x(i.mem)))
+
+
+# ## Test class Cs
+def test_class():
+    print("*" * 16)
+    print("Platform: %s" % "MOS65XX")
+    print("Code: %s" % to_hex(MOS65XX_CODE))
+    print("Disasm:")
+
+    try:
+        md = Cs(CS_ARCH_MOS65XX, 0)
+        md.detail = True
+        for insn in md.disasm(MOS65XX_CODE, 0x1000):
+            print_insn_detail(insn)
+            print()
+
+        print("0x%x:\n" % (insn.address + insn.size))
+    except CsError as e:
+        print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_ppc.py b/capstone/bindings/python/test_ppc.py
new file mode 100755
index 000000000..1a069bac2
--- /dev/null
+++ b/capstone/bindings/python/test_ppc.py
@@ -0,0 +1,83 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+from capstone.ppc import *
+from xprint import to_hex, to_x_32
+
+PPC_CODE = b"\x43\x20\x0c\x07\x41\x56\xff\x17\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14"
+PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
+
+all_tests = (
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64"),
+        (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX"),
+        )
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == PPC_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == PPC_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x_32(i.imm)))
+            if i.type == PPC_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x_32(i.mem.disp)))
+            if i.type == PPC_OP_CRX:
+                print("\t\toperands[%u].type: CRX" % c)
+                print("\t\t\toperands[%u].crx.scale: = %u" \
+                        % (c, i.crx.scale))
+                if i.crx.reg != 0:
+                    print("\t\t\toperands[%u].crx.reg: REG = %s" \
+                        % (c, insn.reg_name(i.crx.reg)))
+                if i.crx.cond != 0:
+                    print("\t\t\toperands[%u].crx.cond: 0x%x" \
+                        % (c, i.crx.cond))
+            c += 1
+
+    if insn.bc:
+        print("\tBranch code: %u" % insn.bc)
+    if insn.bh:
+        print("\tBranch hint: %u" % insn.bh)
+    if insn.update_cr0:
+        print("\tUpdate-CR0: True")
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_riscv.py b/capstone/bindings/python/test_riscv.py
new file mode 100755
index 000000000..21bd03cf2
--- /dev/null
+++ b/capstone/bindings/python/test_riscv.py
@@ -0,0 +1,67 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.riscv import *
+from xprint import to_x, to_hex
+
+RISCV_CODE32 = b"\x37\x34\x00\x00\x97\x82\x00\x00\xef\x00\x80\x00\xef\xf0\x1f\xff\xe7\x00\x45\x00\xe7\x00\xc0\xff\x63\x05\x41\x00\xe3\x9d\x61\xfe\x63\xca\x93\x00\x63\x53\xb5\x00\x63\x65\xd6\x00\x63\x76\xf7\x00\x03\x88\x18\x00\x03\x99\x49\x00\x03\xaa\x6a\x00\x03\xcb\x2b\x01\x03\xdc\x8c\x01\x23\x86\xad\x03\x23\x9a\xce\x03\x23\x8f\xef\x01\x93\x00\xe0\x00\x13\xa1\x01\x01\x13\xb2\x02\x7d\x13\xc3\x03\xdd\x13\xe4\xc4\x12\x13\xf5\x85\x0c\x13\x96\xe6\x01\x13\xd7\x97\x01\x13\xd8\xf8\x40\x33\x89\x49\x01\xb3\x0a\x7b\x41\x33\xac\xac\x01\xb3\x3d\xde\x01\x33\xd2\x62\x40\xb3\x43\x94\x00\x33\xe5\xc5\x00\xb3\x76\xf7\x00\xb3\x54\x39\x01\xb3\x50\x31\x00\x33\x9f\x0f\x00"
+RISCV_CODE64 = b"\x13\x04\xa8\x7a"
+
+all_tests = (
+        (CS_ARCH_RISCV, CS_MODE_RISCV32, RISCV_CODE32, "riscv32"),
+        (CS_ARCH_RISCV, CS_MODE_RISCV64, RISCV_CODE64, "riscv64"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == RISCV_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == RISCV_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == RISCV_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+            c += 1
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" %comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" %e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_skipdata.py b/capstone/bindings/python/test_skipdata.py
new file mode 100755
index 000000000..726a086dd
--- /dev/null
+++ b/capstone/bindings/python/test_skipdata.py
@@ -0,0 +1,73 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+import binascii
+from xprint import to_hex
+
+
+X86_CODE32 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x00\x91\x92"
+RANDOM_CODE = b"\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
+
+all_tests = (
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", None),
+        (CS_ARCH_ARM, CS_MODE_ARM, RANDOM_CODE, "Arm", None),
+)
+
+
+# Sample callback for SKIPDATA option
+def testcb(buffer, size, offset, userdata):
+    # always skip 2 bytes of data
+    return 2
+
+
+# ## Test class Cs
+def test_class():
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print('*' * 16)
+        print("Platform: %s" %comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+
+            if syntax is not None:
+                md.syntax = syntax
+
+            md.skipdata = True
+
+            # Default "data" instruction's name is ".byte". To rename it to "db", just use
+            # the code below.
+            md.skipdata_setup = ("db", None, None)
+
+            # NOTE: This example ignores SKIPDATA's callback (first None) & user_data (second None)
+            # Can also use dedicated setter
+            #md.skipdata_mnem = 'db'
+
+            # To customize the SKIPDATA callback, use the line below.
+            #md.skipdata_setup = (".db", testcb, None)
+
+            # Or use dedicated setter with custom parameter
+            #md.skipdata_callback = (testcb, 42)
+
+            # Or provide just a function
+            #md.skipdata_callback = testcb
+            # Note that reading this property will always return a tuple
+            #assert md.skipdata_callback == (testcb, None)
+
+            for insn in md.disasm(code, 0x1000):
+                #bytes = binascii.hexlify(insn.bytes)
+                #print("0x%x:\t%s\t%s\t// hex-code: %s" %(insn.address, insn.mnemonic, insn.op_str, bytes))
+                print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+            print("0x%x:" % (insn.address + insn.size))
+            print
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_sparc.py b/capstone/bindings/python/test_sparc.py
new file mode 100755
index 000000000..96fae5bd2
--- /dev/null
+++ b/capstone/bindings/python/test_sparc.py
@@ -0,0 +1,75 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.sparc import *
+from xprint import to_hex, to_x_32
+
+
+SPARC_CODE = b"\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
+SPARCV9_CODE = b"\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
+
+all_tests = (
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, SPARC_CODE, "Sparc"),
+        (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN+CS_MODE_V9, SPARCV9_CODE, "SparcV9"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == SPARC_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == SPARC_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x_32(i.imm)))
+            if i.type == SPARC_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" \
+                        % (c, insn.reg_name(i.mem.index)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x_32(i.mem.disp)))
+            c += 1
+
+    if insn.cc:
+        print("\tCode condition: %u" % insn.cc)
+    if insn.hint:
+        print("\tHint code: %u" % insn.hint)
+
+
+# ## Test class Cs
+def test_class():
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" %e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_systemz.py b/capstone/bindings/python/test_systemz.py
new file mode 100755
index 000000000..ca9deb729
--- /dev/null
+++ b/capstone/bindings/python/test_systemz.py
@@ -0,0 +1,77 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.systemz import *
+from xprint import to_x, to_hex
+
+
+SYSZ_CODE = b"\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78\xec\x18\x00\x00\xc1\x7f"
+
+all_tests = (
+        (CS_ARCH_SYSZ, 0, SYSZ_CODE, "SystemZ"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == SYSZ_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == SYSZ_OP_ACREG:
+                print("\t\toperands[%u].type: ACREG = %u" % (c, i.reg))
+            if i.type == SYSZ_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == SYSZ_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" \
+                        % (c, insn.reg_name(i.mem.index)))
+                if i.mem.length != 0:
+                    print("\t\t\toperands[%u].mem.length: 0x%s" \
+                        % (c, to_x(i.mem.length)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+            c += 1
+
+    if insn.cc:
+        print("\tConditional code: %u" % insn.cc)
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" %comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" %e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_tms320c64x.py b/capstone/bindings/python/test_tms320c64x.py
new file mode 100755
index 000000000..4960401c4
--- /dev/null
+++ b/capstone/bindings/python/test_tms320c64x.py
@@ -0,0 +1,93 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Fotis Loukos <me@fotisl.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.tms320c64x import *
+from xprint import to_x, to_hex, to_x_32
+
+
+TMS320C64X_CODE = b"\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24"
+
+all_tests = (
+        (CS_ARCH_TMS320C64X, 0, TMS320C64X_CODE, "TMS320C64x"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == TMS320C64X_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == TMS320C64X_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == TMS320C64X_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.disptype == TMS320C64X_MEM_DISP_INVALID:
+                    print("\t\t\toperands[%u].mem.disptype: Invalid" % (c))
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+                if i.mem.disptype == TMS320C64X_MEM_DISP_CONSTANT:
+                    print("\t\t\toperands[%u].mem.disptype: Constant" % (c))
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+                if i.mem.disptype == TMS320C64X_MEM_DISP_REGISTER:
+                    print("\t\t\toperands[%u].mem.disptype: Register" % (c))
+                    print("\t\t\toperands[%u].mem.disp: %s" \
+                        % (c, insn.reg_name(i.mem.disp)))
+                print("\t\t\toperands[%u].mem.unit: %u" % (c, i.mem.unit))
+                if i.mem.direction == TMS320C64X_MEM_DIR_INVALID:
+                    print("\t\t\toperands[%u].mem.direction: Invalid" % (c))
+                if i.mem.direction == TMS320C64X_MEM_DIR_FW:
+                    print("\t\t\toperands[%u].mem.direction: Forward" % (c))
+                if i.mem.direction == TMS320C64X_MEM_DIR_BW:
+                    print("\t\t\toperands[%u].mem.direction: Backward" % (c))
+                if i.mem.modify == TMS320C64X_MEM_MOD_INVALID:
+                    print("\t\t\toperands[%u].mem.modify: Invalid" % (c))
+                if i.mem.modify == TMS320C64X_MEM_MOD_NO:
+                    print("\t\t\toperands[%u].mem.modify: No" % (c))
+                if i.mem.modify == TMS320C64X_MEM_MOD_PRE:
+                    print("\t\t\toperands[%u].mem.modify: Pre" % (c))
+                if i.mem.modify == TMS320C64X_MEM_MOD_POST:
+                    print("\t\t\toperands[%u].mem.modify: Post" % (c))
+                print("\t\t\toperands[%u].mem.scaled: %u" % (c, i.mem.scaled))
+            if i.type == TMS320C64X_OP_REGPAIR:
+                print("\t\toperands[%u].type: REGPAIR = %s:%s" % (c, insn.reg_name(i.reg + 1), insn.reg_name(i.reg)))
+            c += 1
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" %comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" %e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_x86.py b/capstone/bindings/python/test_x86.py
new file mode 100755
index 000000000..2dd74a176
--- /dev/null
+++ b/capstone/bindings/python/test_x86.py
@@ -0,0 +1,292 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+from capstone.x86 import *
+from xprint import to_hex, to_x, to_x_32
+
+
+X86_CODE64 = b"\x55\x48\x8b\x05\xb8\x13\x00\x00\xe9\xea\xbe\xad\xde\xff\x25\x23\x01\x00\x00\xe8\xdf\xbe\xad\xde\x74\xff"
+X86_CODE16 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6\x66\xe9\xb8\x00\x00\x00\x67\xff\xa0\x23\x01\x00\x00\x66\xe8\xcb\x00\x00\x00\x74\xfc"
+X86_CODE32 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6\xe9\xea\xbe\xad\xde\xff\xa0\x23\x01\x00\x00\xe8\xdf\xbe\xad\xde\x74\xff"
+
+all_tests = (
+        (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (AT&T syntax)", CS_OPT_SYNTAX_ATT),
+        (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", None),
+        (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", None),
+        )
+
+
+def get_eflag_name(eflag):
+    if eflag == X86_EFLAGS_UNDEFINED_OF:
+        return "UNDEF_OF"
+    elif eflag == X86_EFLAGS_UNDEFINED_SF:
+        return "UNDEF_SF"
+    elif eflag == X86_EFLAGS_UNDEFINED_ZF:
+        return "UNDEF_ZF"
+    elif eflag == X86_EFLAGS_MODIFY_AF:
+        return "MOD_AF"
+    elif eflag == X86_EFLAGS_UNDEFINED_PF:
+        return "UNDEF_PF"
+    elif eflag == X86_EFLAGS_MODIFY_CF:
+        return "MOD_CF"
+    elif eflag == X86_EFLAGS_MODIFY_SF:
+        return "MOD_SF"
+    elif eflag == X86_EFLAGS_MODIFY_ZF:
+        return "MOD_ZF"
+    elif eflag == X86_EFLAGS_UNDEFINED_AF:
+        return "UNDEF_AF"
+    elif eflag == X86_EFLAGS_MODIFY_PF:
+        return "MOD_PF"
+    elif eflag == X86_EFLAGS_UNDEFINED_CF:
+        return "UNDEF_CF"
+    elif eflag == X86_EFLAGS_MODIFY_OF:
+        return "MOD_OF"
+    elif eflag == X86_EFLAGS_RESET_OF:
+        return "RESET_OF"
+    elif eflag == X86_EFLAGS_RESET_CF:
+        return "RESET_CF"
+    elif eflag == X86_EFLAGS_RESET_DF:
+        return "RESET_DF"
+    elif eflag == X86_EFLAGS_RESET_IF:
+        return "RESET_IF"
+    elif eflag == X86_EFLAGS_TEST_OF:
+        return "TEST_OF"
+    elif eflag == X86_EFLAGS_TEST_SF:
+        return "TEST_SF"
+    elif eflag == X86_EFLAGS_TEST_ZF:
+        return "TEST_ZF"
+    elif eflag == X86_EFLAGS_TEST_PF:
+        return "TEST_PF"
+    elif eflag == X86_EFLAGS_TEST_CF:
+        return "TEST_CF"
+    elif eflag == X86_EFLAGS_RESET_SF:
+        return "RESET_SF"
+    elif eflag == X86_EFLAGS_RESET_AF:
+        return "RESET_AF"
+    elif eflag == X86_EFLAGS_RESET_TF:
+        return "RESET_TF"
+    elif eflag == X86_EFLAGS_RESET_NT:
+        return "RESET_NT"
+    elif eflag == X86_EFLAGS_PRIOR_OF:
+        return "PRIOR_OF"
+    elif eflag == X86_EFLAGS_PRIOR_SF:
+        return "PRIOR_SF"
+    elif eflag == X86_EFLAGS_PRIOR_ZF:
+        return "PRIOR_ZF"
+    elif eflag == X86_EFLAGS_PRIOR_AF:
+        return "PRIOR_AF"
+    elif eflag == X86_EFLAGS_PRIOR_PF:
+        return "PRIOR_PF"
+    elif eflag == X86_EFLAGS_PRIOR_CF:
+        return "PRIOR_CF"
+    elif eflag == X86_EFLAGS_PRIOR_TF:
+        return "PRIOR_TF"
+    elif eflag == X86_EFLAGS_PRIOR_IF:
+        return "PRIOR_IF"
+    elif eflag == X86_EFLAGS_PRIOR_DF:
+        return "PRIOR_DF"
+    elif eflag == X86_EFLAGS_TEST_NT:
+        return "TEST_NT"
+    elif eflag == X86_EFLAGS_TEST_DF:
+        return "TEST_DF"
+    elif eflag == X86_EFLAGS_RESET_PF:
+        return "RESET_PF"
+    elif eflag == X86_EFLAGS_PRIOR_NT:
+        return "PRIOR_NT"
+    elif eflag == X86_EFLAGS_MODIFY_TF:
+        return "MOD_TF"
+    elif eflag == X86_EFLAGS_MODIFY_IF:
+        return "MOD_IF"
+    elif eflag == X86_EFLAGS_MODIFY_DF:
+        return "MOD_DF"
+    elif eflag == X86_EFLAGS_MODIFY_NT:
+        return "MOD_NT"
+    elif eflag == X86_EFLAGS_MODIFY_RF:
+        return "MOD_RF"
+    elif eflag == X86_EFLAGS_SET_CF:
+        return "SET_CF"
+    elif eflag == X86_EFLAGS_SET_DF:
+        return "SET_DF"
+    elif eflag == X86_EFLAGS_SET_IF:
+        return "SET_IF"
+    else: 
+        return None
+
+
+def print_insn_detail(mode, insn):
+    def print_string_hex(comment, str):
+        print(comment, end=' '),
+        for c in str:
+            print("0x%02x " % c, end=''),
+        print()
+
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    # print instruction prefix
+    print_string_hex("\tPrefix:", insn.prefix)
+
+    # print instruction's opcode
+    print_string_hex("\tOpcode:", insn.opcode)
+
+    # print operand's REX prefix (non-zero value is relavant for x86_64 instructions)
+    print("\trex: 0x%x" % (insn.rex))
+
+    # print operand's address size
+    print("\taddr_size: %u" % (insn.addr_size))
+
+    # print modRM byte
+    print("\tmodrm: 0x%x" % (insn.modrm))
+
+    # print modRM offset
+    if insn.modrm_offset != 0:
+        print("\tmodrm_offset: 0x%x" % (insn.modrm_offset))
+
+    # print displacement value
+    print("\tdisp: 0x%s" % to_x_32(insn.disp))
+
+    # print displacement offset (offset into instruction bytes)
+    if insn.disp_offset != 0:
+        print("\tdisp_offset: 0x%x" % (insn.disp_offset))
+
+    # print displacement size
+    if insn.disp_size != 0:
+        print("\tdisp_size: 0x%x" % (insn.disp_size))
+
+    # SIB is not available in 16-bit mode
+    if (mode & CS_MODE_16 == 0):
+        # print SIB byte
+        print("\tsib: 0x%x" % (insn.sib))
+        if (insn.sib):
+            if insn.sib_base != 0:
+                print("\t\tsib_base: %s" % (insn.reg_name(insn.sib_base)))
+            if insn.sib_index != 0:
+                print("\t\tsib_index: %s" % (insn.reg_name(insn.sib_index)))
+            if insn.sib_scale != 0:
+                print("\t\tsib_scale: %d" % (insn.sib_scale))
+
+    # XOP CC type
+    if insn.xop_cc != X86_XOP_CC_INVALID:
+        print("\txop_cc: %u" % (insn.xop_cc))
+
+    # SSE CC type
+    if insn.sse_cc != X86_SSE_CC_INVALID:
+        print("\tsse_cc: %u" % (insn.sse_cc))
+
+    # AVX CC type
+    if insn.avx_cc != X86_AVX_CC_INVALID:
+        print("\tavx_cc: %u" % (insn.avx_cc))
+
+    # AVX Suppress All Exception
+    if insn.avx_sae:
+        print("\tavx_sae: TRUE")
+
+    # AVX Rounding Mode type
+    if insn.avx_rm != X86_AVX_RM_INVALID:
+        print("\tavx_rm: %u" % (insn.avx_rm))
+
+    count = insn.op_count(X86_OP_IMM)
+    if count > 0:
+        print("\timm_count: %u" % count)
+        for i in range(count):
+            op = insn.op_find(X86_OP_IMM, i + 1)
+            print("\t\timms[%u]: 0x%s" % (i + 1, to_x(op.imm)))
+            if insn.imm_offset != 0:
+                print("\timm_offset: 0x%x" % (insn.imm_offset))
+            if insn.imm_size != 0:
+                print("\timm_size: 0x%x" % (insn.imm_size))
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = -1
+        for i in insn.operands:
+            c += 1
+            if i.type == X86_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == X86_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == X86_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.segment != 0:
+                    print("\t\t\toperands[%u].mem.segment: REG = %s" % (c, insn.reg_name(i.mem.segment)))
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" % (c, insn.reg_name(i.mem.index)))
+                if i.mem.scale != 1:
+                    print("\t\t\toperands[%u].mem.scale: %u" % (c, i.mem.scale))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" % (c, to_x(i.mem.disp)))
+
+            # AVX broadcast type
+            if i.avx_bcast != X86_AVX_BCAST_INVALID:
+                print("\t\toperands[%u].avx_bcast: %u" % (c, i.avx_bcast))
+
+            # AVX zero opmask {z}
+            if i.avx_zero_opmask:
+                print("\t\toperands[%u].avx_zero_opmask: TRUE" % (c))
+
+            print("\t\toperands[%u].size: %u" % (c, i.size))
+
+            if i.access == CS_AC_READ:
+                print("\t\toperands[%u].access: READ\n" % (c))
+            elif i.access == CS_AC_WRITE:
+                print("\t\toperands[%u].access: WRITE\n" % (c))
+            elif i.access == CS_AC_READ | CS_AC_WRITE:
+                print("\t\toperands[%u].access: READ | WRITE\n" % (c))
+
+    (regs_read, regs_write) = insn.regs_access()
+
+    if len(regs_read) > 0:
+        print("\tRegisters read:", end="")
+        for r in regs_read:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+
+    if len(regs_write) > 0:
+        print("\tRegisters modified:", end="")
+        for r in regs_write:
+            print(" %s" %(insn.reg_name(r)), end="")
+        print("")
+        
+    if insn.eflags:
+        updated_flags = []
+        for i in range(0,46):
+            if insn.eflags & (1 << i):
+                updated_flags.append(get_eflag_name(1 << i))
+        print("\tEFLAGS: %s" % (','.join(p for p in updated_flags)))
+        
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment, syntax) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" % comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+
+            if syntax is not None:
+                md.syntax = syntax
+
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(mode, insn)
+                print ()
+            print ("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/test_xcore.py b/capstone/bindings/python/test_xcore.py
new file mode 100755
index 000000000..0460a6d41
--- /dev/null
+++ b/capstone/bindings/python/test_xcore.py
@@ -0,0 +1,71 @@
+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+from capstone import *
+from capstone.xcore import *
+from xprint import to_x, to_hex
+
+
+XCORE_CODE = b"\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10\x09\xfd\xec\xa7"
+
+all_tests = (
+        (CS_ARCH_XCORE, 0, XCORE_CODE, "XCore"),
+)
+
+
+def print_insn_detail(insn):
+    # print address, mnemonic and operands
+    print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+    # "data" instruction generated by SKIPDATA option has no detail
+    if insn.id == 0:
+        return
+
+    if len(insn.operands) > 0:
+        print("\top_count: %u" % len(insn.operands))
+        c = 0
+        for i in insn.operands:
+            if i.type == XCORE_OP_REG:
+                print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+            if i.type == XCORE_OP_IMM:
+                print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
+            if i.type == XCORE_OP_MEM:
+                print("\t\toperands[%u].type: MEM" % c)
+                if i.mem.base != 0:
+                    print("\t\t\toperands[%u].mem.base: REG = %s" \
+                        % (c, insn.reg_name(i.mem.base)))
+                if i.mem.index != 0:
+                    print("\t\t\toperands[%u].mem.index: REG = %s" \
+                        % (c, insn.reg_name(i.mem.index)))
+                if i.mem.disp != 0:
+                    print("\t\t\toperands[%u].mem.disp: 0x%s" \
+                        % (c, to_x(i.mem.disp)))
+                if i.mem.direct != 1:
+                    print("\t\t\toperands[%u].mem.direct: -1" % c)
+            c += 1
+
+
+# ## Test class Cs
+def test_class():
+
+    for (arch, mode, code, comment) in all_tests:
+        print("*" * 16)
+        print("Platform: %s" %comment)
+        print("Code: %s" % to_hex(code))
+        print("Disasm:")
+
+        try:
+            md = Cs(arch, mode)
+            md.detail = True
+            for insn in md.disasm(code, 0x1000):
+                print_insn_detail(insn)
+                print ()
+            print("0x%x:\n" % (insn.address + insn.size))
+        except CsError as e:
+            print("ERROR: %s" %e)
+
+
+if __name__ == '__main__':
+    test_class()
diff --git a/capstone/bindings/python/xprint.py b/capstone/bindings/python/xprint.py
new file mode 100755
index 000000000..70affaca5
--- /dev/null
+++ b/capstone/bindings/python/xprint.py
@@ -0,0 +1,41 @@
+#!/usr/bin/env python
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+
+from __future__ import print_function
+import sys
+_python3 = sys.version_info.major == 3
+
+
+def to_hex(s, prefix_0x = True):
+    if _python3:
+        if prefix_0x:
+            return " ".join("0x{0:02x}".format(c) for c in s)  # <-- Python 3 is OK
+        else:
+            return " ".join("{0:02x}".format(c) for c in s)  # <-- Python 3 is OK
+    else:
+        if prefix_0x:
+            return " ".join("0x{0:02x}".format(ord(c)) for c in s)
+        else:
+            return " ".join("{0:02x}".format(ord(c)) for c in s)
+
+def to_hex2(s):
+    if _python3:
+        r = "".join("{0:02x}".format(c) for c in s)  # <-- Python 3 is OK
+    else:
+        r = "".join("{0:02x}".format(ord(c)) for c in s)
+    while r[0] == '0': r = r[1:]
+    return r
+
+def to_x(s):
+    from struct import pack
+    if not s: return '0'
+    x = pack(">q", s)
+    while x[0] in ('\0', 0): x = x[1:]
+    return to_hex2(x)
+
+def to_x_32(s):
+    from struct import pack
+    if not s: return '0'
+    x = pack(">i", s)
+    while x[0] in ('\0', 0): x = x[1:]
+    return to_hex2(x)
diff --git a/capstone/bindings/vb6/CDisassembler.cls b/capstone/bindings/vb6/CDisassembler.cls
new file mode 100644
index 000000000..c390d58cb
--- /dev/null
+++ b/capstone/bindings/vb6/CDisassembler.cls
@@ -0,0 +1,153 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CDisassembler"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+'NOTE: the VB code was built and tested against Capstone v3.0 rc4
+'      if the capstone C structures change, the VB code will have to
+'      be adjusted to match!
+'
+'      instructions details are currently only implemented for x86
+
+Public arch As cs_arch
+Public mode As cs_mode
+Public hCapstone As Long
+Public hLib As Long
+
+Public version As String
+Public vMajor As Long
+Public vMinor As Long
+
+Public errMsg As String
+Public lastErr As cs_err
+
+Private Function CheckPath(pth As String) As Long
+    
+    Dim hCap As Long, capPth As String, shimPth As String
+    
+    shimPth = pth & "\vbCapstone.dll"
+    capPth = pth & "\capstone.dll"
+    
+    If Not FileExists(shimPth) Then Exit Function
+       
+    hCap = LoadLibrary(capPth)
+    If hCap = 0 Then hCap = LoadLibrary("capstone.dll")
+    If hCap = 0 Then errMsg = "Could not find capstone.dll"
+    
+    CheckPath = LoadLibrary(shimPth)
+    'If CheckPath = 0 Then MsgBox Err.LastDllError
+    
+End Function
+
+Public Function init(arch As cs_arch, mode As cs_mode, Optional enableDetails As Boolean = False) As Boolean
+    
+    errMsg = Empty
+    hLib = GetModuleHandle("vbCapstone.dll")
+    
+    If hLib = 0 Then hLib = CheckPath(App.path & "\bin\")
+    If hLib = 0 Then hLib = CheckPath(App.path & "\")
+    If hLib = 0 Then hLib = CheckPath(App.path & "\..\")
+    If hLib = 0 Then hLib = LoadLibrary("vbCapstone.dll")
+    
+    If hLib = 0 Then
+        errMsg = errMsg & " Could not load vbCapstone.dll"
+        Exit Function
+    End If
+    
+    Me.arch = arch
+    Me.mode = mode
+    
+    cs_version vMajor, vMinor
+    version = vMajor & "." & vMinor
+    
+    If cs_support(arch) = 0 Then
+        errMsg = "specified architecture not supported"
+        Exit Function
+    End If
+    
+    Dim handle As Long 'in vb class a public var is actually a property get/set can not use as byref to api..
+    lastErr = cs_open(arch, mode, handle)
+    If lastErr <> CS_ERR_OK Then
+        errMsg = err2str(lastErr)
+        Exit Function
+    End If
+
+    hCapstone = handle
+    If enableDetails Then          'vb bindings currently only support details for x86
+        If arch = CS_ARCH_X86 Then
+            cs_option handle, CS_OPT_DETAIL, CS_OPT_ON
+        End If
+    End If
+    
+    init = True
+    
+End Function
+
+'base is a variant and currently accepts the following input types:
+'  x64 number held as currency type (ex.  makeCur(&haabbccdd, &h11223344) )
+'  int/long value (ex. &h1000 or 12345)
+'  numeric string or 0x/&h prefixed hex string (ex. "12345", "0x1200", "&haabbccdd")
+Function disasm(ByVal base, code() As Byte, Optional count As Long = 0) As Collection
+
+    Dim c As Long
+    Dim instAry As Long
+    Dim ret As New Collection
+    Dim ci As CInstruction
+    Dim i As Long
+    Dim address As Currency
+
+    On Error Resume Next
+    
+    Set disasm = ret
+    
+    If TypeName(base) = "Currency" Then
+        address = base
+    Else
+        If TypeName(base) = "String" Then base = Replace(Trim(base), "0x", "&h")
+        address = lng2Cur(CLng(base))
+        If Err.Number <> 0 Then
+            errMsg = "Could not convert base address to long"
+            Exit Function
+        End If
+    End If
+    
+    c = cs_disasm(Me.hCapstone, code(0), UBound(code) + 1, address, count, instAry)
+    If c = 0 Then Exit Function
+            
+    For i = 0 To c - 1
+        Set ci = New CInstruction
+        ci.LoadInstruction instAry, i, Me
+        ret.Add ci
+    Next
+    
+    cs_free instAry, c
+    
+End Function
+ 
+
+Private Sub Class_Terminate()
+    Dim msg As String
+    If DEBUG_DUMP Then
+        msg = "CDissembler.Terminate " & Hex(hCapstone)
+        If hCapstone <> 0 Then lastErr = cs_close(hCapstone)
+        Debug.Print msg & " : " & lastErr
+    End If
+End Sub
+
diff --git a/capstone/bindings/vb6/CInstDetails.cls b/capstone/bindings/vb6/CInstDetails.cls
new file mode 100644
index 000000000..9495f7fc1
--- /dev/null
+++ b/capstone/bindings/vb6/CInstDetails.cls
@@ -0,0 +1,119 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CInstDetails"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+'Public Type cs_detail
+'    regs_read(0 To 15) As      Byte ' list of implicit registers read by this insn UNSIGNED
+'    regs_read_count As         Byte ' number of implicit registers read by this insn UNSIGNED
+'    regs_write(0 To 19) As     Byte ' list of implicit registers modified by this insn UNSIGNED
+'    regs_write_count As        Byte ' number of implicit registers modified by this insn UNSIGNED
+'    groups(0 To 7) As          Byte ' list of group this instruction belong to UNSIGNED
+'    groups_count As            Byte ' number of groups this insn belongs to UNSIGNED
+'
+'    // Architecture-specific instruction info
+'    union {
+'        cs_x86 x86; // X86 architecture, including 16-bit, 32-bit & 64-bit mode
+'        cs_arm64 arm64; // ARM64 architecture (aka AArch64)
+'        cs_arm arm;     // ARM architecture (including Thumb/Thumb2)
+'        cs_mips mips;   // MIPS architecture
+'        cs_ppc ppc; // PowerPC architecture
+'        cs_sparc sparc; // Sparc architecture
+'        cs_sysz sysz;   // SystemZ architecture
+'        cs_xcore xcore; // XCore architecture
+'    };
+'} cs_detail;
+    
+Public regRead As New Collection
+Public regWritten As New Collection
+Public groups As New Collection
+Public parent As CDisassembler
+
+'this will be set to a class of the specific instruction info type by architecture..
+Public info As Object
+
+Private m_raw() As Byte
+
+Function toString() As String
+    
+    On Error Resume Next
+    
+    Dim ret() As String
+    Dim v, tmp
+     
+    push ret, "Instruction details: "
+    push ret, String(40, "-")
+    
+    If DEBUG_DUMP Then
+        push ret, "Raw: "
+        push ret, HexDump(m_raw)
+    End If
+    
+    push ret, "Registers Read: " & regRead.count & IIf(regRead.count > 0, "  Values: " & col2Str(regRead), Empty)
+    push ret, "Registers Written: " & regWritten.count & IIf(regWritten.count > 0, "  Values: " & col2Str(regWritten), Empty)
+    push ret, "Groups: " & groups.count & IIf(groups.count > 0, "  Values: " & col2Str(groups), Empty)
+    
+    'it is expected that each CXXInst class implements a toString() method..if not we catch the error anyway..
+    If Not info Is Nothing Then
+        push ret, info.toString()
+    End If
+    
+    toString = Join(ret, vbCrLf)
+    
+End Function
+
+Friend Sub LoadDetails(lpDetails As Long, parent As CDisassembler)
+        
+    Dim cd As cs_detail
+    Dim i As Long
+    Dim x86 As CX86Inst
+    
+    Set Me.parent = parent
+    
+    'vbdef only contains up to the groups_count field..
+    CopyMemory ByVal VarPtr(cd), ByVal lpDetails, LenB(cd)
+    
+    If DEBUG_DUMP Then
+        ReDim m_raw(LenB(cd))
+        CopyMemory ByVal VarPtr(m_raw(0)), ByVal lpDetails, LenB(cd)
+    End If
+    
+    For i = 1 To cd.regs_read_count
+        regRead.Add cd.regs_read(i - 1)
+    Next
+    
+    For i = 1 To cd.regs_write_count
+        regWritten.Add cd.regs_write(i - 1)
+    Next
+    
+    For i = 1 To cd.groups_count
+        groups.Add cd.groups(i - 1)
+    Next
+    
+    Const align = 5
+    
+    'each arch needs its own CxxInstr class implemented here...
+    If parent.arch = CS_ARCH_X86 Then
+        Set x86 = New CX86Inst
+        x86.LoadDetails lpDetails + LenB(cd) + align, parent
+        Set info = x86
+    End If
+    
+    
+    
+End Sub
diff --git a/capstone/bindings/vb6/CInstruction.cls b/capstone/bindings/vb6/CInstruction.cls
new file mode 100644
index 000000000..6c9bcc4ff
--- /dev/null
+++ b/capstone/bindings/vb6/CInstruction.cls
@@ -0,0 +1,133 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CInstruction"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+'Public Type cs_insn
+'                              ' Instruction ID (basically a numeric ID for the instruction mnemonic)
+'                              ' Find the instruction id in the '[ARCH]_insn' enum in the header file
+'                              ' of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
+'                              ' 'x86_insn' in x86.h for X86, etc...
+'                              ' available even when CS_OPT_DETAIL = CS_OPT_OFF
+'                              ' NOTE: in Skipdata mode, "data" instruction has 0 for this id field. UNSIGNED
+'    id As Long                '
+'    align As Long             'not sure why it needs this..but it does..
+'    address As Currency       ' Address (EIP) of this instruction available even when CS_OPT_DETAIL = CS_OPT_OFF UNSIGNED
+'    size As Integer           ' Size of this instruction available even when CS_OPT_DETAIL = CS_OPT_OFF UNSIGNED
+'    bytes(0 To 23) As Byte    ' Machine bytes of this instruction, with number of bytes indicated by @size above available even when CS_OPT_DETAIL = CS_OPT_OFF
+'    mnemonic(0 To 31) As Byte ' Ascii text of instruction mnemonic available even when CS_OPT_DETAIL = CS_OPT_OFF
+'    op_str(0 To 159) As Byte  ' Ascii text of instruction operands available even when CS_OPT_DETAIL = CS_OPT_OFF
+'
+'                              ' Pointer to cs_detail.
+'                              ' NOTE: detail pointer is only valid when both requirements below are met:
+'                              ' (1) CS_OP_DETAIL = CS_OPT_ON
+'                              ' (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
+'                              ' NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
+'                              '  is not NULL, its content is still irrelevant.
+'    lpDetail As Long          '  points to a cs_detail structure NOTE: only available when CS_OPT_DETAIL = CS_OPT_ON
+'
+'End Type
+
+Public ID As Long
+Public address As Currency
+Public size As Long
+Private m_bytes() As Byte
+Public instruction As String
+Public operand As String
+Public lpDetails As Long
+Public parent As CDisassembler
+
+Public details As CInstDetails 'may be null
+
+Property Get bytes() As Byte()
+    bytes = Me.bytes()
+End Property
+
+Property Get byteDump(Optional padding = 15) As String
+    Dim b As String, i As Long
+    For i = 0 To UBound(m_bytes)
+        b = b & hhex(m_bytes(i)) & " "
+    Next
+    byteDump = rpad(b, padding)
+End Property
+
+Property Get text() As String
+   
+    text = cur2str(address) & "    " & byteDump & "    " & instruction & " " & operand
+    
+End Property
+
+Function toString() As String
+    
+    Dim r() As String
+    
+    push r, "CInstruction: "
+    push r, String(40, "-")
+    push r, "Id: " & Hex(ID)
+    push r, "address: " & cur2str(address)
+    push r, "size: " & Hex(size)
+    push r, "bytes: " & byteDump()
+    push r, "instruction: " & instruction
+    push r, "operand: " & operand
+    push r, "lpDetails: " & Hex(lpDetails)
+    
+    If Not details Is Nothing Then
+        push r, details.toString()
+    End If
+    
+    toString = Join(r, vbCrLf)
+    
+End Function
+
+Friend Sub LoadInstruction(instAry As Long, index As Long, parent As CDisassembler)
+
+    Dim inst As cs_insn
+    Dim i As Long
+    
+    getInstruction instAry, index, VarPtr(inst), LenB(inst)
+    
+    ID = inst.ID
+    address = inst.address
+    size = inst.size
+    lpDetails = inst.lpDetail
+    Set Me.parent = parent
+    
+    m_bytes() = inst.bytes
+    ReDim Preserve m_bytes(size - 1)
+    
+    For i = 0 To UBound(inst.mnemonic)
+        If inst.mnemonic(i) = 0 Then Exit For
+        instruction = instruction & Chr(inst.mnemonic(i))
+    Next
+    
+    For i = 0 To UBound(inst.op_str)
+        If inst.op_str(i) = 0 Then Exit For
+        operand = operand & Chr(inst.op_str(i))
+    Next
+
+    If lpDetails = 0 Then Exit Sub
+    Set details = New CInstDetails
+    details.LoadDetails lpDetails, parent
+    
+End Sub
+
+
+    
+
diff --git a/capstone/bindings/vb6/CX86Inst.cls b/capstone/bindings/vb6/CX86Inst.cls
new file mode 100644
index 000000000..daf7dd5b8
--- /dev/null
+++ b/capstone/bindings/vb6/CX86Inst.cls
@@ -0,0 +1,197 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CX86Inst"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+'// Instruction structure  sizeof() = 432 bytes
+'typedef struct cs_x86 {
+'    // Instruction prefix, which can be up to 4 bytes.
+'    // A prefix byte gets value 0 when irrelevant.
+'    // prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above)
+'    // prefix[1] indicates segment override (irrelevant for x86_64):
+'    // See X86_PREFIX_CS/SS/DS/ES/FS/GS above.
+'    // prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE)
+'    // prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE)
+'    uint8_t prefix[4];
+'
+'    // Instruction opcode, wich can be from 1 to 4 bytes in size.
+'    // This contains VEX opcode as well.
+'    // An trailing opcode byte gets value 0 when irrelevant.
+'    uint8_t opcode[4];
+'
+'    // REX prefix: only a non-zero value is relavant for x86_64
+'    uint8_t rex;
+'
+'    // Address size, which can be overrided with above prefix[5].
+'    uint8_t addr_size;
+'
+'    // ModR/M byte
+'    uint8_t modrm;
+'
+'    // SIB value, or 0 when irrelevant.
+'    uint8_t sib;
+'
+'    // Displacement value, or 0 when irrelevant.
+'    int32_t disp;
+'
+'    /* SIB state */
+'    // SIB index register, or X86_REG_INVALID when irrelevant.
+'    x86_reg sib_index;
+'    // SIB scale. only applicable if sib_index is relavant.
+'    int8_t sib_scale;
+'    // SIB base register, or X86_REG_INVALID when irrelevant.
+'    x86_reg sib_base;
+'
+'    // SSE Code Condition
+'    x86_sse_cc sse_cc;
+'
+'    // AVX Code Condition
+'    x86_avx_cc avx_cc;
+'
+'    // AVX Suppress all Exception
+'    bool avx_sae;
+'
+'    // AVX static rounding mode
+'    x86_avx_rm avx_rm;
+'
+'    // Number of operands of this instruction,
+'    // or 0 when instruction has no operand.
+'    uint8_t op_count;
+'
+'    cs_x86_op operands[8];  // operands for this instruction.
+'} cs_x86;
+
+Private m_prefix() As Byte
+Private m_opcode() As Byte
+Public rex As Byte
+Public addr_size As Byte
+Public modrm As Byte
+Public sib As Byte
+Public disp As Long
+Public sib_index As x86_reg
+Public sib_scale As Byte
+Public sib_base As x86_reg
+Public sse_cc As x86_sse_cc
+Public avx_cc As x86_avx_cc
+Public avx_sae As Boolean
+Public avx_rm As x86_avx_rm
+Public operands As New Collection
+
+Public parent As CDisassembler
+Private hEngine As Long
+Private m_raw() As Byte
+
+Property Get prefix() As Byte()
+    prefix = m_prefix
+End Property
+
+Property Get opcode() As Byte()
+    opcode = m_opcode
+End Property
+
+Function toString() As String
+    
+    Dim r() As String
+    Dim o As CX86Operand
+    
+    push r, "X86 Instruction Details:"
+    push r, String(40, "-")
+    
+    If DEBUG_DUMP Then
+        push r, "Raw: "
+        push r, HexDump(m_raw)
+    End If
+    
+    push r, "Prefix: " & b2Str(m_prefix)
+    push r, "OpCode: " & b2Str(m_opcode)
+    push r, "Rex: " & rex
+    push r, "addr_size: " & addr_size
+    push r, "modrm: " & Hex(modrm)
+    push r, "disp: " & Hex(disp)
+    
+    If parent.mode <> CS_MODE_16 Then
+        push r, "sib: " & Hex(sib)
+        push r, "sib_index: " & regName(hEngine, sib_index)
+        push r, "sib_scale: " & Hex(sib_scale)
+        push r, "sib_base: " & regName(hEngine, sib_base)
+    End If
+    
+    If sse_cc <> 0 Then push r, "sse_cc: " & x86_sse_cc2str(sse_cc)
+    If avx_cc <> 0 Then push r, "avx_cc: " & x86_avx_cc2str(avx_cc)
+    If avx_sae <> 0 Then push r, "avx_sae: " & avx_sae
+    If avx_rm <> 0 Then push r, "avx_rm: " & x86_avx_rm2str(avx_rm)
+    
+    push r, "Operands: " & operands.count
+    
+    For Each o In operands
+        push r, String(40, "-")
+        push r, o.toString
+    Next
+    
+    toString = Join(r, vbCrLf)
+    
+End Function
+
+Friend Sub LoadDetails(lpStruct As Long, parent As CDisassembler)
+    
+    Dim cs As cs_x86
+    Dim o As CX86Operand
+    Dim ptr As Long
+    Dim i As Long
+    
+    Const sizeOfx86Operand = 48
+    
+    Set Me.parent = parent
+    hEngine = parent.hCapstone
+
+    CopyMemory ByVal VarPtr(cs), ByVal lpStruct, LenB(cs)
+    
+    If DEBUG_DUMP Then
+        ReDim m_raw(LenB(cs))
+        CopyMemory ByVal VarPtr(m_raw(0)), ByVal lpStruct, LenB(cs)
+    End If
+    
+    Me.rex = cs.rex
+    Me.addr_size = cs.addr_size
+    Me.modrm = cs.modrm
+    Me.sib = cs.sib
+    Me.disp = cs.disp
+    Me.sib_index = cs.sib_index
+    Me.sib_scale = cs.sib_scale
+    Me.sib_base = cs.sib_base
+    Me.sse_cc = cs.sse_cc
+    Me.avx_cc = cs.avx_cc
+    Me.avx_sae = cs.avx_sae
+    Me.avx_rm = cs.avx_rm
+    m_prefix = cs.prefix
+    m_opcode = cs.opcode
+    
+    ptr = lpStruct + LenB(cs) 'we dont include the operands in our vb struct..
+    For i = 1 To cs.op_count
+        Set o = New CX86Operand
+        o.LoadDetails ptr, hEngine
+        operands.Add o
+        ptr = ptr + sizeOfx86Operand
+    Next
+    
+    
+    
+End Sub
+
diff --git a/capstone/bindings/vb6/CX86OpMem.cls b/capstone/bindings/vb6/CX86OpMem.cls
new file mode 100644
index 000000000..d867c1a68
--- /dev/null
+++ b/capstone/bindings/vb6/CX86OpMem.cls
@@ -0,0 +1,28 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CX86OpMem"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+Public segment As Long     ' segment register (or X86_REG_INVALID if irrelevant) UNSIGNED
+Public base As Long        ' base register (or X86_REG_INVALID if irrelevant) UNSIGNED
+Public index As Long       ' index register (or X86_REG_INVALID if irrelevant) UNSIGNED
+Public scale_ As Long      ' scale for index register
+Public disp As Currency    ' displacement value
+
diff --git a/capstone/bindings/vb6/CX86Operand.cls b/capstone/bindings/vb6/CX86Operand.cls
new file mode 100644
index 000000000..ed3c5432c
--- /dev/null
+++ b/capstone/bindings/vb6/CX86Operand.cls
@@ -0,0 +1,202 @@
+VERSION 1.0 CLASS
+BEGIN
+  MultiUse = -1  'True
+  Persistable = 0  'NotPersistable
+  DataBindingBehavior = 0  'vbNone
+  DataSourceBehavior  = 0  'vbNone
+  MTSTransactionMode  = 0  'NotAnMTSObject
+END
+Attribute VB_Name = "CX86Operand"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = True
+Attribute VB_PredeclaredId = False
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+'// Instruction operand sizeof() reports 48 bytes
+'typedef struct cs_x86_op {
+'        x86_op_type type;   // operand type
+'
+'        union {
+'            x86_reg reg;    // register value for REG operand
+'            int64_t imm;    // immediate value for IMM operand
+'            double fp;      // floating point value for FP operand
+'            x86_op_mem mem; // base/index/scale/disp value for MEM operand (24bytes max)
+'        };
+'
+'        // size of this operand (in bytes).
+'        uint8_t size;
+'
+'        // AVX broadcast type, or 0 if irrelevant
+'        x86_avx_bcast avx_bcast;
+'
+'        // AVX zero opmask {z}
+'        bool avx_zero_opmask;
+'} cs_x86_op;
+
+'Instruction's operand referring to memory
+'This is associated with X86_OP_MEM operand type above
+'Public Type x86_op_mem
+'    segment As Long  ' segment register (or X86_REG_INVALID if irrelevant) UNSIGNED
+'    base As Long     ' base register (or X86_REG_INVALID if irrelevant) UNSIGNED
+'    index As Long    ' index register (or X86_REG_INVALID if irrelevant) UNSIGNED
+'    scale As Long    ' scale for index register
+'    disp As Currency ' displacement value
+'End Type
+
+'this shows the alignment padding used by compiler..
+'    cs_x86_op op;
+'    op.type = (x86_op_type)1;
+'    op.reg = (x86_reg)2;
+'    op.avx_bcast = (x86_avx_bcast)3;
+'    op.avx_zero_opmask = 4;
+'    op.size = 0xaa;
+'    printf("&cs_x86_op = %x", &op);
+'    _asm int 3
+'
+'
+'0x0012FF34  01 00 00 00 cc cc cc cc 02 00 00 00 cc cc cc cc  ....����....����
+'0x0012FF44  cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc  ����������������
+'0x0012FF54  aa cc cc cc 03 00 00 00 01 cc cc cc cc cc cc cc  ����.....�������
+
+Public optype As x86_op_type
+Public size As Byte
+Public avx_bcast As x86_avx_bcast
+Public avx_zero_opmask As Boolean
+
+'only one of the following will be set based on type
+Public reg As x86_reg
+Public fp As Currency
+Public imm As Currency
+Public mem As CX86OpMem
+
+Private hEngine As Long
+Private m_raw() As Byte
+
+Function toString() As String
+    
+    Dim ret() As String
+    
+    push ret, "X86 Operand:"
+    push ret, String(45, "-")
+    
+    If DEBUG_DUMP Then
+        push ret, "Raw: "
+        push ret, HexDump(m_raw)
+    End If
+    
+    push ret, "Type: " & opStr()
+    push ret, "Size: " & size
+    If avx_bcast <> 0 Then push ret, "BCast: " & bcastStr()
+    If avx_zero_opmask Then push ret, "AvxOpMask: " & avx_zero_opmask
+    
+    If optype = X86_OP_FP Then
+         push ret, "FP: " & cur2str(fp)
+    ElseIf optype = X86_OP_IMM Then
+         push ret, "IMM: " & cur2str(imm)
+    ElseIf optype = x86_op_mem Then
+        If mem.base <> 0 Then push ret, "Base: " & regName(hEngine, mem.base)
+        If mem.index <> 0 Then push ret, "Index: " & regName(hEngine, mem.index)
+        If mem.scale_ <> 1 Then push ret, "Scale: " & Hex(mem.scale_)
+        If mem.segment <> 0 Then push ret, "Seg: " & regName(hEngine, mem.segment)
+        If mem.disp <> 0 Then push ret, "Disp: " & cur2str(mem.disp)
+    ElseIf optype = X86_OP_REG Then
+         push ret, "Reg: " & regName(hEngine, reg)
+    End If
+    
+    toString = Join(ret, vbCrLf)
+    
+End Function
+
+Function opStr() As String
+
+    If optype = X86_OP_FP Then opStr = "X86_OP_FP"
+    If optype = x86_op_mem Then opStr = "x86_op_mem"
+    If optype = X86_OP_IMM Then opStr = "X86_OP_IMM"
+    If optype = X86_OP_REG Then opStr = "X86_OP_REG"
+    If optype = X86_OP_INVALID Then opStr = "X86_OP_INVALID"
+    
+    If Len(opStr) = 0 Then
+        opStr = "Error: " & Hex(optype)
+    ElseIf DEBUG_DUMP Then
+        opStr = opStr & " (" & Hex(optype) & ")"
+    End If
+        
+End Function
+
+Function bcastStr() As String
+    Dim r As String
+    
+    If avx_bcast = X86_AVX_BCAST_INVALID Then r = "X86_AVX_BCAST_INVALID"
+    If avx_bcast = X86_AVX_BCAST_2 Then r = "X86_AVX_BCAST_2"
+    If avx_bcast = X86_AVX_BCAST_4 Then r = "X86_AVX_BCAST_4"
+    If avx_bcast = X86_AVX_BCAST_8 Then r = "X86_AVX_BCAST_8"
+    If avx_bcast = X86_AVX_BCAST_16 Then r = "X86_AVX_BCAST_16"
+    
+    If Len(r) = 0 Then
+        r = "Unknown: " & Hex(avx_bcast)
+    ElseIf DEBUG_DUMP Then
+        r = r & " (" & Hex(avx_bcast) & ")"
+    End If
+    
+    bcastStr = r
+End Function
+
+
+Friend Sub LoadDetails(lpStruct As Long, hCapstone As Long)
+    
+    Dim opMem As x86_op_mem
+    Dim ptr As Long
+    
+    Const align4 = 4
+    Const align3 = 3
+    
+    hEngine = hCapstone
+    
+    If DEBUG_DUMP Then
+        ReDim m_raw(48)
+        CopyMemory ByVal VarPtr(m_raw(0)), ByVal lpStruct, 48
+    End If
+    
+    optype = readLng(lpStruct)
+    ptr = lpStruct + 4 + align4
+    
+    If optype = X86_OP_FP Then
+        fp = readCur(ptr)
+    ElseIf optype = X86_OP_IMM Then
+        imm = readCur(ptr)
+    ElseIf optype = x86_op_mem Then
+        CopyMemory ByVal VarPtr(opMem), ByVal ptr, LenB(opMem)
+        Set mem = New CX86OpMem
+        mem.base = opMem.base
+        mem.disp = opMem.disp
+        mem.index = opMem.index
+        mem.scale_ = opMem.scale
+        mem.segment = opMem.segment
+    ElseIf optype = X86_OP_REG Then
+        reg = readLng(ptr)
+    End If
+    
+    ptr = ptr + LenB(opMem)
+    
+    size = readByte(ptr)
+    ptr = ptr + 1 + align3
+    
+    avx_bcast = readLng(ptr)
+    ptr = ptr + 4
+    
+    avx_zero_opmask = (readByte(ptr) = 1)
+    
+End Sub
+
+Private Sub Class_Terminate()
+    'looks like everything is freeing up ok
+    'Debug.Print "Cx86Operand.Terminate"
+End Sub
diff --git a/capstone/bindings/vb6/Form1.frm b/capstone/bindings/vb6/Form1.frm
new file mode 100644
index 000000000..df71dbeb8
--- /dev/null
+++ b/capstone/bindings/vb6/Form1.frm
@@ -0,0 +1,275 @@
+VERSION 5.00
+Object = "{831FDD16-0C5C-11D2-A9FC-0000F8754DA1}#2.0#0"; "mscomctl.ocx"
+Begin VB.Form Form1 
+   Caption         =   "VB6 Bindings for Capstone Disassembly Engine - Contributed by FireEye FLARE  Team"
+   ClientHeight    =   7290
+   ClientLeft      =   60
+   ClientTop       =   345
+   ClientWidth     =   10275
+   LinkTopic       =   "Form1"
+   ScaleHeight     =   7290
+   ScaleWidth      =   10275
+   StartUpPosition =   2  'CenterScreen
+   Begin VB.CommandButton Command2 
+      Caption         =   "Save"
+      Height          =   375
+      Left            =   8760
+      TabIndex        =   8
+      Top             =   120
+      Width           =   1455
+   End
+   Begin VB.CommandButton Command1 
+      Caption         =   " Arm 64"
+      Height          =   375
+      Index           =   4
+      Left            =   6840
+      TabIndex        =   7
+      Top             =   120
+      Width           =   1455
+   End
+   Begin VB.CommandButton Command1 
+      Caption         =   "Arm"
+      Height          =   375
+      Index           =   3
+      Left            =   5160
+      TabIndex        =   6
+      Top             =   120
+      Width           =   1455
+   End
+   Begin VB.CommandButton Command1 
+      Caption         =   "x86 64bit"
+      Height          =   375
+      Index           =   2
+      Left            =   3480
+      TabIndex        =   5
+      Top             =   120
+      Width           =   1455
+   End
+   Begin VB.CommandButton Command1 
+      Caption         =   "x86 16bit"
+      Height          =   375
+      Index           =   0
+      Left            =   120
+      TabIndex        =   4
+      Top             =   120
+      Width           =   1455
+   End
+   Begin VB.CommandButton Command1 
+      Caption         =   "x86 32bit"
+      Height          =   375
+      Index           =   1
+      Left            =   1800
+      TabIndex        =   3
+      Top             =   120
+      Width           =   1455
+   End
+   Begin MSComctlLib.ListView lv 
+      Height          =   2415
+      Left            =   120
+      TabIndex        =   2
+      Top             =   1440
+      Width           =   10095
+      _ExtentX        =   17806
+      _ExtentY        =   4260
+      View            =   3
+      LabelEdit       =   1
+      LabelWrap       =   -1  'True
+      HideSelection   =   0   'False
+      FullRowSelect   =   -1  'True
+      _Version        =   393217
+      ForeColor       =   -2147483640
+      BackColor       =   -2147483643
+      BorderStyle     =   1
+      Appearance      =   1
+      BeginProperty Font {0BE35203-8F91-11CE-9DE3-00AA004BB851} 
+         Name            =   "Courier"
+         Size            =   9.75
+         Charset         =   0
+         Weight          =   400
+         Underline       =   0   'False
+         Italic          =   0   'False
+         Strikethrough   =   0   'False
+      EndProperty
+      NumItems        =   1
+      BeginProperty ColumnHeader(1) {BDD1F052-858B-11D1-B16A-00C0F0283628} 
+         Object.Width           =   2540
+      EndProperty
+   End
+   Begin VB.ListBox List1 
+      BeginProperty Font 
+         Name            =   "Courier"
+         Size            =   9.75
+         Charset         =   0
+         Weight          =   400
+         Underline       =   0   'False
+         Italic          =   0   'False
+         Strikethrough   =   0   'False
+      EndProperty
+      Height          =   840
+      Left            =   120
+      TabIndex        =   1
+      Top             =   600
+      Width           =   10095
+   End
+   Begin VB.TextBox Text1 
+      BeginProperty Font 
+         Name            =   "Courier"
+         Size            =   9.75
+         Charset         =   0
+         Weight          =   400
+         Underline       =   0   'False
+         Italic          =   0   'False
+         Strikethrough   =   0   'False
+      EndProperty
+      Height          =   3375
+      Left            =   120
+      MultiLine       =   -1  'True
+      ScrollBars      =   3  'Both
+      TabIndex        =   0
+      Text            =   "Form1.frx":0000
+      Top             =   3840
+      Width           =   10095
+   End
+End
+Attribute VB_Name = "Form1"
+Attribute VB_GlobalNameSpace = False
+Attribute VB_Creatable = False
+Attribute VB_PredeclaredId = True
+Attribute VB_Exposed = False
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+Dim cap As CDisassembler
+Dim lastSample As Long
+
+Private Sub Command1_Click(index As Integer)
+    
+    Dim code() As Byte, arch As cs_arch, mode As cs_mode
+    lastSample = index
+    
+    Const x86_code32 As String = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6"
+    Const X86_CODE16 As String = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6"
+    Const X86_CODE64 As String = "\x55\x48\x8b\x05\xb8\x13\x00\x00"
+    Const ARM_CODE As String = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3\x00\x02\x01\xf1\x05\x40\xd0\xe8\xf4\x80\x00\x00"
+    Const ARM64_CODE As String = "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"
+
+    Select Case index
+        Case 0:
+                arch = CS_ARCH_X86
+                mode = CS_MODE_16
+                code = toBytes(X86_CODE16)
+        Case 1:
+                arch = CS_ARCH_X86
+                mode = CS_MODE_32
+                code = toBytes(x86_code32)
+        Case 2:
+                arch = CS_ARCH_X86
+                mode = CS_MODE_64
+                code = toBytes(X86_CODE64)
+                
+        Case 3:
+                arch = CS_ARCH_ARM
+                mode = CS_MODE_ARM
+                code = toBytes(ARM_CODE)
+                
+        Case 4:
+                arch = CS_ARCH_ARM64
+                mode = CS_MODE_ARM
+                code = toBytes(ARM64_CODE)
+    End Select
+    
+    
+    test code, arch, mode
+    
+End Sub
+
+Private Sub test(code() As Byte, arch As cs_arch, mode As cs_mode)
+    
+    
+    Dim ret As Collection
+    Dim ci As CInstruction
+    Dim li As ListItem
+    
+    clearForm
+    If Not cap Is Nothing Then Set cap = Nothing
+    
+    Set cap = New CDisassembler
+    
+    If Not cap.init(arch, mode, True) Then
+        List1.AddItem "Failed to init engine: " & cap.errMsg
+        Exit Sub
+    End If
+      
+    List1.AddItem "Capstone loaded @ 0x" & Hex(cap.hLib)
+    List1.AddItem "hEngine: 0x" & Hex(cap.hCapstone)
+    List1.AddItem "Version: " & cap.version
+    
+    If cap.vMajor < 3 Then
+        List1.AddItem "Sample requires Capstone v3+"
+        Exit Sub
+    End If
+    
+    Set ret = cap.disasm(&H1000, code)
+
+    For Each ci In ret
+        Set li = lv.ListItems.Add(, , ci.text)
+        Set li.Tag = ci
+    Next
+    
+End Sub
+
+Private Sub Command2_Click()
+
+    Dim fName() As String
+    Dim fPath As String
+    Dim t() As String
+    Dim li As ListItem
+    Dim ci As CInstruction
+    
+    On Error Resume Next
+    
+    If lastSample = -1 Then
+        MsgBox "Run a test first..."
+        Exit Sub
+    End If
+    
+    fName = Split("16b,32b,64b,Arm,Arm64", ",")
+    
+    fPath = App.path & "\vb" & fName(lastSample) & "Test.txt"
+    If FileExists(fPath) Then Kill fPath
+    
+    For Each li In lv.ListItems
+        push t, li.text
+        Set ci = li.Tag
+        push t, ci.toString()
+        push t, String(60, "-")
+    Next
+    
+    WriteFile fPath, Join(t, vbCrLf)
+    
+    MsgBox FileLen(fPath) & " bytes saved to: " & vbCrLf & vbCrLf & fPath
+    
+End Sub
+
+Private Sub lv_ItemClick(ByVal Item As MSComctlLib.ListItem)
+    Dim ci As CInstruction
+    Set ci = Item.Tag
+    Text1 = ci.toString()
+End Sub
+
+Function clearForm()
+    List1.Clear
+    lv.ListItems.Clear
+    Text1 = Empty
+End Function
+
+Private Sub Form_Load()
+    lv.ColumnHeaders(1).Width = lv.Width
+    clearForm
+    lastSample = -1
+End Sub
diff --git a/capstone/bindings/vb6/Form1.frx b/capstone/bindings/vb6/Form1.frx
new file mode 100644
index 000000000..da8c0d9d6
--- /dev/null
+++ b/capstone/bindings/vb6/Form1.frx
@@ -0,0 +1 @@
+Text1
+\ No newline at end of file
diff --git a/capstone/bindings/vb6/Module1.bas b/capstone/bindings/vb6/Module1.bas
new file mode 100644
index 000000000..fcb566348
--- /dev/null
+++ b/capstone/bindings/vb6/Module1.bas
@@ -0,0 +1,635 @@
+Attribute VB_Name = "mCapStone"
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+'todo: cs_disasm_iter / skipdata
+
+'this is for my vb code and how much info it spits out in tostring methods..
+Global Const DEBUG_DUMP = 0
+
+'Architecture type
+Public Enum cs_arch
+    CS_ARCH_ARM = 0      ' ARM architecture (including Thumb, Thumb-2)
+    CS_ARCH_ARM64        ' ARM-64, also called AArch64
+    CS_ARCH_MIPS         ' Mips architecture
+    CS_ARCH_X86          ' X86 architecture (including x86 & x86-64)
+    CS_ARCH_PPC          ' PowerPC architecture
+    CS_ARCH_SPARC        ' Sparc architecture
+    CS_ARCH_SYSZ         ' SystemZ architecture
+    CS_ARCH_XCORE        ' XCore architecture
+    CS_ARCH_MAX
+    CS_ARCH_ALL = &HFFFF ' All architectures - for cs_support()
+End Enum
+
+Public Enum cs_mode
+    CS_MODE_LITTLE_ENDIAN = 0       ' little-endian mode (default mode)
+    CS_MODE_ARM = 0                 ' 32-bit ARM
+    CS_MODE_16 = 2                  ' 16-bit mode (X86)
+    CS_MODE_32 = 4                  ' 32-bit mode (X86)
+    CS_MODE_64 = 8                  ' 64-bit mode (X86, PPC)
+    CS_MODE_THUMB = 16              ' ARM's Thumb mode, including Thumb-2
+    CS_MODE_MCLASS = 32             ' ARM's Cortex-M series
+    CS_MODE_V8 = 64                 ' ARMv8 A32 encodings for ARM
+    CS_MODE_MICRO = 16              ' MicroMips mode (MIPS)
+    CS_MODE_MIPS3 = 32              ' Mips III ISA
+    CS_MODE_MIPS32R6 = 64           ' Mips32r6 ISA
+    CS_MODE_MIPSGP64 = 128          ' General Purpose Registers are 64-bit wide (MIPS)
+    CS_MODE_V9 = 16                 ' SparcV9 mode (Sparc)
+    CS_MODE_BIG_ENDIAN = &H80000000 ' big-endian mode
+    CS_MODE_MIPS32 = CS_MODE_32     ' Mips32 ISA (Mips)
+    CS_MODE_MIPS64 = CS_MODE_64     ' Mips64 ISA (Mips)
+End Enum
+
+'Runtime option for the disassembled engine
+Public Enum cs_opt_type
+    CS_OPT_SYNTAX = 1     ' Assembly output syntax
+    CS_OPT_DETAIL         ' Break down instruction structure into details
+    CS_OPT_MODE           ' Change engine's mode at run-time
+    CS_OPT_MEM            ' User-defined dynamic memory related functions
+    CS_OPT_SKIPDATA       ' Skip data when disassembling. Then engine is in SKIPDATA mode.
+    CS_OPT_SKIPDATA_SETUP ' Setup user-defined function for SKIPDATA option
+End Enum
+
+
+'Runtime option value (associated with option type above)
+Public Enum cs_opt_value
+    CS_OPT_OFF = 0          ' Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA.
+    CS_OPT_ON = 3           ' Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
+    CS_OPT_SYNTAX_DEFAULT = 0 ' Default asm syntax (CS_OPT_SYNTAX).
+    CS_OPT_SYNTAX_INTEL     ' X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
+    CS_OPT_SYNTAX_ATT       ' X86 ATT asm syntax (CS_OPT_SYNTAX).
+    CS_OPT_SYNTAX_NOREGNAME ' Prints register name with only number (CS_OPT_SYNTAX)
+End Enum
+
+'Common instruction operand types - to be consistent across all architectures.
+Public Enum cs_op_type
+    CS_OP_INVALID = 0 ' uninitialized/invalid operand.
+    CS_OP_REG       ' Register operand.
+    CS_OP_IMM       ' Immediate operand.
+    CS_OP_MEM       ' Memory operand.
+    CS_OP_FP        ' Floating-Point operand.
+End Enum
+
+'Common instruction groups - to be consistent across all architectures.
+Public Enum cs_group_type
+    CS_GRP_INVALID = 0 ' uninitialized/invalid group.
+    CS_GRP_JUMP      ' all jump instructions (conditional+direct+indirect jumps)
+    CS_GRP_CALL      ' all call instructions
+    CS_GRP_RET       ' all return instructions
+    CS_GRP_INT       ' all interrupt instructions (int+syscall)
+    CS_GRP_IRET      ' all interrupt return instructions
+End Enum
+
+
+'NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON
+Public Type cs_detail
+    regs_read(0 To 15) As Byte      ' list of implicit registers read by this insn UNSIGNED
+    regs_read_count As Byte         ' number of implicit registers read by this insn UNSIGNED
+    regs_write(0 To 19) As Byte     ' list of implicit registers modified by this insn UNSIGNED
+    regs_write_count As Byte        ' number of implicit registers modified by this insn UNSIGNED
+    groups(0 To 7) As Byte          ' list of group this instruction belong to UNSIGNED
+    groups_count As Byte            ' number of groups this insn belongs to UNSIGNED
+End Type
+
+'typedef struct cs_detail {
+'    uint8_t regs_read[16]; // list of implicit registers read by this insn
+'    uint8_t regs_read_count; // number of implicit registers read by this insn
+'
+'    uint8_t regs_write[20]; // list of implicit registers modified by this insn
+'    uint8_t regs_write_count; // number of implicit registers modified by this insn
+'
+'    uint8_t groups[8]; // list of group this instruction belong to
+'    uint8_t groups_count; // number of groups this insn belongs to
+'
+'    // Architecture-specific instruction info
+'    union {
+'        cs_x86 x86; // X86 architecture, including 16-bit, 32-bit & 64-bit mode
+'        cs_arm64 arm64; // ARM64 architecture (aka AArch64)
+'        cs_arm arm;     // ARM architecture (including Thumb/Thumb2)
+'        cs_mips mips;   // MIPS architecture
+'        cs_ppc ppc; // PowerPC architecture
+'        cs_sparc sparc; // Sparc architecture
+'        cs_sysz sysz;   // SystemZ architecture
+'        cs_xcore xcore; // XCore architecture
+'    };
+'} cs_detail;
+
+'Detail information of disassembled instruction
+Public Type cs_insn
+                              ' Instruction ID (basically a numeric ID for the instruction mnemonic)
+                              ' Find the instruction id in the '[ARCH]_insn' enum in the header file
+                              ' of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
+                              ' 'x86_insn' in x86.h for X86, etc...
+                              ' available even when CS_OPT_DETAIL = CS_OPT_OFF
+                              ' NOTE: in Skipdata mode, "data" instruction has 0 for this id field. UNSIGNED
+    ID As Long                '
+    align As Long             'not sure why it needs this..but it does..
+    address As Currency       ' Address (EIP) of this instruction available even when CS_OPT_DETAIL = CS_OPT_OFF UNSIGNED
+    size As Integer           ' Size of this instruction available even when CS_OPT_DETAIL = CS_OPT_OFF UNSIGNED
+    bytes(0 To 23) As Byte    ' Machine bytes of this instruction, with number of bytes indicated by @size above available even when CS_OPT_DETAIL = CS_OPT_OFF
+    mnemonic(0 To 31) As Byte ' Ascii text of instruction mnemonic available even when CS_OPT_DETAIL = CS_OPT_OFF
+    op_str(0 To 159) As Byte  ' Ascii text of instruction operands available even when CS_OPT_DETAIL = CS_OPT_OFF
+                            
+                              ' Pointer to cs_detail.
+                              ' NOTE: detail pointer is only valid when both requirements below are met:
+                              ' (1) CS_OP_DETAIL = CS_OPT_ON
+                              ' (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
+                              ' NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
+                              '  is not NULL, its content is still irrelevant.
+    lpDetail As Long          '  points to a cs_detail structure NOTE: only available when CS_OPT_DETAIL = CS_OPT_ON
+
+End Type
+
+'All type of errors encountered by Capstone API.
+'These are values returned by cs_errno()
+Public Enum cs_err
+    CS_ERR_OK = 0    ' No error: everything was fine
+    CS_ERR_MEM       ' Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
+    CS_ERR_ARCH      ' Unsupported architecture: cs_open()
+    CS_ERR_HANDLE    ' Invalid handle: cs_op_count(), cs_op_index()
+    CS_ERR_CSH       ' Invalid csh argument: cs_close(), cs_errno(), cs_option()
+    CS_ERR_MODE      ' Invalid/unsupported mode: cs_open()
+    CS_ERR_OPTION    ' Invalid/unsupported option: cs_option()
+    CS_ERR_DETAIL    ' Information is unavailable because detail option is OFF
+    CS_ERR_MEMSETUP  ' Dynamic memory management uninitialized (see CS_OPT_MEM)
+    CS_ERR_VERSION   ' Unsupported version (bindings)
+    CS_ERR_DIET      ' Access irrelevant data in "diet" engine
+    CS_ERR_SKIPDATA  ' Access irrelevant data for "data" instruction in SKIPDATA mode
+    CS_ERR_X86_ATT   ' X86 AT&T syntax is unsupported (opt-out at compile time)
+    CS_ERR_X86_INTEL ' X86 Intel syntax is unsupported (opt-out at compile time)
+End Enum
+
+
+'/*
+' Return combined API version & major and minor version numbers.
+'
+' @major: major number of API version
+' @minor: minor number of API version
+'
+' @return hexical number as (major << 8 | minor), which encodes both
+'     major & minor versions.
+'     NOTE: This returned value can be compared with version number made
+'     with macro CS_MAKE_VERSION
+'
+' For example, second API version would return 1 in @major, and 1 in @minor
+' The return value would be 0x0101
+'
+' NOTE: if you only care about returned value, but not major and minor values,
+' set both @major & @minor arguments to NULL.
+'*/
+'CAPSTONE_EXPORT
+'unsigned int cs_version(int *major, int *minor);
+Public Declare Function cs_version Lib "vbCapstone.dll" Alias "bs_version" (ByRef major As Long, ByRef minor As Long) As Long
+
+
+
+'
+'/*
+' This API can be used to either ask for archs supported by this library,
+' or check to see if the library was compile with 'diet' option (or called
+' in 'diet' mode).
+'
+' To check if a particular arch is supported by this library, set @query to
+' arch mode (CS_ARCH_* value).
+' To verify if this library supports all the archs, use CS_ARCH_ALL.
+'
+' To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET.
+'
+' @return True if this library supports the given arch, or in 'diet' mode.
+'*/
+'CAPSTONE_EXPORT
+'bool cs_support(int query);
+Public Declare Function cs_support Lib "vbCapstone.dll" Alias "bs_support" (ByVal query As Long) As Long
+
+
+
+'/*
+' Initialize CS handle: this must be done before any usage of CS.
+'
+' @arch: architecture type (CS_ARCH_*)
+' @mode: hardware mode. This is combined of CS_MODE_*
+' @handle: pointer to handle, which will be updated at return time
+'
+' @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+' for detailed error).
+'*/
+'CAPSTONE_EXPORT
+'cs_err cs_open(cs_arch arch, cs_mode mode, csh *handle);
+Public Declare Function cs_open Lib "vbCapstone.dll" Alias "bs_open" (ByVal arch As cs_arch, ByVal mode As cs_mode, ByRef hEngine As Long) As cs_err
+
+
+'/*
+' Close CS handle: MUST do to release the handle when it is not used anymore.
+' NOTE: this must be only called when there is no longer usage of Capstone,
+' not even access to cs_insn array. The reason is the this API releases some
+' cached memory, thus access to any Capstone API after cs_close() might crash
+' your application.
+'
+' In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0).
+'
+' @handle: pointer to a handle returned by cs_open()
+'
+' @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+' for detailed error).
+'*/
+'CAPSTONE_EXPORT
+'cs_err cs_close(csh *handle);
+Public Declare Function cs_close Lib "vbCapstone.dll" Alias "bs_close" (ByRef hEngine As Long) As cs_err
+
+
+
+'/*
+' Set option for disassembling engine at runtime
+'
+' @handle: handle returned by cs_open()
+' @type: type of option to be set
+' @value: option value corresponding with @type
+'
+' @return: CS_ERR_OK on success, or other value on failure.
+' Refer to cs_err enum for detailed error.
+'
+' NOTE: in the case of CS_OPT_MEM, handle's value can be anything,
+' so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called
+' even before cs_open()
+'*/
+'CAPSTONE_EXPORT
+'cs_err cs_option(csh handle, cs_opt_type type, size_t value);
+Public Declare Function cs_option Lib "vbCapstone.dll" Alias "bs_option" (ByVal hEngine As Long, ByVal typ As cs_opt_type, ByVal size As Long) As cs_err
+
+
+
+'/*
+' Report the last error number when some API function fail.
+' Like glibc's errno, cs_errno might not retain its old value once accessed.
+'
+' @handle: handle returned by cs_open()
+'
+' @return: error code of cs_err enum type (CS_ERR_*, see above)
+'*/
+'CAPSTONE_EXPORT
+'cs_err cs_errno(csh handle);
+Public Declare Function cs_errno Lib "vbCapstone.dll" Alias "bs_errno" (ByVal hEngine As Long) As cs_err
+
+'
+'/*
+' Return a string describing given error code.
+'
+' @code: error code (see CS_ERR_* above)
+'
+' @return: returns a pointer to a string that describes the error code
+'    passed in the argument @code
+'*/
+'CAPSTONE_EXPORT
+'const char *cs_strerror(cs_err code);
+Public Declare Function cs_strerror Lib "vbCapstone.dll" Alias "bs_strerror" (ByVal errCode As cs_err) As Long
+
+
+'/*
+' Disassemble binary code, given the code buffer, size, address and number
+' of instructions to be decoded.
+' This API dynamically allocate memory to contain disassembled instruction.
+' Resulting instructions will be put into @*insn
+'
+' NOTE 1: this API will automatically determine memory needed to contain
+' output disassembled instructions in @insn.
+'
+' NOTE 2: caller must free the allocated memory itself to avoid memory leaking.
+'
+' NOTE 3: for system with scarce memory to be dynamically allocated such as
+' OS kernel or firmware, the API cs_disasm_iter() might be a better choice than
+' cs_disasm(). The reason is that with cs_disasm(), based on limited available
+' memory, we have to calculate in advance how many instructions to be disassembled,
+' which complicates things. This is especially troublesome for the case @count=0,
+' when cs_disasm() runs uncontrollably (until either end of input buffer, or
+' when it encounters an invalid instruction).
+'
+' @handle: handle returned by cs_open()
+' @code: buffer containing raw binary code to be disassembled.
+' @code_size: size of the above code buffer.
+' @address: address of the first instruction in given raw code buffer.
+' @insn: array of instructions filled in by this API.
+'       NOTE: @insn will be allocated by this function, and should be freed
+'       with cs_free() API.
+' @count: number of instructions to be disassembled, or 0 to get all of them
+'
+' @return: the number of successfully disassembled instructions,
+' or 0 if this function failed to disassemble the given code
+'
+' On failure, call cs_errno() for error code.
+'*/
+'CAPSTONE_EXPORT
+'size_t cs_disasm(
+'        csh handle,
+'        const uint8_t *code,
+'        size_t code_size,
+'        uint64_t address,
+'        size_t count,
+'        cs_insn **insn
+');
+Public Declare Function cs_disasm Lib "vbCapstone.dll" Alias "bs_disasm" ( _
+    ByVal hEngine As Long, _
+    ByRef code As Byte, _
+    ByVal size As Long, _
+    ByVal address As Currency, _
+    ByVal count As Long, _
+    ByRef instAryPtr As Long _
+) As Long
+
+'this proto also lets use byte() to get a dump easily..
+Public Declare Sub getInstruction Lib "vbCapstone.dll" (ByVal hInstrAry As Long, ByVal index As Long, ByVal insPtr As Long, ByVal size As Long)
+
+
+'/*
+'  Deprecated function - to be retired in the next version!
+'  Use cs_disasm() instead of cs_disasm_ex()
+'*/
+'CAPSTONE_EXPORT
+'CAPSTONE_DEPRECATED
+'size_t cs_disasm_ex(csh handle,
+'        const uint8_t *code, size_t code_size,
+'        uint64_t address,
+'        size_t count,
+'        cs_insn **insn);
+
+
+
+'/*
+' Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)
+'
+' @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()
+' @count: number of cs_insn structures returned by cs_disasm(), or 1
+'     to free memory allocated by cs_malloc().
+'*/
+'CAPSTONE_EXPORT
+'void cs_free(cs_insn *insn, size_t count);
+Public Declare Sub cs_free Lib "vbCapstone.dll" Alias "bs_free" (ByVal instr As Long, ByVal count As Long)
+
+
+'
+'/*
+' Allocate memory for 1 instruction to be used by cs_disasm_iter().
+'
+' @handle: handle returned by cs_open()
+'
+' NOTE: when no longer in use, you can reclaim the memory allocated for
+' this instruction with cs_free(insn, 1)
+'*/
+'CAPSTONE_EXPORT
+'cs_insn *cs_malloc(csh handle);
+Public Declare Function cs_malloc Lib "vbCapstone.dll" Alias "bs_malloc" (ByVal handle As Long) As Long
+
+
+
+'/*
+' Fast API to disassemble binary code, given the code buffer, size, address
+' and number of instructions to be decoded.
+' This API puts the resulting instruction into a given cache in @insn.
+' See tests/test_iter.c for sample code demonstrating this API.
+'
+' NOTE 1: this API will update @code, @size & @address to point to the next
+' instruction in the input buffer. Therefore, it is convenient to use
+' cs_disasm_iter() inside a loop to quickly iterate all the instructions.
+' While decoding one instruction at a time can also be achieved with
+' cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%
+' faster on random input.
+'
+' NOTE 2: the cache in @insn can be created with cs_malloc() API.
+'
+' NOTE 3: for system with scarce memory to be dynamically allocated such as
+' OS kernel or firmware, this API is recommended over cs_disasm(), which
+' allocates memory based on the number of instructions to be disassembled.
+' The reason is that with cs_disasm(), based on limited available memory,
+' we have to calculate in advance how many instructions to be disassembled,
+' which complicates things. This is especially troublesome for the case
+' @count=0, when cs_disasm() runs uncontrollably (until either end of input
+' buffer, or when it encounters an invalid instruction).
+'
+' @handle: handle returned by cs_open()
+' @code: buffer containing raw binary code to be disassembled
+' @code_size: size of above code
+' @address: address of the first insn in given raw code buffer
+' @insn: pointer to instruction to be filled in by this API.
+'
+' @return: true if this API successfully decode 1 instruction,
+' or false otherwise.
+'
+' On failure, call cs_errno() for error code.
+'*/
+'CAPSTONE_EXPORT
+'bool cs_disasm_iter(csh handle, const uint8_t **code, size_t *size, uint64_t *address, cs_insn *insn);
+
+
+
+'/*
+' Return friendly name of register in a string.
+' Find the instruction id from header file of corresponding architecture (arm.h for ARM,
+' x86.h for X86, ...)
+'
+' WARN: when in 'diet' mode, this API is irrelevant because engine does not
+' store register name.
+'
+' @handle: handle returned by cs_open()
+' @reg_id: register id
+'
+' @return: string name of the register, or NULL if @reg_id is invalid.
+'*/
+'CAPSTONE_EXPORT
+'const char *cs_reg_name(csh handle, unsigned int reg_id);
+Public Declare Function cs_reg_name Lib "vbCapstone.dll" Alias "bs_reg_name" (ByVal handle As Long, ByVal regID As Long) As Long
+
+
+
+
+'/*
+' Return friendly name of an instruction in a string.
+' Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+'
+' WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+' store instruction name.
+'
+' @handle: handle returned by cs_open()
+' @insn_id: instruction id
+'
+' @return: string name of the instruction, or NULL if @insn_id is invalid.
+'*/
+'CAPSTONE_EXPORT
+'const char *cs_insn_name(csh handle, unsigned int insn_id);
+Public Declare Function cs_insn_name Lib "vbCapstone.dll" Alias "bs_insn_name" (ByVal handle As Long, ByVal insn_id As Long) As Long
+
+
+
+
+'/*
+' Return friendly name of a group id (that an instruction can belong to)
+' Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+'
+' WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+' store group name.
+'
+' @handle: handle returned by cs_open()
+' @group_id: group id
+'
+' @return: string name of the group, or NULL if @group_id is invalid.
+'*/
+'CAPSTONE_EXPORT
+'const char *cs_group_name(csh handle, unsigned int group_id);
+Public Declare Function cs_group_name Lib "vbCapstone.dll" Alias "bs_group_name" (ByVal handle As Long, ByVal group_id As Long) As Long
+
+
+
+'/*
+' Check if a disassembled instruction belong to a particular group.
+' Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+' Internally, this simply verifies if @group_id matches any member of insn->groups array.
+'
+' NOTE: this API is only valid when detail option is ON (which is OFF by default).
+'
+' WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+' update @groups array.
+'
+' @handle: handle returned by cs_open()
+' @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+' @group_id: group that you want to check if this instruction belong to.
+'
+' @return: true if this instruction indeed belongs to the given group, or false otherwise.
+'*/
+'CAPSTONE_EXPORT
+'bool cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id);
+Public Declare Function cs_insn_group Lib "vbCapstone.dll" Alias "bs_insn_group" (ByVal handle As Long, ByVal instruction As Long, ByVal group_id As Long) As Long
+
+
+
+'/*
+' Check if a disassembled instruction IMPLICITLY used a particular register.
+' Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+' Internally, this simply verifies if @reg_id matches any member of insn->regs_read array.
+'
+' NOTE: this API is only valid when detail option is ON (which is OFF by default)
+'
+' WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+' update @regs_read array.
+'
+' @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+' @reg_id: register that you want to check if this instruction used it.
+'
+' @return: true if this instruction indeed implicitly used the given register, or false otherwise.
+'*/
+'CAPSTONE_EXPORT
+'bool cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id);
+Public Declare Function cs_reg_read Lib "vbCapstone.dll" Alias "bs_reg_read" (ByVal handle As Long, ByVal instruction As Long, ByVal reg_id As Long) As Long
+
+
+
+'/*
+' Check if a disassembled instruction IMPLICITLY modified a particular register.
+' Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+' Internally, this simply verifies if @reg_id matches any member of insn->regs_write array.
+'
+' NOTE: this API is only valid when detail option is ON (which is OFF by default)
+'
+' WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+' update @regs_write array.
+'
+' @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+' @reg_id: register that you want to check if this instruction modified it.
+'
+' @return: true if this instruction indeed implicitly modified the given register, or false otherwise.
+'*/
+'CAPSTONE_EXPORT
+'bool cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id);
+Public Declare Function cs_reg_write Lib "vbCapstone.dll" Alias "bs_reg_write" (ByVal handle As Long, ByVal instruction As Long, ByVal reg_id As Long) As Long
+
+
+
+'/*
+' Count the number of operands of a given type.
+' Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+'
+' NOTE: this API is only valid when detail option is ON (which is OFF by default)
+'
+' @handle: handle returned by cs_open()
+' @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+' @op_type: Operand type to be found.
+'
+' @return: number of operands of given type @op_type in instruction @insn,
+' or -1 on failure.
+'*/
+'CAPSTONE_EXPORT
+'int cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type);
+Public Declare Function cs_op_count Lib "vbCapstone.dll" Alias "bs_op_count" (ByVal handle As Long, ByVal instruction As Long, ByVal op_type As Long) As Long
+
+
+
+'/*
+' Retrieve the position of operand of given type in <arch>.operands[] array.
+' Later, the operand can be accessed using the returned position.
+' Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+'
+' NOTE: this API is only valid when detail option is ON (which is OFF by default)
+'
+' @handle: handle returned by cs_open()
+' @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+' @op_type: Operand type to be found.
+' @position: position of the operand to be found. This must be in the range
+'            [1, cs_op_count(handle, insn, op_type)]
+'
+' @return: index of operand of given type @op_type in <arch>.operands[] array
+' in instruction @insn, or -1 on failure.
+'*/
+'CAPSTONE_EXPORT
+'int cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type, unsigned int position);
+Public Declare Function cs_op_index Lib "vbCapstone.dll" Alias "bs_op_index" (ByVal handle As Long, ByVal instruction As Long, ByVal op_type As Long, ByVal position As Long) As Long
+
+
+
+Private Declare Function lstrcpy Lib "kernel32" Alias "lstrcpyA" (ByVal lpString1 As String, ByVal lpString2 As String) As Long
+Private Declare Function lstrlen Lib "kernel32" Alias "lstrlenA" (ByVal lpString As Long) As Long
+
+Function cstr2vb(lpStr As Long) As String
+
+    Dim length As Long
+    Dim buf() As Byte
+
+    If lpStr = 0 Then Exit Function
+
+    length = lstrlen(lpStr)
+    If length < 1 Then Exit Function
+    
+    ReDim buf(1 To length)
+    CopyMemory buf(1), ByVal lpStr, length
+
+    cstr2vb = StrConv(buf, vbUnicode, &H409)
+
+End Function
+
+Function err2str(e As cs_err) As String
+    Dim lpStr As Long
+    lpStr = cs_strerror(e)
+    err2str = cstr2vb(lpStr)
+End Function
+
+Function regName(hEngine As Long, regID As Long) As String
+    Dim lpStr As Long
+    lpStr = cs_reg_name(hEngine, regID)
+    regName = cstr2vb(lpStr)
+    If Len(regName) = 0 Or DEBUG_DUMP Then regName = regName & " (" & Hex(regID) & ")"
+End Function
+
+Function insnName(hEngine As Long, insnID As Long) As String
+    Dim lpStr As Long
+    lpStr = cs_insn_name(hEngine, insnID)
+    insnName = cstr2vb(lpStr)
+    If Len(insnName) = 0 Or DEBUG_DUMP Then insnName = insnName & " (" & Hex(insnID) & ")"
+End Function
+
+Function groupName(hEngine As Long, groupID As Long) As String
+    Dim lpStr As Long
+    lpStr = cs_group_name(hEngine, groupID)
+    groupName = cstr2vb(lpStr)
+    If Len(groupName) = 0 Or DEBUG_DUMP Then groupName = groupName & " (" & Hex(groupID) & ")"
+End Function
diff --git a/capstone/bindings/vb6/Project1.vbp b/capstone/bindings/vb6/Project1.vbp
new file mode 100644
index 000000000..249657a6e
--- /dev/null
+++ b/capstone/bindings/vb6/Project1.vbp
@@ -0,0 +1,46 @@
+Type=Exe
+Reference=*\G{00020430-0000-0000-C000-000000000046}#2.0#0#C:\WINDOWS\system32\stdole2.tlb#OLE Automation
+Form=Form1.frm
+Module=mCapStone; Module1.bas
+Module=mx86; mx86.bas
+Module=mMisc; mMisc.bas
+Class=CInstruction; CInstruction.cls
+Class=CInstDetails; CInstDetails.cls
+Class=CDisassembler; CDisassembler.cls
+Object={831FDD16-0C5C-11D2-A9FC-0000F8754DA1}#2.0#0; mscomctl.ocx
+Class=CX86Inst; CX86Inst.cls
+Class=CX86Operand; CX86Operand.cls
+Class=CX86OpMem; CX86OpMem.cls
+Startup="Form1"
+ExeName32="Project1.exe"
+Command32=""
+Name="Project1"
+HelpContextID="0"
+CompatibleMode="0"
+MajorVer=1
+MinorVer=0
+RevisionVer=0
+AutoIncrementVer=0
+ServerSupportFiles=0
+VersionCompanyName="sandsprite"
+CompilationType=0
+OptimizationType=0
+FavorPentiumPro(tm)=0
+CodeViewDebugInfo=0
+NoAliasing=0
+BoundsCheck=0
+OverflowCheck=0
+FlPointCheck=0
+FDIVCheck=0
+UnroundedFP=0
+StartMode=0
+Unattended=0
+Retained=0
+ThreadPerObject=0
+MaxNumberOfThreads=1
+
+[MS Transaction Server]
+AutoRefresh=1
+
+[fastBuild]
+fullPath=%ap%\bin\demo.exe
diff --git a/capstone/bindings/vb6/Project1.vbw b/capstone/bindings/vb6/Project1.vbw
new file mode 100644
index 000000000..0db503ff4
--- /dev/null
+++ b/capstone/bindings/vb6/Project1.vbw
@@ -0,0 +1,10 @@
+Form1 = 110, 110, 1233, 906, , 88, 88, 1116, 749, C
+mCapStone = 22, 22, 1050, 683, 
+mx86 = 88, 88, 1040, 757, 
+mMisc = 66, 66, 1094, 727, 
+CInstruction = 0, 0, 0, 0, C
+CInstDetails = 132, 132, 1084, 801, C
+CDisassembler = 44, 44, 1229, 809, 
+CX86Inst = 154, 154, 1106, 823, C
+CX86Operand = 176, 176, 1128, 845, C
+CX86OpMem = 198, 198, 1150, 867, C
diff --git a/capstone/bindings/vb6/README.txt b/capstone/bindings/vb6/README.txt
new file mode 100644
index 000000000..aca836afc
--- /dev/null
+++ b/capstone/bindings/vb6/README.txt
@@ -0,0 +1,30 @@
+
+Capstone Disassembly Engine bindings for VB6
+Contributed by FireEye FLARE Team
+Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+License: Apache  
+Copyright: FireEye 2017
+
+This is a sample for using the capstone disassembly engine with VB6.
+
+All of the capstone API are implemented, so this lib supports basic 
+disassembly of all of the processor architectures that capstone implements.
+
+In the vb code, full instruction details are currently only supported for
+the x86 processor family.
+
+This sample was built against Capstone 3.0 rc4. Note that if the capstone
+structures change in the future this code will have to be adjusted to match.
+
+The vbCapstone.dll is written in C. Project files are provided for VS2008.
+It is a small shim to give VB6 access to a stdcall API to access capstone.
+You could also modify capstone itself so its exports were stdcall.
+
+The C project has an additional include directory set to ./../../include/
+for <capstone.h>. This is for the /capstone/bindings/vb6/ directory structure
+
+
+
+
+
+
diff --git a/capstone/bindings/vb6/mMisc.bas b/capstone/bindings/vb6/mMisc.bas
new file mode 100644
index 000000000..2ccb1308e
--- /dev/null
+++ b/capstone/bindings/vb6/mMisc.bas
@@ -0,0 +1,385 @@
+Attribute VB_Name = "mMisc"
+Option Explicit
+
+'These are old library functions
+
+Private Type Bit64Currency
+  value As Currency
+End Type
+
+Private Type Bit64Integer
+  LowValue As Long
+  HighValue As Long
+End Type
+
+Global Const LANG_US = &H409
+
+Public Declare Function LoadLibrary Lib "kernel32" Alias "LoadLibraryA" (ByVal lpLibFileName As String) As Long
+Public Declare Function FreeLibrary Lib "kernel32" (ByVal hLibModule As Long) As Long
+Public Declare Sub CopyMemory Lib "kernel32" Alias "RtlMoveMemory" (Destination As Any, Source As Any, ByVal length As Long)
+Public Declare Function GetProcAddress Lib "kernel32" (ByVal hModule As Long, ByVal lpProcName As String) As Long
+Public Declare Function GetModuleHandle Lib "kernel32" Alias "GetModuleHandleA" (ByVal lpModuleName As String) As Long
+Public Declare Function SetDllDirectory Lib "kernel32" Alias "SetDllDirectoryA" (ByVal lpPathName As String) As Long
+
+Function makeCur(high As Long, low As Long) As Currency
+  Dim c As Bit64Currency
+  Dim dl As Bit64Integer
+  dl.LowValue = low
+  dl.HighValue = high
+  LSet c = dl
+  makeCur = c.value
+End Function
+
+Function lng2Cur(v As Long) As Currency
+  Dim c As Bit64Currency
+  Dim dl As Bit64Integer
+  dl.LowValue = v
+  dl.HighValue = 0
+  LSet c = dl
+  lng2Cur = c.value
+End Function
+
+Function cur2str(v As Currency) As String
+    Dim c As Bit64Currency
+    Dim dl As Bit64Integer
+    c.value = v
+    LSet dl = c
+    If dl.HighValue = 0 Then
+        cur2str = Right("00000000" & Hex(dl.LowValue), 8)
+    Else
+        cur2str = Right("00000000" & Hex(dl.HighValue), 8) & "`" & Right("00000000" & Hex(dl.LowValue), 8)
+    End If
+End Function
+
+Function x64StrToCur(ByVal str As String) As Currency
+        
+    str = Replace(Trim(str), "0x", "")
+    str = Replace(str, " ", "")
+    str = Replace(str, "`", "")
+     
+    Dim low As String, high As String
+    Dim c As Bit64Currency
+    Dim dl As Bit64Integer
+    
+    low = VBA.Right(str, 8)
+    dl.LowValue = CLng("&h" & low)
+    
+    If Len(str) > 8 Then
+        high = Mid(str, 1, Len(str) - 8)
+        dl.HighValue = CLng("&h" & high)
+    End If
+     
+    LSet c = dl
+    x64StrToCur = c.value
+      
+End Function
+
+Function cur2lng(v As Currency) As Long
+  Dim c As Bit64Currency
+  Dim dl As Bit64Integer
+  c.value = v
+  LSet dl = c
+  cur2lng = dl.LowValue
+End Function
+
+Function readLng(offset As Long) As Long
+    Dim tmp As Long
+    CopyMemory ByVal VarPtr(tmp), ByVal offset, 4
+    readLng = tmp
+End Function
+
+Function readByte(offset As Long) As Byte
+    Dim tmp As Byte
+    CopyMemory ByVal VarPtr(tmp), ByVal offset, 1
+    readByte = tmp
+End Function
+
+Function readCur(offset As Long) As Currency
+    Dim tmp As Currency
+    CopyMemory ByVal VarPtr(tmp), ByVal offset, 8
+    readCur = tmp
+End Function
+
+Function col2Str(c As Collection, Optional emptyVal = "") As String
+    Dim v, tmp As String
+    
+    If c.count = 0 Then
+        col2Str = emptyVal
+    Else
+        For Each v In c
+            col2Str = col2Str & hhex(v) & ", "
+        Next
+        col2Str = Mid(col2Str, 1, Len(col2Str) - 2)
+    End If
+    
+End Function
+
+Function regCol2Str(hEngine As Long, c As Collection) As String
+    Dim v, tmp As String
+    
+    If c.count = 0 Then Exit Function
+    
+    For Each v In c
+        regCol2Str = regCol2Str & regName(hEngine, CLng(v)) & ", "
+    Next
+    regCol2Str = Mid(regCol2Str, 1, Len(regCol2Str) - 2)
+    
+End Function
+
+
+
+Function b2Str(b() As Byte) As String
+    Dim i As Long
+    
+    If AryIsEmpty(b) Then
+         b2Str = "Empty"
+    Else
+        For i = 0 To UBound(b)
+             b2Str = b2Str & hhex(b(i)) & " "
+        Next
+        b2Str = Trim(b2Str)
+    End If
+
+End Function
+
+
+
+Function AryIsEmpty(ary) As Boolean
+  Dim i As Long
+  
+  On Error GoTo oops
+    i = UBound(ary)  '<- throws error if not initalized
+    AryIsEmpty = False
+  Exit Function
+oops: AryIsEmpty = True
+End Function
+
+Public Function toBytes(ByVal hexstr, Optional strRet As Boolean = False)
+
+'supports:
+'11 22 33 44   spaced hex chars
+'11223344      run together hex strings
+'11,22,33,44   csv hex
+'\x11,0x22     misc C source rips
+'
+'ignores common C source prefixes, operators, delimiters, and whitespace
+'
+'not supported
+'1,2,3,4        all hex chars are must have two chars even if delimited
+'
+'a version which supports more formats is here:
+'  https://github.com/dzzie/libs/blob/master/dzrt/globals.cls
+
+    Dim ret As String, x As String, str As String
+    Dim r() As Byte, b As Byte, b1 As Byte
+    Dim foundDecimal As Boolean, tmp, i, a, a2
+    Dim pos As Long, marker As String
+    
+    On Error GoTo nope
+    
+    str = Replace(hexstr, vbCr, Empty)
+    str = Replace(str, vbLf, Empty)
+    str = Replace(str, vbTab, Empty)
+    str = Replace(str, Chr(0), Empty)
+    str = Replace(str, "{", Empty)
+    str = Replace(str, "}", Empty)
+    str = Replace(str, ";", Empty)
+    str = Replace(str, "+", Empty)
+    str = Replace(str, """""", Empty)
+    str = Replace(str, "'", Empty)
+    str = Replace(str, " ", Empty)
+    str = Replace(str, "0x", Empty)
+    str = Replace(str, "\x", Empty)
+    str = Replace(str, ",", Empty)
+    
+    For i = 1 To Len(str) Step 2
+        x = Mid(str, i, 2)
+        If Not isHexChar(x, b) Then Exit Function
+        bpush r(), b
+    Next
+    
+    If strRet Then
+        toBytes = StrConv(r, vbUnicode, LANG_US)
+    Else
+        toBytes = r
+    End If
+    
+nope:
+End Function
+
+Private Sub bpush(bAry() As Byte, b As Byte) 'this modifies parent ary object
+    On Error GoTo init
+    Dim x As Long
+    
+    x = UBound(bAry) '<-throws Error If Not initalized
+    ReDim Preserve bAry(UBound(bAry) + 1)
+    bAry(UBound(bAry)) = b
+    
+    Exit Sub
+
+init:
+    ReDim bAry(0)
+    bAry(0) = b
+    
+End Sub
+
+Sub push(ary, value) 'this modifies parent ary object
+    On Error GoTo init
+    Dim x
+       
+    x = UBound(ary)
+    ReDim Preserve ary(x + 1)
+    
+    If IsObject(value) Then
+        Set ary(x + 1) = value
+    Else
+        ary(x + 1) = value
+    End If
+    
+    Exit Sub
+init:
+    ReDim ary(0)
+    If IsObject(value) Then
+        Set ary(0) = value
+    Else
+        ary(0) = value
+    End If
+End Sub
+
+
+Public Function isHexChar(hexValue As String, Optional b As Byte) As Boolean
+    On Error Resume Next
+    Dim v As Long
+    
+    If Len(hexValue) = 0 Then GoTo nope
+    If Len(hexValue) > 2 Then GoTo nope 'expecting hex char code like FF or 90
+    
+    v = CLng("&h" & hexValue)
+    If Err.Number <> 0 Then GoTo nope 'invalid hex code
+    
+    b = CByte(v)
+    If Err.Number <> 0 Then GoTo nope  'shouldnt happen.. > 255 cant be with len() <=2 ?
+
+    isHexChar = True
+    
+    Exit Function
+nope:
+    Err.Clear
+    isHexChar = False
+End Function
+
+Function hhex(b) As String
+    hhex = Right("00" & Hex(b), 2)
+End Function
+
+Function rpad(x, i, Optional c = " ")
+    rpad = Left(x & String(i, c), i)
+End Function
+
+Function HexDump(bAryOrStrData, Optional hexOnly = 0, Optional ByVal startAt As Long = 1, Optional ByVal length As Long = -1) As String
+    Dim s() As String, chars As String, tmp As String
+    On Error Resume Next
+    Dim ary() As Byte
+    Dim offset As Long
+    Const LANG_US = &H409
+    Dim i As Long, tt, h, x
+
+    offset = 0
+    
+    If TypeName(bAryOrStrData) = "Byte()" Then
+        ary() = bAryOrStrData
+    Else
+        ary = StrConv(CStr(bAryOrStrData), vbFromUnicode, LANG_US)
+    End If
+    
+    If startAt < 1 Then startAt = 1
+    If length < 1 Then length = -1
+    
+    While startAt Mod 16 <> 0
+        startAt = startAt - 1
+    Wend
+    
+    startAt = startAt + 1
+    
+    chars = "   "
+    For i = startAt To UBound(ary) + 1
+        tt = Hex(ary(i - 1))
+        If Len(tt) = 1 Then tt = "0" & tt
+        tmp = tmp & tt & " "
+        x = ary(i - 1)
+        'chars = chars & IIf((x > 32 And x < 127) Or x > 191, Chr(x), ".") 'x > 191 causes \x0 problems on non us systems... asc(chr(x)) = 0
+        chars = chars & IIf((x > 32 And x < 127), Chr(x), ".")
+        If i > 1 And i Mod 16 = 0 Then
+            h = Hex(offset)
+            While Len(h) < 6: h = "0" & h: Wend
+            If hexOnly = 0 Then
+                push s, h & "   " & tmp & chars
+            Else
+                push s, tmp
+            End If
+            offset = offset + 16
+            tmp = Empty
+            chars = "   "
+        End If
+        If length <> -1 Then
+            length = length - 1
+            If length = 0 Then Exit For
+        End If
+    Next
+    
+    'if read length was not mod 16=0 then
+    'we have part of line to account for
+    If tmp <> Empty Then
+        If hexOnly = 0 Then
+            h = Hex(offset)
+            While Len(h) < 6: h = "0" & h: Wend
+            h = h & "   " & tmp
+            While Len(h) <= 56: h = h & " ": Wend
+            push s, h & chars
+        Else
+            push s, tmp
+        End If
+    End If
+    
+    HexDump = Join(s, vbCrLf)
+    
+    If hexOnly <> 0 Then
+        HexDump = Replace(HexDump, " ", "")
+        HexDump = Replace(HexDump, vbCrLf, "")
+    End If
+    
+End Function
+
+
+
+Function FileExists(path As String) As Boolean
+  On Error GoTo hell
+    
+  If Len(path) = 0 Then Exit Function
+  If Right(path, 1) = "\" Then Exit Function
+  If Dir(path, vbHidden Or vbNormal Or vbReadOnly Or vbSystem) <> "" Then FileExists = True
+  
+  Exit Function
+hell: FileExists = False
+End Function
+
+Sub WriteFile(path, it)
+    Dim f
+    f = FreeFile
+    Open path For Output As #f
+    Print #f, it
+    Close f
+End Sub
+
+Function GetParentFolder(path) As String
+    Dim tmp() As String, ub As Long
+    On Error Resume Next
+    tmp = Split(path, "\")
+    ub = tmp(UBound(tmp))
+    If Err.Number = 0 Then
+        GetParentFolder = Replace(Join(tmp, "\"), "\" & ub, "")
+    Else
+        GetParentFolder = path
+    End If
+End Function
+
diff --git a/capstone/bindings/vb6/mx86.bas b/capstone/bindings/vb6/mx86.bas
new file mode 100644
index 000000000..aa073ad65
--- /dev/null
+++ b/capstone/bindings/vb6/mx86.bas
@@ -0,0 +1,1868 @@
+Attribute VB_Name = "mx86"
+Option Explicit
+
+'Capstone Disassembly Engine bindings for VB6
+'Contributed by FireEye FLARE Team
+'Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+'License: Apache
+'Copyright: FireEye 2017
+
+
+Enum x86_reg
+    X86_REG_INVALID = 0
+    X86_REG_AH
+    X86_REG_AL
+    X86_REG_AX
+    X86_REG_BH
+    X86_REG_BL
+    X86_REG_BP
+    X86_REG_BPL
+    X86_REG_BX
+    X86_REG_CH
+    X86_REG_CL
+    X86_REG_CS
+    X86_REG_CX
+    X86_REG_DH
+    X86_REG_DI
+    X86_REG_DIL
+    X86_REG_DL
+    X86_REG_DS
+    X86_REG_DX
+    X86_REG_EAX
+    X86_REG_EBP
+    X86_REG_EBX
+    X86_REG_ECX
+    X86_REG_EDI
+    X86_REG_EDX
+    X86_REG_EFLAGS
+    X86_REG_EIP
+    X86_REG_EIZ
+    X86_REG_ES
+    X86_REG_ESI
+    X86_REG_ESP
+    X86_REG_FPSW
+    X86_REG_FS
+    X86_REG_GS
+    X86_REG_IP
+    X86_REG_RAX
+    X86_REG_RBP
+    X86_REG_RBX
+    X86_REG_RCX
+    X86_REG_RDI
+    X86_REG_RDX
+    X86_REG_RIP
+    X86_REG_RIZ
+    X86_REG_RSI
+    X86_REG_RSP
+    X86_REG_SI
+    X86_REG_SIL
+    X86_REG_SP
+    X86_REG_SPL
+    X86_REG_SS
+    X86_REG_CR0
+    X86_REG_CR1
+    X86_REG_CR2
+    X86_REG_CR3
+    X86_REG_CR4
+    X86_REG_CR5
+    X86_REG_CR6
+    X86_REG_CR7
+    X86_REG_CR8
+    X86_REG_CR9
+    X86_REG_CR10
+    X86_REG_CR11
+    X86_REG_CR12
+    X86_REG_CR13
+    X86_REG_CR14
+    X86_REG_CR15
+    X86_REG_DR0
+    X86_REG_DR1
+    X86_REG_DR2
+    X86_REG_DR3
+    X86_REG_DR4
+    X86_REG_DR5
+    X86_REG_DR6
+    X86_REG_DR7
+    X86_REG_FP0
+    X86_REG_FP1
+    X86_REG_FP2
+    X86_REG_FP3
+    X86_REG_FP4
+    X86_REG_FP5
+    X86_REG_FP6
+    X86_REG_FP7
+    X86_REG_K0
+    X86_REG_K1
+    X86_REG_K2
+    X86_REG_K3
+    X86_REG_K4
+    X86_REG_K5
+    X86_REG_K6
+    X86_REG_K7
+    X86_REG_MM0
+    X86_REG_MM1
+    X86_REG_MM2
+    X86_REG_MM3
+    X86_REG_MM4
+    X86_REG_MM5
+    X86_REG_MM6
+    X86_REG_MM7
+    X86_REG_R8
+    X86_REG_R9
+    X86_REG_R10
+    X86_REG_R11
+    X86_REG_R12
+    X86_REG_R13
+    X86_REG_R14
+    X86_REG_R15
+    X86_REG_ST0
+    X86_REG_ST1
+    X86_REG_ST2
+    X86_REG_ST3
+    X86_REG_ST4
+    X86_REG_ST5
+    X86_REG_ST6
+    X86_REG_ST7
+    X86_REG_XMM0
+    X86_REG_XMM1
+    X86_REG_XMM2
+    X86_REG_XMM3
+    X86_REG_XMM4
+    X86_REG_XMM5
+    X86_REG_XMM6
+    X86_REG_XMM7
+    X86_REG_XMM8
+    X86_REG_XMM9
+    X86_REG_XMM10
+    X86_REG_XMM11
+    X86_REG_XMM12
+    X86_REG_XMM13
+    X86_REG_XMM14
+    X86_REG_XMM15
+    X86_REG_XMM16
+    X86_REG_XMM17
+    X86_REG_XMM18
+    X86_REG_XMM19
+    X86_REG_XMM20
+    X86_REG_XMM21
+    X86_REG_XMM22
+    X86_REG_XMM23
+    X86_REG_XMM24
+    X86_REG_XMM25
+    X86_REG_XMM26
+    X86_REG_XMM27
+    X86_REG_XMM28
+    X86_REG_XMM29
+    X86_REG_XMM30
+    X86_REG_XMM31
+    X86_REG_YMM0
+    X86_REG_YMM1
+    X86_REG_YMM2
+    X86_REG_YMM3
+    X86_REG_YMM4
+    X86_REG_YMM5
+    X86_REG_YMM6
+    X86_REG_YMM7
+    X86_REG_YMM8
+    X86_REG_YMM9
+    X86_REG_YMM10
+    X86_REG_YMM11
+    X86_REG_YMM12
+    X86_REG_YMM13
+    X86_REG_YMM14
+    X86_REG_YMM15
+    X86_REG_YMM16
+    X86_REG_YMM17
+    X86_REG_YMM18
+    X86_REG_YMM19
+    X86_REG_YMM20
+    X86_REG_YMM21
+    X86_REG_YMM22
+    X86_REG_YMM23
+    X86_REG_YMM24
+    X86_REG_YMM25
+    X86_REG_YMM26
+    X86_REG_YMM27
+    X86_REG_YMM28
+    X86_REG_YMM29
+    X86_REG_YMM30
+    X86_REG_YMM31
+    X86_REG_ZMM0
+    X86_REG_ZMM1
+    X86_REG_ZMM2
+    X86_REG_ZMM3
+    X86_REG_ZMM4
+    X86_REG_ZMM5
+    X86_REG_ZMM6
+    X86_REG_ZMM7
+    X86_REG_ZMM8
+    X86_REG_ZMM9
+    X86_REG_ZMM10
+    X86_REG_ZMM11
+    X86_REG_ZMM12
+    X86_REG_ZMM13
+    X86_REG_ZMM14
+    X86_REG_ZMM15
+    X86_REG_ZMM16
+    X86_REG_ZMM17
+    X86_REG_ZMM18
+    X86_REG_ZMM19
+    X86_REG_ZMM20
+    X86_REG_ZMM21
+    X86_REG_ZMM22
+    X86_REG_ZMM23
+    X86_REG_ZMM24
+    X86_REG_ZMM25
+    X86_REG_ZMM26
+    X86_REG_ZMM27
+    X86_REG_ZMM28
+    X86_REG_ZMM29
+    X86_REG_ZMM30
+    X86_REG_ZMM31
+    X86_REG_R8B
+    X86_REG_R9B
+    X86_REG_R10B
+    X86_REG_R11B
+    X86_REG_R12B
+    X86_REG_R13B
+    X86_REG_R14B
+    X86_REG_R15B
+    X86_REG_R8D
+    X86_REG_R9D
+    X86_REG_R10D
+    X86_REG_R11D
+    X86_REG_R12D
+    X86_REG_R13D
+    X86_REG_R14D
+    X86_REG_R15D
+    X86_REG_R8W
+    X86_REG_R9W
+    X86_REG_R10W
+    X86_REG_R11W
+    X86_REG_R12W
+    X86_REG_R13W
+    X86_REG_R14W
+    X86_REG_R15W
+    X86_REG_ENDING          '  <-- mark    the end of  the list    of  registers
+End Enum
+
+'Operand type for instruction's operands
+Enum x86_op_type
+    X86_OP_INVALID = 0   'CS_OP_INVALID (Uninitialized).
+    X86_OP_REG           'CS_OP_REG (Register operand).
+    X86_OP_IMM           'CS_OP_IMM (Immediate operand).
+    x86_op_mem           'CS_OP_MEM (Memory operand).
+    X86_OP_FP            'CS_OP_FP  (Floating-Point operand).
+End Enum
+
+'AVX broadcast type
+Public Enum x86_avx_bcast
+    X86_AVX_BCAST_INVALID = 0 ' Uninitialized.
+    X86_AVX_BCAST_2         ' AVX512 broadcast type {1to2}
+    X86_AVX_BCAST_4         ' AVX512 broadcast type {1to4}
+    X86_AVX_BCAST_8         ' AVX512 broadcast type {1to8}
+    X86_AVX_BCAST_16        ' AVX512 broadcast type {1to16}
+End Enum
+
+
+'SSE Code Condition type
+Public Enum x86_sse_cc
+    X86_SSE_CC_INVALID = 0 ' Uninitialized.
+    X86_SSE_CC_EQ
+    X86_SSE_CC_LT
+    X86_SSE_CC_LE
+    X86_SSE_CC_UNORD
+    X86_SSE_CC_NEQ
+    X86_SSE_CC_NLT
+    X86_SSE_CC_NLE
+    X86_SSE_CC_ORD
+    X86_SSE_CC_EQ_UQ
+    X86_SSE_CC_NGE
+    X86_SSE_CC_NGT
+    X86_SSE_CC_FALSE
+    X86_SSE_CC_NEQ_OQ
+    X86_SSE_CC_GE
+    X86_SSE_CC_GT
+    X86_SSE_CC_TRUE
+End Enum
+
+'AVX Code Condition type
+Public Enum x86_avx_cc
+    X86_AVX_CC_INVALID = 0 ' Uninitialized.
+    X86_AVX_CC_EQ
+    X86_AVX_CC_LT
+    X86_AVX_CC_LE
+    X86_AVX_CC_UNORD
+    X86_AVX_CC_NEQ
+    X86_AVX_CC_NLT
+    X86_AVX_CC_NLE
+    X86_AVX_CC_ORD
+    X86_AVX_CC_EQ_UQ
+    X86_AVX_CC_NGE
+    X86_AVX_CC_NGT
+    X86_AVX_CC_FALSE
+    X86_AVX_CC_NEQ_OQ
+    X86_AVX_CC_GE
+    X86_AVX_CC_GT
+    X86_AVX_CC_TRUE
+    X86_AVX_CC_EQ_OS
+    X86_AVX_CC_LT_OQ
+    X86_AVX_CC_LE_OQ
+    X86_AVX_CC_UNORD_S
+    X86_AVX_CC_NEQ_US
+    X86_AVX_CC_NLT_UQ
+    X86_AVX_CC_NLE_UQ
+    X86_AVX_CC_ORD_S
+    X86_AVX_CC_EQ_US
+    X86_AVX_CC_NGE_UQ
+    X86_AVX_CC_NGT_UQ
+    X86_AVX_CC_FALSE_OS
+    X86_AVX_CC_NEQ_OS
+    X86_AVX_CC_GE_OQ
+    X86_AVX_CC_GT_OQ
+    X86_AVX_CC_TRUE_US
+End Enum
+
+'AVX static rounding mode type
+Public Enum x86_avx_rm
+    X86_AVX_RM_INVALID = 0 ' Uninitialized.
+    X86_AVX_RM_RN        ' Round to nearest
+    X86_AVX_RM_RD        ' Round down
+    X86_AVX_RM_RU        ' Round up
+    X86_AVX_RM_RZ        ' Round toward zero
+End Enum
+
+'Instruction prefixes - to be used in cs_x86.prefix[]
+Public Enum x86_prefix
+    X86_PREFIX_LOCK = &HF0     ' lock (cs_x86.prefix[0]
+    X86_PREFIX_REP = &HF3      ' rep (cs_x86.prefix[0]
+    X86_PREFIX_REPNE = &HF2    ' repne (cs_x86.prefix[0]
+    X86_PREFIX_CS = &H2E       ' segment override CS (cs_x86.prefix[1]
+    X86_PREFIX_SS = &H36       ' segment override SS (cs_x86.prefix[1]
+    X86_PREFIX_DS = &H3E       ' segment override DS (cs_x86.prefix[1]
+    X86_PREFIX_ES = &H26       ' segment override ES (cs_x86.prefix[1]
+    X86_PREFIX_FS = &H64       ' segment override FS (cs_x86.prefix[1]
+    X86_PREFIX_GS = &H65       ' segment override GS (cs_x86.prefix[1]
+    X86_PREFIX_OPSIZE = &H66   ' operand-size override (cs_x86.prefix[2]
+    X86_PREFIX_ADDRSIZE = &H67 ' address-size override (cs_x86.prefix[3]
+End Enum
+
+'Instruction's operand referring to memory
+'This is associated with X86_OP_MEM operand type above
+Public Type x86_op_mem
+    segment As Long  ' segment register (or X86_REG_INVALID if irrelevant) UNSIGNED
+    base As Long     ' base register (or X86_REG_INVALID if irrelevant) UNSIGNED
+    index As Long    ' index register (or X86_REG_INVALID if irrelevant) UNSIGNED
+    scale As Long    ' scale for index register
+    disp As Currency ' displacement value
+End Type
+
+'Instruction operand 48 bytes
+'typedef struct cs_x86_op {
+'        x86_op_type type;   // operand type
+'        union {
+'            x86_reg reg;    // register value for REG operand
+'            int64_t imm;        // immediate value for IMM operand
+'            double fp;      // floating point value for FP operand
+'            x86_op_mem mem;     // base/index/scale/disp value for MEM operand
+'        };
+'
+'        // size of this operand (in bytes).
+'        uint8_t size;
+'
+'        // AVX broadcast type, or 0 if irrelevant
+'        x86_avx_bcast avx_bcast;
+'
+'        // AVX zero opmask {z}
+'        bool avx_zero_opmask;
+'} cs_x86_op;
+
+'Instruction structure
+Public Type cs_x86
+    ' Instruction prefix, which can be up to 4 bytes.
+    ' A prefix byte gets value 0 when irrelevant.
+    ' prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above)
+    ' prefix[1] indicates segment override (irrelevant for x86_64):
+    ' See X86_PREFIX_CS/SS/DS/ES/FS/GS above.
+    ' prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE)
+    ' prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE)
+    prefix(0 To 3) As Byte        ' UNSIGNED
+    
+    ' Instruction opcode, wich can be from 1 to 4 bytes in size.
+    ' This contains VEX opcode as well.
+    ' An trailing opcode byte gets value 0 when irrelevant.
+    opcode(0 To 3) As Byte        ' UNSIGNED
+
+    rex As Byte                   ' REX prefix: only a non-zero value is relavant for x86_64  UNSIGNED
+    addr_size As Byte             ' Address size, which can be overrided with above prefix[5].  UNSIGNED
+    modrm As Byte                 ' ModR/M byte  UNSIGNED
+    sib As Byte                   ' SIB value, or 0 when irrelevant.  UNSIGNED
+    disp As Long                  ' Displacement value, or 0 when irrelevant.
+    sib_index As x86_reg          ' SIB index register, or X86_REG_INVALID when irrelevant.
+    sib_scale As Byte             ' SIB scale. only applicable if sib_index is relavant.
+    sib_base As x86_reg           ' SIB base register, or X86_REG_INVALID when irrelevant.
+    sse_cc As x86_sse_cc          ' SSE Code Condition
+    avx_cc As x86_avx_cc          ' AVX Code Condition
+    avx_sae As Byte               ' AVX Suppress all Exception
+    avx_rm As x86_avx_rm          ' AVX static rounding mode
+    op_count As Byte              ' Number of operands of this instruction, or 0 when instruction has no operand.UNSIGNED
+    
+    'operands(0 To 7) As cs_x86_op ' operands for this instruction.
+    'opBuf(0 To 383) As Byte
+    
+End Type
+
+'X86 instructions
+Public Enum x86_insn
+    X86_INS_INVALID = 0
+    X86_INS_AAA
+    X86_INS_AAD
+    X86_INS_AAM
+    X86_INS_AAS
+    X86_INS_FABS
+    X86_INS_ADC
+    X86_INS_ADCX
+    X86_INS_ADD
+    X86_INS_ADDPD
+    X86_INS_ADDPS
+    X86_INS_ADDSD
+    X86_INS_ADDSS
+    X86_INS_ADDSUBPD
+    X86_INS_ADDSUBPS
+    X86_INS_FADD
+    X86_INS_FIADD
+    X86_INS_FADDP
+    X86_INS_ADOX
+    X86_INS_AESDECLAST
+    X86_INS_AESDEC
+    X86_INS_AESENCLAST
+    X86_INS_AESENC
+    X86_INS_AESIMC
+    X86_INS_AESKEYGENASSIST
+    X86_INS_AND
+    X86_INS_ANDN
+    X86_INS_ANDNPD
+    X86_INS_ANDNPS
+    X86_INS_ANDPD
+    X86_INS_ANDPS
+    X86_INS_ARPL
+    X86_INS_BEXTR
+    X86_INS_BLCFILL
+    X86_INS_BLCI
+    X86_INS_BLCIC
+    X86_INS_BLCMSK
+    X86_INS_BLCS
+    X86_INS_BLENDPD
+    X86_INS_BLENDPS
+    X86_INS_BLENDVPD
+    X86_INS_BLENDVPS
+    X86_INS_BLSFILL
+    X86_INS_BLSI
+    X86_INS_BLSIC
+    X86_INS_BLSMSK
+    X86_INS_BLSR
+    X86_INS_BOUND
+    X86_INS_BSF
+    X86_INS_BSR
+    X86_INS_BSWAP
+    X86_INS_BT
+    X86_INS_BTC
+    X86_INS_BTR
+    X86_INS_BTS
+    X86_INS_BZHI
+    X86_INS_CALL
+    X86_INS_CBW
+    X86_INS_CDQ
+    X86_INS_CDQE
+    X86_INS_FCHS
+    X86_INS_CLAC
+    X86_INS_CLC
+    X86_INS_CLD
+    X86_INS_CLFLUSH
+    X86_INS_CLGI
+    X86_INS_CLI
+    X86_INS_CLTS
+    X86_INS_CMC
+    X86_INS_CMOVA
+    X86_INS_CMOVAE
+    X86_INS_CMOVB
+    X86_INS_CMOVBE
+    X86_INS_FCMOVBE
+    X86_INS_FCMOVB
+    X86_INS_CMOVE
+    X86_INS_FCMOVE
+    X86_INS_CMOVG
+    X86_INS_CMOVGE
+    X86_INS_CMOVL
+    X86_INS_CMOVLE
+    X86_INS_FCMOVNBE
+    X86_INS_FCMOVNB
+    X86_INS_CMOVNE
+    X86_INS_FCMOVNE
+    X86_INS_CMOVNO
+    X86_INS_CMOVNP
+    X86_INS_FCMOVNU
+    X86_INS_CMOVNS
+    X86_INS_CMOVO
+    X86_INS_CMOVP
+    X86_INS_FCMOVU
+    X86_INS_CMOVS
+    X86_INS_CMP
+    X86_INS_CMPPD
+    X86_INS_CMPPS
+    X86_INS_CMPSB
+    X86_INS_CMPSD
+    X86_INS_CMPSQ
+    X86_INS_CMPSS
+    X86_INS_CMPSW
+    X86_INS_CMPXCHG16B
+    X86_INS_CMPXCHG
+    X86_INS_CMPXCHG8B
+    X86_INS_COMISD
+    X86_INS_COMISS
+    X86_INS_FCOMP
+    X86_INS_FCOMPI
+    X86_INS_FCOMI
+    X86_INS_FCOM
+    X86_INS_FCOS
+    X86_INS_CPUID
+    X86_INS_CQO
+    X86_INS_CRC32
+    X86_INS_CVTDQ2PD
+    X86_INS_CVTDQ2PS
+    X86_INS_CVTPD2DQ
+    X86_INS_CVTPD2PS
+    X86_INS_CVTPS2DQ
+    X86_INS_CVTPS2PD
+    X86_INS_CVTSD2SI
+    X86_INS_CVTSD2SS
+    X86_INS_CVTSI2SD
+    X86_INS_CVTSI2SS
+    X86_INS_CVTSS2SD
+    X86_INS_CVTSS2SI
+    X86_INS_CVTTPD2DQ
+    X86_INS_CVTTPS2DQ
+    X86_INS_CVTTSD2SI
+    X86_INS_CVTTSS2SI
+    X86_INS_CWD
+    X86_INS_CWDE
+    X86_INS_DAA
+    X86_INS_DAS
+    X86_INS_DATA16
+    X86_INS_DEC
+    X86_INS_DIV
+    X86_INS_DIVPD
+    X86_INS_DIVPS
+    X86_INS_FDIVR
+    X86_INS_FIDIVR
+    X86_INS_FDIVRP
+    X86_INS_DIVSD
+    X86_INS_DIVSS
+    X86_INS_FDIV
+    X86_INS_FIDIV
+    X86_INS_FDIVP
+    X86_INS_DPPD
+    X86_INS_DPPS
+    X86_INS_RET
+    X86_INS_ENCLS
+    X86_INS_ENCLU
+    X86_INS_ENTER
+    X86_INS_EXTRACTPS
+    X86_INS_EXTRQ
+    X86_INS_F2XM1
+    X86_INS_LCALL
+    X86_INS_LJMP
+    X86_INS_FBLD
+    X86_INS_FBSTP
+    X86_INS_FCOMPP
+    X86_INS_FDECSTP
+    X86_INS_FEMMS
+    X86_INS_FFREE
+    X86_INS_FICOM
+    X86_INS_FICOMP
+    X86_INS_FINCSTP
+    X86_INS_FLDCW
+    X86_INS_FLDENV
+    X86_INS_FLDL2E
+    X86_INS_FLDL2T
+    X86_INS_FLDLG2
+    X86_INS_FLDLN2
+    X86_INS_FLDPI
+    X86_INS_FNCLEX
+    X86_INS_FNINIT
+    X86_INS_FNOP
+    X86_INS_FNSTCW
+    X86_INS_FNSTSW
+    X86_INS_FPATAN
+    X86_INS_FPREM
+    X86_INS_FPREM1
+    X86_INS_FPTAN
+    X86_INS_FRNDINT
+    X86_INS_FRSTOR
+    X86_INS_FNSAVE
+    X86_INS_FSCALE
+    X86_INS_FSETPM
+    X86_INS_FSINCOS
+    X86_INS_FNSTENV
+    X86_INS_FXAM
+    X86_INS_FXRSTOR
+    X86_INS_FXRSTOR64
+    X86_INS_FXSAVE
+    X86_INS_FXSAVE64
+    X86_INS_FXTRACT
+    X86_INS_FYL2X
+    X86_INS_FYL2XP1
+    X86_INS_MOVAPD
+    X86_INS_MOVAPS
+    X86_INS_ORPD
+    X86_INS_ORPS
+    X86_INS_VMOVAPD
+    X86_INS_VMOVAPS
+    X86_INS_XORPD
+    X86_INS_XORPS
+    X86_INS_GETSEC
+    X86_INS_HADDPD
+    X86_INS_HADDPS
+    X86_INS_HLT
+    X86_INS_HSUBPD
+    X86_INS_HSUBPS
+    X86_INS_IDIV
+    X86_INS_FILD
+    X86_INS_IMUL
+    X86_INS_IN
+    X86_INS_INC
+    X86_INS_INSB
+    X86_INS_INSERTPS
+    X86_INS_INSERTQ
+    X86_INS_INSD
+    X86_INS_INSW
+    X86_INS_INT
+    X86_INS_INT1
+    X86_INS_INT3
+    X86_INS_INTO
+    X86_INS_INVD
+    X86_INS_INVEPT
+    X86_INS_INVLPG
+    X86_INS_INVLPGA
+    X86_INS_INVPCID
+    X86_INS_INVVPID
+    X86_INS_IRET
+    X86_INS_IRETD
+    X86_INS_IRETQ
+    X86_INS_FISTTP
+    X86_INS_FIST
+    X86_INS_FISTP
+    X86_INS_UCOMISD
+    X86_INS_UCOMISS
+    X86_INS_VCMP
+    X86_INS_VCOMISD
+    X86_INS_VCOMISS
+    X86_INS_VCVTSD2SS
+    X86_INS_VCVTSI2SD
+    X86_INS_VCVTSI2SS
+    X86_INS_VCVTSS2SD
+    X86_INS_VCVTTSD2SI
+    X86_INS_VCVTTSD2USI
+    X86_INS_VCVTTSS2SI
+    X86_INS_VCVTTSS2USI
+    X86_INS_VCVTUSI2SD
+    X86_INS_VCVTUSI2SS
+    X86_INS_VUCOMISD
+    X86_INS_VUCOMISS
+    X86_INS_JAE
+    X86_INS_JA
+    X86_INS_JBE
+    X86_INS_JB
+    X86_INS_JCXZ
+    X86_INS_JECXZ
+    X86_INS_JE
+    X86_INS_JGE
+    X86_INS_JG
+    X86_INS_JLE
+    X86_INS_JL
+    X86_INS_JMP
+    X86_INS_JNE
+    X86_INS_JNO
+    X86_INS_JNP
+    X86_INS_JNS
+    X86_INS_JO
+    X86_INS_JP
+    X86_INS_JRCXZ
+    X86_INS_JS
+    X86_INS_KANDB
+    X86_INS_KANDD
+    X86_INS_KANDNB
+    X86_INS_KANDND
+    X86_INS_KANDNQ
+    X86_INS_KANDNW
+    X86_INS_KANDQ
+    X86_INS_KANDW
+    X86_INS_KMOVB
+    X86_INS_KMOVD
+    X86_INS_KMOVQ
+    X86_INS_KMOVW
+    X86_INS_KNOTB
+    X86_INS_KNOTD
+    X86_INS_KNOTQ
+    X86_INS_KNOTW
+    X86_INS_KORB
+    X86_INS_KORD
+    X86_INS_KORQ
+    X86_INS_KORTESTW
+    X86_INS_KORW
+    X86_INS_KSHIFTLW
+    X86_INS_KSHIFTRW
+    X86_INS_KUNPCKBW
+    X86_INS_KXNORB
+    X86_INS_KXNORD
+    X86_INS_KXNORQ
+    X86_INS_KXNORW
+    X86_INS_KXORB
+    X86_INS_KXORD
+    X86_INS_KXORQ
+    X86_INS_KXORW
+    X86_INS_LAHF
+    X86_INS_LAR
+    X86_INS_LDDQU
+    X86_INS_LDMXCSR
+    X86_INS_LDS
+    X86_INS_FLDZ
+    X86_INS_FLD1
+    X86_INS_FLD
+    X86_INS_LEA
+    X86_INS_LEAVE
+    X86_INS_LES
+    X86_INS_LFENCE
+    X86_INS_LFS
+    X86_INS_LGDT
+    X86_INS_LGS
+    X86_INS_LIDT
+    X86_INS_LLDT
+    X86_INS_LMSW
+    X86_INS_OR
+    X86_INS_SUB
+    X86_INS_XOR
+    X86_INS_LODSB
+    X86_INS_LODSD
+    X86_INS_LODSQ
+    X86_INS_LODSW
+    X86_INS_LOOP
+    X86_INS_LOOPE
+    X86_INS_LOOPNE
+    X86_INS_RETF
+    X86_INS_RETFQ
+    X86_INS_LSL
+    X86_INS_LSS
+    X86_INS_LTR
+    X86_INS_XADD
+    X86_INS_LZCNT
+    X86_INS_MASKMOVDQU
+    X86_INS_MAXPD
+    X86_INS_MAXPS
+    X86_INS_MAXSD
+    X86_INS_MAXSS
+    X86_INS_MFENCE
+    X86_INS_MINPD
+    X86_INS_MINPS
+    X86_INS_MINSD
+    X86_INS_MINSS
+    X86_INS_CVTPD2PI
+    X86_INS_CVTPI2PD
+    X86_INS_CVTPI2PS
+    X86_INS_CVTPS2PI
+    X86_INS_CVTTPD2PI
+    X86_INS_CVTTPS2PI
+    X86_INS_EMMS
+    X86_INS_MASKMOVQ
+    X86_INS_MOVD
+    X86_INS_MOVDQ2Q
+    X86_INS_MOVNTQ
+    X86_INS_MOVQ2DQ
+    X86_INS_MOVQ
+    X86_INS_PABSB
+    X86_INS_PABSD
+    X86_INS_PABSW
+    X86_INS_PACKSSDW
+    X86_INS_PACKSSWB
+    X86_INS_PACKUSWB
+    X86_INS_PADDB
+    X86_INS_PADDD
+    X86_INS_PADDQ
+    X86_INS_PADDSB
+    X86_INS_PADDSW
+    X86_INS_PADDUSB
+    X86_INS_PADDUSW
+    X86_INS_PADDW
+    X86_INS_PALIGNR
+    X86_INS_PANDN
+    X86_INS_PAND
+    X86_INS_PAVGB
+    X86_INS_PAVGW
+    X86_INS_PCMPEQB
+    X86_INS_PCMPEQD
+    X86_INS_PCMPEQW
+    X86_INS_PCMPGTB
+    X86_INS_PCMPGTD
+    X86_INS_PCMPGTW
+    X86_INS_PEXTRW
+    X86_INS_PHADDSW
+    X86_INS_PHADDW
+    X86_INS_PHADDD
+    X86_INS_PHSUBD
+    X86_INS_PHSUBSW
+    X86_INS_PHSUBW
+    X86_INS_PINSRW
+    X86_INS_PMADDUBSW
+    X86_INS_PMADDWD
+    X86_INS_PMAXSW
+    X86_INS_PMAXUB
+    X86_INS_PMINSW
+    X86_INS_PMINUB
+    X86_INS_PMOVMSKB
+    X86_INS_PMULHRSW
+    X86_INS_PMULHUW
+    X86_INS_PMULHW
+    X86_INS_PMULLW
+    X86_INS_PMULUDQ
+    X86_INS_POR
+    X86_INS_PSADBW
+    X86_INS_PSHUFB
+    X86_INS_PSHUFW
+    X86_INS_PSIGNB
+    X86_INS_PSIGND
+    X86_INS_PSIGNW
+    X86_INS_PSLLD
+    X86_INS_PSLLQ
+    X86_INS_PSLLW
+    X86_INS_PSRAD
+    X86_INS_PSRAW
+    X86_INS_PSRLD
+    X86_INS_PSRLQ
+    X86_INS_PSRLW
+    X86_INS_PSUBB
+    X86_INS_PSUBD
+    X86_INS_PSUBQ
+    X86_INS_PSUBSB
+    X86_INS_PSUBSW
+    X86_INS_PSUBUSB
+    X86_INS_PSUBUSW
+    X86_INS_PSUBW
+    X86_INS_PUNPCKHBW
+    X86_INS_PUNPCKHDQ
+    X86_INS_PUNPCKHWD
+    X86_INS_PUNPCKLBW
+    X86_INS_PUNPCKLDQ
+    X86_INS_PUNPCKLWD
+    X86_INS_PXOR
+    X86_INS_MONITOR
+    X86_INS_MONTMUL
+    X86_INS_MOV
+    X86_INS_MOVABS
+    X86_INS_MOVBE
+    X86_INS_MOVDDUP
+    X86_INS_MOVDQA
+    X86_INS_MOVDQU
+    X86_INS_MOVHLPS
+    X86_INS_MOVHPD
+    X86_INS_MOVHPS
+    X86_INS_MOVLHPS
+    X86_INS_MOVLPD
+    X86_INS_MOVLPS
+    X86_INS_MOVMSKPD
+    X86_INS_MOVMSKPS
+    X86_INS_MOVNTDQA
+    X86_INS_MOVNTDQ
+    X86_INS_MOVNTI
+    X86_INS_MOVNTPD
+    X86_INS_MOVNTPS
+    X86_INS_MOVNTSD
+    X86_INS_MOVNTSS
+    X86_INS_MOVSB
+    X86_INS_MOVSD
+    X86_INS_MOVSHDUP
+    X86_INS_MOVSLDUP
+    X86_INS_MOVSQ
+    X86_INS_MOVSS
+    X86_INS_MOVSW
+    X86_INS_MOVSX
+    X86_INS_MOVSXD
+    X86_INS_MOVUPD
+    X86_INS_MOVUPS
+    X86_INS_MOVZX
+    X86_INS_MPSADBW
+    X86_INS_MUL
+    X86_INS_MULPD
+    X86_INS_MULPS
+    X86_INS_MULSD
+    X86_INS_MULSS
+    X86_INS_MULX
+    X86_INS_FMUL
+    X86_INS_FIMUL
+    X86_INS_FMULP
+    X86_INS_MWAIT
+    X86_INS_NEG
+    X86_INS_NOP
+    X86_INS_NOT
+    X86_INS_OUT
+    X86_INS_OUTSB
+    X86_INS_OUTSD
+    X86_INS_OUTSW
+    X86_INS_PACKUSDW
+    X86_INS_PAUSE
+    X86_INS_PAVGUSB
+    X86_INS_PBLENDVB
+    X86_INS_PBLENDW
+    X86_INS_PCLMULQDQ
+    X86_INS_PCMPEQQ
+    X86_INS_PCMPESTRI
+    X86_INS_PCMPESTRM
+    X86_INS_PCMPGTQ
+    X86_INS_PCMPISTRI
+    X86_INS_PCMPISTRM
+    X86_INS_PDEP
+    X86_INS_PEXT
+    X86_INS_PEXTRB
+    X86_INS_PEXTRD
+    X86_INS_PEXTRQ
+    X86_INS_PF2ID
+    X86_INS_PF2IW
+    X86_INS_PFACC
+    X86_INS_PFADD
+    X86_INS_PFCMPEQ
+    X86_INS_PFCMPGE
+    X86_INS_PFCMPGT
+    X86_INS_PFMAX
+    X86_INS_PFMIN
+    X86_INS_PFMUL
+    X86_INS_PFNACC
+    X86_INS_PFPNACC
+    X86_INS_PFRCPIT1
+    X86_INS_PFRCPIT2
+    X86_INS_PFRCP
+    X86_INS_PFRSQIT1
+    X86_INS_PFRSQRT
+    X86_INS_PFSUBR
+    X86_INS_PFSUB
+    X86_INS_PHMINPOSUW
+    X86_INS_PI2FD
+    X86_INS_PI2FW
+    X86_INS_PINSRB
+    X86_INS_PINSRD
+    X86_INS_PINSRQ
+    X86_INS_PMAXSB
+    X86_INS_PMAXSD
+    X86_INS_PMAXUD
+    X86_INS_PMAXUW
+    X86_INS_PMINSB
+    X86_INS_PMINSD
+    X86_INS_PMINUD
+    X86_INS_PMINUW
+    X86_INS_PMOVSXBD
+    X86_INS_PMOVSXBQ
+    X86_INS_PMOVSXBW
+    X86_INS_PMOVSXDQ
+    X86_INS_PMOVSXWD
+    X86_INS_PMOVSXWQ
+    X86_INS_PMOVZXBD
+    X86_INS_PMOVZXBQ
+    X86_INS_PMOVZXBW
+    X86_INS_PMOVZXDQ
+    X86_INS_PMOVZXWD
+    X86_INS_PMOVZXWQ
+    X86_INS_PMULDQ
+    X86_INS_PMULHRW
+    X86_INS_PMULLD
+    X86_INS_POP
+    X86_INS_POPAW
+    X86_INS_POPAL
+    X86_INS_POPCNT
+    X86_INS_POPF
+    X86_INS_POPFD
+    X86_INS_POPFQ
+    X86_INS_PREFETCH
+    X86_INS_PREFETCHNTA
+    X86_INS_PREFETCHT0
+    X86_INS_PREFETCHT1
+    X86_INS_PREFETCHT2
+    X86_INS_PREFETCHW
+    X86_INS_PSHUFD
+    X86_INS_PSHUFHW
+    X86_INS_PSHUFLW
+    X86_INS_PSLLDQ
+    X86_INS_PSRLDQ
+    X86_INS_PSWAPD
+    X86_INS_PTEST
+    X86_INS_PUNPCKHQDQ
+    X86_INS_PUNPCKLQDQ
+    X86_INS_PUSH
+    X86_INS_PUSHAW
+    X86_INS_PUSHAL
+    X86_INS_PUSHF
+    X86_INS_PUSHFD
+    X86_INS_PUSHFQ
+    X86_INS_RCL
+    X86_INS_RCPPS
+    X86_INS_RCPSS
+    X86_INS_RCR
+    X86_INS_RDFSBASE
+    X86_INS_RDGSBASE
+    X86_INS_RDMSR
+    X86_INS_RDPMC
+    X86_INS_RDRAND
+    X86_INS_RDSEED
+    X86_INS_RDTSC
+    X86_INS_RDTSCP
+    X86_INS_ROL
+    X86_INS_ROR
+    X86_INS_RORX
+    X86_INS_ROUNDPD
+    X86_INS_ROUNDPS
+    X86_INS_ROUNDSD
+    X86_INS_ROUNDSS
+    X86_INS_RSM
+    X86_INS_RSQRTPS
+    X86_INS_RSQRTSS
+    X86_INS_SAHF
+    X86_INS_SAL
+    X86_INS_SALC
+    X86_INS_SAR
+    X86_INS_SARX
+    X86_INS_SBB
+    X86_INS_SCASB
+    X86_INS_SCASD
+    X86_INS_SCASQ
+    X86_INS_SCASW
+    X86_INS_SETAE
+    X86_INS_SETA
+    X86_INS_SETBE
+    X86_INS_SETB
+    X86_INS_SETE
+    X86_INS_SETGE
+    X86_INS_SETG
+    X86_INS_SETLE
+    X86_INS_SETL
+    X86_INS_SETNE
+    X86_INS_SETNO
+    X86_INS_SETNP
+    X86_INS_SETNS
+    X86_INS_SETO
+    X86_INS_SETP
+    X86_INS_SETS
+    X86_INS_SFENCE
+    X86_INS_SGDT
+    X86_INS_SHA1MSG1
+    X86_INS_SHA1MSG2
+    X86_INS_SHA1NEXTE
+    X86_INS_SHA1RNDS4
+    X86_INS_SHA256MSG1
+    X86_INS_SHA256MSG2
+    X86_INS_SHA256RNDS2
+    X86_INS_SHL
+    X86_INS_SHLD
+    X86_INS_SHLX
+    X86_INS_SHR
+    X86_INS_SHRD
+    X86_INS_SHRX
+    X86_INS_SHUFPD
+    X86_INS_SHUFPS
+    X86_INS_SIDT
+    X86_INS_FSIN
+    X86_INS_SKINIT
+    X86_INS_SLDT
+    X86_INS_SMSW
+    X86_INS_SQRTPD
+    X86_INS_SQRTPS
+    X86_INS_SQRTSD
+    X86_INS_SQRTSS
+    X86_INS_FSQRT
+    X86_INS_STAC
+    X86_INS_STC
+    X86_INS_STD
+    X86_INS_STGI
+    X86_INS_STI
+    X86_INS_STMXCSR
+    X86_INS_STOSB
+    X86_INS_STOSD
+    X86_INS_STOSQ
+    X86_INS_STOSW
+    X86_INS_STR
+    X86_INS_FST
+    X86_INS_FSTP
+    X86_INS_FSTPNCE
+    X86_INS_SUBPD
+    X86_INS_SUBPS
+    X86_INS_FSUBR
+    X86_INS_FISUBR
+    X86_INS_FSUBRP
+    X86_INS_SUBSD
+    X86_INS_SUBSS
+    X86_INS_FSUB
+    X86_INS_FISUB
+    X86_INS_FSUBP
+    X86_INS_SWAPGS
+    X86_INS_SYSCALL
+    X86_INS_SYSENTER
+    X86_INS_SYSEXIT
+    X86_INS_SYSRET
+    X86_INS_T1MSKC
+    X86_INS_TEST
+    X86_INS_UD2
+    X86_INS_FTST
+    X86_INS_TZCNT
+    X86_INS_TZMSK
+    X86_INS_FUCOMPI
+    X86_INS_FUCOMI
+    X86_INS_FUCOMPP
+    X86_INS_FUCOMP
+    X86_INS_FUCOM
+    X86_INS_UD2B
+    X86_INS_UNPCKHPD
+    X86_INS_UNPCKHPS
+    X86_INS_UNPCKLPD
+    X86_INS_UNPCKLPS
+    X86_INS_VADDPD
+    X86_INS_VADDPS
+    X86_INS_VADDSD
+    X86_INS_VADDSS
+    X86_INS_VADDSUBPD
+    X86_INS_VADDSUBPS
+    X86_INS_VAESDECLAST
+    X86_INS_VAESDEC
+    X86_INS_VAESENCLAST
+    X86_INS_VAESENC
+    X86_INS_VAESIMC
+    X86_INS_VAESKEYGENASSIST
+    X86_INS_VALIGND
+    X86_INS_VALIGNQ
+    X86_INS_VANDNPD
+    X86_INS_VANDNPS
+    X86_INS_VANDPD
+    X86_INS_VANDPS
+    X86_INS_VBLENDMPD
+    X86_INS_VBLENDMPS
+    X86_INS_VBLENDPD
+    X86_INS_VBLENDPS
+    X86_INS_VBLENDVPD
+    X86_INS_VBLENDVPS
+    X86_INS_VBROADCASTF128
+    X86_INS_VBROADCASTI128
+    X86_INS_VBROADCASTI32X4
+    X86_INS_VBROADCASTI64X4
+    X86_INS_VBROADCASTSD
+    X86_INS_VBROADCASTSS
+    X86_INS_VCMPPD
+    X86_INS_VCMPPS
+    X86_INS_VCMPSD
+    X86_INS_VCMPSS
+    X86_INS_VCVTDQ2PD
+    X86_INS_VCVTDQ2PS
+    X86_INS_VCVTPD2DQX
+    X86_INS_VCVTPD2DQ
+    X86_INS_VCVTPD2PSX
+    X86_INS_VCVTPD2PS
+    X86_INS_VCVTPD2UDQ
+    X86_INS_VCVTPH2PS
+    X86_INS_VCVTPS2DQ
+    X86_INS_VCVTPS2PD
+    X86_INS_VCVTPS2PH
+    X86_INS_VCVTPS2UDQ
+    X86_INS_VCVTSD2SI
+    X86_INS_VCVTSD2USI
+    X86_INS_VCVTSS2SI
+    X86_INS_VCVTSS2USI
+    X86_INS_VCVTTPD2DQX
+    X86_INS_VCVTTPD2DQ
+    X86_INS_VCVTTPD2UDQ
+    X86_INS_VCVTTPS2DQ
+    X86_INS_VCVTTPS2UDQ
+    X86_INS_VCVTUDQ2PD
+    X86_INS_VCVTUDQ2PS
+    X86_INS_VDIVPD
+    X86_INS_VDIVPS
+    X86_INS_VDIVSD
+    X86_INS_VDIVSS
+    X86_INS_VDPPD
+    X86_INS_VDPPS
+    X86_INS_VERR
+    X86_INS_VERW
+    X86_INS_VEXTRACTF128
+    X86_INS_VEXTRACTF32X4
+    X86_INS_VEXTRACTF64X4
+    X86_INS_VEXTRACTI128
+    X86_INS_VEXTRACTI32X4
+    X86_INS_VEXTRACTI64X4
+    X86_INS_VEXTRACTPS
+    X86_INS_VFMADD132PD
+    X86_INS_VFMADD132PS
+    X86_INS_VFMADD213PD
+    X86_INS_VFMADD213PS
+    X86_INS_VFMADDPD
+    X86_INS_VFMADD231PD
+    X86_INS_VFMADDPS
+    X86_INS_VFMADD231PS
+    X86_INS_VFMADDSD
+    X86_INS_VFMADD213SD
+    X86_INS_VFMADD132SD
+    X86_INS_VFMADD231SD
+    X86_INS_VFMADDSS
+    X86_INS_VFMADD213SS
+    X86_INS_VFMADD132SS
+    X86_INS_VFMADD231SS
+    X86_INS_VFMADDSUB132PD
+    X86_INS_VFMADDSUB132PS
+    X86_INS_VFMADDSUB213PD
+    X86_INS_VFMADDSUB213PS
+    X86_INS_VFMADDSUBPD
+    X86_INS_VFMADDSUB231PD
+    X86_INS_VFMADDSUBPS
+    X86_INS_VFMADDSUB231PS
+    X86_INS_VFMSUB132PD
+    X86_INS_VFMSUB132PS
+    X86_INS_VFMSUB213PD
+    X86_INS_VFMSUB213PS
+    X86_INS_VFMSUBADD132PD
+    X86_INS_VFMSUBADD132PS
+    X86_INS_VFMSUBADD213PD
+    X86_INS_VFMSUBADD213PS
+    X86_INS_VFMSUBADDPD
+    X86_INS_VFMSUBADD231PD
+    X86_INS_VFMSUBADDPS
+    X86_INS_VFMSUBADD231PS
+    X86_INS_VFMSUBPD
+    X86_INS_VFMSUB231PD
+    X86_INS_VFMSUBPS
+    X86_INS_VFMSUB231PS
+    X86_INS_VFMSUBSD
+    X86_INS_VFMSUB213SD
+    X86_INS_VFMSUB132SD
+    X86_INS_VFMSUB231SD
+    X86_INS_VFMSUBSS
+    X86_INS_VFMSUB213SS
+    X86_INS_VFMSUB132SS
+    X86_INS_VFMSUB231SS
+    X86_INS_VFNMADD132PD
+    X86_INS_VFNMADD132PS
+    X86_INS_VFNMADD213PD
+    X86_INS_VFNMADD213PS
+    X86_INS_VFNMADDPD
+    X86_INS_VFNMADD231PD
+    X86_INS_VFNMADDPS
+    X86_INS_VFNMADD231PS
+    X86_INS_VFNMADDSD
+    X86_INS_VFNMADD213SD
+    X86_INS_VFNMADD132SD
+    X86_INS_VFNMADD231SD
+    X86_INS_VFNMADDSS
+    X86_INS_VFNMADD213SS
+    X86_INS_VFNMADD132SS
+    X86_INS_VFNMADD231SS
+    X86_INS_VFNMSUB132PD
+    X86_INS_VFNMSUB132PS
+    X86_INS_VFNMSUB213PD
+    X86_INS_VFNMSUB213PS
+    X86_INS_VFNMSUBPD
+    X86_INS_VFNMSUB231PD
+    X86_INS_VFNMSUBPS
+    X86_INS_VFNMSUB231PS
+    X86_INS_VFNMSUBSD
+    X86_INS_VFNMSUB213SD
+    X86_INS_VFNMSUB132SD
+    X86_INS_VFNMSUB231SD
+    X86_INS_VFNMSUBSS
+    X86_INS_VFNMSUB213SS
+    X86_INS_VFNMSUB132SS
+    X86_INS_VFNMSUB231SS
+    X86_INS_VFRCZPD
+    X86_INS_VFRCZPS
+    X86_INS_VFRCZSD
+    X86_INS_VFRCZSS
+    X86_INS_VORPD
+    X86_INS_VORPS
+    X86_INS_VXORPD
+    X86_INS_VXORPS
+    X86_INS_VGATHERDPD
+    X86_INS_VGATHERDPS
+    X86_INS_VGATHERPF0DPD
+    X86_INS_VGATHERPF0DPS
+    X86_INS_VGATHERPF0QPD
+    X86_INS_VGATHERPF0QPS
+    X86_INS_VGATHERPF1DPD
+    X86_INS_VGATHERPF1DPS
+    X86_INS_VGATHERPF1QPD
+    X86_INS_VGATHERPF1QPS
+    X86_INS_VGATHERQPD
+    X86_INS_VGATHERQPS
+    X86_INS_VHADDPD
+    X86_INS_VHADDPS
+    X86_INS_VHSUBPD
+    X86_INS_VHSUBPS
+    X86_INS_VINSERTF128
+    X86_INS_VINSERTF32X4
+    X86_INS_VINSERTF64X4
+    X86_INS_VINSERTI128
+    X86_INS_VINSERTI32X4
+    X86_INS_VINSERTI64X4
+    X86_INS_VINSERTPS
+    X86_INS_VLDDQU
+    X86_INS_VLDMXCSR
+    X86_INS_VMASKMOVDQU
+    X86_INS_VMASKMOVPD
+    X86_INS_VMASKMOVPS
+    X86_INS_VMAXPD
+    X86_INS_VMAXPS
+    X86_INS_VMAXSD
+    X86_INS_VMAXSS
+    X86_INS_VMCALL
+    X86_INS_VMCLEAR
+    X86_INS_VMFUNC
+    X86_INS_VMINPD
+    X86_INS_VMINPS
+    X86_INS_VMINSD
+    X86_INS_VMINSS
+    X86_INS_VMLAUNCH
+    X86_INS_VMLOAD
+    X86_INS_VMMCALL
+    X86_INS_VMOVQ
+    X86_INS_VMOVDDUP
+    X86_INS_VMOVD
+    X86_INS_VMOVDQA32
+    X86_INS_VMOVDQA64
+    X86_INS_VMOVDQA
+    X86_INS_VMOVDQU16
+    X86_INS_VMOVDQU32
+    X86_INS_VMOVDQU64
+    X86_INS_VMOVDQU8
+    X86_INS_VMOVDQU
+    X86_INS_VMOVHLPS
+    X86_INS_VMOVHPD
+    X86_INS_VMOVHPS
+    X86_INS_VMOVLHPS
+    X86_INS_VMOVLPD
+    X86_INS_VMOVLPS
+    X86_INS_VMOVMSKPD
+    X86_INS_VMOVMSKPS
+    X86_INS_VMOVNTDQA
+    X86_INS_VMOVNTDQ
+    X86_INS_VMOVNTPD
+    X86_INS_VMOVNTPS
+    X86_INS_VMOVSD
+    X86_INS_VMOVSHDUP
+    X86_INS_VMOVSLDUP
+    X86_INS_VMOVSS
+    X86_INS_VMOVUPD
+    X86_INS_VMOVUPS
+    X86_INS_VMPSADBW
+    X86_INS_VMPTRLD
+    X86_INS_VMPTRST
+    X86_INS_VMREAD
+    X86_INS_VMRESUME
+    X86_INS_VMRUN
+    X86_INS_VMSAVE
+    X86_INS_VMULPD
+    X86_INS_VMULPS
+    X86_INS_VMULSD
+    X86_INS_VMULSS
+    X86_INS_VMWRITE
+    X86_INS_VMXOFF
+    X86_INS_VMXON
+    X86_INS_VPABSB
+    X86_INS_VPABSD
+    X86_INS_VPABSQ
+    X86_INS_VPABSW
+    X86_INS_VPACKSSDW
+    X86_INS_VPACKSSWB
+    X86_INS_VPACKUSDW
+    X86_INS_VPACKUSWB
+    X86_INS_VPADDB
+    X86_INS_VPADDD
+    X86_INS_VPADDQ
+    X86_INS_VPADDSB
+    X86_INS_VPADDSW
+    X86_INS_VPADDUSB
+    X86_INS_VPADDUSW
+    X86_INS_VPADDW
+    X86_INS_VPALIGNR
+    X86_INS_VPANDD
+    X86_INS_VPANDND
+    X86_INS_VPANDNQ
+    X86_INS_VPANDN
+    X86_INS_VPANDQ
+    X86_INS_VPAND
+    X86_INS_VPAVGB
+    X86_INS_VPAVGW
+    X86_INS_VPBLENDD
+    X86_INS_VPBLENDMD
+    X86_INS_VPBLENDMQ
+    X86_INS_VPBLENDVB
+    X86_INS_VPBLENDW
+    X86_INS_VPBROADCASTB
+    X86_INS_VPBROADCASTD
+    X86_INS_VPBROADCASTMB2Q
+    X86_INS_VPBROADCASTMW2D
+    X86_INS_VPBROADCASTQ
+    X86_INS_VPBROADCASTW
+    X86_INS_VPCLMULQDQ
+    X86_INS_VPCMOV
+    X86_INS_VPCMP
+    X86_INS_VPCMPD
+    X86_INS_VPCMPEQB
+    X86_INS_VPCMPEQD
+    X86_INS_VPCMPEQQ
+    X86_INS_VPCMPEQW
+    X86_INS_VPCMPESTRI
+    X86_INS_VPCMPESTRM
+    X86_INS_VPCMPGTB
+    X86_INS_VPCMPGTD
+    X86_INS_VPCMPGTQ
+    X86_INS_VPCMPGTW
+    X86_INS_VPCMPISTRI
+    X86_INS_VPCMPISTRM
+    X86_INS_VPCMPQ
+    X86_INS_VPCMPUD
+    X86_INS_VPCMPUQ
+    X86_INS_VPCOMB
+    X86_INS_VPCOMD
+    X86_INS_VPCOMQ
+    X86_INS_VPCOMUB
+    X86_INS_VPCOMUD
+    X86_INS_VPCOMUQ
+    X86_INS_VPCOMUW
+    X86_INS_VPCOMW
+    X86_INS_VPCONFLICTD
+    X86_INS_VPCONFLICTQ
+    X86_INS_VPERM2F128
+    X86_INS_VPERM2I128
+    X86_INS_VPERMD
+    X86_INS_VPERMI2D
+    X86_INS_VPERMI2PD
+    X86_INS_VPERMI2PS
+    X86_INS_VPERMI2Q
+    X86_INS_VPERMIL2PD
+    X86_INS_VPERMIL2PS
+    X86_INS_VPERMILPD
+    X86_INS_VPERMILPS
+    X86_INS_VPERMPD
+    X86_INS_VPERMPS
+    X86_INS_VPERMQ
+    X86_INS_VPERMT2D
+    X86_INS_VPERMT2PD
+    X86_INS_VPERMT2PS
+    X86_INS_VPERMT2Q
+    X86_INS_VPEXTRB
+    X86_INS_VPEXTRD
+    X86_INS_VPEXTRQ
+    X86_INS_VPEXTRW
+    X86_INS_VPGATHERDD
+    X86_INS_VPGATHERDQ
+    X86_INS_VPGATHERQD
+    X86_INS_VPGATHERQQ
+    X86_INS_VPHADDBD
+    X86_INS_VPHADDBQ
+    X86_INS_VPHADDBW
+    X86_INS_VPHADDDQ
+    X86_INS_VPHADDD
+    X86_INS_VPHADDSW
+    X86_INS_VPHADDUBD
+    X86_INS_VPHADDUBQ
+    X86_INS_VPHADDUBW
+    X86_INS_VPHADDUDQ
+    X86_INS_VPHADDUWD
+    X86_INS_VPHADDUWQ
+    X86_INS_VPHADDWD
+    X86_INS_VPHADDWQ
+    X86_INS_VPHADDW
+    X86_INS_VPHMINPOSUW
+    X86_INS_VPHSUBBW
+    X86_INS_VPHSUBDQ
+    X86_INS_VPHSUBD
+    X86_INS_VPHSUBSW
+    X86_INS_VPHSUBWD
+    X86_INS_VPHSUBW
+    X86_INS_VPINSRB
+    X86_INS_VPINSRD
+    X86_INS_VPINSRQ
+    X86_INS_VPINSRW
+    X86_INS_VPLZCNTD
+    X86_INS_VPLZCNTQ
+    X86_INS_VPMACSDD
+    X86_INS_VPMACSDQH
+    X86_INS_VPMACSDQL
+    X86_INS_VPMACSSDD
+    X86_INS_VPMACSSDQH
+    X86_INS_VPMACSSDQL
+    X86_INS_VPMACSSWD
+    X86_INS_VPMACSSWW
+    X86_INS_VPMACSWD
+    X86_INS_VPMACSWW
+    X86_INS_VPMADCSSWD
+    X86_INS_VPMADCSWD
+    X86_INS_VPMADDUBSW
+    X86_INS_VPMADDWD
+    X86_INS_VPMASKMOVD
+    X86_INS_VPMASKMOVQ
+    X86_INS_VPMAXSB
+    X86_INS_VPMAXSD
+    X86_INS_VPMAXSQ
+    X86_INS_VPMAXSW
+    X86_INS_VPMAXUB
+    X86_INS_VPMAXUD
+    X86_INS_VPMAXUQ
+    X86_INS_VPMAXUW
+    X86_INS_VPMINSB
+    X86_INS_VPMINSD
+    X86_INS_VPMINSQ
+    X86_INS_VPMINSW
+    X86_INS_VPMINUB
+    X86_INS_VPMINUD
+    X86_INS_VPMINUQ
+    X86_INS_VPMINUW
+    X86_INS_VPMOVDB
+    X86_INS_VPMOVDW
+    X86_INS_VPMOVMSKB
+    X86_INS_VPMOVQB
+    X86_INS_VPMOVQD
+    X86_INS_VPMOVQW
+    X86_INS_VPMOVSDB
+    X86_INS_VPMOVSDW
+    X86_INS_VPMOVSQB
+    X86_INS_VPMOVSQD
+    X86_INS_VPMOVSQW
+    X86_INS_VPMOVSXBD
+    X86_INS_VPMOVSXBQ
+    X86_INS_VPMOVSXBW
+    X86_INS_VPMOVSXDQ
+    X86_INS_VPMOVSXWD
+    X86_INS_VPMOVSXWQ
+    X86_INS_VPMOVUSDB
+    X86_INS_VPMOVUSDW
+    X86_INS_VPMOVUSQB
+    X86_INS_VPMOVUSQD
+    X86_INS_VPMOVUSQW
+    X86_INS_VPMOVZXBD
+    X86_INS_VPMOVZXBQ
+    X86_INS_VPMOVZXBW
+    X86_INS_VPMOVZXDQ
+    X86_INS_VPMOVZXWD
+    X86_INS_VPMOVZXWQ
+    X86_INS_VPMULDQ
+    X86_INS_VPMULHRSW
+    X86_INS_VPMULHUW
+    X86_INS_VPMULHW
+    X86_INS_VPMULLD
+    X86_INS_VPMULLW
+    X86_INS_VPMULUDQ
+    X86_INS_VPORD
+    X86_INS_VPORQ
+    X86_INS_VPOR
+    X86_INS_VPPERM
+    X86_INS_VPROTB
+    X86_INS_VPROTD
+    X86_INS_VPROTQ
+    X86_INS_VPROTW
+    X86_INS_VPSADBW
+    X86_INS_VPSCATTERDD
+    X86_INS_VPSCATTERDQ
+    X86_INS_VPSCATTERQD
+    X86_INS_VPSCATTERQQ
+    X86_INS_VPSHAB
+    X86_INS_VPSHAD
+    X86_INS_VPSHAQ
+    X86_INS_VPSHAW
+    X86_INS_VPSHLB
+    X86_INS_VPSHLD
+    X86_INS_VPSHLQ
+    X86_INS_VPSHLW
+    X86_INS_VPSHUFB
+    X86_INS_VPSHUFD
+    X86_INS_VPSHUFHW
+    X86_INS_VPSHUFLW
+    X86_INS_VPSIGNB
+    X86_INS_VPSIGND
+    X86_INS_VPSIGNW
+    X86_INS_VPSLLDQ
+    X86_INS_VPSLLD
+    X86_INS_VPSLLQ
+    X86_INS_VPSLLVD
+    X86_INS_VPSLLVQ
+    X86_INS_VPSLLW
+    X86_INS_VPSRAD
+    X86_INS_VPSRAQ
+    X86_INS_VPSRAVD
+    X86_INS_VPSRAVQ
+    X86_INS_VPSRAW
+    X86_INS_VPSRLDQ
+    X86_INS_VPSRLD
+    X86_INS_VPSRLQ
+    X86_INS_VPSRLVD
+    X86_INS_VPSRLVQ
+    X86_INS_VPSRLW
+    X86_INS_VPSUBB
+    X86_INS_VPSUBD
+    X86_INS_VPSUBQ
+    X86_INS_VPSUBSB
+    X86_INS_VPSUBSW
+    X86_INS_VPSUBUSB
+    X86_INS_VPSUBUSW
+    X86_INS_VPSUBW
+    X86_INS_VPTESTMD
+    X86_INS_VPTESTMQ
+    X86_INS_VPTESTNMD
+    X86_INS_VPTESTNMQ
+    X86_INS_VPTEST
+    X86_INS_VPUNPCKHBW
+    X86_INS_VPUNPCKHDQ
+    X86_INS_VPUNPCKHQDQ
+    X86_INS_VPUNPCKHWD
+    X86_INS_VPUNPCKLBW
+    X86_INS_VPUNPCKLDQ
+    X86_INS_VPUNPCKLQDQ
+    X86_INS_VPUNPCKLWD
+    X86_INS_VPXORD
+    X86_INS_VPXORQ
+    X86_INS_VPXOR
+    X86_INS_VRCP14PD
+    X86_INS_VRCP14PS
+    X86_INS_VRCP14SD
+    X86_INS_VRCP14SS
+    X86_INS_VRCP28PD
+    X86_INS_VRCP28PS
+    X86_INS_VRCP28SD
+    X86_INS_VRCP28SS
+    X86_INS_VRCPPS
+    X86_INS_VRCPSS
+    X86_INS_VRNDSCALEPD
+    X86_INS_VRNDSCALEPS
+    X86_INS_VRNDSCALESD
+    X86_INS_VRNDSCALESS
+    X86_INS_VROUNDPD
+    X86_INS_VROUNDPS
+    X86_INS_VROUNDSD
+    X86_INS_VROUNDSS
+    X86_INS_VRSQRT14PD
+    X86_INS_VRSQRT14PS
+    X86_INS_VRSQRT14SD
+    X86_INS_VRSQRT14SS
+    X86_INS_VRSQRT28PD
+    X86_INS_VRSQRT28PS
+    X86_INS_VRSQRT28SD
+    X86_INS_VRSQRT28SS
+    X86_INS_VRSQRTPS
+    X86_INS_VRSQRTSS
+    X86_INS_VSCATTERDPD
+    X86_INS_VSCATTERDPS
+    X86_INS_VSCATTERPF0DPD
+    X86_INS_VSCATTERPF0DPS
+    X86_INS_VSCATTERPF0QPD
+    X86_INS_VSCATTERPF0QPS
+    X86_INS_VSCATTERPF1DPD
+    X86_INS_VSCATTERPF1DPS
+    X86_INS_VSCATTERPF1QPD
+    X86_INS_VSCATTERPF1QPS
+    X86_INS_VSCATTERQPD
+    X86_INS_VSCATTERQPS
+    X86_INS_VSHUFPD
+    X86_INS_VSHUFPS
+    X86_INS_VSQRTPD
+    X86_INS_VSQRTPS
+    X86_INS_VSQRTSD
+    X86_INS_VSQRTSS
+    X86_INS_VSTMXCSR
+    X86_INS_VSUBPD
+    X86_INS_VSUBPS
+    X86_INS_VSUBSD
+    X86_INS_VSUBSS
+    X86_INS_VTESTPD
+    X86_INS_VTESTPS
+    X86_INS_VUNPCKHPD
+    X86_INS_VUNPCKHPS
+    X86_INS_VUNPCKLPD
+    X86_INS_VUNPCKLPS
+    X86_INS_VZEROALL
+    X86_INS_VZEROUPPER
+    X86_INS_WAIT
+    X86_INS_WBINVD
+    X86_INS_WRFSBASE
+    X86_INS_WRGSBASE
+    X86_INS_WRMSR
+    X86_INS_XABORT
+    X86_INS_XACQUIRE
+    X86_INS_XBEGIN
+    X86_INS_XCHG
+    X86_INS_FXCH
+    X86_INS_XCRYPTCBC
+    X86_INS_XCRYPTCFB
+    X86_INS_XCRYPTCTR
+    X86_INS_XCRYPTECB
+    X86_INS_XCRYPTOFB
+    X86_INS_XEND
+    X86_INS_XGETBV
+    X86_INS_XLATB
+    X86_INS_XRELEASE
+    X86_INS_XRSTOR
+    X86_INS_XRSTOR64
+    X86_INS_XSAVE
+    X86_INS_XSAVE64
+    X86_INS_XSAVEOPT
+    X86_INS_XSAVEOPT64
+    X86_INS_XSETBV
+    X86_INS_XSHA1
+    X86_INS_XSHA256
+    X86_INS_XSTORE
+    X86_INS_XTEST
+    X86_INS_ENDING ' mark the end of the list of insn
+End Enum
+
+'Group of X86 instructions
+Public Enum x86_insn_group
+    X86_GRP_INVALID = 0 ' = CS_GRP_INVALID
+    
+    ' > Generic groups                      '
+    X86_GRP_JUMP      'all jump instructions (conditional+direct+indirect jumps) = CS_GRP_JUMP
+    X86_GRP_CALL      'all call instructions = CS_GRP_CALL
+    X86_GRP_RET       ' all return instructions = CS_GRP_RET
+    X86_GRP_INT       'all interrupt instructions (int+syscall) = CS_GRP_INT
+    X86_GRP_IRET      'all interrupt return instructions = CS_GRP_IRET
+    
+    ' > Architecture-specific groups
+    X86_GRP_VM = 128  ' all virtualization instructions (VT-x + AMD-V)
+    X86_GRP_3DNOW
+    X86_GRP_AES
+    X86_GRP_ADX
+    X86_GRP_AVX
+    X86_GRP_AVX2
+    X86_GRP_AVX512
+    X86_GRP_BMI
+    X86_GRP_BMI2
+    X86_GRP_CMOV
+    X86_GRP_F16C
+    X86_GRP_FMA
+    X86_GRP_FMA4
+    X86_GRP_FSGSBASE
+    X86_GRP_HLE
+    X86_GRP_MMX
+    X86_GRP_MODE32
+    X86_GRP_MODE64
+    X86_GRP_RTM
+    X86_GRP_SHA
+    X86_GRP_SSE1
+    X86_GRP_SSE2
+    X86_GRP_SSE3
+    X86_GRP_SSE41
+    X86_GRP_SSE42
+    X86_GRP_SSE4A
+    X86_GRP_SSSE3
+    X86_GRP_PCLMUL
+    X86_GRP_XOP
+    X86_GRP_CDI
+    X86_GRP_ERI
+    X86_GRP_TBM
+    X86_GRP_16BITMODE
+    X86_GRP_NOT64BITMODE
+    X86_GRP_SGX
+    X86_GRP_DQI
+    X86_GRP_BWI
+    X86_GRP_PFI
+    X86_GRP_VLX
+    X86_GRP_SMAP
+    X86_GRP_NOVLX
+    X86_GRP_ENDING
+End Enum
+
+
+
+Function x86_sse_cc2str(v As x86_sse_cc) As String
+     Dim r As String
+    If v = X86_SSE_CC_INVALID Then r = "X86_SSE_CC_INVALID"
+    If v = X86_SSE_CC_EQ Then r = "X86_SSE_CC_EQ"
+    If v = X86_SSE_CC_LT Then r = "X86_SSE_CC_LT"
+    If v = X86_SSE_CC_LE Then r = "X86_SSE_CC_LE"
+    If v = X86_SSE_CC_UNORD Then r = "X86_SSE_CC_UNORD"
+    If v = X86_SSE_CC_NEQ Then r = "X86_SSE_CC_NEQ"
+    If v = X86_SSE_CC_NLT Then r = "X86_SSE_CC_NLT"
+    If v = X86_SSE_CC_NLE Then r = "X86_SSE_CC_NLE"
+    If v = X86_SSE_CC_ORD Then r = "X86_SSE_CC_ORD"
+    If v = X86_SSE_CC_EQ_UQ Then r = "X86_SSE_CC_EQ_UQ"
+    If v = X86_SSE_CC_NGE Then r = "X86_SSE_CC_NGE"
+    If v = X86_SSE_CC_NGT Then r = "X86_SSE_CC_NGT"
+    If v = X86_SSE_CC_FALSE Then r = "X86_SSE_CC_FALSE"
+    If v = X86_SSE_CC_NEQ_OQ Then r = "X86_SSE_CC_NEQ_OQ"
+    If v = X86_SSE_CC_GE Then r = "X86_SSE_CC_GE"
+    If v = X86_SSE_CC_GT Then r = "X86_SSE_CC_GT"
+    If v = X86_SSE_CC_TRUE Then r = "X86_SSE_CC_TRUE"
+    
+    If Len(r) = 0 Then
+        r = "Unknown: " & Hex(v)
+    ElseIf DEBUG_DUMP Then
+        r = r & " (" & Hex(v) & ")"
+    End If
+    
+    x86_sse_cc2str = r
+    
+End Function
+
+Function x86_avx_cc2str(v As x86_avx_cc) As String
+     Dim r As String
+    If v = X86_AVX_CC_INVALID Then r = "X86_AVX_CC_INVALID"
+    If v = X86_AVX_CC_EQ Then r = "X86_AVX_CC_EQ"
+    If v = X86_AVX_CC_LT Then r = "X86_AVX_CC_LT"
+    If v = X86_AVX_CC_LE Then r = "X86_AVX_CC_LE"
+    If v = X86_AVX_CC_UNORD Then r = "X86_AVX_CC_UNORD"
+    If v = X86_AVX_CC_NEQ Then r = "X86_AVX_CC_NEQ"
+    If v = X86_AVX_CC_NLT Then r = "X86_AVX_CC_NLT"
+    If v = X86_AVX_CC_NLE Then r = "X86_AVX_CC_NLE"
+    If v = X86_AVX_CC_ORD Then r = "X86_AVX_CC_ORD"
+    If v = X86_AVX_CC_EQ_UQ Then r = "X86_AVX_CC_EQ_UQ"
+    If v = X86_AVX_CC_NGE Then r = "X86_AVX_CC_NGE"
+    If v = X86_AVX_CC_NGT Then r = "X86_AVX_CC_NGT"
+    If v = X86_AVX_CC_FALSE Then r = "X86_AVX_CC_FALSE"
+    If v = X86_AVX_CC_NEQ_OQ Then r = "X86_AVX_CC_NEQ_OQ"
+    If v = X86_AVX_CC_GE Then r = "X86_AVX_CC_GE"
+    If v = X86_AVX_CC_GT Then r = "X86_AVX_CC_GT"
+    If v = X86_AVX_CC_TRUE Then r = "X86_AVX_CC_TRUE"
+    If v = X86_AVX_CC_EQ_OS Then r = "X86_AVX_CC_EQ_OS"
+    If v = X86_AVX_CC_LT_OQ Then r = "X86_AVX_CC_LT_OQ"
+    If v = X86_AVX_CC_LE_OQ Then r = "X86_AVX_CC_LE_OQ"
+    If v = X86_AVX_CC_UNORD_S Then r = "X86_AVX_CC_UNORD_S"
+    If v = X86_AVX_CC_NEQ_US Then r = "X86_AVX_CC_NEQ_US"
+    If v = X86_AVX_CC_NLT_UQ Then r = "X86_AVX_CC_NLT_UQ"
+    If v = X86_AVX_CC_NLE_UQ Then r = "X86_AVX_CC_NLE_UQ"
+    If v = X86_AVX_CC_ORD_S Then r = "X86_AVX_CC_ORD_S"
+    If v = X86_AVX_CC_EQ_US Then r = "X86_AVX_CC_EQ_US"
+    If v = X86_AVX_CC_NGE_UQ Then r = "X86_AVX_CC_NGE_UQ"
+    If v = X86_AVX_CC_NGT_UQ Then r = "X86_AVX_CC_NGT_UQ"
+    If v = X86_AVX_CC_FALSE_OS Then r = "X86_AVX_CC_FALSE_OS"
+    If v = X86_AVX_CC_NEQ_OS Then r = "X86_AVX_CC_NEQ_OS"
+    If v = X86_AVX_CC_GE_OQ Then r = "X86_AVX_CC_GE_OQ"
+    If v = X86_AVX_CC_GT_OQ Then r = "X86_AVX_CC_GT_OQ"
+    If v = X86_AVX_CC_TRUE_US Then r = "X86_AVX_CC_TRUE_US"
+    
+    If Len(r) = 0 Then
+        r = "Unknown: " & Hex(v)
+    ElseIf DEBUG_DUMP Then
+        r = r & " (" & Hex(v) & ")"
+    End If
+    
+    x86_avx_cc2str = r
+    
+End Function
+
+
+Function x86_avx_rm2str(v As x86_avx_rm) As String
+    Dim r As String
+    
+    If v = X86_AVX_RM_INVALID Then r = "X86_AVX_RM_INVALID"
+    If v = X86_AVX_RM_RN Then r = "X86_AVX_RM_RN"
+    If v = X86_AVX_RM_RD Then r = "X86_AVX_RM_RD"
+    If v = X86_AVX_RM_RU Then r = "X86_AVX_RM_RU"
+    If v = X86_AVX_RM_RZ Then r = "X86_AVX_RM_RZ"
+    
+    If Len(r) = 0 Then
+        r = "Unknown: " & Hex(v)
+    ElseIf DEBUG_DUMP Then
+        r = r & " (" & Hex(v) & ")"
+    End If
+    
+    x86_avx_rm2str = r
+End Function
+
+
diff --git a/capstone/bindings/vb6/screenshot.png b/capstone/bindings/vb6/screenshot.png
new file mode 100644
index 000000000..3780f6702
--- /dev/null
+++ b/capstone/bindings/vb6/screenshot.png
diff --git a/capstone/bindings/vb6/vbCapstone.cpp b/capstone/bindings/vb6/vbCapstone.cpp
new file mode 100644
index 000000000..90ee1654d
--- /dev/null
+++ b/capstone/bindings/vb6/vbCapstone.cpp
@@ -0,0 +1,119 @@
+/*
+	Capstone Disassembly Engine bindings for VB6
+	Contributed by FireEye FLARE Team
+	Author:  David Zimmer <david.zimmer@fireeye.com>, <dzzie@yahoo.com>
+	License: Apache  
+	Copyright: FireEye 2017
+
+	This dll is a small stdcall shim so VB6 can access the capstone API
+*/
+
+#include <stdio.h>
+#include <conio.h>
+#include <string.h>
+
+#include <capstone.h>
+#pragma comment(lib, "capstone.lib")
+
+#define EXPORT comment(linker, "/EXPORT:"__FUNCTION__"="__FUNCDNAME__)
+
+unsigned int __stdcall bs_version(int *major, int *minor){
+#pragma EXPORT
+	return cs_version(major,minor);	
+}
+
+bool __stdcall bs_support(int query){
+#pragma EXPORT
+	return cs_support(query);
+}
+
+cs_err __stdcall bs_open(cs_arch arch, cs_mode mode, csh *handle){
+#pragma EXPORT
+	return cs_open(arch, mode, handle);
+}
+
+cs_err __stdcall bs_close(csh *handle){
+#pragma EXPORT
+	return cs_close(handle);
+}
+
+cs_err __stdcall bs_option(csh handle, cs_opt_type type, size_t value){
+#pragma EXPORT
+	return cs_option(handle, type, value);
+}
+
+cs_err __stdcall bs_errno(csh handle){
+#pragma EXPORT
+	return cs_errno(handle);
+}
+
+const char* __stdcall bs_strerror(cs_err code){
+#pragma EXPORT
+	return cs_strerror(code);
+}
+
+size_t __stdcall bs_disasm(csh handle, const uint8_t *code, size_t code_size, uint64_t address, size_t count, cs_insn **insn){
+#pragma EXPORT
+	return cs_disasm(handle, code, code_size, address, count, insn);
+}
+
+void __stdcall getInstruction(cs_insn *insn, uint32_t index, void* curInst, uint32_t bufSize){
+#pragma EXPORT
+	memcpy(curInst, (void*)&insn[index], bufSize); //size lets us get a partial version of whatever we have implemented in the vbstruct...
+}
+
+const char* __stdcall bs_reg_name(csh handle, unsigned int reg_id){
+#pragma EXPORT
+	return cs_reg_name(handle, reg_id);
+}
+
+void __stdcall bs_free(cs_insn *insn, size_t count){
+#pragma EXPORT
+	return cs_free(insn, count);
+}
+
+cs_insn* __stdcall bs_malloc(csh handle){
+#pragma EXPORT
+	return cs_malloc(handle);
+}
+
+
+int __stdcall bs_op_index(csh handle, const cs_insn *insn, unsigned int op_type, unsigned int position){
+#pragma EXPORT
+	return cs_op_index(handle,insn,op_type,position);
+}
+
+int __stdcall bs_op_count(csh handle, const cs_insn *insn, unsigned int op_type){
+#pragma EXPORT
+	return cs_op_count(handle,insn,op_type);
+}
+
+bool __stdcall bs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id){
+#pragma EXPORT
+	return cs_reg_write(handle,insn,reg_id);
+}
+
+bool __stdcall bs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id){
+#pragma EXPORT
+	return cs_reg_read(handle,insn,reg_id);
+}
+
+bool __stdcall bs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id){
+#pragma EXPORT
+	return cs_insn_group(handle,insn,group_id);
+}
+
+const char* __stdcall bcs_group_name(csh handle, unsigned int group_id){
+#pragma EXPORT
+	return cs_group_name(handle,group_id);
+}
+
+const char* __stdcall bs_insn_name(csh handle, unsigned int insn_id){
+#pragma EXPORT
+	return cs_insn_name(handle,insn_id);
+}
+
+bool __stdcall bs_disasm_iter(csh handle, const uint8_t **code, size_t *size, uint64_t *address, cs_insn *insn){
+#pragma EXPORT
+	return cs_disasm_iter(handle, code, size, address, insn);
+}
diff --git a/capstone/bindings/vb6/vbCapstone.sln b/capstone/bindings/vb6/vbCapstone.sln
new file mode 100644
index 000000000..8451d6027
--- /dev/null
+++ b/capstone/bindings/vb6/vbCapstone.sln
@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 10.00
+# Visual Studio 2008
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "vbCapstone", "vbCapstone.vcproj", "{B693CA7B-8B91-4413-AAED-14F1947F012A}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Win32 = Debug|Win32
+		Release|Win32 = Release|Win32
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B693CA7B-8B91-4413-AAED-14F1947F012A}.Debug|Win32.ActiveCfg = Debug|Win32
+		{B693CA7B-8B91-4413-AAED-14F1947F012A}.Debug|Win32.Build.0 = Debug|Win32
+		{B693CA7B-8B91-4413-AAED-14F1947F012A}.Release|Win32.ActiveCfg = Release|Win32
+		{B693CA7B-8B91-4413-AAED-14F1947F012A}.Release|Win32.Build.0 = Release|Win32
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
diff --git a/capstone/bindings/vb6/vbCapstone.vcproj b/capstone/bindings/vb6/vbCapstone.vcproj
new file mode 100644
index 000000000..3085c8e7d
--- /dev/null
+++ b/capstone/bindings/vb6/vbCapstone.vcproj
@@ -0,0 +1,182 @@
+<?xml version="1.0" encoding="Windows-1252"?>
+<VisualStudioProject
+	ProjectType="Visual C++"
+	Version="9.00"
+	Name="vbCapstone"
+	ProjectGUID="{B693CA7B-8B91-4413-AAED-14F1947F012A}"
+	RootNamespace="yy"
+	Keyword="Win32Proj"
+	TargetFrameworkVersion="196613"
+	>
+	<Platforms>
+		<Platform
+			Name="Win32"
+		/>
+	</Platforms>
+	<ToolFiles>
+	</ToolFiles>
+	<Configurations>
+		<Configuration
+			Name="Debug|Win32"
+			OutputDirectory="$(SolutionDir)$(ConfigurationName)"
+			IntermediateDirectory="$(ConfigurationName)"
+			ConfigurationType="2"
+			CharacterSet="2"
+			>
+			<Tool
+				Name="VCPreBuildEventTool"
+			/>
+			<Tool
+				Name="VCCustomBuildTool"
+			/>
+			<Tool
+				Name="VCXMLDataGeneratorTool"
+			/>
+			<Tool
+				Name="VCWebServiceProxyGeneratorTool"
+			/>
+			<Tool
+				Name="VCMIDLTool"
+			/>
+			<Tool
+				Name="VCCLCompilerTool"
+				Optimization="0"
+				AdditionalIncludeDirectories="./../../include/"
+				PreprocessorDefinitions="WIN32;_DEBUG;_CONSOLE"
+				MinimalRebuild="true"
+				BasicRuntimeChecks="3"
+				RuntimeLibrary="1"
+				UsePrecompiledHeader="0"
+				WarningLevel="3"
+				DebugInformationFormat="4"
+			/>
+			<Tool
+				Name="VCManagedResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCPreLinkEventTool"
+			/>
+			<Tool
+				Name="VCLinkerTool"
+				OutputFile="./vbCapstone.dll"
+				LinkIncremental="2"
+				GenerateManifest="false"
+				GenerateDebugInformation="true"
+				SubSystem="1"
+				TargetMachine="1"
+			/>
+			<Tool
+				Name="VCALinkTool"
+			/>
+			<Tool
+				Name="VCManifestTool"
+				EmbedManifest="false"
+			/>
+			<Tool
+				Name="VCXDCMakeTool"
+			/>
+			<Tool
+				Name="VCBscMakeTool"
+			/>
+			<Tool
+				Name="VCFxCopTool"
+			/>
+			<Tool
+				Name="VCAppVerifierTool"
+			/>
+			<Tool
+				Name="VCPostBuildEventTool"
+			/>
+		</Configuration>
+		<Configuration
+			Name="Release|Win32"
+			OutputDirectory="$(SolutionDir)$(ConfigurationName)"
+			IntermediateDirectory="$(ConfigurationName)"
+			ConfigurationType="2"
+			CharacterSet="2"
+			WholeProgramOptimization="1"
+			>
+			<Tool
+				Name="VCPreBuildEventTool"
+			/>
+			<Tool
+				Name="VCCustomBuildTool"
+			/>
+			<Tool
+				Name="VCXMLDataGeneratorTool"
+			/>
+			<Tool
+				Name="VCWebServiceProxyGeneratorTool"
+			/>
+			<Tool
+				Name="VCMIDLTool"
+			/>
+			<Tool
+				Name="VCCLCompilerTool"
+				Optimization="2"
+				EnableIntrinsicFunctions="true"
+				AdditionalIncludeDirectories="./../../include/"
+				PreprocessorDefinitions="WIN32;NDEBUG;_CONSOLE"
+				RuntimeLibrary="0"
+				EnableFunctionLevelLinking="true"
+				UsePrecompiledHeader="0"
+				WarningLevel="3"
+				DebugInformationFormat="3"
+			/>
+			<Tool
+				Name="VCManagedResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCPreLinkEventTool"
+			/>
+			<Tool
+				Name="VCLinkerTool"
+				OutputFile="./vbCapstone.dll"
+				LinkIncremental="1"
+				GenerateManifest="false"
+				GenerateDebugInformation="true"
+				SubSystem="1"
+				OptimizeReferences="2"
+				EnableCOMDATFolding="2"
+				TargetMachine="1"
+			/>
+			<Tool
+				Name="VCALinkTool"
+			/>
+			<Tool
+				Name="VCManifestTool"
+			/>
+			<Tool
+				Name="VCXDCMakeTool"
+			/>
+			<Tool
+				Name="VCBscMakeTool"
+			/>
+			<Tool
+				Name="VCFxCopTool"
+			/>
+			<Tool
+				Name="VCAppVerifierTool"
+			/>
+			<Tool
+				Name="VCPostBuildEventTool"
+			/>
+		</Configuration>
+	</Configurations>
+	<References>
+	</References>
+	<Files>
+		<File
+			RelativePath=".\vbCapstone.cpp"
+			>
+		</File>
+	</Files>
+	<Globals>
+	</Globals>
+</VisualStudioProject>
author	Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>	2023-10-10 14:33:42 +0000
committer	Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>	2023-10-10 14:33:42 +0000
commit	af1a266670d040d2f4083ff309d732d648afba2a (patch)
tree	2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/bindings
parent	e02cda008591317b1625707ff8e115a4841aa889 (diff)