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authorAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
committerAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
commitaf1a266670d040d2f4083ff309d732d648afba2a (patch)
tree2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/bindings/python/test_ppc.py
parente02cda008591317b1625707ff8e115a4841aa889 (diff)
Add submodule dependency filesHEADmaster
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/bindings/python/test_ppc.py')
-rwxr-xr-xcapstone/bindings/python/test_ppc.py83
1 files changed, 83 insertions, 0 deletions
diff --git a/capstone/bindings/python/test_ppc.py b/capstone/bindings/python/test_ppc.py
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+#!/usr/bin/env python
+
+# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
+from __future__ import print_function
+from capstone import *
+from capstone.ppc import *
+from xprint import to_hex, to_x_32
+
+PPC_CODE = b"\x43\x20\x0c\x07\x41\x56\xff\x17\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14"
+PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
+
+all_tests = (
+ (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64"),
+ (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX"),
+ )
+
+
+def print_insn_detail(insn):
+ # print address, mnemonic and operands
+ print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
+
+ # "data" instruction generated by SKIPDATA option has no detail
+ if insn.id == 0:
+ return
+
+ if len(insn.operands) > 0:
+ print("\top_count: %u" % len(insn.operands))
+ c = 0
+ for i in insn.operands:
+ if i.type == PPC_OP_REG:
+ print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
+ if i.type == PPC_OP_IMM:
+ print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x_32(i.imm)))
+ if i.type == PPC_OP_MEM:
+ print("\t\toperands[%u].type: MEM" % c)
+ if i.mem.base != 0:
+ print("\t\t\toperands[%u].mem.base: REG = %s" \
+ % (c, insn.reg_name(i.mem.base)))
+ if i.mem.disp != 0:
+ print("\t\t\toperands[%u].mem.disp: 0x%s" \
+ % (c, to_x_32(i.mem.disp)))
+ if i.type == PPC_OP_CRX:
+ print("\t\toperands[%u].type: CRX" % c)
+ print("\t\t\toperands[%u].crx.scale: = %u" \
+ % (c, i.crx.scale))
+ if i.crx.reg != 0:
+ print("\t\t\toperands[%u].crx.reg: REG = %s" \
+ % (c, insn.reg_name(i.crx.reg)))
+ if i.crx.cond != 0:
+ print("\t\t\toperands[%u].crx.cond: 0x%x" \
+ % (c, i.crx.cond))
+ c += 1
+
+ if insn.bc:
+ print("\tBranch code: %u" % insn.bc)
+ if insn.bh:
+ print("\tBranch hint: %u" % insn.bh)
+ if insn.update_cr0:
+ print("\tUpdate-CR0: True")
+
+
+# ## Test class Cs
+def test_class():
+
+ for (arch, mode, code, comment) in all_tests:
+ print("*" * 16)
+ print("Platform: %s" % comment)
+ print("Code: %s" % to_hex(code))
+ print("Disasm:")
+
+ try:
+ md = Cs(arch, mode)
+ md.detail = True
+ for insn in md.disasm(code, 0x1000):
+ print_insn_detail(insn)
+ print ()
+ print("0x%x:\n" % (insn.address + insn.size))
+ except CsError as e:
+ print("ERROR: %s" % e)
+
+
+if __name__ == '__main__':
+ test_class()