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| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td')
| -rw-r--r-- | capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td b/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td new file mode 100644 index 000000000..6d17cd53a --- /dev/null +++ b/capstone/suite/synctools/tablegen/X86/back/X86RegisterBanks.td @@ -0,0 +1,17 @@ +//=- X86RegisterBank.td - Describe the AArch64 Banks -----*- tablegen -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +/// General Purpose Registers: RAX, RCX,... +def GPRRegBank : RegisterBank<"GPR", [GR64]>; + +/// Floating Point/Vector Registers +def VECRRegBank : RegisterBank<"VECR", [VR512]>; |