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authorAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
committerAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
commitaf1a266670d040d2f4083ff309d732d648afba2a (patch)
tree2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm
parente02cda008591317b1625707ff8e115a4841aa889 (diff)
Add submodule dependency filesHEADmaster
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm')
-rw-r--r--roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm36
1 files changed, 36 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm b/roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm
new file mode 100644
index 000000000..02ed72921
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm
@@ -0,0 +1,36 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ mov eax, cr0
+ btr eax, 29
+ btr eax, 30
+ mov cr0, eax
+ ret
+