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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c')
-rw-r--r-- | roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c b/roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c new file mode 100644 index 000000000..22ef73067 --- /dev/null +++ b/roms/edk2/MdePkg/Library/BaseLib/RiscV64/EnableInterrupts.c @@ -0,0 +1,25 @@ +/** @file
+ CPU enable interrupt function for RISC-V
+
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "BaseLibInternals.h"
+
+extern VOID RiscVEnableSupervisorModeInterrupt (VOID);
+
+/**
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ RiscVEnableSupervisorModeInterrupt ();
+}
+
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