diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/mach-socfpga/timer_s10.c | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/mach-socfpga/timer_s10.c')
| -rw-r--r-- | roms/u-boot/arch/arm/mach-socfpga/timer_s10.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-socfpga/timer_s10.c b/roms/u-boot/arch/arm/mach-socfpga/timer_s10.c new file mode 100644 index 000000000..7d5598e1a --- /dev/null +++ b/roms/u-boot/arch/arm/mach-socfpga/timer_s10.c @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <init.h> +#include <asm/io.h> +#include <asm/arch/timer.h> + +/* + * Timer initialization + */ +int timer_init(void) +{ +#ifdef CONFIG_SPL_BUILD + int enable = 0x3; /* timer enable + output signal masked */ + int loadval = ~0; + + /* enable system counter */ + writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS); + /* enable processor pysical counter */ + asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable)); + asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval)); +#endif + return 0; +} |