diff options
Diffstat (limited to 'roms/u-boot/board/altera/arria10-socdk')
5 files changed, 74 insertions, 0 deletions
diff --git a/roms/u-boot/board/altera/arria10-socdk/Kconfig b/roms/u-boot/board/altera/arria10-socdk/Kconfig new file mode 100644 index 000000000..621dc9702 --- /dev/null +++ b/roms/u-boot/board/altera/arria10-socdk/Kconfig @@ -0,0 +1,18 @@ +if TARGET_SOCFPGA_ARRIA10_SOCDK + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "socfpga_arria10" + +config SYS_VENDOR + default "altera" + +config SYS_SOC + default "socfpga_arria10" + +config SYS_CONFIG_NAME + default "socfpga_arria10" + +endif diff --git a/roms/u-boot/board/altera/arria10-socdk/MAINTAINERS b/roms/u-boot/board/altera/arria10-socdk/MAINTAINERS new file mode 100644 index 000000000..5a76efb54 --- /dev/null +++ b/roms/u-boot/board/altera/arria10-socdk/MAINTAINERS @@ -0,0 +1,7 @@ +SOCFPGA BOARD +M: Dinh Nguyen <dinguyen@kernel.org> +M: Chin-Liang See <clsee@altera.com> +S: Maintained +F: board/altera/arria10-socdk/ +F: include/configs/socfpga_arria10_socdk.h +F: configs/socfpga_arria10_defconfig diff --git a/roms/u-boot/board/altera/arria10-socdk/Makefile b/roms/u-boot/board/altera/arria10-socdk/Makefile new file mode 100644 index 000000000..80d000434 --- /dev/null +++ b/roms/u-boot/board/altera/arria10-socdk/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2015 Altera Corporation <www.altera.com> + +obj-y := socfpga.o diff --git a/roms/u-boot/board/altera/arria10-socdk/fit_spl_fpga.its b/roms/u-boot/board/altera/arria10-socdk/fit_spl_fpga.its new file mode 100644 index 000000000..adae99721 --- /dev/null +++ b/roms/u-boot/board/altera/arria10-socdk/fit_spl_fpga.its @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 + /* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + * + */ + +/dts-v1/; + +/ { + description = "FIT image with FPGA bistream"; + #address-cells = <1>; + + images { + fpga-periph-1 { + description = "FPGA peripheral bitstream"; + data = /incbin/("../../../ghrd_10as066n2.periph.rbf"); + type = "fpga"; + arch = "arm"; + compression = "none"; + }; + + fpga-core-1 { + description = "FPGA core bitstream"; + data = /incbin/("../../../ghrd_10as066n2.core.rbf"); + type = "fpga"; + arch = "arm"; + compression = "none"; + }; + }; + + configurations { + default = "config-1"; + config-1 { + description = "Boot with FPGA early IO release config"; + fpga = "fpga-periph-1", "fpga-core-1"; + }; + }; +}; diff --git a/roms/u-boot/board/altera/arria10-socdk/socfpga.c b/roms/u-boot/board/altera/arria10-socdk/socfpga.c new file mode 100644 index 000000000..4c466cb94 --- /dev/null +++ b/roms/u-boot/board/altera/arria10-socdk/socfpga.c @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 Altera Corporation <www.altera.com> + */ + +#include <common.h> |