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-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig16
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS8
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/Makefile7
-rw-r--r--roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c78
4 files changed, 109 insertions, 0 deletions
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig b/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig
new file mode 100644
index 000000000..720fbbb5f
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ROC_PC_RK3399
+
+config SYS_BOARD
+ default "roc-pc-rk3399"
+
+config SYS_VENDOR
+ default "firefly"
+
+config SYS_CONFIG_NAME
+ default "roc-pc-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
+
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS b/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS
new file mode 100644
index 000000000..68a5b757d
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+ROC-RK3399-PC
+M: Levin Du <djw@t-chip.com.cn>
+M: Suniel Mahesh <sunil@amarulasolutions.com>
+S: Maintained
+F: board/firefly/roc-pc-rk3399
+F: include/configs/roc-pc-rk3399.h
+F: configs/roc-pc-rk3399_defconfig
+F: configs/roc-pc-mezzanine-rk3399_defconfig
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile b/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile
new file mode 100644
index 000000000..29c79b25d
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += roc-pc-rk3399.o
diff --git a/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
new file mode 100644
index 000000000..93e7d776f
--- /dev/null
+++ b/roms/u-boot/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <log.h>
+#include <spl_gpio.h>
+#include <asm/io.h>
+#include <power/regulator.h>
+
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/gpio.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+ struct udevice *regulator;
+ int ret;
+
+ ret = regulator_get_by_platname("vcc5v0_host", &regulator);
+ if (ret) {
+ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+ goto out;
+ }
+
+ ret = regulator_set_enable(regulator, true);
+ if (ret)
+ debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+out:
+ return 0;
+}
+
+#else
+
+#define PMUGRF_BASE 0xff320000
+#define GPIO0_BASE 0xff720000
+
+/**
+ * LED setup for roc-rk3399-pc
+ *
+ * 1. Set the low power leds (only during POR, pwr_key env is 'y')
+ * glow yellow LED, termed as low power
+ * poll for on board power key press
+ * once powe key pressed, turn off yellow
+ * 2. Turn on red LED, indicating full power mode
+ */
+void led_setup(void)
+{
+ struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+ struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+ bool press_pwr_key = false;
+
+ if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
+ env_init();
+ env_load();
+ if (env_get_yesno("pwr_key") == 1)
+ press_pwr_key = true;
+ }
+
+ if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+ spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
+ GPIO_PULL_NORMAL);
+ while (readl(&gpio0->ext_port) & 0x20)
+ ;
+
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+ }
+
+ spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+}
+
+#endif