diff options
Diffstat (limited to 'roms/u-boot/board/freescale/imx8qxp_mek')
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/Kconfig | 14 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/MAINTAINERS | 7 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/Makefile | 8 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/imx8qxp_mek.c | 170 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/imximage.cfg | 22 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/spl.c | 87 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/imx8qxp_mek/uboot-container.cfg | 13 |
7 files changed, 321 insertions, 0 deletions
diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/Kconfig b/roms/u-boot/board/freescale/imx8qxp_mek/Kconfig new file mode 100644 index 000000000..b67300d81 --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/Kconfig @@ -0,0 +1,14 @@ +if TARGET_IMX8QXP_MEK + +config SYS_BOARD + default "imx8qxp_mek" + +config SYS_VENDOR + default "freescale" + +config SYS_CONFIG_NAME + default "imx8qxp_mek" + +source "board/freescale/common/Kconfig" + +endif diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/MAINTAINERS b/roms/u-boot/board/freescale/imx8qxp_mek/MAINTAINERS new file mode 100644 index 000000000..3a21f5521 --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/MAINTAINERS @@ -0,0 +1,7 @@ +i.MX8QXP MEK BOARD +M: Peng Fan <peng.fan@nxp.com> +M: Fabio Estevam <festevam@gmail.com> +S: Maintained +F: board/freescale/imx8qxp_mek/ +F: include/configs/imx8qxp_mek.h +F: configs/imx8qxp_mek_defconfig diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/Makefile b/roms/u-boot/board/freescale/imx8qxp_mek/Makefile new file mode 100644 index 000000000..acaadcd84 --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2017 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_mek.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/roms/u-boot/board/freescale/imx8qxp_mek/imx8qxp_mek.c new file mode 100644 index 000000000..21cfa142f --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <common.h> +#include <cpu_func.h> +#include <env.h> +#include <errno.h> +#include <init.h> +#include <asm/global_data.h> +#include <linux/delay.h> +#include <linux/libfdt.h> +#include <fsl_esdhc_imx.h> +#include <fdt_support.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/clock.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <asm/arch/snvs_security_sc.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +static iomux_cfg_t uart0_pads[] = { + SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads)); +} + +int board_early_init_f(void) +{ + sc_pm_clock_rate_t rate = SC_80MHZ; + int ret; + + /* Set UART0 clock root to 80 MHz */ + ret = sc_pm_setup_uart(SC_R_UART_0, rate); + if (ret) + return ret; + + setup_iomux_uart(); + + return 0; +} + +#if CONFIG_IS_ENABLED(DM_GPIO) +static void board_gpio_init(void) +{ + struct gpio_desc desc; + int ret; + + ret = dm_gpio_lookup_name("gpio@1a_3", &desc); + if (ret) + return; + + ret = dm_gpio_request(&desc, "bb_per_rst_b"); + if (ret) + return; + + dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); + dm_gpio_set_value(&desc, 0); + udelay(50); + dm_gpio_set_value(&desc, 1); +} +#else +static inline void board_gpio_init(void) {} +#endif + +#if IS_ENABLED(CONFIG_FEC_MXC) +#include <miiphy.h> + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int checkboard(void) +{ + puts("Board: iMX8QXP MEK\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + board_gpio_init(); + +#ifdef CONFIG_IMX_SNVS_SEC_SC_AUTO + { + int ret = snvs_security_sc_init(); + + if (ret) + return ret; + } +#endif + + return 0; +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(void) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return 0; +} +#endif + +int board_mmc_get_env_dev(int devno) +{ + return devno; +} + +int board_late_init(void) +{ + char *fdt_file; + bool m4_booted; + +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + env_set("board_name", "MEK"); + env_set("board_rev", "iMX8QXP"); +#endif + + fdt_file = env_get("fdt_file"); + m4_booted = m4_parts_booted(); + + if (fdt_file && !strcmp(fdt_file, "undefined")) { + if (m4_booted) + env_set("fdt_file", "imx8qxp-mek-rpmsg.dtb"); + else + env_set("fdt_file", "imx8qxp-mek.dtb"); + } + + return 0; +} diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/imximage.cfg b/roms/u-boot/board/freescale/imx8qxp_mek/imximage.cfg new file mode 100644 index 000000000..cd747d2ee --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/imximage.cfg @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * + * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure + * and create imx8image boot image + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QX */ +SOC_TYPE IMX8QX +/* Append seco container image */ +APPEND ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qx-mek-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 spl/u-boot-spl.bin 0x00100000 diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/spl.c b/roms/u-boot/board/freescale/imx8qxp_mek/spl.c new file mode 100644 index 000000000..ae6b64ff6 --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/spl.c @@ -0,0 +1,87 @@ +/* + * Copyright 2018 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <image.h> +#include <init.h> +#include <log.h> +#include <spl.h> +#include <asm/global_data.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define USDHC2_SD_PWR IMX_GPIO_NR(4, 19) +static iomux_cfg_t usdhc2_sd_pwr[] = { + SC_P_USDHC1_RESET_B | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + +void spl_board_init(void) +{ + struct udevice *dev; + + uclass_find_first_device(UCLASS_MISC, &dev); + + for (; dev; uclass_find_next_device(&dev)) { + if (device_probe(dev)) + continue; + } + + arch_cpu_init(); + + board_early_init_f(); + + timer_init(); + + imx8_iomux_setup_multiple_pads(usdhc2_sd_pwr, ARRAY_SIZE(usdhc2_sd_pwr)); + gpio_direction_output(USDHC2_SD_PWR, 0); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +void spl_board_prepare_for_boot(void) +{ + imx8_power_off_pd_devices(NULL, 0); +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/roms/u-boot/board/freescale/imx8qxp_mek/uboot-container.cfg b/roms/u-boot/board/freescale/imx8qxp_mek/uboot-container.cfg new file mode 100644 index 000000000..816581181 --- /dev/null +++ b/roms/u-boot/board/freescale/imx8qxp_mek/uboot-container.cfg @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#define __ASSEMBLY__ + +/* This file is to create a container image could be loaded by SPL */ +BOOT_FROM SD 0x400 +SOC_TYPE IMX8QX +CONTAINER +IMAGE A35 bl31.bin 0x80000000 +IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE |