diff options
Diffstat (limited to 'roms/u-boot/board/freescale/m54418twr')
| -rw-r--r-- | roms/u-boot/board/freescale/m54418twr/Kconfig | 15 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/m54418twr/MAINTAINERS | 11 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/m54418twr/Makefile | 7 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/m54418twr/m54418twr.c | 117 | ||||
| -rw-r--r-- | roms/u-boot/board/freescale/m54418twr/sbf_dram_init.S | 85 |
5 files changed, 235 insertions, 0 deletions
diff --git a/roms/u-boot/board/freescale/m54418twr/Kconfig b/roms/u-boot/board/freescale/m54418twr/Kconfig new file mode 100644 index 000000000..4199a3f54 --- /dev/null +++ b/roms/u-boot/board/freescale/m54418twr/Kconfig @@ -0,0 +1,15 @@ +if TARGET_M54418TWR + +config SYS_CPU + default "mcf5445x" + +config SYS_BOARD + default "m54418twr" + +config SYS_VENDOR + default "freescale" + +config SYS_CONFIG_NAME + default "M54418TWR" + +endif diff --git a/roms/u-boot/board/freescale/m54418twr/MAINTAINERS b/roms/u-boot/board/freescale/m54418twr/MAINTAINERS new file mode 100644 index 000000000..f88aed99d --- /dev/null +++ b/roms/u-boot/board/freescale/m54418twr/MAINTAINERS @@ -0,0 +1,11 @@ +M54418TWR BOARD +#M: - +S: Maintained +F: board/freescale/m54418twr/ +F: include/configs/M54418TWR.h +F: configs/M54418TWR_defconfig +F: configs/M54418TWR_nand_mii_defconfig +F: configs/M54418TWR_nand_rmii_defconfig +F: configs/M54418TWR_nand_rmii_lowfreq_defconfig +F: configs/M54418TWR_serial_mii_defconfig +F: configs/M54418TWR_serial_rmii_defconfig diff --git a/roms/u-boot/board/freescale/m54418twr/Makefile b/roms/u-boot/board/freescale/m54418twr/Makefile new file mode 100644 index 000000000..aa53874cc --- /dev/null +++ b/roms/u-boot/board/freescale/m54418twr/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2010-2012 Freescale Semiconductor, Inc. +# TsiChung Liew (Tsi-Chung.Liew@freescale.com) + +obj-y = m54418twr.o +extra-y += sbf_dram_init.o + diff --git a/roms/u-boot/board/freescale/m54418twr/m54418twr.c b/roms/u-boot/board/freescale/m54418twr/m54418twr.c new file mode 100644 index 000000000..ca8993197 --- /dev/null +++ b/roms/u-boot/board/freescale/m54418twr/m54418twr.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2010-2012 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + */ + +#include <common.h> +#include <init.h> +#include <spi.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm/immap.h> +#include <mmc.h> +#include <fsl_esdhc_imx.h> +#include <linux/delay.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + /* + * need to to: + * Check serial flash size. if 2mb evb, else 8mb demo + */ + puts("Board: "); + puts("Freescale MCF54418 Tower System\n"); + return 0; +}; + +int dram_init(void) +{ + u32 dramsize; + +#if defined(CONFIG_SERIAL_BOOT) + /* + * Serial Boot: The dram is already initialized in start.S + * only require to return DRAM size + */ + dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; +#else + sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); + ccm_t *ccm = (ccm_t *)MMAP_CCM; + gpio_t *gpio = (gpio_t *) MMAP_GPIO; + pm_t *pm = (pm_t *) MMAP_PM; + u32 i; + + dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; + + for (i = 0x13; i < 0x20; i++) { + if (dramsize == (1 << i)) + break; + } + + out_8(&pm->pmcr0, 0x2E); + out_8(&gpio->mscr_sdram, 1); + + clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF); + setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK); + + out_be32(&sdram->rcrcr, 0x40000000); + out_be32(&sdram->padcr, 0x01030203); + + out_be32(&sdram->cr00, 0x01010101); + out_be32(&sdram->cr01, 0x00000101); + out_be32(&sdram->cr02, 0x01010100); + out_be32(&sdram->cr03, 0x01010000); + out_be32(&sdram->cr04, 0x00010101); + out_be32(&sdram->cr06, 0x00010100); + out_be32(&sdram->cr07, 0x00000001); + out_be32(&sdram->cr08, 0x01000001); + out_be32(&sdram->cr09, 0x00000100); + out_be32(&sdram->cr10, 0x00010001); + out_be32(&sdram->cr11, 0x00000200); + out_be32(&sdram->cr12, 0x01000002); + out_be32(&sdram->cr13, 0x00000000); + out_be32(&sdram->cr14, 0x00000100); + out_be32(&sdram->cr15, 0x02000100); + out_be32(&sdram->cr16, 0x02000407); + out_be32(&sdram->cr17, 0x02030007); + out_be32(&sdram->cr18, 0x02000100); + out_be32(&sdram->cr19, 0x0A030203); + out_be32(&sdram->cr20, 0x00020708); + out_be32(&sdram->cr21, 0x00050008); + out_be32(&sdram->cr22, 0x04030002); + out_be32(&sdram->cr23, 0x00000004); + out_be32(&sdram->cr24, 0x020A0000); + out_be32(&sdram->cr25, 0x0C00000E); + out_be32(&sdram->cr26, 0x00002004); + out_be32(&sdram->cr28, 0x00100010); + out_be32(&sdram->cr29, 0x00100010); + out_be32(&sdram->cr31, 0x07990000); + out_be32(&sdram->cr40, 0x00000000); + out_be32(&sdram->cr41, 0x00C80064); + out_be32(&sdram->cr42, 0x44520002); + out_be32(&sdram->cr43, 0x00C80023); + out_be32(&sdram->cr45, 0x0000C350); + out_be32(&sdram->cr56, 0x04000000); + out_be32(&sdram->cr57, 0x03000304); + out_be32(&sdram->cr58, 0x40040000); + out_be32(&sdram->cr59, 0xC0004004); + out_be32(&sdram->cr60, 0x0642C000); + out_be32(&sdram->cr61, 0x00000642); + asm("tpf"); + + out_be32(&sdram->cr09, 0x01000100); + + udelay(100); +#endif + gd->ram_size = dramsize; + + return 0; +}; + +int testdram(void) +{ + return 0; +} diff --git a/roms/u-boot/board/freescale/m54418twr/sbf_dram_init.S b/roms/u-boot/board/freescale/m54418twr/sbf_dram_init.S new file mode 100644 index 000000000..5a70fb918 --- /dev/null +++ b/roms/u-boot/board/freescale/m54418twr/sbf_dram_init.S @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board-specific sbf ddr/sdram init. + * + * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it> + */ + +.global sbf_dram_init +.text + +sbf_dram_init: + move.l #0xFC04002D, %a1 + move.b #46, (%a1) /* DDR */ + + /* slew settings */ + move.l #0xEC094060, %a1 + move.b #0, (%a1) + + /* use vco instead of cpu*2 clock for ddr clock */ + move.l #0xEC09001A, %a1 + move.w #0xE01D, (%a1) + + /* DDR settings */ + move.l #0xFC0B8180, %a1 + move.l #0x00000000, (%a1) + move.l #0x40000000, (%a1) + + move.l #0xFC0B81AC, %a1 + move.l #0x01030203, (%a1) + + move.l #0xFC0B8000, %a1 + move.l #0x01010101, (%a1)+ /* 0x00 */ + move.l #0x00000101, (%a1)+ /* 0x04 */ + move.l #0x01010100, (%a1)+ /* 0x08 */ + move.l #0x01010000, (%a1)+ /* 0x0C */ + move.l #0x00010101, (%a1)+ /* 0x10 */ + move.l #0xFC0B8018, %a1 + move.l #0x00010100, (%a1)+ /* 0x18 */ + move.l #0x00000001, (%a1)+ /* 0x1C */ + move.l #0x01000001, (%a1)+ /* 0x20 */ + move.l #0x00000100, (%a1)+ /* 0x24 */ + move.l #0x00010001, (%a1)+ /* 0x28 */ + move.l #0x00000200, (%a1)+ /* 0x2C */ + move.l #0x01000002, (%a1)+ /* 0x30 */ + move.l #0x00000000, (%a1)+ /* 0x34 */ + move.l #0x00000100, (%a1)+ /* 0x38 */ + move.l #0x02000100, (%a1)+ /* 0x3C */ + move.l #0x02000407, (%a1)+ /* 0x40 */ + move.l #0x02030007, (%a1)+ /* 0x44 */ + move.l #0x02000100, (%a1)+ /* 0x48 */ + move.l #0x0A030203, (%a1)+ /* 0x4C */ + move.l #0x00020708, (%a1)+ /* 0x50 */ + move.l #0x00050008, (%a1)+ /* 0x54 */ + move.l #0x04030002, (%a1)+ /* 0x58 */ + move.l #0x00000004, (%a1)+ /* 0x5C */ + move.l #0x020A0000, (%a1)+ /* 0x60 */ + move.l #0x0C00000E, (%a1)+ /* 0x64 */ + move.l #0x00002004, (%a1)+ /* 0x68 */ + move.l #0x00000000, (%a1)+ /* 0x6C */ + move.l #0x00100010, (%a1)+ /* 0x70 */ + move.l #0x00100010, (%a1)+ /* 0x74 */ + move.l #0x00000000, (%a1)+ /* 0x78 */ + move.l #0x07990000, (%a1)+ /* 0x7C */ + move.l #0xFC0B80A0, %a1 + move.l #0x00000000, (%a1)+ /* 0xA0 */ + move.l #0x00C80064, (%a1)+ /* 0xA4 */ + move.l #0x44520002, (%a1)+ /* 0xA8 */ + move.l #0x00C80023, (%a1)+ /* 0xAC */ + move.l #0xFC0B80B4, %a1 + move.l #0x0000C350, (%a1) /* 0xB4 */ + move.l #0xFC0B80E0, %a1 + move.l #0x04000000, (%a1)+ /* 0xE0 */ + move.l #0x03000304, (%a1)+ /* 0xE4 */ + move.l #0x40040000, (%a1)+ /* 0xE8 */ + move.l #0xC0004004, (%a1)+ /* 0xEC */ + move.l #0x0642C000, (%a1)+ /* 0xF0 */ + move.l #0x00000642, (%a1)+ /* 0xF4 */ + move.l #0xFC0B8024, %a1 + tpf + move.l #0x01000100, (%a1) /* 0x24 */ + + move.l #0x2000, %d1 + bsr asm_delay + + rts |