diff options
Diffstat (limited to 'roms/u-boot/board/grinn')
| -rw-r--r-- | roms/u-boot/board/grinn/chiliboard/Kconfig | 15 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/chiliboard/MAINTAINERS | 8 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/chiliboard/Makefile | 4 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/chiliboard/README | 31 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/chiliboard/board.c | 147 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/liteboard/Kconfig | 12 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/liteboard/MAINTAINERS | 6 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/liteboard/Makefile | 4 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/liteboard/README | 31 | ||||
| -rw-r--r-- | roms/u-boot/board/grinn/liteboard/board.c | 255 |
10 files changed, 513 insertions, 0 deletions
diff --git a/roms/u-boot/board/grinn/chiliboard/Kconfig b/roms/u-boot/board/grinn/chiliboard/Kconfig new file mode 100644 index 000000000..20056e81a --- /dev/null +++ b/roms/u-boot/board/grinn/chiliboard/Kconfig @@ -0,0 +1,15 @@ +if TARGET_CHILIBOARD + +config SYS_BOARD + default "chiliboard" + +config SYS_VENDOR + default "grinn" + +config SYS_CONFIG_NAME + default "chiliboard" + +config SYS_SOC + default "am33xx" + +endif diff --git a/roms/u-boot/board/grinn/chiliboard/MAINTAINERS b/roms/u-boot/board/grinn/chiliboard/MAINTAINERS new file mode 100644 index 000000000..5eaccb279 --- /dev/null +++ b/roms/u-boot/board/grinn/chiliboard/MAINTAINERS @@ -0,0 +1,8 @@ +CHILIBOARD +M: Marcin Niestroj <m.niestroj@grinn-global.com> +S: Maintained +F: arch/arm/include/asm/arch-am33xx/chilisom.h +F: arch/arm/mach-omap2/am33xx/chilisom.c +F: board/grinn/chiliboard/ +F: include/configs/chiliboard.h +F: configs/chiliboard_defconfig diff --git a/roms/u-boot/board/grinn/chiliboard/Makefile b/roms/u-boot/board/grinn/chiliboard/Makefile new file mode 100644 index 000000000..2c33ccdbf --- /dev/null +++ b/roms/u-boot/board/grinn/chiliboard/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) Copyright 2017 Grinn + +obj-y := board.o diff --git a/roms/u-boot/board/grinn/chiliboard/README b/roms/u-boot/board/grinn/chiliboard/README new file mode 100644 index 000000000..cea4c1d42 --- /dev/null +++ b/roms/u-boot/board/grinn/chiliboard/README @@ -0,0 +1,31 @@ +How to use U-Boot on Grinn's chiliBoard +-------------------------------------- + +- Build U-Boot for chiliBoard: + +$ make mrproper +$ make chiliboard_defconfig +$ make + +This will generate the SPL image called MLO and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=MLO of=/dev/mmcblk0 bs=128k; sync + +- Flash the u-boot.img image into the micro SD card: + +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=128k seek=3; sync + +- Jumper settings: + +S2: 1 1 1 0 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Insert the micro SD card in the board. + +- Connect USB cable between chiliBoard and the PC for the power and console. + +- U-Boot messages should come up. diff --git a/roms/u-boot/board/grinn/chiliboard/board.c b/roms/u-boot/board/grinn/chiliboard/board.c new file mode 100644 index 000000000..12480f572 --- /dev/null +++ b/roms/u-boot/board/grinn/chiliboard/board.c @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2017, Grinn - http://grinn-global.com/ + */ + +#include <common.h> +#include <init.h> +#include <net.h> +#include <asm/arch/chilisom.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/mem.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/emif.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <cpsw.h> +#include <env.h> +#include <errno.h> +#include <miiphy.h> +#include <spl.h> +#include <watchdog.h> + +DECLARE_GLOBAL_DATA_PTR; + +static __maybe_unused struct ctrl_dev *cdev = + (struct ctrl_dev *)CTRL_DEVICE_BASE; + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {-1}, +}; + +static struct module_pin_mux rmii1_pin_mux[] = { + {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */ + {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */ + {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */ + {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TXD1 */ + {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TXD0 */ + {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RXD1 */ + {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RXD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */ + {-1}, +}; + +static void enable_board_pin_mux(void) +{ + chilisom_enable_pin_mux(); + + /* chiliboard pinmux */ + configure_module_pin_mux(rmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); +} +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +void set_uart_mux_conf(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +void am33xx_spl_board_init(void) +{ + chilisom_spl_board_init(); +} +#endif + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); + + return 0; +} + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#if !defined(CONFIG_SPL_BUILD) + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + + if (!env_get("ethaddr")) { + printf("<ethaddr> not set. Validating first E-fuse MAC\n"); + + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + } + + mac_lo = readl(&cdev->macid1l); + mac_hi = readl(&cdev->macid1h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + + if (!env_get("eth1addr")) { + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("eth1addr", mac_addr); + } +#endif + + return 0; +} +#endif diff --git a/roms/u-boot/board/grinn/liteboard/Kconfig b/roms/u-boot/board/grinn/liteboard/Kconfig new file mode 100644 index 000000000..e035872c9 --- /dev/null +++ b/roms/u-boot/board/grinn/liteboard/Kconfig @@ -0,0 +1,12 @@ +if TARGET_LITEBOARD + +config SYS_BOARD + default "liteboard" + +config SYS_VENDOR + default "grinn" + +config SYS_CONFIG_NAME + default "liteboard" + +endif diff --git a/roms/u-boot/board/grinn/liteboard/MAINTAINERS b/roms/u-boot/board/grinn/liteboard/MAINTAINERS new file mode 100644 index 000000000..b4474f1b3 --- /dev/null +++ b/roms/u-boot/board/grinn/liteboard/MAINTAINERS @@ -0,0 +1,6 @@ +LITEBOARD +M: Marcin Niestroj <m.niestroj@grinn-global.com> +S: Maintained +F: board/grinn/liteboard/ +F: include/configs/liteboard.h +F: configs/liteboard_defconfig diff --git a/roms/u-boot/board/grinn/liteboard/Makefile b/roms/u-boot/board/grinn/liteboard/Makefile new file mode 100644 index 000000000..06aa3eb56 --- /dev/null +++ b/roms/u-boot/board/grinn/liteboard/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) Copyright 2016 Grinn + +obj-y := board.o diff --git a/roms/u-boot/board/grinn/liteboard/README b/roms/u-boot/board/grinn/liteboard/README new file mode 100644 index 000000000..bee039442 --- /dev/null +++ b/roms/u-boot/board/grinn/liteboard/README @@ -0,0 +1,31 @@ +How to use U-Boot on Grinn's liteBoard +-------------------------------------- + +- Build U-Boot for liteBoard: + +$ make mrproper +$ make liteboard_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot.img image into the micro SD card: + +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +S1: 0 1 0 1 1 1 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Insert the micro SD card in the board. + +- Connect USB cable between liteBoard and the PC for the power and console. + +- U-Boot messages should come up. diff --git a/roms/u-boot/board/grinn/liteboard/board.c b/roms/u-boot/board/grinn/liteboard/board.c new file mode 100644 index 000000000..48392c48e --- /dev/null +++ b/roms/u-boot/board/grinn/liteboard/board.c @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. + * Copyright (C) 2016 Grinn + */ + +#include <common.h> +#include <command.h> +#include <init.h> +#include <asm/arch/clock.h> +#include <asm/arch/iomux.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/litesom.h> +#include <asm/arch/mx6ul_pins.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/global_data.h> +#include <asm/gpio.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/io.h> +#include <common.h> +#include <env.h> +#include <fsl_esdhc_imx.h> +#include <linux/sizes.h> +#include <linux/fb.h> +#include <miiphy.h> +#include <mmc.h> +#include <netdev.h> +#include <spl.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ + PAD_CTL_SPEED_HIGH | \ + PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST) + +#define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ + PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST | PAD_CTL_ODE) + +#define ENET_CLK_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const sd_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* CD */ + MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +#ifdef CONFIG_FSL_ESDHC_IMX +static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4}; + +#define SD_CD_GPIO IMX_GPIO_NR(1, 19) + +static int mmc_get_env_devno(void) +{ + u32 soc_sbmr = readl(SRC_BASE_ADDR + 0x4); + int dev_no; + u32 bootsel; + + bootsel = (soc_sbmr & 0x000000FF) >> 6; + + /* If not boot from sd/mmc, use default value */ + if (bootsel != 1) + return CONFIG_SYS_MMC_ENV_DEV; + + /* BOOT_CFG2[3] and BOOT_CFG2[4] */ + dev_no = (soc_sbmr & 0x00001800) >> 11; + + return dev_no; +} + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(SD_CD_GPIO); + break; + case USDHC2_BASE_ADDR: + ret = 1; + break; + } + + return ret; +} + +int board_mmc_init(struct bd_info *bis) +{ + int ret; + + /* SD */ + imx_iomux_v3_setup_multiple_pads(sd_pads, ARRAY_SIZE(sd_pads)); + gpio_direction_input(SD_CD_GPIO); + sd_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + ret = fsl_esdhc_initialize(bis, &sd_cfg); + if (ret) { + printf("Warning: failed to initialize mmc dev 0 (SD)\n"); + return ret; + } + + return litesom_mmc_init(bis); +} + +static int check_mmc_autodetect(void) +{ + char *autodetect_str = env_get("mmcautodetect"); + + if ((autodetect_str != NULL) && + (strcmp(autodetect_str, "yes") == 0)) { + return 1; + } + + return 0; +} + +void board_late_mmc_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_devno(); + + if (!check_mmc_autodetect()) + return; + + env_set_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", + dev_no); + env_set("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + +#ifdef CONFIG_FEC_MXC +static int setup_fec(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], + set gpr1[17]*/ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + + return 0; +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"sd", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, + {"emmc", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + +#ifdef CONFIG_ENV_IS_IN_MMC + board_late_mmc_init(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: Grinn liteBoard\n"); + + return 0; +} + +#ifdef CONFIG_SPL_BUILD +void board_boot_order(u32 *spl_boot_list) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + unsigned gpr10_boot = readl(&psrc->gpr10) & (1 << 28); + unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); + unsigned port = (reg >> 11) & 0x1; + + if (port == 0) { + spl_boot_list[0] = BOOT_DEVICE_MMC1; + spl_boot_list[1] = BOOT_DEVICE_MMC2; + } else { + spl_boot_list[0] = BOOT_DEVICE_MMC2; + spl_boot_list[1] = BOOT_DEVICE_MMC1; + } +} + +void board_init_f(ulong dummy) +{ + litesom_init_f(); +} +#endif |