4 files changed, 79 insertions, 0 deletions
diff --git a/roms/u-boot/board/nvidia/seaboard/Kconfig b/roms/u-boot/board/nvidia/seaboard/Kconfig
new file mode 100644
index 000000000..0924bde48
--- /dev/null
+++ b/roms/u-boot/board/nvidia/seaboard/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_SEABOARD
+
+config SYS_BOARD
+	default "seaboard"
+
+config SYS_VENDOR
+	default "nvidia"
+
+config SYS_CONFIG_NAME
+	default "seaboard"
+
+endif
diff --git a/roms/u-boot/board/nvidia/seaboard/MAINTAINERS b/roms/u-boot/board/nvidia/seaboard/MAINTAINERS
new file mode 100644
index 000000000..7926ca19a
--- /dev/null
+++ b/roms/u-boot/board/nvidia/seaboard/MAINTAINERS
@@ -0,0 +1,6 @@
+SEABOARD BOARD
+M:	Tom Warren <twarren@nvidia.com>
+S:	Maintained
+F:	board/nvidia/seaboard/
+F:	include/configs/seaboard.h
+F:	configs/seaboard_defconfig
diff --git a/roms/u-boot/board/nvidia/seaboard/Makefile b/roms/u-boot/board/nvidia/seaboard/Makefile
new file mode 100644
index 000000000..7793e7272
--- /dev/null
+++ b/roms/u-boot/board/nvidia/seaboard/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+#  (C) Copyright 2010,2011
+#  NVIDIA Corporation <www.nvidia.com>
+
+obj-y	:= seaboard.o
diff --git a/roms/u-boot/board/nvidia/seaboard/seaboard.c b/roms/u-boot/board/nvidia/seaboard/seaboard.c
new file mode 100644
index 000000000..b88aa8e96
--- /dev/null
+++ b/roms/u-boot/board/nvidia/seaboard/seaboard.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  (C) Copyright 2010,2011
+ *  NVIDIA Corporation <www.nvidia.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch-tegra/board.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/funcmux.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/pinmux.h>
+#include <asm/gpio.h>
+
+/* TODO: Remove this code when the SPI switch is working */
+#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
+void gpio_early_init_uart(void)
+{
+	/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
+	gpio_request(TEGRA_GPIO(I, 3), "uart_en");
+	gpio_direction_output(TEGRA_GPIO(I, 3), 0);
+}
+#endif
+
+#ifdef CONFIG_MMC_SDHCI_TEGRA
+/*
+ * Routine: pin_mux_mmc
+ * Description: setup the pin muxes/tristate values for the SDMMC(s)
+ */
+void pin_mux_mmc(void)
+{
+	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
+	funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
+
+	/* For power GPIO PI6 */
+	pinmux_tristate_disable(PMUX_PINGRP_ATA);
+	/* For CD GPIO PI5 */
+	pinmux_tristate_disable(PMUX_PINGRP_ATC);
+}
+#endif
+
+void pin_mux_usb(void)
+{
+	/* For USB0's GPIO PD0. For now, since we have no pinmux in fdt */
+	pinmux_tristate_disable(PMUX_PINGRP_SLXK);
+	/* For USB1's ULPI signals */
+	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
+	/* USB1 PHY reset GPIO */
+	pinmux_tristate_disable(PMUX_PINGRP_UAC);
+}