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-rw-r--r--roms/u-boot/board/synopsys/axs10x/Kconfig12
-rw-r--r--roms/u-boot/board/synopsys/axs10x/MAINTAINERS7
-rw-r--r--roms/u-boot/board/synopsys/axs10x/Makefile5
-rw-r--r--roms/u-boot/board/synopsys/axs10x/axs10x.c94
-rw-r--r--roms/u-boot/board/synopsys/axs10x/axs10x.h15
-rw-r--r--roms/u-boot/board/synopsys/axs10x/config.mk29
-rw-r--r--roms/u-boot/board/synopsys/axs10x/headerize-axs.py176
7 files changed, 338 insertions, 0 deletions
diff --git a/roms/u-boot/board/synopsys/axs10x/Kconfig b/roms/u-boot/board/synopsys/axs10x/Kconfig
new file mode 100644
index 000000000..dd1305adc
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_AXS101 || TARGET_AXS103
+
+config SYS_BOARD
+ default "axs10x"
+
+config SYS_VENDOR
+ default "synopsys"
+
+config SYS_CONFIG_NAME
+ default "axs10x"
+
+endif
diff --git a/roms/u-boot/board/synopsys/axs10x/MAINTAINERS b/roms/u-boot/board/synopsys/axs10x/MAINTAINERS
new file mode 100644
index 000000000..abb890b71
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/MAINTAINERS
@@ -0,0 +1,7 @@
+AXS10X BOARD
+M: Alexey Brodkin <abrodkin@synopsys.com>
+S: Maintained
+F: board/synopsys/axs10x/
+F: include/configs/axs10x.h
+F: configs/axs101_defconfig
+F: configs/axs103_defconfig
diff --git a/roms/u-boot/board/synopsys/axs10x/Makefile b/roms/u-boot/board/synopsys/axs10x/Makefile
new file mode 100644
index 000000000..dd5ee680e
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
+
+obj-y += axs10x.o
diff --git a/roms/u-boot/board/synopsys/axs10x/axs10x.c b/roms/u-boot/board/synopsys/axs10x/axs10x.c
new file mode 100644
index 000000000..75e4d0376
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/axs10x.c
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <dwmmc.h>
+#include <init.h>
+#include <malloc.h>
+#include <asm/arcregs.h>
+#include <asm/global_data.h>
+#include "axs10x.h"
+#include <asm/cache.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define AXS_MB_CREG 0xE0011000
+
+int board_early_init_f(void)
+{
+ if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
+ gd->board_type = AXS_MB_V3;
+ else
+ gd->board_type = AXS_MB_V2;
+
+ return 0;
+}
+
+#ifdef CONFIG_ISA_ARCV2
+
+void board_jump_and_run(ulong entry, int zero, int arch, uint params)
+{
+ void (*kernel_entry)(int zero, int arch, uint params);
+
+ kernel_entry = (void (*)(int, int, uint))entry;
+
+ smp_set_core_boot_addr(entry, -1);
+ smp_kick_all_cpus();
+ kernel_entry(zero, arch, params);
+}
+
+#define RESET_VECTOR_ADDR 0x0
+
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+ /* All cores have reset vector pointing to 0 */
+ writel(addr, (void __iomem *)RESET_VECTOR_ADDR);
+
+ /* Make sure other cores see written value in memory */
+ flush_dcache_all();
+}
+
+void smp_kick_all_cpus(void)
+{
+/* CPU start CREG */
+#define AXC003_CREG_CPU_START 0xF0001400
+/* Bits positions in CPU start CREG */
+#define BITS_START 0
+#define BITS_START_MODE 4
+#define BITS_CORE_SEL 9
+
+/*
+ * In axs103 v1.1 START bits semantics has changed quite a bit.
+ * We used to have a generic START bit for all cores selected by CORE_SEL mask.
+ * But now we don't touch CORE_SEL at all because we have a dedicated START bit
+ * for each core:
+ * bit 0: Core 0 (master)
+ * bit 1: Core 1 (slave)
+ */
+#define BITS_START_CORE1 1
+
+#define ARCVER_HS38_3_0 0x53
+
+ int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
+ int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
+
+ if (core_family < ARCVER_HS38_3_0) {
+ cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
+ cmd &= ~(1 << BITS_START_MODE);
+ } else {
+ cmd |= (1 << BITS_START_CORE1);
+ }
+ writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
+}
+#endif
+
+int checkboard(void)
+{
+ printf("Board: ARC Software Development Platform AXS%s\n",
+ is_isa_arcv2() ? "103" : "101");
+
+ return 0;
+};
diff --git a/roms/u-boot/board/synopsys/axs10x/axs10x.h b/roms/u-boot/board/synopsys/axs10x/axs10x.h
new file mode 100644
index 000000000..69541cc57
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/axs10x.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ */
+
+#ifndef _BOARD_SYNOPSYS_AXS10X_H
+#define _BOARD_SYNOPSYS_AXS10X_H
+
+enum {
+ AXS_MB_V2,
+ AXS_MB_V3
+};
+
+#endif /* _BOARD_SYNOPSYS_AXS10X_H */
+
diff --git a/roms/u-boot/board/synopsys/axs10x/config.mk b/roms/u-boot/board/synopsys/axs10x/config.mk
new file mode 100644
index 000000000..ccac54429
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/config.mk
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+
+ifdef CONFIG_TARGET_AXS103
+ PLATFORM_CPPFLAGS += -mcpu=archs
+else
+ PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape
+endif
+
+bsp-generate: u-boot u-boot.bin
+ifdef CONFIG_ISA_ARCV2
+ $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-axs.py \
+ --header-type v2 \
+ --arc-id 0x53 \
+ --spi-flash-offset 0x200000 \
+ --image $(srctree)/u-boot.bin \
+ --elf $(srctree)/u-boot
+else
+ $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-axs.py \
+ --header-type v1 \
+ --arc-id 0x434 \
+ --spi-flash-offset 0x0 \
+ --image $(srctree)/u-boot.bin \
+ --elf $(srctree)/u-boot
+endif
+ $(Q)tools/mkimage -T script -C none -n 'uboot update script' \
+ -d $(srctree)/u-boot-update.txt \
+ $(srctree)/u-boot-update.img &> /dev/null
diff --git a/roms/u-boot/board/synopsys/axs10x/headerize-axs.py b/roms/u-boot/board/synopsys/axs10x/headerize-axs.py
new file mode 100644
index 000000000..fa6aaf350
--- /dev/null
+++ b/roms/u-boot/board/synopsys/axs10x/headerize-axs.py
@@ -0,0 +1,176 @@
+#!/usr/bin/env python3
+
+#we can use binascii instead of zlib
+import os, getopt, sys, zlib
+from elftools.elf.elffile import ELFFile
+
+
+def usage(exit_code):
+ print("typical usage:")
+ print("AXS101:")
+ print(sys.argv[0] + \
+ " --header-type v1 --arc-id 0x434 --spi-flash-offset 0x0 --image u-boot.bin --elf u-boot")
+ print("AXS103:")
+ print(sys.argv[0] + \
+ " --header-type v2 --arc-id 0x53 --spi-flash-offset 0x200000 --image u-boot.bin --elf u-boot")
+ sys.exit(exit_code)
+
+
+def elf_get_entry(filename):
+ with open(filename, 'rb') as f:
+ elffile = ELFFile(f)
+ return elffile.header['e_entry']
+
+
+def calc_check_sum(filename):
+ # Calculate u-boot image check_sum: it is sum of all u-boot binary bytes
+ with open(filename, "rb") as file:
+ ba = bytearray(file.read())
+ return sum(ba) & 0xFF
+
+
+def arg_verify(uboot_bin_filename, uboot_elf_filename, header_type):
+ if not os.path.isfile(uboot_bin_filename):
+ print("uboot bin file not exists: " + uboot_bin_filename)
+ sys.exit(2)
+
+ if not os.path.isfile(uboot_elf_filename):
+ print("uboot elf file not exists: " + uboot_elf_filename)
+ sys.exit(2)
+
+ if header_type not in ("v1", "v2"):
+ print("unknown header type: " + header_type)
+ print("choose between 'v1' (most likely AXS101) and 'v2' (most likely AXS103)")
+ sys.exit(2)
+
+
+def main():
+ try:
+ opts, args = getopt.getopt(sys.argv[1:],
+ "ht:a:s:i:l:e:",
+ ["help", "header-type=", "arc-id=", "spi-flash-offset=", "image=", "elf="])
+ except getopt.GetoptError as err:
+ print(err)
+ usage(2)
+
+ # default filenames
+ uboot_elf_filename = "u-boot"
+ uboot_bin_filename = "u-boot.bin"
+ headerised_filename = "u-boot.head"
+ uboot_scrypt_file = "u-boot-update.txt"
+
+ # default values
+ spi_flash_offset = 0x200000
+ header_type = "v2"
+ arc_id = 0x53
+
+ # initial header values: place where preloader will store u-boot binary,
+ # should be equal to CONFIG_SYS_TEXT_BASE
+ image_copy_adr = 0x81000000
+
+ # initial constant header values, do not change these values
+ magic1 = 0xdeadbeafaf # big endian byte order
+ magic2 = [ # big endian byte order
+ 0x20202a2020202020202020202a20202020207c5c2e20202020202e2f7c20202020207c2d,
+ 0x2e5c2020202f2e2d7c20202020205c2020602d2d2d6020202f20202020202f205f202020,
+ 0x205f20205c20202020207c205f60712070205f207c2020202020272e5f3d2f205c3d5f2e,
+ 0x272020202020202020605c202f60202020202020202020202020206f2020202020202020]
+
+ for opt, arg in opts:
+ if opt in ('-h', "--help"): usage(0)
+ if opt in ('-t', "--header-type"): header_type = arg
+ if opt in ('-a', "--arc-id"): arc_id = int(arg, 16)
+ if opt in ('-s', "--spi-flash-offset"): spi_flash_offset = int(arg, 16)
+ if opt in ('-i', "--image"): uboot_bin_filename = arg
+ if opt in ('-e', "--elf"): uboot_elf_filename = arg
+
+ arg_verify(uboot_bin_filename, uboot_elf_filename, header_type)
+
+ uboot_img_size = os.path.getsize(uboot_bin_filename)
+ jump_address = elf_get_entry(uboot_elf_filename)
+ check_sum = calc_check_sum(uboot_bin_filename)
+
+ # Calculate header adresses depend on header type
+ if header_type == "v2":
+ image_copy_adr -= 0x4
+ uboot_img_size += 0x4
+ # we append image so we need to append checksum
+ jmpchk_sum = sum(jump_address.to_bytes(4, byteorder='big'))
+ check_sum = (check_sum + jmpchk_sum) & 0xFF
+ imade_jump_append = True
+ else:
+ imade_jump_append = False
+
+ # write header to file
+ with open(headerised_filename, "wb") as file:
+ file.write(arc_id.to_bytes(2, byteorder='little'))
+ file.write(uboot_img_size.to_bytes(4, byteorder='little'))
+ file.write(check_sum.to_bytes(1, byteorder='little'))
+ file.write(image_copy_adr.to_bytes(4, byteorder='little'))
+ file.write(magic1.to_bytes(5, byteorder='big'))
+ for i in range(16): file.write(0x00.to_bytes(1, byteorder='little'))
+ for byte in magic2: file.write(byte.to_bytes(36, byteorder='big'))
+ for i in range(224 - len(magic2) * 36):
+ file.write(0x00.to_bytes(1, byteorder='little'))
+ if imade_jump_append:
+ file.write(jump_address.to_bytes(4, byteorder='little'))
+
+ # append u-boot image to header
+ with open(headerised_filename, "ab") as fo:
+ with open(uboot_bin_filename,'rb') as fi:
+ fo.write(fi.read())
+
+ # calc u-boot headerised image CRC32 (will be used by uboot update
+ # command for check)
+ headerised_image_crc = ""
+ with open(headerised_filename, "rb") as fi:
+ headerised_image_crc = hex(zlib.crc32(fi.read()) & 0xffffffff)
+
+ load_addr = 0x81000000
+ crc_store_adr = load_addr - 0x8
+ crc_calc_adr = crc_store_adr - 0x4
+ load_size = os.path.getsize(headerised_filename)
+ crc_calc_cmd = \
+ "crc32 " + hex(load_addr) + " " + hex(load_size) + " " + hex(crc_calc_adr)
+ crc_check_cmd = \
+ "mw.l " + hex(crc_store_adr) + " " + headerised_image_crc + " && " + \
+ crc_calc_cmd + " && " + \
+ "cmp.l " + hex(crc_store_adr) + " " + hex(crc_calc_adr) + " 1"
+
+ # make errase size to be allighned by 64K
+ if load_size & 0xFFFF == 0:
+ errase_size = load_size
+ else:
+ errase_size = load_size - (load_size & 0xFFFF) + 0x10000
+
+ # Hack to handle n25*** flash protect ops weirdness:
+ # protect unlock return fail status is region is already unlock (entire or
+ # partially). Same for lock ops.
+ # As there is no possibility to check current flash status pretend
+ # unlock & lock always success.
+ sf_unlock_cmd = \
+ "if sf protect unlock 0x0 0x4000000 ; then true ; else true ; fi"
+ sf_lock_cmd = \
+ "if sf protect lock 0x0 0x4000000 ; then true ; else true ; fi"
+
+ # u-bood CMD to load u-bood with header to SPI flash
+ sf_load_image_cmd = \
+ "fatload mmc 0:1 " + hex(load_addr) + " " + headerised_filename + " && " + \
+ "sf probe 0:0 && " + \
+ sf_unlock_cmd + " && " + \
+ "sf erase " + hex(spi_flash_offset) + " " + hex(errase_size) + " && " + \
+ "sf write " + hex(load_addr) + " " + hex(spi_flash_offset) + " " + hex(load_size) + " && " + \
+ sf_lock_cmd
+
+ update_uboot_cmd = sf_load_image_cmd + " && echo \"u-boot update: OK\""
+
+ with open(uboot_scrypt_file, "wb") as fo:
+ fo.write(update_uboot_cmd.encode('ascii'))
+
+
+if __name__ == "__main__":
+ try:
+ main()
+ except Exception as err:
+ print(err)
+ sys.exit(2)