diff options
Diffstat (limited to 'roms/u-boot/board/synopsys/emsdp')
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/Kconfig | 12 | ||||
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/MAINTAINERS | 6 | ||||
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/Makefile | 7 | ||||
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/README | 83 | ||||
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/config.mk | 2 | ||||
| -rw-r--r-- | roms/u-boot/board/synopsys/emsdp/emsdp.c | 160 |
6 files changed, 270 insertions, 0 deletions
diff --git a/roms/u-boot/board/synopsys/emsdp/Kconfig b/roms/u-boot/board/synopsys/emsdp/Kconfig new file mode 100644 index 000000000..8228bb5c7 --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/Kconfig @@ -0,0 +1,12 @@ +if TARGET_EMSDP + +config SYS_BOARD + default "emsdp" + +config SYS_VENDOR + default "synopsys" + +config SYS_CONFIG_NAME + default "emsdp" + +endif diff --git a/roms/u-boot/board/synopsys/emsdp/MAINTAINERS b/roms/u-boot/board/synopsys/emsdp/MAINTAINERS new file mode 100644 index 000000000..640401395 --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/MAINTAINERS @@ -0,0 +1,6 @@ +EM DEVELOPMENT KIT BOARD +M: Alexey Brodkin <abrodkin@synopsys.com> +S: Maintained +F: arch/arc/dts/emsdp.dts +F: board/synopsys/emsdp/ +F: configs/emsdp_defconfig diff --git a/roms/u-boot/board/synopsys/emsdp/Makefile b/roms/u-boot/board/synopsys/emsdp/Makefile new file mode 100644 index 000000000..733a48c46 --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2018 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += emsdp.o diff --git a/roms/u-boot/board/synopsys/emsdp/README b/roms/u-boot/board/synopsys/emsdp/README new file mode 100644 index 000000000..036554c4d --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/README @@ -0,0 +1,83 @@ +================================================================================ +Useful notes on bulding and using of U-Boot on +ARC EM Software Development Platform (AKA EMSDP) +================================================================================ + + BOARD OVERVIEW + + The DesignWare ARC EM Software Development Platform is FPGA-bases platform + for rapid software development on the ARC EM family of processors. + + Since this board is based on FPGA it's possible to load and use different + versions of ARC EM CPUs. U-Boot is built to be run on the simplest + possible configuration which means the same one binary will work on more + advanced configurations as well. + + The board has the following features useful for U-Boot: + * On-board 2-channel FTDI TTL-to-USB converter + - The first channel is used for serial debug port (which makes it possible + to use a serial connection on pretty much any host machine be it + Windows, Linux or Mac). + On Linux machine typucally FTDI serial port would be /dev/ttyUSB0. + There's no HW flow-control and baud-rate is 115200. + + - The second channel is used for built-in Digilent USB JTAG probe. + That means no extra hardware is required to access ARC core from a + debugger on development host. Both proprietary MetaWare debugger and + open source OpenOCD + GDB client are supported. + + - Also with help of this FTDI chip it is possible to reset entire + board with help of a special `rff-ftdi-reset` utility, see: + https://github.com/foss-for-synopsys-dwc-arc-processors/rff-ftdi-reset + + * Micro SD-card slot + - U-Boot expects to see the very first partition on the card formatted as + FAT file-system and uses it for keeping its environment in `uboot.env` + file. Note uboot.env is not just a text file but it is auto-generated + file created by U-Boot on invocation of `saveenv` command. + It contains a checksum which makes this saved environment invalid in + case of maual modification. + + - There might be more useful files on that first FAT partition like + user applications, data files etc. + + * 256 KiB of "ROM" + - This so-called "ROM" is a part of FPGA image and even though it + might be unlocked for writes its initial content will be restored + on the next power-on. + + + BUILDING U-BOOT + + 1. Configure U-Boot: + ------------------------->8---------------------- + make emsdp_defconfig + ------------------------->8---------------------- + + 2. To build Elf file (for example to be used with host debugger via JTAG + connection to the target board): + ------------------------->8---------------------- + make mdbtrick + ------------------------->8---------------------- + + This will produce `u-boot` Elf file. + + 3. To build binary image to be put in "ROM": + ------------------------->8---------------------- + make u-boot.bin + ------------------------->8---------------------- + + + EXECUTING U-BOOT + + 1. The EMSDP board is supposed to auto-start U-Boot image stored in ROM on + power-on. For that make sure VCCIO DIP-switches are all in "off" state. + + 2. Though it is possible to load U-Boot as a simple Elf file via JTAG right + in "ROM" and start it from the debugger. One important note here we first + need to enable writes into "ROM" by writing 1 to 0xf0001000. + + 2.1. In case of proprietary MetaWare debugger run: + ------------------------->8---------------------- + mdb -digilent -OK -preloadexec="eval *(int*)0xf0001000=0" u-boot + ------------------------->8---------------------- diff --git a/roms/u-boot/board/synopsys/emsdp/config.mk b/roms/u-boot/board/synopsys/emsdp/config.mk new file mode 100644 index 000000000..5bd10442a --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/config.mk @@ -0,0 +1,2 @@ +PLATFORM_CPPFLAGS += -mcpu=arcem -mlittle-endian -mnorm -mswap -mmpy-option=3 \ + -mbarrel-shifter -mfpu=fpuda_all -mcode-density diff --git a/roms/u-boot/board/synopsys/emsdp/emsdp.c b/roms/u-boot/board/synopsys/emsdp/emsdp.c new file mode 100644 index 000000000..a3cee2341 --- /dev/null +++ b/roms/u-boot/board/synopsys/emsdp/emsdp.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Synopsys, Inc. All rights reserved. + */ + +#include <common.h> +#include <command.h> +#include <cpu_func.h> +#include <dwmmc.h> +#include <init.h> +#include <malloc.h> +#include <asm/global_data.h> +#include <linux/bitops.h> + +#include <asm/arcregs.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define ARC_PERIPHERAL_BASE 0xF0000000 + +#define CGU_ARC_FMEAS_ARC (void *)(ARC_PERIPHERAL_BASE + 0x84) +#define CGU_ARC_FMEAS_ARC_START BIT(31) +#define CGU_ARC_FMEAS_ARC_DONE BIT(30) +#define CGU_ARC_FMEAS_ARC_CNT_MASK GENMASK(14, 0) +#define CGU_ARC_FMEAS_ARC_RCNT_OFFSET 0 +#define CGU_ARC_FMEAS_ARC_FCNT_OFFSET 15 + +#define SDIO_BASE (void *)(ARC_PERIPHERAL_BASE + 0x10000) + +int mach_cpu_init(void) +{ + int rcnt, fcnt; + u32 data; + + /* Start frequency measurement */ + writel(CGU_ARC_FMEAS_ARC_START, CGU_ARC_FMEAS_ARC); + + /* Poll DONE bit */ + do { + data = readl(CGU_ARC_FMEAS_ARC); + } while (!(data & CGU_ARC_FMEAS_ARC_DONE)); + + /* Amount of reference 100 MHz clocks */ + rcnt = ((data >> CGU_ARC_FMEAS_ARC_RCNT_OFFSET) & + CGU_ARC_FMEAS_ARC_CNT_MASK); + + /* Amount of CPU clocks */ + fcnt = ((data >> CGU_ARC_FMEAS_ARC_FCNT_OFFSET) & + CGU_ARC_FMEAS_ARC_CNT_MASK); + + gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000; + + return 0; +} + +int board_early_init_r(void) +{ +#define EMSDP_PSRAM_BASE 0xf2001000 +#define PSRAM_FLASH_CONFIG_REG_0 (void *)(EMSDP_PSRAM_BASE + 0x10) +#define PSRAM_FLASH_CONFIG_REG_1 (void *)(EMSDP_PSRAM_BASE + 0x14) +#define CRE_ENABLE BIT(31) +#define CRE_DRIVE_CMD BIT(6) + +#define PSRAM_RCR_DPD BIT(1) +#define PSRAM_RCR_PAGE_MODE BIT(7) + +/* + * PSRAM_FLASH_CONFIG_REG_x[30:15] to the address lines[16:1] of flash, + * thus "<< 1". + */ +#define PSRAM_RCR_SETUP ((PSRAM_RCR_DPD | PSRAM_RCR_PAGE_MODE) << 1) + + // Switch PSRAM controller to command mode + writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_0); + // Program Refresh Configuration Register (RCR) for BANK0 + writew(0, (void *)(0x10000000 + PSRAM_RCR_SETUP)); + // Switch PSRAM controller back to memory mode + writel(0, PSRAM_FLASH_CONFIG_REG_0); + + + // Switch PSRAM controller to command mode + writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_1); + // Program Refresh Configuration Register (RCR) for BANK1 + writew(0, (void *)(0x10800000 + PSRAM_RCR_SETUP)); + // Switch PSRAM controller back to memory mode + writel(0, PSRAM_FLASH_CONFIG_REG_1); + + printf("PSRAM initialized.\n"); + + return 0; +} + +#define CREG_BASE 0xF0001000 +#define CREG_BOOT (void *)(CREG_BASE + 0x0FF0) +#define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0) +#define CREG_IP_VERSION (void *)(CREG_BASE + 0x0FF8) + +/* Bits in CREG_BOOT register */ +#define CREG_BOOT_WP_BIT BIT(8) + +void reset_cpu(void) +{ + writel(1, CREG_IP_SW_RESET); + while (1) + ; /* loop forever till reset */ +} + +static int do_emsdp_rom(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + u32 creg_boot = readl(CREG_BOOT); + + if (!strcmp(argv[1], "unlock")) + creg_boot &= ~CREG_BOOT_WP_BIT; + else if (!strcmp(argv[1], "lock")) + creg_boot |= CREG_BOOT_WP_BIT; + else + return CMD_RET_USAGE; + + writel(creg_boot, CREG_BOOT); + + return CMD_RET_SUCCESS; +} + +struct cmd_tbl cmd_emsdp[] = { + U_BOOT_CMD_MKENT(rom, 2, 0, do_emsdp_rom, "", ""), +}; + +static int do_emsdp(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct cmd_tbl *c; + + c = find_cmd_tbl(argv[1], cmd_emsdp, ARRAY_SIZE(cmd_emsdp)); + + /* Strip off leading 'emsdp' command */ + argc--; + argv++; + + if (c == NULL || argc > c->maxargs) + return CMD_RET_USAGE; + + return c->cmd(cmdtp, flag, argc, argv); +} + +U_BOOT_CMD( + emsdp, CONFIG_SYS_MAXARGS, 0, do_emsdp, + "Synopsys EMSDP specific commands", + "rom unlock - Unlock non-volatile memory for writing\n" + "emsdp rom lock - Lock non-volatile memory to prevent writing\n" +); + +int checkboard(void) +{ + int version = readl(CREG_IP_VERSION); + + printf("Board: ARC EM Software Development Platform v%d.%d\n", + (version >> 16) & 0xff, version & 0xff); + return 0; +}; |