diff options
Diffstat (limited to 'roms/u-boot/board/toradex/colibri-imx6ull')
5 files changed, 365 insertions, 0 deletions
diff --git a/roms/u-boot/board/toradex/colibri-imx6ull/Kconfig b/roms/u-boot/board/toradex/colibri-imx6ull/Kconfig new file mode 100644 index 000000000..3ce9885c1 --- /dev/null +++ b/roms/u-boot/board/toradex/colibri-imx6ull/Kconfig @@ -0,0 +1,29 @@ +if TARGET_COLIBRI_IMX6ULL + +config SYS_BOARD + default "colibri-imx6ull" + +config SYS_VENDOR + default "toradex" + +config SYS_CONFIG_NAME + default "colibri-imx6ull" + +config TDX_CFG_BLOCK + default y + +config TDX_HAVE_NAND + default y + +config TDX_CFG_BLOCK_OFFSET + default "2048" + +config TDX_CFG_BLOCK_OFFSET2 + default "133120" + +config TDX_CFG_BLOCK_2ND_ETHADDR + default y + +source "board/toradex/common/Kconfig" + +endif diff --git a/roms/u-boot/board/toradex/colibri-imx6ull/MAINTAINERS b/roms/u-boot/board/toradex/colibri-imx6ull/MAINTAINERS new file mode 100644 index 000000000..899b1ff55 --- /dev/null +++ b/roms/u-boot/board/toradex/colibri-imx6ull/MAINTAINERS @@ -0,0 +1,11 @@ +Colibri iMX6ULL +M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +W: http://developer.toradex.com/software/linux/linux-software +W: https://www.toradex.com/community +S: Maintained +F: arch/arm/dts/imx6ull-colibri.dts +F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi +F: arch/arm/dts/imx6ull-colibri.dtsi +F: board/toradex/colibri-imx6ull/ +F: configs/colibri-imx6ull_defconfig +F: include/configs/colibri-imx6ull.h diff --git a/roms/u-boot/board/toradex/colibri-imx6ull/Makefile b/roms/u-boot/board/toradex/colibri-imx6ull/Makefile new file mode 100644 index 000000000..f478e6804 --- /dev/null +++ b/roms/u-boot/board/toradex/colibri-imx6ull/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2018 Toradex AG + +obj-y := colibri-imx6ull.o diff --git a/roms/u-boot/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/roms/u-boot/board/toradex/colibri-imx6ull/colibri-imx6ull.c new file mode 100644 index 000000000..01f556159 --- /dev/null +++ b/roms/u-boot/board/toradex/colibri-imx6ull/colibri-imx6ull.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018-2019 Toradex AG + */ +#include <common.h> +#include <init.h> +#include <asm/global_data.h> +#include <linux/delay.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch-mx6/clock.h> +#include <asm/arch-mx6/imx-regs.h> +#include <asm/arch-mx6/mx6ull_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <dm.h> +#include <dm/platform_data/serial_mxc.h> +#include <env.h> +#include <fdt_support.h> +#include <imx_thermal.h> +#include <jffs2/load_kernel.h> +#include <linux/sizes.h> +#include <miiphy.h> +#include <mtd_node.h> +#include <netdev.h> + +#include "../common/tdx-common.h" +#include "../common/tdx-cfg-block.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \ + PAD_CTL_DSE_48ohm) + +#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040 + +#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) + +#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP) + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + + return 0; +} + +#ifdef CONFIG_NAND_MXS +static void setup_gpmi_nand(void) +{ + setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | + (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); +} +#endif /* CONFIG_NAND_MXS */ + +#ifdef CONFIG_DM_VIDEO +static iomux_v3_cfg_t const backlight_pads[] = { + /* Backlight On */ + MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* Backlight PWM<A> (multiplexed pin) */ + MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define GPIO_BL_ON IMX_GPIO_NR(1, 11) +#define GPIO_PWM_A IMX_GPIO_NR(4, 11) + +static int setup_lcd(void) +{ + imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); + + /* Set BL_ON */ + gpio_request(GPIO_BL_ON, "BL_ON"); + gpio_direction_output(GPIO_BL_ON, 1); + + /* Set PWM<A> to full brightness (assuming inversed polarity) */ + gpio_request(GPIO_PWM_A, "PWM<A>"); + gpio_direction_output(GPIO_PWM_A, 0); + + return 0; +} +#endif + +#ifdef CONFIG_FEC_MXC +static int setup_fec(void) +{ + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* provide the PHY clock from the i.MX 6 */ + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + + /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */ + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + + /* give new Ethernet PHY power save mode circuitry time to settle */ + mdelay(300); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + if (phydev->drv->config) + phydev->drv->config(phydev); + return 0; +} +#endif /* CONFIG_FEC_MXC */ + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + +#ifdef CONFIG_NAND_MXS + setup_gpmi_nand(); +#endif + return 0; +} + +#ifdef CONFIG_CMD_BMODE +/* TODO */ +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)}, + {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_TDX_CFG_BLOCK + /* + * If we have a valid config block and it says we are a module with + * Wi-Fi/Bluetooth make sure we use the -wifi device tree. + */ + if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT || + tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) + env_set("variant", "-wifi"); +#endif + + /* + * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the + * SOC to request for a lower voltage during sleep. This is necessary + * because the voltage is changing too slow for the SOC to wake up + * properly. + */ + __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR); + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + +#ifdef CONFIG_CMD_USB_SDP + if (is_boot_from_usb()) { + printf("Serial Downloader recovery mode, using sdp command\n"); + env_set("bootdelay", "0"); + env_set("bootcmd", "sdp 0"); + } +#endif /* CONFIG_CMD_USB_SDP */ + +#if defined(CONFIG_DM_VIDEO) + setup_lcd(); +#endif + + return 0; +} + +int checkboard(void) +{ + printf("Model: Toradex Colibri iMX6ULL\n"); + + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ +#if defined(CONFIG_FDT_FIXUP_PARTITIONS) + static struct node_info nodes[] = { + { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, }, + { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, + }; + + /* Update partition nodes using info from mtdparts env var */ + puts(" Updating MTD partitions...\n"); + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); +#endif + + return ft_common_board_setup(blob, bd); +} +#endif + +static struct mxc_serial_plat mxc_serial_plat = { + .reg = (struct mxc_uart *)UART1_BASE, + .use_dte = 1, +}; + +U_BOOT_DRVINFO(mxc_serial) = { + .name = "serial_mxc", + .plat = &mxc_serial_plat, +}; diff --git a/roms/u-boot/board/toradex/colibri-imx6ull/imximage.cfg b/roms/u-boot/board/toradex/colibri-imx6ull/imximage.cfg new file mode 100644 index 000000000..8d869d9f7 --- /dev/null +++ b/roms/u-boot/board/toradex/colibri-imx6ull/imximage.cfg @@ -0,0 +1,106 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright (C) 2018 Toradex AG + * + * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : nand + */ + +BOOT_FROM nand + +/* + * Secure boot support + */ +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +DATA 4 0x020E04B4 0x000C0000 +DATA 4 0x020E04AC 0x00000000 +DATA 4 0x020E027C 0x00000030 +DATA 4 0x020E0250 0x00000030 +DATA 4 0x020E024C 0x00000030 +DATA 4 0x020E0490 0x00000030 +DATA 4 0x020E0288 0x000C0030 +DATA 4 0x020E0270 0x00000000 +DATA 4 0x020E0260 0x00000030 +DATA 4 0x020E0264 0x00000030 +DATA 4 0x020E04A0 0x00000030 +DATA 4 0x020E0494 0x00020000 +DATA 4 0x020E0280 0x00000030 +DATA 4 0x020E0284 0x00000030 +DATA 4 0x020E04B0 0x00020000 +DATA 4 0x020E0498 0x00000030 +DATA 4 0x020E04A4 0x00000030 +DATA 4 0x020E0244 0x00000030 +DATA 4 0x020E0248 0x00000030 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B0800 0xA1390003 +DATA 4 0x021B080C 0x00000004 +DATA 4 0x021B083C 0x41640158 +DATA 4 0x021B0848 0x40403237 +DATA 4 0x021B0850 0x40403C33 +DATA 4 0x021B081C 0x33333333 +DATA 4 0x021B0820 0x33333333 +DATA 4 0x021B082C 0xf3333333 +DATA 4 0x021B0830 0xf3333333 +DATA 4 0x021B08C0 0x00944009 +DATA 4 0x021B08b8 0x00000800 +DATA 4 0x021B0004 0x0002002D +DATA 4 0x021B0008 0x1B333030 +DATA 4 0x021B000C 0x676B52F3 +DATA 4 0x021B0010 0xB66D0B63 +DATA 4 0x021B0014 0x01FF00DB +DATA 4 0x021B0018 0x00201740 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B002C 0x000026D2 +DATA 4 0x021B0030 0x006B1023 +DATA 4 0x021B0040 0x0000004F +DATA 4 0x021B0000 0x84180000 +DATA 4 0x021B0890 0x00400000 +DATA 4 0x021B001C 0x02008032 +DATA 4 0x021B001C 0x00008033 +DATA 4 0x021B001C 0x00048031 +DATA 4 0x021B001C 0x15208030 +DATA 4 0x021B001C 0x04008040 +DATA 4 0x021B0020 0x00000800 +DATA 4 0x021B0818 0x00000227 +DATA 4 0x021B0004 0x0002552D +DATA 4 0x021B0404 0x00011006 +DATA 4 0x021B001C 0x00000000 + |