diff options
Diffstat (limited to 'bsp/meta-freescale-3rdparty')
224 files changed, 13132 insertions, 12170 deletions
diff --git a/bsp/meta-freescale-3rdparty/.gitignore b/bsp/meta-freescale-3rdparty/.gitignore index b25c15b8..983cee9c 100644 --- a/bsp/meta-freescale-3rdparty/.gitignore +++ b/bsp/meta-freescale-3rdparty/.gitignore @@ -1 +1,5 @@ *~ +*.bak +*.orig +*.rej +*.swp diff --git a/bsp/meta-freescale-3rdparty/README b/bsp/meta-freescale-3rdparty/README index 2c59aa68..efd6a002 100644 --- a/bsp/meta-freescale-3rdparty/README +++ b/bsp/meta-freescale-3rdparty/README @@ -7,22 +7,28 @@ use with OpenEmbedded and/or Yocto Freescale's BSP layer. This layer depends on: URI: git://git.openembedded.org/openembedded-core -branch: sumo +branch: master revision: HEAD URI: git://git.yoctoproject.org/meta-freescale -branch: sumo +branch: master revision: HEAD Contributing ------------ -To contribute to this layer you should the patches for review to the -mailing list (meta-freescale@yoctoproject.org). +Please submit any patches against the `meta-freescale-3rdparty` layer by +using the GitHub pull-request feature. Fork the repo, make a branch, +do the work, rebase from upstream, create the pull request. -Please refer to: +For some useful guidelines to be followed when submitting patches, +please refer to: http://openembedded.org/wiki/Commit_Patch_Message_Guidelines +Pull requests will be discussed within the GitHub pull-request +infrastructure. If you want to get informed on new PRs and the +follow-up discussions please use GitHub's notification system. + Mailing list: https://lists.yoctoproject.org/listinfo/meta-freescale @@ -30,11 +36,3 @@ Mailing list: Source code: https://github.com/Freescale/meta-freescale-3rdparty - -When creating a patch of the last commit, use - - git format-patch -s --subject-prefix='3rdparty][PATCH][sumo' -1 - -To send it to the community, use - - git send-email --to meta-freescale@yoctoproject.org <generated patch> diff --git a/bsp/meta-freescale-3rdparty/conf/layer.conf b/bsp/meta-freescale-3rdparty/conf/layer.conf index 63fdea3d..1de1d658 100644 --- a/bsp/meta-freescale-3rdparty/conf/layer.conf +++ b/bsp/meta-freescale-3rdparty/conf/layer.conf @@ -5,9 +5,9 @@ BBPATH .= ":${LAYERDIR}" BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ ${LAYERDIR}/recipes-*/*/*.bbappend" -BBFILE_COLLECTIONS += "fsl-arm-extra" -BBFILE_PATTERN_fsl-arm-extra := "^${LAYERDIR}/" -BBFILE_PRIORITY_fsl-arm-extra = "4" +BBFILE_COLLECTIONS += "freescale-3rdparty" +BBFILE_PATTERN_freescale-3rdparty := "^${LAYERDIR}/" +BBFILE_PRIORITY_freescale-3rdparty = "4" -LAYERSERIES_COMPAT_fsl-arm-extra = "thud" -LAYERDEPENDS_fsl-arm-extra = "core freescale-layer" +LAYERSERIES_COMPAT_freescale-3rdparty = "zeus dunfell" +LAYERDEPENDS_freescale-3rdparty = "core freescale-layer" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/apalis-imx6.conf b/bsp/meta-freescale-3rdparty/conf/machine/apalis-imx6.conf index a9b9af0d..8125f61f 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/apalis-imx6.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/apalis-imx6.conf @@ -9,11 +9,9 @@ MACHINEOVERRIDES =. "mx6:mx6q:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc -PREFERRED_PROVIDER_virtual/kernel ??= "linux-toradex" -PREFERRED_PROVIDER_virtual/kernel_use-mainline-bsp ??= "linux-fslc" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ??= "linux-toradex" KERNEL_DEVICETREE += "imx6q-apalis-eval.dtb imx6q-apalis-ixora.dtb \ imx6q-apalis-ixora-v1.1.dtb" -KERNEL_DEVICETREE_use-mainline-bsp += "imx6q-apalis-ixora.dtb" KERNEL_IMAGETYPE = "zImage" # The kernel lives in a seperate FAT partition, don't deploy it in /boot/ RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" @@ -22,6 +20,7 @@ PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" PREFERRED_RPROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" SPL_BINARY = "SPL" # The SPL configures the DDR RAM depending on the module it runs on. Thus there @@ -33,6 +32,8 @@ UBOOT_ENTRYPOINT_use-mainline-bsp = "0x10008000" IMAGE_FSTYPES += "tar.xz" # wic support +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" WKS_FILE = "sdimage-bootpart.wks" MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g pci" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/cgtqmx6.conf b/bsp/meta-freescale-3rdparty/conf/machine/cgtqmx6.conf index 5be7971d..bce34b19 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/cgtqmx6.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/cgtqmx6.conf @@ -16,13 +16,13 @@ UBOOT_SUFFIX = "img" SPL_BINARY = "SPL" UBOOT_CONFIG ??= "cgtqmx6" UBOOT_CONFIG[cgtqmx6] = "cgtqmx6eval_defconfig" -WKS_FILE = "imx-uboot-spl-bootpart.wks" +WKS_FILE = "imx-uboot-spl-bootpart.wks.in" # Use linux kernel QMX6 PREFERRED_PROVIDER_virtual/kernel ??= "linux-congatec" KERNEL_DEVICETREE = "imx6q-qmx6.dtb imx6dl-qmx6.dtb" KERNEL_IMAGETYPE = "uImage" -SERIAL_CONSOLE = "115200 ttymxc1" +SERIAL_CONSOLES = "115200;ttymxc1" MACHINE_FEATURES += " pci" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/cm-fx6.conf b/bsp/meta-freescale-3rdparty/conf/machine/cm-fx6.conf deleted file mode 100644 index 81d1062e..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/cm-fx6.conf +++ /dev/null @@ -1,21 +0,0 @@ -#@TYPE: Machine -#@NAME: CompuLab CM-FX6 -#@SOC: i.MX6 Q/DL -#@DESCRIPTION: Machine configuration for CompuLab CM-FX6 machines -#@MAINTAINER: Valentin Raevsky <valentin@compulab.co.il> - -MACHINEOVERRIDES =. "mx6:mx6dl:mx6q:" - -require conf/machine/include/imx-base.inc -require conf/machine/include/tune-cortexa9.inc - -PREFERRED_PROVIDER_u-boot = "u-boot-compulab" -PREFERRED_PROVIDER_virtual/kernel = "linux-compulab" - -UBOOT_MACHINE ?= "cm_fx6_defconfig" - -KERNEL_DEVICETREE = "imx6dl-cm-fx6.dtb imx6dl-sbc-fx6.dtb imx6dl-sbc-fx6m.dtb imx6q-cm-fx6.dtb imx6q-sbc-fx6.dtb imx6q-sbc-fx6m.dtb" - -MACHINE_FEATURES += "pci wifi bluetooth alsa bluetooth serial usbhost wifi" - -SERIAL_CONSOLE = "115200 ttymxc3" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6.conf b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6.conf index 0c6d7ccf..45f4d9b2 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6.conf @@ -9,11 +9,10 @@ MACHINEOVERRIDES =. "mx6:mx6dl:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc -PREFERRED_PROVIDER_virtual/kernel ??= "linux-toradex" -PREFERRED_PROVIDER_virtual/kernel_use-mainline-bsp ??= "linux-fslc" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ??= "linux-toradex" KERNEL_DEVICETREE += "imx6dl-colibri-eval-v3.dtb imx6dl-colibri-cam-eval-v3.dtb \ imx6dl-colibri-aster.dtb" -KERNEL_DEVICETREE_use-mainline-bsp += "imx6dl-colibri-eval-v3.dtb" +KERNEL_DEVICETREE_use-mainline-bsp = "imx6dl-colibri-eval-v3.dtb" KERNEL_IMAGETYPE = "zImage" # The kernel lives in a seperate FAT partition, don't deploy it in /boot/ RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" @@ -22,6 +21,7 @@ PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" PREFERRED_RPROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" SPL_BINARY = "SPL" UBOOT_CONFIG ??= "spl" @@ -31,6 +31,8 @@ UBOOT_ENTRYPOINT_use-mainline-bsp = "0x10008000" IMAGE_FSTYPES += "tar.xz" # wic support +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" WKS_FILE = "sdimage-bootpart.wks" MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6ull.conf b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6ull.conf index a70dd421..1e1fd93c 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6ull.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx6ull.conf @@ -9,7 +9,7 @@ MACHINEOVERRIDES =. "mx6:mx6ul:mx6ull:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa7.inc -PREFERRED_PROVIDER_virtual/kernel ?= "linux-toradex" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ?= "linux-toradex" KERNEL_DEVICETREE += "imx6ull-colibri-eval-v3.dtb imx6ull-colibri-wifi-eval-v3.dtb" KERNEL_IMAGETYPE = "zImage" # The kernel lives in its own ubi volume. @@ -19,13 +19,16 @@ PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" PREFERRED_RPROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" UBOOT_BINARY = "u-boot-nand.imx" -UBOOT_MAKE_TARGET = "u-boot-nand.imx" +UBOOT_MAKE_TARGET = "u-boot.imx" UBOOT_MACHINE ?= "colibri-imx6ull_defconfig" IMAGE_FSTYPES += "tar.xz" # wic support +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" WKS_FILE = "sdimage-bootpart.wks" MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7-emmc.conf b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7-emmc.conf new file mode 100644 index 00000000..f67c41c3 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7-emmc.conf @@ -0,0 +1,30 @@ +#@TYPE: Machine +#@NAME: Toradex Colibri iMX7 Dual 1GB (eMMC) +#@SOC: i.MX 7Dual +#@DESCRIPTION: Machine configuration for Toradex Colibri iMX7 SOM (eMMC) +#@MAINTAINER: Stefan Agner <stefan.agner@toradex.com> + +MACHINEOVERRIDES =. "mx7:mx7d:" + +include conf/machine/include/imx-base.inc +include conf/machine/include/tune-cortexa7.inc + +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ??= "linux-toradex" + +KERNEL_DEVICETREE = "imx7d-colibri-emmc-eval-v3.dtb" +KERNEL_DEVICETREE_append_use-nxp-bsp = " imx7d-colibri-emmc-aster.dtb" + +# The kernel lives in a seperate FAT partition, don't deploy it in /boot/ +RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" + +PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" +PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" +PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" +UBOOT_MACHINE ?= "colibri_imx7_emmc_defconfig" + +IMAGE_FSTYPES += "tar.xz" +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" + +MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7.conf b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7-nand.conf index 2ad296b9..4ab7a95d 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/colibri-imx7-nand.conf @@ -1,18 +1,27 @@ #@TYPE: Machine -#@NAME: Toradex Colibri iMX7D/S +#@NAME: Toradex Colibri iMX7D/S (NAND) #@SOC: i.MX 7Dual / i.MX 7Solo -#@DESCRIPTION: Machine configuration for Toradex Colibri iMX7 SOM +#@DESCRIPTION: Machine configuration for Toradex Colibri iMX7 SOM (NAND) #@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com> -MACHINEOVERRIDES =. "mx7:mx7d:" +MACHINEOVERRIDES =. "mx7:mx7d:colibri-imx7:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa7.inc -PREFERRED_PROVIDER_virtual/kernel ?= "linux-toradex" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ??= "linux-toradex" + KERNEL_IMAGETYPE = "zImage" -KERNEL_DEVICETREE += "imx7d-colibri-eval-v3.dtb imx7s-colibri-eval-v3.dtb \ - imx7d-colibri-aster.dtb imx7s-colibri-aster.dtb" + +KERNEL_DEVICETREE = " \ + imx7d-colibri-eval-v3.dtb \ + imx7s-colibri-eval-v3.dtb \ +" + +KERNEL_DEVICETREE_append_use-nxp-bsp = " \ + imx7d-colibri-aster.dtb \ + imx7s-colibri-aster.dtb \ +" # U-Boot of our newer release read the Kernel and device tree from static UBI # volumes, hence no need to deploy the kernel binary in the image itself @@ -22,14 +31,17 @@ PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" PREFERRED_RPROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" # U-Boot NAND binary includes 0x400 padding required for NAND boot UBOOT_BINARY = "u-boot-nand.imx" -UBOOT_MAKE_TARGET = "u-boot-nand.imx" +UBOOT_MAKE_TARGET = "u-boot.imx" UBOOT_MACHINE ?= "colibri_imx7_defconfig" IMAGE_FSTYPES += "tar.xz" # wic support +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" WKS_FILE = "sdimage-bootpart.wks" # Enable free --space-fixup (-F) by default, this allows DFU updates @@ -37,6 +49,6 @@ MKUBIFS_ARGS = " -c 8112 -e 124KiB -m 2KiB -F" UBINIZE_ARGS = " -p 128KiB -m 2048 -s 2048" UBI_VOLNAME = "rootfs" -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/colibri-vf.conf b/bsp/meta-freescale-3rdparty/conf/machine/colibri-vf.conf index a03853d9..8c66ceda 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/colibri-vf.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/colibri-vf.conf @@ -9,10 +9,19 @@ MACHINEOVERRIDES =. "vf:vf50:vf60:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa5.inc -PREFERRED_PROVIDER_virtual/kernel ?= "linux-toradex" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp ??= "linux-toradex" + KERNEL_IMAGETYPE = "zImage" -KERNEL_DEVICETREE += "vf500-colibri-eval-v3.dtb vf610-colibri-eval-v3.dtb \ - vf500-colibri-aster.dtb vf610-colibri-aster.dtb" + +KERNEL_DEVICETREE = " \ + vf500-colibri-eval-v3.dtb \ + vf610-colibri-eval-v3.dtb \ +" + +KERNEL_DEVICETREE_append_use-nxp-bsp = " \ + vf500-colibri-aster.dtb \ + vf610-colibri-aster.dtb \ +" # U-Boot of our newer release read the Kernel and device tree from static UBI volumes, # hence no need to deploy the kernel binary in the image itself @@ -22,17 +31,21 @@ PREFERRED_PROVIDER_u-boot ?= "u-boot-toradex" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-toradex" PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" PREFERRED_RPROVIDER_u-boot-fw-utils ?= "u-boot-toradex-fw-utils" +PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex" PREFERRED_PROVIDER_virtual/kernel-module-mcc ?= "kernel-module-mcc-toradex" PREFERRED_PROVIDER_virtual/kernel-module-mcc-dev ?= "kernel-module-mcc-toradex" PREFERRED_VERSION_mqxboot ?= "1.%" +PREFERRED_VERSION_weston_use-nxp-bsp = "" # U-Boot NAND binary includes 0x400 padding required for NAND boot -UBOOT_BINARY ?= "u-boot-nand.imx" -UBOOT_MAKE_TARGET = "u-boot-nand.imx" +UBOOT_BINARY = "u-boot-nand.imx" +UBOOT_MAKE_TARGET = "u-boot.imx" UBOOT_MACHINE ?= "colibri_vf_defconfig" IMAGE_FSTYPES += "tar.xz ubifs" # wic support +IMAGE_BOOT_FILES_append = " boot.scr-${MACHINE};boot.scr" +WKS_FILE_DEPENDS_append = " u-boot-default-script" WKS_FILE = "sdimage-bootpart.wks" # Enable free --space-fixup (-F) by default, this allows DFU updates @@ -40,6 +53,6 @@ MKUBIFS_ARGS = " -c 8112 -e 124KiB -m 2KiB -F" UBINIZE_ARGS = " -p 128KiB -m 2048 -s 2048" UBI_VOLNAME = "rootfs" -SERIAL_CONSOLE = "115200 ttyLP0" +SERIAL_CONSOLES = "115200;ttyLP0" MACHINE_FEATURES += "usbgadget usbhost vfat alsa touchscreen" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/cubox-i.conf b/bsp/meta-freescale-3rdparty/conf/machine/cubox-i.conf index 4c9ae2e0..b4248157 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/cubox-i.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/cubox-i.conf @@ -23,7 +23,7 @@ UBOOT_CONFIG ??= "sd" UBOOT_CONFIG[sd] = "mx6cuboxi_defconfig,sdcard" UENV_FILENAME = "uEnv-${MACHINE}.txt" SPL_BINARY = "SPL" -WKS_FILES = "imx-uboot-spl.wks" +WKS_FILES = "imx-uboot-spl.wks.in" UBOOT_EXTLINUX = "1" UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}" @@ -34,7 +34,7 @@ KERNEL_DEVICETREE = "imx6dl-cubox-i.dtb imx6q-cubox-i.dtb imx6dl-hummingboard.dt MACHINE_FEATURES += "pci wifi bluetooth alsa irda serial usbhost" MACHINE_EXTRA_RRECOMMENDS += "bcm4330-nvram-config bcm4329-nvram-config" -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ kernel-image \ diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6dl-riotboard.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6dl-riotboard.conf index 157e2c96..e3e2f055 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6dl-riotboard.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6dl-riotboard.conf @@ -14,7 +14,7 @@ UBOOT_MACHINE = "riotboard_defconfig" PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc" KERNEL_DEVICETREE = "imx6dl-riotboard.dtb" -SERIAL_CONSOLE = "115200 ttymxc1" +SERIAL_CONSOLES = "115200;ttymxc1" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ kernel-image \ diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6q-dms-ba16.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6q-dms-ba16.conf index 2f837f6c..56065d9b 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6q-dms-ba16.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6q-dms-ba16.conf @@ -11,11 +11,11 @@ include conf/machine/include/tune-cortexa9.inc UBOOT_MACHINE = "dms-ba16_defconfig" -PREFERRED_PROVIDER_virtual/kernel = "linux-advantech" +PREFERRED_PROVIDER_virtual/kernel_use-nxp-bsp = "linux-advantech" PREFERRED_PROVIDER_kernel = "linux-advantech" KERNEL_DEVICETREE = "imx6q-dms-ba16.dtb" KERNEL_IMAGETYPE = "uImage" MACHINE_FEATURES += "pci" -SERIAL_CONSOLE = "115200 ttymxc3" +SERIAL_CONSOLES = "115200;ttymxc3" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-pico.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-pico.conf new file mode 100644 index 00000000..657299c0 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-pico.conf @@ -0,0 +1,50 @@ +#@TYPE: Machine +#@NAME: IMX6Q/DL-PICO +#@SOC: i.MX6QDL +#@DESCRIPTION: Machine configuration for IMX6QDL-PICO board. +#@MAINTAINER: Otavio Salvador otavio.salvador@ossystems.com.br + +MACHINEOVERRIDES =. "mx6:mx6dl:mx6q:" + +require conf/machine/include/imx-base.inc +require conf/machine/include/tune-cortexa9.inc + +IMX_DEFAULT_BSP = "mainline" + +SERIAL_CONSOLES = "115200;ttymxc4" + +SPL_BINARY = "SPL" +UBOOT_SUFFIX = "img" +UBOOT_MAKE_TARGET = "" + +UBOOT_EXTLINUX = "1" +UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}" +UBOOT_EXTLINUX_CONSOLE = "console=${console},${baudrate}" + +UBOOT_CONFIG ??= "generic" +UBOOT_CONFIG[generic] = "pico-imx6_defconfig" + +KERNEL_DEVICETREE = " \ + imx6dl-pico-dwarf.dtb \ + imx6dl-pico-hobbit.dtb \ + imx6dl-pico-nymph.dtb \ + imx6dl-pico-pi.dtb \ + imx6q-pico-dwarf.dtb \ + imx6q-pico-hobbit.dtb \ + imx6q-pico-nymph.dtb \ + imx6q-pico-pi.dtb \ +" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ + kernel-image \ + kernel-devicetree \ + u-boot-fslc \ +" + +MACHINE_EXTRA_RRECOMMENDS += " \ + bcm4339-nvram-config \ +" + +WKS_FILES ?= "imx-uboot-spl.wks.in" +WKS_FILE_DEPENDS ?= "" +IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-variscite-som.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-variscite-som.conf index 6b6d7b5b..467dba8b 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-variscite-som.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6qdl-variscite-som.conf @@ -11,7 +11,7 @@ require conf/machine/include/imx-base.inc require conf/machine/include/tune-cortexa9.inc PREFERRED_PROVIDER_virtual/kernel = "linux-variscite" -PREFERRED_PROVIDER_virtual/kernel_use-mainline-bsp ??= "linux-fslc" +PREFERRED_PROVIDER_virtual/kernel_use-mainline-bsp ??= "linux-fslc-lts-4.19" KERNEL_DEVICETREE = " \ imx6dl-var-som-cap.dtb \ @@ -34,7 +34,7 @@ KERNEL_IMAGETYPE = "uImage" UBOOT_SPL_BUILD = "yes" UBOOT_MAKE_TARGET = "all" UBOOT_SUFFIX = "img" -WKS_FILE = "imx-uboot-spl-bootpart.wks" +WKS_FILE = "imx-uboot-spl-bootpart.wks.in" PREFERRED_PROVIDER_virtual/bootloader = "u-boot-variscite" PREFERRED_PROVIDER_u-boot = "u-boot-variscite" @@ -52,7 +52,7 @@ UBI_VOLNAME = "rootfs" MKUBIFS_ARGS = " -m 2048 -e 124KiB -c 3965 -F " UBINIZE_ARGS = " -m 2048 -p 128KiB -s 2048 -O 2048 " -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" USE_VT = "0" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6qsabrelite.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6qsabrelite.conf deleted file mode 100644 index d5703670..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6qsabrelite.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Boundary Devices i.MX6Q SABRE Lite -#@SOC: i.MX6Q -#@DESCRIPTION: Machine configuration for Boundary Devices i.MX6Q SABRE Lite -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> - -# WARNING: This board now use the *same* code as Nitrogen6X and it -# boots from internal SPI NOR memory. If you did change it to boot -# from the MMC (SD3 or SD4) please check the Boundary's blog post -# at: http://boundarydevices.com/u-boot-on-i-mx6/#unbricking - -MACHINEOVERRIDES = "nitrogen6x:${MACHINE}" -include conf/machine/nitrogen6x.conf diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6sl-warp.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6sl-warp.conf index 5e0d19f7..398220f2 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6sl-warp.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6sl-warp.conf @@ -27,6 +27,8 @@ MACHINEOVERRIDES =. "mx6:mx6sl:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc +IMX_DEFAULT_BSP = "mainline" + # WaRP uses eMMC boot partition by default and the u-boot inside .sdcard image # does not override it. However, build u-boot binary anyway in order to provide # a binary to be used if an update is needed @@ -37,10 +39,9 @@ EXTRA_IMAGEDEPENDS += "u-boot" UBOOT_MACHINE ?= "warp_defconfig" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc-imx" KERNEL_DEVICETREE = "imx6sl-warp.dtb" -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_FEATURES += "wifi bluetooth serial" MACHINE_EXTRA_RRECOMMENDS += "bcm4330-nvram-config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-kontron.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-kontron.conf new file mode 100644 index 00000000..1a779a87 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-kontron.conf @@ -0,0 +1,62 @@ +#@TYPE: Machine +#@NAME: Kontron N63XX/N64XX SoM based boards +#@SOC: i.MX6UL/i.MX6ULL +#@DESCRIPTION: Machine configuration for Kontron N63XX/N64XX SoM based boards +#@MAINTAINER: Frieder Schrempf <frieder.schrempf@kontron.de> + +MACHINEOVERRIDES =. "mx6:mx6ul:" + +include conf/machine/include/imx-base.inc +include conf/machine/include/tune-cortexa7.inc + +IMX_DEFAULT_BSP = "mainline" + +PREFERRED_PROVIDER_virtual/kernel ?= "linux-kontron" +PREFERRED_PROVIDER_u-boot ?= "u-boot-kontron" +PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-kontron" + +KERNEL_CLASSES ?= " kernel-fitimage " +KERNEL_IMAGETYPES ?= "fitImage" +KERNEL_DEVICETREE = " \ + imx6ul-kontron-n6310-s.dtb \ + imx6ul-kontron-n6310-s-43.dtb \ + imx6ul-kontron-n6311-s.dtb \ + imx6ull-kontron-n6411-s.dtb \ +" + + +SERIAL_CONSOLES = "115200;ttymxc3" + +UBOOT_CONFIG = "kontron-mx6ul" +UBOOT_CONFIG[kontron-mx6ul] = "kontron_mx6ul_defconfig" + +SPL_BINARY = "SPL" +UBOOT_ENTRYPOINT = "0x81000000" +UBOOT_MAKE_TARGET = "u-boot.img SPL" +UBOOT_SUFFIX = "img" + +UBOOT_EXTLINUX ?= "1" +UBOOT_EXTLINUX_LABELS ?= "default" +UBOOT_EXTLINUX_KERNEL_IMAGE ?= "../fitImage" +UBOOT_EXTLINUX_FDTDIR ?= "" +UBOOT_EXTLINUX_KERNEL_ARGS ?= "rootwait" +UBOOT_EXTLINUX_TIMEOUT = "8" +UBOOT_EXTLINUX_LABELS = "kontron-n6310-s kontron-n6311-s kontron-n6310-s-43 kontron-n6411-s" +UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6310-s = "../fitImage#conf@imx6ul-kontron-n6310-s.dtb" +UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6311-s = "../fitImage#conf@imx6ul-kontron-n6311-s.dtb" +UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6310-s-43 = "../fitImage#conf@imx6ul-kontron-n6310-s-43.dtb" +UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6411-s = "../fitImage#conf@imx6ull-kontron-n6411-s.dtb" +UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6310-s = "Kontron N6310 S" +UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6311-s = "Kontron N6311 S" +UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6310-s-43 = "Kontron N6310 S 43" +UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6411-s = "Kontron N6411 S" +UBOOT_EXTLINUX_CONSOLE = "console=ttymxc3,115200" +UBOOT_EXTLINUX_ROOT = "root=/dev/mmcblk0p2" + +MACHINE_FEATURES = "usbhost vfat serial ext2 rtc usbgadget" +IMAGE_BOOT_FILES = " \ + extlinux.conf;extlinux/extlinux.conf \ + fitImage \ +" + +WKS_FILES ?= "imx-uboot-spl-bootpart.wks.in" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-pico.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-pico.conf index 3448318a..11ea23bd 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-pico.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx6ul-pico.conf @@ -4,14 +4,17 @@ #@DESCRIPTION: Machine configuration for IMX6UL-PICO board. #@MAINTAINER: Daiane Angolini <daiane.angolini@nxp.com> -MACHINEOVERRIDES =. "use-mainline-bsp:mx6:mx6ul:" +MACHINEOVERRIDES =. "mx6:mx6ul:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa7.inc -SERIAL_CONSOLE = "115200 ttymxc5" +IMX_DEFAULT_BSP = "mainline" + +SERIAL_CONSOLES = "115200;ttymxc5" KERNEL_DEVICETREE = " \ + imx6ul-pico-dwarf.dtb \ imx6ul-pico-hobbit.dtb \ imx6ul-pico-pi.dtb \ " @@ -20,7 +23,8 @@ SPL_BINARY = "SPL" UBOOT_SUFFIX = "img" UBOOT_MAKE_TARGET = "" -UBOOT_CONFIG ??= "hobbit pi generic" +UBOOT_CONFIG ??= "dwarf hobbit pi generic" +UBOOT_CONFIG[dwarf] = "pico-dwarf-imx6ul_defconfig" UBOOT_CONFIG[generic] = "pico-imx6ul_defconfig" UBOOT_CONFIG[hobbit] = "pico-hobbit-imx6ul_defconfig" UBOOT_CONFIG[pi] = "pico-pi-imx6ul_defconfig" @@ -37,6 +41,6 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ MACHINE_FEATURES += "wifi bluetooth" -WKS_FILES ?= "imx-uboot-spl.wks" +WKS_FILES ?= "imx-uboot-spl.wks.in" WKS_FILE_DEPENDS ?= "" -IMAGE_FSTYPES = "wic.xz ext4.gz" +IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx7d-pico.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx7d-pico.conf index 625b6002..701cd6b0 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx7d-pico.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx7d-pico.conf @@ -4,25 +4,30 @@ #@DESCRIPTION: Machine configuration for IMX7D-PICO board. #@MAINTAINER: Vanessa Maegima <vanessa.maegima@nxp.com> -MACHINEOVERRIDES =. "use-mainline-bsp:mx7:mx7d:" +MACHINEOVERRIDES =. "mx7:mx7d:" require conf/machine/include/imx-base.inc require conf/machine/include/tune-cortexa7.inc -SERIAL_CONSOLE = "115200 ttymxc4" +IMX_DEFAULT_BSP = "mainline" + +SERIAL_CONSOLES = "115200;ttymxc4" KERNEL_DEVICETREE = " \ + imx7d-pico-dwarf.dtb \ imx7d-pico-hobbit.dtb \ imx7d-pico-pi.dtb \ " SPL_BINARY = "SPL" -UBOOT_SUFFIX = "img" +UBOOT_BINARY = "u-boot-dtb.img" UBOOT_MAKE_TARGET = "" -UBOOT_CONFIG ??= "hobbit pi generic" +UBOOT_CONFIG ??= "dwarf hobbit nymph pi generic" +UBOOT_CONFIG[dwarf] = "pico-dwarf-imx7d_defconfig" UBOOT_CONFIG[generic] = "pico-imx7d_defconfig" UBOOT_CONFIG[hobbit] = "pico-hobbit-imx7d_defconfig" +UBOOT_CONFIG[nymph] = "pico-nymph-imx7d_defconfig" UBOOT_CONFIG[pi] = "pico-pi-imx7d_defconfig" UBOOT_EXTLINUX = "1" @@ -37,8 +42,9 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ MACHINE_EXTRA_RRECOMMENDS += " \ bcm4339-nvram-config \ + linux-firmware-ath10k \ " -WKS_FILES ?= "imx-uboot-spl.wks" +WKS_FILES ?= "imx-uboot-spl.wks.in" WKS_FILE_DEPENDS ?= "" -IMAGE_FSTYPES = "wic.xz ext4.gz" +IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/imx7s-warp.conf b/bsp/meta-freescale-3rdparty/conf/machine/imx7s-warp.conf index 7760c109..f76386be 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/imx7s-warp.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/imx7s-warp.conf @@ -4,15 +4,20 @@ #@DESCRIPTION: Machine configuration for i.MX7S WaRP board. #@MAINTAINER: Pierre-Jean Texier <texier.pj2@gmail.com> -MACHINEOVERRIDES =. "mx7:mx7d:use-mainline-bsp:" +MACHINEOVERRIDES =. "mx7:mx7d:" require conf/machine/include/imx-base.inc require conf/machine/include/tune-cortexa7.inc +IMX_DEFAULT_BSP = "mainline" + MACHINE_FEATURES += " wifi bluetooth" KERNEL_DEVICETREE = "imx7s-warp.dtb" +UBOOT_BINARY = "u-boot-dtb.imx" +UBOOT_MAKE_TARGET = "" + UBOOT_CONFIG ??= "sd" UBOOT_CONFIG[sd] = "warp7_defconfig,sdcard" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/ccimx6ulsbcexpress.conf b/bsp/meta-freescale-3rdparty/conf/machine/include/ccimx6ulsom.inc index 45508727..18ba7545 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/ccimx6ulsbcexpress.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/include/ccimx6ulsom.inc @@ -1,7 +1,7 @@ #@TYPE: Machine -#@NAME: ConnecCore 6UL SBC Express +#@NAME: ConnecCore 6UL SOM #@SOC: i.MX6UL -#@DESCRIPTION: Machine configuration for ConnectCore 6UL SBC Express board. +#@DESCRIPTION: Machine configuration for ConnectCore 6UL System-On-Module. #@MAINTAINER: Alex Gonzalez <alex.gonzalez@digi.com> MACHINEOVERRIDES =. "mx6:mx6ul:ccimx6ul:use-mainline-bsp:" @@ -21,6 +21,14 @@ UBOOT_CONFIG[ccimx6ulstarter] = "ccimx6ulstarter_defconfig" MACHINE_EXTRA_RDEPENDS += " \ mtd-utils-ubifs \ " + +MACHINE_FEATURES += " wifi bluetooth" + +MACHINE_EXTRA_RRECOMMENDS += " \ + ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'kernel-module-qca6564 linux-firmware-qca6564-wifi', '', d)} \ + ${@bb.utils.contains('MACHINE_FEATURES', 'bluetooth', 'linux-firmware-qca6564-bt', '', d)} \ +" + # mkfs.ubifs parameters for boot partition (the one holding kernel and device tree files) # Max LEB count (-c 255) calculated for a partition of up to 32 MiB considering 128 KiB erase-block size. MKUBIFS_BOOT_ARGS ?= "-m 2048 -e 126976 -c 255" @@ -32,7 +40,3 @@ MKUBIFS_ARGS ?= "-m 2048 -e 126976 -c 8191" IMAGE_CLASSES += "image_types_digi" # Overwrite the defaults in imx-base not to include wic images IMAGE_FSTYPES = "tar.bz2 ubifs boot.ubifs" - -SERIAL_CONSOLE = "115200 ttymxc4" - -KERNEL_DEVICETREE = "imx6ul-ccimx6ulsbcexpress.dtb" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/include/tx6-karo-common.inc b/bsp/meta-freescale-3rdparty/conf/machine/include/tx6-karo-common.inc deleted file mode 100644 index 83a7de6f..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/include/tx6-karo-common.inc +++ /dev/null @@ -1,18 +0,0 @@ -# Provides the Ka-Ro TX6 common settings - -require conf/machine/include/imx-base.inc -require conf/machine/include/tune-cortexa9.inc - -SERIAL_CONSOLE = "115200 ttymxc0" - -UBOOT_SUFFIX = "bin" -UBOOT_MAKE_TARGET = "u-boot.bin" -UBOOT_BINARY="u-boot.bin" - -PREFERRED_PROVIDER_u-boot = "u-boot-karo" -PREFERRED_PROVIDER_virtual/kernel = "linux-karo" -PREFERRED_VERSION_linux-karo ?= "3.16%" - -MACHINE_FIRMWARE_append_mx6 = " linux-firmware-ath6k" -MACHINE_FEATURES += " pci wifi bluetooth" -IMAGE_FSTYPES_remove = "sdcard" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/lx2160acex7.conf b/bsp/meta-freescale-3rdparty/conf/machine/lx2160acex7.conf new file mode 100644 index 00000000..4812f8ec --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/lx2160acex7.conf @@ -0,0 +1,49 @@ +#@TYPE: Machine +#@NAME: Solid-Run LX2160A-CEx7 +#@SOC: LSCH3 +#@DESCRIPTION: Machine configuration for running LX2160A-CEx7 in 64-bit mode + +require conf/machine/include/qoriq-arm64.inc +require conf/machine/include/arm/arch-arm64.inc + +MACHINEOVERRIDES =. "fsl-lsch3:lx2160a:" + +MACHINE_FEATURES += "optee" + +KERNEL_CLASSES = " kernel-fitimage " +KERNEL_IMAGETYPES = "fitImage" + +DTB_LOAD = "0x90000000" +UBOOT_ENTRYPOINT = "0x80080000" + +UBOOT_CONFIG ??= "tfa" +UBOOT_CONFIG[tfa] = "lx2160acex7_tfa_defconfig,,u-boot-dtb.bin" + +KERNEL_DEVICETREE_BASENAME ?= "fsl-lx2160a-cex7.dtb" +KERNEL_DEVICETREE ?= "freescale/${KERNEL_DEVICETREE_BASENAME}" +KERNEL_DEFCONFIG ?= "defconfig" + +SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1 115200;ttyAMA0" +SERIAL_CONSOLES_CHECK ?= "${SERIAL_CONSOLES}" + +#SERDES=8_5_2 # 8x10g +#SERDES=13_5_2 # dual 100g +#SERDES=20_5_2 # dual 40g +SERDES ?= "8_5_2" +SPEED ?= "2000_700_3200" + +RCWAUTO ?= "${SERDES}/${SPEED}" +BOOTTYPE="auto" + +EXTRA_IMAGEDEPENDS += "management-complex mc-utils rcw ls2-phy ddr-phy atf inphi" +USE_VT = "0" + +PREFERRED_PROVIDER_u-boot-default-script = "u-boot-script-qoriq" +PREFERRED_PROVIDER_virtual/kernel = "linux-fslc-qoriq" + +IMAGE_FSTYPES += "wic" +WKS_FILE = "lx2160acex7.wks.in" +WKS_FILE_DEPENDS_append = "\ + ${PREFERRED_PROVIDER_u-boot-default-script} \ +" +IMAGE_BOOT_FILES ?= "${KERNEL_IMAGETYPE} ${KERNEL_DEVICETREE_BASENAME} boot.scr-${MACHINE};boot.scr" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/m28evk.conf b/bsp/meta-freescale-3rdparty/conf/machine/m28evk.conf deleted file mode 100644 index d5d89862..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/m28evk.conf +++ /dev/null @@ -1,26 +0,0 @@ -#@TYPE: Machine -#@NAME: DENX M28 SoM Evaluation Kit -#@SOC: i.MX28 -#@DESCRIPTION: Machine configuration for DENX M28 SoM Evaluation Kit - -MACHINEOVERRIDES =. "mxs:mx28:" - -include conf/machine/include/imx-base.inc -include conf/machine/include/tune-arm926ejs.inc - -UBOOT_MACHINE = "m28evk_config" - -PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc" -KERNEL_IMAGETYPE = "uImage" -KERNEL_DEVICETREE = "imx28-m28evk.dtb" - -SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3" -IMAGE_FSTYPES ?= "tar.bz2 ext3 uboot.mxsboot-sdcard sdcard" - -SERIAL_CONSOLE = "115200 ttyAMA0" - -MACHINE_FEATURES = "usbgadget usbhost vfat alsa touchscreen" - -# Overrides due use of non-FSL kernel -PREFERRED_VERSION_imx-test = "00.00.00" -MACHINE_GSTREAMER_PLUGIN_m28evk = "" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/m53evk.conf b/bsp/meta-freescale-3rdparty/conf/machine/m53evk.conf deleted file mode 100644 index 4356d18d..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/m53evk.conf +++ /dev/null @@ -1,28 +0,0 @@ -#@TYPE: Machine -#@NAME: DENX M53 SoM Evaluation Kit -#@SOC: i.MX53 -#@DESCRIPTION: Machine configuration for DENX M53 SoM Evaluation Kit - -MACHINEOVERRIDES =. "mx5:mx53:" - -include conf/machine/include/imx-base.inc -include conf/machine/include/tune-cortexa8.inc - -UBOOT_MACHINE = "m53evk_config" - -PREFERRED_PROVIDER_virtual/kernel ?= "linux-denx" - -KERNEL_IMAGETYPE = "uImage" -KERNEL_DEVICETREE = "imx53-m53evk.dtb" - -SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3" -IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard" - -SERIAL_CONSOLE = "115200 ttymxc1" - -MACHINE_FEATURES = "usbgadget usbhost vfat alsa touchscreen" - -# Overrides due use of non-FSL kernel -PREFERRED_VERSION_imx-test = "00.00.00" -MACHINE_GSTREAMER_PLUGIN_m53evk = "" -XSERVER_DRIVER_m53evk = "xf86-video-fbdev" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6sx.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6sx.conf index 9aa43d46..3b629603 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6sx.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6sx.conf @@ -2,13 +2,15 @@ #@NAME: Boundary Devices Nitrogen6SX #@SOC: i.MX6SX #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6SX -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> MACHINEOVERRIDES =. "mx6:mx6sx:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc +IMX_DEFAULT_BSP = "nxp" + KERNEL_DEVICETREE = "imx6sx-nitrogen6sx.dtb" KERNEL_IMAGETYPE = "zImage" @@ -31,7 +33,7 @@ WKS_FILE_DEPENDS = " \ UBOOT_MACHINE ?= "nitrogen6sx_defconfig" -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx" MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x-lite.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x-lite.conf index 44cf5c26..406305bf 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x-lite.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x-lite.conf @@ -2,13 +2,15 @@ #@NAME: Boundary Devices Nitrogen6X Lite #@SOC: i.MX6S #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6X Lite -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> MACHINEOVERRIDES =. "mx6:mx6dl:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc +IMX_DEFAULT_BSP = "nxp" + KERNEL_DEVICETREE = "imx6dl-nit6xlite.dtb" KERNEL_IMAGETYPE = "zImage" @@ -31,7 +33,7 @@ WKS_FILE_DEPENDS = " \ UBOOT_MACHINE ?= "nit6xlite_defconfig" -SERIAL_CONSOLE = "115200 ttymxc1" +SERIAL_CONSOLES = "115200;ttymxc1" MACHINE_EXTRA_RRECOMMENDS += " bcm4330-nvram-config" MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x.conf index e777a14c..d3aa3514 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen6x.conf @@ -2,7 +2,7 @@ #@NAME: Boundary Devices Nitrogen6X #@SOC: i.MX6 Q/DL #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6X -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> # # Note that this machine configuration also supports the SABRE Lite # reference design and the Nitrogen6X-SOM. @@ -34,6 +34,8 @@ MACHINEOVERRIDES =. "mx6:mx6dl:mx6q:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc +IMX_DEFAULT_BSP = "nxp" + KERNEL_DEVICETREE = "imx6q-sabrelite.dtb \ imx6q-nitrogen6_max.dtb imx6qp-nitrogen6_max.dtb \ imx6q-nitrogen6x.dtb imx6dl-nitrogen6x.dtb \ @@ -65,7 +67,7 @@ WKS_FILE_DEPENDS = " \ UBOOT_MACHINE ?= "nitrogen6q_defconfig" -SERIAL_CONSOLE = "115200 ttymxc1" +SERIAL_CONSOLES = "115200;ttymxc1" MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen7.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen7.conf index 57160e08..b413212f 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen7.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen7.conf @@ -2,13 +2,15 @@ #@NAME: Boundary Devices Nitrogen7 #@SOC: i.MX7D #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen7 -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> MACHINEOVERRIDES =. "mx7:mx7d:" require conf/machine/include/imx-base.inc require conf/machine/include/tune-cortexa7.inc +IMX_DEFAULT_BSP = "nxp" + KERNEL_DEVICETREE = "imx7d-nitrogen7.dtb" KERNEL_IMAGETYPE = "zImage" @@ -31,7 +33,7 @@ WKS_FILE_DEPENDS = " \ UBOOT_MACHINE ?= "nitrogen7_defconfig" -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx" MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8m.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8m.conf index 9565209b..73507f23 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8m.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8m.conf @@ -2,17 +2,23 @@ #@NAME: Boundary Devices Nitrogen8M #@SOC: i.MX8 MQ #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8M -#@MAINTAINER: Ian Coolidge <ian@boundarydevices.com> +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> MACHINEOVERRIDES =. "mx8:mx8m:mx8mq:" require conf/machine/include/imx-base.inc -require conf/machine/include/arm/arch-arm64.inc +require conf/machine/include/tune-cortexa53.inc + +IMX_DEFAULT_BSP = "nxp" # Kernel configuration PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary" KERNEL_DEVICETREE = "freescale/imx8mq-nitrogen8m.dtb \ freescale/imx8mq-nitrogen8m-m4.dtb \ + freescale/imx8mq-nitrogen8m_som.dtb \ + freescale/imx8mq-nitrogen8m_som-m4.dtb \ + freescale/imx8mq-nitrogen8m-tc358743.dtb \ + freescale/imx8mq-nitrogen8m-edp.dtb \ " KERNEL_IMAGETYPE = "Image" RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" @@ -20,11 +26,24 @@ RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" # U-Boot configuration PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary" PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary" +PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary" SPL_BINARY = "spl/u-boot-spl.bin" UBOOT_DTB_NAME ?= "imx8mq-nitrogen8m.dtb" -UBOOT_MACHINE ?= "nitrogen8m_defconfig" UBOOT_MAKE_TARGET = "" UBOOT_SUFFIX = "bin" +UBOOT_CONFIG ??= "sd" +UBOOT_CONFIG[sd] = "nitrogen8m_defconfig,sdcard" + +IMAGE_BOOTLOADER = "imx-boot" + +IMXBOOT_TARGETS = "flash_evk" + +DDR_FIRMWARE_NAME = "\ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ +" # wic support WKS_FILE = "sdimage-bootpart.wks" @@ -37,6 +56,6 @@ WKS_FILE_DEPENDS_mx8 += " \ bmap-tools-native \ " -SERIAL_CONSOLE ?= "115200 ttymxc0" +SERIAL_CONSOLES ?= "115200;ttymxc0" MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mm.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mm.conf new file mode 100644 index 00000000..cf18e0a8 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mm.conf @@ -0,0 +1,65 @@ +#@TYPE: Machine +#@NAME: Boundary Devices Nitrogen8MM +#@SOC: i.MX8MM +#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8MM +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> + +MACHINEOVERRIDES =. "mx8:mx8m:mx8mm:" + +require conf/machine/include/imx-base.inc +require conf/machine/include/tune-cortexa53.inc + +IMX_DEFAULT_BSP = "nxp" + +# Kernel configuration +PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary" +KERNEL_DEVICETREE = "freescale/imx8mq-nitrogen8m.dtb \ + freescale/imx8mq-nitrogen8m-m4.dtb \ + freescale/imx8mm-nitrogen8mm.dtb \ + freescale/imx8mm-nitrogen8mm_som.dtb \ + freescale/imx8mm-nitrogen8mm_rev2.dtb \ + freescale/imx8mm-nitrogen8mm_rev2-m4.dtb \ + freescale/imx8mm-nitrogen8mm_som-m4.dtb \ + freescale/imx8mm-nitrogen8mm-m4.dtb \ + freescale/imx8mm-nitrogen8mm-tc358743.dtb \ +" +KERNEL_IMAGETYPE = "Image" +RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" + +# U-Boot configuration +PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary" +PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary" +PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary" +SPL_BINARY = "spl/u-boot-spl.bin" +UBOOT_DTB_NAME ?= "imx8mm-nitrogen8mm.dtb" +UBOOT_MAKE_TARGET = "" +UBOOT_SUFFIX = "bin" +UBOOT_CONFIG ??= "sd" +UBOOT_CONFIG[sd] = "nitrogen8mm_2g_defconfig,sdcard" + +IMAGE_BOOTLOADER = "imx-boot" + +IMXBOOT_TARGETS = "flash_evk" + +# Set DDR FIRMWARE +DDR_FIRMWARE_NAME = "\ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ +" + +# wic support +WKS_FILE = "sdimage-bootpart.wks" +IMAGE_BOOT_FILES_append = " \ + boot.scr-${MACHINE};boot.scr \ +" +WKS_FILE_DEPENDS_mx8 += " \ + u-boot-script-boundary \ + e2fsprogs-native \ + bmap-tools-native \ +" + +SERIAL_CONSOLES = "115200;ttymxc1" + +MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mn.conf b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mn.conf new file mode 100644 index 00000000..f3a595d7 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/conf/machine/nitrogen8mn.conf @@ -0,0 +1,60 @@ +#@TYPE: Machine +#@NAME: Boundary Devices Nitrogen8M Nano +#@SOC: i.MX8 Nano +#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8M Nano +#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com> + +MACHINEOVERRIDES =. "mx8:mx8m:mx8mn:" + +require conf/machine/include/imx-base.inc +require conf/machine/include/tune-cortexa53.inc + +IMX_DEFAULT_BSP = "nxp" + +# Kernel configuration +PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary" +KERNEL_DEVICETREE = "freescale/imx8mn-nitrogen8mn.dtb \ + freescale/imx8mn-nitrogen8mn_som.dtb \ + freescale/imx8mn-nitrogen8_nano.dtb \ +" + +KERNEL_IMAGETYPE = "Image" +KERNEL_DEFCONFIG = "boundary_defconfig" +RDEPENDS_${KERNEL_PACKAGE_NAME}-base = "" + +# U-Boot configuration +PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary" +PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary" +PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary" +SPL_BINARY = "spl/u-boot-spl.bin" +UBOOT_DTB_NAME ?= "imx8mn-nitrogen8_nano.dtb" +UBOOT_MAKE_TARGET = "" +UBOOT_SUFFIX = "bin" +UBOOT_CONFIG ??= "sd" +UBOOT_CONFIG[sd] = "nitrogen8_nano_8mn1gr0_defconfig,sdcard" + +IMAGE_BOOTLOADER = "imx-boot" + +IMXBOOT_TARGETS = "flash_evk" + +DDR_FIRMWARE_NAME = "\ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ +" + +# wic support +WKS_FILE = "sdimage-bootpart.wks" +IMAGE_BOOT_FILES_append = " \ + boot.scr-${MACHINE};boot.scr \ +" +WKS_FILE_DEPENDS_mx8 += " \ + u-boot-script-boundary \ + e2fsprogs-native \ + bmap-tools-native \ +" + +SERIAL_CONSOLES = "115200;ttymxc1" + +MACHINE_FEATURES += " pci wifi bluetooth" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/pcm052.conf b/bsp/meta-freescale-3rdparty/conf/machine/pcm052.conf deleted file mode 100644 index c1d017ad..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/pcm052.conf +++ /dev/null @@ -1,25 +0,0 @@ -#@TYPE: Machine -#@NAME: Phytec phyCORE Vybrid Development Kit -#@SOC: vf60 -#@DESCRIPTION: Machine configuration for Phytec phyCORE Vybrid Development Kit -#@MAINTAINER: Anthony Felice <tony.felice@timesys.com> - -MACHINEOVERRIDES =. "vf:vf60:" - -include conf/machine/include/imx-base.inc -include conf/machine/include/tune-cortexa5.inc - -PREFERRED_PROVIDER_virtual/kernel = "linux-timesys" -PREFERRED_PROVIDER_virtual/kernel-module-mcc ?= "kernel-module-mcc" -PREFERRED_PROVIDER_virtual/kernel-module-mcc-dev ?= "kernel-module-mcc" - -UBOOT_MACHINE = "pcm052_config" - -KERNEL_DEVICETREE = "vf610-pcm052.dtb" - -SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3" -IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard" - -SERIAL_CONSOLE = "115200 ttyLP1" - -MACHINE_FEATURES = "usbgadget usbhost vfat alsa touchscreen" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6q-10x0.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6q-10x0.conf deleted file mode 100644 index d2c65447..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6q-10x0.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6Q TX6Q Computer-On-Module -#@SOC: i.MX6Q -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6Q Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6q:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6q-tx6q-10x0.dtb" - -UBOOT_MACHINE = "tx6q-10x0_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6q-11x0.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6q-11x0.conf deleted file mode 100644 index 22cb6434..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6q-11x0.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6Q TX6Q Computer-On-Module -#@SOC: i.MX6Q -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6Q Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6q:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6q-tx6q-11x0.dtb" - -UBOOT_MACHINE = "tx6q-11x0_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8034.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8034.conf deleted file mode 100644 index c1d014c6..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8034.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6S TX6S Computer-On-Module -#@SOC: i.MX6S -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6S Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6dl:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6dl-tx6s-8034.dtb" - -UBOOT_MACHINE = "tx6s-8034_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8035.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8035.conf deleted file mode 100644 index 41465f25..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6s-8035.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6S TX6S Computer-On-Module -#@SOC: i.MX6S -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6S Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6dl:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6dl-tx6s-8035.dtb" - -UBOOT_MACHINE = "tx6s-80x0_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-8033.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6u-8033.conf deleted file mode 100644 index b3fcca2a..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-8033.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6DL TX6DL Computer-On-Module -#@SOC: i.MX6DL -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6DL Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6dl:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6dl-tx6u-8033.dtb" - -UBOOT_MACHINE = "tx6u-8033_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-80x0.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6u-80x0.conf deleted file mode 100644 index c9450635..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-80x0.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6DL TX6DL Computer-On-Module -#@SOC: i.MX6DL -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6DL Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6dl:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6dl-tx6u-80xx.dtb" - -UBOOT_MACHINE = "tx6u-80x0_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-81x0.conf b/bsp/meta-freescale-3rdparty/conf/machine/tx6u-81x0.conf deleted file mode 100644 index 6951abe5..00000000 --- a/bsp/meta-freescale-3rdparty/conf/machine/tx6u-81x0.conf +++ /dev/null @@ -1,13 +0,0 @@ -#@TYPE: Machine -#@NAME: Ka-Ro electronics i.MX6DL TX6DL Computer-On-Module -#@SOC: i.MX6DL -#@DESCRIPTION: Machine configuration for Ka-Ro electronics TX6DL Computer-On-Module -#@MAINTAINER: Oliver Wendt <ow@karo-electronics.com> - -MACHINEOVERRIDES =. "mx6:mx6dl:" - -require include/tx6-karo-common.inc - -KERNEL_DEVICETREE = "imx6dl-tx6u-81xx.dtb" - -UBOOT_MACHINE = "tx6u-81x0_config" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/ventana.conf b/bsp/meta-freescale-3rdparty/conf/machine/ventana.conf index f3e111db..7794c779 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/ventana.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/ventana.conf @@ -61,7 +61,7 @@ UBOOT_CONFIG ??= "std" UBOOT_CONFIG[std] = "gwventana_config" UBOOT_ENTRYPOINT_use-mainline-bsp = "0x10008000" -SERIAL_CONSOLE = "115200 ttymxc1" +SERIAL_CONSOLES = "115200;ttymxc1" # Override FS Type Creation IMAGE_FSTYPES = "tar.bz2 multiubi" diff --git a/bsp/meta-freescale-3rdparty/conf/machine/wandboard.conf b/bsp/meta-freescale-3rdparty/conf/machine/wandboard.conf index 50c19c8b..a32cb0b0 100644 --- a/bsp/meta-freescale-3rdparty/conf/machine/wandboard.conf +++ b/bsp/meta-freescale-3rdparty/conf/machine/wandboard.conf @@ -4,11 +4,13 @@ #@DESCRIPTION: Machine configuration for i.MX6 Wandboard QuadPlus/Quad/Dual/Solo #@MAINTAINER: Alfonso Tames <alfonso@tames.com> -MACHINEOVERRIDES =. "mx6:mx6dl:mx6q:use-mainline-bsp:" +MACHINEOVERRIDES =. "mx6:mx6dl:mx6q:" include conf/machine/include/imx-base.inc include conf/machine/include/tune-cortexa9.inc +IMX_DEFAULT_BSP = "mainline" + UBOOT_MAKE_TARGET = "" UBOOT_SUFFIX = "img" SPL_BINARY = "SPL" @@ -40,7 +42,7 @@ MACHINE_EXTRA_RRECOMMENDS += " \ bcm4330-nvram-config \ " -SERIAL_CONSOLE = "115200 ttymxc0" +SERIAL_CONSOLES = "115200;ttymxc0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ kernel-image \ @@ -48,4 +50,4 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ u-boot-fslc \ " -WKS_FILES = "imx-uboot-spl.wks" +WKS_FILES = "imx-uboot-spl.wks.in" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0001-plat-nxp-Add-lx2160acex7-module-support.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0001-plat-nxp-Add-lx2160acex7-module-support.patch new file mode 100644 index 00000000..429a679e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0001-plat-nxp-Add-lx2160acex7-module-support.patch @@ -0,0 +1,370 @@ +From 64bd53306e0301e707a52be9f4f7121c87cd6f7d Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:17:54 +0300 +Subject: [PATCH] plat/nxp: Add lx2160acex7 module support + +Adds SolidRun's LX2160A based SoC COM express type 7 module support. +The patch is based on LX2160ARDB board and modifies the support to two +SO-DIMMs DDR4 support on I2C address 0x50 and 0x52. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c | 77 ++++++++ + plat/nxp/soc-lx2160/lx2160acex7/platform.mk | 16 ++ + .../nxp/soc-lx2160/lx2160acex7/platform_def.h | 187 ++++++++++++++++++ + plat/nxp/soc-lx2160/lx2160acex7/policy.h | 40 ++++ + 4 files changed, 320 insertions(+) + create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c + create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/platform.mk + create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/platform_def.h + create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/policy.h + +diff --git a/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c b/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c +new file mode 100644 +index 00000000..d0bcdf46 +--- /dev/null ++++ b/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c +@@ -0,0 +1,77 @@ ++/* ++ * Copyright 2019 SolidRun ltd. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ * ++ * Author Rabeeh Khoury <rabeeh@solid-run.com> ++ */ ++ ++#include <platform_def.h> ++#include <stdint.h> ++#include <stdio.h> ++#include <stdlib.h> ++#include <stdbool.h> ++#include <debug.h> ++#include <errno.h> ++#include <utils.h> ++#include <string.h> ++#include <ddr.h> ++#include <i2c.h> ++ ++int ddr_board_options(struct ddr_info *priv) ++{ ++ struct memctl_opt *popts = &priv->opt; ++ ++ popts->vref_dimm = 0x24; /* range 1, 83.4% */ ++ popts->rtt_override = 0; ++ popts->rtt_park = 240; ++ popts->otf_burst_chop_en = 0; ++ popts->burst_length = DDR_BL8; ++ popts->trwt_override = 1; ++ popts->bstopre = 0; /* auto precharge */ ++ popts->addr_hash = 1; ++ popts->trwt = 0x3; ++ popts->twrt = 0x3; ++ popts->trrt = 0x3; ++ popts->twwt = 0x3; ++ popts->vref_phy = 0x60; /* 75% */ ++ popts->odt = 48; ++ popts->phy_tx_impedance = 48; ++ ++ return 0; ++} ++ ++long long _init_ddr(void) ++{ ++ int spd_addr[] = { 0x51, 0x53 }; ++ struct ddr_info info; ++ struct sysinfo sys; ++ long long dram_size; ++ ++ zeromem(&sys, sizeof(sys)); ++ get_clocks(&sys); ++ debug("platform clock %lu\n", sys.freq_platform); ++ debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); ++ debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); ++ ++ zeromem(&info, sizeof(info)); ++ ++ /* Set two DDRC. Unused DDRC will be removed automatically. */ ++ info.num_ctlrs = 2; ++ info.spd_addr = spd_addr; ++ info.ddr[0] = (void *)NXP_DDR_ADDR; ++ info.ddr[1] = (void *)NXP_DDR2_ADDR; ++ info.phy[0] = (void *)NXP_DDR_PHY1_ADDR; ++ info.phy[1] = (void *)NXP_DDR_PHY2_ADDR; ++ info.clk = get_ddr_freq(&sys, 0); ++ if (!info.clk) ++ info.clk = get_ddr_freq(&sys, 1); ++ info.dimm_on_ctlr = 1; ++ ++ dram_size = dram_init(&info); ++ ++ if (dram_size < 0) ++ ERROR("DDR init failed.\n"); ++ ++ return dram_size; ++} +diff --git a/plat/nxp/soc-lx2160/lx2160acex7/platform.mk b/plat/nxp/soc-lx2160/lx2160acex7/platform.mk +new file mode 100644 +index 00000000..490f82f8 +--- /dev/null ++++ b/plat/nxp/soc-lx2160/lx2160acex7/platform.mk +@@ -0,0 +1,16 @@ ++# ++# Copyright 2019 SolidRun ltd. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++# Author Rabeeh Khoury <rabeeh@solid-run.com> ++ ++# board-specific build parameters ++BOOT_MODE := flexspi_nor ++BOARD := acex7 ++ ++ # get SoC common build parameters ++include plat/nxp/soc-lx2160/soc.mk ++ ++BL2_SOURCES += ${BOARD_PATH}/ddr_init.c ++ +diff --git a/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h b/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h +new file mode 100644 +index 00000000..614f0342 +--- /dev/null ++++ b/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h +@@ -0,0 +1,187 @@ ++/* ++ * Copyright 2019 SolidRun ltd. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ * ++ * Author: Rabeeh Khoury <rabeeh@solid-run.com> ++ */ ++ ++#ifndef __PLATFORM_DEF_H__ ++#define __PLATFORM_DEF_H__ ++ ++#include <arch.h> ++/* Certain ARM files require defines from this file */ ++#include <tbbr_img_def.h> ++/* From ARM :-> Has some common defines ARM requires */ ++#include <common_def.h> ++/* Soc specific defines */ ++#include <soc.h> ++/* include the platform-level security policy */ ++#include <policy.h> ++ ++#if defined(IMAGE_BL2) ++#define SEC_MEM_NON_COHERENT ++#endif ++/* Special value used to verify platform parameters from BL2 to BL31 */ ++ ++/* TBD -- Check and get back if this value is same for all platforms */ ++#define LS_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL ++ ++/****************************************************************************** ++ * Board specific defines ++ *****************************************************************************/ ++ ++#define NXP_SYSCLK_FREQ 100000000 ++#define NXP_DDRCLK_FREQ 100000000 ++ ++/* UART related definition */ ++#define NXP_CONSOLE_ADDR NXP_UART_ADDR ++#define NXP_CONSOLE_BAUDRATE 115200 ++ ++#define NXP_SPD_EEPROM0 0x51 ++ ++#define DDRC_NUM_DIMM 1 ++#define CONFIG_DDR_ECC_EN ++#define CONFIG_DDR_ADDR_DEC /* enable address decoding feature */ ++ ++#define PLAT_DEF_DRAM0_SIZE 0x80000000 /* 2G */ ++ ++/* Board specific - size of QSPI Flash on board */ ++#if FLEXSPI_NOR_BOOT ++#define NXP_FLEXSPI_FLASH_SIZE 0x10000000 ++#endif ++/* TBD Put all memory specific defines here */ ++ ++/****************************************************************************** ++ * Required platform porting definitions common to all ARM standard platforms ++ *****************************************************************************/ ++ ++/* Size of cacheable stacks */ ++#if defined(IMAGE_BL2) ++#if defined(TRUSTED_BOARD_BOOT) ++#define PLATFORM_STACK_SIZE 0x2000 ++#else ++#define PLATFORM_STACK_SIZE 0x1000 ++#endif ++#elif defined(IMAGE_BL31) ++#define PLATFORM_STACK_SIZE 0x1000 ++#endif ++ ++#define FIRMWARE_WELCOME_STR_LS_BL2 "Welcome to LX2160 BL2 Phase\n" ++#define FIRMWARE_WELCOME_STR_LS_BL31 "Welcome to LX2160 BL31 Phase\n" ++ ++/* This is common for all platforms where ++ * 64K is reserved for Secure memory ++ */ ++/* 64M Secure Memory */ ++#define NXP_SECURE_DRAM_SIZE (64 * 1024 * 1024) ++ ++/* 2M Secure EL1 Payload Shared Memory */ ++#define NXP_SP_SHRD_DRAM_SIZE (2 * 1024 * 1024) ++ ++/* Non secure memory */ ++#define NXP_NS_DRAM_SIZE (NXP_DRAM0_SIZE - \ ++ (NXP_SECURE_DRAM_SIZE + NXP_SP_SHRD_DRAM_SIZE)) ++ ++#define NXP_NS_DRAM_ADDR NXP_DRAM0_ADDR ++ ++#ifdef TEST_BL31 ++#define NXP_SECURE_DRAM_ADDR 0 ++#else ++#define NXP_SECURE_DRAM_ADDR (NXP_NS_DRAM_ADDR + NXP_DRAM0_SIZE - \ ++ (NXP_SECURE_DRAM_SIZE + NXP_SP_SHRD_DRAM_SIZE)) ++#endif ++ ++#define NXP_SP_SHRD_DRAM_ADDR (NXP_NS_DRAM_ADDR + NXP_DRAM0_SIZE \ ++ - NXP_SP_SHRD_DRAM_SIZE) ++ ++#define BL2_BASE (NXP_OCRAM_ADDR + NXP_ROM_RSVD + CSF_HDR_SZ) ++#ifdef SD_BOOT ++#define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE - NXP_SD_BLOCK_BUF_SIZE) ++#else ++#define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) ++#endif ++#define BL2_TEXT_LIMIT (BL2_LIMIT) ++ ++/* 2 MB reserved in secure memory for DDR */ ++#define BL31_BASE NXP_SECURE_DRAM_ADDR ++#define BL31_SIZE (0x200000) ++#define BL31_LIMIT (BL31_BASE + BL31_SIZE) ++ ++/* Put BL32 in secure memory */ ++#define BL32_BASE (NXP_SECURE_DRAM_ADDR + BL31_SIZE) ++#define BL32_LIMIT (NXP_SECURE_DRAM_ADDR + \ ++ NXP_SECURE_DRAM_SIZE + NXP_SP_SHRD_DRAM_SIZE) ++ ++/* BL33 memory region */ ++/* Hardcoded based on current address in u-boot */ ++#define BL33_BASE 0x82000000 ++#define BL33_LIMIT (NXP_NS_DRAM_ADDR + NXP_NS_DRAM_SIZE) ++ ++/* SD block buffer */ ++#define NXP_SD_BLOCK_BUF_SIZE (0xC000) ++#define NXP_SD_BLOCK_BUF_ADDR (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE - NXP_SD_BLOCK_BUF_SIZE) ++ ++#define PHY_GEN2_FW_IMAGE_BUFFER (ULL(0x18000000) + CSF_HDR_SZ) ++ ++/* IO defines as needed by IO driver framework */ ++/* TBD Add how to reach these numbers */ ++#define MAX_IO_DEVICES 4 ++#define MAX_IO_BLOCK_DEVICES 1 ++#define MAX_IO_HANDLES 4 ++ ++ ++/* ++ * FIP image defines - Offset at which FIP Image would be present ++ * Image would include Bl31 , Bl33 and Bl32 (optional) ++ */ ++#ifdef POLICY_FUSE_PROVISION ++#define MAX_FIP_DEVICES 3 ++#define FUSE_BUF ULL(0x81000000) ++#define FUSE_SZ 0x80000 ++#endif ++ ++#ifndef MAX_FIP_DEVICES ++#define MAX_FIP_DEVICES 2 ++#endif ++ ++#define PLAT_FIP_OFFSET 0x100000 ++#define PLAT_FIP_MAX_SIZE 0x400000 ++ ++/* Check if this size can be determined from array size */ ++#if defined(IMAGE_BL2) ++#define MAX_MMAP_REGIONS 8 ++#define MAX_XLAT_TABLES 6 ++#elif defined(IMAGE_BL31) ++#define MAX_MMAP_REGIONS 9 ++#define MAX_XLAT_TABLES 9 ++#elif defined(IMAGE_BL32) ++#define MAX_MMAP_REGIONS 8 ++#define MAX_XLAT_TABLES 9 ++#endif ++ ++/******************************************************************************/ ++/* ++ * ID of the secure physical generic timer interrupt used by the BL32. ++ */ ++#define BL32_IRQ_SEC_PHY_TIMER 29 ++ ++#define BL31_WDOG_SEC 89 ++/* ++ * Define properties of Group 1 Secure and Group 0 interrupts as per GICv3 ++ * terminology. On a GICv2 system or mode, the lists will be merged and treated ++ * as Group 0 interrupts. ++ */ ++#define PLAT_LS_G1S_IRQ_PROPS(grp) \ ++ INTR_PROP_DESC(BL32_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, grp, \ ++ GIC_INTR_CFG_EDGE) ++ ++/* SGI 15 and Secure watchdog interrupts assigned to Group 0 */ ++#define PLAT_LS_G0_IRQ_PROPS(grp) \ ++ INTR_PROP_DESC(BL31_WDOG_SEC, GIC_HIGHEST_SEC_PRIORITY, grp, \ ++ GIC_INTR_CFG_EDGE), \ ++ INTR_PROP_DESC(15, GIC_HIGHEST_SEC_PRIORITY, grp, \ ++ GIC_INTR_CFG_LEVEL) ++ ++ ++#endif +diff --git a/plat/nxp/soc-lx2160/lx2160acex7/policy.h b/plat/nxp/soc-lx2160/lx2160acex7/policy.h +new file mode 100644 +index 00000000..deae979c +--- /dev/null ++++ b/plat/nxp/soc-lx2160/lx2160acex7/policy.h +@@ -0,0 +1,40 @@ ++/* ++ * Copyright 2019 SolidRun ltd. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ * ++ * Author : Rabeeh Khoury <rabeeh@solid-run.com> ++ */ ++ ++/*---------------------------------------------------------------------------*/ ++ ++#ifndef _POLICY_H ++#define _POLICY_H ++ ++ // the following defines affect the PLATFORM SECURITY POLICY ++ ++ // set this to 0x0 if the platform is not using/responding to ECC errors ++ // set this to 0x1 if ECC is being used (we have to do some init) ++#define POLICY_USING_ECC 0x0 ++ ++ // Set this to 0x0 to leave the default SMMU page size in sACR ++ // Set this to 0x1 to change the SMMU page size to 64K ++#define POLICY_SMMU_PAGESZ_64K 0x1 ++ ++/* ++ * POLICY_PERF_WRIOP = 0 : No Performance enhancement for WRIOP RN-I ++ * POLICY_PERF_WRIOP = 1 : No Performance enhancement for WRIOP RN-I = 7 ++ * POLICY_PERF_WRIOP = 2 : No Performance enhancement for WRIOP RN-I = 23 ++ */ ++#define POLICY_PERF_WRIOP 0 ++ ++ /* ++ * set this to '1' if the debug clocks need to remain enabled during ++ * system entry to low-power (LPM20) - this should only be necessary ++ * for testing and NEVER set for normal production ++ */ ++#define POLICY_DEBUG_ENABLE 0 ++ ++//----------------------------------------------------------------------------- ++ ++#endif // _POLICY_H +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0002-plat-nxp-lx2160a-auto-boot.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0002-plat-nxp-lx2160a-auto-boot.patch new file mode 100644 index 00000000..9a84b72a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf-lx2160acex7/0002-plat-nxp-lx2160a-auto-boot.patch @@ -0,0 +1,194 @@ +From b5401a18ad8ade8f12a12171169f99214c7126e3 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Tue, 24 Mar 2020 02:48:34 +0200 +Subject: [PATCH 2/2] plat/nxp: lx2160a auto boot + +This patch adds support to patch RCW that already has SD/eMMC/SPI boot +support embedded with conditional load and jump. +The idea is to look for SD/eMMC/SPI boot, and modify src/dst/size +address with the correct values; rather than adding blockread at the end +of RCW code. + +With this patch images are unified and can be used to boot from SD / +eMMC and SPI. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + plat/nxp/common/common.mk | 5 +++ + plat/nxp/tools/create_pbl.c | 79 ++++++++++++++++++++++++++++--------- + 2 files changed, 66 insertions(+), 18 deletions(-) + +diff --git a/plat/nxp/common/common.mk b/plat/nxp/common/common.mk +index a80990740..e7e5f3879 100644 +--- a/plat/nxp/common/common.mk ++++ b/plat/nxp/common/common.mk +@@ -148,6 +148,11 @@ BOOT_DEV_SOURCES = ${PLAT_DRIVERS_PATH}/sd/sd_mmc.c \ + else ifeq (${BOOT_MODE}, flexspi_nor) + $(eval $(call add_define,FLEXSPI_NOR_BOOT)) + BOOT_DEV_SOURCES = ${PLAT_DRIVERS_PATH}/flexspi/nor/flexspi_nor.c ++else ifeq (${BOOT_MODE}, auto) ++$(eval $(call add_define,FLEXSPI_NOR_BOOT)) ++BOOT_DEV_SOURCES = ${PLAT_DRIVERS_PATH}/flexspi/nor/flexspi_nor.c \ ++ ${PLAT_DRIVERS_PATH}/sd/sd_mmc.c \ ++ drivers/io/io_block.c + endif + + # DDR driver needs to be enabled by default +diff --git a/plat/nxp/tools/create_pbl.c b/plat/nxp/tools/create_pbl.c +index 5a08472be..7ee085757 100644 +--- a/plat/nxp/tools/create_pbl.c ++++ b/plat/nxp/tools/create_pbl.c +@@ -67,6 +67,7 @@ typedef enum { + FLXSPI_NOR_BOOT, + FLXSPI_NAND_BOOT, + FLXSPI_NAND4K_BOOT, ++ AUTO_BOOT, + MAX_BOOT /* must be last item in list */ + } boot_src_t; + +@@ -194,7 +195,7 @@ struct pbl_image { + #define SOC_LS2088 2088 + #define SOC_LX2160 2160 + +-static uint32_t pbl_size; ++static uint32_t pbl_size = 0; + bool sb_flag = false; + + /*************************************************************************** +@@ -503,7 +504,6 @@ int add_boot_ptr_cmd(FILE *fp_rcw_pbi_op) + goto bootptr_err; + } + } +- + printf("\nBoot Location Pointer= %x\n", BYTE_SWAP_32(pblimg.ep)); + ret = SUCCESS; + +@@ -697,6 +697,8 @@ int main(int argc, char **argv) + int ret = FAILURE; + bool bootptr_flag = false; + enum stop_command flag_stop_cmd = CRC_STOP_COMMAND;; ++ int skip = 0; ++ uint32_t saved_src; + + /* Initializing the global structure to zero. */ + memset(&pblimg, 0x0, sizeof(struct pbl_image)); +@@ -797,6 +799,8 @@ int main(int argc, char **argv) + pblimg.boot_src = FLXSPI_NAND_BOOT; + else if (!strcmp(optarg, "flexspi_nand2k")) + pblimg.boot_src = FLXSPI_NAND4K_BOOT; ++ else if (!strcmp(optarg, "auto")) ++ pblimg.boot_src = AUTO_BOOT; + else { + printf("CMD Error: Invalid boot source.\n"); + goto exit_main; +@@ -902,13 +906,14 @@ int main(int argc, char **argv) + printf("%s: Error reading PBI Cmd.\n", __func__); + goto exit_main; + } +- while (word != 0x808f0000 && word != 0x80ff0000) { ++ saved_src = pblimg.src_addr; ++ while (word != 0x808f0000 && word != 0x80ff0000) { + pbl_size++; + /* 11th words in RCW has PBL length. Update it + * with new length. 2 comamnds get added + * Block copy + CCSR Write/CSF header write + */ +- if (pbl_size == 11) { ++ if ((pbl_size == 11) && (pblimg.boot_src != AUTO_BOOT)) { + word_1 = (word & PBI_LEN_MASK) + + (PBI_LEN_ADD << 20); + word = word & ~PBI_LEN_MASK; +@@ -923,8 +928,44 @@ int main(int argc, char **argv) + goto exit_main; + } + } +- if (fwrite(&word, sizeof(word), NUM_MEM_BLOCK, +- fp_rcw_pbi_op) != NUM_MEM_BLOCK) { ++ if (pblimg.boot_src == AUTO_BOOT) { ++ if (word == 0x80000008) { ++ printf ("Found SD boot at %d\n",pbl_size); ++ pblimg.boot_src = SD_BOOT; ++ add_blk_cpy_cmd(fp_rcw_pbi_op, args); ++ pblimg.boot_src = AUTO_BOOT; ++ pblimg.src_addr = saved_src; ++ if (bootptr_flag == true) { ++ add_boot_ptr_cmd(fp_rcw_pbi_op); ++ skip = 6; ++ } else skip=4; ++ } ++ if (word == 0x80000009) { ++ printf ("Found eMMC boot at %d\n",pbl_size); ++ pblimg.boot_src = EMMC_BOOT; ++ add_blk_cpy_cmd(fp_rcw_pbi_op, args); ++ pblimg.boot_src = AUTO_BOOT; ++ pblimg.src_addr = saved_src; ++ if (bootptr_flag == true) { ++ add_boot_ptr_cmd(fp_rcw_pbi_op); ++ skip = 6; ++ } else skip=4; ++ } ++ if (word == 0x8000000f) { ++ printf ("Found SPI boot at %d\n",pbl_size); ++ pblimg.boot_src = FLXSPI_NOR_BOOT; ++ add_blk_cpy_cmd(fp_rcw_pbi_op, args); ++ pblimg.boot_src = AUTO_BOOT; ++ pblimg.src_addr = saved_src; ++ if (bootptr_flag == true) { ++ add_boot_ptr_cmd(fp_rcw_pbi_op); ++ skip = 6; ++ } else skip=4; ++ } ++ } ++ if (!skip && ++ (fwrite(&word, sizeof(word), NUM_MEM_BLOCK, ++ fp_rcw_pbi_op) != NUM_MEM_BLOCK)) { + printf("%s: [CH3] Error in Writing PBI Words\n", + __func__); + goto exit_main; +@@ -941,8 +982,9 @@ int main(int argc, char **argv) + } else if (word == STOP_CMD_ARM_CH3){ + flag_stop_cmd = STOP_COMMAND; + } ++ if (skip) skip--; + } +- if (bootptr_flag == true) { ++ if ((pblimg.boot_src != AUTO_BOOT) && (bootptr_flag == true)) { + /* Add command to set boot_loc ptr */ + ret = add_boot_ptr_cmd(fp_rcw_pbi_op); + if (ret != SUCCESS) { +@@ -953,18 +995,19 @@ int main(int argc, char **argv) + } + + /* Write acs write commands to output file */ +- ret = add_blk_cpy_cmd(fp_rcw_pbi_op, args); +- if (ret != SUCCESS) { +- printf("%s: Function add_blk_cpy_cmd return failure.\n", +- __func__); +- goto exit_main; +- } +- ++ if (pblimg.boot_src != AUTO_BOOT) { ++ ret = add_blk_cpy_cmd(fp_rcw_pbi_op, args); ++ if (ret != SUCCESS) { ++ printf("%s: Function add_blk_cpy_cmd return failure.\n", ++ __func__); ++ goto exit_main; ++ } ++ } + /* Add stop command after adding pbi commands */ +- ret = add_pbi_stop_cmd(fp_rcw_pbi_op, flag_stop_cmd); +- if (ret != SUCCESS) { +- goto exit_main; +- } ++ ret = add_pbi_stop_cmd(fp_rcw_pbi_op, flag_stop_cmd); ++ if (ret != SUCCESS) { ++ goto exit_main; ++ } + + break; + +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf_git.bbappend b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf_git.bbappend new file mode 100644 index 00000000..9f3171da --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/atf/atf_git.bbappend @@ -0,0 +1,6 @@ +FILESEXTRAPATHS_append_lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:" + +SRC_URI_append_lx2160acex7 = "\ + file://0001-plat-nxp-Add-lx2160acex7-module-support.patch \ + file://0002-plat-nxp-lx2160a-auto-boot.patch \ +" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/bcm4339-nvram-config.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/bcm4339-nvram-config.bb index bfd5ecf0..d87a2fd1 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/bcm4339-nvram-config.bb +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/bcm4339-nvram-config.bb @@ -5,4 +5,4 @@ include broadcom-nvram-config.inc CHIP_MODEL = "4339" -COMPATIBLE_MACHINE = "(imx7d-pico)" +COMPATIBLE_MACHINE = "(imx7d-pico|imx6ul-pico|imx6qdl-pico)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6qdl-pico/brcmfmac4339-sdio.txt b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6qdl-pico/brcmfmac4339-sdio.txt new file mode 100644 index 00000000..1ddd9295 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6qdl-pico/brcmfmac4339-sdio.txt @@ -0,0 +1,99 @@ +#AP6335_NVRAM_V1.5_03112014 +NVRAMRev=$Rev: 410316 $ +sromrev=11 +boardrev=0x1203 +boardtype=0x06c5 +boardflags=0x00000c01 +boardflags2=0x00002000 +boardflags3=0x101188 +macaddr=00:90:4c:c5:12:38 +ccode=0 +regrev=0 +antswitch=0 +pdgain2g=7 +pdgain5g=7 +tworangetssi2g=0 +tworangetssi5g=0 +femctrl=7 +pcieingress_war=15 +vendid=0x14e4 +devid=0x43ae +manfid=0x2d0 +nocrc=1 +otpimagesize=502 +xtalfreq=37400 +extpagain2g=2 +pdetrange2g=2 +extpagain5g=2 +pdetrange5g=2 +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=7 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=11 +rxgains5gtrelnabypa0=0 +rxchain=1 +txchain=1 +aa2g=1 +aa5g=1 +tssipos5g=0 +tssipos2g=0 +pa2ga0=-161,6269,-723 +pa2gccka0=-116,7568,-852 +pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pdoffset40ma0=0 +pdoffset80ma0=0 +pdoffsetcckma0=0 +maxp2ga0=75 +maxp5ga0=64,64,72,72 +cckbw202gpo=0x0000 +cckbw20ul2gpo=0x0 +mcsbw202gpo=0x99445533 +mcsbw402gpo=0x99775533 +dot11agofdmhrbw202gpo=0x2233 +ofdmlrbw202gpo=0x0000 +tssifloor2g=500 +mcsbw205glpo=0x66333330 +mcsbw405glpo=0x66665530 +mcsbw805glpo=0xAA555530 +mcsbw1605glpo=0x99555530 +mcsbw205gmpo=0x99BB5530 +mcsbw405gmpo=0x99BB5530 +mcsbw805gmpo=0xEE555530 +mcsbw1605gmpo=0x99555530 +mcsbw205ghpo=0x99995530 +mcsbw405ghpo=0x99BB5530 +mcsbw805ghpo=0xEE555530 +mcsbw1605ghpo=0x99555530 +mcslr5glpo=0x0000 +mcslr5gmpo=0x0000 +mcslr5ghpo=0x0000 +sb20in40hrrpo=0x0 +sb20in80and160hr5glpo=0x0 +sb40and80hr5glpo=0x0 +sb20in80and160hr5gmpo=0x0 +sb40and80hr5gmpo=0x0 +sb20in80and160hr5ghpo=0x0 +sb40and80hr5ghpo=0x0 +sb20in40lrpo=0x0 +sb20in80and160lr5glpo=0x0 +sb40and80lr5glpo=0x0 +sb20in80and160lr5gmpo=0x0 +sb40and80lr5gmpo=0x0 +sb20in80and160lr5ghpo=0x0 +sb40and80lr5ghpo=0x0 +dot11agduphrpo=0x0 +dot11agduplrpo=0x0 +phycal_tempdelta=25 +cckdigfilttype=2 +pacalidx2g=65 +dacrate2g=160 +swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038 +swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +rssicorrnorm_c0=3,3 +rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2 +muxenab=0x10 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6ul-pico/brcmfmac4339-sdio.txt b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6ul-pico/brcmfmac4339-sdio.txt new file mode 100644 index 00000000..1ddd9295 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/broadcom-nvram-config/files/imx6ul-pico/brcmfmac4339-sdio.txt @@ -0,0 +1,99 @@ +#AP6335_NVRAM_V1.5_03112014 +NVRAMRev=$Rev: 410316 $ +sromrev=11 +boardrev=0x1203 +boardtype=0x06c5 +boardflags=0x00000c01 +boardflags2=0x00002000 +boardflags3=0x101188 +macaddr=00:90:4c:c5:12:38 +ccode=0 +regrev=0 +antswitch=0 +pdgain2g=7 +pdgain5g=7 +tworangetssi2g=0 +tworangetssi5g=0 +femctrl=7 +pcieingress_war=15 +vendid=0x14e4 +devid=0x43ae +manfid=0x2d0 +nocrc=1 +otpimagesize=502 +xtalfreq=37400 +extpagain2g=2 +pdetrange2g=2 +extpagain5g=2 +pdetrange5g=2 +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=7 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=11 +rxgains5gtrelnabypa0=0 +rxchain=1 +txchain=1 +aa2g=1 +aa5g=1 +tssipos5g=0 +tssipos2g=0 +pa2ga0=-161,6269,-723 +pa2gccka0=-116,7568,-852 +pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pdoffset40ma0=0 +pdoffset80ma0=0 +pdoffsetcckma0=0 +maxp2ga0=75 +maxp5ga0=64,64,72,72 +cckbw202gpo=0x0000 +cckbw20ul2gpo=0x0 +mcsbw202gpo=0x99445533 +mcsbw402gpo=0x99775533 +dot11agofdmhrbw202gpo=0x2233 +ofdmlrbw202gpo=0x0000 +tssifloor2g=500 +mcsbw205glpo=0x66333330 +mcsbw405glpo=0x66665530 +mcsbw805glpo=0xAA555530 +mcsbw1605glpo=0x99555530 +mcsbw205gmpo=0x99BB5530 +mcsbw405gmpo=0x99BB5530 +mcsbw805gmpo=0xEE555530 +mcsbw1605gmpo=0x99555530 +mcsbw205ghpo=0x99995530 +mcsbw405ghpo=0x99BB5530 +mcsbw805ghpo=0xEE555530 +mcsbw1605ghpo=0x99555530 +mcslr5glpo=0x0000 +mcslr5gmpo=0x0000 +mcslr5ghpo=0x0000 +sb20in40hrrpo=0x0 +sb20in80and160hr5glpo=0x0 +sb40and80hr5glpo=0x0 +sb20in80and160hr5gmpo=0x0 +sb40and80hr5gmpo=0x0 +sb20in80and160hr5ghpo=0x0 +sb40and80hr5ghpo=0x0 +sb20in40lrpo=0x0 +sb20in80and160lr5glpo=0x0 +sb40and80lr5glpo=0x0 +sb20in80and160lr5gmpo=0x0 +sb40and80lr5gmpo=0x0 +sb20in80and160lr5ghpo=0x0 +sb40and80lr5ghpo=0x0 +dot11agduphrpo=0x0 +dot11agduplrpo=0x0 +phycal_tempdelta=25 +cckdigfilttype=2 +pacalidx2g=65 +dacrate2g=160 +swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038 +swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +rssicorrnorm_c0=3,3 +rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2 +muxenab=0x10 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/imx-atf/imx-atf-boundary_2.3.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/imx-atf/imx-atf-boundary_2.3.bb new file mode 100644 index 00000000..93662466 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/imx-atf/imx-atf-boundary_2.3.bb @@ -0,0 +1,56 @@ +# Copyright (C) 2017-2019 NXP + +DESCRIPTION = "i.MX ARM Trusted Firmware" +SECTION = "BSP" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/BSD-3-Clause;md5=550794465ba0ec5312d6919e203a55f9" + +PROVIDES = "imx-atf" + +PV .= "+git${SRCPV}" + +SRCBRANCH = "boundary-imx_4.14.98_2.3.0" +SRC_URI = "git://github.com/boundarydevices/imx-atf.git;branch=${SRCBRANCH} \ +" +SRCREV = "99e07a29006b35e5b76e3a2555c54575f3b63d0c" + +S = "${WORKDIR}/git" + +inherit deploy + +BOOT_TOOLS = "imx-boot-tools" + +PLATFORM ?= "INVALID" +PLATFORM_mx8mq = "imx8mq" +PLATFORM_mx8mm = "imx8mm" +PLATFORM_mx8mn = "imx8mn" + +EXTRA_OEMAKE += " \ + CROSS_COMPILE="${TARGET_PREFIX}" \ + PLAT=${PLATFORM} \ +" + +BUILD_OPTEE = "${@bb.utils.contains('MACHINE_FEATURES', 'optee', 'true', 'false', d)}" + +do_compile() { + # Clear LDFLAGS to avoid the option -Wl recognize issue + unset LDFLAGS + oe_runmake bl31 + if ${BUILD_OPTEE}; then + oe_runmake clean BUILD_BASE=build-optee + oe_runmake BUILD_BASE=build-optee SPD=opteed bl31 + fi +} + +do_install[noexec] = "1" + +do_deploy() { + install -Dm 0644 ${S}/build/${PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${PLATFORM}.bin + if ${BUILD_OPTEE}; then + install -m 0644 ${S}/build-optee/${PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${PLATFORM}.bin-optee + fi +} +addtask deploy after do_compile + +PACKAGE_ARCH = "${MACHINE_SOCARCH}" +COMPATIBLE_MACHINE = "(nitrogen8m|nitrogen8mm|nitrogen8mn)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/libmcc2/libmcc2_2.0.1.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/libmcc2/libmcc2_2.0.1.bb deleted file mode 100644 index ce49b8b4..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/libmcc2/libmcc2_2.0.1.bb +++ /dev/null @@ -1,26 +0,0 @@ -# Copyright (C) 2013 Timesys Corporation -SUMMARY = "Multicore communication Library" -LICENSE = "GPL-2.0 | BSD" -LIC_FILES_CHKSUM = "file://LICENSE;md5=c49712341497d0b5f2e40c30dff2af9d \ - file://BSD_LICENSE;md5=10695b8f86532e5e44640acf4d92a2ef" - -DEPENDS = "virtual/kernel-module-mcc" - -SRC_URI = "http://repository.timesys.com/buildsources/l/libmcc2/libmcc2-${PV}/libmcc2-${PV}.tar.bz2" - -SRC_URI[md5sum] = "bd47714eb44ad67915ed51994e3af096" -SRC_URI[sha256sum] = "3bcbd9f3092c3be6edc6ab725346e822f05f303ce1dc5482fb320f4a1754f52d" - -S = "${WORKDIR}/libmcc2-${PV}" - -CFLAGS += "-I${STAGING_KERNEL_DIR}/include/uapi" - -RDEPENDS_${PN} = "virtual/kernel-module-mcc" - -COMPATIBLE_MACHINE = "(vf60)" - -do_install() { - oe_runmake 'DESTDIR=${D}' install -} - -RDEPENDS_${PN}-dev += "virtual/kernel-module-mcc-dev" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils-lx2160acex7/0001-lx2160acex7-add-8x10G-dual-40G-and-dual-100G-DPL-DPC.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils-lx2160acex7/0001-lx2160acex7-add-8x10G-dual-40G-and-dual-100G-DPL-DPC.patch new file mode 100644 index 00000000..b4f94f8c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils-lx2160acex7/0001-lx2160acex7-add-8x10G-dual-40G-and-dual-100G-DPL-DPC.patch @@ -0,0 +1,1912 @@ +From 1b1279d4ce8eb28a3c4f1e98bcd62f16173d8285 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 14:40:28 +0300 +Subject: [PATCH] lx2160acex7: add 8x10G, dual 40G and dual 100G DPL/DPC files + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + config/lx2160a/CEX7/dpc-8_x_usxgmii.dts | 103 ++++ + config/lx2160a/CEX7/dpc-dual-100g.dts | 85 +++ + config/lx2160a/CEX7/dpc-dual-40g.dts | 85 +++ + config/lx2160a/CEX7/dpl-eth.8x10g.19.dts | 532 ++++++++++++++++++ + config/lx2160a/CEX7/dpl-eth.dual-100g.19.dts | 511 ++++++++++++++++++ + config/lx2160a/CEX7/dpl-eth.dual-40g.19.dts | 534 +++++++++++++++++++ + 6 files changed, 1850 insertions(+) + create mode 100644 config/lx2160a/CEX7/dpc-8_x_usxgmii.dts + create mode 100644 config/lx2160a/CEX7/dpc-dual-100g.dts + create mode 100644 config/lx2160a/CEX7/dpc-dual-40g.dts + create mode 100644 config/lx2160a/CEX7/dpl-eth.8x10g.19.dts + create mode 100644 config/lx2160a/CEX7/dpl-eth.dual-100g.19.dts + create mode 100644 config/lx2160a/CEX7/dpl-eth.dual-40g.19.dts + +diff --git a/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts b/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts +new file mode 100644 +index 0000000..44e22bb +--- /dev/null ++++ b/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts +@@ -0,0 +1,103 @@ ++/* ++* Copyright 2018 NXP ++* ++* Redistribution and use in source and binary forms, with or without ++* modification, are permitted provided that the following conditions are met: ++* * Redistributions of source code must retain the above copyright ++* notice, this list of conditions and the following disclaimer. ++* * Redistributions in binary form must reproduce the above copyright ++* notice, this list of conditions and the following disclaimer in the ++* documentation and/or other materials provided with the distribution. ++* * Neither the name of the above-listed copyright holders nor the ++* names of any contributors may be used to endorse or promote products ++* derived from this software without specific prior written permission. ++* ++* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++* POSSIBILITY OF SUCH DAMAGE. ++*/ ++ ++/* ++* This DPC showcases one Linux configuration for lx2160a boards. ++*/ ++ ++/dts-v1/; ++ ++/ { ++ ++ resources { ++ ++ icid_pools { ++ ++ icid_pool@1 { ++ num = <0x64>; ++ base_icid = <0x0>; ++ }; ++ }; ++ }; ++ ++ mc_general { ++ ++ log { ++ mode = "LOG_MODE_ON"; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ ++ console { ++ mode = "CONSOLE_MODE_OFF"; ++ uart_id = <0x4>; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ }; ++ ++ controllers { ++ ++ qbman { ++ /* Transform this number of 8-WQ channels into four times ++ * as many 2-WQ channels. This allows the creation of a ++ * larger number of DPCONs. ++ */ ++ wq_ch_conversion = <32>; ++ }; ++ }; ++ ++ board_info { ++ ports { ++ mac@3 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@4 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@5 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@6 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@7 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@8 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@9 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@10 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@17 { ++ link_type = "MAC_LINK_TYPE_PHY"; ++ }; ++ }; ++ }; ++}; +diff --git a/config/lx2160a/CEX7/dpc-dual-100g.dts b/config/lx2160a/CEX7/dpc-dual-100g.dts +new file mode 100644 +index 0000000..0601a07 +--- /dev/null ++++ b/config/lx2160a/CEX7/dpc-dual-100g.dts +@@ -0,0 +1,85 @@ ++/* ++* Copyright 2018 NXP ++* ++* Redistribution and use in source and binary forms, with or without ++* modification, are permitted provided that the following conditions are met: ++* * Redistributions of source code must retain the above copyright ++* notice, this list of conditions and the following disclaimer. ++* * Redistributions in binary form must reproduce the above copyright ++* notice, this list of conditions and the following disclaimer in the ++* documentation and/or other materials provided with the distribution. ++* * Neither the name of the above-listed copyright holders nor the ++* names of any contributors may be used to endorse or promote products ++* derived from this software without specific prior written permission. ++* ++* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++* POSSIBILITY OF SUCH DAMAGE. ++*/ ++ ++/* ++* This DPC showcases one Linux configuration for lx2160a boards. ++*/ ++ ++/dts-v1/; ++ ++/ { ++ ++ resources { ++ ++ icid_pools { ++ ++ icid_pool@1 { ++ num = <0x64>; ++ base_icid = <0x0>; ++ }; ++ }; ++ }; ++ ++ mc_general { ++ ++ log { ++ mode = "LOG_MODE_ON"; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ ++ console { ++ mode = "CONSOLE_MODE_OFF"; ++ uart_id = <0x4>; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ }; ++ ++ controllers { ++ ++ qbman { ++ /* Transform this number of 8-WQ channels into four times ++ * as many 2-WQ channels. This allows the creation of a ++ * larger number of DPCONs. ++ */ ++ wq_ch_conversion = <32>; ++ }; ++ }; ++ ++ board_info { ++ ports { ++ mac@1 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@2 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@17 { ++ link_type = "MAC_LINK_TYPE_PHY"; ++ }; ++ }; ++ }; ++}; +diff --git a/config/lx2160a/CEX7/dpc-dual-40g.dts b/config/lx2160a/CEX7/dpc-dual-40g.dts +new file mode 100644 +index 0000000..0601a07 +--- /dev/null ++++ b/config/lx2160a/CEX7/dpc-dual-40g.dts +@@ -0,0 +1,85 @@ ++/* ++* Copyright 2018 NXP ++* ++* Redistribution and use in source and binary forms, with or without ++* modification, are permitted provided that the following conditions are met: ++* * Redistributions of source code must retain the above copyright ++* notice, this list of conditions and the following disclaimer. ++* * Redistributions in binary form must reproduce the above copyright ++* notice, this list of conditions and the following disclaimer in the ++* documentation and/or other materials provided with the distribution. ++* * Neither the name of the above-listed copyright holders nor the ++* names of any contributors may be used to endorse or promote products ++* derived from this software without specific prior written permission. ++* ++* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++* POSSIBILITY OF SUCH DAMAGE. ++*/ ++ ++/* ++* This DPC showcases one Linux configuration for lx2160a boards. ++*/ ++ ++/dts-v1/; ++ ++/ { ++ ++ resources { ++ ++ icid_pools { ++ ++ icid_pool@1 { ++ num = <0x64>; ++ base_icid = <0x0>; ++ }; ++ }; ++ }; ++ ++ mc_general { ++ ++ log { ++ mode = "LOG_MODE_ON"; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ ++ console { ++ mode = "CONSOLE_MODE_OFF"; ++ uart_id = <0x4>; ++ level = "LOG_LEVEL_WARNING"; ++ }; ++ }; ++ ++ controllers { ++ ++ qbman { ++ /* Transform this number of 8-WQ channels into four times ++ * as many 2-WQ channels. This allows the creation of a ++ * larger number of DPCONs. ++ */ ++ wq_ch_conversion = <32>; ++ }; ++ }; ++ ++ board_info { ++ ports { ++ mac@1 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@2 { ++ link_type = "MAC_LINK_TYPE_FIXED"; ++ }; ++ mac@17 { ++ link_type = "MAC_LINK_TYPE_PHY"; ++ }; ++ }; ++ }; ++}; +diff --git a/config/lx2160a/CEX7/dpl-eth.8x10g.19.dts b/config/lx2160a/CEX7/dpl-eth.8x10g.19.dts +new file mode 100644 +index 0000000..b72af03 +--- /dev/null ++++ b/config/lx2160a/CEX7/dpl-eth.8x10g.19.dts +@@ -0,0 +1,532 @@ ++/* ++ * Copyright 2018 NXP ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the above-listed copyright holders nor the ++ * names of any contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/dts-v1/; ++ ++/ { ++ dpl-version = <0xa>; ++ /***************************************************************** ++ * Containers ++ *****************************************************************/ ++ containers { ++ dprc@1 { ++ parent = "none"; ++ options = "DPRC_CFG_OPT_SPAWN_ALLOWED", "DPRC_CFG_OPT_ALLOC_ALLOWED", "DPRC_CFG_OPT_IRQ_CFG_ALLOWED"; ++ objects { ++ /* ------------ DPNIs --------------*/ ++ obj_set@dpni { ++ type = "dpni"; ++ ids = <0x0>; ++ }; ++ ++ ++ /* ------------ DPMACs --------------*/ ++ obj_set@dpmac { ++ type = "dpmac"; ++ ids = <0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0x11>; ++ }; ++ ++ ++ /* ------------ DPBPs --------------*/ ++ obj_set@dpbp { ++ type = "dpbp"; ++ ids = <0x0 0x1>; ++ }; ++ ++ /* ------------ DPIOs --------------*/ ++ obj_set@dpio { ++ type = "dpio"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; ++ }; ++ ++ /* ------------ DPMCPs --------------*/ ++ obj_set@dpmcp { ++ type = "dpmcp"; ++ ids = <0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23>; ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ obj_set@dpcon { ++ type = "dpcon"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ obj@700 { ++ obj_name = "dpseci@0"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ obj@800 { ++ obj_name="dprtc@0"; ++ }; ++ }; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Objects ++ *****************************************************************/ ++ objects { ++ ++ /* ------------ DPNI --------------*/ ++ dpni@0 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@1 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@2 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@3 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@4 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@5 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@6 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@7 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@8 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpmac@2 { ++ }; ++ ++ dpmac@3 { ++ }; ++ ++ dpmac@4 { ++ }; ++ ++ dpmac@5 { ++ }; ++ ++ dpmac@6 { ++ }; ++ dpmac@7 { ++ }; ++ dpmac@8 { ++ }; ++ dpmac@9 { ++ }; ++ dpmac@10 { ++ }; ++ ++ dpmac@17 { ++ }; ++ ++ dpmac@18 { ++ }; ++ ++ /* ------------ DPBP --------------*/ ++ dpbp@0 { ++ }; ++ ++ dpbp@1 { ++ }; ++ ++ ++ /* ------------ DPIO --------------*/ ++ dpio@0 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@1 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@2 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@3 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@4 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@5 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@6 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@7 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@8 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@9 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@10 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@11 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@12 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@13 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@14 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@15 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ /* ------------ DPMCP --------------*/ ++ dpmcp@1 { ++ }; ++ ++ dpmcp@2 { ++ }; ++ ++ dpmcp@3 { ++ }; ++ ++ dpmcp@4 { ++ }; ++ ++ dpmcp@5 { ++ }; ++ ++ dpmcp@6 { ++ }; ++ ++ dpmcp@7 { ++ }; ++ ++ dpmcp@8 { ++ }; ++ ++ dpmcp@9 { ++ }; ++ ++ dpmcp@10 { ++ }; ++ ++ dpmcp@11 { ++ }; ++ ++ dpmcp@12 { ++ }; ++ ++ dpmcp@13 { ++ }; ++ ++ dpmcp@14 { ++ }; ++ ++ dpmcp@15 { ++ }; ++ ++ dpmcp@16 { ++ }; ++ ++ dpmcp@17 { ++ }; ++ ++ dpmcp@18 { ++ }; ++ ++ dpmcp@19 { ++ }; ++ ++ dpmcp@20 { ++ }; ++ ++ dpmcp@21 { ++ }; ++ ++ dpmcp@22 { ++ }; ++ ++ dpmcp@23 { ++ }; ++ ++ dpmcp@24 { ++ }; ++ ++ dpmcp@25 { ++ }; ++ ++ dpmcp@26 { ++ }; ++ ++ dpmcp@27 { ++ }; ++ ++ dpmcp@28 { ++ }; ++ ++ dpmcp@29 { ++ }; ++ ++ dpmcp@30 { ++ }; ++ ++ dpmcp@31 { ++ }; ++ ++ dpmcp@32 { ++ }; ++ ++ dpmcp@33 { ++ }; ++ ++ dpmcp@34 { ++ }; ++ ++ dpmcp@35 { ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ dpcon@0 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@1 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@2 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@3 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@4 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@5 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@6 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@7 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@8 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@9 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@10 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@11 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@12 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@13 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@14 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@15 { ++ num_priorities = <0x2>; ++ }; ++ dpcon@16 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@17 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@18 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@19 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@20 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@21 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@22 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@23 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@24 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@25 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@26 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@27 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@28 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@29 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@30 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@31 { ++ num_priorities = <0x2>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ dpseci@0 { ++ priorities = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>; ++ options = "DPSECI_OPT_HAS_CG"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ dprtc@0 { ++ compatible="fsl,dprtc"; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Connections ++ *****************************************************************/ ++ connections { ++ connection@1 { ++ endpoint1 = "dpni@0"; ++ endpoint2 = "dpmac@17"; ++ }; ++/* connection@2 { ++ endpoint1 = "dpni@1"; ++ endpoint2 = "dpmac@3"; ++ }; ++ connection@3 { ++ endpoint1 = "dpni@2"; ++ endpoint2 = "dpmac@4"; ++ }; ++ connection@4 { ++ endpoint1 = "dpni@3"; ++ endpoint2 = "dpmac@5"; ++ }; ++ connection@5 { ++ endpoint1 = "dpni@4"; ++ endpoint2 = "dpmac@6"; ++ };*/ ++ }; ++}; ++ +diff --git a/config/lx2160a/CEX7/dpl-eth.dual-100g.19.dts b/config/lx2160a/CEX7/dpl-eth.dual-100g.19.dts +new file mode 100644 +index 0000000..bb1b54f +--- /dev/null ++++ b/config/lx2160a/CEX7/dpl-eth.dual-100g.19.dts +@@ -0,0 +1,511 @@ ++/* ++ * Copyright 2018 NXP ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the above-listed copyright holders nor the ++ * names of any contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/dts-v1/; ++ ++/ { ++ dpl-version = <0xa>; ++ /***************************************************************** ++ * Containers ++ *****************************************************************/ ++ containers { ++ dprc@1 { ++ parent = "none"; ++ options = "DPRC_CFG_OPT_SPAWN_ALLOWED", "DPRC_CFG_OPT_ALLOC_ALLOWED", "DPRC_CFG_OPT_IRQ_CFG_ALLOWED"; ++ objects { ++ /* ------------ DPNIs --------------*/ ++ obj_set@dpni { ++ type = "dpni"; ++ ids = <0x0>; ++ }; ++ ++ ++ /* ------------ DPMACs --------------*/ ++ obj_set@dpmac { ++ type = "dpmac"; ++ ids = <0x1 0x2 0x11>; ++ }; ++ ++ ++ /* ------------ DPBPs --------------*/ ++ obj_set@dpbp { ++ type = "dpbp"; ++ ids = <0x0 0x1>; ++ }; ++ ++ /* ------------ DPIOs --------------*/ ++ obj_set@dpio { ++ type = "dpio"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; ++ }; ++ ++ /* ------------ DPMCPs --------------*/ ++ obj_set@dpmcp { ++ type = "dpmcp"; ++ ids = <0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23>; ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ obj_set@dpcon { ++ type = "dpcon"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ obj@700 { ++ obj_name = "dpseci@0"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ obj@800 { ++ obj_name="dprtc@0"; ++ }; ++ }; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Objects ++ *****************************************************************/ ++ objects { ++ ++ /* ------------ DPNI --------------*/ ++ dpni@0 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@1 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@2 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@3 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@4 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@5 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@6 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@7 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@8 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpmac@1 { ++ }; ++ dpmac@2 { ++ }; ++ ++ dpmac@17 { ++ }; ++ ++ /* ------------ DPBP --------------*/ ++ dpbp@0 { ++ }; ++ ++ dpbp@1 { ++ }; ++ ++ ++ /* ------------ DPIO --------------*/ ++ dpio@0 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@1 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@2 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@3 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@4 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@5 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@6 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@7 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@8 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@9 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@10 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@11 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@12 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@13 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@14 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@15 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ /* ------------ DPMCP --------------*/ ++ dpmcp@1 { ++ }; ++ ++ dpmcp@2 { ++ }; ++ ++ dpmcp@3 { ++ }; ++ ++ dpmcp@4 { ++ }; ++ ++ dpmcp@5 { ++ }; ++ ++ dpmcp@6 { ++ }; ++ ++ dpmcp@7 { ++ }; ++ ++ dpmcp@8 { ++ }; ++ ++ dpmcp@9 { ++ }; ++ ++ dpmcp@10 { ++ }; ++ ++ dpmcp@11 { ++ }; ++ ++ dpmcp@12 { ++ }; ++ ++ dpmcp@13 { ++ }; ++ ++ dpmcp@14 { ++ }; ++ ++ dpmcp@15 { ++ }; ++ ++ dpmcp@16 { ++ }; ++ ++ dpmcp@17 { ++ }; ++ ++ dpmcp@18 { ++ }; ++ ++ dpmcp@19 { ++ }; ++ ++ dpmcp@20 { ++ }; ++ ++ dpmcp@21 { ++ }; ++ ++ dpmcp@22 { ++ }; ++ ++ dpmcp@23 { ++ }; ++ ++ dpmcp@24 { ++ }; ++ ++ dpmcp@25 { ++ }; ++ ++ dpmcp@26 { ++ }; ++ ++ dpmcp@27 { ++ }; ++ ++ dpmcp@28 { ++ }; ++ ++ dpmcp@29 { ++ }; ++ ++ dpmcp@30 { ++ }; ++ ++ dpmcp@31 { ++ }; ++ ++ dpmcp@32 { ++ }; ++ ++ dpmcp@33 { ++ }; ++ ++ dpmcp@34 { ++ }; ++ ++ dpmcp@35 { ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ dpcon@0 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@1 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@2 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@3 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@4 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@5 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@6 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@7 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@8 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@9 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@10 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@11 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@12 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@13 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@14 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@15 { ++ num_priorities = <0x2>; ++ }; ++ dpcon@16 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@17 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@18 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@19 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@20 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@21 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@22 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@23 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@24 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@25 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@26 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@27 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@28 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@29 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@30 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@31 { ++ num_priorities = <0x2>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ dpseci@0 { ++ priorities = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>; ++ options = "DPSECI_OPT_HAS_CG"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ dprtc@0 { ++ compatible="fsl,dprtc"; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Connections ++ *****************************************************************/ ++ connections { ++ connection@1 { ++ endpoint1 = "dpni@0"; ++ endpoint2 = "dpmac@17"; ++ }; ++/* connection@2 { ++ endpoint1 = "dpni@1"; ++ endpoint2 = "dpmac@3"; ++ }; ++ connection@3 { ++ endpoint1 = "dpni@2"; ++ endpoint2 = "dpmac@4"; ++ }; ++ connection@4 { ++ endpoint1 = "dpni@3"; ++ endpoint2 = "dpmac@5"; ++ }; ++ connection@5 { ++ endpoint1 = "dpni@4"; ++ endpoint2 = "dpmac@6"; ++ };*/ ++ }; ++}; ++ +diff --git a/config/lx2160a/CEX7/dpl-eth.dual-40g.19.dts b/config/lx2160a/CEX7/dpl-eth.dual-40g.19.dts +new file mode 100644 +index 0000000..5619fd2 +--- /dev/null ++++ b/config/lx2160a/CEX7/dpl-eth.dual-40g.19.dts +@@ -0,0 +1,534 @@ ++/* ++ * Copyright 2018 NXP ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the above-listed copyright holders nor the ++ * names of any contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/dts-v1/; ++ ++/ { ++ dpl-version = <0xa>; ++ /***************************************************************** ++ * Containers ++ *****************************************************************/ ++ containers { ++ dprc@1 { ++ parent = "none"; ++ options = "DPRC_CFG_OPT_SPAWN_ALLOWED", "DPRC_CFG_OPT_ALLOC_ALLOWED", "DPRC_CFG_OPT_IRQ_CFG_ALLOWED"; ++ objects { ++ /* ------------ DPNIs --------------*/ ++ obj_set@dpni { ++ type = "dpni"; ++ ids = <0x0>; ++ }; ++ ++ ++ /* ------------ DPMACs --------------*/ ++ obj_set@dpmac { ++ type = "dpmac"; ++ ids = <0x1 0x2 0x11>; ++ }; ++ ++ ++ /* ------------ DPBPs --------------*/ ++ obj_set@dpbp { ++ type = "dpbp"; ++ ids = <0x0 0x1>; ++ }; ++ ++ /* ------------ DPIOs --------------*/ ++ obj_set@dpio { ++ type = "dpio"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; ++ }; ++ ++ /* ------------ DPMCPs --------------*/ ++ obj_set@dpmcp { ++ type = "dpmcp"; ++ ids = <0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23>; ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ obj_set@dpcon { ++ type = "dpcon"; ++ ids = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ obj@700 { ++ obj_name = "dpseci@0"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ obj@800 { ++ obj_name="dprtc@0"; ++ }; ++ }; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Objects ++ *****************************************************************/ ++ objects { ++ ++ /* ------------ DPNI --------------*/ ++ dpni@0 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@1 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@2 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@3 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@4 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@5 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@6 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@7 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpni@8 { ++ options = "DPNI_OPT_HAS_KEY_MASKING"; ++ num_queues = <0x10>; ++ num_tcs = <0x1>; ++ }; ++ dpmac@1 { ++ }; ++ dpmac@2 { ++ }; ++ ++ dpmac@3 { ++ }; ++ ++ dpmac@4 { ++ }; ++ ++ dpmac@5 { ++ }; ++ ++ dpmac@6 { ++ }; ++ dpmac@7 { ++ }; ++ dpmac@8 { ++ }; ++ dpmac@9 { ++ }; ++ dpmac@10 { ++ }; ++ ++ dpmac@17 { ++ }; ++ ++ dpmac@18 { ++ }; ++ ++ /* ------------ DPBP --------------*/ ++ dpbp@0 { ++ }; ++ ++ dpbp@1 { ++ }; ++ ++ ++ /* ------------ DPIO --------------*/ ++ dpio@0 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@1 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@2 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@3 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@4 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@5 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@6 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@7 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@8 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@9 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@10 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@11 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@12 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@13 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@14 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ dpio@15 { ++ channel_mode = "DPIO_LOCAL_CHANNEL"; ++ num_priorities = <0x8>; ++ }; ++ ++ /* ------------ DPMCP --------------*/ ++ dpmcp@1 { ++ }; ++ ++ dpmcp@2 { ++ }; ++ ++ dpmcp@3 { ++ }; ++ ++ dpmcp@4 { ++ }; ++ ++ dpmcp@5 { ++ }; ++ ++ dpmcp@6 { ++ }; ++ ++ dpmcp@7 { ++ }; ++ ++ dpmcp@8 { ++ }; ++ ++ dpmcp@9 { ++ }; ++ ++ dpmcp@10 { ++ }; ++ ++ dpmcp@11 { ++ }; ++ ++ dpmcp@12 { ++ }; ++ ++ dpmcp@13 { ++ }; ++ ++ dpmcp@14 { ++ }; ++ ++ dpmcp@15 { ++ }; ++ ++ dpmcp@16 { ++ }; ++ ++ dpmcp@17 { ++ }; ++ ++ dpmcp@18 { ++ }; ++ ++ dpmcp@19 { ++ }; ++ ++ dpmcp@20 { ++ }; ++ ++ dpmcp@21 { ++ }; ++ ++ dpmcp@22 { ++ }; ++ ++ dpmcp@23 { ++ }; ++ ++ dpmcp@24 { ++ }; ++ ++ dpmcp@25 { ++ }; ++ ++ dpmcp@26 { ++ }; ++ ++ dpmcp@27 { ++ }; ++ ++ dpmcp@28 { ++ }; ++ ++ dpmcp@29 { ++ }; ++ ++ dpmcp@30 { ++ }; ++ ++ dpmcp@31 { ++ }; ++ ++ dpmcp@32 { ++ }; ++ ++ dpmcp@33 { ++ }; ++ ++ dpmcp@34 { ++ }; ++ ++ dpmcp@35 { ++ }; ++ ++ /* ------------ DPCON --------------*/ ++ dpcon@0 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@1 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@2 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@3 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@4 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@5 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@6 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@7 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@8 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@9 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@10 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@11 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@12 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@13 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@14 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@15 { ++ num_priorities = <0x2>; ++ }; ++ dpcon@16 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@17 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@18 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@19 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@20 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@21 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@22 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@23 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@24 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@25 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@26 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@27 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@28 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@29 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@30 { ++ num_priorities = <0x2>; ++ }; ++ ++ dpcon@31 { ++ num_priorities = <0x2>; ++ }; ++ ++ /* ------------ DPSECI --------------*/ ++ dpseci@0 { ++ priorities = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>; ++ options = "DPSECI_OPT_HAS_CG"; ++ }; ++ ++ /* ------------ DPRTC --------------*/ ++ dprtc@0 { ++ compatible="fsl,dprtc"; ++ }; ++ }; ++ ++ /***************************************************************** ++ * Connections ++ *****************************************************************/ ++ connections { ++ connection@1 { ++ endpoint1 = "dpni@0"; ++ endpoint2 = "dpmac@17"; ++ }; ++/* connection@2 { ++ endpoint1 = "dpni@1"; ++ endpoint2 = "dpmac@3"; ++ }; ++ connection@3 { ++ endpoint1 = "dpni@2"; ++ endpoint2 = "dpmac@4"; ++ }; ++ connection@4 { ++ endpoint1 = "dpni@3"; ++ endpoint2 = "dpmac@5"; ++ }; ++ connection@5 { ++ endpoint1 = "dpni@4"; ++ endpoint2 = "dpmac@6"; ++ };*/ ++ }; ++}; ++ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils_git.bbappend b/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils_git.bbappend new file mode 100644 index 00000000..09c04156 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/mc-utils/mc-utils_git.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS_append_lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:" + +SRC_URI_append_lx2160acex7 = "\ + file://0001-lx2160acex7-add-8x10G-dual-40G-and-dual-100G-DPL-DPC.patch \ +" + +MC_FLAVOUR_lx2160acex7 = "CEX7" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0001-lx2160acex7-misc-RCW-files.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0001-lx2160acex7-misc-RCW-files.patch new file mode 100644 index 00000000..ae873990 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0001-lx2160acex7-misc-RCW-files.patch @@ -0,0 +1,640 @@ +From ef5ab1b5a7262a6ef9caf334b0c772b0ebf00fdf Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 14:43:06 +0300 +Subject: [PATCH] lx2160acex7 misc RCW files + +This patch adds support for lx2160a rcw project. +In general RCW has lots of redundent files and can be restructured +better as in this patch. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/Makefile | 2 + + lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig | 61 +++++++++++++++++++ + .../rcw_1900_600_2600_17_4_2.rcw | 4 ++ + .../rcw_1900_600_2600_17_4_2_sd.rcw | 4 ++ + .../rcw_2000_700_2400_13_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_2400_20_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_2400_8_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_2600_8_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_2900_17_4_2_sd.rcw | 4 ++ + .../rcw_2000_700_2900_8_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_3200_17_4_2_sd.rcw | 4 ++ + .../rcw_2000_700_3200_20_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_3200_8_5_0_sd.rcw | 4 ++ + .../rcw_2000_700_3200_8_5_2_sd.rcw | 4 ++ + .../rcw_2000_700_3200_8_5_2_xspi.rcw | 4 ++ + .../rcw_2400_700_3200_8_5_2_sd.rcw | 4 ++ + .../rcw_2500_700_3200_8_5_2_sd.rcw | 4 ++ + .../rcw_2600_700_3200_8_5_2_sd.rcw | 4 ++ + .../XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw | 4 ++ + lx2160acex7/configs/lx2160a_13_5_2.rcwi | 3 + + lx2160acex7/configs/lx2160a_17_4_2.rcwi | 7 +++ + .../configs/lx2160a_1900_600_2600.rcwi | 12 ++++ + .../configs/lx2160a_2000_700_2400.rcwi | 12 ++++ + .../configs/lx2160a_2000_700_2600.rcwi | 12 ++++ + .../configs/lx2160a_2000_700_2900.rcwi | 12 ++++ + .../configs/lx2160a_2000_700_3200.rcwi | 12 ++++ + lx2160acex7/configs/lx2160a_20_5_2.rcwi | 7 +++ + .../configs/lx2160a_2400_700_3200.rcwi | 12 ++++ + .../configs/lx2160a_2500_700_3200.rcwi | 12 ++++ + .../configs/lx2160a_2600_700_3200.rcwi | 12 ++++ + lx2160acex7/configs/lx2160a_8_5_0.rcwi | 7 +++ + lx2160acex7/configs/lx2160a_8_5_2.rcwi | 7 +++ + lx2160acex7/configs/lx2160a_defaults.rcwi | 19 ++++++ + lx2160acex7/configs/lx2160a_sdboot.rcwi | 20 ++++++ + lx2160acex7/configs/lx2160a_test.rcwi | 20 ++++++ + lx2160acex7/configs/lx2160a_xspiboot.rcwi | 17 ++++++ + 36 files changed, 334 insertions(+) + create mode 100644 lx2160acex7/Makefile + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw + create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw + create mode 100644 lx2160acex7/configs/lx2160a_13_5_2.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_17_4_2.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_1900_600_2600.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2400.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2600.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2900.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2000_700_3200.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_20_5_2.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2400_700_3200.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2500_700_3200.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_2600_700_3200.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_8_5_0.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_8_5_2.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_defaults.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_sdboot.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_test.rcwi + create mode 100644 lx2160acex7/configs/lx2160a_xspiboot.rcwi + +diff --git a/lx2160acex7/Makefile b/lx2160acex7/Makefile +new file mode 100644 +index 0000000..d7e9447 +--- /dev/null ++++ b/lx2160acex7/Makefile +@@ -0,0 +1,2 @@ ++include ../Makefile.inc ++ +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig +new file mode 100644 +index 0000000..cdb6446 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig +@@ -0,0 +1,61 @@ ++/* ++ * SerDes Protocol 1 - 19 ++ * SerDes Protocol 2 - 5 ++ * SerDes Protocol 3 - 2 ++ * ++ * Frequencies: ++ * Core -- 1900 MHz ++ * Platform -- 600 MHz ++ * DDR -- 2600 MT/s ++ */ ++ ++#include <../lx2160asi/lx2160a.rcwi> ++ ++SYS_PLL_RAT=12 ++MEM_PLL_CFG=3 ++MEM_PLL_RAT=26 ++MEM2_PLL_CFG=3 ++MEM2_PLL_RAT=26 ++CGA_PLL1_RAT=19 ++CGA_PLL2_RAT=19 ++CGB_PLL1_RAT=19 ++CGB_PLL2_RAT=9 ++C5_PLL_SEL=0 ++C6_PLL_SEL=0 ++C7_PLL_SEL=0 ++C8_PLL_SEL=0 ++HWA_CGA_M1_CLK_SEL=1 ++HWA_CGB_M1_CLK_SEL=7 ++BOOT_LOC=26 ++SYSCLK_FREQ=600 ++IIC2_PMUX=6 ++IIC3_PMUX=2 ++IIC4_PMUX=2 ++USB3_CLK_FSEL=39 ++SRDS_PRTCL_S1=19 ++SRDS_PRTCL_S2=5 ++SRDS_PRTCL_S3=2 ++SRDS_PLL_REF_CLK_SEL_S1=2 ++SRDS_DIV_PEX_S1=1 ++SRDS_DIV_PEX_S2=3 ++SRDS_DIV_PEX_S3=1 ++ ++/* Errata to write on scratch reg for validation */ ++#include <../lx2160asi/scratchrw1.rcw> ++ ++/* Copy SPL Uboot to Ocram */ ++.pbi ++blockcopy 0x08,0x00100000,0x1800a000,0x00020000 ++.end ++ ++/* Boot Location Pointer */ ++#include <../lx2160asi/bootlocptr_sd.rcw> ++ ++/* Errata for SATA controller */ ++#include <../lx2160asi/a010554.rcw> ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_24.rcw> ++ ++/* common PBI commands */ ++#include <../lx2160asi/common.rcw> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw +new file mode 100644 +index 0000000..13ab0b9 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_1900_600_2600.rcwi> ++#include <configs/lx2160a_17_4_2.rcwi> ++#include <configs/lx2160a_xspiboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw +new file mode 100644 +index 0000000..14fae8c +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_1900_600_2600.rcwi> ++#include <configs/lx2160a_17_4_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw +new file mode 100644 +index 0000000..2dae5a2 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2400.rcwi> ++#include <configs/lx2160a_13_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw +new file mode 100644 +index 0000000..5335072 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2400.rcwi> ++#include <configs/lx2160a_20_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw +new file mode 100644 +index 0000000..e2a5bd3 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2400.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw +new file mode 100644 +index 0000000..a330bfe +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2600.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw +new file mode 100644 +index 0000000..8535dbd +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2900.rcwi> ++#include <configs/lx2160a_17_4_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw +new file mode 100644 +index 0000000..698be01 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_2900.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw +new file mode 100644 +index 0000000..780d8c3 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_3200.rcwi> ++#include <configs/lx2160a_17_4_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw +new file mode 100644 +index 0000000..eb9d240 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_3200.rcwi> ++#include <configs/lx2160a_20_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw +new file mode 100644 +index 0000000..ceb53a3 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_3200.rcwi> ++#include <configs/lx2160a_8_5_0.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw +new file mode 100644 +index 0000000..a220e98 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_3200.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw +new file mode 100644 +index 0000000..1eabd7d +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2000_700_3200.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_xspiboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw +new file mode 100644 +index 0000000..2ac59b1 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2400_700_3200.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw +new file mode 100644 +index 0000000..e7c08df +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2500_700_3200.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw +new file mode 100644 +index 0000000..1e7a8f7 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_2600_700_3200.rcwi> ++#include <configs/lx2160a_8_5_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw +new file mode 100644 +index 0000000..86f12f8 +--- /dev/null ++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw +@@ -0,0 +1,4 @@ ++#include <configs/lx2160a_defaults.rcwi> ++#include <configs/lx2160a_test.rcwi> ++#include <configs/lx2160a_17_4_2.rcwi> ++#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/configs/lx2160a_13_5_2.rcwi b/lx2160acex7/configs/lx2160a_13_5_2.rcwi +new file mode 100644 +index 0000000..76f44bc +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_13_5_2.rcwi +@@ -0,0 +1,3 @@ ++SRDS_PRTCL_S1=13 ++SRDS_PRTCL_S2=5 ++SRDS_PRTCL_S3=2 +diff --git a/lx2160acex7/configs/lx2160a_17_4_2.rcwi b/lx2160acex7/configs/lx2160a_17_4_2.rcwi +new file mode 100644 +index 0000000..358972d +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_17_4_2.rcwi +@@ -0,0 +1,7 @@ ++SRDS_PRTCL_S1=17 ++SRDS_PRTCL_S2=4 ++SRDS_PRTCL_S3=2 ++ ++/*SRDS_INTRA_REF_CLK_S1 = 1*/ /* PLLF used for PLLS */ ++/*SRDS_PLL_REF_CLK_SEL_S1=2*/ ++ +diff --git a/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi b/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi +new file mode 100644 +index 0000000..8b61021 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=19 ++CGA_PLL2_RAT=19 ++CGB_PLL1_RAT=19 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=12 ++ ++MEM_PLL_RAT=26 ++MEM2_PLL_RAT=26 ++ ++/* Modify FlexSPI Clock Divisor value */ ++/* #include <../lx2160asi/flexspi_divisor_24.rcw>*/ +diff --git a/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi +new file mode 100644 +index 0000000..6b0b150 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=20 ++CGA_PLL2_RAT=20 ++CGB_PLL1_RAT=20 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=24 ++MEM2_PLL_RAT=24 ++ ++/* Modify FlexSPI Clock Divisor value */ ++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/ +diff --git a/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi +new file mode 100644 +index 0000000..21dce67 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=20 ++CGA_PLL2_RAT=20 ++CGB_PLL1_RAT=20 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=26 ++MEM2_PLL_RAT=26 ++ ++/* Modify FlexSPI Clock Divisor value */ ++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/ +diff --git a/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi +new file mode 100644 +index 0000000..e6a8e30 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=20 ++CGA_PLL2_RAT=20 ++CGB_PLL1_RAT=20 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=29 ++MEM2_PLL_RAT=29 ++ ++/* Modify FlexSPI Clock Divisor value */ ++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/ +diff --git a/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi +new file mode 100644 +index 0000000..27ee377 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=20 ++CGA_PLL2_RAT=20 ++CGB_PLL1_RAT=20 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=32 ++MEM2_PLL_RAT=32 ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_28.rcw> +diff --git a/lx2160acex7/configs/lx2160a_20_5_2.rcwi b/lx2160acex7/configs/lx2160a_20_5_2.rcwi +new file mode 100644 +index 0000000..c2c7bea +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_20_5_2.rcwi +@@ -0,0 +1,7 @@ ++SRDS_PRTCL_S1=20 ++SRDS_PRTCL_S2=5 ++SRDS_PRTCL_S3=2 ++ ++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */ ++SRDS_PLL_REF_CLK_SEL_S1=2 ++SRDS_PLL_PD_PLL1=1 +diff --git a/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi +new file mode 100644 +index 0000000..fc0fd6c +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=24 ++CGA_PLL2_RAT=24 ++CGB_PLL1_RAT=24 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=32 ++MEM2_PLL_RAT=32 ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_28.rcw> +diff --git a/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi +new file mode 100644 +index 0000000..62d9069 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=25 ++CGA_PLL2_RAT=25 ++CGB_PLL1_RAT=25 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=32 ++MEM2_PLL_RAT=32 ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_28.rcw> +diff --git a/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi +new file mode 100644 +index 0000000..e244917 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi +@@ -0,0 +1,12 @@ ++CGA_PLL1_RAT=26 ++CGA_PLL2_RAT=26 ++CGB_PLL1_RAT=26 ++CGB_PLL2_RAT=9 ++ ++SYS_PLL_RAT=14 ++ ++MEM_PLL_RAT=32 ++MEM2_PLL_RAT=32 ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_28.rcw> +diff --git a/lx2160acex7/configs/lx2160a_8_5_0.rcwi b/lx2160acex7/configs/lx2160a_8_5_0.rcwi +new file mode 100644 +index 0000000..62ff153 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_8_5_0.rcwi +@@ -0,0 +1,7 @@ ++SRDS_PRTCL_S1=8 /* should be 8 */ ++SRDS_PRTCL_S2=5 ++SRDS_PRTCL_S3=0 ++ ++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */ ++SRDS_PLL_REF_CLK_SEL_S1=2 ++SRDS_PLL_PD_PLL1=1 +diff --git a/lx2160acex7/configs/lx2160a_8_5_2.rcwi b/lx2160acex7/configs/lx2160a_8_5_2.rcwi +new file mode 100644 +index 0000000..d7d707a +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_8_5_2.rcwi +@@ -0,0 +1,7 @@ ++SRDS_PRTCL_S1=8 /* should be 8 */ ++SRDS_PRTCL_S2=5 ++SRDS_PRTCL_S3=2 ++ ++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */ ++SRDS_PLL_REF_CLK_SEL_S1=2 ++SRDS_PLL_PD_PLL1=1 +diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi +new file mode 100644 +index 0000000..6fd65ec +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi +@@ -0,0 +1,19 @@ ++#include <../lx2160asi/lx2160a.rcwi> ++MEM_PLL_CFG=3 ++MEM2_PLL_CFG=3 ++C5_PLL_SEL=0 ++C6_PLL_SEL=0 ++C7_PLL_SEL=0 ++C8_PLL_SEL=0 ++HWA_CGA_M1_CLK_SEL=1 ++HWA_CGB_M1_CLK_SEL=7 ++BOOT_LOC=26 ++SYSCLK_FREQ=600 ++IIC2_PMUX=6 ++IIC3_PMUX=0 ++IIC4_PMUX=2 ++USB3_CLK_FSEL=39 ++SRDS_DIV_PEX_S1=1 ++SRDS_DIV_PEX_S2=3 ++SRDS_DIV_PEX_S3=1 ++ +diff --git a/lx2160acex7/configs/lx2160a_sdboot.rcwi b/lx2160acex7/configs/lx2160a_sdboot.rcwi +new file mode 100644 +index 0000000..d537ea5 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_sdboot.rcwi +@@ -0,0 +1,20 @@ ++/* Errata to write on scratch reg for validation */ ++#include <../lx2160asi/scratchrw1.rcw> ++ ++/* Copy SPL Uboot to Ocram */ ++.pbi ++blockcopy 0x08,0x00100000,0x1800a000,0x00020000 ++.end ++ ++/* Boot Location Pointer */ ++#include <../lx2160asi/bootlocptr_sd.rcw> ++ ++/* Errata for SATA controller */ ++#include <../lx2160asi/a010554.rcw> ++ ++/* Errata for PCIe controller */ ++#include <../lx2160asi/a011270.rcw> ++ ++/* common PBI commands */ ++#include <../lx2160asi/common.rcw> ++ +diff --git a/lx2160acex7/configs/lx2160a_test.rcwi b/lx2160acex7/configs/lx2160a_test.rcwi +new file mode 100644 +index 0000000..a223be1 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_test.rcwi +@@ -0,0 +1,20 @@ ++CGA_PLL1_RAT=20 ++CGA_PLL2_RAT=20 ++CGB_PLL1_RAT=20 ++CGB_PLL2_RAT=8 ++ ++SYS_PLL_RAT=12 ++ ++MEM_PLL_RAT=32 ++MEM2_PLL_RAT=32 ++ ++/* Modify FlexSPI Clock Divisor value */ ++/* #include <../lx2160asi/flexspi_divisor_24.rcw> */ ++ ++SRDS_PLL_PD_PLL1=1 ++SRDS_PLL_PD_PLL2=1 ++SRDS_PLL_PD_PLL3=1 ++SRDS_PLL_PD_PLL4=1 ++SRDS_PLL_PD_PLL5=1 ++SRDS_PLL_PD_PLL6=1 ++ +diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +new file mode 100644 +index 0000000..eecc314 +--- /dev/null ++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +@@ -0,0 +1,17 @@ ++/* Errata to write on scratch reg for validation */ ++#include <../lx2160asi/scratchrw1.rcw> ++ ++/* Boot Location Pointer */ ++#include <../lx2160asi/bootlocptr_nor.rcw> ++ ++/* Errata for SATA controller */ ++#include <../lx2160asi/a010554.rcw> ++ ++/* Errata for PCIe controller */ ++#include <../lx2160asi/a011270.rcw> ++ ++/* common PBI commands */ ++#include <../lx2160asi/common.rcw> ++ ++/* Modify FlexSPI Clock Divisor value */ ++#include <../lx2160asi/flexspi_divisor_24.rcw> +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0002-Set-io-pads-as-GPIO.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0002-Set-io-pads-as-GPIO.patch new file mode 100644 index 00000000..b156a018 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0002-Set-io-pads-as-GPIO.patch @@ -0,0 +1,38 @@ +From b184697cff85d8f98e765014309b97444ff1c5b7 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Wed, 30 Oct 2019 11:43:37 +0200 +Subject: [PATCH 2/2] Set io pads as GPIO + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/configs/lx2160a_defaults.rcwi | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi +index 6fd65ec..dbc843f 100644 +--- a/lx2160acex7/configs/lx2160a_defaults.rcwi ++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi +@@ -9,11 +9,16 @@ HWA_CGA_M1_CLK_SEL=1 + HWA_CGB_M1_CLK_SEL=7 + BOOT_LOC=26 + SYSCLK_FREQ=600 +-IIC2_PMUX=6 ++IIC2_PMUX=1 + IIC3_PMUX=0 + IIC4_PMUX=2 + USB3_CLK_FSEL=39 + SRDS_DIV_PEX_S1=1 + SRDS_DIV_PEX_S2=3 + SRDS_DIV_PEX_S3=1 +- ++SDHC1_DIR_PMUX=1 ++IRQ03_00_PMUX=1 ++IRQ07_04_PMUX=1 ++IRQ11_08_PMUX=1 ++EVT20_PMUX=1 ++EVT43_PMUX=1 +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch new file mode 100644 index 00000000..18d37a65 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch @@ -0,0 +1,42 @@ +From 3b0e8b6e242549c2ed992d7556d7966a77b6da86 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Tue, 5 Nov 2019 10:35:32 +0200 +Subject: [PATCH] S2 - enable gen3, xspi increase divisor to 28 + +Serdes group 2 enable PCIe gen 3 +XSPI increase divisor to 28 - this fixes UEFI SPI flash detection. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/configs/lx2160a_defaults.rcwi | 2 +- + lx2160acex7/configs/lx2160a_xspiboot.rcwi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi +index dbc843f..3ea7683 100644 +--- a/lx2160acex7/configs/lx2160a_defaults.rcwi ++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi +@@ -14,7 +14,7 @@ IIC3_PMUX=0 + IIC4_PMUX=2 + USB3_CLK_FSEL=39 + SRDS_DIV_PEX_S1=1 +-SRDS_DIV_PEX_S2=3 ++SRDS_DIV_PEX_S2=1 + SRDS_DIV_PEX_S3=1 + SDHC1_DIR_PMUX=1 + IRQ03_00_PMUX=1 +diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +index eecc314..28310c9 100644 +--- a/lx2160acex7/configs/lx2160a_xspiboot.rcwi ++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +@@ -14,4 +14,4 @@ + #include <../lx2160asi/common.rcw> + + /* Modify FlexSPI Clock Divisor value */ +-#include <../lx2160asi/flexspi_divisor_24.rcw> ++#include <../lx2160asi/flexspi_divisor_28.rcw> +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0004-refactor-a009531-a008851-and-a011270.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0004-refactor-a009531-a008851-and-a011270.patch new file mode 100644 index 00000000..0bcc5d33 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0004-refactor-a009531-a008851-and-a011270.patch @@ -0,0 +1,181 @@ +From c7c3ed47f1de7c20de348a6ca5fe0d5a18912f4b Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 12:16:13 +0200 +Subject: [PATCH 4/4] refactor a009531, a008851 and a011270 + +1. Add 'load conditional', 'jump condidional' and 'jump' to PBI +instructions. +2. Use SVR register to execute the PCIe workarounds on the relevant rev +of the device. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160asi/a009531_a008851.rcw | 96 +++++++++++++++++++++++++++++++++++ + lx2160asi/a011270.rcw | 6 +++ + rcw.py | 28 ++++++++++ + 3 files changed, 130 insertions(+) + create mode 100644 lx2160asi/a009531_a008851.rcw + +diff --git a/lx2160asi/a009531_a008851.rcw b/lx2160asi/a009531_a008851.rcw +new file mode 100644 +index 0000000..0eb7051 +--- /dev/null ++++ b/lx2160asi/a009531_a008851.rcw +@@ -0,0 +1,96 @@ ++/* ++ * Work-around for erratum A-009531 ++ * ++ * Description: ++ * As defined in section 2.2.6.4, Relaxed Ordering and ID-Based Ordering (IDO) ++ * Attributes of the PCI Express Base Specification Rev 3.1, “A Completer ++ * is permitted to set IDO only if the IDO Completion Enable bit in the Device ++ * Control 2 Register is set. It is not required to copy the value of IDO from ++ * the Request into the Completion(s) for that Request". ++ * ++ * However, the PCI Express controller as the completer sets the IDO bit in the ++ * completion packet header, in response to non-posted requests (memory read) with ++ * IDO bit set in the packet header, even if the IDO Completion Enable bit in the ++ * Device Control 2 Register is not set. ++ * ++ * Impact: ++ * The PCI Express controller as the completer sends completion packets with IDO ++ * bit set in packet header even when the IDO Completion Enable bit is cleared in ++ * the controller’s Device Control 2 Register. ++ * Applicable for SNP PCIe controller ++ */ ++ ++/* ++ * Work-around for erratum A-008851 ++ * ++ * Invalid transmitter/receiver preset values are used in Gen3 equalization ++ * phases during link training for RC mode ++ * This errata is valid only for PCI gen3. ++ * Workaround: ++ * write 0x00000001 to MISC_CONTROL_1_OFF ++ * write 0x4747 to Lane Equalization Control register for each lane ++ * Applicable for SNP PCIe controller ++ */ ++ ++.pbi ++/* Load condition SVR register mask major ID */ ++loadc 0x01e000a4,0x000000f0 ++ ++/* If it is rev 2, skip the following jump command */ ++jumpc 0x00000014,0x00000020 ++ ++/* Jump all the below instructions */ ++jump 0x190 /* All instruction below including the jump are 0x190 bytes */ ++ ++loadc 0x01ea1080,0x70000000 ++jumpc 0x00000034,0x00000000 ++write 0x03400098,0x00000000 ++write 0x034008bc,0x00000001 ++write 0x03400154,0x47474747 ++write 0x03400158,0x47474747 ++write 0x034008bc,0x00000000 ++ ++loadc 0x01ea1080,0x00700000 ++jumpc 0x00000034,0x00000000 ++write 0x03500098,0x00000000 ++write 0x035008bc,0x00000001 ++write 0x03500154,0x47474747 ++write 0x03500158,0x47474747 ++write 0x035008bc,0x00000000 ++ ++loadc 0x01eb1080,0x70000000 ++jumpc 0x00000044,0x00000000 ++write 0x03600098,0x00000000 ++write 0x036008bc,0x00000001 ++write 0x03600164,0x47474747 ++write 0x03600168,0x47474747 ++write 0x0360016c,0x47474747 ++write 0x03600170,0x47474747 ++write 0x036008bc,0x00000000 ++ ++loadc 0x01eb1080,0x00700000 ++jumpc 0x00000034,0x00000000 ++write 0x03700098,0x00000000 ++write 0x037008bc,0x00000001 ++write 0x03700154,0x47474747 ++write 0x03700158,0x47474747 ++write 0x037008bc,0x00000000 ++ ++loadc 0x01ec1080,0x70000000 ++jumpc 0x00000044,0x00000000 ++write 0x03800098,0x00000000 ++write 0x038008bc,0x00000001 ++write 0x03800164,0x47474747 ++write 0x03800168,0x47474747 ++write 0x0380016c,0x47474747 ++write 0x03800170,0x47474747 ++write 0x038008bc,0x00000000 ++ ++loadc 0x01ec1080,0x00700000 ++jumpc 0x00000034,0x00000000 ++write 0x03900098,0x00000000 ++write 0x039008bc,0x00000001 ++write 0x03900154,0x47474747 ++write 0x03900158,0x47474747 ++write 0x039008bc,0x00000000 ++.end +diff --git a/lx2160asi/a011270.rcw b/lx2160asi/a011270.rcw +index 0dc774d..5bd5558 100644 +--- a/lx2160asi/a011270.rcw ++++ b/lx2160asi/a011270.rcw +@@ -4,6 +4,12 @@ + */ + + .pbi ++/* Load condition SVR register mask major ID */ ++loadc 0x01e000a4,0x000000f0 ++/* If it is rev 1, skip the following jump command */ ++jumpc 0x00000014,0x00000010 ++/* Skip the following instructions by jumping to the end */ ++jump 0x38 + write 0x03400688,0x00000001 + write 0x03500688,0x00000001 + write 0x03600688,0x00000001 +diff --git a/rcw.py b/rcw.py +index 863f755..c2d06f6 100755 +--- a/rcw.py ++++ b/rcw.py +@@ -328,6 +328,34 @@ def build_pbi(lines): + v2 = struct.pack(endianess + 'L', p2) + subsection += v1 + subsection += v2 ++ elif op == 'loadc': ++ if p1 == None or p2 == None: ++ print('Error: "loadc" instruction requires two parameters') ++ return '' ++ v1 = struct.pack(endianess + 'L', 0x80140000) ++ v2 = struct.pack(endianess + 'L', p1) ++ v3 = struct.pack(endianess + 'L', p2) ++ subsection += v1 ++ subsection += v2 ++ subsection += v3 ++ elif op == 'jumpc': ++ if p1 == None or p2 == None: ++ print('Error: "jumpc" instruction requires two parameters') ++ return '' ++ v1 = struct.pack(endianess + 'L', 0x80850000) ++ v2 = struct.pack(endianess + 'L', p1) ++ v3 = struct.pack(endianess + 'L', p2) ++ subsection += v1 ++ subsection += v2 ++ subsection += v3 ++ elif op == 'jump': ++ if p1 == None: ++ print('Error: "jump" instruction requires a parameter') ++ return '' ++ v1 = struct.pack(endianess + 'L', 0x80840000) ++ v2 = struct.pack(endianess + 'L', p1) ++ subsection += v1 ++ subsection += v2 + elif op == 'awrite': + if p1 == None or p2 == None: + print('Error: "awrite" instruction requires two parameters') +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch new file mode 100644 index 00000000..68091513 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch @@ -0,0 +1,32 @@ +From 2ebdb6a46e6db66cc0b09c51260a90ea8abc4713 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 12:35:04 +0200 +Subject: [PATCH 6/8] lx2160a: add SVR check for a050234 to apply only on rev1 + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160asi/a050234.rcw | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/lx2160asi/a050234.rcw b/lx2160asi/a050234.rcw +index 72a40e4..2130709 100644 +--- a/lx2160asi/a050234.rcw ++++ b/lx2160asi/a050234.rcw +@@ -4,6 +4,12 @@ + */ + + .pbi ++/* Load condition SVR register mask major ID */ ++loadc 0x01e000a4,0x000000f0 ++/* If it is rev 1, skip the following jump command */ ++jumpc 0x00000014,0x00000010 ++/* Skip the following instructions by jumping to the end */ ++jump 0xc8 + write 0x1ea1200,0x20081004 + write 0x1ea1240,0x20081004 + write 0x1ea1280,0x20081004 +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch new file mode 100644 index 00000000..9074b5cc --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch @@ -0,0 +1,95 @@ +From 6d634d64528e5ba510c369a2ae19c337ae7d692e Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 12:36:20 +0200 +Subject: [PATCH 7/8] lx2160acex7 - pcie workarounds and fan full speed + +1. Moves calling the workarounds to the _defaults.rcwi +2. Toggle fan-full-speed GPIO. The fan controller starts throttling when +a driver exists (i.e. kernel); in order to avoid overheating until then +enable full speed. +3. Run a050234.rcw on rev1 - fixes some issues observed when using Mellanox +ConnectX-5 NICs +4. Run a009531 and a00885 on rev2. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/configs/lx2160a_defaults.rcwi | 21 +++++++++++++++++---- + lx2160acex7/configs/lx2160a_sdboot.rcwi | 6 ------ + lx2160acex7/configs/lx2160a_xspiboot.rcwi | 6 ------ + 3 files changed, 17 insertions(+), 16 deletions(-) + +diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi +index 3ea7683..7af1f5b 100644 +--- a/lx2160acex7/configs/lx2160a_defaults.rcwi ++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi +@@ -1,10 +1,6 @@ + #include <../lx2160asi/lx2160a.rcwi> + MEM_PLL_CFG=3 + MEM2_PLL_CFG=3 +-C5_PLL_SEL=0 +-C6_PLL_SEL=0 +-C7_PLL_SEL=0 +-C8_PLL_SEL=0 + HWA_CGA_M1_CLK_SEL=1 + HWA_CGB_M1_CLK_SEL=7 + BOOT_LOC=26 +@@ -22,3 +18,20 @@ IRQ07_04_PMUX=1 + IRQ11_08_PMUX=1 + EVT20_PMUX=1 + EVT43_PMUX=1 ++ ++/* Drive the fan full speed pin */ ++.pbi ++write 0x2320000,0x20000000 ++.end ++ ++/* Errata for SATA controller */ ++#include <../lx2160asi/a010554.rcw> ++ ++/* Errata for rev 1 PCIe controller */ ++#include <../lx2160asi/a011270.rcw> ++ ++/* Errata a050234 - fix elastic buffer threshold in rev 1 */ ++#include <../lx2160asi/a050234.rcw> ++ ++/* LX2 rev 2 PCIe Errata A-009531 and A-008851*/ ++#include <../lx2160asi/a009531_a008851.rcw> +diff --git a/lx2160acex7/configs/lx2160a_sdboot.rcwi b/lx2160acex7/configs/lx2160a_sdboot.rcwi +index d537ea5..9086ffc 100644 +--- a/lx2160acex7/configs/lx2160a_sdboot.rcwi ++++ b/lx2160acex7/configs/lx2160a_sdboot.rcwi +@@ -9,12 +9,6 @@ blockcopy 0x08,0x00100000,0x1800a000,0x00020000 + /* Boot Location Pointer */ + #include <../lx2160asi/bootlocptr_sd.rcw> + +-/* Errata for SATA controller */ +-#include <../lx2160asi/a010554.rcw> +- +-/* Errata for PCIe controller */ +-#include <../lx2160asi/a011270.rcw> +- + /* common PBI commands */ + #include <../lx2160asi/common.rcw> + +diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +index 28310c9..fa092c9 100644 +--- a/lx2160acex7/configs/lx2160a_xspiboot.rcwi ++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi +@@ -4,12 +4,6 @@ + /* Boot Location Pointer */ + #include <../lx2160asi/bootlocptr_nor.rcw> + +-/* Errata for SATA controller */ +-#include <../lx2160asi/a010554.rcw> +- +-/* Errata for PCIe controller */ +-#include <../lx2160asi/a011270.rcw> +- + /* common PBI commands */ + #include <../lx2160asi/common.rcw> + +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0008-lx2160a-add-generic-bootloc-section.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0008-lx2160a-add-generic-bootloc-section.patch new file mode 100644 index 00000000..820f7b21 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0008-lx2160a-add-generic-bootloc-section.patch @@ -0,0 +1,113 @@ +From f7f0ad5e568862f7dc70fbd0f790845ee576734d Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Tue, 24 Mar 2020 03:42:14 +0200 +Subject: [PATCH 8/8] lx2160a: add generic bootloc section + +The generic bootloc section does conditional blockcopy from SD/eMMC and +SPI with some predefined addresses. +Later on if ATF is used; those addresses are modified with ATF's +create_pbl.c + +With this method a single boot image is unified for all the 3 different +boot methods. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/configs/lx2160a_defaults.rcwi | 12 +++++ + lx2160asi/bootlocptr.rcw | 62 +++++++++++++++++++++++ + 2 files changed, 74 insertions(+) + create mode 100644 lx2160asi/bootlocptr.rcw + +diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi +index 7af1f5b..7997d49 100644 +--- a/lx2160acex7/configs/lx2160a_defaults.rcwi ++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi +@@ -35,3 +35,15 @@ write 0x2320000,0x20000000 + + /* LX2 rev 2 PCIe Errata A-009531 and A-008851*/ + #include <../lx2160asi/a009531_a008851.rcw> ++ ++/* Unified boot location copy */ ++#include <../lx2160asi/bootlocptr.rcw> ++ ++/* Errata to write on scratch reg for validation */ ++#include <../lx2160asi/scratchrw1.rcw> ++ ++/* common PBI commands */ ++#include <../lx2160asi/common.rcw> ++ ++/* Modify FlexSPI Clock Divisor value - for now keep it fixed value but using loadc/jumpc/jump it can be calculated on the fly */ ++#include <../lx2160asi/flexspi_divisor_28.rcw> +diff --git a/lx2160asi/bootlocptr.rcw b/lx2160asi/bootlocptr.rcw +new file mode 100644 +index 0000000..645182f +--- /dev/null ++++ b/lx2160asi/bootlocptr.rcw +@@ -0,0 +1,62 @@ ++/* ++ * Generic code for auto booting. ++ * For each section blockcopy followed by write to bootlocl then bootloch must ++ * be followed in each section since when using ATF with create_pbl script in ++ * auto mode; it counts on the sequence of to be in that order. ++ */ ++ ++/* Boot from SD - copy SPL Uboot to Ocram */ ++.pbi ++/* Load condition PORSR1 and mask RCW_SRC */ ++loadc 0x01e00000,0x07800000 ++ ++/* If it is 0x8 << 23 then skip the following jump command */ ++jumpc 0x00000014,0x04000000 ++ ++/* Jump all the below instructions */ ++jump 0x28 /* All instruction below including the jump are 40 bytes */ ++ ++/* blockcopy must be followed by two writes to bootlocl and bootloch */ ++blockcopy 0x08,0x00100000,0x1800a000,0x00020000 ++write 0x01e00400,0x1800a000 ++write 0x01e00404,0x00000000 ++.end ++ ++/* Boot from eMMC - copy SPL Uboot to Ocram */ ++.pbi ++/* Load condition PORSR1 and mask RCW_SRC */ ++loadc 0x01e00000,0x07800000 ++ ++/* If it is 0x9 << 23 then skip the following jump command */ ++jumpc 0x00000014,0x04800000 ++ ++/* Jump all the below instructions */ ++jump 0x28 /* All instruction below including the jump are 40 bytes */ ++ ++/* blockcopy must be followed by two writes to bootlocl and bootloch */ ++blockcopy 0x09,0x00100000,0x1800a000,0x00020000 ++write 0x01e00400,0x1800a000 ++write 0x01e00404,0x00000000 ++.end ++ ++/* XSPI boot Location Pointer */ ++/* ++ * Set the boot location pointer to the NOR flash boot area. ++ */ ++ ++.pbi ++/* Load condition PORSR1 and mask RCW_SRC */ ++loadc 0x01e00000,0x07800000 ++ ++/* If it is 0xf << 23 then skip the following jump command */ ++jumpc 0x00000014,0x07800000 ++ ++/* Jump all the below instructions */ ++jump 0x28 /* All instruction below including the jump are 0x190 bytes */ ++ ++/* blockcopy must be followed by two writes to bootlocl and bootloch */ ++blockcopy 0x0f,0x00100000,0x1800a000,0x00020000 ++write 0x01e00400,0x20100000 ++write 0x01e00404,0x00000000 ++.end ++ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0009-lx2160acex7-remove-all-predefined-RCW-files.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0009-lx2160acex7-remove-all-predefined-RCW-files.patch new file mode 100644 index 00000000..20d77e6f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw-lx2160acex7/0009-lx2160acex7-remove-all-predefined-RCW-files.patch @@ -0,0 +1,301 @@ +From 151f650f383fc5ddd9c405cf96bc189c2eaf13bd Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Tue, 24 Mar 2020 03:51:28 +0200 +Subject: [PATCH 9/9] lx2160acex7: remove all predefined RCW files + +Remove all predefined RCW files and use on-the-fly created RCW from +external script. +For instance when using lx2160a_build repo; the runme.sh file creates +lx2160acex7/RCW/template.rcw file the gets compiled. +The creation is done using a simple bash script - + +cd $ROOTDIR/build/rcw/lx2160acex7 +mkdir -p RCW +echo "#include <configs/lx2160a_defaults.rcwi>" > RCW/template.rcw +echo "#include <configs/lx2160a_${SPEED}.rcwi>" >> RCW/template.rcw +echo "#include <configs/lx2160a_${SERDES}.rcwi>" >> RCW/template.rcw +make clean +make -j${PARALLEL} + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig | 61 ------------------- + .../rcw_1900_600_2600_17_4_2.rcw | 4 -- + .../rcw_1900_600_2600_17_4_2_sd.rcw | 4 -- + .../rcw_2000_700_2400_13_5_2_sd.rcw | 4 -- + .../rcw_2000_700_2400_20_5_2_sd.rcw | 4 -- + .../rcw_2000_700_2400_8_5_2_sd.rcw | 4 -- + .../rcw_2000_700_2600_8_5_2_sd.rcw | 4 -- + .../rcw_2000_700_2900_17_4_2_sd.rcw | 4 -- + .../rcw_2000_700_2900_8_5_2_sd.rcw | 4 -- + .../rcw_2000_700_3200_17_4_2_sd.rcw | 4 -- + .../rcw_2000_700_3200_20_5_2_sd.rcw | 4 -- + .../rcw_2000_700_3200_8_5_0_sd.rcw | 4 -- + .../rcw_2000_700_3200_8_5_2_sd.rcw | 4 -- + .../rcw_2000_700_3200_8_5_2_xspi.rcw | 4 -- + .../rcw_2400_700_3200_8_5_2_sd.rcw | 4 -- + .../rcw_2500_700_3200_8_5_2_sd.rcw | 4 -- + .../rcw_2600_700_3200_8_5_2_sd.rcw | 4 -- + .../XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw | 4 -- + 18 files changed, 129 deletions(-) + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw + delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw + +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig +deleted file mode 100644 +index cdb6446..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig ++++ /dev/null +@@ -1,61 +0,0 @@ +-/* +- * SerDes Protocol 1 - 19 +- * SerDes Protocol 2 - 5 +- * SerDes Protocol 3 - 2 +- * +- * Frequencies: +- * Core -- 1900 MHz +- * Platform -- 600 MHz +- * DDR -- 2600 MT/s +- */ +- +-#include <../lx2160asi/lx2160a.rcwi> +- +-SYS_PLL_RAT=12 +-MEM_PLL_CFG=3 +-MEM_PLL_RAT=26 +-MEM2_PLL_CFG=3 +-MEM2_PLL_RAT=26 +-CGA_PLL1_RAT=19 +-CGA_PLL2_RAT=19 +-CGB_PLL1_RAT=19 +-CGB_PLL2_RAT=9 +-C5_PLL_SEL=0 +-C6_PLL_SEL=0 +-C7_PLL_SEL=0 +-C8_PLL_SEL=0 +-HWA_CGA_M1_CLK_SEL=1 +-HWA_CGB_M1_CLK_SEL=7 +-BOOT_LOC=26 +-SYSCLK_FREQ=600 +-IIC2_PMUX=6 +-IIC3_PMUX=2 +-IIC4_PMUX=2 +-USB3_CLK_FSEL=39 +-SRDS_PRTCL_S1=19 +-SRDS_PRTCL_S2=5 +-SRDS_PRTCL_S3=2 +-SRDS_PLL_REF_CLK_SEL_S1=2 +-SRDS_DIV_PEX_S1=1 +-SRDS_DIV_PEX_S2=3 +-SRDS_DIV_PEX_S3=1 +- +-/* Errata to write on scratch reg for validation */ +-#include <../lx2160asi/scratchrw1.rcw> +- +-/* Copy SPL Uboot to Ocram */ +-.pbi +-blockcopy 0x08,0x00100000,0x1800a000,0x00020000 +-.end +- +-/* Boot Location Pointer */ +-#include <../lx2160asi/bootlocptr_sd.rcw> +- +-/* Errata for SATA controller */ +-#include <../lx2160asi/a010554.rcw> +- +-/* Modify FlexSPI Clock Divisor value */ +-#include <../lx2160asi/flexspi_divisor_24.rcw> +- +-/* common PBI commands */ +-#include <../lx2160asi/common.rcw> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw +deleted file mode 100644 +index 13ab0b9..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_1900_600_2600.rcwi> +-#include <configs/lx2160a_17_4_2.rcwi> +-#include <configs/lx2160a_xspiboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw +deleted file mode 100644 +index 14fae8c..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_1900_600_2600.rcwi> +-#include <configs/lx2160a_17_4_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw +deleted file mode 100644 +index 2dae5a2..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2400.rcwi> +-#include <configs/lx2160a_13_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw +deleted file mode 100644 +index 5335072..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2400.rcwi> +-#include <configs/lx2160a_20_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw +deleted file mode 100644 +index e2a5bd3..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2400.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw +deleted file mode 100644 +index a330bfe..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2600.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw +deleted file mode 100644 +index 8535dbd..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2900.rcwi> +-#include <configs/lx2160a_17_4_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw +deleted file mode 100644 +index 698be01..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_2900.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw +deleted file mode 100644 +index 780d8c3..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_3200.rcwi> +-#include <configs/lx2160a_17_4_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw +deleted file mode 100644 +index eb9d240..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_3200.rcwi> +-#include <configs/lx2160a_20_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw +deleted file mode 100644 +index ceb53a3..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_3200.rcwi> +-#include <configs/lx2160a_8_5_0.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw +deleted file mode 100644 +index a220e98..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_3200.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw +deleted file mode 100644 +index 1eabd7d..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2000_700_3200.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_xspiboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw +deleted file mode 100644 +index 2ac59b1..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2400_700_3200.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw +deleted file mode 100644 +index e7c08df..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2500_700_3200.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw +deleted file mode 100644 +index 1e7a8f7..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_2600_700_3200.rcwi> +-#include <configs/lx2160a_8_5_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw +deleted file mode 100644 +index 86f12f8..0000000 +--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw ++++ /dev/null +@@ -1,4 +0,0 @@ +-#include <configs/lx2160a_defaults.rcwi> +-#include <configs/lx2160a_test.rcwi> +-#include <configs/lx2160a_17_4_2.rcwi> +-#include <configs/lx2160a_sdboot.rcwi> +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw_git.bbappend b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw_git.bbappend new file mode 100644 index 00000000..4384c042 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/rcw/rcw_git.bbappend @@ -0,0 +1,29 @@ +FILESEXTRAPATHS_append_lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:" + +SRC_URI_append_lx2160acex7 = "\ + file://0001-lx2160acex7-misc-RCW-files.patch \ + file://0002-Set-io-pads-as-GPIO.patch \ + file://0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch \ + file://0004-refactor-a009531-a008851-and-a011270.patch \ + file://0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch \ + file://0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch \ + file://0008-lx2160a-add-generic-bootloc-section.patch \ + file://0009-lx2160acex7-remove-all-predefined-RCW-files.patch \ +" + +do_configure_prepend_lx2160acex7 () { + for BT in ${BOARD_TARGETS} + do + mkdir -p ${S}/${BOARD_TARGETS}/${SERDES} + cat <<EOF >${S}/${BOARD_TARGETS}/README +The RCW directories for lx2160acex7 are created based on existing SERDES +configuration. Currently created automatically - later maybe by building +cross product of serdes & ddr speeds in a final commit. +EOF + cat <<EOF >${S}/${BOARD_TARGETS}/${SERDES}/${SPEED}.rcw +#include <configs/lx2160a_defaults.rcwi> +#include <configs/lx2160a_${SPEED}.rcwi> +#include <configs/lx2160a_${SERDES}.rcwi> +EOF + done +} diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-common_2018.07.inc b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-common_2018.07.inc index 59b17cce..d5adb0e5 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-common_2018.07.inc +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-common_2018.07.inc @@ -4,10 +4,10 @@ LIC_FILES_CHKSUM = "file://Licenses/README;md5=30503fd321432fc713238f582193b78e" PV = "v2018.07+git${SRCPV}" -SRCREV = "ca185fc7406207da613c728935f534a4054674f1" +SRCREV = "17fe0ef3aff3abc3908c854bfab1c283ed84d9c0" SRCBRANCH = "boundary-v2018.07" SRC_URI = "git://github.com/boundarydevices/u-boot-imx6.git;branch=${SRCBRANCH}" S = "${WORKDIR}/git" - +B = "${WORKDIR}/build" PACKAGE_ARCH = "${MACHINE_ARCH}" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils/aarch64/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils/aarch64/fw_env.config deleted file mode 100644 index eccfb0f4..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils/aarch64/fw_env.config +++ /dev/null @@ -1 +0,0 @@ -/dev/mmcblk0boot0 0x1fe000 0x2000 0x1000 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils_2018.07.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils_2018.07.bb deleted file mode 100644 index 6b8fb867..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils_2018.07.bb +++ /dev/null @@ -1,46 +0,0 @@ -require u-boot-boundary-common_${PV}.inc - -SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities" -DEPENDS += "mtd-utils bison-native" - -FILESEXTRAPATHS_prepend_mx6 := "${THISDIR}/${PN}/arm:" -FILESEXTRAPATHS_prepend_mx7 := "${THISDIR}/${PN}/arm:" -FILESEXTRAPATHS_prepend_mx8 := "${THISDIR}/${PN}/aarch64:" - -SRC_URI += " \ - file://fw_env.config \ -" - -INSANE_SKIP_${PN} = "already-stripped" -EXTRA_OEMAKE_class-target = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${CC} ${CFLAGS} ${LDFLAGS}" HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}" V=1' -EXTRA_OEMAKE_class-cross = 'ARCH=${TARGET_ARCH} CC="${CC} ${CFLAGS} ${LDFLAGS}" V=1' - -inherit uboot-config - -do_compile () { - oe_runmake ${UBOOT_MACHINE} - oe_runmake envtools -} - -do_install () { - install -Dm 0755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_printenv - install -Dm 0755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_setenv - install -Dm 0644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config -} - -do_install_class-cross () { - install -d ${D}${bindir_cross} - install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_printenv - install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_setenv -} - -SYSROOT_PREPROCESS_FUNCS_class-cross = "uboot_fw_utils_cross" -uboot_fw_utils_cross() { - sysroot_stage_dir ${D}${bindir_cross} ${SYSROOT_DESTDIR}${bindir_cross} -} - -RPROVIDES_${PN} += "u-boot-fw-utils" - -BBCLASSEXTEND = "cross" - -COMPATIBLE_MACHINE = "(imx)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary/aarch64/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary/aarch64/fw_env.config new file mode 100644 index 00000000..b69cec9e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary/aarch64/fw_env.config @@ -0,0 +1 @@ +/dev/mmcblk0boot0 0x3fe000 0x2000 0x1000 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils/arm/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary/arm/fw_env.config index 571e829c..571e829c 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary-fw-utils/arm/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary/arm/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary_2018.07.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary_2018.07.bb index d9417f54..7463eeea 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary_2018.07.bb +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-boundary_2018.07.bb @@ -1,17 +1,23 @@ require recipes-bsp/u-boot/u-boot.inc require recipes-bsp/u-boot/u-boot-boundary-common_${PV}.inc +FILESEXTRAPATHS_prepend_mx6 := "${THISDIR}/${PN}/arm:" +FILESEXTRAPATHS_prepend_mx7 := "${THISDIR}/${PN}/arm:" +FILESEXTRAPATHS_prepend_mx8 := "${THISDIR}/${PN}/aarch64:" + DEPENDS += "bison-native" +SRC_URI += "file://fw_env.config" + PROVIDES += "u-boot" BOOT_TOOLS = "imx-boot-tools" -do_deploy_append_mx8mq () { +do_deploy_append_mx8 () { install -d ${DEPLOYDIR}/${BOOT_TOOLS} install -m 0777 ${B}/${config}/arch/arm/dts/${UBOOT_DTB_NAME} ${DEPLOYDIR}/${BOOT_TOOLS} install -m 0777 ${B}/${config}/tools/mkimage ${DEPLOYDIR}/${BOOT_TOOLS}/mkimage_uboot - install -m 0777 ${B}/${config}/u-boot-nodtb.bin ${DEPLOYDIR}/${BOOT_TOOLS} + install -m 0777 ${B}/${config}/u-boot-nodtb.bin ${DEPLOYDIR}/${BOOT_TOOLS}/u-boot-nodtb.bin-${MACHINE}-${UBOOT_CONFIG} } -COMPATIBLE_MACHINE = "(nitrogen6x-lite|nitrogen6x|nitrogen6sx|nitrogen7|nitrogen8m)" +COMPATIBLE_MACHINE = "(nitrogen6x-lite|nitrogen6x|nitrogen6sx|nitrogen7|nitrogen8m|nitrogen8mm|nitrogen8mn)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-compulab_2014.10.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-compulab_2014.10.bb deleted file mode 100644 index 02651e09..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-compulab_2014.10.bb +++ /dev/null @@ -1,17 +0,0 @@ -require recipes-bsp/u-boot/u-boot.inc - -DESCRIPTION = "u-boot which includes support for CompuLab boards." -LICENSE = "GPLv2+" -LIC_FILES_CHKSUM = "file://configs/cm_fx6_defconfig;md5=549452418e9e099e5fe19ef1ac65e892" - -PROVIDES += "u-boot" - -SRCBRANCH = "utilite/master" -SRCREV = "6803a75f3d40bee3b53f56e7b49c70465819b7ca" -SRC_URI = "git://github.com/utilite-computer/u-boot.git;branch=${SRCBRANCH}" -SRC_URI[md5sum] = "fd8234c5b3a460430689848c1f16acef" - -S = "${WORKDIR}/git" - -PACKAGE_ARCH = "${MACHINE_ARCH}" -COMPATIBLE_MACHINE = "cm-fx6" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi/ccimx6ul/bootscript.txt b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi/ccimx6ul/bootscript.txt deleted file mode 100644 index 06b42bed..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi/ccimx6ul/bootscript.txt +++ /dev/null @@ -1,7 +0,0 @@ -# -# U-Boot bootscript for NAND images created by Yocto. -# - -setenv fdt_file imx6ul-ccimx6ulsbcexpress.dtb -setenv zimage zImage-ccimx6ulsbcexpress.bin -dboot linux nand ${mtdbootpart} diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi_2017.03.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi_2017.03.bb deleted file mode 100644 index aa775727..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-digi_2017.03.bb +++ /dev/null @@ -1,40 +0,0 @@ -# Copyright (C) 2018 Digi International -# Released under the MIT license (see COPYING.MIT for the terms) - -DESCRIPTION = "Bootloader for Digi platforms" -SECTION = "bootloaders" -LICENSE = "GPLv2+" -LIC_FILES_CHKSUM = "file://Licenses/README;md5=a2c678cfd4a4d97135585cad908541c6" - -require recipes-bsp/u-boot/u-boot.inc - -DEPENDS = "u-boot-mkimage-native" - -PROVIDES += "u-boot" - -SRCBRANCH = "v2017.03/maint" -SRCREV = "8d60f536d2063ac6a0676bdf34c4c8c8807371c5" - -SRC_URI = "\ - git://github.com/digi-embedded/u-boot.git;protocol=git;nobranch=1 \ - file://bootscript.txt \ -" - -LOCALVERSION ?= "-${SRCBRANCH}" - -S = "${WORKDIR}/git" - -inherit dtc-145 fsl-u-boot-localversion - -UBOOT_ENV = "boot" -UBOOT_ENV_SUFFIX = "scr" - -do_compile_append () { - uboot-mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ - -n "boot script" -d ${WORKDIR}/bootscript.txt \ - ${WORKDIR}/${UBOOT_ENV_BINARY} -} - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -COMPATIBLE_MACHINE = "(ccimx6ul)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-karo_git.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-karo_git.bb deleted file mode 100644 index 2e1f7bb1..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-karo_git.bb +++ /dev/null @@ -1,19 +0,0 @@ -require recipes-bsp/u-boot/u-boot.inc - -DESCRIPTION = "u-boot for Ka-Ro electronics TX Computer-On-Modules." -LICENSE = "GPLv2+" -LIC_FILES_CHKSUM = "file://Licenses/README;md5=0507cd7da8e7ad6d6701926ec9b84c95" - -PROVIDES = "u-boot" - -PV = "v2015.10-rc2+git${SRCPV}" - -SRCREV = "047997571bf2c5bd43058c8e9da8052e09d9111f" -SRCBRANCH = "karo-tx6" -SRC_URI = "git://git.karo-electronics.de/karo-tx-uboot.git;branch=${SRCBRANCH}" - -S = "${WORKDIR}/git" - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -COMPATIBLE_MACHINE = "(tx6[qsu]-.*)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron/fw_env.config new file mode 100644 index 00000000..a296d5d3 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron/fw_env.config @@ -0,0 +1 @@ +/dev/mmcblk0 0xf0000 0x10000 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron_2020.01.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron_2020.01.bb new file mode 100644 index 00000000..ce33f8ef --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-kontron_2020.01.bb @@ -0,0 +1,37 @@ +# Copyright (C) 2012-2019 O.S. Systems Software LTDA. +# Released under the MIT license (see COPYING.MIT for the terms) + +inherit fsl-u-boot-localversion + +require recipes-bsp/u-boot/u-boot.inc + +SUMMARY = "U-Boot for Kontron based boards" +DEPENDS += "bison-native bc-native dtc-native lzop-native" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=30503fd321432fc713238f582193b78e" + +SRC_URI = "git://git.kontron-electronics.de/linux/u-boot.git;protocol=https;branch=${SRCBRANCH} \ + file://fw_env.config \ +" +SRCREV = "3d58441adf3e633279db6c96acb33a7aef4fd6f9" +SRCBRANCH = "v2020.01-ktn" +LOCALVERSION = "-ktn" + +PROVIDES += "u-boot" + +PV .= "+git${SRCPV}" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +# FIXME: Allow linking of 'tools' binaries with native libraries +# used for generating the boot logo and other tools used +# during the build process. +EXTRA_OEMAKE += 'HOSTCC="${BUILD_CC} ${BUILD_CPPFLAGS}" \ + HOSTLDFLAGS="${BUILD_LDFLAGS}" \ + HOSTSTRIP=true' + +PACKAGE_ARCH = "${MACHINE_ARCH}" +COMPATIBLE_MACHINE = "(imx6ul-kontron)" + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0001-armv8-add-lx2160acex7-build-inclusion.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0001-armv8-add-lx2160acex7-build-inclusion.patch new file mode 100644 index 00000000..7837bfff --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0001-armv8-add-lx2160acex7-build-inclusion.patch @@ -0,0 +1,75 @@ +From c24c3ec7d9591cf359ac12f656bd59a5440532f4 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:26:45 +0300 +Subject: [PATCH 01/17] armv8: add lx2160acex7 build inclusion + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm/Kconfig | 13 +++++++++++++ + arch/arm/cpu/armv8/Kconfig | 2 +- + arch/arm/dts/Makefile | 3 ++- + 3 files changed, 16 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 5d33526ae9..8615e1673f 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1189,6 +1189,18 @@ config TARGET_LX2160ARDB + is a high-performance development platform that supports the + QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. + ++config TARGET_LX2160ACEX7 ++ bool "Support lx2160acex7" ++ select ARCH_LX2160A ++ select ARCH_MISC_INIT ++ select ARM64 ++ select ARMV8_MULTIENTRY ++ select BOARD_LATE_INIT ++ help ++ Support for SolidRun LX2160A based com express type 7 module and ++ platform. The lx2160acex7 high-performance platform that supports the ++ QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. ++ + config TARGET_LX2160AQDS + bool "Support lx2160aqds" + select ARCH_LX2160A +@@ -1796,6 +1808,7 @@ source "board/freescale/ls1012aqds/Kconfig" + source "board/freescale/ls1012ardb/Kconfig" + source "board/freescale/ls1012afrdm/Kconfig" + source "board/freescale/lx2160a/Kconfig" ++source "board/solidrun/lx2160a/Kconfig" + source "board/freescale/mx35pdk/Kconfig" + source "board/freescale/s32v234evb/Kconfig" + source "board/grinn/chiliboard/Kconfig" +diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig +index 92a2b58ed4..9df6ebdc1b 100644 +--- a/arch/arm/cpu/armv8/Kconfig ++++ b/arch/arm/cpu/armv8/Kconfig +@@ -109,7 +109,7 @@ config PSCI_RESET + !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ + !TARGET_LS1046AFRWY && \ + !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \ +- !TARGET_LX2160AQDS && \ ++ !TARGET_LX2160AQDS && !TARGET_LX2160ACEX7 && \ + !ARCH_UNIPHIER && !TARGET_S32V234EVB + help + Most armv8 systems have PSCI support enabled in EL3, either through +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 8d7d5bee45..6d8d7fa09e 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -348,7 +348,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ + fsl-ls1028a-qds-duart.dtb \ + fsl-ls1028a-qds-lpuart.dtb \ + fsl-lx2160a-rdb.dtb \ +- fsl-lx2160a-qds.dtb ++ fsl-lx2160a-qds.dtb \ ++ fsl-lx2160a-cex7.dtb + dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ + fsl-ls1043a-qds-lpuart.dtb \ + fsl-ls1043a-rdb.dtb \ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0002-armv8-lx2160acex-misc-hacks-to-get-the-sources-built.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0002-armv8-lx2160acex-misc-hacks-to-get-the-sources-built.patch new file mode 100644 index 00000000..5b8d07f1 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0002-armv8-lx2160acex-misc-hacks-to-get-the-sources-built.patch @@ -0,0 +1,44 @@ +From a8a182b435e96a22b01d722a8df3061c1a1b7da6 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:27:46 +0300 +Subject: [PATCH 02/17] armv8: lx2160acex: misc hacks to get the sources built + +those hacks will be sorted out nicer in the future and this patch will +not be needed anymore + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 - + drivers/mmc/fsl_esdhc.c | 2 +- + 2 files changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +index 42ca990994..efdc31da5d 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig ++++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +@@ -218,7 +218,6 @@ config ARCH_LX2160A + select SYS_FSL_DDR_LE + select SYS_FSL_DDR_VER_50 + select SYS_FSL_EC1 +- select SYS_FSL_EC2 + select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_HAS_RGMII + select SYS_FSL_HAS_SEC +diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c +index f8e6ceba06..f4a7698cfd 100644 +--- a/drivers/mmc/fsl_esdhc.c ++++ b/drivers/mmc/fsl_esdhc.c +@@ -1020,7 +1020,7 @@ static int fsl_esdhc_probe(struct udevice *dev) + priv->non_removable = 0; + } + +- priv->wp_enable = 1; ++ priv->wp_enable = 0; + + if (IS_ENABLED(CONFIG_CLK)) { + /* Assigned clock already set clock */ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0003-armv8-lx2160acex7-defconfig-and-main-platform-includ.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0003-armv8-lx2160acex7-defconfig-and-main-platform-includ.patch new file mode 100644 index 00000000..cb968445 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0003-armv8-lx2160acex7-defconfig-and-main-platform-includ.patch @@ -0,0 +1,192 @@ +From caaf386e5511e8b9708abf9ee52b668019a5b094 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:29:31 +0300 +Subject: [PATCH 03/17] armv8: lx2160acex7: defconfig and main platform include + +This patch add lx2160acex7 main defconfig and main include file. +Notice that the defconfig doesn't support the secured boot mode where a +follow up patch will cover this. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + configs/lx2160acex7_tfa_defconfig | 73 ++++++++++++++++++++++++++ + include/configs/lx2160acex7.h | 85 +++++++++++++++++++++++++++++++ + 2 files changed, 158 insertions(+) + create mode 100644 configs/lx2160acex7_tfa_defconfig + create mode 100644 include/configs/lx2160acex7.h + +diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig +new file mode 100644 +index 0000000000..d59de7d054 +--- /dev/null ++++ b/configs/lx2160acex7_tfa_defconfig +@@ -0,0 +1,73 @@ ++CONFIG_ARM=y ++CONFIG_TARGET_LX2160ACEX7=y ++CONFIG_SYS_TEXT_BASE=0x82000000 ++CONFIG_SYS_MALLOC_F_LEN=0x6000 ++CONFIG_EMC2301=y ++CONFIG_TFABOOT=y ++CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y ++CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y ++CONFIG_AHCI=y ++CONFIG_NR_DRAM_BANKS=3 ++CONFIG_FIT_VERBOSE=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_OF_BOARD_FIXUP=y ++CONFIG_OF_STDOUT_VIA_ALIAS=y ++CONFIG_BOOTDELAY=10 ++CONFIG_USE_BOOTARGS=y ++CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" ++# CONFIG_USE_BOOTCOMMAND is not set ++CONFIG_CMD_GREPENV=y ++CONFIG_CMD_EEPROM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_CACHE=y ++CONFIG_MP=y ++CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-cex7" ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM=y ++CONFIG_SATA_CEVA=y ++CONFIG_FSL_CAAM=y ++CONFIG_DM_MMC=y ++CONFIG_FSL_ESDHC=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_SPANSION=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_MICRON=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_PHYLIB=y ++CONFIG_NETDEVICES=y ++CONFIG_PHY_GIGE=y ++CONFIG_CMD_NET=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_MII=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_EXT2=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_LAYERSCAPE_GEN4=y ++CONFIG_PHY_ATHEROS=y ++CONFIG_E1000=y ++CONFIG_DM_SCSI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SERIAL_PROBE_ALL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_NXP_FSPI=y ++# CONFIG_SYS_NXP_FSPI_AHB=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +diff --git a/include/configs/lx2160acex7.h b/include/configs/lx2160acex7.h +new file mode 100644 +index 0000000000..478cd8242f +--- /dev/null ++++ b/include/configs/lx2160acex7.h +@@ -0,0 +1,85 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2019 SolidRun ltd. ++ */ ++ ++#ifndef __LX2_CEX7_H ++#define __LX2_CEX7_H ++ ++#include "lx2160a_common.h" ++ ++/*#define CONFIG_SYS_FSL_ESDHC_USE_PIO*/ ++/* VID */ ++ ++#define I2C_MUX_CH_VOL_MONITOR 0x2 ++/* Voltage monitor on channel 2*/ ++#define I2C_VOL_MONITOR_ADDR 0x5c ++#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 ++#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 ++#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 ++#define CONFIG_VID_FLS_ENV "lx2160acex7_vdd_mv" ++#define CONFIG_VID ++ ++/* The lowest and highest voltage allowed*/ ++#define VDD_MV_MIN 700 ++#define VDD_MV_MAX 855 ++ ++/* PM Bus commands code for LTC3882*/ ++#define PMBUS_CMD_PAGE 0x0 ++#define PMBUS_CMD_READ_VOUT 0x8B ++#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 ++#define PMBUS_CMD_VOUT_COMMAND 0x21 ++#define PWM_CHANNEL0 0x0 ++ ++#define CONFIG_VOL_MONITOR_LTC3882_SET ++#define CONFIG_VOL_MONITOR_LTC3882_READ ++ ++/* RTC */ ++#define CONFIG_SYS_RTC_BUS_NUM 4 ++ ++/* MAC/PHY configuration */ ++#if defined(CONFIG_FSL_MC_ENET) ++#define CONFIG_MII ++#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" ++ ++#define RGMII_PHY_ADDR1 0x01 ++ ++#endif ++ ++/* EMC2301 */ ++#define I2C_MUX_CH_EMC2301 0x01 ++#define I2C_EMC2301_ADDR 0x2f ++#define I2C_EMC2301_CMD 0x40 ++#define I2C_EMC2301_PWM 0x80 ++ ++/* EEPROM */ ++#undef CONFIG_ID_EEPROM /* Fixme */ ++#define CONFIG_SYS_I2C_EEPROM_NXID ++#define CONFIG_SYS_EEPROM_BUS_NUM 0 ++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 ++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 ++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 ++#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 ++ ++/* Initial environment variables */ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ EXTRA_ENV_SETTINGS \ ++ "lx2160acex7_vdd_mv=800\0" \ ++ "BOARD=lx2160acex7\0" \ ++ "xspi_bootcmd=echo Trying load from flexspi..;" \ ++ "sf probe 0:0 && sf read $load_addr " \ ++ "$kernel_start $kernel_size ; env exists secureboot &&" \ ++ "sf read $kernelheader_addr_r $kernelheader_start " \ ++ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ ++ " bootm $load_addr#$BOARD\0" \ ++ "sd_bootcmd=echo Trying load from sd card..;" \ ++ "mmcinfo; mmc read $load_addr " \ ++ "$kernel_addr_sd $kernel_size_sd ;" \ ++ "env exists secureboot && mmc read $kernelheader_addr_r "\ ++ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ ++ " && esbc_validate ${kernelheader_addr_r};" \ ++ "bootm $load_addr#$BOARD\0" ++ ++#include <asm/fsl_secure_boot.h> ++ ++#endif /* __LX2_CEX7_H */ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0004-armv8-lx2160acex7-common-files-for-platform-support.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0004-armv8-lx2160acex7-common-files-for-platform-support.patch new file mode 100644 index 00000000..cbb2f08c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0004-armv8-lx2160acex7-common-files-for-platform-support.patch @@ -0,0 +1,1720 @@ +From 568555bb88a6d2880e21f736cfda0b89e89957fa Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:31:47 +0300 +Subject: [PATCH 04/17] armv8: lx2160acex7: common files for platform support + +The patch copies and modifies NXP's common platform resources that adds +support to the following - +1. Secureboot +2. Analog devices DC-DC controller +3. EMC2301 PWM fan controller based on NXP's EMC2305 driver + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + board/solidrun/common/Makefile | 24 + + board/solidrun/common/cmd_esbc_validate.c | 85 ++ + board/solidrun/common/emc2301.c | 31 + + board/solidrun/common/emc2301.h | 17 + + board/solidrun/common/fsl_chain_of_trust.c | 164 ++++ + board/solidrun/common/fsl_validate.c | 962 +++++++++++++++++++++ + board/solidrun/common/vid.c | 330 +++++++ + board/solidrun/common/vid.h | 23 + + 8 files changed, 1636 insertions(+) + create mode 100644 board/solidrun/common/Makefile + create mode 100644 board/solidrun/common/cmd_esbc_validate.c + create mode 100644 board/solidrun/common/emc2301.c + create mode 100644 board/solidrun/common/emc2301.h + create mode 100644 board/solidrun/common/fsl_chain_of_trust.c + create mode 100644 board/solidrun/common/fsl_validate.c + create mode 100644 board/solidrun/common/vid.c + create mode 100644 board/solidrun/common/vid.h + +diff --git a/board/solidrun/common/Makefile b/board/solidrun/common/Makefile +new file mode 100644 +index 0000000000..454a18e2f9 +--- /dev/null ++++ b/board/solidrun/common/Makefile +@@ -0,0 +1,24 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# (C) Copyright 2006 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++ ++MINIMAL= ++ ++ifdef CONFIG_SPL_BUILD ++ifdef CONFIG_SPL_INIT_MINIMAL ++MINIMAL=y ++endif ++endif ++ ++ifdef MINIMAL ++# necessary to create built-in.o ++obj- := __dummy__.o ++else ++obj-$(CONFIG_VID) += vid.o ++obj-$(CONFIG_EMC2301) += emc2301.o ++ifdef CONFIG_SECURE_BOOT ++obj-$(CONFIG_CMD_ESBC_VALIDATE) += fsl_validate.o cmd_esbc_validate.o ++endif ++obj-$(CONFIG_CHAIN_OF_TRUST) += fsl_chain_of_trust.o ++endif +diff --git a/board/solidrun/common/cmd_esbc_validate.c b/board/solidrun/common/cmd_esbc_validate.c +new file mode 100644 +index 0000000000..b06235f291 +--- /dev/null ++++ b/board/solidrun/common/cmd_esbc_validate.c +@@ -0,0 +1,85 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2015 Freescale Semiconductor, Inc. ++ */ ++ ++#include <common.h> ++#include <command.h> ++#include <fsl_validate.h> ++ ++int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, ++ char * const argv[]) ++{ ++ if (fsl_check_boot_mode_secure() == 0) { ++ printf("Boot Mode is Non-Secure. Not entering spin loop.\n"); ++ return 0; ++ } ++ ++ printf("Core is entering spin loop.\n"); ++loop: ++ goto loop; ++ ++ return 0; ++} ++ ++#ifndef CONFIG_SPL_BUILD ++static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc, ++ char * const argv[]) ++{ ++ char *hash_str = NULL; ++ uintptr_t haddr; ++ int ret; ++ uintptr_t img_addr = 0; ++ char buf[20]; ++ ++ if (argc < 2) ++ return cmd_usage(cmdtp); ++ else if (argc > 2) ++ /* Second arg - Optional - Hash Str*/ ++ hash_str = argv[2]; ++ ++ /* First argument - header address -32/64bit */ ++ haddr = (uintptr_t)simple_strtoul(argv[1], NULL, 16); ++ ++ /* With esbc_validate command, Image address must be ++ * part of header. So, the function is called ++ * by passing this argument as 0. ++ */ ++ ret = fsl_secboot_validate(haddr, hash_str, &img_addr); ++ ++ /* Need to set "img_addr" even if validation failure. ++ * Required when SB_EN in RCW set and non-fatal error ++ * to continue U-Boot ++ */ ++ sprintf(buf, "%lx", img_addr); ++ env_set("img_addr", buf); ++ ++ if (ret) ++ return 1; ++ ++ printf("esbc_validate command successful\n"); ++ return 0; ++} ++ ++/***************************************************/ ++static char esbc_validate_help_text[] = ++ "esbc_validate hdr_addr <hash_val> - Validates signature using\n" ++ " RSA verification\n" ++ " $hdr_addr Address of header of the image\n" ++ " to be validated.\n" ++ " $hash_val -Optional\n" ++ " It provides Hash of public/srk key to be\n" ++ " used to verify signature.\n"; ++ ++U_BOOT_CMD( ++ esbc_validate, 3, 0, do_esbc_validate, ++ "Validates signature on a given image using RSA verification", ++ esbc_validate_help_text ++); ++ ++U_BOOT_CMD( ++ esbc_halt, 1, 0, do_esbc_halt, ++ "Put the core in spin loop (Secure Boot Only)", ++ "" ++); ++#endif +diff --git a/board/solidrun/common/emc2301.c b/board/solidrun/common/emc2301.c +new file mode 100644 +index 0000000000..a4780dbfcc +--- /dev/null ++++ b/board/solidrun/common/emc2301.c +@@ -0,0 +1,31 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2019 SolidRun ltd. Based on code from NXP LX2160A RDB ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include <common.h> ++#include <command.h> ++#include <i2c.h> ++#include <asm/io.h> ++ ++#include "emc2301.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++void set_fan_speed(u8 data) ++{ ++ if (i2c_write(I2C_EMC2301_ADDR, I2C_EMC2301_FAN, 1, &data, 1) != 0) { ++ puts("Error: failed to change fan speed\n"); ++ } ++} ++ ++void emc2301_init(void) ++{ ++ u8 data; ++ ++ data = I2C_EMC2301_CMD; ++ if (i2c_write(I2C_EMC2301_ADDR, I2C_EMC2301_CONF, 1, &data, 1) != 0) ++ puts("Error: failed to configure EMC2301\n"); ++} +diff --git a/board/solidrun/common/emc2301.h b/board/solidrun/common/emc2301.h +new file mode 100644 +index 0000000000..a5ceb73b7c +--- /dev/null ++++ b/board/solidrun/common/emc2301.h +@@ -0,0 +1,17 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2019 SolidRun ltd. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __EMC2301_H_ ++#define __EMC2301_H_ ++ ++#define I2C_EMC2301_CONF 0x20 ++#define I2C_EMC2301_FAN 0x30 ++ ++void emc2301_init(void); ++void set_fan_speed(u8 data); ++ ++#endif /* __EMC2305_H_ */ +diff --git a/board/solidrun/common/fsl_chain_of_trust.c b/board/solidrun/common/fsl_chain_of_trust.c +new file mode 100644 +index 0000000000..dddfd26a13 +--- /dev/null ++++ b/board/solidrun/common/fsl_chain_of_trust.c +@@ -0,0 +1,164 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2015 Freescale Semiconductor, Inc. ++ */ ++ ++#include <common.h> ++#include <dm.h> ++#include <fsl_validate.h> ++#include <fsl_secboot_err.h> ++#include <fsl_sfp.h> ++#include <dm/root.h> ++ ++#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK) ++#include <spl.h> ++#endif ++ ++#ifdef CONFIG_ADDR_MAP ++#include <asm/mmu.h> ++#endif ++ ++#ifdef CONFIG_FSL_CORENET ++#include <asm/fsl_pamu.h> ++#endif ++ ++#ifdef CONFIG_ARCH_LS1021A ++#include <asm/arch/immap_ls102xa.h> ++#endif ++ ++#if defined(CONFIG_MPC85xx) ++#define CONFIG_DCFG_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR ++#else ++#define CONFIG_DCFG_ADDR CONFIG_SYS_FSL_GUTS_ADDR ++#endif ++ ++#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE ++#define gur_in32(a) in_le32(a) ++#else ++#define gur_in32(a) in_be32(a) ++#endif ++ ++/* Check the Boot Mode. If Secure, return 1 else return 0 */ ++int fsl_check_boot_mode_secure(void) ++{ ++ uint32_t val; ++ struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ++ struct ccsr_gur __iomem *gur = (void *)(CONFIG_DCFG_ADDR); ++ ++ val = sfp_in32(&sfp_regs->ospr) & ITS_MASK; ++ if (val == ITS_MASK) ++ return 1; ++ ++#if defined(CONFIG_FSL_CORENET) || !defined(CONFIG_MPC85xx) ++ /* For PBL based platforms check the SB_EN bit in RCWSR */ ++ val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK; ++ if (val == RCW_SB_EN_MASK) ++ return 1; ++#endif ++ ++#if defined(CONFIG_MPC85xx) && !defined(CONFIG_FSL_CORENET) ++ /* For Non-PBL Platforms, check the Device Status register 2*/ ++ val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK; ++ if (val != MPC85xx_PORDEVSR2_SBC_MASK) ++ return 1; ++ ++#endif ++ return 0; ++} ++ ++#ifndef CONFIG_SPL_BUILD ++int fsl_setenv_chain_of_trust(void) ++{ ++ /* Check Boot Mode ++ * If Boot Mode is Non-Secure, no changes are required ++ */ ++ if (fsl_check_boot_mode_secure() == 0) ++ return 0; ++ ++ /* If Boot mode is Secure, set the environment variables ++ * bootdelay = 0 (To disable Boot Prompt) ++ * bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) ++ */ ++ env_set("bootdelay", "-2"); ++ ++#ifdef CONFIG_ARM ++ env_set("secureboot", "y"); ++#else ++ env_set("bootcmd", CONFIG_CHAIN_BOOT_CMD); ++#endif ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_SPL_BUILD ++void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr) ++{ ++ int res; ++ ++ /* ++ * Check Boot Mode ++ * If Boot Mode is Non-Secure, skip validation ++ */ ++ if (fsl_check_boot_mode_secure() == 0) ++ return; ++ ++ printf("SPL: Validating U-Boot image\n"); ++ ++#ifdef CONFIG_ADDR_MAP ++ init_addr_map(); ++#endif ++ ++#ifdef CONFIG_FSL_CORENET ++ if (pamu_init() < 0) ++ fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); ++#endif ++ ++#ifdef CONFIG_FSL_CAAM ++ if (sec_init() < 0) ++ fsl_secboot_handle_error(ERROR_ESBC_SEC_INIT); ++#endif ++ ++/* ++ * dm_init_and_scan() is called as part of common SPL framework, so no ++ * need to call it again but in case of powerpc platforms which currently ++ * do not use common SPL framework, so need to call this function here. ++ */ ++#if defined(CONFIG_SPL_DM) && (!defined(CONFIG_SPL_FRAMEWORK)) ++ dm_init_and_scan(true); ++#endif ++ res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH, ++ &img_addr); ++ ++ if (res == 0) ++ printf("SPL: Validation of U-boot successful\n"); ++} ++ ++#ifdef CONFIG_SPL_FRAMEWORK ++/* Override weak funtion defined in SPL framework to enable validation ++ * of main u-boot image before jumping to u-boot image. ++ */ ++void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) ++{ ++ typedef void __noreturn (*image_entry_noargs_t)(void); ++ uint32_t hdr_addr; ++ ++ image_entry_noargs_t image_entry = ++ (image_entry_noargs_t)(unsigned long)spl_image->entry_point; ++ ++ hdr_addr = (spl_image->entry_point + spl_image->size - ++ CONFIG_U_BOOT_HDR_SIZE); ++ spl_validate_uboot(hdr_addr, (uintptr_t)spl_image->entry_point); ++ /* ++ * In case of failure in validation, spl_validate_uboot would ++ * not return back in case of Production environment with ITS=1. ++ * Thus U-Boot will not start. ++ * In Development environment (ITS=0 and SB_EN=1), the function ++ * may return back in case of non-fatal failures. ++ */ ++ ++ debug("image entry point: 0x%lX\n", spl_image->entry_point); ++ image_entry(); ++} ++#endif /* ifdef CONFIG_SPL_FRAMEWORK */ ++#endif /* ifdef CONFIG_SPL_BUILD */ +diff --git a/board/solidrun/common/fsl_validate.c b/board/solidrun/common/fsl_validate.c +new file mode 100644 +index 0000000000..2bf9d58746 +--- /dev/null ++++ b/board/solidrun/common/fsl_validate.c +@@ -0,0 +1,962 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2015 Freescale Semiconductor, Inc. ++ */ ++ ++#include <common.h> ++#include <dm.h> ++#include <fsl_validate.h> ++#include <fsl_secboot_err.h> ++#include <fsl_sfp.h> ++#include <fsl_sec.h> ++#include <command.h> ++#include <malloc.h> ++#include <u-boot/rsa-mod-exp.h> ++#include <hash.h> ++#include <fsl_secboot_err.h> ++#ifdef CONFIG_ARCH_LS1021A ++#include <asm/arch/immap_ls102xa.h> ++#endif ++ ++#define SHA256_BITS 256 ++#define SHA256_BYTES (256/8) ++#define SHA256_NIBBLES (256/4) ++#define NUM_HEX_CHARS (sizeof(ulong) * 2) ++ ++#define CHECK_KEY_LEN(key_len) (((key_len) == 2 * KEY_SIZE_BYTES / 4) || \ ++ ((key_len) == 2 * KEY_SIZE_BYTES / 2) || \ ++ ((key_len) == 2 * KEY_SIZE_BYTES)) ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++/* Global data structure */ ++static struct fsl_secboot_glb glb; ++#endif ++ ++/* This array contains DER value for SHA-256 */ ++static const u8 hash_identifier[] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, ++ 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, ++ 0x04, 0x20 ++ }; ++ ++static u8 hash_val[SHA256_BYTES]; ++ ++#ifdef CONFIG_ESBC_HDR_LS ++/* New Barker Code for LS ESBC Header */ ++static const u8 barker_code[ESBC_BARKER_LEN] = { 0x12, 0x19, 0x20, 0x01 }; ++#else ++static const u8 barker_code[ESBC_BARKER_LEN] = { 0x68, 0x39, 0x27, 0x81 }; ++#endif ++ ++void branch_to_self(void) __attribute__ ((noreturn)); ++ ++/* ++ * This function will put core in infinite loop. ++ * This will be called when the ESBC can not proceed further due ++ * to some unknown errors. ++ */ ++void branch_to_self(void) ++{ ++ printf("Core is in infinite loop due to errors.\n"); ++self: ++ goto self; ++} ++ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++static u32 check_ie(struct fsl_secboot_img_priv *img) ++{ ++ if (img->hdr.ie_flag & IE_FLAG_MASK) ++ return 1; ++ ++ return 0; ++} ++ ++/* This function returns the CSF Header Address of uboot ++ * For MPC85xx based platforms, the LAW mapping for NOR ++ * flash changes in uboot code. Hence the offset needs ++ * to be calculated and added to the new NOR flash base ++ * address ++ */ ++#if defined(CONFIG_MPC85xx) ++int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) ++{ ++ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); ++ u32 csf_hdr_addr = in_be32(&gur->scratchrw[0]); ++ u32 csf_flash_offset = csf_hdr_addr & ~(CONFIG_SYS_PBI_FLASH_BASE); ++ u32 flash_addr, addr; ++ int found = 0; ++ int i = 0; ++ ++ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { ++ flash_addr = flash_info[i].start[0]; ++ addr = flash_info[i].start[0] + csf_flash_offset; ++ if (memcmp((u8 *)addr, barker_code, ESBC_BARKER_LEN) == 0) { ++ debug("Barker found on addr %x\n", addr); ++ found = 1; ++ break; ++ } ++ } ++ ++ if (!found) ++ return -1; ++ ++ *csf_addr = addr; ++ *flash_base_addr = flash_addr; ++ ++ return 0; ++} ++#else ++/* For platforms like LS1020, correct flash address is present in ++ * the header. So the function reqturns flash base address as 0 ++ */ ++int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) ++{ ++ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); ++ u32 csf_hdr_addr = in_be32(&gur->scratchrw[0]); ++ ++ if (memcmp((u8 *)(uintptr_t)csf_hdr_addr, ++ barker_code, ESBC_BARKER_LEN)) ++ return -1; ++ ++ *csf_addr = csf_hdr_addr; ++ *flash_base_addr = 0; ++ return 0; ++} ++#endif ++ ++#if defined(CONFIG_ESBC_HDR_LS) ++static int get_ie_info_addr(uintptr_t *ie_addr) ++{ ++ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); ++ /* For LS-CH3, the address of IE Table is ++ * stated in Scratch13 and scratch14 of DCFG. ++ * Bootrom validates this table while validating uboot. ++ * DCFG is LE*/ ++ *ie_addr = in_le32(&gur->scratchrw[SCRATCH_IE_HIGH_ADR - 1]); ++ *ie_addr = *ie_addr << 32; ++ *ie_addr |= in_le32(&gur->scratchrw[SCRATCH_IE_LOW_ADR - 1]); ++ return 0; ++} ++#else /* CONFIG_ESBC_HDR_LS */ ++static int get_ie_info_addr(uintptr_t *ie_addr) ++{ ++ struct fsl_secboot_img_hdr *hdr; ++ struct fsl_secboot_sg_table *sg_tbl; ++ u32 flash_base_addr, csf_addr; ++ ++ if (get_csf_base_addr(&csf_addr, &flash_base_addr)) ++ return -1; ++ ++ hdr = (struct fsl_secboot_img_hdr *)(uintptr_t)csf_addr; ++ ++ /* For SoC's with Trust Architecture v1 with corenet bus ++ * the sg table field in CSF header has absolute address ++ * for sg table in memory. In other Trust Architecture, ++ * this field specifies the offset of sg table from the ++ * base address of CSF Header ++ */ ++#if defined(CONFIG_FSL_TRUST_ARCH_v1) && defined(CONFIG_FSL_CORENET) ++ sg_tbl = (struct fsl_secboot_sg_table *) ++ (((u32)hdr->psgtable & ~(CONFIG_SYS_PBI_FLASH_BASE)) + ++ flash_base_addr); ++#else ++ sg_tbl = (struct fsl_secboot_sg_table *)(uintptr_t)(csf_addr + ++ (u32)hdr->psgtable); ++#endif ++ ++ /* IE Key Table is the first entry in the SG Table */ ++#if defined(CONFIG_MPC85xx) ++ *ie_addr = (uintptr_t)((sg_tbl->src_addr & ++ ~(CONFIG_SYS_PBI_FLASH_BASE)) + ++ flash_base_addr); ++#else ++ *ie_addr = (uintptr_t)sg_tbl->src_addr; ++#endif ++ ++ debug("IE Table address is %lx\n", *ie_addr); ++ return 0; ++} ++#endif /* CONFIG_ESBC_HDR_LS */ ++#endif ++ ++#ifdef CONFIG_KEY_REVOCATION ++/* This function checks srk_table_flag in header and set/reset srk_flag.*/ ++static u32 check_srk(struct fsl_secboot_img_priv *img) ++{ ++#ifdef CONFIG_ESBC_HDR_LS ++ /* In LS, No SRK Flag as SRK is always present if IE not present*/ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ return !check_ie(img); ++#endif ++ return 1; ++#else ++ if (img->hdr.len_kr.srk_table_flag & SRK_FLAG) ++ return 1; ++ ++ return 0; ++#endif ++} ++ ++/* This function returns ospr's key_revoc values.*/ ++static u32 get_key_revoc(void) ++{ ++ struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ++ return (sfp_in32(&sfp_regs->ospr) & OSPR_KEY_REVOC_MASK) >> ++ OSPR_KEY_REVOC_SHIFT; ++} ++ ++/* This function checks if selected key is revoked or not.*/ ++static u32 is_key_revoked(u32 keynum, u32 rev_flag) ++{ ++ if (keynum == UNREVOCABLE_KEY) ++ return 0; ++ ++ if ((u32)(1 << (ALIGN_REVOC_KEY - keynum)) & rev_flag) ++ return 1; ++ ++ return 0; ++} ++ ++/* It read validates srk_table key lengths.*/ ++static u32 read_validate_srk_tbl(struct fsl_secboot_img_priv *img) ++{ ++ int i = 0; ++ u32 ret, key_num, key_revoc_flag, size; ++ struct fsl_secboot_img_hdr *hdr = &img->hdr; ++ void *esbc = (u8 *)(uintptr_t)img->ehdrloc; ++ ++ if ((hdr->len_kr.num_srk == 0) || ++ (hdr->len_kr.num_srk > MAX_KEY_ENTRIES)) ++ return ERROR_ESBC_CLIENT_HEADER_INVALID_SRK_NUM_ENTRY; ++ ++ key_num = hdr->len_kr.srk_sel; ++ if (key_num == 0 || key_num > hdr->len_kr.num_srk) ++ return ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM; ++ ++ /* Get revoc key from sfp */ ++ key_revoc_flag = get_key_revoc(); ++ ret = is_key_revoked(key_num, key_revoc_flag); ++ if (ret) ++ return ERROR_ESBC_CLIENT_HEADER_KEY_REVOKED; ++ ++ size = hdr->len_kr.num_srk * sizeof(struct srk_table); ++ ++ memcpy(&img->srk_tbl, esbc + hdr->srk_tbl_off, size); ++ ++ for (i = 0; i < hdr->len_kr.num_srk; i++) { ++ if (!CHECK_KEY_LEN(img->srk_tbl[i].key_len)) ++ return ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN; ++ } ++ ++ img->key_len = img->srk_tbl[key_num - 1].key_len; ++ ++ memcpy(&img->img_key, &(img->srk_tbl[key_num - 1].pkey), ++ img->key_len); ++ ++ return 0; ++} ++#endif ++ ++#ifndef CONFIG_ESBC_HDR_LS ++static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) ++{ ++ struct fsl_secboot_img_hdr *hdr = &img->hdr; ++ void *esbc = (u8 *)(uintptr_t)img->ehdrloc; ++ ++ /* check key length */ ++ if (!CHECK_KEY_LEN(hdr->key_len)) ++ return ERROR_ESBC_CLIENT_HEADER_KEY_LEN; ++ ++ memcpy(&img->img_key, esbc + hdr->pkey, hdr->key_len); ++ ++ img->key_len = hdr->key_len; ++ ++ return 0; ++} ++#endif /* CONFIG_ESBC_HDR_LS */ ++ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ ++static void install_ie_tbl(uintptr_t ie_tbl_addr, ++ struct fsl_secboot_img_priv *img) ++{ ++ /* Copy IE tbl to Global Data */ ++ memcpy(&glb.ie_tbl, (u8 *)ie_tbl_addr, sizeof(struct ie_key_info)); ++ img->ie_addr = (uintptr_t)&glb.ie_tbl; ++ glb.ie_addr = img->ie_addr; ++} ++ ++static u32 read_validate_ie_tbl(struct fsl_secboot_img_priv *img) ++{ ++ struct fsl_secboot_img_hdr *hdr = &img->hdr; ++ u32 ie_key_len, ie_revoc_flag, ie_num; ++ struct ie_key_info *ie_info; ++ ++ if (!img->ie_addr) { ++ if (get_ie_info_addr(&img->ie_addr)) ++ return ERROR_IE_TABLE_NOT_FOUND; ++ else ++ install_ie_tbl(img->ie_addr, img); ++ } ++ ++ ie_info = (struct ie_key_info *)(uintptr_t)img->ie_addr; ++ if (ie_info->num_keys == 0 || ie_info->num_keys > 32) ++ return ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY; ++ ++ ie_num = hdr->ie_key_sel; ++ if (ie_num == 0 || ie_num > ie_info->num_keys) ++ return ERROR_ESBC_CLIENT_HEADER_INVALID_IE_KEY_NUM; ++ ++ ie_revoc_flag = ie_info->key_revok; ++ if ((u32)(1 << (ie_num - 1)) & ie_revoc_flag) ++ return ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED; ++ ++ ie_key_len = ie_info->ie_key_tbl[ie_num - 1].key_len; ++ ++ if (!CHECK_KEY_LEN(ie_key_len)) ++ return ERROR_ESBC_CLIENT_HEADER_INV_IE_ENTRY_KEYLEN; ++ ++ memcpy(&img->img_key, &(ie_info->ie_key_tbl[ie_num - 1].pkey), ++ ie_key_len); ++ ++ img->key_len = ie_key_len; ++ return 0; ++} ++#endif ++ ++ ++/* This function return length of public key.*/ ++static inline u32 get_key_len(struct fsl_secboot_img_priv *img) ++{ ++ return img->key_len; ++} ++ ++/* ++ * Handles the ESBC uboot client header verification failure. ++ * This function handles all the errors which might occur in the ++ * parsing and checking of ESBC uboot client header. It will also ++ * set the error bits in the SEC_MON. ++ */ ++static void fsl_secboot_header_verification_failure(void) ++{ ++ struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ++ ++ /* 29th bit of OSPR is ITS */ ++ u32 its = sfp_in32(&sfp_regs->ospr) >> 2; ++ ++ if (its == 1) ++ set_sec_mon_state(HPSR_SSM_ST_SOFT_FAIL); ++ else ++ set_sec_mon_state(HPSR_SSM_ST_NON_SECURE); ++ ++ printf("Generating reset request\n"); ++ do_reset(NULL, 0, 0, NULL); ++ /* If reset doesn't coocur, halt execution */ ++ do_esbc_halt(NULL, 0, 0, NULL); ++} ++ ++/* ++ * Handles the ESBC uboot client image verification failure. ++ * This function handles all the errors which might occur in the ++ * public key hash comparison and signature verification of ++ * ESBC uboot client image. It will also ++ * set the error bits in the SEC_MON. ++ */ ++static void fsl_secboot_image_verification_failure(void) ++{ ++ struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ++ ++ u32 its = (sfp_in32(&sfp_regs->ospr) & ITS_MASK) >> ITS_BIT; ++ ++ if (its == 1) { ++ set_sec_mon_state(HPSR_SSM_ST_SOFT_FAIL); ++ ++ printf("Generating reset request\n"); ++ do_reset(NULL, 0, 0, NULL); ++ /* If reset doesn't coocur, halt execution */ ++ do_esbc_halt(NULL, 0, 0, NULL); ++ ++ } else { ++ set_sec_mon_state(HPSR_SSM_ST_NON_SECURE); ++ } ++} ++ ++static void fsl_secboot_bootscript_parse_failure(void) ++{ ++ fsl_secboot_header_verification_failure(); ++} ++ ++/* ++ * Handles the errors in esbc boot. ++ * This function handles all the errors which might occur in the ++ * esbc boot phase. It will call the appropriate api to log the ++ * errors and set the error bits in the SEC_MON. ++ */ ++void fsl_secboot_handle_error(int error) ++{ ++#ifndef CONFIG_SPL_BUILD ++ const struct fsl_secboot_errcode *e; ++ ++ for (e = fsl_secboot_errcodes; e->errcode != ERROR_ESBC_CLIENT_MAX; ++ e++) { ++ if (e->errcode == error) ++ printf("ERROR :: %x :: %s\n", error, e->name); ++ } ++#else ++ printf("ERROR :: %x\n", error); ++#endif ++ ++ /* If Boot Mode is secure, transition the SNVS state and issue ++ * reset based on type of failure and ITS setting. ++ * If Boot mode is non-secure, return from this function. ++ */ ++ if (fsl_check_boot_mode_secure() == 0) ++ return; ++ ++ switch (error) { ++ case ERROR_ESBC_CLIENT_HEADER_BARKER: ++ case ERROR_ESBC_CLIENT_HEADER_IMG_SIZE: ++ case ERROR_ESBC_CLIENT_HEADER_KEY_LEN: ++ case ERROR_ESBC_CLIENT_HEADER_SIG_LEN: ++ case ERROR_ESBC_CLIENT_HEADER_KEY_LEN_NOT_TWICE_SIG_LEN: ++ case ERROR_ESBC_CLIENT_HEADER_KEY_MOD_1: ++ case ERROR_ESBC_CLIENT_HEADER_KEY_MOD_2: ++ case ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD: ++ case ERROR_ESBC_CLIENT_HEADER_SG_ESBC_EP: ++ case ERROR_ESBC_CLIENT_HEADER_SG_ENTIRES_BAD: ++ case ERROR_KEY_TABLE_NOT_FOUND: ++#ifdef CONFIG_KEY_REVOCATION ++ case ERROR_ESBC_CLIENT_HEADER_KEY_REVOKED: ++ case ERROR_ESBC_CLIENT_HEADER_INVALID_SRK_NUM_ENTRY: ++ case ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM: ++ case ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN: ++#endif ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ /*@fallthrough@*/ ++ case ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED: ++ case ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY: ++ case ERROR_ESBC_CLIENT_HEADER_INVALID_IE_KEY_NUM: ++ case ERROR_ESBC_CLIENT_HEADER_INV_IE_ENTRY_KEYLEN: ++ case ERROR_IE_TABLE_NOT_FOUND: ++#endif ++ fsl_secboot_header_verification_failure(); ++ break; ++ case ERROR_ESBC_SEC_RESET: ++ case ERROR_ESBC_SEC_DEQ: ++ case ERROR_ESBC_SEC_ENQ: ++ case ERROR_ESBC_SEC_DEQ_TO: ++ case ERROR_ESBC_SEC_JOBQ_STATUS: ++ case ERROR_ESBC_CLIENT_HASH_COMPARE_KEY: ++ case ERROR_ESBC_CLIENT_HASH_COMPARE_EM: ++ fsl_secboot_image_verification_failure(); ++ break; ++ case ERROR_ESBC_MISSING_BOOTM: ++ fsl_secboot_bootscript_parse_failure(); ++ break; ++ case ERROR_ESBC_WRONG_CMD: ++ default: ++ branch_to_self(); ++ break; ++ } ++} ++ ++static void fsl_secblk_handle_error(int error) ++{ ++ switch (error) { ++ case ERROR_ESBC_SEC_ENQ: ++ fsl_secboot_handle_error(ERROR_ESBC_SEC_ENQ); ++ break; ++ case ERROR_ESBC_SEC_DEQ: ++ fsl_secboot_handle_error(ERROR_ESBC_SEC_DEQ); ++ break; ++ case ERROR_ESBC_SEC_DEQ_TO: ++ fsl_secboot_handle_error(ERROR_ESBC_SEC_DEQ_TO); ++ break; ++ default: ++ printf("Job Queue Output status %x\n", error); ++ fsl_secboot_handle_error(ERROR_ESBC_SEC_JOBQ_STATUS); ++ break; ++ } ++} ++ ++/* ++ * Calculate hash of key obtained via offset present in ESBC uboot ++ * client hdr. This function calculates the hash of key which is obtained ++ * through offset present in ESBC uboot client header. ++ */ ++static int calc_img_key_hash(struct fsl_secboot_img_priv *img) ++{ ++ struct hash_algo *algo; ++ void *ctx; ++ int i, srk = 0; ++ int ret = 0; ++ const char *algo_name = "sha256"; ++ ++ /* Calculate hash of the esbc key */ ++ ret = hash_progressive_lookup_algo(algo_name, &algo); ++ if (ret) ++ return ret; ++ ++ ret = algo->hash_init(algo, &ctx); ++ if (ret) ++ return ret; ++ ++ /* Update hash for ESBC key */ ++#ifdef CONFIG_KEY_REVOCATION ++ if (check_srk(img)) { ++ ret = algo->hash_update(algo, ctx, ++ (u8 *)(uintptr_t)(img->ehdrloc + img->hdr.srk_tbl_off), ++ img->hdr.len_kr.num_srk * sizeof(struct srk_table), 1); ++ srk = 1; ++ } ++#endif ++ if (!srk) ++ ret = algo->hash_update(algo, ctx, ++ img->img_key, img->key_len, 1); ++ if (ret) ++ return ret; ++ ++ /* Copy hash at destination buffer */ ++ ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size); ++ if (ret) ++ return ret; ++ ++ for (i = 0; i < SHA256_BYTES; i++) ++ img->img_key_hash[i] = hash_val[i]; ++ ++ return 0; ++} ++ ++/* ++ * Calculate hash of ESBC hdr and ESBC. This function calculates the ++ * single hash of ESBC header and ESBC image. If SG flag is on, all ++ * SG entries are also hashed alongwith the complete SG table. ++ */ ++static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) ++{ ++ struct hash_algo *algo; ++ void *ctx; ++ int ret = 0; ++ int key_hash = 0; ++ const char *algo_name = "sha256"; ++ ++ /* Calculate the hash of the ESBC */ ++ ret = hash_progressive_lookup_algo(algo_name, &algo); ++ if (ret) ++ return ret; ++ ++ ret = algo->hash_init(algo, &ctx); ++ /* Copy hash at destination buffer */ ++ if (ret) ++ return ret; ++ ++ /* Update hash for CSF Header */ ++ ret = algo->hash_update(algo, ctx, ++ (u8 *)&img->hdr, sizeof(struct fsl_secboot_img_hdr), 0); ++ if (ret) ++ return ret; ++ ++ /* Update the hash with that of srk table if srk flag is 1 ++ * If IE Table is selected, key is not added in the hash ++ * If neither srk table nor IE key table available, add key ++ * from header in the hash calculation ++ */ ++#ifdef CONFIG_KEY_REVOCATION ++ if (check_srk(img)) { ++ ret = algo->hash_update(algo, ctx, ++ (u8 *)(uintptr_t)(img->ehdrloc + img->hdr.srk_tbl_off), ++ img->hdr.len_kr.num_srk * sizeof(struct srk_table), 0); ++ key_hash = 1; ++ } ++#endif ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ if (!key_hash && check_ie(img)) ++ key_hash = 1; ++#endif ++#ifndef CONFIG_ESBC_HDR_LS ++/* No single key support in LS ESBC header */ ++ if (!key_hash) { ++ ret = algo->hash_update(algo, ctx, ++ img->img_key, img->hdr.key_len, 0); ++ key_hash = 1; ++ } ++#endif ++ if (ret) ++ return ret; ++ if (!key_hash) ++ return ERROR_KEY_TABLE_NOT_FOUND; ++ ++ /* Update hash for actual Image */ ++ ret = algo->hash_update(algo, ctx, ++ (u8 *)(*(img->img_addr_ptr)), img->img_size, 1); ++ if (ret) ++ return ret; ++ ++ /* Copy hash at destination buffer */ ++ ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++/* ++ * Construct encoded hash EM' wrt PKCSv1.5. This function calculates the ++ * pointers for padding, DER value and hash. And finally, constructs EM' ++ * which includes hash of complete CSF header and ESBC image. If SG flag ++ * is on, hash of SG table and entries is also included. ++ */ ++static void construct_img_encoded_hash_second(struct fsl_secboot_img_priv *img) ++{ ++ /* ++ * RSA PKCSv1.5 encoding format for encoded message is below ++ * EM = 0x0 || 0x1 || PS || 0x0 || DER || Hash ++ * PS is Padding String ++ * DER is DER value for SHA-256 ++ * Hash is SHA-256 hash ++ * ********************************************************* ++ * representative points to first byte of EM initially and is ++ * filled with 0x0 ++ * representative is incremented by 1 and second byte is filled ++ * with 0x1 ++ * padding points to third byte of EM ++ * digest points to full length of EM - 32 bytes ++ * hash_id (DER value) points to 19 bytes before pDigest ++ * separator is one byte which separates padding and DER ++ */ ++ ++ size_t len; ++ u8 *representative; ++ u8 *padding, *digest; ++ u8 *hash_id, *separator; ++ int i; ++ ++ len = (get_key_len(img) / 2) - 1; ++ representative = img->img_encoded_hash_second; ++ representative[0] = 0; ++ representative[1] = 1; /* block type 1 */ ++ ++ padding = &representative[2]; ++ digest = &representative[1] + len - 32; ++ hash_id = digest - sizeof(hash_identifier); ++ separator = hash_id - 1; ++ ++ /* fill padding area pointed by padding with 0xff */ ++ memset(padding, 0xff, separator - padding); ++ ++ /* fill byte pointed by separator */ ++ *separator = 0; ++ ++ /* fill SHA-256 DER value pointed by HashId */ ++ memcpy(hash_id, hash_identifier, sizeof(hash_identifier)); ++ ++ /* fill hash pointed by Digest */ ++ for (i = 0; i < SHA256_BYTES; i++) ++ digest[i] = hash_val[i]; ++} ++ ++/* ++ * Reads and validates the ESBC client header. ++ * This function reads key and signature from the ESBC client header. ++ * If Scatter/Gather flag is on, lengths and offsets of images ++ * present as SG entries are also read. This function also checks ++ * whether the header is valid or not. ++ */ ++static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) ++{ ++ struct fsl_secboot_img_hdr *hdr = &img->hdr; ++ void *esbc = (u8 *)(uintptr_t)img->ehdrloc; ++ u8 *k, *s; ++ u32 ret = 0; ++ ++ int key_found = 0; ++ ++ /* check barker code */ ++ if (memcmp(hdr->barker, barker_code, ESBC_BARKER_LEN)) ++ return ERROR_ESBC_CLIENT_HEADER_BARKER; ++ ++ /* If Image Address is not passed as argument to function, ++ * then Address and Size must be read from the Header. ++ */ ++ if (*(img->img_addr_ptr) == 0) { ++ #ifdef CONFIG_ESBC_ADDR_64BIT ++ *(img->img_addr_ptr) = hdr->pimg64; ++ #else ++ *(img->img_addr_ptr) = hdr->pimg; ++ #endif ++ } ++ ++ if (!hdr->img_size) ++ return ERROR_ESBC_CLIENT_HEADER_IMG_SIZE; ++ ++ img->img_size = hdr->img_size; ++ ++ /* Key checking*/ ++#ifdef CONFIG_KEY_REVOCATION ++ if (check_srk(img)) { ++ ret = read_validate_srk_tbl(img); ++ if (ret != 0) ++ return ret; ++ key_found = 1; ++ } ++#endif ++ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ if (!key_found && check_ie(img)) { ++ ret = read_validate_ie_tbl(img); ++ if (ret != 0) ++ return ret; ++ key_found = 1; ++ } ++#endif ++#ifndef CONFIG_ESBC_HDR_LS ++/* Single Key Feature not available in LS ESBC Header */ ++ if (key_found == 0) { ++ ret = read_validate_single_key(img); ++ if (ret != 0) ++ return ret; ++ key_found = 1; ++ } ++#endif ++ if (!key_found) ++ return ERROR_KEY_TABLE_NOT_FOUND; ++ ++ /* check signaure */ ++ if (get_key_len(img) == 2 * hdr->sign_len) { ++ /* check signature length */ ++ if (!((hdr->sign_len == KEY_SIZE_BYTES / 4) || ++ (hdr->sign_len == KEY_SIZE_BYTES / 2) || ++ (hdr->sign_len == KEY_SIZE_BYTES))) ++ return ERROR_ESBC_CLIENT_HEADER_SIG_LEN; ++ } else { ++ return ERROR_ESBC_CLIENT_HEADER_KEY_LEN_NOT_TWICE_SIG_LEN; ++ } ++ ++ memcpy(&img->img_sign, esbc + hdr->psign, hdr->sign_len); ++/* No SG support in LS-CH3 */ ++#ifndef CONFIG_ESBC_HDR_LS ++ /* No SG support */ ++ if (hdr->sg_flag) ++ return ERROR_ESBC_CLIENT_HEADER_SG; ++#endif ++ ++ /* modulus most significant bit should be set */ ++ k = (u8 *)&img->img_key; ++ ++ if ((k[0] & 0x80) == 0) ++ return ERROR_ESBC_CLIENT_HEADER_KEY_MOD_1; ++ ++ /* modulus value should be odd */ ++ if ((k[get_key_len(img) / 2 - 1] & 0x1) == 0) ++ return ERROR_ESBC_CLIENT_HEADER_KEY_MOD_2; ++ ++ /* Check signature value < modulus value */ ++ s = (u8 *)&img->img_sign; ++ ++ if (!(memcmp(s, k, hdr->sign_len) < 0)) ++ return ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD; ++ ++ return ESBC_VALID_HDR; ++} ++ ++static inline int str2longbe(const char *p, ulong *num) ++{ ++ char *endptr; ++ ulong tmp; ++ ++ if (!p) { ++ return 0; ++ } else { ++ tmp = simple_strtoul(p, &endptr, 16); ++ if (sizeof(ulong) == 4) ++ *num = cpu_to_be32(tmp); ++ else ++ *num = cpu_to_be64(tmp); ++ } ++ ++ return *p != '\0' && *endptr == '\0'; ++} ++/* Function to calculate the ESBC Image Hash ++ * and hash from Digital signature. ++ * The Two hash's are compared to yield the ++ * result of signature validation. ++ */ ++static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img) ++{ ++ int ret; ++ uint32_t key_len; ++ struct key_prop prop; ++#if !defined(USE_HOSTCC) ++ struct udevice *mod_exp_dev; ++#endif ++ ret = calc_esbchdr_esbc_hash(img); ++ if (ret) ++ return ret; ++ ++ /* Construct encoded hash EM' wrt PKCSv1.5 */ ++ construct_img_encoded_hash_second(img); ++ ++ /* Fill prop structure for public key */ ++ memset(&prop, 0, sizeof(struct key_prop)); ++ key_len = get_key_len(img) / 2; ++ prop.modulus = img->img_key; ++ prop.public_exponent = img->img_key + key_len; ++ prop.num_bits = key_len * 8; ++ prop.exp_len = key_len; ++ ++ ret = uclass_get_device(UCLASS_MOD_EXP, 0, &mod_exp_dev); ++ if (ret) { ++ printf("RSA: Can't find Modular Exp implementation\n"); ++ return -EINVAL; ++ } ++ ++ ret = rsa_mod_exp(mod_exp_dev, img->img_sign, img->hdr.sign_len, ++ &prop, img->img_encoded_hash); ++ if (ret) ++ return ret; ++ ++ /* ++ * compare the encoded messages EM' and EM wrt RSA PKCSv1.5 ++ * memcmp returns zero on success ++ * memcmp returns non-zero on failure ++ */ ++ ret = memcmp(&img->img_encoded_hash_second, &img->img_encoded_hash, ++ img->hdr.sign_len); ++ ++ if (ret) ++ return ERROR_ESBC_CLIENT_HASH_COMPARE_EM; ++ ++ return 0; ++} ++/* Function to initialize img priv and global data structure ++ */ ++static int secboot_init(struct fsl_secboot_img_priv **img_ptr) ++{ ++ *img_ptr = malloc(sizeof(struct fsl_secboot_img_priv)); ++ ++ struct fsl_secboot_img_priv *img = *img_ptr; ++ ++ if (!img) ++ return -ENOMEM; ++ memset(img, 0, sizeof(struct fsl_secboot_img_priv)); ++ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ if (glb.ie_addr) ++ img->ie_addr = glb.ie_addr; ++#endif ++ return 0; ++} ++ ++ ++/* haddr - Address of the header of image to be validated. ++ * arg_hash_str - Option hash string. If provided, this ++ * overrides the key hash in the SFP fuses. ++ * img_addr_ptr - Optional pointer to address of image to be validated. ++ * If non zero addr, this overrides the addr of image in header, ++ * otherwise updated to image addr in header. ++ * Acts as both input and output of function. ++ * This pointer shouldn't be NULL. ++ */ ++int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, ++ uintptr_t *img_addr_ptr) ++{ ++ struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ++ ulong hash[SHA256_BYTES/sizeof(ulong)]; ++ char hash_str[NUM_HEX_CHARS + 1]; ++ struct fsl_secboot_img_priv *img; ++ struct fsl_secboot_img_hdr *hdr; ++ void *esbc; ++ int ret, i, hash_cmd = 0; ++ u32 srk_hash[8]; ++ ++ if (arg_hash_str != NULL) { ++ const char *cp = arg_hash_str; ++ int i = 0; ++ ++ if (*cp == '0' && *(cp + 1) == 'x') ++ cp += 2; ++ ++ /* The input string expected is in hex, where ++ * each 4 bits would be represented by a hex ++ * sha256 hash is 256 bits long, which would mean ++ * num of characters = 256 / 4 ++ */ ++ if (strlen(cp) != SHA256_NIBBLES) { ++ printf("%s is not a 256 bits hex string as expected\n", ++ arg_hash_str); ++ return -1; ++ } ++ ++ for (i = 0; i < sizeof(hash)/sizeof(ulong); i++) { ++ strncpy(hash_str, cp + (i * NUM_HEX_CHARS), ++ NUM_HEX_CHARS); ++ hash_str[NUM_HEX_CHARS] = '\0'; ++ if (!str2longbe(hash_str, &hash[i])) { ++ printf("%s is not a 256 bits hex string ", ++ arg_hash_str); ++ return -1; ++ } ++ } ++ ++ hash_cmd = 1; ++ } ++ ++ ret = secboot_init(&img); ++ if (ret) ++ goto exit; ++ ++ /* Update the information in Private Struct */ ++ hdr = &img->hdr; ++ img->ehdrloc = haddr; ++ img->img_addr_ptr = img_addr_ptr; ++ esbc = (u8 *)img->ehdrloc; ++ ++ memcpy(hdr, esbc, sizeof(struct fsl_secboot_img_hdr)); ++ ++ /* read and validate esbc header */ ++ ret = read_validate_esbc_client_header(img); ++ ++ if (ret != ESBC_VALID_HDR) { ++ fsl_secboot_handle_error(ret); ++ goto exit; ++ } ++ ++ /* SRKH present in SFP */ ++ for (i = 0; i < NUM_SRKH_REGS; i++) ++ srk_hash[i] = srk_in32(&sfp_regs->srk_hash[i]); ++ ++ /* ++ * Calculate hash of key obtained via offset present in ++ * ESBC uboot client hdr ++ */ ++ ret = calc_img_key_hash(img); ++ if (ret) { ++ fsl_secblk_handle_error(ret); ++ goto exit; ++ } ++ ++ /* Compare hash obtained above with SRK hash present in SFP */ ++ if (hash_cmd) ++ ret = memcmp(&hash, &img->img_key_hash, SHA256_BYTES); ++ else ++ ret = memcmp(srk_hash, img->img_key_hash, SHA256_BYTES); ++ ++#if defined(CONFIG_FSL_ISBC_KEY_EXT) ++ if (!hash_cmd && check_ie(img)) ++ ret = 0; ++#endif ++ ++ if (ret != 0) { ++ fsl_secboot_handle_error(ERROR_ESBC_CLIENT_HASH_COMPARE_KEY); ++ goto exit; ++ } ++ ++ ret = calculate_cmp_img_sig(img); ++ if (ret) { ++ fsl_secboot_handle_error(ret); ++ goto exit; ++ } ++ ++exit: ++ /* Free Img as it was malloc'ed*/ ++ free(img); ++ return ret; ++} +diff --git a/board/solidrun/common/vid.c b/board/solidrun/common/vid.c +new file mode 100644 +index 0000000000..cc81e80c37 +--- /dev/null ++++ b/board/solidrun/common/vid.c +@@ -0,0 +1,330 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2014 Freescale Semiconductor, Inc. ++ * Copyright 2018 NXP ++ */ ++#include <common.h> ++#include <command.h> ++#include <i2c.h> ++#include <asm/io.h> ++#ifdef CONFIG_FSL_LSCH2 ++#include <asm/arch/immap_lsch2.h> ++#elif defined(CONFIG_FSL_LSCH3) ++#include <asm/arch/immap_lsch3.h> ++#else ++#include <asm/immap_85xx.h> ++#endif ++#include "vid.h" ++ ++int __weak i2c_multiplexer_select_vid_channel(u8 channel) ++{ ++ return 0; ++} ++ ++/* ++ * Compensate for a board specific voltage drop between regulator and SoC ++ * return a value in mV ++ */ ++int __weak board_vdd_drop_compensation(void) ++{ ++ return 0; ++} ++ ++/* ++ * Board specific settings for specific voltage value ++ */ ++int __weak board_adjust_vdd(int vdd) ++{ ++ return 0; ++} ++ ++/* Maximum loop count waiting for new voltage to take effect */ ++#define MAX_LOOP_WAIT_NEW_VOL 100 ++/* Maximum loop count waiting for the voltage to be stable */ ++#define MAX_LOOP_WAIT_VOL_STABLE 100 ++/* ++ * read_voltage from sensor on I2C bus ++ * We use average of 4 readings, waiting for WAIT_FOR_ADC before ++ * another reading ++ */ ++#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ ++ ++/* If an INA220 chip is available, we can use it to read back the voltage ++ * as it may have a higher accuracy than the IR chip for the same purpose ++ */ ++#ifdef CONFIG_VOL_MONITOR_INA220 ++#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ ++#define ADC_MIN_ACCURACY 4 ++#else ++#define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */ ++#define ADC_MIN_ACCURACY 4 ++#endif ++ ++/* read the current value of the LTC Regulator Voltage */ ++static int read_voltage_from_LTC(int i2caddress) ++{ ++ int ret, vcode = 0; ++ u8 chan = PWM_CHANNEL0; ++ ++ /* select the PAGE 0 using PMBus commands PAGE for VDD*/ ++ ret = i2c_write(I2C_VOL_MONITOR_ADDR, ++ PMBUS_CMD_PAGE, 1, &chan, 1); ++ if (ret) { ++ printf("VID: failed to select VDD Page 0\n"); ++ return ret; ++ } ++ ++ /*read the output voltage using PMBus command READ_VOUT*/ ++ ret = i2c_read(I2C_VOL_MONITOR_ADDR, ++ PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); ++ if (ret) { ++ printf("VID: failed to read the volatge\n"); ++ return ret; ++ } ++ ++ /* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */ ++ vcode = DIV_ROUND_UP(vcode * 1000, 4096); ++ ++ return vcode; ++} ++ ++static int read_voltage(int i2caddress) ++{ ++ int voltage_read; ++ voltage_read = read_voltage_from_LTC(i2caddress); ++ return voltage_read; ++} ++ ++/* this function sets the VDD and returns the value set */ ++static int set_voltage_to_LTC(int i2caddress, int vdd) ++{ ++ int ret, vdd_last, vdd_target = vdd; ++ int count = 100, temp = 0; ++ ++ /* Scale up to the LTC resolution is 1/4096V */ ++ vdd = (vdd * 4096) / 1000; ++ ++ /* 5-byte buffer which needs to be sent following the ++ * PMBus command PAGE_PLUS_WRITE. ++ */ ++ u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, ++ vdd & 0xFF, (vdd & 0xFF00) >> 8}; ++ ++ /* Write the desired voltage code to the regulator */ ++ ret = i2c_write(I2C_VOL_MONITOR_ADDR, ++ PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5); ++ if (ret) { ++ printf("VID: I2C failed to write to the volatge regulator\n"); ++ return -1; ++ } ++ ++ /* Wait for the volatge to get to the desired value */ ++ do { ++ vdd_last = read_voltage_from_LTC(i2caddress); ++ if (vdd_last < 0) { ++ printf("VID: Couldn't read sensor abort VID adjust\n"); ++ return -1; ++ } ++ count--; ++ temp = vdd_last - vdd_target; ++ } while ((abs(temp) > 2) && (count > 0)); ++ ++ return vdd_last; ++} ++ ++static int set_voltage(int i2caddress, int vdd) ++{ ++ int vdd_last = -1; ++ ++ vdd_last = set_voltage_to_LTC(i2caddress, vdd); ++ return vdd_last; ++} ++ ++int adjust_vdd(ulong vdd_override) ++{ ++ int re_enable = disable_interrupts(); ++ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); ++ u32 fusesr; ++ u8 vid; ++ int vdd_target, vdd_current, vdd_last; ++ int ret, i2caddress; ++ unsigned long vdd_string_override; ++ char *vdd_string; ++ static const u16 vdd[32] = { ++ 8250, ++ 7875, ++ 7750, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 8000, ++ 8125, ++ 8250, ++ 0, /* reserved */ ++ 8500, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ }; ++ struct vdd_drive { ++ u8 vid; ++ unsigned voltage; ++ }; ++ ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); ++ if (ret) { ++ debug("VID: I2C failed to switch channel\n"); ++ ret = -1; ++ goto exit; ++ } ++ /* get the voltage ID from fuse status register */ ++ fusesr = in_le32(&gur->dcfg_fusesr); ++ vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & ++ FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; ++ if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { ++ vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & ++ FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; ++ } ++ vdd_target = vdd[vid]; ++ printf ("vid FUSE index %d (vdd_target = %d)\n",vid,vdd_target); ++ ++ /* check override variable for overriding VDD */ ++ vdd_string = env_get(CONFIG_VID_FLS_ENV); ++ if (vdd_override == 0 && vdd_string && ++ !strict_strtoul(vdd_string, 10, &vdd_string_override)) ++ vdd_override = vdd_string_override; ++ ++ if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { ++ vdd_target = vdd_override * 10; /* convert to 1/10 mV */ ++ debug("VDD override is %lu\n", vdd_override); ++ } else if (vdd_override != 0) { ++ printf("Invalid value.\n"); ++ } ++ ++ /* divide and round up by 10 to get a value in mV */ ++ vdd_target = DIV_ROUND_UP(vdd_target, 10); ++ if (vdd_target == 0) { ++ debug("VID: VID not used\n"); ++ ret = 0; ++ goto exit; ++ } else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) { ++ /* Check vdd_target is in valid range */ ++ printf("VID: Target VID %d mV is not in range.\n", ++ vdd_target); ++ ret = -1; ++ goto exit; ++ } else { ++ debug("VID: vid = %d mV\n", vdd_target); ++ } ++ ++ /* ++ * Read voltage monitor to check real voltage. ++ */ ++ vdd_last = read_voltage(i2caddress); ++ if (vdd_last < 0) { ++ printf("VID: Couldn't read sensor abort VID adjustment\n"); ++ ret = -1; ++ goto exit; ++ } ++ vdd_current = vdd_last; ++ debug("VID: Core voltage is currently at %d mV\n", vdd_last); ++ ++ /* Set the target voltage */ ++ vdd_last = vdd_current = set_voltage(i2caddress, vdd_target); ++ if (board_adjust_vdd(vdd_target) < 0) { ++ ret = -1; ++ goto exit; ++ } ++ ++ if (vdd_last > 0) ++ printf("VID: Core voltage after adjustment is at %d mV\n", ++ vdd_last); ++ else ++ ret = -1; ++exit: ++ if (re_enable) ++ enable_interrupts(); ++ i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); ++ return ret; ++} ++ ++static int print_vdd(void) ++{ ++ int vdd_last, ret, i2caddress; ++ ++ ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); ++ if (ret) { ++ debug("VID : I2c failed to switch channel\n"); ++ return -1; ++ } ++ /* ++ * Read voltage monitor to check real voltage. ++ */ ++ vdd_last = read_voltage(i2caddress); ++ if (vdd_last < 0) { ++ printf("VID: Couldn't read sensor abort VID adjustment\n"); ++ goto exit; ++ } ++ printf("VID: Core voltage is at %d mV\n", vdd_last); ++exit: ++ i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); ++ ++ return ret < 0 ? -1 : 0; ++ ++} ++ ++static int do_vdd_override(cmd_tbl_t *cmdtp, ++ int flag, int argc, ++ char * const argv[]) ++{ ++ ulong override; ++ ++ if (argc < 2) ++ return CMD_RET_USAGE; ++ ++ if (!strict_strtoul(argv[1], 10, &override)) ++ adjust_vdd(override); /* the value is checked by callee */ ++ else ++ return CMD_RET_USAGE; ++ return 0; ++} ++ ++static int do_vdd_read(cmd_tbl_t *cmdtp, ++ int flag, int argc, ++ char * const argv[]) ++{ ++ if (argc < 1) ++ return CMD_RET_USAGE; ++ print_vdd(); ++ ++ return 0; ++} ++ ++U_BOOT_CMD( ++ vdd_override, 2, 0, do_vdd_override, ++ "override VDD", ++ " - override with the voltage specified in mV, eg. 1050" ++); ++ ++U_BOOT_CMD( ++ vdd_read, 1, 0, do_vdd_read, ++ "read VDD", ++ " - Read the voltage specified in mV" ++) +diff --git a/board/solidrun/common/vid.h b/board/solidrun/common/vid.h +new file mode 100644 +index 0000000000..99778e9a93 +--- /dev/null ++++ b/board/solidrun/common/vid.h +@@ -0,0 +1,23 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2014 Freescale Semiconductor, Inc. ++ */ ++ ++#ifndef __VID_H_ ++#define __VID_H_ ++ ++#define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A ++#define IR36021_LOOP1_VOUT_OFFSET 0x9A ++#define IR36021_MFR_ID_OFFSET 0x92 ++#define IR36021_MFR_ID 0x43 ++#define IR36021_INTEL_MODE_OOFSET 0x14 ++#define IR36021_MODE_MASK 0x20 ++#define IR36021_INTEL_MODE 0x00 ++#define IR36021_AMD_MODE 0x20 ++ ++/* step the IR regulator in 5mV increments */ ++#define IR_VDD_STEP_DOWN 5 ++#define IR_VDD_STEP_UP 5 ++int adjust_vdd(ulong vdd_override); ++ ++#endif /* __VID_H_ */ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0005-armv8-lx2160acex7-lx2160acex-device-tree.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0005-armv8-lx2160acex7-lx2160acex-device-tree.patch new file mode 100644 index 00000000..51acc55b --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0005-armv8-lx2160acex7-lx2160acex-device-tree.patch @@ -0,0 +1,91 @@ +From bd96fd21fafd7560dba1d5a6f893e4a7d0b7ee74 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:37:22 +0300 +Subject: [PATCH 05/17] armv8: lx2160acex7: lx2160acex device tree + +Based on NXP's LX2160ARDB device tree; it defines - +1. MX35X based SPI flash +2. SDHC0 (SD card) and SDHC1 (eMMC) +3. 4 SATA ports that depending on SERDES configuration they can get +connected to external SATA drives + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm/dts/fsl-lx2160a-cex7.dts | 63 +++++++++++++++++++++++++++++++ + 1 file changed, 63 insertions(+) + create mode 100644 arch/arm/dts/fsl-lx2160a-cex7.dts + +diff --git a/arch/arm/dts/fsl-lx2160a-cex7.dts b/arch/arm/dts/fsl-lx2160a-cex7.dts +new file mode 100644 +index 0000000000..4fbcaafb0e +--- /dev/null ++++ b/arch/arm/dts/fsl-lx2160a-cex7.dts +@@ -0,0 +1,63 @@ ++// SPDX-License-Identifier: GPL-2.0+ OR X11 ++/* ++ * SolidRun LX2160ACEX7 device tree source ++ * ++ * Author: Rabeeh Khoury <rabeeh@solid-run.com> ++ * ++ * Copyright 2019 SolidRun ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include "fsl-lx2160a.dtsi" ++ ++/ { ++ model = "SolidRun LX2160ACEX7 COM express type 7 based board"; ++ compatible = "fsl,lx2160acex7", "fsl,lx2160a"; ++ ++ aliases { ++ spi0 = &fspi; ++ }; ++}; ++ ++&fspi { ++ bus-num = <0>; ++ status = "okay"; ++ ++ qflash0: MT35XU512ABA1G12@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "spi-flash"; ++ spi-max-frequency = <50000000>; ++ reg = <0>; ++ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ ++ fspi-rx-bus-width = <8>; /* 8 FSPI Rx lines */ ++ fspi-tx-bus-width = <1>; /* 1 FSPI Tx line */ ++ }; ++ ++}; ++ ++&esdhc0 { ++ status = "okay"; ++}; ++ ++&esdhc1 { ++ status = "okay"; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "okay"; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&sata3 { ++ status = "okay"; ++}; +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0006-armv8-lx2160acex7-board-support-files.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0006-armv8-lx2160acex7-board-support-files.patch new file mode 100644 index 00000000..c38abbf9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0006-armv8-lx2160acex7-board-support-files.patch @@ -0,0 +1,519 @@ +From c42a926fb0ff087b8c5cb774a67fb64aa1a566ce Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 13:45:24 +0300 +Subject: [PATCH 06/17] armv8: lx2160acex7: board support files + +The lx2160acex7 board support files does the following - +1. Initializes 1GBps PHY address according to SERDES1 block config. +2. Sets uart0 as the console +3. Sets EMC2301 PWM fan controller to it's default value +4. Misc FDT fixups prior to booting Linux + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + board/solidrun/lx2160a/Kconfig | 22 ++ + board/solidrun/lx2160a/MAINTAINERS | 8 + + board/solidrun/lx2160a/Makefile | 9 + + board/solidrun/lx2160a/ddr.c | 20 ++ + board/solidrun/lx2160a/eth_lx2160acex7.c | 104 ++++++++ + board/solidrun/lx2160a/lx2160a.c | 288 +++++++++++++++++++++++ + 6 files changed, 451 insertions(+) + create mode 100644 board/solidrun/lx2160a/Kconfig + create mode 100644 board/solidrun/lx2160a/MAINTAINERS + create mode 100644 board/solidrun/lx2160a/Makefile + create mode 100644 board/solidrun/lx2160a/ddr.c + create mode 100644 board/solidrun/lx2160a/eth_lx2160acex7.c + create mode 100644 board/solidrun/lx2160a/lx2160a.c + +diff --git a/board/solidrun/lx2160a/Kconfig b/board/solidrun/lx2160a/Kconfig +new file mode 100644 +index 0000000000..85abac9bfc +--- /dev/null ++++ b/board/solidrun/lx2160a/Kconfig +@@ -0,0 +1,22 @@ ++if TARGET_LX2160ACEX7 ++ ++config SYS_BOARD ++ default "lx2160a" ++ ++config SYS_VENDOR ++ default "solidrun" ++ ++config SYS_SOC ++ default "fsl-layerscape" ++ ++config SYS_CONFIG_NAME ++ default "lx2160acex7" ++ ++config EMC2301 ++ bool "Fan controller" ++ help ++ Enable the EMC2301 fan controller for configuration of fan ++ speed. ++ ++source "board/freescale/common/Kconfig" ++endif +diff --git a/board/solidrun/lx2160a/MAINTAINERS b/board/solidrun/lx2160a/MAINTAINERS +new file mode 100644 +index 0000000000..688ff66afa +--- /dev/null ++++ b/board/solidrun/lx2160a/MAINTAINERS +@@ -0,0 +1,8 @@ ++LX2160ACEX7 BOARD ++M: Rabeeh Khoury <rabeeh@solid-run.com> ++S: Maintained ++F: board/solidrun/lx2160a/ ++F: include/configs/lx2160a_common.h ++F: include/configs/lx2160acex7.h ++F: configs/lx2160acex7_tfa_defconfig ++F: arch/arm/dts/fsl-lx2160a-cex7.dts +diff --git a/board/solidrun/lx2160a/Makefile b/board/solidrun/lx2160a/Makefile +new file mode 100644 +index 0000000000..c92266f322 +--- /dev/null ++++ b/board/solidrun/lx2160a/Makefile +@@ -0,0 +1,9 @@ ++# ++# Copyright 2019 SolidRun ltd. ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += lx2160a.o ++obj-y += ddr.o ++obj-$(CONFIG_TARGET_LX2160ACEX7) += eth_lx2160acex7.o +diff --git a/board/solidrun/lx2160a/ddr.c b/board/solidrun/lx2160a/ddr.c +new file mode 100644 +index 0000000000..9c7bd10475 +--- /dev/null ++++ b/board/solidrun/lx2160a/ddr.c +@@ -0,0 +1,20 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2019 SolidRun ltd. ++ */ ++ ++#include <common.h> ++#include <fsl_ddr_sdram.h> ++#include <fsl_ddr_dimm_params.h> ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++int fsl_initdram(void) ++{ ++ gd->ram_size = tfa_get_dram_size(); ++ ++ if (!gd->ram_size) ++ gd->ram_size = fsl_ddr_sdram_size(); ++ ++ return 0; ++} +diff --git a/board/solidrun/lx2160a/eth_lx2160acex7.c b/board/solidrun/lx2160a/eth_lx2160acex7.c +new file mode 100644 +index 0000000000..97e414838f +--- /dev/null ++++ b/board/solidrun/lx2160a/eth_lx2160acex7.c +@@ -0,0 +1,104 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2019 SolidRun ltd. ++ * ++ */ ++ ++#include <common.h> ++#include <command.h> ++#include <netdev.h> ++#include <malloc.h> ++#include <fsl_mdio.h> ++#include <miiphy.h> ++#include <phy.h> ++#include <fm_eth.h> ++#include <asm/io.h> ++#include <exports.h> ++#include <asm/arch/fsl_serdes.h> ++#include <fsl-mc/fsl_mc.h> ++#include <fsl-mc/ldpaa_wriop.h> ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++int board_eth_init(bd_t *bis) ++{ ++#if defined(CONFIG_FSL_MC_ENET) ++ struct memac_mdio_info mdio_info; ++ struct memac_mdio_controller *reg; ++ int i, interface; ++ struct mii_dev *dev; ++ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); ++ u32 srds_s1; ++ ++ srds_s1 = in_le32(&gur->rcwsr[28]) & ++ FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; ++ srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; ++ ++ reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO1; ++ mdio_info.regs = reg; ++ mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; ++ ++ /* Register the EMI 1 */ ++ fm_memac_mdio_init(bis, &mdio_info); ++ ++ wriop_set_phy_address(WRIOP1_DPMAC17, 0, ++ RGMII_PHY_ADDR1); ++ reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO2; ++ switch (srds_s1) { ++ case 3: ++ case 5: ++ case 8: ++ case 13: ++ case 14: ++ case 15: ++ case 17: ++ case 20: ++ case 23: ++ wriop_set_phy_address(WRIOP1_DPMAC17, 0, ++ RGMII_PHY_ADDR1); ++ break; ++ ++ default: ++ printf("SerDes1 protocol 0x%x is not supported on LX2160ACEX7\n", ++ srds_s1); ++ goto next; ++ } ++ for (i = WRIOP1_DPMAC17; i <= WRIOP1_DPMAC17; i++) { ++ interface = wriop_get_enet_if(i); ++ switch (interface) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); ++ wriop_set_mdio(i, dev); ++ break; ++ default: ++ break; ++ } ++ } ++ ++next: ++ cpu_eth_init(bis); ++#endif /* CONFIG_FSL_MC_ENET */ ++ ++ return pci_eth_init(bis); ++} ++ ++#if defined(CONFIG_RESET_PHY_R) ++void reset_phy(void) ++{ ++#if defined(CONFIG_FSL_MC_ENET) ++ mc_env_boot(); ++#endif ++} ++#endif /* CONFIG_RESET_PHY_R */ ++ ++int fdt_fixup_board_phy(void *fdt) ++{ ++ int mdio_offset; ++ int ret; ++ struct mii_dev *dev; ++ ++ ret = 0; ++ ++ return ret; ++} +diff --git a/board/solidrun/lx2160a/lx2160a.c b/board/solidrun/lx2160a/lx2160a.c +new file mode 100644 +index 0000000000..b0d9f1012e +--- /dev/null ++++ b/board/solidrun/lx2160a/lx2160a.c +@@ -0,0 +1,288 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2019 SolidRun ltd. ++ */ ++ ++#include <common.h> ++#include <dm.h> ++#include <dm/platform_data/serial_pl01x.h> ++#include <i2c.h> ++#include <malloc.h> ++#include <errno.h> ++#include <netdev.h> ++#include <fsl_ddr.h> ++#include <fsl_sec.h> ++#include <asm/io.h> ++#include <fdt_support.h> ++#include <linux/libfdt.h> ++#include <fsl-mc/fsl_mc.h> ++#include <environment.h> ++#include <efi_loader.h> ++#include <asm/arch/mmu.h> ++#include <hwconfig.h> ++#include <asm/arch/fsl_serdes.h> ++#include <asm/arch/soc.h> ++#include "../../freescale/common/vid.h" ++#include <fsl_immap.h> ++ ++#ifdef CONFIG_EMC2301 ++#include "../common/emc2301.h" ++#endif ++ ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++static struct pl01x_serial_platdata serial0 = { ++#if CONFIG_CONS_INDEX == 0 ++ .base = CONFIG_SYS_SERIAL0, ++#elif CONFIG_CONS_INDEX == 1 ++ .base = CONFIG_SYS_SERIAL1, ++#else ++#error "Unsupported console index value." ++#endif ++ .type = TYPE_PL011, ++}; ++ ++U_BOOT_DEVICE(nxp_serial0) = { ++ .name = "serial_pl01x", ++ .platdata = &serial0, ++}; ++ ++static struct pl01x_serial_platdata serial1 = { ++ .base = CONFIG_SYS_SERIAL1, ++ .type = TYPE_PL011, ++}; ++ ++U_BOOT_DEVICE(nxp_serial1) = { ++ .name = "serial_pl01x", ++ .platdata = &serial1, ++}; ++ ++int select_i2c_ch_pca9547(u8 ch) ++{ ++ int ret; ++ ++ ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); ++ if (ret) { ++ puts("PCA: failed to select proper channel\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void uart_get_clock(void) ++{ ++ serial0.clock = get_serial_clock(); ++ serial1.clock = get_serial_clock(); ++} ++ ++int board_early_init_f(void) ++{ ++#ifdef CONFIG_SYS_I2C_EARLY_INIT ++ i2c_early_init_f(); ++#endif ++ /* get required clock for UART IP */ ++ uart_get_clock(); ++ ++#ifdef CONFIG_EMC2301 ++ select_i2c_ch_pca9547(I2C_MUX_CH_EMC2301); ++ emc2301_init(); ++ set_fan_speed(I2C_EMC2301_PWM); ++ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); ++#endif ++ fsl_lsch3_early_init_f(); ++ return 0; ++} ++ ++#ifdef CONFIG_OF_BOARD_FIXUP ++int board_fix_fdt(void *fdt) ++{ ++ return 0; ++} ++#endif ++ ++int esdhc_status_fixup(void *blob, const char *compat) ++{ ++ /* Enable both esdhc DT nodes for LX2160ARDB */ ++ do_fixup_by_compat(blob, compat, "status", "okay", ++ sizeof("okay"), 1); ++ return 0; ++} ++ ++#if defined(CONFIG_VID) ++int i2c_multiplexer_select_vid_channel(u8 channel) ++{ ++ return select_i2c_ch_pca9547(channel); ++} ++ ++#endif ++ ++int checkboard(void) ++{ ++ enum boot_src src = get_boot_src(); ++ char buf[64]; ++ cpu_name(buf); ++ printf("Board: %s-CEX7, ", buf); ++ ++ if (src == BOOT_SOURCE_SD_MMC) { ++ puts("SD\n"); ++ } ++ puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz\n"); ++ puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); ++ puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100Hz\n"); ++ return 0; ++} ++ ++int config_board_mux(void) ++{ ++ return 0; ++} ++ ++unsigned long get_board_sys_clk(void) ++{ ++ return 100000000; ++} ++ ++unsigned long get_board_ddr_clk(void) ++{ ++ return 100000000; ++} ++ ++int board_init(void) ++{ ++#ifdef CONFIG_ENV_IS_NOWHERE ++ gd->env_addr = (ulong)&default_environment[0]; ++#endif ++ ++ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); ++ ++#ifdef CONFIG_FSL_CAAM ++ sec_init(); ++#endif ++ ++ return 0; ++} ++ ++void detail_board_ddr_info(void) ++{ ++ int i; ++ u64 ddr_size = 0; ++ ++ puts("\nDDR "); ++ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) ++ ddr_size += gd->bd->bi_dram[i].size; ++ print_size(ddr_size, ""); ++ print_ddr_info(0); ++} ++ ++#if defined(CONFIG_ARCH_MISC_INIT) ++int arch_misc_init(void) ++{ ++ config_board_mux(); ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_FSL_MC_ENET ++extern int fdt_fixup_board_phy(void *fdt); ++ ++void fdt_fixup_board_enet(void *fdt) ++{ ++ int offset; ++ ++ offset = fdt_path_offset(fdt, "/soc/fsl-mc"); ++ ++ if (offset < 0) ++ offset = fdt_path_offset(fdt, "/fsl-mc"); ++ ++ if (offset < 0) { ++ printf("%s: fsl-mc node not found in device tree (error %d)\n", ++ __func__, offset); ++ return; ++ } ++ ++ if (get_mc_boot_status() == 0 && ++ (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) { ++ fdt_status_okay(fdt, offset); ++ fdt_fixup_board_phy(fdt); ++ } else { ++ fdt_status_fail(fdt, offset); ++ } ++} ++ ++void board_quiesce_devices(void) ++{ ++ fsl_mc_ldpaa_exit(gd->bd); ++} ++#endif ++ ++#ifdef CONFIG_OF_BOARD_SETUP ++ ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ int i; ++ bool mc_memory_bank = false; ++ ++ u64 *base; ++ u64 *size; ++ u64 mc_memory_base = 0; ++ u64 mc_memory_size = 0; ++ u16 total_memory_banks; ++ ++ ft_cpu_setup(blob, bd); ++ ++ fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); ++ ++ if (mc_memory_base != 0) ++ mc_memory_bank = true; ++ ++ total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; ++ ++ base = calloc(total_memory_banks, sizeof(u64)); ++ size = calloc(total_memory_banks, sizeof(u64)); ++ ++ /* fixup DT for the three GPP DDR banks */ ++ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { ++ base[i] = gd->bd->bi_dram[i].start; ++ size[i] = gd->bd->bi_dram[i].size; ++ } ++ ++#ifdef CONFIG_RESV_RAM ++ /* reduce size if reserved memory is within this bank */ ++ if (gd->arch.resv_ram >= base[0] && ++ gd->arch.resv_ram < base[0] + size[0]) ++ size[0] = gd->arch.resv_ram - base[0]; ++ else if (gd->arch.resv_ram >= base[1] && ++ gd->arch.resv_ram < base[1] + size[1]) ++ size[1] = gd->arch.resv_ram - base[1]; ++ else if (gd->arch.resv_ram >= base[2] && ++ gd->arch.resv_ram < base[2] + size[2]) ++ size[2] = gd->arch.resv_ram - base[2]; ++#endif ++ ++ if (mc_memory_base != 0) { ++ for (i = 0; i <= total_memory_banks; i++) { ++ if (base[i] == 0 && size[i] == 0) { ++ base[i] = mc_memory_base; ++ size[i] = mc_memory_size; ++ break; ++ } ++ } ++ } ++ ++ fdt_fixup_memory_banks(blob, base, size, total_memory_banks); ++ ++#ifdef CONFIG_USB ++ fsl_fdt_fixup_dr_usb(blob, bd); ++#endif ++ ++#ifdef CONFIG_FSL_MC_ENET ++ fdt_fsl_mc_fixup_iommu_map_entry(blob); ++ fdt_fixup_board_enet(blob); ++#endif ++ ++ return 0; ++} ++#endif +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0007-lx2160a-load-dpl-into-0x80001000-instead-of-0x80d000.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0007-lx2160a-load-dpl-into-0x80001000-instead-of-0x80d000.patch new file mode 100644 index 00000000..b5d2d161 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0007-lx2160a-load-dpl-into-0x80001000-instead-of-0x80d000.patch @@ -0,0 +1,47 @@ +From 422b44970b160ee2e8752552a6232e50106a7bd8 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 4 May 2020 23:09:52 +0300 +Subject: [PATCH 07/17] lx2160a: load dpl into 0x80001000 instead of 0x80d00000 + +and enlarge the image size to 0x1000 blocks + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + include/configs/lx2160a_common.h | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h +index c6a6a96ff0..5b9808b2ef 100644 +--- a/include/configs/lx2160a_common.h ++++ b/include/configs/lx2160a_common.h +@@ -293,21 +293,21 @@ int select_i2c_ch_pca9547_sec(unsigned char ch); + + #define SD_BOOTCOMMAND \ + "env exists mcinitcmd && mmcinfo; " \ +- "mmc read 0x80d00000 0x6800 0x800; " \ ++ "mmc read 0x80001000 0x6800 0x1000; " \ + "env exists mcinitcmd && env exists secureboot " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ +- "&& fsl_mc lazyapply dpl 0x80d00000;" \ ++ "&& fsl_mc lazyapply dpl 0x80001000;" \ + "run distro_bootcmd;run sd_bootcmd;" \ + "env exists secureboot && esbc_halt;" + + #define SD2_BOOTCOMMAND \ + "mmc dev 1; env exists mcinitcmd && mmcinfo; " \ +- "mmc read 0x80d00000 0x6800 0x800; " \ ++ "mmc read 0x80001000 0x6800 0x1000; " \ + "env exists mcinitcmd && env exists secureboot " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ +- "&& fsl_mc lazyapply dpl 0x80d00000;" \ ++ "&& fsl_mc lazyapply dpl 0x80001000;" \ + "run distro_bootcmd;run emmc_bootcmd;" \ + "env exists secureboot && esbc_halt;" + +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0008-uboot-add-nvme-commands-and-for-distroboot.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0008-uboot-add-nvme-commands-and-for-distroboot.patch new file mode 100644 index 00000000..6ea81105 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0008-uboot-add-nvme-commands-and-for-distroboot.patch @@ -0,0 +1,41 @@ +From 8fa576d659e4710eae0b62aadd7717846c64746c Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 11 Nov 2019 23:45:31 +0200 +Subject: [PATCH 08/17] uboot - add nvme commands and for distroboot + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + configs/lx2160acex7_tfa_defconfig | 2 ++ + include/configs/lx2160a_common.h | 1 + + 2 files changed, 3 insertions(+) + +diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig +index d59de7d054..3891d2a7c4 100644 +--- a/configs/lx2160acex7_tfa_defconfig ++++ b/configs/lx2160acex7_tfa_defconfig +@@ -25,6 +25,8 @@ CONFIG_CMD_PCI=y + CONFIG_CMD_SF=y + CONFIG_CMD_USB=y + CONFIG_CMD_CACHE=y ++CONFIG_CMD_NVME=y ++CONFIG_NVME=y + CONFIG_MP=y + CONFIG_OF_CONTROL=y + CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-cex7" +diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h +index 5b9808b2ef..e31738d3a3 100644 +--- a/include/configs/lx2160a_common.h ++++ b/include/configs/lx2160a_common.h +@@ -316,6 +316,7 @@ int select_i2c_ch_pca9547_sec(unsigned char ch); + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(SCSI, scsi, 0) \ ++ func(NVME, nvme, 0) \ + func(DHCP, dhcp, na) + #include <config_distro_bootcmd.h> + +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0009-armv8-lx2160acex7-Fix-booting-from-NVMe-drives.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0009-armv8-lx2160acex7-Fix-booting-from-NVMe-drives.patch new file mode 100644 index 00000000..e813e423 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0009-armv8-lx2160acex7-Fix-booting-from-NVMe-drives.patch @@ -0,0 +1,33 @@ +From aeefed55fa39f4fc5acb2bd22fdde4dc97924d22 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 13:32:09 +0200 +Subject: [PATCH 09/17] armv8: lx2160acex7: Fix booting from NVMe drives + +Currently NVMe is not initialized so u-boot fails to read kernel from +NVMe drive. This patch modifies default environment so it initializes +NVMe as part of default startup script... + +Credit to Damjan Marion <dmarion@me.com> on fixing that on LSDK-19.09. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + include/configs/lx2160a_common.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h +index e31738d3a3..91e9a2470f 100644 +--- a/include/configs/lx2160a_common.h ++++ b/include/configs/lx2160a_common.h +@@ -261,6 +261,7 @@ int select_i2c_ch_pca9547_sec(unsigned char ch); + BOOTENV \ + "mcmemsize=0x70000000\0" \ + XSPI_MC_INIT_CMD \ ++ "nvme_need_init=true\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0010-nvme-add-accessor-to-namespace-id-and-eui64.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0010-nvme-add-accessor-to-namespace-id-and-eui64.patch new file mode 100644 index 00000000..d8de8a38 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0010-nvme-add-accessor-to-namespace-id-and-eui64.patch @@ -0,0 +1,90 @@ +From 89dbced60971ec1d01386b0457c20e045cbfe5ad Mon Sep 17 00:00:00 2001 +From: Patrick Wildt <patrick@blueri.se> +Date: Thu, 3 Oct 2019 13:48:47 +0200 +Subject: [PATCH 10/17] nvme: add accessor to namespace id and eui64 + +This adds a function which can be used by e.g. EFI to retrieve +the namespace identifier and EUI64. For that it adds the EUI64 +to its driver internal namespace structure and copies the EUI64 +during namespace identification. + +Upstream-Status: Backport [Solid-Run BSP] + +Signed-off-by: Patrick Wildt <patrick@blueri.se> +Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> +Reviewed-by: Bin Meng <bmeng.cn@gmail.com> +(cherry picked from commit c50b2883dfc1ce355dc37238741ef97cd2c5d000) +Signed-off-by: Olof Johansson <olof@lixom.net> +--- + drivers/nvme/nvme.c | 13 +++++++++++++ + drivers/nvme/nvme.h | 1 + + include/nvme.h | 12 ++++++++++++ + 3 files changed, 26 insertions(+) + +diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c +index 47f101e280..ee6b581d9e 100644 +--- a/drivers/nvme/nvme.c ++++ b/drivers/nvme/nvme.c +@@ -621,6 +621,18 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev) + return 0; + } + ++int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64) ++{ ++ struct nvme_ns *ns = dev_get_priv(udev); ++ ++ if (ns_id) ++ *ns_id = ns->ns_id; ++ if (eui64) ++ memcpy(eui64, ns->eui64, sizeof(ns->eui64)); ++ ++ return 0; ++} ++ + int nvme_scan_namespace(void) + { + struct uclass *uc; +@@ -657,6 +669,7 @@ static int nvme_blk_probe(struct udevice *udev) + if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) + return -EIO; + ++ memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64)); + flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK; + ns->flbas = flbas; + ns->lba_shift = id->lbaf[flbas].ds; +diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h +index 922f7abfe8..0e8cb221a7 100644 +--- a/drivers/nvme/nvme.h ++++ b/drivers/nvme/nvme.h +@@ -637,6 +637,7 @@ struct nvme_ns { + struct list_head list; + struct nvme_dev *dev; + unsigned ns_id; ++ u8 eui64[8]; + int devnum; + int lba_shift; + u8 flbas; +diff --git a/include/nvme.h b/include/nvme.h +index 2c3d14d241..2cdf8ce320 100644 +--- a/include/nvme.h ++++ b/include/nvme.h +@@ -78,4 +78,16 @@ int nvme_scan_namespace(void); + */ + int nvme_print_info(struct udevice *udev); + ++/** ++ * nvme_get_namespace_id - return namespace identifier ++ * ++ * This returns the namespace identifier. ++ * ++ * @udev: NVMe controller device ++ * @ns_id: Place where to put the name space identifier ++ * @eui64: Place where to put the IEEE Extended Unique Identifier ++ * @return: 0 on success, -ve on error ++ */ ++int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64); ++ + #endif /* __NVME_H__ */ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0011-nvme-flush-dcache-on-both-r-w-and-the-prp-list.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0011-nvme-flush-dcache-on-both-r-w-and-the-prp-list.patch new file mode 100644 index 00000000..0e0c8d54 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0011-nvme-flush-dcache-on-both-r-w-and-the-prp-list.patch @@ -0,0 +1,51 @@ +From bdc721890d0a68d297959052394da75112080bfe Mon Sep 17 00:00:00 2001 +From: Patrick Wildt <patrick@blueri.se> +Date: Wed, 16 Oct 2019 23:22:50 +0200 +Subject: [PATCH 11/17] nvme: flush dcache on both r/w, and the prp list + +It's possible that the data cache for the buffer still holds data +to be flushed to memory, since the buffer was probably used as stack +before. Thus we need to make sure to flush it also on reads, since +it's possible that the cache is automatically flused to memory after +the NVMe DMA transfer happened, thus overwriting the NVMe transfer's +data. Also add a missing dcache flush for the prp list. + +Upstream-Status: Backport [Solid-Run BSP] + +Signed-off-by: Patrick Wildt <patrick@blueri.se> +Reviewed-by: Bin Meng <bmeng.cn@gmail.com> +(cherry picked from commit 8c403402ca691c967516481b6bc2c879d683a73d) +Signed-off-by: Olof Johansson <olof@lixom.net> +--- + drivers/nvme/nvme.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c +index ee6b581d9e..53ff6e89aa 100644 +--- a/drivers/nvme/nvme.c ++++ b/drivers/nvme/nvme.c +@@ -123,6 +123,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, + } + *prp2 = (ulong)dev->prp_pool; + ++ flush_dcache_range((ulong)dev->prp_pool, (ulong)dev->prp_pool + ++ dev->prp_entry_num * sizeof(u64)); ++ + return 0; + } + +@@ -705,9 +708,8 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, + u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); + u64 total_lbas = blkcnt; + +- if (!read) +- flush_dcache_range((unsigned long)buffer, +- (unsigned long)buffer + total_len); ++ flush_dcache_range((unsigned long)buffer, ++ (unsigned long)buffer + total_len); + + c.rw.opcode = read ? nvme_cmd_read : nvme_cmd_write; + c.rw.flags = 0; +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0012-nvme-use-page-aligned-buffer-for-identify-command.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0012-nvme-use-page-aligned-buffer-for-identify-command.patch new file mode 100644 index 00000000..c82cd649 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0012-nvme-use-page-aligned-buffer-for-identify-command.patch @@ -0,0 +1,94 @@ +From f6b1bf35c4423eb1f038eca80df4f7d6862f338a Mon Sep 17 00:00:00 2001 +From: Patrick Wildt <patrick@blueri.se> +Date: Wed, 16 Oct 2019 08:42:04 +0200 +Subject: [PATCH 12/17] nvme: use page-aligned buffer for identify command + +Change the stack-allocated buffer for the identification command +to explicitly allocate page-aligned buffers. Even though the spec +seems to allow having admin queue commands on non page-aligned +buffers, it seems to not be possible on my i.MX8MQ board with a +a Silicon Power P34A80. Since all of the NVMe drivers I have seen +always do admin commands on a page-aligned buffer, which does work +on my system, it makes sense for us to do that as well. + +Upstream-Status: Backport [Solid-Run BSP] + +Signed-off-by: Patrick Wildt <patrick@blueri.se> +Reviewed-by: Bin Meng <bmeng.cn@gmail.com> +(cherry picked from commit 2f83481dff9c4f253a6ac341911d78d4984ca07b) +Signed-off-by: Olof Johansson <olof@lixom.net> +--- + drivers/nvme/nvme.c | 24 ++++++++++++++++++------ + 1 file changed, 18 insertions(+), 6 deletions(-) + +diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c +index 53ff6e89aa..f915817aaa 100644 +--- a/drivers/nvme/nvme.c ++++ b/drivers/nvme/nvme.c +@@ -583,14 +583,19 @@ static int nvme_setup_io_queues(struct nvme_dev *dev) + + static int nvme_get_info_from_identify(struct nvme_dev *dev) + { +- ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ctrl)); +- struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf; ++ struct nvme_id_ctrl *ctrl; + int ret; + int shift = NVME_CAP_MPSMIN(dev->cap) + 12; + ++ ctrl = memalign(dev->page_size, sizeof(struct nvme_id_ctrl)); ++ if (!ctrl) ++ return -ENOMEM; ++ + ret = nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl); +- if (ret) ++ if (ret) { ++ free(ctrl); + return -EIO; ++ } + + dev->nn = le32_to_cpu(ctrl->nn); + dev->vwc = ctrl->vwc; +@@ -621,6 +626,7 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev) + dev->max_transfer_shift = 20; + } + ++ free(ctrl); + return 0; + } + +@@ -661,16 +667,21 @@ static int nvme_blk_probe(struct udevice *udev) + struct blk_desc *desc = dev_get_uclass_platdata(udev); + struct nvme_ns *ns = dev_get_priv(udev); + u8 flbas; +- ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ns)); +- struct nvme_id_ns *id = (struct nvme_id_ns *)buf; + struct pci_child_platdata *pplat; ++ struct nvme_id_ns *id; ++ ++ id = memalign(ndev->page_size, sizeof(struct nvme_id_ns)); ++ if (!id) ++ return -ENOMEM; + + memset(ns, 0, sizeof(*ns)); + ns->dev = ndev; + /* extract the namespace id from the block device name */ + ns->ns_id = trailing_strtol(udev->name) + 1; +- if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) ++ if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) { ++ free(id); + return -EIO; ++ } + + memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64)); + flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK; +@@ -689,6 +700,7 @@ static int nvme_blk_probe(struct udevice *udev) + memcpy(desc->product, ndev->serial, sizeof(ndev->serial)); + memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev)); + ++ free(id); + return 0; + } + +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0013-lx2160a-cex7-move-from-lsdk-19.06-to-lsdk-19.09.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0013-lx2160a-cex7-move-from-lsdk-19.06-to-lsdk-19.09.patch new file mode 100644 index 00000000..0ccb2eb9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0013-lx2160a-cex7-move-from-lsdk-19.06-to-lsdk-19.09.patch @@ -0,0 +1,923 @@ +From 4672d506d0abfba7890b2719b7b53f3694b88d06 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 3 Feb 2020 14:26:55 +0200 +Subject: [PATCH 13/17] lx2160a-cex7 : move from lsdk-19.06 to lsdk-19.09 + +Following is a list of changes - +1. I2C moved to DM model +2. removed emc2301 support +3. synchronized vid.c with NXP's driver. But it is still not functional +in u-boot +4. Added eMMC to distroboot target list + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm/dts/fsl-lx2160a-cex7.dts | 14 + + board/solidrun/common/Makefile | 1 - + board/solidrun/common/emc2301.c | 31 -- + board/solidrun/common/vid.c | 638 +++++++++++++++++++++++++++++- + board/solidrun/lx2160a/lx2160a.c | 8 + + configs/lx2160acex7_tfa_defconfig | 8 +- + 6 files changed, 665 insertions(+), 35 deletions(-) + delete mode 100644 board/solidrun/common/emc2301.c + +diff --git a/arch/arm/dts/fsl-lx2160a-cex7.dts b/arch/arm/dts/fsl-lx2160a-cex7.dts +index 4fbcaafb0e..4ca67df25a 100644 +--- a/arch/arm/dts/fsl-lx2160a-cex7.dts ++++ b/arch/arm/dts/fsl-lx2160a-cex7.dts +@@ -46,6 +46,20 @@ + status = "okay"; + }; + ++&i2c0 { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ ++ rtc@51 { ++ compatible = "pcf2127-rtc"; ++ reg = <0x51>; ++ }; ++}; ++ + &sata0 { + status = "okay"; + }; +diff --git a/board/solidrun/common/Makefile b/board/solidrun/common/Makefile +index 454a18e2f9..c335c658d4 100644 +--- a/board/solidrun/common/Makefile ++++ b/board/solidrun/common/Makefile +@@ -16,7 +16,6 @@ ifdef MINIMAL + obj- := __dummy__.o + else + obj-$(CONFIG_VID) += vid.o +-obj-$(CONFIG_EMC2301) += emc2301.o + ifdef CONFIG_SECURE_BOOT + obj-$(CONFIG_CMD_ESBC_VALIDATE) += fsl_validate.o cmd_esbc_validate.o + endif +diff --git a/board/solidrun/common/emc2301.c b/board/solidrun/common/emc2301.c +deleted file mode 100644 +index a4780dbfcc..0000000000 +--- a/board/solidrun/common/emc2301.c ++++ /dev/null +@@ -1,31 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright 2019 SolidRun ltd. Based on code from NXP LX2160A RDB +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#include <common.h> +-#include <command.h> +-#include <i2c.h> +-#include <asm/io.h> +- +-#include "emc2301.h" +- +-DECLARE_GLOBAL_DATA_PTR; +- +-void set_fan_speed(u8 data) +-{ +- if (i2c_write(I2C_EMC2301_ADDR, I2C_EMC2301_FAN, 1, &data, 1) != 0) { +- puts("Error: failed to change fan speed\n"); +- } +-} +- +-void emc2301_init(void) +-{ +- u8 data; +- +- data = I2C_EMC2301_CMD; +- if (i2c_write(I2C_EMC2301_ADDR, I2C_EMC2301_CONF, 1, &data, 1) != 0) +- puts("Error: failed to configure EMC2301\n"); +-} +diff --git a/board/solidrun/common/vid.c b/board/solidrun/common/vid.c +index cc81e80c37..c7a626fd4f 100644 +--- a/board/solidrun/common/vid.c ++++ b/board/solidrun/common/vid.c +@@ -1,8 +1,9 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* + * Copyright 2014 Freescale Semiconductor, Inc. +- * Copyright 2018 NXP ++ * Copyright 2019 NXP + */ ++ + #include <common.h> + #include <command.h> + #include <i2c.h> +@@ -38,6 +39,52 @@ int __weak board_adjust_vdd(int vdd) + return 0; + } + ++#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ ++ defined(CONFIG_VOL_MONITOR_IR36021_READ) ++/* ++ * Get the i2c address configuration for the IR regulator chip ++ * ++ * There are some variance in the RDB HW regarding the I2C address configuration ++ * for the IR regulator chip, which is likely a problem of external resistor ++ * accuracy. So we just check each address in a hopefully non-intrusive mode ++ * and use the first one that seems to work ++ * ++ * The IR chip can show up under the following addresses: ++ * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) ++ * 0x09 (Verified on T1040RDB-PA) ++ * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) ++ */ ++static int find_ir_chip_on_i2c(void) ++{ ++ int i2caddress; ++ int ret; ++ u8 byte; ++ int i; ++ const int ir_i2c_addr[] = {0x38, 0x08, 0x09}; ++#ifdef CONFIG_DM_I2C ++ struct udevice *dev; ++#endif ++ ++ /* Check all the address */ ++ for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) { ++ i2caddress = ir_i2c_addr[i]; ++#ifndef CONFIG_DM_I2C ++ ret = i2c_read(i2caddress, ++ IR36021_MFR_ID_OFFSET, 1, (void *)&byte, ++ sizeof(byte)); ++#else ++ ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_read(dev, IR36021_MFR_ID_OFFSET, ++ (void *)&byte, sizeof(byte)); ++#endif ++ if ((ret >= 0) && (byte == IR36021_MFR_ID)) ++ return i2caddress; ++ } ++ return -1; ++} ++#endif ++ + /* Maximum loop count waiting for new voltage to take effect */ + #define MAX_LOOP_WAIT_NEW_VOL 100 + /* Maximum loop count waiting for the voltage to be stable */ +@@ -60,23 +107,135 @@ int __weak board_adjust_vdd(int vdd) + #define ADC_MIN_ACCURACY 4 + #endif + ++#ifdef CONFIG_VOL_MONITOR_INA220 ++static int read_voltage_from_INA220(int i2caddress) ++{ ++ int i, ret, voltage_read = 0; ++ u16 vol_mon; ++ u8 buf[2]; ++#ifdef CONFIG_DM_I2C ++ struct udevice *dev; ++#endif ++ ++ for (i = 0; i < NUM_READINGS; i++) { ++#ifndef CONFIG_DM_I2C ++ ret = i2c_read(I2C_VOL_MONITOR_ADDR, ++ I2C_VOL_MONITOR_BUS_V_OFFSET, 1, ++ (void *)&buf, 2); ++#else ++ ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_read(dev, I2C_VOL_MONITOR_BUS_V_OFFSET, ++ (void *)&buf, 2); ++#endif ++ if (ret) { ++ printf("VID: failed to read core voltage\n"); ++ return ret; ++ } ++ vol_mon = (buf[0] << 8) | buf[1]; ++ if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { ++ printf("VID: Core voltage sensor error\n"); ++ return -1; ++ } ++ debug("VID: bus voltage reads 0x%04x\n", vol_mon); ++ /* LSB = 4mv */ ++ voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; ++ udelay(WAIT_FOR_ADC); ++ } ++ /* calculate the average */ ++ voltage_read /= NUM_READINGS; ++ ++ return voltage_read; ++} ++#endif ++ ++/* read voltage from IR */ ++#ifdef CONFIG_VOL_MONITOR_IR36021_READ ++static int read_voltage_from_IR(int i2caddress) ++{ ++ int i, ret, voltage_read = 0; ++ u16 vol_mon; ++ u8 buf; ++#ifdef CONFIG_DM_I2C ++ struct udevice *dev; ++#endif ++ ++ for (i = 0; i < NUM_READINGS; i++) { ++#ifndef CONFIG_DM_I2C ++ ret = i2c_read(i2caddress, ++ IR36021_LOOP1_VOUT_OFFSET, ++ 1, (void *)&buf, 1); ++#else ++ ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_read(dev, IR36021_LOOP1_VOUT_OFFSET, ++ (void *)&buf, 1); ++#endif ++ if (ret) { ++ printf("VID: failed to read vcpu\n"); ++ return ret; ++ } ++ vol_mon = buf; ++ if (!vol_mon) { ++ printf("VID: Core voltage sensor error\n"); ++ return -1; ++ } ++ debug("VID: bus voltage reads 0x%02x\n", vol_mon); ++ /* Resolution is 1/128V. We scale up here to get 1/128mV ++ * and divide at the end ++ */ ++ voltage_read += vol_mon * 1000; ++ udelay(WAIT_FOR_ADC); ++ } ++ /* Scale down to the real mV as IR resolution is 1/128V, rounding up */ ++ voltage_read = DIV_ROUND_UP(voltage_read, 128); ++ ++ /* calculate the average */ ++ voltage_read /= NUM_READINGS; ++ ++ /* Compensate for a board specific voltage drop between regulator and ++ * SoC before converting into an IR VID value ++ */ ++ voltage_read -= board_vdd_drop_compensation(); ++ ++ return voltage_read; ++} ++#endif ++ ++#ifdef CONFIG_VOL_MONITOR_LTC3882_READ + /* read the current value of the LTC Regulator Voltage */ + static int read_voltage_from_LTC(int i2caddress) + { + int ret, vcode = 0; + u8 chan = PWM_CHANNEL0; + ++#ifndef CONFIG_DM_I2C + /* select the PAGE 0 using PMBus commands PAGE for VDD*/ + ret = i2c_write(I2C_VOL_MONITOR_ADDR, + PMBUS_CMD_PAGE, 1, &chan, 1); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_write(dev, PMBUS_CMD_PAGE, &chan, 1); ++#endif + if (ret) { + printf("VID: failed to select VDD Page 0\n"); + return ret; + } + ++#ifndef CONFIG_DM_I2C + /*read the output voltage using PMBus command READ_VOUT*/ + ret = i2c_read(I2C_VOL_MONITOR_ADDR, + PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); ++#else ++ ret = dm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2); ++ if (ret) { ++ printf("VID: failed to read the volatge\n"); ++ return ret; ++ } ++#endif + if (ret) { + printf("VID: failed to read the volatge\n"); + return ret; +@@ -87,14 +246,131 @@ static int read_voltage_from_LTC(int i2caddress) + + return vcode; + } ++#endif + + static int read_voltage(int i2caddress) + { + int voltage_read; ++#ifdef CONFIG_VOL_MONITOR_INA220 ++ voltage_read = read_voltage_from_INA220(i2caddress); ++#elif defined CONFIG_VOL_MONITOR_IR36021_READ ++ voltage_read = read_voltage_from_IR(i2caddress); ++#elif defined CONFIG_VOL_MONITOR_LTC3882_READ + voltage_read = read_voltage_from_LTC(i2caddress); ++#else ++ return -1; ++#endif + return voltage_read; + } + ++#ifdef CONFIG_VOL_MONITOR_IR36021_SET ++/* ++ * We need to calculate how long before the voltage stops to drop ++ * or increase. It returns with the loop count. Each loop takes ++ * several readings (WAIT_FOR_ADC) ++ */ ++static int wait_for_new_voltage(int vdd, int i2caddress) ++{ ++ int timeout, vdd_current; ++ ++ vdd_current = read_voltage(i2caddress); ++ /* wait until voltage starts to reach the target. Voltage slew ++ * rates by typical regulators will always lead to stable readings ++ * within each fairly long ADC interval in comparison to the ++ * intended voltage delta change until the target voltage is ++ * reached. The fairly small voltage delta change to any target ++ * VID voltage also means that this function will always complete ++ * within few iterations. If the timeout was ever reached, it would ++ * point to a serious failure in the regulator system. ++ */ ++ for (timeout = 0; ++ abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && ++ timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) { ++ vdd_current = read_voltage(i2caddress); ++ } ++ if (timeout >= MAX_LOOP_WAIT_NEW_VOL) { ++ printf("VID: Voltage adjustment timeout\n"); ++ return -1; ++ } ++ return timeout; ++} ++ ++/* ++ * this function keeps reading the voltage until it is stable or until the ++ * timeout expires ++ */ ++static int wait_for_voltage_stable(int i2caddress) ++{ ++ int timeout, vdd_current, vdd; ++ ++ vdd = read_voltage(i2caddress); ++ udelay(NUM_READINGS * WAIT_FOR_ADC); ++ ++ /* wait until voltage is stable */ ++ vdd_current = read_voltage(i2caddress); ++ /* The maximum timeout is ++ * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC ++ */ ++ for (timeout = MAX_LOOP_WAIT_VOL_STABLE; ++ abs(vdd - vdd_current) > ADC_MIN_ACCURACY && ++ timeout > 0; timeout--) { ++ vdd = vdd_current; ++ udelay(NUM_READINGS * WAIT_FOR_ADC); ++ vdd_current = read_voltage(i2caddress); ++ } ++ if (timeout == 0) ++ return -1; ++ return vdd_current; ++} ++ ++/* Set the voltage to the IR chip */ ++static int set_voltage_to_IR(int i2caddress, int vdd) ++{ ++ int wait, vdd_last; ++ int ret; ++ u8 vid; ++ ++ /* Compensate for a board specific voltage drop between regulator and ++ * SoC before converting into an IR VID value ++ */ ++ vdd += board_vdd_drop_compensation(); ++#ifdef CONFIG_FSL_LSCH2 ++ vid = DIV_ROUND_UP(vdd - 265, 5); ++#else ++ vid = DIV_ROUND_UP(vdd - 245, 5); ++#endif ++ ++#ifndef CONFIG_DM_I2C ++ ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET, ++ 1, (void *)&vid, sizeof(vid)); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_write(dev, IR36021_LOOP1_MANUAL_ID_OFFSET, ++ (void *)&vid, sizeof(vid)); ++ ++#endif ++ if (ret) { ++ printf("VID: failed to write VID\n"); ++ return -1; ++ } ++ wait = wait_for_new_voltage(vdd, i2caddress); ++ if (wait < 0) ++ return -1; ++ debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); ++ ++ vdd_last = wait_for_voltage_stable(i2caddress); ++ if (vdd_last < 0) ++ return -1; ++ debug("VID: Current voltage is %d mV\n", vdd_last); ++ return vdd_last; ++} ++ ++#endif ++ ++#ifdef CONFIG_VOL_MONITOR_LTC3882_SET + /* this function sets the VDD and returns the value set */ + static int set_voltage_to_LTC(int i2caddress, int vdd) + { +@@ -111,8 +387,17 @@ static int set_voltage_to_LTC(int i2caddress, int vdd) + vdd & 0xFF, (vdd & 0xFF00) >> 8}; + + /* Write the desired voltage code to the regulator */ ++#ifndef CONFIG_DM_I2C + ret = i2c_write(I2C_VOL_MONITOR_ADDR, + PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_write(dev, PMBUS_CMD_PAGE_PLUS_WRITE, ++ (void *)&buff, 5); ++#endif + if (ret) { + printf("VID: I2C failed to write to the volatge regulator\n"); + return -1; +@@ -131,25 +416,39 @@ static int set_voltage_to_LTC(int i2caddress, int vdd) + + return vdd_last; + } ++#endif + + static int set_voltage(int i2caddress, int vdd) + { + int vdd_last = -1; + ++#ifdef CONFIG_VOL_MONITOR_IR36021_SET ++ vdd_last = set_voltage_to_IR(i2caddress, vdd); ++#elif defined CONFIG_VOL_MONITOR_LTC3882_SET + vdd_last = set_voltage_to_LTC(i2caddress, vdd); ++#else ++ #error Specific voltage monitor must be defined ++#endif + return vdd_last; + } + ++#ifdef CONFIG_FSL_LSCH3 + int adjust_vdd(ulong vdd_override) + { + int re_enable = disable_interrupts(); + struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 fusesr; ++#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ ++ defined(CONFIG_VOL_MONITOR_IR36021_READ) ++ u8 vid, buf; ++#else + u8 vid; ++#endif + int vdd_target, vdd_current, vdd_last; + int ret, i2caddress; + unsigned long vdd_string_override; + char *vdd_string; ++#ifdef CONFIG_ARCH_LX2160A + static const u16 vdd[32] = { + 8250, + 7875, +@@ -184,16 +483,129 @@ int adjust_vdd(ulong vdd_override) + 0, /* reserved */ + 0, /* reserved */ + }; ++#else ++#ifdef CONFIG_ARCH_LS1088A ++ static const uint16_t vdd[32] = { ++ 10250, ++ 9875, ++ 9750, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 9000, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 10000, /* 1.0000V */ ++ 10125, ++ 10250, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ }; ++ ++#else ++ static const uint16_t vdd[32] = { ++ 10500, ++ 0, /* reserved */ ++ 9750, ++ 0, /* reserved */ ++ 9500, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 9000, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 10000, /* 1.0000V */ ++ 0, /* reserved */ ++ 10250, ++ 0, /* reserved */ ++ 10500, ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ 0, /* reserved */ ++ }; ++#endif ++#endif + struct vdd_drive { + u8 vid; + unsigned voltage; + }; ++ + ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); + if (ret) { + debug("VID: I2C failed to switch channel\n"); + ret = -1; + goto exit; + } ++#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ ++ defined(CONFIG_VOL_MONITOR_IR36021_READ) ++ ret = find_ir_chip_on_i2c(); ++ if (ret < 0) { ++ printf("VID: Could not find voltage regulator on I2C.\n"); ++ ret = -1; ++ goto exit; ++ } else { ++ i2caddress = ret; ++ debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); ++ } ++ ++ /* check IR chip work on Intel mode*/ ++#ifndef CONFIG_DM_I2C ++ ret = i2c_read(i2caddress, ++ IR36021_INTEL_MODE_OOFSET, ++ 1, (void *)&buf, 1); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET, ++ (void *)&buf, 1); ++#endif ++ if (ret) { ++ printf("VID: failed to read IR chip mode.\n"); ++ ret = -1; ++ goto exit; ++ } ++ ++ if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { ++ printf("VID: IR Chip is not used in Intel mode.\n"); ++ ret = -1; ++ goto exit; ++ } ++#endif ++ + /* get the voltage ID from fuse status register */ + fusesr = in_le32(&gur->dcfg_fusesr); + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & +@@ -203,7 +615,6 @@ int adjust_vdd(ulong vdd_override) + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; + } + vdd_target = vdd[vid]; +- printf ("vid FUSE index %d (vdd_target = %d)\n",vid,vdd_target); + + /* check override variable for overriding VDD */ + vdd_string = env_get(CONFIG_VID_FLS_ENV); +@@ -246,8 +657,28 @@ int adjust_vdd(ulong vdd_override) + vdd_current = vdd_last; + debug("VID: Core voltage is currently at %d mV\n", vdd_last); + ++#ifdef CONFIG_VOL_MONITOR_LTC3882_SET + /* Set the target voltage */ + vdd_last = vdd_current = set_voltage(i2caddress, vdd_target); ++#else ++ /* ++ * Adjust voltage to at or one step above target. ++ * As measurements are less precise than setting the values ++ * we may run through dummy steps that cancel each other ++ * when stepping up and then down. ++ */ ++ while (vdd_last > 0 && ++ vdd_last < vdd_target) { ++ vdd_current += IR_VDD_STEP_UP; ++ vdd_last = set_voltage(i2caddress, vdd_current); ++ } ++ while (vdd_last > 0 && ++ vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { ++ vdd_current -= IR_VDD_STEP_DOWN; ++ vdd_last = set_voltage(i2caddress, vdd_current); ++ } ++ ++#endif + if (board_adjust_vdd(vdd_target) < 0) { + ret = -1; + goto exit; +@@ -264,6 +695,197 @@ exit: + i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); + return ret; + } ++#else /* !CONFIG_FSL_LSCH3 */ ++int adjust_vdd(ulong vdd_override) ++{ ++ int re_enable = disable_interrupts(); ++#if defined(CONFIG_FSL_LSCH2) ++ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); ++#else ++ ccsr_gur_t __iomem *gur = ++ (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); ++#endif ++ u32 fusesr; ++ u8 vid, buf; ++ int vdd_target, vdd_current, vdd_last; ++ int ret, i2caddress; ++ unsigned long vdd_string_override; ++ char *vdd_string; ++ static const uint16_t vdd[32] = { ++ 0, /* unused */ ++ 9875, /* 0.9875V */ ++ 9750, ++ 9625, ++ 9500, ++ 9375, ++ 9250, ++ 9125, ++ 9000, ++ 8875, ++ 8750, ++ 8625, ++ 8500, ++ 8375, ++ 8250, ++ 8125, ++ 10000, /* 1.0000V */ ++ 10125, ++ 10250, ++ 10375, ++ 10500, ++ 10625, ++ 10750, ++ 10875, ++ 11000, ++ 0, /* reserved */ ++ }; ++ struct vdd_drive { ++ u8 vid; ++ unsigned voltage; ++ }; ++ ++ ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); ++ if (ret) { ++ debug("VID: I2C failed to switch channel\n"); ++ ret = -1; ++ goto exit; ++ } ++#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ ++ defined(CONFIG_VOL_MONITOR_IR36021_READ) ++ ret = find_ir_chip_on_i2c(); ++ if (ret < 0) { ++ printf("VID: Could not find voltage regulator on I2C.\n"); ++ ret = -1; ++ goto exit; ++ } else { ++ i2caddress = ret; ++ debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); ++ } ++ ++ /* check IR chip work on Intel mode*/ ++#ifndef CONFIG_DM_I2C ++ ret = i2c_read(i2caddress, ++ IR36021_INTEL_MODE_OOFSET, ++ 1, (void *)&buf, 1); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET, ++ (void *)&buf, 1); ++#endif ++ if (ret) { ++ printf("VID: failed to read IR chip mode.\n"); ++ ret = -1; ++ goto exit; ++ } ++ if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { ++ printf("VID: IR Chip is not used in Intel mode.\n"); ++ ret = -1; ++ goto exit; ++ } ++#endif ++ ++ /* get the voltage ID from fuse status register */ ++ fusesr = in_be32(&gur->dcfg_fusesr); ++ /* ++ * VID is used according to the table below ++ * --------------------------------------- ++ * | DA_V | ++ * |-------------------------------------| ++ * | 5b00000 | 5b00001-5b11110 | 5b11111 | ++ * ---------------+---------+-----------------+---------| ++ * | D | 5b00000 | NO VID | VID = DA_V | NO VID | ++ * | A |----------+---------+-----------------+---------| ++ * | _ | 5b00001 |VID = | VID = |VID = | ++ * | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| ++ * | _ | 5b11110 | | | | ++ * | A |----------+---------+-----------------+---------| ++ * | L | 5b11111 | No VID | VID = DA_V | NO VID | ++ * | T | | | | | ++ * ------------------------------------------------------ ++ */ ++#ifdef CONFIG_FSL_LSCH2 ++ vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & ++ FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; ++ if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) { ++ vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & ++ FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; ++ } ++#else ++ vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & ++ FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; ++ if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) { ++ vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & ++ FSL_CORENET_DCFG_FUSESR_VID_MASK; ++ } ++#endif ++ vdd_target = vdd[vid]; ++ ++ /* check override variable for overriding VDD */ ++ vdd_string = env_get(CONFIG_VID_FLS_ENV); ++ if (vdd_override == 0 && vdd_string && ++ !strict_strtoul(vdd_string, 10, &vdd_string_override)) ++ vdd_override = vdd_string_override; ++ if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { ++ vdd_target = vdd_override * 10; /* convert to 1/10 mV */ ++ debug("VDD override is %lu\n", vdd_override); ++ } else if (vdd_override != 0) { ++ printf("Invalid value.\n"); ++ } ++ if (vdd_target == 0) { ++ debug("VID: VID not used\n"); ++ ret = 0; ++ goto exit; ++ } else { ++ /* divide and round up by 10 to get a value in mV */ ++ vdd_target = DIV_ROUND_UP(vdd_target, 10); ++ debug("VID: vid = %d mV\n", vdd_target); ++ } ++ ++ /* ++ * Read voltage monitor to check real voltage. ++ */ ++ vdd_last = read_voltage(i2caddress); ++ if (vdd_last < 0) { ++ printf("VID: Couldn't read sensor abort VID adjustment\n"); ++ ret = -1; ++ goto exit; ++ } ++ vdd_current = vdd_last; ++ debug("VID: Core voltage is currently at %d mV\n", vdd_last); ++ /* ++ * Adjust voltage to at or one step above target. ++ * As measurements are less precise than setting the values ++ * we may run through dummy steps that cancel each other ++ * when stepping up and then down. ++ */ ++ while (vdd_last > 0 && ++ vdd_last < vdd_target) { ++ vdd_current += IR_VDD_STEP_UP; ++ vdd_last = set_voltage(i2caddress, vdd_current); ++ } ++ while (vdd_last > 0 && ++ vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { ++ vdd_current -= IR_VDD_STEP_DOWN; ++ vdd_last = set_voltage(i2caddress, vdd_current); ++ } ++ ++ if (vdd_last > 0) ++ printf("VID: Core voltage after adjustment is at %d mV\n", ++ vdd_last); ++ else ++ ret = -1; ++exit: ++ if (re_enable) ++ enable_interrupts(); ++ ++ i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); ++ ++ return ret; ++} ++#endif + + static int print_vdd(void) + { +@@ -274,6 +896,18 @@ static int print_vdd(void) + debug("VID : I2c failed to switch channel\n"); + return -1; + } ++#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ ++ defined(CONFIG_VOL_MONITOR_IR36021_READ) ++ ret = find_ir_chip_on_i2c(); ++ if (ret < 0) { ++ printf("VID: Could not find voltage regulator on I2C.\n"); ++ goto exit; ++ } else { ++ i2caddress = ret; ++ debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); ++ } ++#endif ++ + /* + * Read voltage monitor to check real voltage. + */ +diff --git a/board/solidrun/lx2160a/lx2160a.c b/board/solidrun/lx2160a/lx2160a.c +index b0d9f1012e..3713e91351 100644 +--- a/board/solidrun/lx2160a/lx2160a.c ++++ b/board/solidrun/lx2160a/lx2160a.c +@@ -62,7 +62,15 @@ int select_i2c_ch_pca9547(u8 ch) + { + int ret; + ++#ifndef CONFIG_DM_I2C + ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); ++#else ++ struct udevice *dev; ++ ++ ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev); ++ if (!ret) ++ ret = dm_i2c_write(dev, 0, &ch, 1); ++#endif + if (ret) { + puts("PCA: failed to select proper channel\n"); + return ret; +diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig +index 3891d2a7c4..89a47adb23 100644 +--- a/configs/lx2160acex7_tfa_defconfig ++++ b/configs/lx2160acex7_tfa_defconfig +@@ -2,7 +2,6 @@ CONFIG_ARM=y + CONFIG_TARGET_LX2160ACEX7=y + CONFIG_SYS_TEXT_BASE=0x82000000 + CONFIG_SYS_MALLOC_F_LEN=0x6000 +-CONFIG_EMC2301=y + CONFIG_TFABOOT=y + CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y + CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +@@ -73,3 +72,10 @@ CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_EFI_LOADER_BOUNCE_BUFFER=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_I2C_DEFAULT_BUS_NUMBER=0 ++CONFIG_DM_RTC=y ++CONFIG_DM_GPIO=y ++CONFIG_CMD_DATE=y ++CONFIG_RTC_PCF2127=y +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0014-lx2160acex7-pcie-fixup-and-boot-from-eMMC-print.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0014-lx2160acex7-pcie-fixup-and-boot-from-eMMC-print.patch new file mode 100644 index 00000000..4505f2cf --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0014-lx2160acex7-pcie-fixup-and-boot-from-eMMC-print.patch @@ -0,0 +1,128 @@ +From 5d45e2ab0e00cc809c11a3d0a412022f25639c58 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 12:53:48 +0200 +Subject: [PATCH 14/17] lx2160acex7: pcie fixup and boot from eMMC print + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + board/solidrun/lx2160a/lx2160a.c | 66 +++++++++++++++++++++++++++++++ + configs/lx2160acex7_tfa_defconfig | 3 +- + 2 files changed, 68 insertions(+), 1 deletion(-) + +diff --git a/board/solidrun/lx2160a/lx2160a.c b/board/solidrun/lx2160a/lx2160a.c +index 3713e91351..b7211a2d5c 100644 +--- a/board/solidrun/lx2160a/lx2160a.c ++++ b/board/solidrun/lx2160a/lx2160a.c +@@ -20,6 +20,8 @@ + #include <efi_loader.h> + #include <asm/arch/mmu.h> + #include <hwconfig.h> ++#include <asm/arch/clock.h> ++#include <asm/arch/config.h> + #include <asm/arch/fsl_serdes.h> + #include <asm/arch/soc.h> + #include "../../freescale/common/vid.h" +@@ -106,6 +108,66 @@ int board_early_init_f(void) + #ifdef CONFIG_OF_BOARD_FIXUP + int board_fix_fdt(void *fdt) + { ++ char *reg_name, *old_str, *new_str; ++ const char *reg_names; ++ int names_len, old_str_len, new_str_len, remaining_str_len; ++ struct str_map { ++ char *old_str; ++ char *new_str; ++ } reg_names_map[] = { ++ { "ccsr", "dbi" }, ++ { "pf_ctrl", "ctrl" } ++ }; ++ int off = -1, i; ++ ++ if (IS_SVR_REV(get_svr(), 1, 0)) ++ return 0; ++ ++ off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); ++ while (off != -FDT_ERR_NOTFOUND) { ++ fdt_setprop(fdt, off, "compatible", "fsl,ls-pcie", ++ strlen("fsl,ls-pcie") + 1); ++ ++ reg_names = fdt_getprop(fdt, off, "reg-names", &names_len); ++ if (!reg_names) ++ continue; ++ ++ reg_name = (char *)reg_names; ++ remaining_str_len = names_len - (reg_name - reg_names); ++ i = 0; ++ while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) { ++ old_str = reg_names_map[i].old_str; ++ new_str = reg_names_map[i].new_str; ++ old_str_len = strlen(old_str); ++ new_str_len = strlen(new_str); ++ if (memcmp(reg_name, old_str, old_str_len) == 0) { ++ /* first only leave required bytes for new_str ++ * and copy rest of the string after it ++ */ ++ memcpy(reg_name + new_str_len, ++ reg_name + old_str_len, ++ remaining_str_len - old_str_len); ++ /* Now copy new_str */ ++ memcpy(reg_name, new_str, new_str_len); ++ names_len -= old_str_len; ++ names_len += new_str_len; ++ i++; ++ } ++ ++ reg_name = memchr(reg_name, '\0', remaining_str_len); ++ if (!reg_name) ++ break; ++ ++ reg_name += 1; ++ ++ remaining_str_len = names_len - (reg_name - reg_names); ++ } ++ ++ fdt_setprop(fdt, off, "reg-names", reg_names, names_len); ++ off = fdt_node_offset_by_compatible(fdt, off, ++ "fsl,lx2160a-pcie"); ++ } ++ + return 0; + } + #endif +@@ -135,6 +197,10 @@ int checkboard(void) + + if (src == BOOT_SOURCE_SD_MMC) { + puts("SD\n"); ++ } else if (src == BOOT_SOURCE_SD_MMC2) { ++ puts("eMMC\n"); ++ } else { ++ puts("FlexSPI DEV#0\n"); + } + puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz\n"); + puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); +diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig +index 89a47adb23..2a3441d263 100644 +--- a/configs/lx2160acex7_tfa_defconfig ++++ b/configs/lx2160acex7_tfa_defconfig +@@ -2,6 +2,7 @@ CONFIG_ARM=y + CONFIG_TARGET_LX2160ACEX7=y + CONFIG_SYS_TEXT_BASE=0x82000000 + CONFIG_SYS_MALLOC_F_LEN=0x6000 ++CONFIG_FSPI_AHB_EN_4BYTE=y + CONFIG_TFABOOT=y + CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y + CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +@@ -58,7 +59,7 @@ CONFIG_PCI=y + CONFIG_DM_PCI=y + CONFIG_DM_PCI_COMPAT=y + CONFIG_PCIE_LAYERSCAPE_GEN4=y +-CONFIG_PHY_ATHEROS=y ++CONFIG_PCIE_LAYERSCAPE=y + CONFIG_E1000=y + CONFIG_DM_SCSI=y + CONFIG_DM_SERIAL=y +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0015-lx2160a-cex7-set-mmc-dev-to-0-when-attempting-sd_boo.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0015-lx2160a-cex7-set-mmc-dev-to-0-when-attempting-sd_boo.patch new file mode 100644 index 00000000..ce8dec3f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0015-lx2160a-cex7-set-mmc-dev-to-0-when-attempting-sd_boo.patch @@ -0,0 +1,32 @@ +From 47923a2f4cf159963d20acd1744619b44c9d5b02 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 23 Mar 2020 15:13:11 +0200 +Subject: [PATCH 15/17] lx2160a-cex7: set mmc dev to 0 when attempting + sd_bootcmd + +When attempting sd_bootcmd which is the fallback of failed distroboot +then set mmc dev to 0; since distroboot already set that variable to 1. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + include/configs/lx2160acex7.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/configs/lx2160acex7.h b/include/configs/lx2160acex7.h +index 478cd8242f..7116e038a1 100644 +--- a/include/configs/lx2160acex7.h ++++ b/include/configs/lx2160acex7.h +@@ -73,7 +73,7 @@ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ +- "mmcinfo; mmc read $load_addr " \ ++ "mmc dev 0; mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0016-lx2160acex7-Misc-fixes-to-support-LSDK-20.04.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0016-lx2160acex7-Misc-fixes-to-support-LSDK-20.04.patch new file mode 100644 index 00000000..83e2139c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0016-lx2160acex7-Misc-fixes-to-support-LSDK-20.04.patch @@ -0,0 +1,127 @@ +From eacde91ef9d8b05ad4df8b6755dd3726e40fb75c Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 4 May 2020 22:52:02 +0300 +Subject: [PATCH 16/17] lx2160acex7: Misc fixes to support LSDK-20.04 + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm/Kconfig | 1 + + board/solidrun/lx2160a/lx2160a.c | 4 +++- + configs/lx2160acex7_tfa_defconfig | 24 ++++++++++++------------ + 3 files changed, 16 insertions(+), 13 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 8615e1673f..c78e17a0ed 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1195,6 +1195,7 @@ config TARGET_LX2160ACEX7 + select ARCH_MISC_INIT + select ARM64 + select ARMV8_MULTIENTRY ++ select ARCH_SUPPORT_TFABOOT + select BOARD_LATE_INIT + help + Support for SolidRun LX2160A based com express type 7 module and +diff --git a/board/solidrun/lx2160a/lx2160a.c b/board/solidrun/lx2160a/lx2160a.c +index b7211a2d5c..975431fd53 100644 +--- a/board/solidrun/lx2160a/lx2160a.c ++++ b/board/solidrun/lx2160a/lx2160a.c +@@ -16,7 +16,7 @@ + #include <fdt_support.h> + #include <linux/libfdt.h> + #include <fsl-mc/fsl_mc.h> +-#include <environment.h> ++#include <env_internal.h> + #include <efi_loader.h> + #include <asm/arch/mmu.h> + #include <hwconfig.h> +@@ -26,6 +26,8 @@ + #include <asm/arch/soc.h> + #include "../../freescale/common/vid.h" + #include <fsl_immap.h> ++#include <asm/arch-fsl-layerscape/fsl_icid.h> ++#include <asm/gic-v3.h> + + #ifdef CONFIG_EMC2301 + #include "../common/emc2301.h" +diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig +index 2a3441d263..d2e62a6e91 100644 +--- a/configs/lx2160acex7_tfa_defconfig ++++ b/configs/lx2160acex7_tfa_defconfig +@@ -1,16 +1,15 @@ + CONFIG_ARM=y + CONFIG_TARGET_LX2160ACEX7=y ++CONFIG_TFABOOT=y + CONFIG_SYS_TEXT_BASE=0x82000000 + CONFIG_SYS_MALLOC_F_LEN=0x6000 + CONFIG_FSPI_AHB_EN_4BYTE=y +-CONFIG_TFABOOT=y ++CONFIG_NR_DRAM_BANKS=3 + CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y + CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y + CONFIG_AHCI=y +-CONFIG_NR_DRAM_BANKS=3 + CONFIG_FIT_VERBOSE=y + CONFIG_OF_BOARD_SETUP=y +-CONFIG_OF_BOARD_FIXUP=y + CONFIG_OF_STDOUT_VIA_ALIAS=y + CONFIG_BOOTDELAY=10 + CONFIG_USE_BOOTARGS=y +@@ -29,6 +28,7 @@ CONFIG_CMD_NVME=y + CONFIG_NVME=y + CONFIG_MP=y + CONFIG_OF_CONTROL=y ++CONFIG_OF_BOARD_FIXUP=y + CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-cex7" + CONFIG_ENV_IS_IN_MMC=y + CONFIG_ENV_IS_IN_SPI_FLASH=y +@@ -36,6 +36,10 @@ CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_DM=y + CONFIG_SATA_CEVA=y + CONFIG_FSL_CAAM=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_I2C_DEFAULT_BUS_NUMBER=0 + CONFIG_DM_MMC=y + CONFIG_FSL_ESDHC=y + CONFIG_DM_SPI_FLASH=y +@@ -55,28 +59,24 @@ CONFIG_CMD_MII=y + CONFIG_CMD_DHCP=y + CONFIG_CMD_FAT=y + CONFIG_CMD_EXT2=y ++CONFIG_E1000=y + CONFIG_PCI=y + CONFIG_DM_PCI=y + CONFIG_DM_PCI_COMPAT=y + CONFIG_PCIE_LAYERSCAPE_GEN4=y + CONFIG_PCIE_LAYERSCAPE=y +-CONFIG_E1000=y ++CONFIG_DM_RTC=y ++CONFIG_RTC_PCF2127=y ++ + CONFIG_DM_SCSI=y + CONFIG_DM_SERIAL=y +-CONFIG_SERIAL_PROBE_ALL=y + CONFIG_SPI=y + CONFIG_DM_SPI=y + CONFIG_NXP_FSPI=y +-# CONFIG_SYS_NXP_FSPI_AHB=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +-CONFIG_DM_I2C=y +-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +-CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +-CONFIG_DM_RTC=y +-CONFIG_DM_GPIO=y + CONFIG_CMD_DATE=y +-CONFIG_RTC_PCF2127=y ++CONFIG_GIC_V3_ITS=y +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0017-lx2160acex7-misc-fixes-to-get-booting-from-eMMC-func.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0017-lx2160acex7-misc-fixes-to-get-booting-from-eMMC-func.patch new file mode 100644 index 00000000..053da1cf --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq-lx2160acex7/0017-lx2160acex7-misc-fixes-to-get-booting-from-eMMC-func.patch @@ -0,0 +1,70 @@ +From ce6a26cf0aa2af3a93b1183bd3543a9913e0656e Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Tue, 5 May 2020 01:01:01 +0300 +Subject: [PATCH 17/17] lx2160acex7: misc fixes to get booting from eMMC + functional + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + include/configs/lx2160a_common.h | 10 ++++++++++ + include/configs/lx2160acex7.h | 14 ++++++++------ + 2 files changed, 18 insertions(+), 6 deletions(-) + +diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h +index 91e9a2470f..f0c44a2368 100644 +--- a/include/configs/lx2160a_common.h ++++ b/include/configs/lx2160a_common.h +@@ -235,6 +235,16 @@ int select_i2c_ch_pca9547_sec(unsigned char ch); + "esbc_validate 0x80680000 ;" \ + "fsl_mc start mc 0x80a00000 0x80e00000\0" + ++#define SD2_MC_INIT_CMD \ ++ "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \ ++ "mmc read 0x80e00000 0x7000 0x800;" \ ++ "env exists secureboot && " \ ++ "mmc read 0x80640000 0x3200 0x20 && " \ ++ "mmc read 0x80680000 0x3400 0x20 && " \ ++ "esbc_validate 0x80640000 && " \ ++ "esbc_validate 0x80680000 ;" \ ++ "fsl_mc start mc 0x80a00000 0x80e00000\0" ++ + #define EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "ramdisk_addr=0x800000\0" \ +diff --git a/include/configs/lx2160acex7.h b/include/configs/lx2160acex7.h +index 7116e038a1..310168db47 100644 +--- a/include/configs/lx2160acex7.h ++++ b/include/configs/lx2160acex7.h +@@ -46,11 +46,6 @@ + + #endif + +-/* EMC2301 */ +-#define I2C_MUX_CH_EMC2301 0x01 +-#define I2C_EMC2301_ADDR 0x2f +-#define I2C_EMC2301_CMD 0x40 +-#define I2C_EMC2301_PWM 0x80 + + /* EEPROM */ + #undef CONFIG_ID_EEPROM /* Fixme */ +@@ -73,7 +68,14 @@ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ +- "mmc dev 0; mmcinfo; mmc read $load_addr " \ ++ "mmcinfo; mmc read $load_addr " \ ++ "$kernel_addr_sd $kernel_size_sd ;" \ ++ "env exists secureboot && mmc read $kernelheader_addr_r "\ ++ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ ++ " && esbc_validate ${kernelheader_addr_r};" \ ++ "bootm $load_addr#$BOARD\0" \ ++ "emmc_bootcmd=echo Trying load from emmc card..;" \ ++ "mmc dev 1; mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq_2019.10.bbappend b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq_2019.10.bbappend new file mode 100644 index 00000000..40e6c38d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-qoriq_2019.10.bbappend @@ -0,0 +1,22 @@ +FILESEXTRAPATHS_append_lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:" + +SRC_URI_append_lx2160acex7 = "\ + file://0001-armv8-add-lx2160acex7-build-inclusion.patch \ + file://0002-armv8-lx2160acex-misc-hacks-to-get-the-sources-built.patch \ + file://0003-armv8-lx2160acex7-defconfig-and-main-platform-includ.patch \ + file://0004-armv8-lx2160acex7-common-files-for-platform-support.patch \ + file://0005-armv8-lx2160acex7-lx2160acex-device-tree.patch \ + file://0006-armv8-lx2160acex7-board-support-files.patch \ + file://0007-lx2160a-load-dpl-into-0x80001000-instead-of-0x80d000.patch \ + file://0008-uboot-add-nvme-commands-and-for-distroboot.patch \ + file://0009-armv8-lx2160acex7-Fix-booting-from-NVMe-drives.patch \ + file://0010-nvme-add-accessor-to-namespace-id-and-eui64.patch \ + file://0011-nvme-flush-dcache-on-both-r-w-and-the-prp-list.patch \ + file://0012-nvme-use-page-aligned-buffer-for-identify-command.patch \ + file://0013-lx2160a-cex7-move-from-lsdk-19.06-to-lsdk-19.09.patch \ + file://0014-lx2160acex7-pcie-fixup-and-boot-from-eMMC-print.patch \ + file://0015-lx2160a-cex7-set-mmc-dev-to-0-when-attempting-sd_boo.patch \ + file://0016-lx2160acex7-Misc-fixes-to-support-LSDK-20.04.patch \ + file://0017-lx2160acex7-misc-fixes-to-get-booting-from-eMMC-func.patch \ +" + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-boundary_2018.07.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-boundary_2018.07.bb index ef47d5f4..15542968 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-boundary_2018.07.bb +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-boundary_2018.07.bb @@ -42,4 +42,4 @@ addtask deploy after do_install before do_build FILES_${PN} += "/" -COMPATIBLE_MACHINE = "(nitrogen6x-lite|nitrogen6x|nitrogen6sx|nitrogen7|nitrogen8m)" +COMPATIBLE_MACHINE = "(nitrogen6x-lite|nitrogen6x|nitrogen6sx|nitrogen7|nitrogen8m|nitrogen8mm|nitrogen8mn)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq/boot.cmd.in b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq/boot.cmd.in new file mode 100644 index 00000000..d42efaf9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq/boot.cmd.in @@ -0,0 +1,12 @@ +setenv kernel @KERNEL_IMAGETYPE@ +setenv fdt_file @KERNEL_DEVICETREE@ +setenv rootfs_mmc0 setenv rootfs /dev/mmcblk0p2 +setenv rootfs_mmc1 setenv rootfs /dev/mmcblk1p2 +setenv rootfs_nvme0 setenv rootfs /dev/nvme0n1p2 +setenv rootfs_scsi0 setenv rootfs /dev/sda2 +setenv rootfs_usb0 setenv rootfs /dev/sda2 +setenv rootfs_dhcp setenv rootfs /dev/root +run rootfs_${target} +setenv new_bootargs setenv bootargs console=ttyAMA0,115200 earlycon=pl011,mmio32,0x21c0000 root=${rootfs} default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf +run new_bootargs +${bootfstype}load ${devtype} ${devnum}:1 ${kernel_addr_r} /${kernel}; ${bootfstype}load ${devtype} ${devnum}:1 ${fdt_addr_r} /${fdt_file}; @KERNEL_BOOTCMD@ ${kernel_addr_r} - ${fdt_addr_r} diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq_2019.10.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq_2019.10.bb new file mode 100644 index 00000000..eadd6832 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-qoriq_2019.10.bb @@ -0,0 +1,54 @@ +DESCRIPTION = "Boot script for launching images with U-Boot distro boot" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" + +INHIBIT_DEFAULT_DEPS = "1" +DEPENDS = "u-boot-mkimage-native" + +SRC_URI = "\ + file://boot.cmd.in \ +" + +KERNEL_BOOTCMD ?= "booti" + +inherit deploy + +do_configure[noexec] = "1" + +do_compile() { + kernel_devicetree_spc="" + kernel_devicetree_tmp="" + for kdt in ${KERNEL_DEVICETREE} + do + kernel_devicetree_tmp="${kernel_devicetree_tmp}${kernel_devicetree_spc}$(basename ${kdt})" + kernel_devicetree_spc=" " + done + kernel_devicetree="${kernel_devicetree_tmp}" + sed -e 's/@KERNEL_BOOTCMD[@]/${KERNEL_BOOTCMD}/' -e "s,@KERNEL_IMAGETYPE[@],${KERNEL_IMAGETYPE},g" \ + -e "s,@KERNEL_DEVICETREE[@],${kernel_devicetree},g" \ + "${WORKDIR}/boot.cmd.in" > ${B}/boot.cmd + target_arch="${TARGET_ARCH}" + test "${TARGET_ARCH}" = "aarch64" && target_arch="arm64" + mkimage -A ${target_arch} -T script -C none -n "Distro boot script" -d ${B}/boot.cmd ${B}/boot.scr +} + +do_install() { + install -Dm 0644 ${B}/boot.scr ${D}/boot/boot.scr +} + +do_deploy() { + install -Dm 0644 ${D}/boot/boot.scr ${DEPLOYDIR}/boot.scr-${MACHINE}-${PV}-${PR} + cd ${DEPLOYDIR} + rm -f boot.scr-${MACHINE} + ln -sf boot.scr-${MACHINE}-${PV}-${PR} boot.scr-${MACHINE} +} + +addtask deploy after do_install before do_build + +PROVIDES += "u-boot-default-script" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +COMPATIBLE_MACHINE = "(qoriq)" + +FILES_${PN} = "/boot" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex/boot.cmd.in b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex/boot.cmd.in new file mode 100644 index 00000000..5c514bad --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex/boot.cmd.in @@ -0,0 +1,30 @@ +if test ${devtype} = "ubi" +then + echo "This script is not meant to distro boot from raw NAND flash." + exit +fi + +if test ${distro_bootpart} != 1 +then + echo "Boot partition needs to be the first partition" + exit +fi + +if test -n ${setup} +then + run setup +else + env set setupargs 'console=tty1 consoleblank=0' +fi +test -n ${m4boot} || env set m4boot ';' +test -n ${fdtfile} || env set fdtfile $fdt_file +test -n ${kernel_image} || env set kernel_image ${boot_file} + +env set uuid_set 'part uuid ${devtype} ${devnum}:2 uuid' +env set emmcargs_set 'env set emmcargs root=PARTUUID=${uuid} rw rootfstype=ext4 rootwait' +env set bootcmd_args 'env set bootargs ${defargs} ${emmcargs} ${setupargs} ${vidargs} ${tdxargs}' +env set bootcmd_kernel 'load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} ${kernel_image}' +env set bootcmd_dtb 'load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${fdtfile}' +env set bootcmd_run '@@KERNEL_BOOTCMD@@ ${kernel_addr_r} - ${fdt_addr_r}' +env set bootcmd 'run m4boot; run bootcmd_dtb && run uuid_set && run emmcargs_set && run bootcmd_args && run bootcmd_kernel && run bootcmd_run' +run bootcmd diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex_2019.07.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex_2019.07.bb new file mode 100644 index 00000000..a2aacdbb --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-script-toradex_2019.07.bb @@ -0,0 +1,45 @@ +DESCRIPTION = "Boot script for launching images with U-Boot distro boot" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" + +INHIBIT_DEFAULT_DEPS = "1" +DEPENDS = "u-boot-mkimage-native" + +SRC_URI = "\ + file://boot.cmd.in \ +" + +KERNEL_BOOTCMD ??= "bootz" +KERNEL_BOOTCMD_aarch64 ?= "booti" + +inherit deploy nopackages + +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +do_mkimage() { + sed -e 's/@@KERNEL_BOOTCMD@@/${KERNEL_BOOTCMD}/' \ + "${WORKDIR}/boot.cmd.in" > ${B}/boot.cmd + mkimage -T script -C none -n "Distro boot script" -d ${B}/boot.cmd ${B}/boot.scr +} + +addtask mkimage after do_compile before do_install + +do_install() { + install -Dm 0644 ${B}/boot.scr ${D}/boot.scr +} + +do_deploy() { + install -Dm 0644 ${D}/boot.scr ${DEPLOYDIR}/boot.scr-${MACHINE}-${PV}-${PR} + cd ${DEPLOYDIR} + rm -f boot.scr-${MACHINE} + ln -sf boot.scr-${MACHINE}-${PV}-${PR} boot.scr-${MACHINE} +} + +addtask deploy after do_install before do_build + +PROVIDES += "u-boot-default-script" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +COMPATIBLE_MACHINE = "(apalis-imx6|colibri-imx6|colibri-imx6ull|colibri-imx7-emmc|colibri-imx7-nand|colibri-vf)" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2016.11.inc b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-common.inc index dd8c9215..50319983 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2016.11.inc +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-common.inc @@ -1,19 +1,21 @@ # Copyright (C) 2015 Toradex AG -# Based on u-boot-fslc.inc Copyright (C) 2012-2014 O.S. Systems Software LTDA +# Based on u-boot-fslc.inc Copyright (C) 2012-2020 O.S. Systems Software LTDA # Released under the MIT license (see COPYING.MIT for the terms) SUMMARY = "U-Boot bootloader with support for Toradex Computer on Modules" LICENSE = "GPLv2+" -LIC_FILES_CHKSUM = "file://Licenses/README;md5=a2c678cfd4a4d97135585cad908541c6" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=30503fd321432fc713238f582193b78e" + +DEPENDS += "flex-native bison-native" SRC_URI = "git://git.toradex.com/u-boot-toradex.git;branch=${SRCBRANCH}" -SRCREV ?= "aca804c9ddadbf34a8ff82779e5598ec5e319f23" -SRCBRANCH ?= "2016.11-toradex" +SRCREV = "8f0e253cbceb940a3540e9ce73279a3e9a5a8528" +SRCBRANCH = "toradex_2019.07" S = "${WORKDIR}/git" -PV = "2016.11+git${SRCPV}" +PV = "2019.07+git${SRCPV}" PACKAGE_ARCH = "${MACHINE_ARCH}" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/0001-tools-fix-cross-compiling-tools-when-HOSTCC-is-overr.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/0001-tools-fix-cross-compiling-tools-when-HOSTCC-is-overr.patch deleted file mode 100644 index 2c087e85..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/0001-tools-fix-cross-compiling-tools-when-HOSTCC-is-overr.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 3b0825296aeba69c2cbfd3e179db2e9cbe5e70d7 Mon Sep 17 00:00:00 2001 -From: Masahiro Yamada <yamada.masahiro@socionext.com> -Date: Mon, 13 Mar 2017 17:43:16 +0900 -Subject: [PATCH] tools: fix cross-compiling tools when HOSTCC is overridden - -Upstream-Status: Backport - -Richard reported U-Boot tools issues in OpenEmbedded/Yocto project. - -OE needs to be able to change the default compiler. If we pass in -HOSTCC through the make command, it overwrites all HOSTCC instances, -including ones in tools/Makefile and tools/env/Makefile, which breaks -"make cross_tools" and "make env", respectively. - -Add "override" directives to avoid overriding HOSTCC instances that -really need to point to the cross-compiler. - -Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> -Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org> -Reviewed-by: Simon Glass <sjg@chromium.org> ---- - tools/Makefile | 2 +- - tools/env/Makefile | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/tools/Makefile b/tools/Makefile -index 1c840d7..a894b5c 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -262,7 +262,7 @@ $(LOGO_DATA_H): $(obj)/bmp_logo $(LOGO_BMP) - subdir- += env - - ifneq ($(CROSS_BUILD_TOOLS),) --HOSTCC = $(CC) -+override HOSTCC = $(CC) - - quiet_cmd_crosstools_strip = STRIP $^ - cmd_crosstools_strip = $(STRIP) $^; touch $@ -diff --git a/tools/env/Makefile b/tools/env/Makefile -index 38ad118..95b28c0 100644 ---- a/tools/env/Makefile -+++ b/tools/env/Makefile -@@ -8,7 +8,7 @@ - # fw_printenv is supposed to run on the target system, which means it should be - # built with cross tools. Although it may look weird, we only replace "HOSTCC" - # with "CC" here for the maximum code reuse of scripts/Makefile.host. --HOSTCC = $(CC) -+override HOSTCC = $(CC) - - # Compile for a hosted environment on the target - HOST_EXTRACFLAGS = $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \ --- -2.7.4 - diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils_2016.11.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils_2016.11.bb deleted file mode 100644 index 727c0a84..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils_2016.11.bb +++ /dev/null @@ -1,42 +0,0 @@ -require recipes-bsp/u-boot/u-boot-toradex_${PV}.inc - -SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities" - -SRC_URI += "file://0001-tools-fix-cross-compiling-tools-when-HOSTCC-is-overr.patch \ - file://fw_env.config \ -" - -DEPENDS += "mtd-utils" - -INSANE_SKIP_${PN} = "already-stripped" -EXTRA_OEMAKE_class-target = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${CC} ${CFLAGS} ${LDFLAGS}" HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}" V=1' -EXTRA_OEMAKE_class-cross = 'ARCH=${TARGET_ARCH} CC="${CC} ${CFLAGS} ${LDFLAGS}" V=1' - -inherit uboot-config - -do_compile () { - oe_runmake ${UBOOT_MACHINE} - oe_runmake env -} - -do_install () { - install -d ${D}${base_sbindir} - install -d ${D}${sysconfdir} - install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_printenv - install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_setenv - install -m 0644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config -} - -do_install_class-cross () { - install -d ${D}${bindir_cross} - install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_printenv - install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_setenv -} - -SYSROOT_DIRS_append_class-cross = " ${bindir_cross}" - -PROVIDES += "u-boot-fw-utils" -RPROVIDES_${PN} += "u-boot-fw-utils" - -PACKAGE_ARCH = "${MACHINE_ARCH}" -BBCLASSEXTEND = "cross" diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/colibri-imx6ull/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx6ull/fw_env.config index 930bceee..930bceee 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/colibri-imx6ull/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx6ull/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx7-emmc/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx7-emmc/fw_env.config new file mode 100644 index 00000000..3c2ebb84 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx7-emmc/fw_env.config @@ -0,0 +1,17 @@ +# Configuration file for fw_(printenv/setenv) utility. +# Up to two entries are valid, in this case the redundant +# environment sector is assumed present. +# Device offset must be prefixed with 0x to be parsed as a hexadecimal value. +# On a block device a negative offset is treated as a backwards offset from the +# end of the device/partition, rather than a forwards offset from the start. + +# Colibri iMX7 Dual 1GB (eMMC) +# U-Boot environment is stored at the end of the first eMMC boot partition +# hence use a negative value. The environment is just in front of the config +# block which occupies the last sector (hence -0x200) +# Note that /dev/mmcblk0boot0 by default is read only +# To use fw_setenv you have to first make it writeable, on the cmdline e.g. by +# $ echo 0 > /sys/block/mmcblk0boot0/force_ro + +# Block device name Device offset Env. size +/dev/mmcblk0boot0 -0x2200 0x2000 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/colibri-imx7/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx7/fw_env.config index b59116d4..b59116d4 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/colibri-imx7/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/colibri-imx7/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/fw_env.config index e054ccbb..e054ccbb 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/mx6/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/mx6/fw_env.config index a9e724e4..a9e724e4 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/mx6/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/mx6/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/vf/fw_env.config b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/vf/fw_env.config index 51f09d1d..51f09d1d 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex-fw-utils/vf/fw_env.config +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex/vf/fw_env.config diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2016.11.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2016.11.bb deleted file mode 100644 index e409131d..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2016.11.bb +++ /dev/null @@ -1,8 +0,0 @@ -require recipes-bsp/u-boot/u-boot.inc -require recipes-bsp/u-boot/u-boot-toradex_${PV}.inc - -LOCALVERSION = "-2.8.3" - -PROVIDES += "u-boot" - -inherit fsl-u-boot-localversion dtc-145 diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2019.07.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2019.07.bb new file mode 100644 index 00000000..6a1c71e6 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-toradex_2019.07.bb @@ -0,0 +1,31 @@ +require recipes-bsp/u-boot/u-boot.inc +require recipes-bsp/u-boot/u-boot-toradex-common.inc + +DEPENDS += "bc-native dtc-native" + +SRC_URI += "file://fw_env.config" + +PROVIDES += "u-boot" + +B = "${WORKDIR}/build" +do_configure[cleandirs] = "${B}" + +inherit fsl-u-boot-localversion + +# U-Boot is flashed 1k into a NAND block, create a binary which prepends +# U-boot with 1k of zeros to ease flashing +nand_padding () { + dd bs=1024 count=1 if=/dev/zero | cat - u-boot.imx > u-boot-nand.imx +} + +do_compile_append_colibri-imx6ull () { + nand_padding +} + +do_compile_append_colibri-imx7 () { + nand_padding +} + +do_compile_append_colibri-vf () { + nand_padding +} diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite/0001-Fix-build-with-recent-layers.patch b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite/0001-Fix-build-with-recent-layers.patch new file mode 100644 index 00000000..dba4dc18 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite/0001-Fix-build-with-recent-layers.patch @@ -0,0 +1,34 @@ +From 8c3356f5328d3e48709ed7483564a1cd79e387cf Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Andreas=20M=C3=BCller?= <schnitzeltony@gmail.com> +Date: Fri, 3 Jan 2020 14:04:46 +0100 +Subject: [PATCH] Fix build with recent layers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fixes: +arm-mortsgna-linux-gnueabi-ld.bfd: error: linker script file '<workdir>/git/arch/arm/lib/elf_arm_efi.lds' appears multiple times + +Upstream-Status: Pending + +Signed-off-by: Andreas Müller <schnitzeltony@gmail.com> +--- + scripts/Makefile.lib | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib +index 23be324369..a32daa4394 100644 +--- a/scripts/Makefile.lib ++++ b/scripts/Makefile.lib +@@ -377,8 +377,6 @@ cmd_efi_ld = $(LD) -nostdlib -znocombreloc -T $(EFI_LDS_PATH) -shared \ + + EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS) + +-$(obj)/helloworld.so: $(EFI_LDS_PATH) +- + $(obj)/helloworld.so: $(obj)/helloworld.o arch/$(ARCH)/lib/$(EFI_CRT0) \ + arch/$(ARCH)/lib/$(EFI_RELOC) + $(call cmd,efi_ld) +-- +2.21.0 + diff --git a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite_2017.03.bb b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite_2017.03.bb index 818e03e4..c529e56a 100644 --- a/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite_2017.03.bb +++ b/bsp/meta-freescale-3rdparty/recipes-bsp/u-boot/u-boot-variscite_2017.03.bb @@ -5,15 +5,19 @@ LICENSE = "GPLv2+" LIC_FILES_CHKSUM = "file://Licenses/README;md5=a2c678cfd4a4d97135585cad908541c6" COMPATIBLE_MACHINE = "(imx6qdl-variscite-som)" +DEPENDS += "bc-native" +UBOOT_INITIAL_ENV = "" + PROVIDES += "u-boot" SPL_BINARY = "SPL" -SRCREV = "3b5f889cb501c9fbe44c750c657dcd9ea4875176" +SRCREV = "a7869c2cde98e5f5b1886d8f54dff321a7aa0597" SRCBRANCH = "imx_v2017.03_4.9.11_1.0.0_ga_var01" SRC_URI = "\ git://github.com/varigit/uboot-imx.git;protocol=git;branch=${SRCBRANCH} \ + file://0001-Fix-build-with-recent-layers.patch \ " S = "${WORKDIR}/git" diff --git a/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcexpress/interfaces b/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcexpress/interfaces new file mode 100644 index 00000000..6d1c3d21 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcexpress/interfaces @@ -0,0 +1,39 @@ +# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) + +# The loopback interface +auto lo +iface lo inet loopback + +# Wireless interfaces + +# Client infrastructure mode +auto wlan0 +iface wlan0 inet static + address 192.168.8.2 + netmask 255.255.255.0 + network 192.168.8.0 + wireless_mode managed + wireless_essid any + wpa-driver nl80211 + wpa-conf /etc/wpa_supplicant.conf + +# SoftAP mode +auto wlan1 +iface wlan1 inet static + address 192.168.9.2 + netmask 255.255.255.0 + network 192.168.9.0 + post-up /etc/init.d/hostapd start + pre-down /etc/init.d/hostapd stop + +# Wired interfaces +auto eth0 +iface eth0 inet dhcp + +# Ethernet/RNDIS gadget (g_ether) +# ... or on host side, usbnet and random hwaddr +iface usb0 inet static + address 192.168.7.2 + netmask 255.255.255.0 + network 192.168.7.0 + gateway 192.168.7.1 diff --git a/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcpro/interfaces b/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcpro/interfaces new file mode 100644 index 00000000..281f91c4 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/init-ifupdown/init-ifupdown/ccimx6ulsbcpro/interfaces @@ -0,0 +1,40 @@ +# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) + +# The loopback interface +auto lo +iface lo inet loopback + +# Wireless interfaces + +# Client infrastructure mode +auto wlan0 +iface wlan0 inet static + address 192.168.8.2 + netmask 255.255.255.0 + network 192.168.8.0 + wireless_mode managed + wireless_essid any + wpa-driver nl80211 + wpa-conf /etc/wpa_supplicant.conf + +# SoftAP mode +auto wlan1 +iface wlan1 inet static + address 192.168.9.2 + netmask 255.255.255.0 + network 192.168.9.0 + post-up /etc/init.d/hostapd start + pre-down /etc/init.d/hostapd stop + +# Wired interfaces +auto eth1 +iface eth0 inet dhcp +iface eth1 inet dhcp + +# Ethernet/RNDIS gadget (g_ether) +# ... or on host side, usbnet and random hwaddr +iface usb0 inet static + address 192.168.7.2 + netmask 255.255.255.0 + network 192.168.7.0 + gateway 192.168.7.1 diff --git a/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi.bb b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi.bb new file mode 100644 index 00000000..c438c91c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi.bb @@ -0,0 +1,25 @@ +# Copyright (C) 2019 Digi International. + +DESCRIPTION = "udev rules for Digi International SOMs" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +SRC_URI_ccimx6ul = " \ + file://81-qcom-wifi.rules \ + file://qca6564-init-wifi.sh \ + file://81-qcom-bt.rules \ + file://qca6564-attach.sh \ +" + +S = "${WORKDIR}" + +do_install_ccimx6ul () { + install -d ${D}${sysconfdir}/udev/rules.d + install -m 0644 ${WORKDIR}/81-qcom-wifi.rules ${D}${sysconfdir}/udev/rules.d/ + install -m 0644 ${WORKDIR}/81-qcom-bt.rules ${D}${sysconfdir}/udev/rules.d/ + install -d ${D}${sysconfdir}/udev/scripts/ + install -m 0755 ${WORKDIR}/qca6564-init-wifi.sh ${D}${sysconfdir}/udev/scripts/ + install -m 0755 ${WORKDIR}/qca6564-attach.sh ${D}${sysconfdir}/udev/scripts/ +} + +COMPATIBLE_MACHINE = "(ccimx6ul)" diff --git a/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-bt.rules b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-bt.rules new file mode 100644 index 00000000..aee7fd75 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-bt.rules @@ -0,0 +1,2 @@ +# Attach QCA6564 Bluetooth (uart) +SUBSYSTEM=="tty", KERNEL=="ttymxc0", ACTION=="add", RUN="/etc/udev/scripts/qca6564-attach.sh start" diff --git a/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-wifi.rules b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-wifi.rules new file mode 100644 index 00000000..0f32f74a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/81-qcom-wifi.rules @@ -0,0 +1,2 @@ +# Load Qualcomm wireless module (sdio) +SUBSYSTEM=="sdio", ACTION=="add", ENV{MODALIAS}=="sdio:c00v0271d050A", RUN="/etc/udev/scripts/qca6564-init-wifi.sh" diff --git a/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-attach.sh b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-attach.sh new file mode 100644 index 00000000..ef34c619 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-attach.sh @@ -0,0 +1,97 @@ +#!/bin/sh +#=============================================================================== +# +# Copyright (C) 2019 by Digi International Inc. +# All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 as published by +# the Free Software Foundation. +# +# +# !Description: Initialize bluetooth hardware +# +#=============================================================================== + +# Bluetooth power GPIO +BT_EN_QCA_GPIO_NR="137" + +# set_gpio_value <gpio_nr> <value> +set_gpio_value() { + local SG_GPIONR="${1}" + local SG_GPIOVAL="${2}" + local SG_GPIOPATH="/sys/class/gpio/gpio${SG_GPIONR}" + + [ -d "${SG_GPIOPATH}" ] || printf "%s" "${SG_GPIONR}" > /sys/class/gpio/export + printf out > "${SG_GPIOPATH}/direction" && sleep .2 + printf "${SG_GPIOVAL}" > "${SG_GPIOPATH}/value" && sleep .2 + [ -d "${SG_GPIOPATH}" ] && printf "%s" "${SG_GPIONR}" > /sys/class/gpio/unexport +} + +# powercycle_gpio <gpio_nr> +powercycle_gpio() { + set_gpio_value "${1}" 0 + set_gpio_value "${1}" 1 +} + +set_mac_address() { + # Get MAC address from the device tree. Use a default value if it has not been set. + BT_MACADDR="$(hexdump -ve '1/1 "%02X" ":"' /proc/device-tree/bluetooth/mac-address 2>/dev/null | sed 's/:$//g')" + if [ -z "${BT_MACADDR}" ] || [ "${BT_MACADDR}" = "00:00:00:00:00:00" ]; then + BT_MACADDR="00:04:F3:FF:FF:BB" + fi + + # Convert the BT address to the hcitool command format. + # Example: "00:04:F3:11:22:33" coverted to "33 22 11 F3 04 00" + HCI_BT_ADDR="$(echo ${BT_MACADDR} | sed -e 's,^\(..\):\(..\):\(..\):\(..\):\(..\):\(..\)$,\6 \5 \4 \3 \2 \1,g')" + + # Up the interface to be able to send hci commands + hciconfig hci0 up || echo "Cannot bring up bluetooth interface after initial attach" || exit 1 + + # Set the MAC address + hcitool -i hci0 cmd 3F 000B 01 02 06 ${HCI_BT_ADDR} > /dev/null || echo "Unable to set BT MAC Address" || exit 1 + + # Bring the interface down/up to apply the MAC change + hciconfig hci0 down || echo "Cannot bring down bluetooth interface after setting MAC" || exit 1 + hciconfig hci0 up || echo "Cannot bring up bluetooth interface after setting MAC" || exit 1 + +} + +bluetooth_init() { + # Start the Bluetooth driver and bring up the interface + killproc hciattach + powercycle_gpio "${BT_EN_QCA_GPIO_NR}" + hciattach ttymxc0 qualcomm 115200 -t3 flow unused > /dev/null 2>&1 || BT_ERROR="FAIL (hciattach)" + set_mac_address || BT_ERROR="Unable to set MAC address" +} + +# Source function library +. /etc/init.d/functions + +case "$1" in + start) + if [ -d "/proc/device-tree/bluetooth" ]; then + echo -n "Starting bluetooth hardware: " + bluetooth_init + echo "${BT_ERROR:-done.}" + fi + ;; + stop) + if [ -d "/sys/class/bluetooth/hci0" ]; then + echo -n "Stopping bluetooth hardware: " + killproc hciattach + # Power down bluetooth + set_gpio_value "${BT_EN_QCA_GPIO_NR}" 0 + echo "done." + fi + ;; + restart) + $0 stop + sleep 1 + $0 start + ;; + *) + echo "Usage: $0 {start|stop|restart}" + exit 1 + ;; +esac diff --git a/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-init-wifi.sh b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-init-wifi.sh new file mode 100644 index 00000000..fe3be3b4 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-core/udev/udev-rules-digi/ccimx6ul/qca6564-init-wifi.sh @@ -0,0 +1,121 @@ +#!/bin/sh +# +# Copyright (c) 2019 Digi International Inc. +# +# This Source Code Form is subject to the terms of the Mozilla Public +# License, v. 2.0. If a copy of the MPL was not distributed with this +# file, you can obtain one at http://mozilla.org/MPL/2.0/. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +# At this point of the boot (udev script), the system log (syslog) is not +# available yet, so use the kernel log buffer from userspace. +log() { + printf "<$1>qca6564: $2\n" >/dev/kmsg +} + +# Do nothing if the module is already loaded +grep -qws 'wlan' /proc/modules && exit 0 + +FIRMWARE_DIR="/lib/firmware" +MACFILE="${FIRMWARE_DIR}/wlan/wlan_mac.bin" +TMP_MACFILE="$(mktemp -t wlan_mac.XXXXXX)" + +# Read the MACs from DeviceTree. We can have up to four wireless interfaces +# The only required one is wlan0 that is mapped with device tree mac address +# without suffix. +for index in $(seq 0 3); do + MAC_ADDR="$(hexdump -ve '1/1 "%02X"' /proc/device-tree/wireless/mac-address${index%0} 2>/dev/null)" + if [ "${index}" = "0" ] && { [ -z "${MAC_ADDR}" ] || [ "${MAC_ADDR}" = "00:00:00:00:00:00" ]; }; then + # Set a default MAC for wlan0 + MAC_ADDR="0004F3FFFFFB" + fi + + # Add the MAC address to the firmware file with the expected format + echo "Intf${index}MacAddress=${MAC_ADDR}" >> ${TMP_MACFILE} +done + +# Override the MAC firmware file only if the MAC file has changed. +if ! cmp -s ${TMP_MACFILE} ${MACFILE}; then + cp ${TMP_MACFILE} ${MACFILE} +fi +rm -f "${TMP_MACFILE}" + +OTP_REGION_CODE="$(cat /proc/device-tree/digi,hwid,cert 2>/dev/null | tr -d '\0')" +DTB_REGION_CODE="$(cat /proc/device-tree/wireless/regulatory-domain 2>/dev/null | tr -d '\0')" +US_CODE="0x0" +WW_CODE="0x1" +JP_CODE="0x2" +# Check if the DTB_REGION_CODE is in the list of valid codes, +# if not use the OTP programmed value. +case "${DTB_REGION_CODE}" in + ${US_CODE} | ${WW_CODE} | ${JP_CODE}) + REGULATORY_DOMAIN="${DTB_REGION_CODE}";; + *) + if [ -n "${DTB_REGION_CODE}" ]; then + log "5" "[WARN] Invalid region code in device tree, using OTP value" + fi + REGULATORY_DOMAIN="${OTP_REGION_CODE}";; +esac + + +# Create symbolic links to the proper FW files depending on the country region +# Use a sub-shell here to change to firmware directory +( + cd "${FIRMWARE_DIR}" + + BDATA_SOURCE="bdwlan30_US.bin" + case "${REGULATORY_DOMAIN}" in + ${US_CODE}) + log "5" "Setting US wireless region";; + ${WW_CODE}|${JP_CODE}) + if [ -f "bdwlan30_World.bin" ]; then + log "5" "Setting WW (world wide) wireless region" + BDATA_SOURCE="bdwlan30_World.bin" + else + log "5" "[WARN] No WW (worldwide) board data file, using US" + fi + ;; + "") + log "5" "[WARN] region code not found, using US";; + *) + log "5" "[WARN] Invalid region code, using US";; + esac + + # We don't want to rewrite NAND every time we boot so only + # change the links if they are wrong. + BDATA_LINK="bdwlan30.bin" + UTFBDATA_LINK="utfbd30.bin" + if [ ! -e "${BDATA_LINK}" ] || ! cmp -s "${BDATA_LINK}" "${BDATA_SOURCE}"; then + ln -sf "${BDATA_SOURCE}" "${BDATA_LINK}" + ln -sf "${BDATA_SOURCE}" "${UTFBDATA_LINK}" + fi +) + +# Load the wireless module with the params defined in modprobe.d/qca6564.conf +# and reduce the console log level to avoid debug messages at boot time +LOGLEVEL="$(sed -ne 's,^kernel.printk[^=]*=[[:blank:]]*\(.*\)$,\1,g;T;p' /etc/sysctl.conf 2>/dev/null)" +[ -n "${LOGLEVEL}" ] && sysctl -q -w kernel.printk="${LOGLEVEL}" +modprobe wlan + +# Verify the interface is present +if [ -d "/sys/class/net/wlan0" ]; then + # Create 'wlan1' virtual interface + if [ -s "/proc/device-tree/wireless/mac-address1" ] && + [ -s "/proc/device-tree/wireless/mac-address2" ] && + [ -s "/proc/device-tree/wireless/mac-address3" ]; then + : + else + echo "[WARN] Using default MAC addresses for virtual interfaces." + fi + iw dev wlan0 interface add wlan1 type __ap +else + log "3" "[ERROR] Loading qca6564 module" +fi diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb deleted file mode 100644 index ccdd9314..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb +++ /dev/null @@ -1,20 +0,0 @@ -# Copyright (C) 2013 Timesys Corporation -SUMMARY = "Multicore communication kernel module" -LICENSE = "GPL-2.0 | BSD" -LIC_FILES_CHKSUM = "file://LICENSE;md5=c8959abcbbe4d6676c58eab9354019e6 \ - file://BSD_LICENSE;md5=10695b8f86532e5e44640acf4d92a2ef" - -PROVIDES = "virtual/kernel-module-mcc" -RPROVIDES_${PN} = "virtual/kernel-module-mcc" -RPROVIDES_${PN}-dev = "virtual/kernel-module-mcc-dev" - -inherit module - -SRC_URI = "http://repository.timesys.com/buildsources/m/mcc-kmod/mcc-kmod-${PV}/mcc-kmod-${PV}.tar.bz2" - -SRC_URI[md5sum] = "849dfdc34e08c7c82a5e8b452a95f1b3" -SRC_URI[sha256sum] = "ece0c9ccbfb5d2771b115f750361184bb80b2ae5fe82d97d38be2bfee3eeb87e" - -S = "${WORKDIR}/mcc-kmod-${PV}" - -COMPATIBLE_MACHINE = "(vf60)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564/modprobe-qca6564.conf b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564/modprobe-qca6564.conf new file mode 100644 index 00000000..13852c0c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564/modprobe-qca6564.conf @@ -0,0 +1,4 @@ +# Load the wlan module with values for SDIO3.0. +options wlan asyncintdelay=0x2 writecccr1=0xf2 writecccr1value=0xf \ + writecccr2=0xf1 writecccr2value=0xa8 writecccr3=0xf0 \ + writecccr3value=0xa1 writecccr4=0x15 writecccr4value=0x30 diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564_git.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564_git.bb new file mode 100644 index 00000000..9bed55e0 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-qca6564_git.bb @@ -0,0 +1,57 @@ +# Copyright (C) 2019 Digi International Inc. + +SUMMARY = "Qualcomm QCA6564 wireless driver module" +LICENSE = "ISC" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/ISC;md5=f3b90e78ea0cffb20bf5cca7947a896d" + +# Reference Qualcomm tag/version +PV = "v4.2.89.63+${SRCPV}" + +SRCBRANCH = "qca6564/master" +SRCREV = "fef49841fd1b4f3fee3b2193f9927c09d59df7de" + +SRC_URI = "\ + git://github.com/digi-embedded/qcacld-2.0.git;protocol=git;branch=${SRCBRANCH} \ + file://modprobe-qca6564.conf \ +" + +S = "${WORKDIR}/git" + +inherit module + +EXTRA_OEMAKE += "CONFIG_LINUX_QCMBR=y WLAN_OPEN_SOURCE=1" +# Explicity state it is not a QC platform, if not the driver will try to remap +# memory that is not allowed in ARMv6 +EXTRA_OEMAKE += "CONFIG_NON_QC_PLATFORM=y" +# Flag to compile the debug version (1 - enabled, rest of values - disabled) +EXTRA_OEMAKE += "BUILD_DEBUG_VERSION=0" +# Flags for SDIO interface +EXTRA_OEMAKE += "CONFIG_CLD_HL_SDIO_CORE=y" + +do_compile_prepend() { + export BUILD_VER=${PV} +} + +do_install_prepend() { + sed -i -e "s/gVhtTxMCS=2/gVhtTxMCS=0/g" ${WORKDIR}/git/firmware_bin/WCNSS_qcom_cfg.ini +} + +do_install_append() { + install -d ${D}${sysconfdir}/modprobe.d + install -m 0644 ${WORKDIR}/modprobe-qca6564.conf ${D}${sysconfdir}/modprobe.d/qca6564.conf + + install -d ${D}${base_libdir}/firmware/wlan/ + install -m 0644 ${WORKDIR}/git/firmware_bin/WCNSS_cfg.dat ${D}${base_libdir}/firmware/wlan/cfg.dat + install -m 0644 ${WORKDIR}/git/firmware_bin/WCNSS_qcom_cfg.ini ${D}${base_libdir}/firmware/wlan/qcom_cfg.ini + sed -i -e "s/gVhtTxMCS=2/gVhtTxMCS=0/g" ${D}${base_libdir}/firmware/wlan/qcom_cfg.ini +} + +FILES_${PN} += " \ + ${sysconfdir}/modprobe.d/qca6564.conf \ + ${base_libdir}/firmware/wlan/cfg.dat \ + ${base_libdir}/firmware/wlan/qcom_cfg.ini \ +" + +RRECOMMENDS_${PN} = "hostapd iw crda wireless-regdb udev-rules-digi" + +COMPATIBLE_MACHINE = "(ccimx6ul)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware-qca6564/linux-firmware-qca6564_2.4-r2.2.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware-qca6564/linux-firmware-qca6564_2.4-r2.2.bb new file mode 100644 index 00000000..a844a5c6 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware-qca6564/linux-firmware-qca6564_2.4-r2.2.bb @@ -0,0 +1,31 @@ +# Copyright (C) 2019 Digi International Inc. + +SUMMARY = "Firmware files for Qualcomm's QCA6564 wireless chip" +SECTION = "base" +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENCE.atheros_firmware;md5=30a14c7823beedac9fa39c64fdd01a13" + +SRC_URI = "ftp://ftp1.digi.com/support/digiembeddedyocto/source/${BPN}-${PV}.tar.gz" +SRC_URI[md5sum] = "7400b74881ac499517b6ad761a54f8fc" +SRC_URI[sha256sum] = "be3a56334764e21ee297260b6648075b7fada6f55e24a287a24e7c7d128e27ef" + +S = "${WORKDIR}/linux-firmware-qca6564/" + +do_install() { + install -d ${D}${base_libdir}/firmware/qca + install -m 0644 nvm_tlv_3.2.bin ${D}${base_libdir}/firmware/qca + install -m 0644 rampatch_tlv_3.2.tlv ${D}${base_libdir}/firmware/qca + install -m 0644 bdwlan30_US.bin ${D}${base_libdir}/firmware + install -m 0644 LICENCE.atheros_firmware ${D}${base_libdir}/firmware + install -m 0644 otp30.bin ${D}${base_libdir}/firmware + install -m 0644 qwlan30.bin ${D}${base_libdir}/firmware + install -m 0644 utf30.bin ${D}${base_libdir}/firmware +} + +PACKAGES = "${PN}-bt ${PN}-wifi" + +FILES_${PN}-bt = "/lib/firmware/qca" +FILES_${PN}-wifi = "/lib/firmware" + +PACKAGE_ARCH = "${MACHINE_ARCH}" +COMPATIBLE_MACHINE = "(ccimx6ul)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_git.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_%.bbappend index 50deb2e0..50deb2e0 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_git.bbappend +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_%.bbappend diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_4.9.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_5.4.bb index 352e5b6d..7ced8fd9 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_4.9.bb +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_5.4.bb @@ -4,8 +4,8 @@ include recipes-kernel/linux/linux-imx.inc DEPENDS += "lzop-native bc-native" -SRCBRANCH = "4.9-1.0.x-imx" -SRCREV = "0e674a64b86e2bb00ab43f56104d3ea85dda0066" +SRCBRANCH = "imx_5.4.3_2.0.0" +SRCREV = "6ea635c2f9b08dc75ffef7d6262a2c6df7afa4e1" LOCALVERSION = "-${SRCBRANCH}-dms-ba16" SRC_URI = "git://github.com/Freescale/linux-fslc.git;branch=${SRCBRANCH} \ diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig deleted file mode 100644 index 4e74c69c..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig +++ /dev/null @@ -1,583 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_PIDS=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_USER_NS=y -CONFIG_SCHED_AUTOGROUP=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_COMPAT_BRK is not set -CONFIG_PROFILING=y -CONFIG_JUMP_LABEL=y -CONFIG_CC_STACKPROTECTOR_STRONG=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_ARCH_FSL_IMX8QM=y -CONFIG_ARCH_FSL_IMX8QXP=y -CONFIG_ARCH_FSL_IMX8MQ=y -CONFIG_PCI=y -CONFIG_PCI_IOV=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_HOST_GENERIC=y -CONFIG_PCI_HISI=y -CONFIG_ARM64_VA_BITS_48=y -CONFIG_SCHED_MC=y -CONFIG_PREEMPT=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_CMA=y -CONFIG_SECCOMP=y -CONFIG_KEXEC=y -CONFIG_XEN=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_COMPAT=y -CONFIG_PM_DEBUG=y -CONFIG_PM_TEST_SUSPEND=y -CONFIG_ARM_CPUIDLE=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_INTERACTIVE=y -CONFIG_CPUFREQ_DT=y -CONFIG_ARM_BIG_LITTLE_CPUFREQ=y -CONFIG_ARM_IMX8_CPUFREQ=y -CONFIG_ARM_IMX8MQ_CPUFREQ=y -CONFIG_ARM_SCPI_CPUFREQ=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_SYN_COOKIES=y -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_IPV6_SIT=m -CONFIG_NETFILTER=y -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_IP_VS=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_NAT=m -CONFIG_IP6_NF_TARGET_MASQUERADE=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_VLAN_FILTERING=y -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_VLAN_8021Q_MVRP=y -CONFIG_LLC2=y -CONFIG_NET_SWITCHDEV=y -CONFIG_BPF_JIT=y -CONFIG_CAN=y -CONFIG_CAN_FLEXCAN=y -CONFIG_BT=y -CONFIG_BT_RFCOMM=y -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y -CONFIG_BT_LEDS=y -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_QCA=y -CONFIG_BT_HCIVHCI=y -CONFIG_CFG80211=y -CONFIG_CFG80211_WEXT=y -CONFIG_MAC80211=y -CONFIG_MAC80211_LEDS=y -CONFIG_RFKILL=y -CONFIG_RFKILL_GPIO=y -CONFIG_NET_9P=y -CONFIG_NET_9P_VIRTIO=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set -CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=320 -CONFIG_VEXPRESS_CONFIG=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_RAM=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SLRAM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_SPI_NOR=y -# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set -CONFIG_SPI_FSL_FLEXSPI=y -CONFIG_MTD_UBI=y -CONFIG_OF_OVERLAY=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_XEN_BLKDEV_BACKEND=m -CONFIG_VIRTIO_BLK=y -CONFIG_BLK_DEV_NVME=m -CONFIG_SENSORS_FXOS8700=y -CONFIG_SENSORS_FXAS2100X=y -CONFIG_SRAM=y -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_SAS_ATA=y -CONFIG_SCSI_HISI_SAS=y -CONFIG_ATA=y -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_IMX=y -CONFIG_AHCI_CEVA=y -CONFIG_AHCI_XGENE=y -CONFIG_AHCI_QORIQ=y -CONFIG_SATA_SIL24=y -CONFIG_PATA_PLATFORM=y -CONFIG_PATA_OF_PLATFORM=y -CONFIG_NETDEVICES=y -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_TUN=y -CONFIG_VETH=m -CONFIG_VIRTIO_NET=y -CONFIG_AMD_XGBE=y -CONFIG_MACB=y -CONFIG_HNS_DSAF=y -CONFIG_HNS_ENET=y -CONFIG_E1000E=y -CONFIG_IGB=y -CONFIG_IGBVF=y -CONFIG_SKY2=y -CONFIG_SMC91X=y -CONFIG_SMSC911X=y -CONFIG_STMMAC_ETH=m -CONFIG_MDIO_BITBANG=y -CONFIG_AT803X_PHY=y -CONFIG_MICREL_PHY=y -CONFIG_REALTEK_PHY=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_ATH10K=y -CONFIG_ATH10K_PCI=y -CONFIG_ATH10K_AHB=y -CONFIG_ATH10K_DEBUGFS=y -CONFIG_BCMDHD_1363=y -CONFIG_BCMDHD_PCIE=y -CONFIG_RTL_CARDS=m -# CONFIG_WLAN_VENDOR_TI is not set -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_IMX_SC_PWRKEY=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_FT5X06=m -CONFIG_TOUCHSCREEN_GOODIX=m -CONFIG_TOUCHSCREEN_SITRONIX_I2C_TOUCH=m -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_MPL3115=y -CONFIG_INPUT_ISL29023=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_AMBAKMI=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -CONFIG_SERIAL_FSL_LPUART=y -CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -CONFIG_FSL_OTP=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y -CONFIG_I2C_IMX=y -CONFIG_I2C_IMX_LPI2C=y -CONFIG_I2C_CROS_EC_TUNNEL=y -CONFIG_I2C_SLAVE=y -CONFIG_SPI=y -CONFIG_SPI_IMX=y -CONFIG_SPI_FSL_LPSPI=y -CONFIG_SPI_PL022=y -CONFIG_SPI_SPIDEV=m -CONFIG_SPMI=y -CONFIG_PINCTRL_SINGLE=y -CONFIG_PINCTRL_MAX77620=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_DWAPB=y -CONFIG_GPIO_PL061=y -CONFIG_GPIO_XGENE=y -CONFIG_GPIO_MAX732X=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GPIO_MAX77620=y -CONFIG_POWER_RESET_SNVS=y -CONFIG_POWER_RESET_VEXPRESS=y -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_BATTERY_BQ27XXX=y -CONFIG_SENSORS_ARM_SCPI=y -CONFIG_SENSORS_LM90=m -CONFIG_SENSORS_INA2XX=m -# CONFIG_MXC_MMA8451 is not set -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_THERMAL_EMULATION=y -CONFIG_IMX8M_THERMAL=y -CONFIG_IMX_SC_THERMAL=y -CONFIG_DEVICE_THERMAL=y -CONFIG_WATCHDOG=y -CONFIG_IMX2_WDT=y -CONFIG_IMX8_WDT=y -CONFIG_MFD_CROS_EC=y -CONFIG_MFD_CROS_EC_I2C=y -CONFIG_MFD_MAX77620=y -CONFIG_MFD_SEC_CORE=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_MAX77620=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_QCOM_SPMI=y -CONFIG_REGULATOR_S2MPS11=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_MEDIA_USB_SUPPORT=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MXC_CAPTURE=y -CONFIG_VIDEO_MX8_CAPTURE=y -CONFIG_GMSL_MAX9286=y -CONFIG_VIDEO_MXC_CSI_CAMERA=y -CONFIG_MXC_MIPI_CSI=y -CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_IMX_DPU_CORE=y -CONFIG_IMX_DCSS_CORE=y -CONFIG_DRM=y -CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -CONFIG_DRM_VIVANTE=m -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_RAYDIUM_RM67191=y -CONFIG_DRM_I2C_ADV7511=y -CONFIG_DRM_ITE_IT6263=y -CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -CONFIG_DRM_IMX_TVE=y -CONFIG_DRM_IMX_LDB=y -CONFIG_DRM_IMX_HDMI=y -CONFIG_DRM_IMX_NWL_DSI=y -CONFIG_DRM_IMX_HDP=y -CONFIG_IMX_HDP_CEC=y -CONFIG_DRM_MXSFB=y -CONFIG_FB_IMX64=y -CONFIG_FB_IMX64_DEBUG=y -CONFIG_FB_ARMCLCD=y -CONFIG_FB_MXC_DISP_FRAMEWORK=y -CONFIG_BACKLIGHT_GENERIC=m -CONFIG_BACKLIGHT_PWM=y -CONFIG_BACKLIGHT_LP855X=m -CONFIG_SN65DSI83=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_FSL_ACM=y -CONFIG_SND_SOC_FSL_HIFI4=y -CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_AK4458=y -CONFIG_SND_SOC_IMX_AK5558=y -CONFIG_SND_SOC_IMX_AK4497=y -CONFIG_SND_SOC_IMX_WM8960=y -CONFIG_SND_SOC_IMX_WM8524=y -CONFIG_SND_SOC_IMX_CS42888=y -CONFIG_SND_SOC_IMX_WM8962=y -CONFIG_SND_SOC_IMX_MQS=y -CONFIG_SND_SOC_IMX_SPDIF=y -CONFIG_SND_SOC_IMX_AMIX=y -CONFIG_SND_SOC_IMX_CDNHDMI=y -CONFIG_SND_SOC_AK4613=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_HID_MULTITOUCH=y -CONFIG_USB=y -CONFIG_USB_OTG=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_ACM=m -CONFIG_USB_STORAGE=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC2=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_HOST_ROLE=y -CONFIG_USB_CDNS3=y -CONFIG_USB_CDNS3_GADGET=y -CONFIG_USB_CDNS3_HOST=y -CONFIG_USB_TEST=m -CONFIG_USB_EHSET_TEST_FIXTURE=y -CONFIG_USB_HSIC_USB3503=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_USB_GPIO_VBUS=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_ULPI=y -CONFIG_USB_GADGET=y -CONFIG_USB_CONFIGFS=y -CONFIG_USB_CONFIGFS_SERIAL=y -CONFIG_USB_CONFIGFS_ACM=y -CONFIG_USB_CONFIGFS_OBEX=y -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -CONFIG_USB_CONFIGFS_ECM_SUBSET=y -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -CONFIG_FSL_UTP=y -CONFIG_USB_CONFIGFS_F_LB_SS=y -CONFIG_USB_CONFIGFS_F_FS=y -CONFIG_USB_CONFIGFS_F_UAC1=y -CONFIG_USB_CONFIGFS_F_UAC2=y -CONFIG_USB_CONFIGFS_F_MIDI=y -CONFIG_USB_CONFIGFS_F_HID=y -CONFIG_USB_ZERO=m -CONFIG_USB_AUDIO=m -CONFIG_GADGET_UAC1=y -CONFIG_USB_ETH=m -CONFIG_USB_ETH_EEM=y -CONFIG_USB_G_NCM=m -CONFIG_USB_FUNCTIONFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_MMC=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ACPI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SPI=y -# CONFIG_MXC_GPU_VIV is not set -CONFIG_MXC_SIM=y -CONFIG_MXC_EMVSIM=y -CONFIG_MXC_MLB150=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_SYSCON=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_MAX77686=y -CONFIG_RTC_DRV_M41T80=y -CONFIG_RTC_DRV_M41T80_WDT=y -CONFIG_RTC_DRV_S5M=y -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_EFI=y -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SNVS=y -CONFIG_RTC_DRV_IMX_SC=y -CONFIG_DMADEVICES=y -CONFIG_FSL_EDMA_V3=y -CONFIG_IMX_SDMA=y -CONFIG_MXS_DMA=y -CONFIG_PL330_DMA=y -CONFIG_QCOM_HIDMA_MGMT=y -CONFIG_QCOM_HIDMA=y -CONFIG_SYNC_FILE=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_MMIO=y -CONFIG_XEN_GNTDEV=y -CONFIG_XEN_GRANT_DEV_ALLOC=y -CONFIG_STAGING=y -CONFIG_STAGING_MEDIA=y -CONFIG_MEDIA_CEC=y -CONFIG_ION=y -CONFIG_ION_MXC=y -CONFIG_TYPEC_TCPM=y -CONFIG_TYPEC_TCPCI=y -CONFIG_COMMON_CLK_VERSATILE=y -CONFIG_CLK_SP810=y -CONFIG_COMMON_CLK_SCPI=y -CONFIG_CLK_QORIQ=y -# CONFIG_COMMON_CLK_XGENE is not set -CONFIG_COMMON_CLK_PWM=y -CONFIG_ARM_TIMER_SP804=y -CONFIG_CLKSRC_IMX_SYS_CNT=y -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=y -CONFIG_BCM_PDC_MBOX=y -CONFIG_ARM_SMMU=y -CONFIG_ARCH_MXC_ARM64=y -CONFIG_EXTCON_PTN5150=y -CONFIG_IIO=y -CONFIG_PWM=y -CONFIG_PWM_IMX=y -CONFIG_PHY_SAMSUNG_USB2=y -CONFIG_PHY_XGENE=y -CONFIG_IMX8_DDR_PERF=y -CONFIG_NVMEM=y -CONFIG_NVMEM_IMX_OCOTP=y -CONFIG_NVMEM_IMX_SCU_OCOTP=y -CONFIG_TEE=y -CONFIG_OPTEE=y -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ACPI=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=y -CONFIG_CUSE=m -CONFIG_OVERLAY_FS=m -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_HUGETLBFS=y -CONFIG_EFIVAR_FS=y -CONFIG_ECRYPT_FS=y -CONFIG_ECRYPT_FS_MESSAGING=y -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_XZ=y -CONFIG_NFS_FS=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_ROOT_NFS=y -CONFIG_9P_FS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_KVM=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_FS=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_LOCKUP_DETECTOR=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_FTRACE is not set -CONFIG_MEMTEST=y -CONFIG_STRICT_DEVMEM=y -CONFIG_SECURITY=y -CONFIG_LSM_MMAP_MIN_ADDR=0 -CONFIG_SECURITY_SELINUX=y -CONFIG_SECURITY_SMACK=y -CONFIG_SECURITY_APPARMOR=y -CONFIG_DEFAULT_SECURITY_APPARMOR=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CHACHA20POLY1305=y -CONFIG_CRYPTO_ECHAINIV=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_RMD128=y -CONFIG_CRYPTO_RMD160=y -CONFIG_CRYPTO_RMD256=y -CONFIG_CRYPTO_RMD320=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_ANSI_CPRNG=y -CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_CRC32_ARM64=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_4.9.x.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_5.4.bb index c659eb10..abe3099c 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_4.9.x.bb +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_5.4.bb @@ -5,16 +5,20 @@ require recipes-kernel/linux/linux-imx.inc SUMMARY = "Linux kernel for Boundary Devices boards" -FILESEXTRAPATHS_prepend_mx6 := "${THISDIR}/${PN}-${PV}/arm:" -FILESEXTRAPATHS_prepend_mx7 := "${THISDIR}/${PN}-${PV}/arm:" -FILESEXTRAPATHS_prepend_mx8 := "${THISDIR}/${PN}-${PV}/arm64:" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" + +LINUX_VERSION = "5.4.50" SRC_URI = "git://github.com/boundarydevices/linux-imx6.git;branch=${SRCBRANCH} \ - file://defconfig \ " -LOCALVERSION = "-2.0.0-ga+yocto" -SRCBRANCH = "boundary-imx_4.9.x_2.0.0_ga" -SRCREV = "a141bcc882fbba6c2d80d467fa54ac07b37b6f04" +LOCALVERSION = "-2.1.0-ga+yocto" +SRCBRANCH = "boundary-imx_5.4.x_2.1.0" +SRCREV = "503a3dce966a6b98e7bfdc376477c604a4275c60" DEPENDS += "lzop-native bc-native" -COMPATIBLE_MACHINE = "(nitrogen6x|nitrogen6x-lite|nitrogen6sx|nitrogen7|nitrogen8m)" +COMPATIBLE_MACHINE = "(nitrogen6x|nitrogen6x-lite|nitrogen6sx|nitrogen7|nitrogen8m|nitrogen8mm|nitrogen8mn)" + +KBUILD_DEFCONFIG ?= "boundary_defconfig" + +S = "${WORKDIR}/git" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch deleted file mode 100644 index 1156b835..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch +++ /dev/null @@ -1,399 +0,0 @@ -From af4b4f2854d6223ba2f1235400f8e8dac660a6a2 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 15 May 2014 17:18:11 +0300 -Subject: [PATCH 01/59] ARM: i.MX6: dts: Add initial support for cm-fx6 - -Add initial support for cm-fx6 module. - -This patch configures: -1) serial console -2) hearbeat led -3) FreeScale NIC -4) pcie -5) Intel I210 NIC -6) wif/bt -7) sata - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 368 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 368 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6q-cm-fx6.dts - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -new file mode 100644 -index 0000000..1f06d95 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -0,0 +1,368 @@ -+/* -+* Copyright 2013 CompuLab Ltd. -+* -+* Author: Valentin Raevsky <valentin@compulab.co.il> -+* -+* The code contained herein is licensed under the GNU General Public -+* License. You may obtain a copy of the GNU General Public License -+* Version 2 or later at the following locations: -+* -+* http://www.opensource.org/licenses/gpl-license.html -+* http://www.gnu.org/copyleft/gpl.html -+*/ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+ -+/ { -+ model = "CompuLab CM-FX6"; -+ compatible = "compulab,cm-fx6", "fsl,imx6q"; -+ -+ memory { -+ reg = <0x10000000 0x80000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ heartbeat-led { -+ label = "Heartbeat"; -+ gpios = <&gpio2 31 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for mmc */ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ /* regulator for usb otg */ -+ reg_usb_otg_vbus: usb_otg_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator for usb hub1 */ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio7 8 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator1 for wifi/bt */ -+ awnh387_npoweron: regulator-awnh387-npoweron { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-npoweron"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio7 12 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator2 for wifi/bt */ -+ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-wifi-nreset"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 16 0>; -+ startup-delay-us = <10000>; -+ }; -+ }; -+}; -+ -+&iomuxc { -+ imx6q-cm-fx6 { -+ /* pins for eth0 */ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ /* pins for spi */ -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -+ >; -+ }; -+ -+ /* pins for nand */ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -+ >; -+ }; -+ -+ /* pins for i2c1 */ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for i2c2 */ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for i2c3 */ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for console */ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ /* pins for usb hub1 */ -+ pinctrl_usbh1: usbh1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -+ >; -+ }; -+ -+ /* pins for usb otg */ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ /* pins for wifi/bt */ -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -+ >; -+ }; -+ -+ /* pins for mmc */ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+/* spi */ -+&ecspi1 { -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25px16", "st,m25p"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0x0 0xc0000>; -+ }; -+ -+ partition@c0000 { -+ label = "uboot environment"; -+ reg = <0xc0000 0x40000>; -+ }; -+ -+ partition@100000 { -+ label = "reserved"; -+ reg = <0x100000 0x100000>; -+ }; -+ }; -+}; -+ -+/* eth0 */ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ -+/* nand */ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+/* i2c1 */ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ rtc@56 { -+ compatible = "emmicro,em3027"; -+ reg = <0x56>; -+ }; -+}; -+ -+/* i2c2 */ -+&i2c2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+/* i2c3 */ -+&i2c3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+}; -+ -+/* eth1 */ -+&pcie { -+ reset-gpio = <&gpio1 26 0>; -+ status = "okay"; -+}; -+ -+/* sata */ -+&sata { -+ status = "okay"; -+}; -+ -+/* rear serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2_2>; -+ fsl,dte-mode; -+ fsl,uart-has-rtscts; -+ dma-names = "rx", "tx"; -+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; -+ status = "okay"; -+}; -+ -+/* console */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ status = "okay"; -+}; -+ -+/* usb otg */ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+/* usb hub1 */ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbh1>; -+ status = "okay"; -+}; -+ -+/* wifi/bt */ -+&usdhc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1>; -+ non-removable; -+ vmmc-supply = <&awnh387_npoweron>; -+ vmmc_aux-supply = <&awnh387_wifi_nreset>; -+ status = "okay"; -+}; -+ -+/* mmc */ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch deleted file mode 100644 index 44281463..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch +++ /dev/null @@ -1,456 +0,0 @@ -From 591aecd36eb5e5eaf189bfce36db616425c00959 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 15 May 2014 17:25:07 +0300 -Subject: [PATCH 02/59] ARM: i.MX6: cm-fx6: Add defconfig - -Add default configuration file for the cm-fx6 module. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/configs/cm_fx6_defconfig | 434 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 434 insertions(+) - create mode 100644 arch/arm/configs/cm_fx6_defconfig - -diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig -new file mode 100644 -index 0000000..92c3da1 ---- /dev/null -+++ b/arch/arm/configs/cm_fx6_defconfig -@@ -0,0 +1,434 @@ -+CONFIG_KERNEL_LZO=y -+CONFIG_SYSVIPC=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=18 -+CONFIG_CGROUPS=y -+CONFIG_RELAY=y -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_EXPERT=y -+CONFIG_PERF_EVENTS=y -+# CONFIG_SLUB_DEBUG is not set -+# CONFIG_COMPAT_BRK is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+CONFIG_MODULE_SRCVERSION_ALL=y -+# CONFIG_BLK_DEV_BSG is not set -+CONFIG_GPIO_PCA953X=y -+CONFIG_ARCH_MXC=y -+CONFIG_MXC_DEBUG_BOARD=y -+CONFIG_MACH_IMX51_DT=y -+CONFIG_MACH_EUKREA_CPUIMX51SD=y -+CONFIG_SOC_IMX53=y -+CONFIG_SOC_IMX6Q=y -+CONFIG_SOC_IMX6SL=y -+CONFIG_SOC_VF610=y -+# CONFIG_SWP_EMULATE is not set -+CONFIG_PCI=y -+CONFIG_PCI_IMX6=y -+CONFIG_SMP=y -+CONFIG_VMSPLIT_2G=y -+CONFIG_PREEMPT=y -+CONFIG_AEABI=y -+# CONFIG_OABI_COMPAT is not set -+CONFIG_HIGHMEM=y -+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_ARM_IMX6_CPUFREQ=y -+CONFIG_CPU_IDLE=y -+CONFIG_VFP=y -+CONFIG_NEON=y -+CONFIG_BINFMT_MISC=m -+CONFIG_PM_RUNTIME=y -+CONFIG_PM_DEBUG=y -+CONFIG_PM_TEST_SUSPEND=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_UNIX=y -+CONFIG_INET=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+CONFIG_IPV6=y -+CONFIG_NETFILTER=y -+CONFIG_NETFILTER_DEBUG=y -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -+CONFIG_NETFILTER_XT_TARGET_DSCP=m -+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -+CONFIG_NETFILTER_XT_TARGET_LED=m -+CONFIG_NETFILTER_XT_TARGET_MARK=m -+CONFIG_NETFILTER_XT_TARGET_NFLOG=m -+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -+CONFIG_NETFILTER_XT_TARGET_TEE=m -+CONFIG_NETFILTER_XT_TARGET_TRACE=m -+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -+CONFIG_NETFILTER_XT_MATCH_COMMENT=m -+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -+CONFIG_NETFILTER_XT_MATCH_CPU=m -+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -+CONFIG_NETFILTER_XT_MATCH_DSCP=m -+CONFIG_NETFILTER_XT_MATCH_ESP=m -+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_HELPER=m -+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -+CONFIG_NETFILTER_XT_MATCH_LENGTH=m -+CONFIG_NETFILTER_XT_MATCH_LIMIT=m -+CONFIG_NETFILTER_XT_MATCH_MAC=m -+CONFIG_NETFILTER_XT_MATCH_MARK=m -+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+CONFIG_NETFILTER_XT_MATCH_OSF=m -+CONFIG_NETFILTER_XT_MATCH_OWNER=m -+CONFIG_NETFILTER_XT_MATCH_POLICY=m -+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -+CONFIG_NETFILTER_XT_MATCH_QUOTA=m -+CONFIG_NETFILTER_XT_MATCH_RATEEST=m -+CONFIG_NETFILTER_XT_MATCH_REALM=m -+CONFIG_NETFILTER_XT_MATCH_RECENT=m -+CONFIG_NETFILTER_XT_MATCH_STATE=m -+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -+CONFIG_NETFILTER_XT_MATCH_STRING=m -+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -+CONFIG_NETFILTER_XT_MATCH_TIME=m -+CONFIG_NETFILTER_XT_MATCH_U32=m -+CONFIG_NF_CONNTRACK_IPV4=m -+CONFIG_IP_NF_IPTABLES=y -+CONFIG_IP_NF_MATCH_AH=m -+CONFIG_IP_NF_MATCH_ECN=m -+CONFIG_IP_NF_MATCH_RPFILTER=m -+CONFIG_IP_NF_MATCH_TTL=m -+CONFIG_IP_NF_FILTER=y -+CONFIG_IP_NF_TARGET_REJECT=y -+CONFIG_IP_NF_TARGET_ULOG=m -+CONFIG_NF_NAT_IPV4=m -+CONFIG_IP_NF_TARGET_MASQUERADE=m -+CONFIG_IP_NF_TARGET_NETMAP=m -+CONFIG_IP_NF_TARGET_REDIRECT=m -+CONFIG_IP_NF_MANGLE=m -+CONFIG_IP_NF_TARGET_ECN=m -+CONFIG_IP_NF_TARGET_TTL=m -+CONFIG_IP_NF_RAW=m -+CONFIG_IP_NF_ARPTABLES=m -+CONFIG_IP_NF_ARPFILTER=m -+CONFIG_IP_NF_ARP_MANGLE=m -+CONFIG_VLAN_8021Q=m -+CONFIG_VLAN_8021Q_GVRP=y -+CONFIG_CAN=y -+CONFIG_CAN_FLEXCAN=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+# CONFIG_STANDALONE is not set -+CONFIG_CMA=y -+CONFIG_CMA_SIZE_MBYTES=320 -+CONFIG_IMX_WEIM=y -+CONFIG_CONNECTOR=y -+CONFIG_MTD=y -+CONFIG_MTD_CMDLINE_PARTS=y -+CONFIG_MTD_BLOCK=y -+CONFIG_MTD_CFI=y -+CONFIG_MTD_JEDECPROBE=y -+CONFIG_MTD_CFI_INTELEXT=y -+CONFIG_MTD_CFI_AMDSTD=y -+CONFIG_MTD_CFI_STAA=y -+CONFIG_MTD_PHYSMAP_OF=y -+CONFIG_MTD_DATAFLASH=y -+CONFIG_MTD_M25P80=y -+CONFIG_MTD_SST25L=y -+CONFIG_MTD_NAND=y -+CONFIG_MTD_NAND_GPMI_NAND=y -+CONFIG_MTD_NAND_MXC=y -+CONFIG_MTD_UBI=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_SIZE=65536 -+CONFIG_EEPROM_AT24=y -+CONFIG_EEPROM_AT25=y -+# CONFIG_SCSI_PROC_FS is not set -+CONFIG_BLK_DEV_SD=y -+CONFIG_SCSI_MULTI_LUN=y -+CONFIG_SCSI_CONSTANTS=y -+CONFIG_SCSI_LOGGING=y -+CONFIG_SCSI_SCAN_ASYNC=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_ATA=y -+CONFIG_SATA_AHCI_PLATFORM=y -+CONFIG_AHCI_IMX=y -+CONFIG_PATA_IMX=y -+CONFIG_NETDEVICES=y -+CONFIG_TUN=m -+# CONFIG_NET_VENDOR_BROADCOM is not set -+CONFIG_CS89x0=y -+CONFIG_CS89x0_PLATFORM=y -+# CONFIG_NET_VENDOR_FARADAY is not set -+CONFIG_IGB=m -+# CONFIG_NET_VENDOR_MARVELL is not set -+# CONFIG_NET_VENDOR_MICREL is not set -+# CONFIG_NET_VENDOR_MICROCHIP is not set -+# CONFIG_NET_VENDOR_NATSEMI is not set -+# CONFIG_NET_VENDOR_SEEQ is not set -+CONFIG_SMC91X=y -+CONFIG_SMC911X=y -+CONFIG_SMSC911X=y -+# CONFIG_NET_VENDOR_STMICRO is not set -+CONFIG_ATH_CARDS=y -+CONFIG_ATH6KL=m -+CONFIG_ATH6KL_SDIO=m -+CONFIG_MWIFIEX=m -+CONFIG_MWIFIEX_SDIO=m -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_EVDEV=y -+CONFIG_INPUT_EVBUG=m -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_IMX=y -+CONFIG_MOUSE_PS2=m -+CONFIG_MOUSE_PS2_ELANTECH=y -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_EGALAX=y -+CONFIG_TOUCHSCREEN_ELAN=y -+CONFIG_TOUCHSCREEN_MAX11801=y -+CONFIG_TOUCHSCREEN_MC13783=y -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_MMA8450=y -+CONFIG_INPUT_ISL29023=y -+CONFIG_SERIO_SERPORT=m -+CONFIG_VT_HW_CONSOLE_BINDING=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_DEVKMEM is not set -+CONFIG_SERIAL_IMX=y -+CONFIG_SERIAL_IMX_CONSOLE=y -+CONFIG_SERIAL_FSL_LPUART=y -+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -+CONFIG_FSL_OTP=y -+CONFIG_MXS_VIIM=y -+# CONFIG_I2C_COMPAT is not set -+CONFIG_I2C_CHARDEV=y -+# CONFIG_I2C_HELPER_AUTO is not set -+CONFIG_I2C_ALGOPCF=m -+CONFIG_I2C_ALGOPCA=m -+CONFIG_I2C_IMX=y -+CONFIG_SPI=y -+CONFIG_SPI_IMX=y -+CONFIG_GPIO_SYSFS=y -+CONFIG_POWER_SUPPLY=y -+CONFIG_SABRESD_MAX8903=y -+CONFIG_IMX6_USB_CHARGER=y -+CONFIG_SENSORS_MAX17135=y -+CONFIG_SENSORS_MAG3110=y -+CONFIG_THERMAL=y -+CONFIG_CPU_THERMAL=y -+CONFIG_IMX_THERMAL=y -+CONFIG_DEVICE_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_IMX2_WDT=y -+CONFIG_MFD_DA9052_I2C=y -+CONFIG_MFD_MC13XXX_SPI=y -+CONFIG_MFD_MC13XXX_I2C=y -+CONFIG_MFD_MAX17135=y -+CONFIG_MFD_SI476X_CORE=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_DA9052=y -+CONFIG_REGULATOR_ANATOP=y -+CONFIG_REGULATOR_MC13783=y -+CONFIG_REGULATOR_MC13892=y -+CONFIG_REGULATOR_MAX17135=y -+CONFIG_REGULATOR_PFUZE100=y -+CONFIG_MEDIA_SUPPORT=y -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_RADIO_SUPPORT=y -+CONFIG_VIDEO_V4L2_INT_DEVICE=y -+CONFIG_MEDIA_USB_SUPPORT=y -+CONFIG_USB_VIDEO_CLASS=m -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_MXC_OUTPUT=y -+CONFIG_VIDEO_MXC_CAPTURE=m -+CONFIG_VIDEO_MXC_CSI_CAMERA=m -+CONFIG_MXC_CAMERA_OV5640=m -+CONFIG_MXC_CAMERA_OV5642=m -+CONFIG_MXC_CAMERA_OV5640_MIPI=m -+CONFIG_MXC_TVIN_ADV7180=m -+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m -+CONFIG_VIDEO_MXC_IPU_OUTPUT=y -+CONFIG_VIDEO_MXC_PXP_V4L2=y -+CONFIG_SOC_CAMERA=y -+CONFIG_VIDEO_MX3=y -+CONFIG_RADIO_SI476X=y -+CONFIG_SOC_CAMERA_OV2640=y -+CONFIG_DRM=y -+CONFIG_DRM_VIVANTE=y -+CONFIG_FB=y -+CONFIG_FB_MXS=y -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_L4F00242T03=y -+CONFIG_LCD_PLATFORM=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_FB_MXC_SYNC_PANEL=y -+CONFIG_FB_MXC_LDB=y -+CONFIG_FB_MXC_MIPI_DSI=y -+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y -+CONFIG_FB_MXC_HDMI=y -+CONFIG_FB_MXC_EINK_PANEL=y -+CONFIG_FB_MXS_SII902X=y -+CONFIG_HANNSTAR_CABC=y -+CONFIG_FRAMEBUFFER_CONSOLE=y -+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -+CONFIG_FONTS=y -+CONFIG_FONT_8x8=y -+CONFIG_FONT_8x16=y -+CONFIG_LOGO=y -+CONFIG_SOUND=y -+CONFIG_SND=y -+CONFIG_SND_USB_AUDIO=m -+CONFIG_SND_SOC=y -+CONFIG_SND_IMX_SOC=y -+CONFIG_SND_SOC_EUKREA_TLV320=y -+CONFIG_SND_SOC_IMX_CS42888=y -+CONFIG_SND_SOC_IMX_WM8962=y -+CONFIG_SND_SOC_IMX_SGTL5000=y -+CONFIG_SND_SOC_IMX_SPDIF=y -+CONFIG_SND_SOC_IMX_MC13783=y -+CONFIG_SND_SOC_IMX_HDMI=y -+CONFIG_SND_SOC_IMX_SI476X=y -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_CHIPIDEA=y -+CONFIG_USB_CHIPIDEA_UDC=y -+CONFIG_USB_CHIPIDEA_HOST=y -+CONFIG_USB_PHY=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_USB_MXS_PHY=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_MASS_STORAGE=m -+CONFIG_USB_G_SERIAL=m -+CONFIG_MMC=y -+CONFIG_MMC_UNSAFE_RESUME=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_PLTFM=y -+CONFIG_MMC_SDHCI_ESDHC_IMX=y -+CONFIG_MXC_IPU=y -+CONFIG_MXC_GPU_VIV=y -+CONFIG_MXC_ASRC=y -+CONFIG_MXC_MIPI_CSI2=y -+CONFIG_MXC_MLB150=m -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_INTF_DEV_UIE_EMUL=y -+CONFIG_RTC_DRV_MC13XXX=y -+CONFIG_RTC_DRV_MXC=y -+CONFIG_RTC_DRV_SNVS=y -+CONFIG_DMADEVICES=y -+CONFIG_MXC_PXP_V2=y -+CONFIG_IMX_SDMA=y -+CONFIG_MXS_DMA=y -+CONFIG_STAGING=y -+CONFIG_COMMON_CLK_DEBUG=y -+# CONFIG_IOMMU_SUPPORT is not set -+CONFIG_PWM=y -+CONFIG_PWM_IMX=y -+CONFIG_EXT2_FS=y -+CONFIG_EXT2_FS_XATTR=y -+CONFIG_EXT2_FS_POSIX_ACL=y -+CONFIG_EXT2_FS_SECURITY=y -+CONFIG_EXT3_FS=y -+CONFIG_EXT3_FS_POSIX_ACL=y -+CONFIG_EXT3_FS_SECURITY=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_EXT4_FS_SECURITY=y -+CONFIG_QUOTA=y -+CONFIG_QUOTA_NETLINK_INTERFACE=y -+# CONFIG_PRINT_QUOTA_WARNING is not set -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_ISO9660_FS=m -+CONFIG_JOLIET=y -+CONFIG_ZISOFS=y -+CONFIG_UDF_FS=m -+CONFIG_MSDOS_FS=m -+CONFIG_VFAT_FS=y -+CONFIG_TMPFS=y -+CONFIG_JFFS2_FS=y -+CONFIG_UBIFS_FS=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3_ACL=y -+CONFIG_NFS_V4=y -+CONFIG_ROOT_NFS=y -+CONFIG_NLS_DEFAULT="cp437" -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_ASCII=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_15=m -+CONFIG_NLS_UTF8=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_SCHED_DEBUG is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+# CONFIG_FTRACE is not set -+CONFIG_SECURITYFS=y -+CONFIG_CRYPTO_USER=y -+CONFIG_CRYPTO_TEST=m -+CONFIG_CRYPTO_CCM=y -+CONFIG_CRYPTO_GCM=y -+CONFIG_CRYPTO_CBC=y -+CONFIG_CRYPTO_CTS=y -+CONFIG_CRYPTO_ECB=y -+CONFIG_CRYPTO_LRW=y -+CONFIG_CRYPTO_XTS=y -+CONFIG_CRYPTO_MD4=y -+CONFIG_CRYPTO_MD5=y -+CONFIG_CRYPTO_MICHAEL_MIC=y -+CONFIG_CRYPTO_RMD128=y -+CONFIG_CRYPTO_RMD160=y -+CONFIG_CRYPTO_RMD256=y -+CONFIG_CRYPTO_RMD320=y -+CONFIG_CRYPTO_SHA1=y -+CONFIG_CRYPTO_SHA256=y -+CONFIG_CRYPTO_SHA512=y -+CONFIG_CRYPTO_TGR192=y -+CONFIG_CRYPTO_WP512=y -+CONFIG_CRYPTO_BLOWFISH=y -+CONFIG_CRYPTO_CAMELLIA=y -+CONFIG_CRYPTO_DES=y -+CONFIG_CRYPTO_TWOFISH=y -+# CONFIG_CRYPTO_ANSI_CPRNG is not set -+CONFIG_CRYPTO_DEV_FSL_CAAM=y -+CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y -+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y -+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y -+CONFIG_CRC_CCITT=m -+CONFIG_CRC_T10DIF=y -+CONFIG_CRC7=m -+CONFIG_LIBCRC32C=m --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch deleted file mode 100644 index 7fb766b5..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 0a691facfb253b42cdaeaedd77477d13c6fa99f8 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 15 May 2014 17:26:30 +0300 -Subject: [PATCH 03/59] igb: Enable random mac address - -Enable random mac address in order to let the driver up -if eeprom values are incorrect. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - drivers/net/ethernet/intel/igb/igb_main.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c -index 206e79d..2472835 100644 ---- a/drivers/net/ethernet/intel/igb/igb_main.c -+++ b/drivers/net/ethernet/intel/igb/igb_main.c -@@ -2387,6 +2387,11 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) - if (hw->mac.ops.read_mac_addr(hw)) - dev_err(&pdev->dev, "NVM Read Error\n"); - -+ if (!is_valid_ether_addr(hw->mac.addr)) { -+ dev_info(&pdev->dev, "Random MAC Address\n"); -+ random_ether_addr(hw->mac.addr); -+ } -+ - memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); - - if (!is_valid_ether_addr(netdev->dev_addr)) { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch deleted file mode 100644 index d9c90b0b..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f02b927b88856dde0ec988705e6445159bb272ae Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 22 Jun 2014 18:03:27 +0300 -Subject: [PATCH 04/59] ARM: i.MX6: cm-fx6: update defconfig - -Enable EM3027 RTC - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/configs/cm_fx6_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig -index 92c3da1..eb6d9cb 100644 ---- a/arch/arm/configs/cm_fx6_defconfig -+++ b/arch/arm/configs/cm_fx6_defconfig -@@ -347,6 +347,7 @@ CONFIG_LEDS_TRIGGERS=y - CONFIG_LEDS_TRIGGER_GPIO=y - CONFIG_RTC_CLASS=y - CONFIG_RTC_INTF_DEV_UIE_EMUL=y -+CONFIG_RTC_DRV_EM3027=y - CONFIG_RTC_DRV_MC13XXX=y - CONFIG_RTC_DRV_MXC=y - CONFIG_RTC_DRV_SNVS=y --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch deleted file mode 100644 index 8d133e40..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch +++ /dev/null @@ -1,101 +0,0 @@ -From 80e3270f42e72dc01f8c2235fbdaf5fa94dd6fce Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 23 Jun 2014 13:53:35 +0300 -Subject: [PATCH 05/59] ARM: i.MX6: dts: add HDMI and DVI support - -Add HDMI and DVI support on IPU1 and IPU2, define two frame buffers. -Enable starting X with fbdev. ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 65 +++++++++++++++++++++++++++++++++++- - 1 file changed, 64 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 1f06d95..018c3b1 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -86,6 +86,44 @@ - startup-delay-us = <10000>; - }; - }; -+ -+ aliases { -+ mxcfb0 = &mxcfb1; -+ mxcfb1 = &mxcfb2; -+ }; -+ -+ mxcfb1: fb@0 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "hdmi"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <24>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ mxcfb2: fb@1 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "lcd"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <24>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ lcd@0 { -+ compatible = "fsl,lcd"; -+ ipu_id = <0>; -+ disp_id = <0>; -+ default_ifmt = "RGB24"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ipu1_1>; -+ status = "okay"; -+ }; -+ - }; - - &iomuxc { -@@ -287,7 +325,7 @@ - &i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; -- status = "okay"; -+ /* status = "okay"; */ - }; - - /* i2c3 */ -@@ -366,3 +404,28 @@ - vmmc-supply = <®_3p3v>; - status = "okay"; - }; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ status = "okay"; -+}; -+ -+&hdmi_core { -+ ipu_id = <1>; -+ disp_id = <0>; -+ status = "okay"; -+}; -+ -+&hdmi_video { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -+ fsl,hdcp; -+ status = "okay"; -+}; -+ -+&hdmi_audio { -+/* status = "okay"; */ -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch deleted file mode 100644 index a31a9771..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 608c9ed0c20fe1258b8982e3ce452482aa1c002e Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 23 Jun 2014 15:29:21 +0300 -Subject: [PATCH 06/59] ARM: i.MX6: dts: add HDMI-Audio support - -Add HDMI-Audio support. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 018c3b1..76b4b0c 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -92,6 +92,13 @@ - mxcfb1 = &mxcfb2; - }; - -+ sound-hdmi { -+ compatible = "fsl,imx6q-audio-hdmi", -+ "fsl,imx-audio-hdmi"; -+ model = "imx-audio-hdmi"; -+ hdmi-controller = <&hdmi_audio>; -+ }; -+ - mxcfb1: fb@0 { - compatible = "fsl,mxc_sdc_fb"; - disp_dev = "hdmi"; -@@ -427,5 +434,5 @@ - }; - - &hdmi_audio { --/* status = "okay"; */ -+ status = "okay"; - }; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch deleted file mode 100644 index 24e53615..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch +++ /dev/null @@ -1,69 +0,0 @@ -From b0e655dbaddb94c4b7c73c00140b43fb0b1ecd36 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 23 Jun 2014 16:30:18 +0300 -Subject: [PATCH 07/59] ARM: i.MX6: dts: add SPDIF support - -Add SPDIF support. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 25 ++++++++++++++++++++++++- - 1 file changed, 24 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 76b4b0c..3f73b83 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -99,6 +99,15 @@ - hdmi-controller = <&hdmi_audio>; - }; - -+ sound-spdif { -+ compatible = "fsl,imx-audio-spdif", -+ "fsl,imx-sabreauto-spdif"; -+ model = "imx-spdif"; -+ spdif-controller = <&spdif>; -+ spdif-out; -+ spdif-in; -+ }; -+ - mxcfb1: fb@0 { - compatible = "fsl,mxc_sdc_fb"; - disp_dev = "hdmi"; -@@ -153,7 +162,6 @@ - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - >; - }; - -@@ -260,6 +268,15 @@ - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - >; - }; -+ -+ /* pins for spdif */ -+ pinctrl_spdif: spdifgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -+ >; -+ }; -+ - }; - }; - -@@ -436,3 +453,9 @@ - &hdmi_audio { - status = "okay"; - }; -+ -+&spdif { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_spdif>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch deleted file mode 100644 index d463399d..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch +++ /dev/null @@ -1,36 +0,0 @@ -From a15ad25075d0d78f4462521260902c0f03d6a343 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 24 Jun 2014 15:35:52 +0300 -Subject: [PATCH 08/59] ARM: i.MX6: dts: add "Power Button" - -Add "Power Button" by means of GPIO - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 3f73b83..0abb116 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -87,6 +87,16 @@ - }; - }; - -+ gpio-keys { -+ compatible = "gpio-keys"; -+ power { -+ label = "Power Button"; -+ gpios = <&gpio1 29 1>; -+ linux,code = <116>; /* KEY_POWER */ -+ gpio-key,wakeup; -+ }; -+ }; -+ - aliases { - mxcfb0 = &mxcfb1; - mxcfb1 = &mxcfb2; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch deleted file mode 100644 index cf06c29e..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 0d82c1831d3fe3cf53e6b8d0435ff6bd621e07d2 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 10:42:20 +0300 -Subject: [PATCH 09/59] ARM: i.MX6: dts: Enable uart2 as a serial console - -Enable ttymxc1 for use as a serial console: -1) Add the correct uart2 pinmux configuration. -2) Disable uart2 dte mode. - It allows running 'getty' and 'login' on the ttymxc1. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 14 ++++++++++++-- - 1 file changed, 12 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 0abb116..16cefe0 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -287,6 +287,16 @@ - >; - }; - -+ /* pins for uart2 */ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -+ >; -+ }; -+ - }; - }; - -@@ -389,8 +399,8 @@ - /* rear serial console */ - &uart2 { - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart2_2>; -- fsl,dte-mode; -+ pinctrl-0 = <&pinctrl_uart2>; -+ /* fsl,dte-mode; */ - fsl,uart-has-rtscts; - dma-names = "rx", "tx"; - dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch deleted file mode 100644 index e055a3c7..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 11f421d3b4a9f4b1d256fa6bc6b6b9c313cf1b93 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 10:51:44 +0300 -Subject: [PATCH 10/59] ARM: i.MX6: dts: add pcie power/reset gpio definition - -Add pcie power/reset gpio definition. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 16cefe0..592db30 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -297,6 +297,13 @@ - >; - }; - -+ /* pins for pcie */ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -+ >; -+ }; - }; - }; - -@@ -387,7 +394,10 @@ - - /* eth1 */ - &pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio1 26 0>; -+ power-on-gpio = <&gpio2 24 0>; - status = "okay"; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch deleted file mode 100644 index 37b49495..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 811721a51deec0f751d98ba438d763c4b9d1f736 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 10:53:32 +0300 -Subject: [PATCH 11/59] ARM: i.MX6: dts: add onboard SSD pin configuration - -Add onboard SSD pin configuration. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 592db30..0dfffa9 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -153,6 +153,26 @@ - }; - - &iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ /* SATA PWR */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 -+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 -+ /* SATA CTRL */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 -+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 -+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 -+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -+ >; -+ }; -+ }; -+ - imx6q-cm-fx6 { - /* pins for eth0 */ - pinctrl_enet: enetgrp { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch deleted file mode 100644 index e2e8fd28..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch +++ /dev/null @@ -1,92 +0,0 @@ -From bf5a6721257ec96c1626f295851014b373a3a20a Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 10:54:43 +0300 -Subject: [PATCH 12/59] ARM: i.MX6: dts: add onboard SSD power up sequence - -Add onboard SSD power up sequence. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 66 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 66 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 0dfffa9..286b03e 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -85,6 +85,72 @@ - gpio = <&gpio6 16 0>; - startup-delay-us = <10000>; - }; -+ -+ reg_sata_phy_slp: sata_phy_slp { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_phy_slp"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 23 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ }; -+ -+ reg_sata_nrstdly: sata_nrstdly { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nrstdly"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 6 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_phy_slp>; -+ }; -+ -+ reg_sata_pwren: sata_pwren { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_pwren"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio1 28 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nrstdly>; -+ }; -+ -+ reg_sata_nstandby1: sata_nstandby1 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby1"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 20 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_pwren>; -+ }; -+ -+ reg_sata_nstandby2: sata_nstandby2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby2"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio5 2 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nstandby1>; -+ }; -+ -+ reg_sata_ldo_en: sata_ldo_en { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_ldo_en"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 16 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-boot-on; -+ vin-supply = <®_sata_nstandby2>; -+ }; - }; - - gpio-keys { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch deleted file mode 100644 index e09502f9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 6a962cb469afddc96a37dce883af88a29a53a30c Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 10:57:39 +0300 -Subject: [PATCH 13/59] ARM: i.MX6: dts: add audio mux pinmux configuration - -Add audio mux pinmux configuration and enable audio mux. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 286b03e..776e0d8 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -373,6 +373,17 @@ - >; - }; - -+ /* pins for audmux */ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -+ >; -+ }; -+ - /* pins for uart2 */ - pinctrl_uart2: uart2grp { - fsl,pins = < -@@ -575,3 +586,9 @@ - pinctrl-0 = <&pinctrl_spdif>; - status = "okay"; - }; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch deleted file mode 100644 index 511298fd..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 0afe8320732c2609015af4c0b474cede18f81f24 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 11:02:28 +0300 -Subject: [PATCH 14/59] ARM: i.MX6: dts: add analog audio support - -1) Add i2c analog audion device node definition. -2) Add wm8731 codec node definition. -3) Enable ssi2 in master mode. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 776e0d8..9f5da43 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -168,6 +168,15 @@ - mxcfb1 = &mxcfb2; - }; - -+ sound { -+ compatible = "fsl,imx6q-cm-fx6-wm8731", -+ "fsl,imx-audio-wm8731"; -+ model = "wm8731-audio"; -+ ssi-controller = <&ssi2>; -+ audio-codec = <&codec>; -+ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; -+ }; -+ - sound-hdmi { - compatible = "fsl,imx6q-audio-hdmi", - "fsl,imx-audio-hdmi"; -@@ -487,6 +496,17 @@ - reg = <0x50>; - pagesize = <16>; - }; -+ -+ codec: wm8731@1a { -+ compatible = "wlf,wm8731"; -+ reg = <0x1a>; -+ clocks = <&clks 173>, <&clks 158>; -+ clock-names = "pll4", "imx-ssi.1"; -+ AVDD-supply = <&pu_dummy>; -+ HPVDD-supply = <&pu_dummy>; -+ DCVDD-supply = <&pu_dummy>; -+ DBVDD-supply = <&pu_dummy>; -+ }; - }; - - /* eth1 */ -@@ -556,6 +576,11 @@ - status = "okay"; - }; - -+&ssi2 { -+ fsl,mode = "i2s-master"; -+ status = "okay"; -+}; -+ - &mxcfb1 { - status = "okay"; - }; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch deleted file mode 100644 index f3d4befd..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch +++ /dev/null @@ -1,573 +0,0 @@ -From 5fbe55d2945782fee3f3238f20a8dcd0b9ba630c Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 20 Jul 2014 11:10:12 +0300 -Subject: [PATCH 15/59] ARM: i.MX6: ASoC: add imx-wm8731 machine driver - -This is the initial imx-wm8731 device-tree-only machine driver working with -fsl_ssi driver. Works in the slave mode. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - sound/soc/fsl/Kconfig | 12 ++ - sound/soc/fsl/Makefile | 2 + - sound/soc/fsl/imx-wm8731.c | 505 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 519 insertions(+) - create mode 100644 sound/soc/fsl/imx-wm8731.c - -diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig -index 573dabb..bb229da 100644 ---- a/sound/soc/fsl/Kconfig -+++ b/sound/soc/fsl/Kconfig -@@ -252,6 +252,18 @@ config SND_SOC_IMX_CS42888 - Say Y if you want to add support for SoC audio on an i.MX board with - a cs42888 codec. - -+config SND_SOC_IMX_WM8731 -+ tristate "SoC Audio support for i.MX boards with wm8731" -+ depends on OF && I2C -+ select SND_SOC_WM8731 -+ select SND_SOC_IMX_PCM_DMA -+ select SND_SOC_IMX_AUDMUX -+ select SND_SOC_FSL_SSI -+ select SND_SOC_FSL_UTILS -+ help -+ Say Y if you want to add support for SoC audio on an i.MX board with -+ a wm8731 codec. -+ - config SND_SOC_IMX_WM8962 - tristate "SoC Audio support for i.MX boards with wm8962" - depends on OF && I2C -diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile -index 144cd69..65f8e6f 100644 ---- a/sound/soc/fsl/Makefile -+++ b/sound/soc/fsl/Makefile -@@ -55,6 +55,7 @@ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o - snd-soc-wm1133-ev1-objs := wm1133-ev1.o - snd-soc-imx-cs42888-objs := imx-cs42888.o - snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o -+snd-soc-imx-wm8731-objs := imx-wm8731.o - snd-soc-imx-wm8962-objs := imx-wm8962.o - snd-soc-imx-spdif-objs := imx-spdif.o - snd-soc-imx-mc13783-objs := imx-mc13783.o -@@ -69,6 +70,7 @@ obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o - obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o - obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o - obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o -+obj-$(CONFIG_SND_SOC_IMX_WM8731) += snd-soc-imx-wm8731.o - obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o - obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o - obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o -diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c -new file mode 100644 -index 0000000..ba1363f ---- /dev/null -+++ b/sound/soc/fsl/imx-wm8731.c -@@ -0,0 +1,505 @@ -+/* -+ * Copyright (C) 2014 Freescale Semiconductor, Inc. -+ * -+ * Based on imx-sgtl5000.c -+ * Copyright (C) 2012 Freescale Semiconductor, Inc. -+ * Copyright (C) 2012 Linaro Ltd. -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include <linux/module.h> -+#include <linux/of_platform.h> -+#include <linux/of_i2c.h> -+#include <linux/of_gpio.h> -+#include <linux/slab.h> -+#include <linux/gpio.h> -+#include <linux/clk.h> -+#include <sound/soc.h> -+#include <sound/jack.h> -+#include <sound/pcm_params.h> -+#include <sound/soc-dapm.h> -+#include <linux/pinctrl/consumer.h> -+ -+#include "../codecs/wm8731.h" -+#include "imx-audmux.h" -+#include "imx-ssi.h" -+ -+#define DAI_NAME_SIZE 32 -+ -+struct imx_wm8731_data { -+ struct snd_soc_dai_link dai; -+ struct snd_soc_card card; -+ char codec_dai_name[DAI_NAME_SIZE]; -+ char platform_name[DAI_NAME_SIZE]; -+ struct i2c_client *codec_dev; -+ /* audio_clocking_data */ -+ struct clk *pll; -+ struct clk *clock_root; -+ long sysclk; -+ long current_rate; -+ /* platfor data */ -+ unsigned int ssi_num; -+ unsigned int src_port; -+ unsigned int ext_port; -+}; -+ -+static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd); -+static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params); -+static void imx_hifi_shutdown(struct snd_pcm_substream *substream); -+ -+struct imx_priv { -+ struct platform_device *pdev; -+ struct imx_wm8731_data *data; -+}; -+ -+static struct imx_priv card_priv; -+ -+static struct snd_soc_ops imx_hifi_ops = { -+ .shutdown = imx_hifi_shutdown, -+ .hw_params = imx_hifi_hw_params_slv_mode, -+}; -+ -+/* imx card dapm widgets */ -+static const struct snd_soc_dapm_widget imx_dapm_widgets[] = { -+ SND_SOC_DAPM_HP("Headphone Jack", NULL), -+ SND_SOC_DAPM_SPK("Ext Spk", NULL), -+ SND_SOC_DAPM_LINE("Line Jack", NULL), -+ SND_SOC_DAPM_MIC("Mic Jack", NULL), -+}; -+ -+/* imx machine connections to the codec pins */ -+static const struct snd_soc_dapm_route audio_map[] = { -+ { "Headphone Jack", NULL, "LHPOUT" }, -+ { "Headphone Jack", NULL, "RHPOUT" }, -+ -+ { "Ext Spk", NULL, "LOUT" }, -+ { "Ext Spk", NULL, "ROUT" }, -+ -+ { "LLINEIN", NULL, "Line Jack" }, -+ { "RLINEIN", NULL, "Line Jack" }, -+ -+ { "MICIN", NULL, "Mic Bias" }, -+ { "Mic Bias", NULL, "Mic Jack"}, -+}; -+ -+static int wm8731_slv_mode_init(struct imx_wm8731_data *data) -+{ -+ struct clk *new_parent; -+ struct clk *ssi_clk; -+ struct i2c_client *codec_dev = data->codec_dev; -+ -+ new_parent = devm_clk_get(&codec_dev->dev, "pll4"); -+ if (IS_ERR(new_parent)) { -+ pr_err("Could not get \"pll4\" clock \n"); -+ return PTR_ERR(new_parent); -+ } -+ -+ ssi_clk = devm_clk_get(&codec_dev->dev, "imx-ssi.1"); -+ if (IS_ERR(ssi_clk)) { -+ pr_err("Could not get \"imx-ssi.1\" clock \n"); -+ return PTR_ERR(ssi_clk); -+ } -+ -+ clk_set_parent(ssi_clk, new_parent); -+ -+ data->pll = new_parent; -+ data->clock_root = ssi_clk; -+ data->current_rate = 0; -+ -+ data->sysclk = 0; -+ -+ return 0; -+} -+ -+static int wm8731_slv_mode_clock_enable(int enable, struct imx_wm8731_data *data) -+{ -+ long pll_rate; -+ long rate_req; -+ long rate_avail; -+ -+ if (!enable) -+ return 0; -+ -+ if (data->sysclk == data->current_rate) -+ return 0; -+ -+ switch (data->sysclk) { -+ case 11289600: -+ pll_rate = 632217600; -+ break; -+ -+ case 12288000: -+ pll_rate = 688128000; -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ rate_req = pll_rate; -+ rate_avail = clk_round_rate(data->pll, rate_req); -+ clk_set_rate(data->pll, rate_avail); -+ -+ rate_req = data->sysclk; -+ rate_avail = clk_round_rate(data->clock_root, -+ rate_req); -+ clk_set_rate(data->clock_root, rate_avail); -+ -+ pr_info("%s: \"imx-ssi.1\" rate = %ld (= %ld)\n", -+ __func__, rate_avail, rate_req); -+ -+ data->current_rate = data->sysclk; -+ -+ return 0; -+} -+ -+static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_card *card = codec_dai->codec->card; -+ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); -+ -+ u32 dai_format, pll_out; -+ snd_pcm_format_t sample_format; -+ unsigned int channels; -+ unsigned int tx_mask, rx_mask; -+ unsigned int sampling_rate; -+ unsigned int div_2, div_psr, div_pm; -+ int ret; -+ -+ sampling_rate = params_rate(params); -+ sample_format = params_format(params); -+ -+ channels = params_channels(params); -+ printk("%s:%s sampling rate = %u channels = %u \n", __FUNCTION__, -+ (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"), -+ sampling_rate, channels); -+ -+ /* set CPU DAI configuration */ -+ switch (sampling_rate) { -+ case 8000: -+ case 32000: -+ case 48000: -+ case 96000: -+ data->sysclk = 12288000; -+ break; -+ -+ case 44100: -+ case 88200: -+ data->sysclk = 11289600; -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ wm8731_slv_mode_clock_enable(1,data); -+ -+ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | -+ SND_SOC_DAIFMT_CBS_CFS; -+ -+ ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); -+ if (ret < 0) -+ return ret; -+ -+ /* set i.MX active slot mask */ -+ /* S[TR]CCR:DC */ -+ tx_mask = ~((1 << channels) - 1); -+ rx_mask = tx_mask; -+ snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32); -+ -+ /* -+ * SSI sysclk divider: -+ * div_2: /1 or /2 -+ * div_psr: /1 or /8 -+ * div_pm: /1 .. /256 -+ */ -+ div_2 = 0; -+ div_psr = 0; -+ switch (sampling_rate) { -+ case 8000: -+ // 1x1x12 -+ div_pm = 11; -+ break; -+ case 32000: -+ // 1x1x3 -+ div_pm = 2; -+ break; -+ case 48000: -+ // 1x1x2 -+ div_pm = 1; -+ break; -+ case 96000: -+ // 1x1x1 -+ div_pm = 0; -+ break; -+ case 44100: -+ // 1x1x2 -+ div_pm = 1; -+ break; -+ case 88200: -+ // 1x1x1 -+ div_pm = 0; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ /* sync mode: a single clock controls both playback and capture */ -+ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_2, (div_2 ? SSI_STCCR_DIV2 : 0)); -+ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PSR, (div_psr ? SSI_STCCR_PSR : 0)); -+ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PM, div_pm); -+ -+ /* set codec DAI configuration */ -+ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS; -+ -+ ret = snd_soc_dai_set_fmt(codec_dai, dai_format); -+ if (ret < 0) -+ return ret; -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, -+ WM8731_SYSCLK_MCLK, -+ data->sysclk, -+ SND_SOC_CLOCK_IN); -+ -+ if (ret < 0) { -+ pr_err("Failed to set codec master clock to %u: %d \n", -+ data->sysclk, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void imx_hifi_shutdown(struct snd_pcm_substream *substream) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_card *card = codec_dai->codec->card; -+ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); -+ -+ if (!codec_dai->active) -+ wm8731_slv_mode_clock_enable(0,data); -+ -+ return; -+} -+ -+static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ int ret = 0; -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* Add imx specific widgets */ -+ ret = snd_soc_dapm_new_controls(&codec->dapm, imx_dapm_widgets, -+ ARRAY_SIZE(imx_dapm_widgets)); -+ if (ret) -+ goto out_retcode; -+ -+ /* Set up imx specific audio path audio_map */ -+ ret = snd_soc_dapm_add_routes(&codec->dapm, audio_map, ARRAY_SIZE(audio_map)); -+ if (ret) -+ goto out_retcode; -+ -+ ret = snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack"); -+ if (ret) -+ goto out_retcode; -+ -+ ret = snd_soc_dapm_nc_pin(&codec->dapm, "Ext Spk"); -+ if (ret) -+ goto out_retcode; -+ -+out_retcode: -+ -+ if (ret) -+ pr_err("%s: failed with error code: %d \n", __FUNCTION__, ret); -+ else -+ pr_info("%s: success \n", __FUNCTION__); -+ -+ return ret; -+} -+ -+/** -+ * Configure AUDMUX interconnection between -+ * _slave (CPU side) and _master (codec size) -+ * -+ * When SSI operates in master mode, 5-wire interconnect with -+ * audio codec is required: -+ * TXC - BCLK -+ * TXD - DAC data -+ * RXD - ADC data -+ * TXFS - {DAC|ADC}LRC, i.e. word clock -+ * RXC - MCLK, i.e. oversampling clock -+ * Audmux is operated in asynchronous mode to enable 6-wire -+ * interface (as opposed to 4-wire interface in sync mode). -+ */ -+static int imx_audmux_config_slv_mode(int _slave, int _master) -+{ -+ unsigned int ptcr, pdcr; -+ int slave = _slave - 1; -+ int master = _master - 1; -+ -+ ptcr = IMX_AUDMUX_V2_PTCR_SYN | -+ IMX_AUDMUX_V2_PTCR_TFSDIR | -+ IMX_AUDMUX_V2_PTCR_TFSEL(slave) | -+ IMX_AUDMUX_V2_PTCR_RCLKDIR | -+ IMX_AUDMUX_V2_PTCR_RCSEL(slave | 0x8) | -+ IMX_AUDMUX_V2_PTCR_TCLKDIR | -+ IMX_AUDMUX_V2_PTCR_TCSEL(slave); -+ -+ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave); -+ imx_audmux_v2_configure_port(master, ptcr, pdcr); -+ ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN; -+ imx_audmux_v2_configure_port(master, ptcr, pdcr); -+ -+ ptcr = IMX_AUDMUX_V2_PTCR_SYN | -+ IMX_AUDMUX_V2_PTCR_RCLKDIR | -+ IMX_AUDMUX_V2_PTCR_RCSEL(master | 0x8) | -+ IMX_AUDMUX_V2_PTCR_TCLKDIR | -+ IMX_AUDMUX_V2_PTCR_TCSEL(master); -+ -+ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master); -+ imx_audmux_v2_configure_port(slave, ptcr, pdcr); -+ ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN; -+ imx_audmux_v2_configure_port(slave, ptcr, pdcr); -+ -+ return 0; -+} -+ -+static int imx_wm8731_probe(struct platform_device *pdev) -+{ -+ struct device_node *ssi_np, *codec_np; -+ struct platform_device *ssi_pdev; -+ struct imx_priv *priv = &card_priv; -+ struct i2c_client *codec_dev; -+ struct imx_wm8731_data *data; -+ int ret; -+ -+ priv->pdev = pdev; -+ -+ ssi_np = of_parse_phandle(pdev->dev.of_node, "ssi-controller", 0); -+ codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0); -+ if (!ssi_np || !codec_np) { -+ dev_err(&pdev->dev, "phandle missing or invalid\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ ssi_pdev = of_find_device_by_node(ssi_np); -+ if (!ssi_pdev) { -+ dev_err(&pdev->dev, "failed to find SSI platform device\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ codec_dev = of_find_i2c_device_by_node(codec_np); -+ if (!codec_dev || !codec_dev->driver) { -+ dev_err(&pdev->dev, "failed to find codec platform device\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); -+ if (!data) { -+ ret = -ENOMEM; -+ goto fail; -+ } -+ -+ card_priv.data = data; -+ -+ data->codec_dev = codec_dev; -+ -+ data->dai.name = "HiFi"; -+ data->dai.stream_name = "HiFi"; -+ data->dai.codec_dai_name = "wm8731-hifi"; -+ data->dai.codec_of_node = codec_np; -+ data->dai.cpu_dai_name = dev_name(&ssi_pdev->dev); -+ data->dai.platform_of_node = ssi_np; -+ data->dai.ops = &imx_hifi_ops; -+ data->dai.init = &imx_wm8731_init; -+ -+ data->ssi_num = 2; /* 1-based */ -+ data->src_port = 2; -+ data->ext_port = 4; -+ -+ imx_audmux_config_slv_mode(data->src_port, data->ext_port); -+ -+ /* Slave Mode Init */ -+ wm8731_slv_mode_init(data); -+ -+ data->card.dev = &pdev->dev; -+ ret = snd_soc_of_parse_card_name(&data->card, "model"); -+ if (ret) -+ goto fail; -+ -+ ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing"); -+ if (ret) -+ goto fail; -+ -+ data->card.num_links = 1; -+ data->card.dai_link = &data->dai; -+ -+ data->card.dapm_widgets = imx_dapm_widgets; -+ data->card.num_dapm_widgets = ARRAY_SIZE(imx_dapm_widgets); -+ -+ platform_set_drvdata(pdev, &data->card); -+ snd_soc_card_set_drvdata(&data->card, data); -+ -+ ret = snd_soc_register_card(&data->card); -+ if (ret) { -+ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ -+ if (ssi_np) -+ of_node_put(ssi_np); -+ -+ if (codec_np) -+ of_node_put(codec_np); -+ -+ return ret; -+} -+ -+static int imx_wm8731_remove(struct platform_device *pdev) -+{ -+ struct snd_soc_card *card = platform_get_drvdata(pdev); -+ snd_soc_unregister_card(card); -+ -+ return 0; -+} -+ -+static const struct of_device_id imx_wm8731_dt_ids[] = { -+ { .compatible = "fsl,imx-audio-wm8731", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, imx_wm8731_dt_ids); -+ -+static struct platform_driver imx_wm8731_driver = { -+ .driver = { -+ .name = "imx-wm8731", -+ .owner = THIS_MODULE, -+ .of_match_table = imx_wm8731_dt_ids, -+ }, -+ .probe = imx_wm8731_probe, -+ .remove = imx_wm8731_remove, -+}; -+module_platform_driver(imx_wm8731_driver); -+ -+MODULE_AUTHOR("Freescale Semiconductor, Inc."); -+MODULE_DESCRIPTION("Freescale i.MX WM8731 ASoC machine driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:imx-wm8731"); --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch deleted file mode 100644 index ae67161a..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch +++ /dev/null @@ -1,335 +0,0 @@ -From 4c7271dbe9a5fb21e049b07fffb78a933f59382b Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 21 Jul 2014 17:17:32 +0300 -Subject: [PATCH 16/59] ARM: i.MX6: ASoC: add imx-wm8731 master mode support - -Add imx-wm8731 master mode support. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 8 +- - sound/soc/fsl/imx-wm8731.c | 212 +++++++++++++++++++++++++++++++++--- - 2 files changed, 203 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 9f5da43..050795b 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -173,6 +173,8 @@ - "fsl,imx-audio-wm8731"; - model = "wm8731-audio"; - ssi-controller = <&ssi2>; -+ src-port = <2>; -+ ext-port = <4>; - audio-codec = <&codec>; - audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; - }; -@@ -390,6 +392,8 @@ - MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 - MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 - MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -+ /* master mode pin */ -+ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 - >; - }; - -@@ -500,8 +504,8 @@ - codec: wm8731@1a { - compatible = "wlf,wm8731"; - reg = <0x1a>; -- clocks = <&clks 173>, <&clks 158>; -- clock-names = "pll4", "imx-ssi.1"; -+ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; -+ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; - AVDD-supply = <&pu_dummy>; - HPVDD-supply = <&pu_dummy>; - DCVDD-supply = <&pu_dummy>; -diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c -index ba1363f..72b75ad 100644 ---- a/sound/soc/fsl/imx-wm8731.c -+++ b/sound/soc/fsl/imx-wm8731.c -@@ -31,6 +31,7 @@ - #include "imx-ssi.h" - - #define DAI_NAME_SIZE 32 -+#define WM8731_MCLK_FREQ (24000000 / 2) - - struct imx_wm8731_data { - struct snd_soc_dai_link dai; -@@ -43,10 +44,8 @@ struct imx_wm8731_data { - struct clk *clock_root; - long sysclk; - long current_rate; -- /* platfor data */ -- unsigned int ssi_num; -- unsigned int src_port; -- unsigned int ext_port; -+ /* apis */ -+ int (*clock_enable)(int enable,struct imx_wm8731_data *data); - }; - - static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd); -@@ -63,7 +62,6 @@ static struct imx_priv card_priv; - - static struct snd_soc_ops imx_hifi_ops = { - .shutdown = imx_hifi_shutdown, -- .hw_params = imx_hifi_hw_params_slv_mode, - }; - - /* imx card dapm widgets */ -@@ -160,6 +158,78 @@ static int wm8731_slv_mode_clock_enable(int enable, struct imx_wm8731_data *data - return 0; - } - -+static int imx_hifi_startup_slv_mode(struct snd_pcm_substream *substream) -+{ -+ /* -+ * As SSI's sys clock rate depends on sampling rate, -+ * the clock enabling code is moved to imx_hifi_hw_params(). -+ */ -+ return 0; -+} -+ -+static int wm8731_mst_mode_init(struct imx_wm8731_data *data) -+{ -+ long rate; -+ struct clk *new_parent; -+ struct clk *ssi_clk; -+ struct i2c_client *codec_dev = data->codec_dev; -+ -+ new_parent = devm_clk_get(&codec_dev->dev, "cko2"); -+ if (IS_ERR(new_parent)) { -+ pr_err("Could not get \"cko2\" clock \n"); -+ return PTR_ERR(new_parent); -+ } -+ -+ ssi_clk = devm_clk_get(&codec_dev->dev, "cko"); -+ if (IS_ERR(ssi_clk)) { -+ pr_err("Could not get \"cko\" clock \n"); -+ return PTR_ERR(ssi_clk); -+ } -+ -+ rate = clk_round_rate(new_parent, WM8731_MCLK_FREQ); -+ clk_set_rate(new_parent, rate); -+ -+ clk_set_parent(ssi_clk, new_parent); -+ -+ rate = clk_round_rate(ssi_clk, WM8731_MCLK_FREQ); -+ clk_set_rate(ssi_clk, rate); -+ -+ pr_info("%s: \"CLKO\" rate = %ld (= %d)\n", -+ __func__, rate, WM8731_MCLK_FREQ); -+ -+ data->pll = new_parent; -+ data->clock_root = ssi_clk; -+ data->sysclk = rate; -+ -+ return 0; -+} -+ -+static int wm8731_mst_mode_clock_enable(int enable, struct imx_wm8731_data *data) -+{ -+ struct clk *clko = data->clock_root; -+ -+ if (enable) -+ clk_enable(clko); -+ else -+ clk_disable(clko); -+ -+ return 0; -+} -+ -+static int imx_hifi_startup_mst_mode(struct snd_pcm_substream *substream) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_card *card = codec_dai->codec->card; -+ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); -+ -+ if (!codec_dai->active) -+ data->clock_enable(1,data); -+ -+ return 0; -+} -+ -+ - static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params) - { -@@ -169,7 +239,7 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, - struct snd_soc_card *card = codec_dai->codec->card; - struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); - -- u32 dai_format, pll_out; -+ u32 dai_format; - snd_pcm_format_t sample_format; - unsigned int channels; - unsigned int tx_mask, rx_mask; -@@ -282,6 +352,63 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, - return 0; - } - -+static int imx_hifi_hw_params_mst_mode(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_card *card = codec_dai->codec->card; -+ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); -+ u32 dai_format; -+ unsigned int channels; -+ unsigned int tx_mask, rx_mask; -+ unsigned int sampling_rate; -+ int ret; -+ -+ -+ sampling_rate = params_rate(params); -+ channels = params_channels(params); -+ pr_debug("%s:%s sampling rate = %u channels = %u \n", __FUNCTION__, -+ (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"), -+ sampling_rate, channels); -+ -+ /* set cpu DAI configuration */ -+ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | -+ SND_SOC_DAIFMT_CBM_CFM; -+ -+ ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); -+ if (ret < 0) -+ return ret; -+ -+ /* set i.MX active slot mask */ -+ /* S[TR]CCR:DC */ -+ tx_mask = ~((1 << channels) - 1); -+ rx_mask = tx_mask; -+ snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32); -+ -+ /* set codec DAI configuration */ -+ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM; -+ -+ ret = snd_soc_dai_set_fmt(codec_dai, dai_format); -+ if (ret < 0) -+ return ret; -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, -+ WM8731_SYSCLK_MCLK, -+ data->sysclk, -+ SND_SOC_CLOCK_IN); -+ -+ if (ret < 0) { -+ pr_err("Failed to set codec master clock to %u: %d \n", -+ data->sysclk, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ - static void imx_hifi_shutdown(struct snd_pcm_substream *substream) - { - struct snd_soc_pcm_runtime *rtd = substream->private_data; -@@ -290,7 +417,7 @@ static void imx_hifi_shutdown(struct snd_pcm_substream *substream) - struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); - - if (!codec_dai->active) -- wm8731_slv_mode_clock_enable(0,data); -+ data->clock_enable(0,data); - - return; - } -@@ -376,6 +503,27 @@ static int imx_audmux_config_slv_mode(int _slave, int _master) - return 0; - } - -+static int imx_audmux_config_mst_mode(int _slave, int _master) -+{ -+ unsigned int ptcr, pdcr; -+ int slave = _slave - 1; -+ int master = _master - 1; -+ -+ ptcr = IMX_AUDMUX_V2_PTCR_SYN; -+ ptcr |= IMX_AUDMUX_V2_PTCR_TFSDIR | -+ IMX_AUDMUX_V2_PTCR_TFSEL(master) | -+ IMX_AUDMUX_V2_PTCR_TCLKDIR | -+ IMX_AUDMUX_V2_PTCR_TCSEL(master); -+ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master); -+ imx_audmux_v2_configure_port(slave, ptcr, pdcr); -+ -+ ptcr = IMX_AUDMUX_V2_PTCR_SYN; -+ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave); -+ imx_audmux_v2_configure_port(master, ptcr, pdcr); -+ -+ return 0; -+} -+ - static int imx_wm8731_probe(struct platform_device *pdev) - { - struct device_node *ssi_np, *codec_np; -@@ -383,6 +531,10 @@ static int imx_wm8731_probe(struct platform_device *pdev) - struct imx_priv *priv = &card_priv; - struct i2c_client *codec_dev; - struct imx_wm8731_data *data; -+ unsigned int src_port, ext_port; -+ unsigned int ssi_mode; -+ const char *ssi_mode_str; -+ - int ret; - - priv->pdev = pdev; -@@ -428,14 +580,44 @@ static int imx_wm8731_probe(struct platform_device *pdev) - data->dai.ops = &imx_hifi_ops; - data->dai.init = &imx_wm8731_init; - -- data->ssi_num = 2; /* 1-based */ -- data->src_port = 2; -- data->ext_port = 4; -- -- imx_audmux_config_slv_mode(data->src_port, data->ext_port); -- -- /* Slave Mode Init */ -- wm8731_slv_mode_init(data); -+ ret = of_property_read_u32(pdev->dev.of_node, "src-port", &src_port); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to get \"src-port\" value\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ ret = of_property_read_u32(pdev->dev.of_node, "ext-port", &ext_port); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to get \"ext-port\" value\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ ret = of_property_read_string(ssi_np, "fsl,mode", &ssi_mode_str); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to get \"fsl,mode\" value\n"); -+ ret = -EINVAL; -+ goto fail; -+ } -+ -+ ssi_mode = strcmp(ssi_mode_str, "i2s-master"); -+ -+ if (ssi_mode) { -+ /* Master Mode */ -+ imx_audmux_config_mst_mode(src_port, ext_port); -+ wm8731_mst_mode_init(data); -+ data->clock_enable = wm8731_mst_mode_clock_enable; -+ imx_hifi_ops.hw_params = imx_hifi_hw_params_mst_mode; -+ imx_hifi_ops.startup = imx_hifi_startup_mst_mode; -+ } else { -+ /* Slave Mode */ -+ imx_audmux_config_slv_mode(src_port, ext_port); -+ wm8731_slv_mode_init(data); -+ data->clock_enable = wm8731_slv_mode_clock_enable; -+ imx_hifi_ops.hw_params = imx_hifi_hw_params_slv_mode; -+ imx_hifi_ops.startup = imx_hifi_startup_slv_mode; -+ } - - data->card.dev = &pdev->dev; - ret = snd_soc_of_parse_card_name(&data->card, "model"); --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch deleted file mode 100644 index 21cbbc30..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 7b953812d9804bbce9f2b8f21ca5e72229272eb6 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 24 Jul 2014 16:11:29 +0300 -Subject: [PATCH 17/59] ARM: i.MX6: dts: enable v4l2 output - -Enable v4l2 output. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 050795b..2e04224 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -227,6 +227,11 @@ - status = "okay"; - }; - -+ v4l2_out { -+ compatible = "fsl,mxc_v4l2_output"; -+ status = "okay"; -+ }; -+ - }; - - &iomuxc { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch deleted file mode 100644 index 328ac9b9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 7cadcbd1a95de480f3412c56f6a3567ba213091a Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 31 Jul 2014 16:27:38 +0300 -Subject: [PATCH 18/59] ARM: i.MX6: dts: some small changes in the dts file - -1) Fixed the color depth value for both frame buffers. -2) Added a missing OTG pinmux definition. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 2e04224..1613c32 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -200,7 +200,7 @@ - disp_dev = "hdmi"; - interface_pix_fmt = "RGB24"; - mode_str ="1920x1080M@60"; -- default_bpp = <24>; -+ default_bpp = <32>; - int_clk = <0>; - late_init = <0>; - status = "disabled"; -@@ -211,12 +211,13 @@ - disp_dev = "lcd"; - interface_pix_fmt = "RGB24"; - mode_str ="1920x1080M@60"; -- default_bpp = <24>; -+ default_bpp = <32>; - int_clk = <0>; - late_init = <0>; - status = "disabled"; - }; - -+ - lcd@0 { - compatible = "fsl,lcd"; - ipu_id = <0>; -@@ -354,6 +355,7 @@ - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 - >; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch deleted file mode 100644 index 39702bff..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch +++ /dev/null @@ -1,79 +0,0 @@ -From da2c6c15b0db7f361b0db50b93b0d2df98ad81a4 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 5 Aug 2014 15:04:44 +0300 -Subject: [PATCH 19/59] igb: Define the device mac address in device tree - -1) Define the device mac address node in the device tree. -2) Make the driver read the mac address from the device tree node. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 6 ++++++ - drivers/net/ethernet/intel/igb/igb_main.c | 27 +++++++++++++++++++++++++++ - 2 files changed, 33 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 1613c32..0e2558f 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -233,6 +233,12 @@ - status = "okay"; - }; - -+ eth@pcie { -+ compatible = "intel,i211"; -+ local-mac-address = [00 1C 1D 1E 1F 20]; -+ status = "okay"; -+ }; -+ - }; - - &iomuxc { -diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c -index 2472835..5f93765 100644 ---- a/drivers/net/ethernet/intel/igb/igb_main.c -+++ b/drivers/net/ethernet/intel/igb/igb_main.c -@@ -2185,6 +2185,30 @@ static s32 igb_init_i2c(struct igb_adapter *adapter) - return status; - } - -+ -+/** -+ * igb_read_mac_addr_dts - Read mac addres from the device tree -+ * blob -+ * @adapter: pointer to adapter structure -+ **/ -+static void igb_read_mac_addr_dts(struct e1000_hw *hw) -+{ -+ struct device_node *dn; -+ const uint8_t *mac; -+ -+ dn = of_find_compatible_node(NULL, NULL, "intel,i211"); -+ -+ if (!dn) -+ return; -+ -+ mac = of_get_property(dn, "local-mac-address", NULL); -+ -+ if (mac) -+ memcpy(hw->mac.addr, mac, ETH_ALEN); -+ -+ return; -+} -+ - /** - * igb_probe - Device Initialization Routine - * @pdev: PCI device information struct -@@ -2387,6 +2411,9 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) - if (hw->mac.ops.read_mac_addr(hw)) - dev_err(&pdev->dev, "NVM Read Error\n"); - -+ if (!is_valid_ether_addr(hw->mac.addr)) -+ igb_read_mac_addr_dts(hw); -+ - if (!is_valid_ether_addr(hw->mac.addr)) { - dev_info(&pdev->dev, "Random MAC Address\n"); - random_ether_addr(hw->mac.addr); --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch deleted file mode 100644 index 2a455067..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 764be38216e273b22671b1f4d2babb47e0dc1d74 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 5 Aug 2014 15:39:32 +0300 -Subject: [PATCH 20/59] ARM: i.MX6: cm-fx6: update defconfig - -Enable: -1) Analog audio -2) MRVL bluetooth -3) SATA AHCI -4) USB OTG -5) Board revision - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/configs/cm_fx6_defconfig | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig -index eb6d9cb..210062b 100644 ---- a/arch/arm/configs/cm_fx6_defconfig -+++ b/arch/arm/configs/cm_fx6_defconfig -@@ -26,6 +26,7 @@ CONFIG_SOC_IMX53=y - CONFIG_SOC_IMX6Q=y - CONFIG_SOC_IMX6SL=y - CONFIG_SOC_VF610=y -+CONFIG_MACH_CM_FX6=y - # CONFIG_SWP_EMULATE is not set - CONFIG_PCI=y - CONFIG_PCI_IMX6=y -@@ -137,6 +138,9 @@ CONFIG_VLAN_8021Q=m - CONFIG_VLAN_8021Q_GVRP=y - CONFIG_CAN=y - CONFIG_CAN_FLEXCAN=y -+CONFIG_BT=m -+CONFIG_BT_MRVL=m -+CONFIG_BT_MRVL_SDIO=m - CONFIG_CFG80211=y - CONFIG_CFG80211_WEXT=y - CONFIG_MAC80211=y -@@ -176,6 +180,7 @@ CONFIG_SCSI_LOGGING=y - CONFIG_SCSI_SCAN_ASYNC=y - # CONFIG_SCSI_LOWLEVEL is not set - CONFIG_ATA=y -+CONFIG_SATA_AHCI=y - CONFIG_SATA_AHCI_PLATFORM=y - CONFIG_AHCI_IMX=y - CONFIG_PATA_IMX=y -@@ -251,6 +256,7 @@ CONFIG_MFD_MC13XXX_I2C=y - CONFIG_MFD_MAX17135=y - CONFIG_MFD_SI476X_CORE=y - CONFIG_REGULATOR=y -+CONFIG_REGULATOR_DUMMY=y - CONFIG_REGULATOR_FIXED_VOLTAGE=y - CONFIG_REGULATOR_DA9052=y - CONFIG_REGULATOR_ANATOP=y -@@ -310,6 +316,7 @@ CONFIG_SND_SOC=y - CONFIG_SND_IMX_SOC=y - CONFIG_SND_SOC_EUKREA_TLV320=y - CONFIG_SND_SOC_IMX_CS42888=y -+CONFIG_SND_SOC_IMX_WM8731=y - CONFIG_SND_SOC_IMX_WM8962=y - CONFIG_SND_SOC_IMX_SGTL5000=y - CONFIG_SND_SOC_IMX_SPDIF=y -@@ -317,7 +324,10 @@ CONFIG_SND_SOC_IMX_MC13783=y - CONFIG_SND_SOC_IMX_HDMI=y - CONFIG_SND_SOC_IMX_SI476X=y - CONFIG_USB=y -+CONFIG_USB_OTG=y - CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_MXC=y -+CONFIG_USB_EHCI_HCD_PLATFORM=y - CONFIG_USB_STORAGE=y - CONFIG_USB_CHIPIDEA=y - CONFIG_USB_CHIPIDEA_UDC=y -@@ -326,7 +336,9 @@ CONFIG_USB_PHY=y - CONFIG_NOP_USB_XCEIV=y - CONFIG_USB_MXS_PHY=y - CONFIG_USB_GADGET=y -+CONFIG_USB_FSL_USB2=y - CONFIG_USB_ZERO=m -+CONFIG_USB_AUDIO=m - CONFIG_USB_ETH=m - CONFIG_USB_MASS_STORAGE=m - CONFIG_USB_G_SERIAL=m --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch deleted file mode 100644 index 4bfa1bda..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch +++ /dev/null @@ -1,1112 +0,0 @@ -From a2cdd3f7524d4336e5a704d42b85503a7ab3f543 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 7 Aug 2014 15:30:03 +0300 -Subject: [PATCH 21/59] ARM: i.MX6: dts: refactoring the cm-fx6 device tree - file. - -Separate the staff that belongs to SB-FX6 and SB-FX6m boards. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 880 ++++++++++++++++------------------ - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 23 + - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 83 ++++ - 3 files changed, 516 insertions(+), 470 deletions(-) - create mode 100644 arch/arm/boot/dts/imx6q-sbc-fx6.dts - create mode 100644 arch/arm/boot/dts/imx6q-sbc-fx6m.dts - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 0e2558f..fa32c57 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -15,158 +15,147 @@ - #include "imx6q.dtsi" - - / { -- model = "CompuLab CM-FX6"; -- compatible = "compulab,cm-fx6", "fsl,imx6q"; -- -- memory { -- reg = <0x10000000 0x80000000>; -- }; -- -- leds { -- compatible = "gpio-leds"; -- -- heartbeat-led { -- label = "Heartbeat"; -- gpios = <&gpio2 31 0>; -- linux,default-trigger = "heartbeat"; -- }; -- }; -- -- regulators { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <0>; -- -- /* regulator for mmc */ -- reg_3p3v: 3p3v { -- compatible = "regulator-fixed"; -- regulator-name = "3P3V"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; -- -- /* regulator for usb otg */ -- reg_usb_otg_vbus: usb_otg_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_otg_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio3 22 0>; -- enable-active-high; -- }; -- -- /* regulator for usb hub1 */ -- reg_usb_h1_vbus: usb_h1_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_h1_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio7 8 0>; -- enable-active-high; -- }; -- -- /* regulator1 for wifi/bt */ -- awnh387_npoweron: regulator-awnh387-npoweron { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-npoweron"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio7 12 0>; -- enable-active-high; -- }; -- -- /* regulator2 for wifi/bt */ -- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-wifi-nreset"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio6 16 0>; -- startup-delay-us = <10000>; -- }; -- -- reg_sata_phy_slp: sata_phy_slp { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_phy_slp"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio3 23 0>; -- startup-delay-us = <100>; -- enable-active-high; -- }; -- -- reg_sata_nrstdly: sata_nrstdly { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nrstdly"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio6 6 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_phy_slp>; -- }; -- -- reg_sata_pwren: sata_pwren { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_pwren"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio1 28 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_nrstdly>; -- }; -- -- reg_sata_nstandby1: sata_nstandby1 { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nstandby1"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio3 20 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_pwren>; -- }; -- -- reg_sata_nstandby2: sata_nstandby2 { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nstandby2"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio5 2 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_nstandby1>; -- }; -- -- reg_sata_ldo_en: sata_ldo_en { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_ldo_en"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 16 0>; -- startup-delay-us = <100>; -- enable-active-high; -- regulator-boot-on; -- vin-supply = <®_sata_nstandby2>; -- }; -- }; -- -- gpio-keys { -- compatible = "gpio-keys"; -- power { -- label = "Power Button"; -- gpios = <&gpio1 29 1>; -- linux,code = <116>; /* KEY_POWER */ -- gpio-key,wakeup; -+ model = "CompuLab CM-FX6"; -+ compatible = "compulab,cm-fx6", "fsl,imx6q"; -+ -+ memory { -+ reg = <0x10000000 0x80000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ heartbeat-led { -+ label = "Heartbeat"; -+ gpios = <&gpio2 31 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for mmc */ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ /* regulator for usb otg */ -+ reg_usb_otg_vbus: usb_otg_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator for usb hub1 */ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio7 8 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator1 for wifi/bt */ -+ awnh387_npoweron: regulator-awnh387-npoweron { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-npoweron"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio7 12 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator2 for wifi/bt */ -+ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-wifi-nreset"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 16 0>; -+ startup-delay-us = <10000>; -+ }; -+ -+ reg_sata_phy_slp: sata_phy_slp { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_phy_slp"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 23 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ }; -+ -+ reg_sata_nrstdly: sata_nrstdly { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nrstdly"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 6 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_phy_slp>; -+ }; -+ -+ reg_sata_pwren: sata_pwren { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_pwren"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio1 28 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nrstdly>; -+ }; -+ -+ reg_sata_nstandby1: sata_nstandby1 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby1"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 20 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_pwren>; -+ }; -+ -+ reg_sata_nstandby2: sata_nstandby2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby2"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio5 2 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nstandby1>; -+ }; -+ -+ reg_sata_ldo_en: sata_ldo_en { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_ldo_en"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 16 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-boot-on; -+ vin-supply = <®_sata_nstandby2>; -+ }; - }; -- }; - -- aliases { -- mxcfb0 = &mxcfb1; -- mxcfb1 = &mxcfb2; -- }; -+ aliases { -+ mxcfb0 = &mxcfb1; -+ mxcfb1 = &mxcfb2; -+ }; - - sound { - compatible = "fsl,imx6q-cm-fx6-wm8731", -@@ -179,66 +168,58 @@ - audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; - }; - -- sound-hdmi { -- compatible = "fsl,imx6q-audio-hdmi", -- "fsl,imx-audio-hdmi"; -- model = "imx-audio-hdmi"; -- hdmi-controller = <&hdmi_audio>; -- }; -- -- sound-spdif { -- compatible = "fsl,imx-audio-spdif", -- "fsl,imx-sabreauto-spdif"; -- model = "imx-spdif"; -- spdif-controller = <&spdif>; -- spdif-out; -- spdif-in; -- }; -- -- mxcfb1: fb@0 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "hdmi"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- mxcfb2: fb@1 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "lcd"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- -- lcd@0 { -- compatible = "fsl,lcd"; -- ipu_id = <0>; -- disp_id = <0>; -- default_ifmt = "RGB24"; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ipu1_1>; -- status = "okay"; -- }; -+ sound-hdmi { -+ compatible = "fsl,imx6q-audio-hdmi", -+ "fsl,imx-audio-hdmi"; -+ model = "imx-audio-hdmi"; -+ hdmi-controller = <&hdmi_audio>; -+ }; - -- v4l2_out { -- compatible = "fsl,mxc_v4l2_output"; -- status = "okay"; -- }; -+ sound-spdif { -+ compatible = "fsl,imx-audio-spdif", -+ "fsl,imx-sabreauto-spdif"; -+ model = "imx-spdif"; -+ spdif-controller = <&spdif>; -+ spdif-out; -+ spdif-in; -+ }; - -- eth@pcie { -- compatible = "intel,i211"; -- local-mac-address = [00 1C 1D 1E 1F 20]; -- status = "okay"; -- }; -+ mxcfb1: fb@0 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "hdmi"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ mxcfb2: fb@1 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "lcd"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ lcd@0 { -+ compatible = "fsl,lcd"; -+ ipu_id = <0>; -+ disp_id = <0>; -+ default_ifmt = "RGB24"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ipu1_1>; -+ status = "okay"; -+ }; - -+ v4l2_out { -+ compatible = "fsl,mxc_v4l2_output"; -+ status = "okay"; -+ }; - }; - - &iomuxc { -@@ -258,261 +239,240 @@ - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 - MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -+ /* POWER_BUTTON */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 - >; - }; - }; - -- imx6q-cm-fx6 { -- /* pins for eth0 */ -- pinctrl_enet: enetgrp { -- fsl,pins = < -- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- >; -- }; -+ imx6q-cm-fx6 { -+ /* pins for eth0 */ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; - -- /* pins for spi */ -- pinctrl_ecspi1: ecspi1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -- >; -- }; -- -- /* pins for nand */ -- pinctrl_gpmi_nand: gpminandgrp { -- fsl,pins = < -- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -- >; -- }; -- -- /* pins for i2c1 */ -- pinctrl_i2c1: i2c1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -- >; -- }; -+ /* pins for spi */ -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -+ >; -+ }; -+ -+ /* pins for nand */ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -+ >; -+ }; -+ -+ /* pins for i2c1 */ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; - -- /* pins for i2c2 */ -- pinctrl_i2c2: i2c2grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -- >; -- }; -+ /* pins for i2c2 */ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; - -- /* pins for i2c3 */ -- pinctrl_i2c3: i2c3grp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for console */ -- pinctrl_uart4: uart4grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -- >; -- }; -+ /* pins for i2c3 */ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for console */ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -+ >; -+ }; - -- /* pins for usb hub1 */ -- pinctrl_usbh1: usbh1grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -- >; -- }; -+ /* pins for usb hub1 */ -+ pinctrl_usbh1: usbh1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -+ >; -+ }; - -- /* pins for usb otg */ -- pinctrl_usbotg: usbotggrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -- >; -- }; -- -- /* pins for wifi/bt */ -- pinctrl_usdhc1: usdhc1grp { -- fsl,pins = < -- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -- >; -- }; -- -- /* pins for mmc */ -- pinctrl_usdhc3: usdhc3grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- >; -- }; -- -- /* pins for spdif */ -- pinctrl_spdif: spdifgrp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -- >; -- }; -- -- /* pins for audmux */ -- pinctrl_audmux: audmuxgrp { -- fsl,pins = < -- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -- /* master mode pin */ -- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -- >; -- }; -+ /* pins for usb otg */ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ >; -+ }; - -- /* pins for uart2 */ -- pinctrl_uart2: uart2grp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -- MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -- MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -- MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -- >; -- }; -+ /* pins for wifi/bt */ -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -+ >; -+ }; -+ -+ /* pins for mmc */ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ -+ /* pins for spdif */ -+ pinctrl_spdif: spdifgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -+ >; -+ }; - -- /* pins for pcie */ -- pinctrl_pcie: pciegrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -- >; -- }; -- }; -+ /* pins for audmux */ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -+ /* master mode pin */ -+ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -+ >; -+ }; -+ }; - }; - - /* spi */ - &ecspi1 { -- fsl,spi-num-chipselects = <2>; -- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ecspi1>; -- status = "okay"; -- -- flash: m25p80@0 { -- #address-cells = <1>; -- #size-cells = <1>; -- compatible = "st,m25px16", "st,m25p"; -- spi-max-frequency = <20000000>; -- reg = <0>; -- -- partition@0 { -- label = "uboot"; -- reg = <0x0 0xc0000>; -- }; -- -- partition@c0000 { -- label = "uboot environment"; -- reg = <0xc0000 0x40000>; -- }; -- -- partition@100000 { -- label = "reserved"; -- reg = <0x100000 0x100000>; -- }; -- }; -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25px16", "st,m25p"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0x0 0xc0000>; -+ }; -+ -+ partition@c0000 { -+ label = "uboot environment"; -+ reg = <0xc0000 0x40000>; -+ }; -+ -+ partition@100000 { -+ label = "reserved"; -+ reg = <0x100000 0x100000>; -+ }; -+ }; - }; - - /* eth0 */ - &fec { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_enet>; -- phy-mode = "rgmii"; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ status = "okay"; - }; - - /* nand */ - &gpmi { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpmi_nand>; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; - }; - - /* i2c1 */ - &i2c1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c1>; -- status = "okay"; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -- -- rtc@56 { -- compatible = "emmicro,em3027"; -- reg = <0x56>; -- }; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; - }; - - /* i2c2 */ --&i2c2 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c2>; -- /* status = "okay"; */ -+&i2c2 { /* to be removed */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ /* status = "okay"; */ - }; - - /* i2c3 */ - &i2c3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c3>; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; - -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; - - codec: wm8731@1a { - compatible = "wlf,wm8731"; -@@ -526,71 +486,51 @@ - }; - }; - --/* eth1 */ --&pcie { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_pcie>; -- reset-gpio = <&gpio1 26 0>; -- power-on-gpio = <&gpio2 24 0>; -- status = "okay"; --}; -- - /* sata */ - &sata { -- status = "okay"; --}; -- --/* rear serial console */ --&uart2 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart2>; -- /* fsl,dte-mode; */ -- fsl,uart-has-rtscts; -- dma-names = "rx", "tx"; -- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; -- status = "okay"; -+ status = "okay"; - }; - - /* console */ - &uart4 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ status = "okay"; - }; - - /* usb otg */ - &usbotg { -- vbus-supply = <®_usb_otg_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbotg>; -- dr_mode = "otg"; -- status = "okay"; -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ dr_mode = "otg"; -+ status = "okay"; - }; - - /* usb hub1 */ - &usbh1 { -- vbus-supply = <®_usb_h1_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbh1>; -- status = "okay"; -+ vbus-supply = <®_usb_h1_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbh1>; -+ status = "okay"; - }; - - /* wifi/bt */ - &usdhc1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc1>; -- non-removable; -- vmmc-supply = <&awnh387_npoweron>; -- vmmc_aux-supply = <&awnh387_wifi_nreset>; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1>; -+ non-removable; -+ vmmc-supply = <&awnh387_npoweron>; -+ vmmc_aux-supply = <&awnh387_wifi_nreset>; -+ status = "okay"; - }; - - /* mmc */ - &usdhc3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc3>; -- vmmc-supply = <®_3p3v>; -- status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; - }; - - &ssi2 { -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -new file mode 100644 -index 0000000..5d3c7da ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -0,0 +1,23 @@ -+/* -+* Copyright 2014 CompuLab Ltd. -+* -+* Author: Valentin Raevsky <valentin@compulab.co.il> -+* -+* The code contained herein is licensed under the GNU General Public -+* License. You may obtain a copy of the GNU General Public License -+* Version 2 or later at the following locations: -+* -+* http://www.opensource.org/licenses/gpl-license.html -+* http://www.gnu.org/copyleft/gpl.html -+*/ -+ -+#include "imx6q-cm-fx6.dts" -+ -+/ { -+ model = "CompuLab CM-FX6 on SBC-FX6"; -+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; -+}; -+ -+&pcie { -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -new file mode 100644 -index 0000000..0e76f02 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -0,0 +1,83 @@ -+/* -+* Copyright 2014 CompuLab Ltd. -+* -+* Author: Valentin Raevsky <valentin@compulab.co.il> -+* -+* The code contained herein is licensed under the GNU General Public -+* License. You may obtain a copy of the GNU General Public License -+* Version 2 or later at the following locations: -+* -+* http://www.opensource.org/licenses/gpl-license.html -+* http://www.gnu.org/copyleft/gpl.html -+*/ -+ -+#include "imx6q-cm-fx6.dts" -+ -+/ { -+ model = "CompuLab CM-FX6 on SBC-FX6m"; -+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; -+ -+ eth@pcie { -+ compatible = "intel,i211"; -+ local-mac-address = [FF FF FF FF FF FF]; -+ status = "okay"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ power { -+ label = "Power Button"; -+ gpios = <&gpio1 29 1>; -+ linux,code = <116>; /* KEY_POWER */ -+ gpio-key,wakeup; -+ }; -+ }; -+}; -+ -+&iomuxc { -+ imx6q-sb-fx6m { -+ /* pins for uart2 */ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -+ >; -+ }; -+ -+ /* pins for pcie */ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -+ >; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ rtc@56 { -+ compatible = "emmicro,em3027"; -+ reg = <0x56>; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 26 0>; -+ power-on-gpio = <&gpio2 24 0>; -+ status = "okay"; -+}; -+ -+/* rear serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ /* fsl,dte-mode; */ -+ fsl,uart-has-rtscts; -+ dma-names = "rx", "tx"; -+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch deleted file mode 100644 index f9986338..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch +++ /dev/null @@ -1,1422 +0,0 @@ -From 0597ee45b5a7b0491977b7b91745c24a0406783f Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 12 Aug 2014 17:46:23 +0300 -Subject: [PATCH 22/59] ARM: i.MX6: dts: refactoring of the cm-fx6 device tree - files. - -Refactoring device tree files: -1) Utilite: -+ imx6q.dtsi -+ imx6q-sb-fx6x.dtsi -+ imx6q-sb-fx6m.dtsi -+ imx6q-cm-fx6.dtsi -= imx6q-sbc-fx6m.dts - -2) CM-FX6-EVAL: -+ imx6q.dtsi -+ imx6q-sb-fx6x.dtsi -+ imx6q-sb-fx6.dtsi -+ imx6q-cm-fx6.dtsi -= imx6q-sbc-fx6.dts - -3) CM-FX6 Module: -+ imx6q.dtsi -+ imx6q-cm-fx6.dtsi -= imx6q-cm-fx6.dts - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 582 +--------------------------------- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 531 +++++++++++++++++++++++++++++++ - arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 14 + - arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 32 ++ - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 75 +++++ - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 8 +- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 38 +-- - 7 files changed, 677 insertions(+), 603 deletions(-) - create mode 100644 arch/arm/boot/dts/imx6q-cm-fx6.dtsi - create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6.dtsi - create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6m.dtsi - create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6x.dtsi - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index fa32c57..a0e423b 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -1,576 +1,20 @@ - /* --* Copyright 2013 CompuLab Ltd. --* --* Author: Valentin Raevsky <valentin@compulab.co.il> --* --* The code contained herein is licensed under the GNU General Public --* License. You may obtain a copy of the GNU General Public License --* Version 2 or later at the following locations: --* --* http://www.opensource.org/licenses/gpl-license.html --* http://www.gnu.org/copyleft/gpl.html --*/ -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ - - /dts-v1/; --#include "imx6q.dtsi" -+#include "imx6q-cm-fx6.dtsi" - - / { - model = "CompuLab CM-FX6"; - compatible = "compulab,cm-fx6", "fsl,imx6q"; -- -- memory { -- reg = <0x10000000 0x80000000>; -- }; -- -- leds { -- compatible = "gpio-leds"; -- heartbeat-led { -- label = "Heartbeat"; -- gpios = <&gpio2 31 0>; -- linux,default-trigger = "heartbeat"; -- }; -- }; -- -- regulators { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <0>; -- -- /* regulator for mmc */ -- reg_3p3v: 3p3v { -- compatible = "regulator-fixed"; -- regulator-name = "3P3V"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; -- -- /* regulator for usb otg */ -- reg_usb_otg_vbus: usb_otg_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_otg_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio3 22 0>; -- enable-active-high; -- }; -- -- /* regulator for usb hub1 */ -- reg_usb_h1_vbus: usb_h1_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_h1_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio7 8 0>; -- enable-active-high; -- }; -- -- /* regulator1 for wifi/bt */ -- awnh387_npoweron: regulator-awnh387-npoweron { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-npoweron"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio7 12 0>; -- enable-active-high; -- }; -- -- /* regulator2 for wifi/bt */ -- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-wifi-nreset"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio6 16 0>; -- startup-delay-us = <10000>; -- }; -- -- reg_sata_phy_slp: sata_phy_slp { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_phy_slp"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio3 23 0>; -- startup-delay-us = <100>; -- enable-active-high; -- }; -- -- reg_sata_nrstdly: sata_nrstdly { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nrstdly"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio6 6 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_phy_slp>; -- }; -- -- reg_sata_pwren: sata_pwren { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_pwren"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio1 28 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_nrstdly>; -- }; -- -- reg_sata_nstandby1: sata_nstandby1 { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nstandby1"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio3 20 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_pwren>; -- }; -- -- reg_sata_nstandby2: sata_nstandby2 { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_nstandby2"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio5 2 0>; -- startup-delay-us = <100>; -- enable-active-high; -- vin-supply = <®_sata_nstandby1>; -- }; -- -- reg_sata_ldo_en: sata_ldo_en { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_ldo_en"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 16 0>; -- startup-delay-us = <100>; -- enable-active-high; -- regulator-boot-on; -- vin-supply = <®_sata_nstandby2>; -- }; -- }; -- -- aliases { -- mxcfb0 = &mxcfb1; -- mxcfb1 = &mxcfb2; -- }; -- -- sound { -- compatible = "fsl,imx6q-cm-fx6-wm8731", -- "fsl,imx-audio-wm8731"; -- model = "wm8731-audio"; -- ssi-controller = <&ssi2>; -- src-port = <2>; -- ext-port = <4>; -- audio-codec = <&codec>; -- audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; -- }; -- -- sound-hdmi { -- compatible = "fsl,imx6q-audio-hdmi", -- "fsl,imx-audio-hdmi"; -- model = "imx-audio-hdmi"; -- hdmi-controller = <&hdmi_audio>; -- }; -- -- sound-spdif { -- compatible = "fsl,imx-audio-spdif", -- "fsl,imx-sabreauto-spdif"; -- model = "imx-spdif"; -- spdif-controller = <&spdif>; -- spdif-out; -- spdif-in; -- }; -- -- mxcfb1: fb@0 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "hdmi"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- mxcfb2: fb@1 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "lcd"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- lcd@0 { -- compatible = "fsl,lcd"; -- ipu_id = <0>; -- disp_id = <0>; -- default_ifmt = "RGB24"; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ipu1_1>; -- status = "okay"; -- }; -- -- v4l2_out { -- compatible = "fsl,mxc_v4l2_output"; -- status = "okay"; -- }; --}; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- /* SATA PWR */ -- MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 -- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 -- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 -- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 -- /* SATA CTRL */ -- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 -- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 -- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 -- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -- /* POWER_BUTTON */ -- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -- >; -- }; -- }; -- -- imx6q-cm-fx6 { -- /* pins for eth0 */ -- pinctrl_enet: enetgrp { -- fsl,pins = < -- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- >; -- }; -- -- /* pins for spi */ -- pinctrl_ecspi1: ecspi1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -- >; -- }; -- -- /* pins for nand */ -- pinctrl_gpmi_nand: gpminandgrp { -- fsl,pins = < -- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -- >; -- }; -- -- /* pins for i2c1 */ -- pinctrl_i2c1: i2c1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for i2c2 */ -- pinctrl_i2c2: i2c2grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for i2c3 */ -- pinctrl_i2c3: i2c3grp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for console */ -- pinctrl_uart4: uart4grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -- >; -- }; -- -- /* pins for usb hub1 */ -- pinctrl_usbh1: usbh1grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -- >; -- }; -- -- /* pins for usb otg */ -- pinctrl_usbotg: usbotggrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -- >; -- }; -- -- /* pins for wifi/bt */ -- pinctrl_usdhc1: usdhc1grp { -- fsl,pins = < -- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -- >; -- }; -- -- /* pins for mmc */ -- pinctrl_usdhc3: usdhc3grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- >; -- }; -- -- /* pins for spdif */ -- pinctrl_spdif: spdifgrp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -- >; -- }; -- -- /* pins for audmux */ -- pinctrl_audmux: audmuxgrp { -- fsl,pins = < -- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -- /* master mode pin */ -- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -- >; -- }; -- }; --}; -- --/* spi */ --&ecspi1 { -- fsl,spi-num-chipselects = <2>; -- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ecspi1>; -- status = "okay"; -- -- flash: m25p80@0 { -- #address-cells = <1>; -- #size-cells = <1>; -- compatible = "st,m25px16", "st,m25p"; -- spi-max-frequency = <20000000>; -- reg = <0>; -- -- partition@0 { -- label = "uboot"; -- reg = <0x0 0xc0000>; -- }; -- -- partition@c0000 { -- label = "uboot environment"; -- reg = <0xc0000 0x40000>; -- }; -- -- partition@100000 { -- label = "reserved"; -- reg = <0x100000 0x100000>; -- }; -- }; --}; -- --/* eth0 */ --&fec { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_enet>; -- phy-mode = "rgmii"; -- status = "okay"; --}; -- --/* nand */ --&gpmi { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpmi_nand>; -- status = "okay"; --}; -- --/* i2c1 */ --&i2c1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c1>; -- status = "okay"; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; --}; -- --/* i2c2 */ --&i2c2 { /* to be removed */ -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c2>; -- /* status = "okay"; */ --}; -- --/* i2c3 */ --&i2c3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c3>; -- status = "okay"; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -- -- codec: wm8731@1a { -- compatible = "wlf,wm8731"; -- reg = <0x1a>; -- clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; -- clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; -- AVDD-supply = <&pu_dummy>; -- HPVDD-supply = <&pu_dummy>; -- DCVDD-supply = <&pu_dummy>; -- DBVDD-supply = <&pu_dummy>; -- }; --}; -- --/* sata */ --&sata { -- status = "okay"; --}; -- --/* console */ --&uart4 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -- status = "okay"; --}; -- --/* usb otg */ --&usbotg { -- vbus-supply = <®_usb_otg_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbotg>; -- dr_mode = "otg"; -- status = "okay"; --}; -- --/* usb hub1 */ --&usbh1 { -- vbus-supply = <®_usb_h1_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbh1>; -- status = "okay"; --}; -- --/* wifi/bt */ --&usdhc1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc1>; -- non-removable; -- vmmc-supply = <&awnh387_npoweron>; -- vmmc_aux-supply = <&awnh387_wifi_nreset>; -- status = "okay"; --}; -- --/* mmc */ --&usdhc3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc3>; -- vmmc-supply = <®_3p3v>; -- status = "okay"; --}; -- --&ssi2 { -- fsl,mode = "i2s-master"; -- status = "okay"; --}; -- --&mxcfb1 { -- status = "okay"; --}; -- --&mxcfb2 { -- status = "okay"; --}; -- --&hdmi_core { -- ipu_id = <1>; -- disp_id = <0>; -- status = "okay"; --}; -- --&hdmi_video { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -- fsl,hdcp; -- status = "okay"; --}; -- --&hdmi_audio { -- status = "okay"; --}; -- --&spdif { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_spdif>; -- status = "okay"; --}; -- --&audmux { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_audmux>; -- status = "okay"; --}; -+}; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -new file mode 100644 -index 0000000..0aa4461 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -0,0 +1,531 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include "imx6q.dtsi" -+ -+/ { -+ memory { -+ reg = <0x10000000 0x80000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ heartbeat-led { -+ label = "Heartbeat"; -+ gpios = <&gpio2 31 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for usb otg */ -+ reg_usb_otg_vbus: usb_otg_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator for usb hub1 */ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio7 8 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator1 for wifi/bt */ -+ awnh387_npoweron: regulator-awnh387-npoweron { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-npoweron"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio7 12 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator2 for wifi/bt */ -+ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-wifi-nreset"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 16 0>; -+ startup-delay-us = <10000>; -+ }; -+ -+ reg_sata_phy_slp: sata_phy_slp { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_phy_slp"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 23 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ }; -+ -+ reg_sata_nrstdly: sata_nrstdly { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nrstdly"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 6 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_phy_slp>; -+ }; -+ -+ reg_sata_pwren: sata_pwren { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_pwren"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio1 28 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nrstdly>; -+ }; -+ -+ reg_sata_nstandby1: sata_nstandby1 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby1"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio3 20 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_pwren>; -+ }; -+ -+ reg_sata_nstandby2: sata_nstandby2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_nstandby2"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio5 2 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ vin-supply = <®_sata_nstandby1>; -+ }; -+ -+ reg_sata_ldo_en: sata_ldo_en { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_ldo_en"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 16 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-boot-on; -+ vin-supply = <®_sata_nstandby2>; -+ }; -+ }; -+ -+ aliases { -+ mxcfb0 = &mxcfb1; -+ mxcfb1 = &mxcfb2; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6q-cm-fx6-wm8731", -+ "fsl,imx-audio-wm8731"; -+ model = "wm8731-audio"; -+ ssi-controller = <&ssi2>; -+ src-port = <2>; -+ ext-port = <4>; -+ audio-codec = <&codec>; -+ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; -+ }; -+ -+ sound-hdmi { -+ compatible = "fsl,imx6q-audio-hdmi", -+ "fsl,imx-audio-hdmi"; -+ model = "imx-audio-hdmi"; -+ hdmi-controller = <&hdmi_audio>; -+ }; -+ -+ sound-spdif { -+ compatible = "fsl,imx-audio-spdif", -+ "fsl,imx-sabreauto-spdif"; -+ model = "imx-spdif"; -+ spdif-controller = <&spdif>; -+ spdif-out; -+ spdif-in; -+ }; -+ -+ mxcfb1: fb@0 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "hdmi"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ mxcfb2: fb@1 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "lcd"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ lcd@0 { -+ compatible = "fsl,lcd"; -+ ipu_id = <0>; -+ disp_id = <0>; -+ default_ifmt = "RGB24"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ipu1_1>; -+ status = "okay"; -+ }; -+ -+ v4l2_out { -+ compatible = "fsl,mxc_v4l2_output"; -+ status = "okay"; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ /* SATA PWR */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 -+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 -+ /* SATA CTRL */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 -+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 -+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 -+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -+ /* POWER_BUTTON */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -+ >; -+ }; -+ }; -+ -+ imx6q-cm-fx6 { -+ /* pins for eth0 */ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; -+ -+ /* pins for spi */ -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -+ >; -+ }; -+ -+ /* pins for nand */ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -+ >; -+ }; -+ -+ /* pins for i2c2 */ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for i2c3 */ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for console */ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ /* pins for usb hub1 */ -+ pinctrl_usbh1: usbh1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -+ >; -+ }; -+ -+ /* pins for usb otg */ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ >; -+ }; -+ -+ /* pins for wifi/bt */ -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -+ >; -+ }; -+ -+ /* pins for pcie */ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -+ >; -+ }; -+ -+ /* pins for spdif */ -+ pinctrl_spdif: spdifgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -+ >; -+ }; -+ -+ /* pins for audmux */ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -+ /* master mode pin */ -+ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+/* spi */ -+&ecspi1 { -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25px16", "st,m25p"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0x0 0xc0000>; -+ }; -+ -+ partition@c0000 { -+ label = "uboot environment"; -+ reg = <0xc0000 0x40000>; -+ }; -+ -+ partition@100000 { -+ label = "reserved"; -+ reg = <0x100000 0x100000>; -+ }; -+ }; -+}; -+ -+/* eth0 */ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ -+/* nand */ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+/* i2c3 */ -+&i2c3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ codec: wm8731@1a { -+ compatible = "wlf,wm8731"; -+ reg = <0x1a>; -+ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; -+ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; -+ AVDD-supply = <&pu_dummy>; -+ HPVDD-supply = <&pu_dummy>; -+ DCVDD-supply = <&pu_dummy>; -+ DBVDD-supply = <&pu_dummy>; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 26 0>; -+ power-on-gpio = <&gpio2 24 0>; -+ status = "okay"; -+}; -+ -+/* sata */ -+&sata { -+ status = "okay"; -+}; -+ -+/* console */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ status = "okay"; -+}; -+ -+/* usb otg */ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+/* usb hub1 */ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbh1>; -+ status = "okay"; -+}; -+ -+/* wifi/bt */ -+&usdhc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1>; -+ non-removable; -+ vmmc-supply = <&awnh387_npoweron>; -+ vmmc_aux-supply = <&awnh387_wifi_nreset>; -+ status = "okay"; -+}; -+ -+&ssi2 { -+ fsl,mode = "i2s-master"; -+ status = "okay"; -+}; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ status = "okay"; -+}; -+ -+&hdmi_core { -+ ipu_id = <1>; -+ disp_id = <0>; -+ status = "okay"; -+}; -+ -+&hdmi_video { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -+ fsl,hdcp; -+ status = "okay"; -+}; -+ -+&hdmi_audio { -+ status = "okay"; -+}; -+ -+&spdif { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_spdif>; -+ status = "okay"; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -new file mode 100644 -index 0000000..acfc572 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -@@ -0,0 +1,14 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include "imx6q-sb-fx6x.dtsi" -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -new file mode 100644 -index 0000000..5a488f8 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -@@ -0,0 +1,32 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include "imx6q-sb-fx6x.dtsi" -+ -+/ { -+ eth@pcie { -+ compatible = "intel,i211"; -+ local-mac-address = [FF FF FF FF FF FF]; -+ status = "okay"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ power { -+ label = "Power Button"; -+ gpios = <&gpio1 29 1>; -+ linux,code = <116>; /* KEY_POWER */ -+ gpio-key,wakeup; -+ }; -+ }; -+}; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -new file mode 100644 -index 0000000..9f67b3e ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -@@ -0,0 +1,75 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include "imx6q.dtsi" -+ -+/ { -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for mmc */ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ -+}; -+ -+&iomuxc { -+ imx6q-sb-fx6x { -+ /* pins for i2c1 */ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for mmc */ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+/* i2c1 */ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+}; -+ -+/* mmc */ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ vmmc-supply = <®_3p3v>; -+ status = "disabled"; -+}; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 5d3c7da..33e4f33 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -11,13 +11,15 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q-cm-fx6.dts" -+/dts-v1/; -+#include "imx6q-sb-fx6x.dtsi" -+#include "imx6q-cm-fx6.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; - }; - --&pcie { -+&usdhc3 { - status = "okay"; --}; -+}; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 0e76f02..2282250 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -11,31 +11,18 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q-cm-fx6.dts" -+/dts-v1/; -+#include "imx6q-sb-fx6m.dtsi" -+#include "imx6q-cm-fx6.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6m"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; - -- eth@pcie { -- compatible = "intel,i211"; -- local-mac-address = [FF FF FF FF FF FF]; -- status = "okay"; -- }; -- -- gpio-keys { -- compatible = "gpio-keys"; -- power { -- label = "Power Button"; -- gpios = <&gpio1 29 1>; -- linux,code = <116>; /* KEY_POWER */ -- gpio-key,wakeup; -- }; -- }; - }; - - &iomuxc { -- imx6q-sb-fx6m { -+ imx6q-sbc-fx6m { - /* pins for uart2 */ - pinctrl_uart2: uart2grp { - fsl,pins = < -@@ -45,17 +32,10 @@ - MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 - >; - }; -- -- /* pins for pcie */ -- pinctrl_pcie: pciegrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -- >; -- }; - }; - }; - -+ - &i2c1 { - rtc@56 { - compatible = "emmicro,em3027"; -@@ -63,11 +43,7 @@ - }; - }; - --&pcie { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_pcie>; -- reset-gpio = <&gpio1 26 0>; -- power-on-gpio = <&gpio2 24 0>; -+&usdhc3 { - status = "okay"; - }; - -@@ -80,4 +56,4 @@ - dma-names = "rx", "tx"; - dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; - status = "okay"; --}; -+}; -\ No newline at end of file --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch deleted file mode 100644 index 89162e24..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch +++ /dev/null @@ -1,46 +0,0 @@ -From dbd1cd2da1f43bde17e66b95128533d1658ece09 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 20 Aug 2014 14:48:09 +0300 -Subject: [PATCH 23/59] ARM: i.MX6: dts: pcie power-on-gpio to a fixed - regulator - -Define pcie power-on-gpio as a fixed regulator. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 0aa4461..27f9567 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -42,6 +42,16 @@ - enable-active-high; - }; - -+ /* regulator1 for pcie power-on-gpio */ -+ pcie_power_on_gpio: regulator-pcie-power-on-gpio { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-pcie-power-on-gpio"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 24 0>; -+ enable-active-high; -+ }; -+ - /* regulator for usb hub1 */ - reg_usb_h1_vbus: usb_h1_vbus { - compatible = "regulator-fixed"; -@@ -445,7 +455,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio1 26 0>; -- power-on-gpio = <&gpio2 24 0>; -+ vdd-supply = <&pcie_power_on_gpio>; - status = "okay"; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch deleted file mode 100644 index cead2acc..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 84e2c9793f9240cec297eef8bb38978aade1fbb1 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 20 Aug 2014 15:15:38 +0300 -Subject: [PATCH 24/59] ARM: i.MX6: dts: add i2c1 status okay - -Restore the i2c1 bus staus that has been deleted while refactoring. -It was the reason why em3027 stoped working. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 ++++ - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 1 + - 2 files changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 33e4f33..6f6ad33 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -20,6 +20,10 @@ - compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; - }; - -+&i2c1 { -+ status = "okay"; -+}; -+ - &usdhc3 { - status = "okay"; - }; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 2282250..cf2a0eb 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -37,6 +37,7 @@ - - - &i2c1 { -+ status = "okay"; - rtc@56 { - compatible = "emmicro,em3027"; - reg = <0x56>; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch deleted file mode 100644 index 1295ded9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch +++ /dev/null @@ -1,28 +0,0 @@ -From b223d8ffc36e39f88c1b9014ca6bbaecd9022508 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 3 Sep 2014 10:48:29 +0300 -Subject: [PATCH 25/59] ARM: i.MX6: dts: add local-mac-address field for fec. - -Add local-mac-address field for fec. -The board U-Boot is in charge to fill this field with a correct value. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6qdl.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi -index 732f2d2..f4f3de3 100644 ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -944,6 +944,7 @@ - <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET_REF>; - clock-names = "ipg", "ahb", "ptp"; -+ local-mac-address = [FF FF FF FF FF FF]; - status = "disabled"; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch deleted file mode 100644 index 2a2436e2..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch +++ /dev/null @@ -1,36 +0,0 @@ -From e7e09deee3c3ac74e3d429cf8af2effade1152c7 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 28 Dec 2014 15:05:21 +0200 -Subject: [PATCH 26/59] ARM: mxs: change usb phy test clock gating. - -This change proposes to invert test clock gating. -This solution has fixed usb hub suspend resume loop issue. ---- - drivers/usb/phy/phy-mxs-usb.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c -index 97556b5..fffa67d 100644 ---- a/drivers/usb/phy/phy-mxs-usb.c -+++ b/drivers/usb/phy/phy-mxs-usb.c -@@ -239,7 +239,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) - - if (disconnect) - writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, -- base + HW_USBPHY_DEBUG_CLR); -+ base + HW_USBPHY_DEBUG_SET); - - if (mxs_phy->port_id == 0) { - reg = disconnect ? ANADIG_USB1_LOOPBACK_SET -@@ -257,7 +257,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) - - if (!disconnect) - writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, -- base + HW_USBPHY_DEBUG_SET); -+ base + HW_USBPHY_DEBUG_CLR); - - /* Delay some time, and let Linestate be SE0 for controller */ - if (disconnect) --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch deleted file mode 100644 index 8f77c7e1..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 246fc4a1169a2ef6fa2582e72bdf3d9c9dc451c2 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 30 Dec 2014 13:55:58 +0200 -Subject: [PATCH 27/59] ARM: i.MX6: dts: fix the cm-fx6 operation points. - -Fix the cm-fx6 operation points. Remove settings for 1.2GHz. -The current ldo settings do not allow 1.2GHz cpu frequency. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 19 ++++++++++++++++++- - 1 file changed, 18 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 27f9567..12eed61 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -380,6 +380,23 @@ - }; - }; - -+&cpu0 { -+ operating-points = < -+ /* kHz uV */ -+ 996000 1250000 -+ 852000 1250000 -+ 792000 1150000 -+ 396000 975000 -+ >; -+ fsl,soc-operating-points = < -+ /* ARM kHz SOC-PU uV */ -+ 996000 1250000 -+ 852000 1250000 -+ 792000 1175000 -+ 396000 1175000 -+ >; -+}; -+ - /* spi */ - &ecspi1 { - fsl,spi-num-chipselects = <2>; -@@ -538,4 +555,4 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux>; - status = "okay"; --}; -\ No newline at end of file -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch deleted file mode 100644 index df9102d9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 4e0f406df2399be8984a6b774669ec1181153a37 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 5 Jan 2015 10:34:13 +0200 -Subject: [PATCH 28/59] ARM: i.MX6: ASoC: fix build warnings and update - includes - -Fix build warnings and update includes. - -sound/soc/fsl/imx-wm8731.c: In function 'imx_hifi_hw_params_slv_mode': -sound/soc/fsl/imx-wm8731.c:357:3: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'long int' -sound/soc/fsl/imx-wm8731.c: In function 'imx_hifi_hw_params_mst_mode': -sound/soc/fsl/imx-wm8731.c:414:3: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'long int' - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - sound/soc/fsl/imx-wm8731.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) - -diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c -index 72b75ad..c0833cf 100644 ---- a/sound/soc/fsl/imx-wm8731.c -+++ b/sound/soc/fsl/imx-wm8731.c -@@ -14,17 +14,12 @@ - */ - - #include <linux/module.h> -+#include <linux/of.h> - #include <linux/of_platform.h> - #include <linux/of_i2c.h> --#include <linux/of_gpio.h> --#include <linux/slab.h> --#include <linux/gpio.h> - #include <linux/clk.h> - #include <sound/soc.h> --#include <sound/jack.h> - #include <sound/pcm_params.h> --#include <sound/soc-dapm.h> --#include <linux/pinctrl/consumer.h> - - #include "../codecs/wm8731.h" - #include "imx-audmux.h" -@@ -344,7 +339,7 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, - SND_SOC_CLOCK_IN); - - if (ret < 0) { -- pr_err("Failed to set codec master clock to %u: %d \n", -+ pr_err("Failed to set codec master clock to %lu: %d \n", - data->sysclk, ret); - return ret; - } -@@ -401,7 +396,7 @@ static int imx_hifi_hw_params_mst_mode(struct snd_pcm_substream *substream, - SND_SOC_CLOCK_IN); - - if (ret < 0) { -- pr_err("Failed to set codec master clock to %u: %d \n", -+ pr_err("Failed to set codec master clock to %lu: %d \n", - data->sysclk, ret); - return ret; - } -@@ -555,7 +550,7 @@ static int imx_wm8731_probe(struct platform_device *pdev) - } - - codec_dev = of_find_i2c_device_by_node(codec_np); -- if (!codec_dev || !codec_dev->driver) { -+ if (!codec_dev) { - dev_err(&pdev->dev, "failed to find codec platform device\n"); - ret = -EINVAL; - goto fail; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch deleted file mode 100644 index 4076dfa1..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 0c263e8ce8ff9a47bc336ed10d7144d7f673ed05 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 15 Jan 2015 13:52:37 +0200 -Subject: [PATCH 29/59] ARM: i.MX6: dts: change issd gpio order - -Change the order in which GPIOs are toggled in SATA init sequence to -accomodate both SanDisk and Phison SSDs. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 23 ++++++++++++----------- - 1 file changed, 12 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 12eed61..dd91190 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -82,6 +82,16 @@ - startup-delay-us = <10000>; - }; - -+ reg_sata_ldo_en: sata_ldo_en { -+ compatible = "regulator-fixed"; -+ regulator-name = "cm_fx6_sata_ldo_en"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 16 0>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ }; -+ - reg_sata_phy_slp: sata_phy_slp { - compatible = "regulator-fixed"; - regulator-name = "cm_fx6_sata_phy_slp"; -@@ -90,6 +100,7 @@ - gpio = <&gpio3 23 0>; - startup-delay-us = <100>; - enable-active-high; -+ vin-supply = <®_sata_ldo_en>; - }; - - reg_sata_nrstdly: sata_nrstdly { -@@ -133,20 +144,10 @@ - gpio = <&gpio5 2 0>; - startup-delay-us = <100>; - enable-active-high; -+ regulator-boot-on; - vin-supply = <®_sata_nstandby1>; - }; - -- reg_sata_ldo_en: sata_ldo_en { -- compatible = "regulator-fixed"; -- regulator-name = "cm_fx6_sata_ldo_en"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 16 0>; -- startup-delay-us = <100>; -- enable-active-high; -- regulator-boot-on; -- vin-supply = <®_sata_nstandby2>; -- }; - }; - - aliases { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch deleted file mode 100644 index 4aeabcdc..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 5fd7676d1ed0b1147d17304fe93f6e65df824fe3 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Tue, 27 Jan 2015 15:54:24 +0200 -Subject: [PATCH 30/59] ARM: i.MX6: dts: add missing WiFi/BT pinmuxes - -Set a correct mux mode for both: -WLAN_BT_nPD and WLAN_BT_nRESET. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index dd91190..3b1a046 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -239,6 +239,9 @@ - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 - /* POWER_BUTTON */ - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -+ /* WIFI_PWR_RST */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 -+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 - >; - }; - }; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch deleted file mode 100644 index 08ac85dc..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 9c4cc9ad875d6dbbf099b3eb3cf145e8e32c8fa1 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 12 Feb 2015 13:41:56 +0200 -Subject: [PATCH 31/59] ARM: i.MX6: cm-fx6: enable i2cmux in defconfig - -Enable i2cmux in defconfig. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/configs/cm_fx6_defconfig | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig -index 210062b..7d753ae 100644 ---- a/arch/arm/configs/cm_fx6_defconfig -+++ b/arch/arm/configs/cm_fx6_defconfig -@@ -232,6 +232,9 @@ CONFIG_FSL_OTP=y - CONFIG_MXS_VIIM=y - # CONFIG_I2C_COMPAT is not set - CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_MUX_GPIO=y -+CONFIG_I2C_MUX_PCA954x=y - # CONFIG_I2C_HELPER_AUTO is not set - CONFIG_I2C_ALGOPCF=m - CONFIG_I2C_ALGOPCA=m --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch deleted file mode 100644 index 1d1fd3da..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 071b13a32ba25d50adf4f552e71339edce00e1f9 Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Feb 2015 15:54:13 +0200 -Subject: [PATCH 32/59] ARM: i.MX6: sb-fx6m: Fix uart1 rts/cts flow control - -According to the board schematics uart1 works in DCE mode only. -Remove the DCEDTE mode flag in the uart1 properties. - -Set a correct value in the IOMUXC_UART2_UART_RTS_B_SELECT_INPUT register. -This value lets connect RTS_B pad to ipp_uart_rts_b when UART is in DCE mode. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: removed remnant include from previous patch -version] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index cf2a0eb..8afb83d 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -19,6 +19,14 @@ - model = "CompuLab CM-FX6 on SBC-FX6m"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; - -+ iomux_uart2: pinmux@20E0924 { -+ compatible = "pinctrl-single"; -+ reg = <0x20E0000 0x924>; /* Single register */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ pinctrl-single,register-width = <32>; -+ pinctrl-single,function-mask = <0x4>; -+ }; - }; - - &iomuxc { -@@ -52,9 +60,6 @@ - &uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; -- /* fsl,dte-mode; */ - fsl,uart-has-rtscts; -- dma-names = "rx", "tx"; -- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; - status = "okay"; --}; -\ No newline at end of file -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch deleted file mode 100644 index e6c21a4e..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch +++ /dev/null @@ -1,172 +0,0 @@ -From 38a739ee4a93cbf436a4d3dfbe9f9fc729177392 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 18 Feb 2015 18:25:23 +0200 -Subject: [PATCH 33/59] ARM: i.MX6: dts: add i2cmux support for SBC-FX6 boards - -Add i2cmux support for SBC-FX6 boards. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 50 +++++++++++++++++++++++++++++++++- - arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 36 ++++++++++++++++++++++++ - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 6 +--- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 2 +- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 5 ---- - 5 files changed, 87 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -index acfc572..fc4f347a 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -@@ -11,4 +11,52 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q-sb-fx6x.dtsi" -\ No newline at end of file -+#include "imx6q-sb-fx6x.dtsi" -+ -+/ { -+ i2cmux { -+ compatible = "i2c-mux-gpio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ mux-gpios = <&gpio1 2 0>; -+ i2c-parent = <&i2c1>; -+ -+ i2c@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ pca9555@26 { -+ compatible = "nxp,pca9555"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ reg = <0x26>; -+ }; -+ -+ hx8526@4a { -+ compatible = "himax,himax_ts"; -+ reg = <0x4a>; -+ gpio_intr = <&gpio1 4 0>; -+ }; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ }; -+ -+ i2c@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ dvi: edid@50 { -+ compatible = "fsl,imx6-hdmi-i2c"; -+ reg = <0x50>; -+ }; -+ }; -+ -+ }; -+}; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -index 5a488f8..a6cc8dd 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -@@ -29,4 +29,40 @@ - gpio-key,wakeup; - }; - }; -+ -+ i2cmux { -+ compatible = "i2c-mux-gpio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ mux-gpios = <&gpio1 2 0>; -+ i2c-parent = <&i2c1>; -+ -+ i2c@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ rtc@56 { -+ compatible = "emmicro,em3027"; -+ reg = <0x56>; -+ }; -+ }; -+ -+ i2c@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ dvi: edid@50 { -+ compatible = "fsl,imx6-hdmi-i2c"; -+ reg = <0x50>; -+ }; -+ }; -+ }; - }; -\ No newline at end of file -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -index 9f67b3e..ae70c87 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -@@ -59,11 +59,7 @@ - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -+ status = "disabled"; - }; - - /* mmc */ -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 6f6ad33..4bba196 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -12,7 +12,7 @@ - */ - - /dts-v1/; --#include "imx6q-sb-fx6x.dtsi" -+#include "imx6q-sb-fx6.dtsi" - #include "imx6q-cm-fx6.dtsi" - - / { -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 8afb83d..31d0e8c 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -43,13 +43,8 @@ - }; - }; - -- - &i2c1 { - status = "okay"; -- rtc@56 { -- compatible = "emmicro,em3027"; -- reg = <0x56>; -- }; - }; - - &usdhc3 { --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch deleted file mode 100644 index f5e3b09c..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 23349ee1dfee32db88d3a493fc7c8aaeb8e72868 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 12 Feb 2015 13:49:31 +0200 -Subject: [PATCH 34/59] ARM: i.MX6: dts: add dvi edid GPIOs - -Add dvi edid GPIOs. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -index ae70c87..41237c7 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -@@ -32,6 +32,9 @@ - }; - - &iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; -+ - imx6q-sb-fx6x { - /* pins for i2c1 */ - pinctrl_i2c1: i2c1grp { -@@ -52,6 +55,16 @@ - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - >; - }; -+ -+ /* pins for dvi/ts */ -+ pinctrl_dvi0: dvi0grp { -+ fsl,pins = < -+ /* DVI_DDC_SEL */ -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 -+ /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 -+ >; -+ }; - }; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch deleted file mode 100644 index 45712e58..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch +++ /dev/null @@ -1,114 +0,0 @@ -From db8c584359449958872973912001bd845438c487 Mon Sep 17 00:00:00 2001 -From: Dmitry Lifshitz <lifshitz@compulab.co.il> -Date: Thu, 12 Feb 2015 16:59:53 +0200 -Subject: [PATCH 35/59] video: mxc: IPUv3 fb: restore sync bits - -Freescale framebuffer driver uses some driver-specific -proprietary bits in the sync field (like pixel clock polarity). - -Xorg driver discards unknown sync bits in the fb_var_screeninfo -structure. As the results of dropping the proprietary sync bits -some displays shows various artifacts. - -Fix the bug by hacking mxcfb_set_par() callback. - -Before applying new var parameters, try to find a match in the mode -list, skipping proprietary sync bits (FB_MXC_SYNC_MASK). - -If the entry is found, copy its FB_MXC_SYNC_MASK bits. - -Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - drivers/video/mxc/mxc_ipuv3_fb.c | 38 ++++++++++++++++++++++++++++++++++++++ - include/linux/mxcfb.h | 11 +++++++++++ - 2 files changed, 49 insertions(+) - -diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c -index 1fbfc9d..d24241a 100644 ---- a/drivers/video/mxc/mxc_ipuv3_fb.c -+++ b/drivers/video/mxc/mxc_ipuv3_fb.c -@@ -428,6 +428,28 @@ static bool mxcfb_need_to_set_par(struct fb_info *fbi) - sizeof(struct fb_var_screeninfo)); - } - -+static struct fb_videomode *mxc_match_mode(const struct fb_var_screeninfo *var, -+ struct list_head *head) -+{ -+ struct list_head *pos; -+ struct fb_modelist *modelist; -+ struct fb_videomode *m, mode; -+ -+ fb_var_to_videomode(&mode, var); -+ list_for_each(pos, head) { -+ modelist = list_entry(pos, struct fb_modelist, list); -+ m = &modelist->mode; -+ -+ mode.sync &= ~FB_MXC_SYNC_MASK; -+ mode.sync |= m->sync & FB_MXC_SYNC_MASK; -+ -+ if (fb_mode_is_equal(m, &mode)) -+ return m; -+ } -+ -+ return NULL; -+} -+ - /* - * Set framebuffer parameters and change the operating mode. - * -@@ -583,6 +605,7 @@ static int mxcfb_set_par(struct fb_info *fbi) - - if (!mxc_fbi->overlay) { - uint32_t out_pixel_fmt; -+ struct fb_videomode *sync_mode; - - memset(&sig_cfg, 0, sizeof(sig_cfg)); - if (fbi->var.vmode & FB_VMODE_INTERLACED) -@@ -596,6 +619,21 @@ static int mxcfb_set_par(struct fb_info *fbi) - sig_cfg.Hsync_pol = true; - if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) - sig_cfg.Vsync_pol = true; -+ -+ /* -+ * Try to find matching all parameters, except -+ * FB_MXC_SYNC_MASK bits in the .sync field. -+ */ -+ sync_mode = mxc_match_mode(&fbi->var, &fbi->modelist); -+ /* -+ * If entry exists in the mode list and FB_MXC_SYNC_MASK -+ * bits are empty in the fbi->var.sync (most probably cleared -+ * by the user space application) then copy it from the found -+ * mode list entry. -+ */ -+ if (sync_mode && !(fbi->var.sync & FB_MXC_SYNC_MASK)) -+ fbi->var.sync = sync_mode->sync; -+ - if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL)) - sig_cfg.clk_pol = true; - if (fbi->var.sync & FB_SYNC_DATA_INVERT) -diff --git a/include/linux/mxcfb.h b/include/linux/mxcfb.h -index 67db5ee..e63aa2c 100644 ---- a/include/linux/mxcfb.h -+++ b/include/linux/mxcfb.h -@@ -23,6 +23,17 @@ - - #include <uapi/linux/mxcfb.h> - -+#define FB_SYNC_OE_LOW_ACT 0x80000000 -+#define FB_SYNC_CLK_LAT_FALL 0x40000000 -+#define FB_SYNC_DATA_INVERT 0x20000000 -+#define FB_SYNC_CLK_IDLE_EN 0x10000000 -+#define FB_SYNC_SHARP_MODE 0x08000000 -+#define FB_SYNC_SWAP_RGB 0x04000000 -+ -+#define FB_MXC_SYNC_MASK (FB_SYNC_OE_LOW_ACT | FB_SYNC_CLK_LAT_FALL | \ -+ FB_SYNC_DATA_INVERT | FB_SYNC_CLK_IDLE_EN | \ -+ FB_SYNC_SHARP_MODE | FB_SYNC_SWAP_RGB) -+ - extern struct fb_videomode mxcfb_modedb[]; - extern int mxcfb_modedb_sz; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch deleted file mode 100644 index 12216fc0..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch +++ /dev/null @@ -1,48 +0,0 @@ -From ed1cec186cd961a9d910bfc4817b925173a0081d Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 18 Feb 2015 18:48:26 +0200 -Subject: [PATCH 36/59] ARM: i.MX6: dts: add backlight support for SBC-FX6 - boards - -Add backlight support for SBC-FX6 boards. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 4bba196..5febb69 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -18,6 +18,14 @@ - / { - model = "CompuLab CM-FX6 on SBC-FX6"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; -+ -+ backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm3 0 5000000>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ }; -+ - }; - - &i2c1 { -@@ -26,4 +34,10 @@ - - &usdhc3 { - status = "okay"; --}; -\ No newline at end of file -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3_1>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch deleted file mode 100644 index 523ab659..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch +++ /dev/null @@ -1,70 +0,0 @@ -From fbf61cbe1472b3c719b7cd67c03c0736096dbeb1 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 18 Feb 2015 18:53:01 +0200 -Subject: [PATCH 37/59] ARM: i.MX6: dts: rearrangement of the frame buffers - definitions - -Add a correct frame buffers' definitions -with regard to the board configuration. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 8 -------- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 8 ++++++++ - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 8 ++++++++ - 3 files changed, 16 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 3b1a046..7d39f50 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -524,14 +524,6 @@ - status = "okay"; - }; - --&mxcfb1 { -- status = "okay"; --}; -- --&mxcfb2 { -- status = "okay"; --}; -- - &hdmi_core { - ipu_id = <1>; - disp_id = <0>; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 5febb69..8e7432d 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -41,3 +41,11 @@ - pinctrl-0 = <&pinctrl_pwm3_1>; - status = "okay"; - }; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 31d0e8c..0005eca 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -58,3 +58,11 @@ - fsl,uart-has-rtscts; - status = "okay"; - }; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch deleted file mode 100644 index f2c5823d..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 18d516509c4acc54d0d8b6ce3019d721db81334a Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 11 Feb 2015 18:15:42 +0200 -Subject: [PATCH 38/59] ARM: i.MX6: iomux: raise DSE for display signals - -While drive strength of display signals is configured for 120 Ohm, some -displays exhibit artifacts. -Typical drive strength should be around 50 Ohm. -To fix the the visual artifacts, we raise the drive strength to 48 Ohm. - -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 36 ++++++++++++++++++++++++++++++++++- - 1 file changed, 35 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 7d39f50..9a956ac 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -210,7 +210,7 @@ - disp_id = <0>; - default_ifmt = "RGB24"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ipu1_1>; -+ pinctrl-0 = <&pinctrl_ipu1_lcd>; - status = "okay"; - }; - -@@ -268,6 +268,40 @@ - >; - }; - -+ pinctrl_ipu1_lcd: ipu1grp-lcd { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 -+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 -+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 -+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 -+ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 -+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 -+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 -+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 -+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 -+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 -+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 -+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 -+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 -+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 -+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 -+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 -+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 -+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 -+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 -+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 -+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 -+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 -+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 -+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 -+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 -+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 -+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 -+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 -+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 -+ >; -+ }; -+ - /* pins for spi */ - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch deleted file mode 100644 index a5afa7e2..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 9cc3784253ae0104f22cdd487e6d4065b3308f0b Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 12 Feb 2015 16:54:04 +0200 -Subject: [PATCH 39/59] ARM: i.MX6: cm-fx6: add video mode for KD050C-WVGA - -Add video mode for KD050C-WVGA, update the lcdif_modedb with -the correct parameters for KD050C-WVGA. -Change mode string for second frame buffer. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 1 + - drivers/video/mxc/mxc_lcdif.c | 6 ++++++ - 2 files changed, 7 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 8e7432d..63f91a6 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -47,5 +47,6 @@ - }; - - &mxcfb2 { -+ mode_str ="KD050C-WVGA"; - status = "okay"; - }; -diff --git a/drivers/video/mxc/mxc_lcdif.c b/drivers/video/mxc/mxc_lcdif.c -index d635edd..ae6ac42 100644 ---- a/drivers/video/mxc/mxc_lcdif.c -+++ b/drivers/video/mxc/mxc_lcdif.c -@@ -48,6 +48,12 @@ static struct fb_videomode lcdif_modedb[] = { - FB_SYNC_CLK_LAT_FALL, - FB_VMODE_NONINTERLACED, - 0,}, -+ { -+ /* 800x480 @ 60 Hz , pixel clk @ 32MHz */ -+ "KD050C-WVGA", 60, 800, 480, 30000, 40, 40, 13, 29, 48, 3, -+ FB_SYNC_CLK_LAT_FALL, -+ FB_VMODE_NONINTERLACED, -+ 0,}, - }; - static int lcdif_modedb_sz = ARRAY_SIZE(lcdif_modedb); - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch deleted file mode 100644 index 727512cc..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch +++ /dev/null @@ -1,54 +0,0 @@ -From e3f8a9bf6c298da7919353e364e0873425005033 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 19 Feb 2015 15:45:07 +0200 -Subject: [PATCH 40/59] ARM: i.MX6: cm-fx6: refactor the cm-fx6 iomux - -Move Marvell Power On and Reset GPIOs into a separate group. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 14 ++++++++++---- - 1 file changed, 10 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 9a956ac..412e03b 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -239,9 +239,6 @@ - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 - /* POWER_BUTTON */ - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -- /* WIFI_PWR_RST */ -- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 -- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 - >; - }; - }; -@@ -387,6 +384,15 @@ - >; - }; - -+ /* pins for wifi/bt */ -+ pinctrl_mrvl1: mrvl1grp { -+ fsl,pins = < -+ /* WIFI_PWR_RST */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 -+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 -+ >; -+ }; -+ - /* pins for pcie */ - pinctrl_pcie: pciegrp { - fsl,pins = < -@@ -546,7 +552,7 @@ - /* wifi/bt */ - &usdhc1 { - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc1>; -+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; - non-removable; - vmmc-supply = <&awnh387_npoweron>; - vmmc_aux-supply = <&awnh387_wifi_nreset>; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch deleted file mode 100644 index 11d563c9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 590ff97539070fb89f25337e8123495920f17433 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 15 Jan 2015 12:52:56 +0200 -Subject: [PATCH 41/59] ARM: i.MX6: dts: gpmi: separate kernel and rootfs - -Make separate partitions for kernel and root filesystem on the NAND -flash. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 412e03b..5ca8993 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -486,6 +486,16 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - status = "okay"; -+ -+ partition@0 { -+ label = "linux"; -+ reg = <0x0 0x800000>; -+ }; -+ -+ partition@800000 { -+ label = "rootfs"; -+ reg = < 0x800000 0x0>; -+ }; - }; - - /* i2c3 */ --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch deleted file mode 100644 index 0dccbaa1..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6c5e8a2dc899ae44e3ae1007ec1a1be4c6cb0f86 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 26 Feb 2015 16:45:42 +0200 -Subject: [PATCH 42/59] ARM: dts: cm-fx6: enable can bus - -Enable can bus. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 63f91a6..2432f34 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -50,3 +50,9 @@ - mode_str ="KD050C-WVGA"; - status = "okay"; - }; -+ -+&flexcan1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1_1>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch deleted file mode 100644 index 98eb30d5..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 5439887f65973766007f69f56277bfc7bd50494f Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 25 Feb 2015 20:18:34 +0200 -Subject: [PATCH 43/59] ARM: dts: cm-fx6: add tsc2046 touchscreen support - -Add tsc2046 touchscreen support. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 45 +++++++++++++++++++++++++++++++++++ - 1 file changed, 45 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 5ca8993..704ef4b 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -148,6 +148,13 @@ - vin-supply = <®_sata_nstandby1>; - }; - -+ tsc2046reg: tsc2046-reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "tsc2046-reg"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ - }; - - aliases { -@@ -393,6 +400,14 @@ - >; - }; - -+ /* pins for tsc2046 pendown */ -+ pinctrl_tsc2046: tsc2046grp { -+ fsl,pins = < -+ /* tsc2046 PENDOWN */ -+ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 -+ >; -+ }; -+ - /* pins for pcie */ - pinctrl_pcie: pciegrp { - fsl,pins = < -@@ -471,6 +486,36 @@ - reg = <0x100000 0x100000>; - }; - }; -+ -+ /* touch controller */ -+ touch: tsc2046@1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_tsc2046>; -+ -+ compatible = "ti,tsc2046"; -+ vcc-supply = <&tsc2046reg>; -+ -+ reg = <1>; /* CS1 */ -+ spi-max-frequency = <1500000>; -+ -+ interrupt-parent = <&gpio2>; -+ interrupts = <15 0>; -+ pendown-gpio = <&gpio2 15 0>; -+ -+ ti,x-min = /bits/ 16 <0x0>; -+ ti,x-max = /bits/ 16 <0x0fff>; -+ ti,y-min = /bits/ 16 <0x0>; -+ ti,y-max = /bits/ 16 <0x0fff>; -+ -+ ti,x-plate-ohms = /bits/ 16 <180>; -+ ti,pressure-max = /bits/ 16 <255>; -+ -+ ti,debounce-max = /bits/ 16 <30>; -+ ti,debounce-tol = /bits/ 16 <10>; -+ ti,debounce-rep = /bits/ 16 <1>; -+ -+ linux,wakeup; -+ }; - }; - - /* eth0 */ --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch deleted file mode 100644 index 964db0e9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 6773725e718bd458147b9e66fa1b9edb95f8dd91 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 5 Mar 2015 09:59:32 +0200 -Subject: [PATCH 44/59] ARM: i.MX6: sb-fx6x: refactoring of the usdhc3 - definition - -Add uhs pinctrl state for usdhc3. -This is needed for supporting ultra high speed cards. - -Add cd/wp definitions. -Add a missing property no-1-8-v. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 32 ++++++++++++++++++++++++++++++-- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 1 + - 2 files changed, 31 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -index 41237c7..372a3c1 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -@@ -53,6 +53,30 @@ - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 - >; - }; - -@@ -77,8 +101,12 @@ - - /* mmc */ - &usdhc3 { -- pinctrl-names = "default"; -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 1 0>; -+ no-1-8-v; - vmmc-supply = <®_3p3v>; - status = "disabled"; --}; -\ No newline at end of file -+}; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 2432f34..cd5c011 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -33,6 +33,7 @@ - }; - - &usdhc3 { -+ wp-gpios = <&gpio7 0 0>; - status = "okay"; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch deleted file mode 100644 index 4a523346..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 706e2109599bd2ac09114b5064bc75140e928f2c Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 18 Mar 2015 14:30:49 +0200 -Subject: [PATCH 45/59] ARM: i.MX6: cm-fx6: fix up incorrect compatibilities - -Fix up incorrect compatibilities. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 9 +++------ - 1 file changed, 3 insertions(+), 6 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 704ef4b..8175cee 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -163,8 +163,7 @@ - }; - - sound { -- compatible = "fsl,imx6q-cm-fx6-wm8731", -- "fsl,imx-audio-wm8731"; -+ compatible = "fsl,imx-audio-wm8731"; - model = "wm8731-audio"; - ssi-controller = <&ssi2>; - src-port = <2>; -@@ -174,15 +173,13 @@ - }; - - sound-hdmi { -- compatible = "fsl,imx6q-audio-hdmi", -- "fsl,imx-audio-hdmi"; -+ compatible = "fsl,imx-audio-hdmi"; - model = "imx-audio-hdmi"; - hdmi-controller = <&hdmi_audio>; - }; - - sound-spdif { -- compatible = "fsl,imx-audio-spdif", -- "fsl,imx-sabreauto-spdif"; -+ compatible = "fsl,imx-audio-spdif"; - model = "imx-spdif"; - spdif-controller = <&spdif>; - spdif-out; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch deleted file mode 100644 index bfd151b3..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 1ba89a208ecf8096a1b9a0fd1867d4227e04a1e8 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Sun, 22 Mar 2015 11:15:08 +0200 -Subject: [PATCH 46/59] ARM: i.MX6: dts: fix include file order - -Fix include file order. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 3 ++- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 2 -- - arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 2 -- - arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 4 +--- - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 2 -- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 +++- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 4 +++- - 7 files changed, 9 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index a0e423b..14c2d6a 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -12,9 +12,10 @@ - */ - - /dts-v1/; -+#include "imx6q.dtsi" - #include "imx6q-cm-fx6.dtsi" - - / { - model = "CompuLab CM-FX6"; - compatible = "compulab,cm-fx6", "fsl,imx6q"; --}; -\ No newline at end of file -+}; -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index 8175cee..f53d94e 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -11,8 +11,6 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q.dtsi" -- - / { - memory { - reg = <0x10000000 0x80000000>; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -index fc4f347a..4d030f9 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -@@ -11,8 +11,6 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q-sb-fx6x.dtsi" -- - / { - i2cmux { - compatible = "i2c-mux-gpio"; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -index a6cc8dd..5e6c859 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -@@ -11,8 +11,6 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q-sb-fx6x.dtsi" -- - / { - eth@pcie { - compatible = "intel,i211"; -@@ -65,4 +63,4 @@ - }; - }; - }; --}; -\ No newline at end of file -+}; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -index 372a3c1..01f73ae 100644 ---- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -+++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -@@ -11,8 +11,6 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --#include "imx6q.dtsi" -- - / { - regulators { - compatible = "simple-bus"; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index cd5c011..84a6d23 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -12,8 +12,10 @@ - */ - - /dts-v1/; --#include "imx6q-sb-fx6.dtsi" -+#include "imx6q.dtsi" - #include "imx6q-cm-fx6.dtsi" -+#include "imx6q-sb-fx6x.dtsi" -+#include "imx6q-sb-fx6.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6"; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 0005eca..817da28 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -12,8 +12,10 @@ - */ - - /dts-v1/; --#include "imx6q-sb-fx6m.dtsi" -+#include "imx6q.dtsi" - #include "imx6q-cm-fx6.dtsi" -+#include "imx6q-sb-fx6x.dtsi" -+#include "imx6q-sb-fx6m.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6m"; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch deleted file mode 100644 index 74f249a9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch +++ /dev/null @@ -1,570 +0,0 @@ -From feeb12eb1567043d60246cceb805a28d82d2c78e Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Mar 2015 09:50:04 +0200 -Subject: [PATCH 47/59] ARM: i.MX6: dts: rename the sb-fx6 board files - -In preparation for DL/S support addition, we rename the files to better -describe the content and reuse the same DT code. -Rename the sb-fx6 board files' names - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: added a bit more descriptive commit message] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 60 ----------------- - arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 66 ------------------- - arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 110 -------------------------------- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 +- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 4 +- - arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 60 +++++++++++++++++ - arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi | 66 +++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi | 110 ++++++++++++++++++++++++++++++++ - 8 files changed, 240 insertions(+), 240 deletions(-) - delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6.dtsi - delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6m.dtsi - delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6x.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi - -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -deleted file mode 100644 -index 4d030f9..0000000 ---- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi -+++ /dev/null -@@ -1,60 +0,0 @@ --/* -- * Copyright 2014 CompuLab Ltd. -- * -- * Author: Valentin Raevsky <valentin@compulab.co.il> -- * -- * The code contained herein is licensed under the GNU General Public -- * License. You may obtain a copy of the GNU General Public License -- * Version 2 or later at the following locations: -- * -- * http://www.opensource.org/licenses/gpl-license.html -- * http://www.gnu.org/copyleft/gpl.html -- */ -- --/ { -- i2cmux { -- compatible = "i2c-mux-gpio"; -- #address-cells = <1>; -- #size-cells = <0>; -- mux-gpios = <&gpio1 2 0>; -- i2c-parent = <&i2c1>; -- -- i2c@0 { -- reg = <0>; -- #address-cells = <1>; -- #size-cells = <0>; -- -- pca9555@26 { -- compatible = "nxp,pca9555"; -- gpio-controller; -- #gpio-cells = <2>; -- reg = <0x26>; -- }; -- -- hx8526@4a { -- compatible = "himax,himax_ts"; -- reg = <0x4a>; -- gpio_intr = <&gpio1 4 0>; -- }; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -- -- }; -- -- i2c@1 { -- reg = <1>; -- #address-cells = <1>; -- #size-cells = <0>; -- -- dvi: edid@50 { -- compatible = "fsl,imx6-hdmi-i2c"; -- reg = <0x50>; -- }; -- }; -- -- }; --}; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -deleted file mode 100644 -index 5e6c859..0000000 ---- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi -+++ /dev/null -@@ -1,66 +0,0 @@ --/* -- * Copyright 2014 CompuLab Ltd. -- * -- * Author: Valentin Raevsky <valentin@compulab.co.il> -- * -- * The code contained herein is licensed under the GNU General Public -- * License. You may obtain a copy of the GNU General Public License -- * Version 2 or later at the following locations: -- * -- * http://www.opensource.org/licenses/gpl-license.html -- * http://www.gnu.org/copyleft/gpl.html -- */ -- --/ { -- eth@pcie { -- compatible = "intel,i211"; -- local-mac-address = [FF FF FF FF FF FF]; -- status = "okay"; -- }; -- -- gpio-keys { -- compatible = "gpio-keys"; -- power { -- label = "Power Button"; -- gpios = <&gpio1 29 1>; -- linux,code = <116>; /* KEY_POWER */ -- gpio-key,wakeup; -- }; -- }; -- -- i2cmux { -- compatible = "i2c-mux-gpio"; -- #address-cells = <1>; -- #size-cells = <0>; -- mux-gpios = <&gpio1 2 0>; -- i2c-parent = <&i2c1>; -- -- i2c@0 { -- reg = <0>; -- #address-cells = <1>; -- #size-cells = <0>; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; -- }; -- -- rtc@56 { -- compatible = "emmicro,em3027"; -- reg = <0x56>; -- }; -- }; -- -- i2c@1 { -- reg = <1>; -- #address-cells = <1>; -- #size-cells = <0>; -- -- dvi: edid@50 { -- compatible = "fsl,imx6-hdmi-i2c"; -- reg = <0x50>; -- }; -- }; -- }; --}; -diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -deleted file mode 100644 -index 01f73ae..0000000 ---- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi -+++ /dev/null -@@ -1,110 +0,0 @@ --/* -- * Copyright 2014 CompuLab Ltd. -- * -- * Author: Valentin Raevsky <valentin@compulab.co.il> -- * -- * The code contained herein is licensed under the GNU General Public -- * License. You may obtain a copy of the GNU General Public License -- * Version 2 or later at the following locations: -- * -- * http://www.opensource.org/licenses/gpl-license.html -- * http://www.gnu.org/copyleft/gpl.html -- */ -- --/ { -- regulators { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <0>; -- -- /* regulator for mmc */ -- reg_3p3v: 3p3v { -- compatible = "regulator-fixed"; -- regulator-name = "3P3V"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; -- }; -- --}; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; -- -- imx6q-sb-fx6x { -- /* pins for i2c1 */ -- pinctrl_i2c1: i2c1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for mmc */ -- pinctrl_usdhc3: usdhc3grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 -- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 -- >; -- }; -- -- pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ -- fsl,pins = < -- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 -- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 -- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 -- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 -- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 -- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 -- >; -- }; -- -- pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ -- fsl,pins = < -- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 -- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 -- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 -- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 -- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 -- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 -- >; -- }; -- -- /* pins for dvi/ts */ -- pinctrl_dvi0: dvi0grp { -- fsl,pins = < -- /* DVI_DDC_SEL */ -- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 -- /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ -- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 -- >; -- }; -- }; --}; -- --/* i2c1 */ --&i2c1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c1>; -- status = "disabled"; --}; -- --/* mmc */ --&usdhc3 { -- pinctrl-names = "default", "state_100mhz", "state_200mhz"; -- pinctrl-0 = <&pinctrl_usdhc3>; -- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -- cd-gpios = <&gpio7 1 0>; -- no-1-8-v; -- vmmc-supply = <®_3p3v>; -- status = "disabled"; --}; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 84a6d23..9d31d15 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -14,8 +14,8 @@ - /dts-v1/; - #include "imx6q.dtsi" - #include "imx6q-cm-fx6.dtsi" --#include "imx6q-sb-fx6x.dtsi" --#include "imx6q-sb-fx6.dtsi" -+#include "imx6qdl-sb-fx6x.dtsi" -+#include "imx6qdl-sb-fx6.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6"; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 817da28..a98f1a2 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -14,8 +14,8 @@ - /dts-v1/; - #include "imx6q.dtsi" - #include "imx6q-cm-fx6.dtsi" --#include "imx6q-sb-fx6x.dtsi" --#include "imx6q-sb-fx6m.dtsi" -+#include "imx6qdl-sb-fx6x.dtsi" -+#include "imx6qdl-sb-fx6m.dtsi" - - / { - model = "CompuLab CM-FX6 on SBC-FX6m"; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -new file mode 100644 -index 0000000..4d030f9 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -@@ -0,0 +1,60 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ i2cmux { -+ compatible = "i2c-mux-gpio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ mux-gpios = <&gpio1 2 0>; -+ i2c-parent = <&i2c1>; -+ -+ i2c@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ pca9555@26 { -+ compatible = "nxp,pca9555"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ reg = <0x26>; -+ }; -+ -+ hx8526@4a { -+ compatible = "himax,himax_ts"; -+ reg = <0x4a>; -+ gpio_intr = <&gpio1 4 0>; -+ }; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ }; -+ -+ i2c@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ dvi: edid@50 { -+ compatible = "fsl,imx6-hdmi-i2c"; -+ reg = <0x50>; -+ }; -+ }; -+ -+ }; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi -new file mode 100644 -index 0000000..5e6c859 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi -@@ -0,0 +1,66 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ eth@pcie { -+ compatible = "intel,i211"; -+ local-mac-address = [FF FF FF FF FF FF]; -+ status = "okay"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ power { -+ label = "Power Button"; -+ gpios = <&gpio1 29 1>; -+ linux,code = <116>; /* KEY_POWER */ -+ gpio-key,wakeup; -+ }; -+ }; -+ -+ i2cmux { -+ compatible = "i2c-mux-gpio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ mux-gpios = <&gpio1 2 0>; -+ i2c-parent = <&i2c1>; -+ -+ i2c@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ rtc@56 { -+ compatible = "emmicro,em3027"; -+ reg = <0x56>; -+ }; -+ }; -+ -+ i2c@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ dvi: edid@50 { -+ compatible = "fsl,imx6-hdmi-i2c"; -+ reg = <0x50>; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi -new file mode 100644 -index 0000000..01f73ae ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi -@@ -0,0 +1,110 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for mmc */ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; -+ -+ imx6q-sb-fx6x { -+ /* pins for i2c1 */ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for mmc */ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 -+ >; -+ }; -+ -+ /* pins for dvi/ts */ -+ pinctrl_dvi0: dvi0grp { -+ fsl,pins = < -+ /* DVI_DDC_SEL */ -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 -+ /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 -+ >; -+ }; -+ }; -+}; -+ -+/* i2c1 */ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "disabled"; -+}; -+ -+/* mmc */ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 1 0>; -+ no-1-8-v; -+ vmmc-supply = <®_3p3v>; -+ status = "disabled"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch deleted file mode 100644 index cfa79baf..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch +++ /dev/null @@ -1,243 +0,0 @@ -From a19b8fff6f84ecf1199be3b0a97325a0cab437c5 Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Mar 2015 09:59:54 +0200 -Subject: [PATCH 48/59] ARM: i.MX6: dts: refactor the sbc-fx6 target files - -In preparation for DL/S support addition, we move the common code -to dtsi files for better reuse of the same DT code. -Refactor the sbc-fx6 target files. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: added a bit more descriptive commit message] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6.dts | 42 ++-------------------------- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 47 -------------------------------- - arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 37 +++++++++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi | 47 ++++++++++++++++++++++++++++++++ - 4 files changed, 86 insertions(+), 87 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -index 9d31d15..1234fb3 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts -@@ -18,44 +18,6 @@ - #include "imx6qdl-sb-fx6.dtsi" - - / { -- model = "CompuLab CM-FX6 on SBC-FX6"; -- compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; -- -- backlight { -- compatible = "pwm-backlight"; -- pwms = <&pwm3 0 5000000>; -- brightness-levels = <0 4 8 16 32 64 128 255>; -- default-brightness-level = <7>; -- }; -- --}; -- --&i2c1 { -- status = "okay"; --}; -- --&usdhc3 { -- wp-gpios = <&gpio7 0 0>; -- status = "okay"; --}; -- --&pwm3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_pwm3_1>; -- status = "okay"; --}; -- --&mxcfb1 { -- status = "okay"; --}; -- --&mxcfb2 { -- mode_str ="KD050C-WVGA"; -- status = "okay"; --}; -- --&flexcan1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_flexcan1_1>; -- status = "okay"; -+ model = "CompuLab CM-FX6 on SBC-FX6"; -+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; - }; -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index a98f1a2..19bf948 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -20,51 +20,4 @@ - / { - model = "CompuLab CM-FX6 on SBC-FX6m"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; -- -- iomux_uart2: pinmux@20E0924 { -- compatible = "pinctrl-single"; -- reg = <0x20E0000 0x924>; /* Single register */ -- #address-cells = <1>; -- #size-cells = <0>; -- pinctrl-single,register-width = <32>; -- pinctrl-single,function-mask = <0x4>; -- }; --}; -- --&iomuxc { -- imx6q-sbc-fx6m { -- /* pins for uart2 */ -- pinctrl_uart2: uart2grp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -- MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -- MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -- MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -- >; -- }; -- }; --}; -- --&i2c1 { -- status = "okay"; --}; -- --&usdhc3 { -- status = "okay"; --}; -- --/* rear serial console */ --&uart2 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart2>; -- fsl,uart-has-rtscts; -- status = "okay"; --}; -- --&mxcfb1 { -- status = "okay"; --}; -- --&mxcfb2 { -- status = "okay"; - }; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -index 4d030f9..129e88e 100644 ---- a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -@@ -12,6 +12,13 @@ - */ - - / { -+ backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm3 0 5000000>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ }; -+ - i2cmux { - compatible = "i2c-mux-gpio"; - #address-cells = <1>; -@@ -58,3 +65,33 @@ - - }; - }; -+ -+&i2c1 { -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ wp-gpios = <&gpio7 0 0>; -+ status = "okay"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3_1>; -+ status = "okay"; -+}; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ mode_str ="KD050C-WVGA"; -+ status = "okay"; -+}; -+ -+&flexcan1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1_1>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi -index 5e6c859..5394364 100644 ---- a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi -@@ -12,6 +12,15 @@ - */ - - / { -+ iomux_uart2: pinmux@20E0924 { -+ compatible = "pinctrl-single"; -+ reg = <0x20E0000 0x924>; /* Single register */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ pinctrl-single,register-width = <32>; -+ pinctrl-single,function-mask = <0x4>; -+ }; -+ - eth@pcie { - compatible = "intel,i211"; - local-mac-address = [FF FF FF FF FF FF]; -@@ -64,3 +73,41 @@ - }; - }; - }; -+ -+&iomuxc { -+ imx6q-sbc-fx6m { -+ /* pins for uart2 */ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -+ >; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ status = "okay"; -+}; -+ -+/* rear serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ fsl,uart-has-rtscts; -+ status = "okay"; -+}; -+ -+&mxcfb1 { -+ status = "okay"; -+}; -+ -+&mxcfb2 { -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch deleted file mode 100644 index 0fd11090..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch +++ /dev/null @@ -1,1182 +0,0 @@ -From ae49df750fb2a10cf04fca9854d5faa5f1a3d5a0 Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Mar 2015 10:12:35 +0200 -Subject: [PATCH 49/59] ARM: i.MX6: cm-fx6: separate DL and Quad stuff - -Break down the cm-fx6 file into two files in order to -separate DL and Quad supported features. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: fix available memory size and -rename "dl" to "qdl"] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 553 +------------------------------ - arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 573 +++++++++++++++++++++++++++++++++ - 2 files changed, 575 insertions(+), 551 deletions(-) - create mode 100644 arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -index f53d94e..3a10e5e 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi -@@ -11,75 +11,14 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - --/ { -- memory { -- reg = <0x10000000 0x80000000>; -- }; -- -- leds { -- compatible = "gpio-leds"; -- heartbeat-led { -- label = "Heartbeat"; -- gpios = <&gpio2 31 0>; -- linux,default-trigger = "heartbeat"; -- }; -- }; -+#include "imx6qdl-cm-fx6.dtsi" - -+/ { - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - -- /* regulator for usb otg */ -- reg_usb_otg_vbus: usb_otg_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_otg_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio3 22 0>; -- enable-active-high; -- }; -- -- /* regulator1 for pcie power-on-gpio */ -- pcie_power_on_gpio: regulator-pcie-power-on-gpio { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-pcie-power-on-gpio"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 24 0>; -- enable-active-high; -- }; -- -- /* regulator for usb hub1 */ -- reg_usb_h1_vbus: usb_h1_vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb_h1_vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- gpio = <&gpio7 8 0>; -- enable-active-high; -- }; -- -- /* regulator1 for wifi/bt */ -- awnh387_npoweron: regulator-awnh387-npoweron { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-npoweron"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio7 12 0>; -- enable-active-high; -- }; -- -- /* regulator2 for wifi/bt */ -- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -- compatible = "regulator-fixed"; -- regulator-name = "regulator-awnh387-wifi-nreset"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio6 16 0>; -- startup-delay-us = <10000>; -- }; -- - reg_sata_ldo_en: sata_ldo_en { - compatible = "regulator-fixed"; - regulator-name = "cm_fx6_sata_ldo_en"; -@@ -146,499 +85,11 @@ - vin-supply = <®_sata_nstandby1>; - }; - -- tsc2046reg: tsc2046-reg { -- compatible = "regulator-fixed"; -- regulator-name = "tsc2046-reg"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- }; -- -- }; -- -- aliases { -- mxcfb0 = &mxcfb1; -- mxcfb1 = &mxcfb2; -- }; -- -- sound { -- compatible = "fsl,imx-audio-wm8731"; -- model = "wm8731-audio"; -- ssi-controller = <&ssi2>; -- src-port = <2>; -- ext-port = <4>; -- audio-codec = <&codec>; -- audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; -- }; -- -- sound-hdmi { -- compatible = "fsl,imx-audio-hdmi"; -- model = "imx-audio-hdmi"; -- hdmi-controller = <&hdmi_audio>; -- }; -- -- sound-spdif { -- compatible = "fsl,imx-audio-spdif"; -- model = "imx-spdif"; -- spdif-controller = <&spdif>; -- spdif-out; -- spdif-in; -- }; -- -- mxcfb1: fb@0 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "hdmi"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- mxcfb2: fb@1 { -- compatible = "fsl,mxc_sdc_fb"; -- disp_dev = "lcd"; -- interface_pix_fmt = "RGB24"; -- mode_str ="1920x1080M@60"; -- default_bpp = <32>; -- int_clk = <0>; -- late_init = <0>; -- status = "disabled"; -- }; -- -- lcd@0 { -- compatible = "fsl,lcd"; -- ipu_id = <0>; -- disp_id = <0>; -- default_ifmt = "RGB24"; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ipu1_lcd>; -- status = "okay"; -- }; -- -- v4l2_out { -- compatible = "fsl,mxc_v4l2_output"; -- status = "okay"; -- }; --}; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- /* SATA PWR */ -- MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 -- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 -- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 -- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 -- /* SATA CTRL */ -- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 -- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 -- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 -- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -- /* POWER_BUTTON */ -- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -- >; -- }; -- }; -- -- imx6q-cm-fx6 { -- /* pins for eth0 */ -- pinctrl_enet: enetgrp { -- fsl,pins = < -- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- >; -- }; -- -- pinctrl_ipu1_lcd: ipu1grp-lcd { -- fsl,pins = < -- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 -- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 -- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 -- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 -- MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 -- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 -- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 -- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 -- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 -- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 -- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 -- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 -- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 -- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 -- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 -- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 -- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 -- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 -- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 -- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 -- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 -- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 -- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 -- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 -- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 -- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 -- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 -- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 -- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 -- >; -- }; -- -- /* pins for spi */ -- pinctrl_ecspi1: ecspi1grp { -- fsl,pins = < -- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -- >; -- }; -- -- /* pins for nand */ -- pinctrl_gpmi_nand: gpminandgrp { -- fsl,pins = < -- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -- >; -- }; -- -- /* pins for i2c2 */ -- pinctrl_i2c2: i2c2grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for i2c3 */ -- pinctrl_i2c3: i2c3grp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -- >; -- }; -- -- /* pins for console */ -- pinctrl_uart4: uart4grp { -- fsl,pins = < -- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -- >; -- }; -- -- /* pins for usb hub1 */ -- pinctrl_usbh1: usbh1grp { -- fsl,pins = < -- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -- >; -- }; -- -- /* pins for usb otg */ -- pinctrl_usbotg: usbotggrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -- >; -- }; -- -- /* pins for wifi/bt */ -- pinctrl_usdhc1: usdhc1grp { -- fsl,pins = < -- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -- >; -- }; -- -- /* pins for wifi/bt */ -- pinctrl_mrvl1: mrvl1grp { -- fsl,pins = < -- /* WIFI_PWR_RST */ -- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 -- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 -- >; -- }; -- -- /* pins for tsc2046 pendown */ -- pinctrl_tsc2046: tsc2046grp { -- fsl,pins = < -- /* tsc2046 PENDOWN */ -- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 -- >; -- }; -- -- /* pins for pcie */ -- pinctrl_pcie: pciegrp { -- fsl,pins = < -- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -- >; -- }; -- -- /* pins for spdif */ -- pinctrl_spdif: spdifgrp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -- >; -- }; -- -- /* pins for audmux */ -- pinctrl_audmux: audmuxgrp { -- fsl,pins = < -- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -- /* master mode pin */ -- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -- >; -- }; -- }; --}; -- --&cpu0 { -- operating-points = < -- /* kHz uV */ -- 996000 1250000 -- 852000 1250000 -- 792000 1150000 -- 396000 975000 -- >; -- fsl,soc-operating-points = < -- /* ARM kHz SOC-PU uV */ -- 996000 1250000 -- 852000 1250000 -- 792000 1175000 -- 396000 1175000 -- >; --}; -- --/* spi */ --&ecspi1 { -- fsl,spi-num-chipselects = <2>; -- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_ecspi1>; -- status = "okay"; -- -- flash: m25p80@0 { -- #address-cells = <1>; -- #size-cells = <1>; -- compatible = "st,m25px16", "st,m25p"; -- spi-max-frequency = <20000000>; -- reg = <0>; -- -- partition@0 { -- label = "uboot"; -- reg = <0x0 0xc0000>; -- }; -- -- partition@c0000 { -- label = "uboot environment"; -- reg = <0xc0000 0x40000>; -- }; -- -- partition@100000 { -- label = "reserved"; -- reg = <0x100000 0x100000>; -- }; -- }; -- -- /* touch controller */ -- touch: tsc2046@1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_tsc2046>; -- -- compatible = "ti,tsc2046"; -- vcc-supply = <&tsc2046reg>; -- -- reg = <1>; /* CS1 */ -- spi-max-frequency = <1500000>; -- -- interrupt-parent = <&gpio2>; -- interrupts = <15 0>; -- pendown-gpio = <&gpio2 15 0>; -- -- ti,x-min = /bits/ 16 <0x0>; -- ti,x-max = /bits/ 16 <0x0fff>; -- ti,y-min = /bits/ 16 <0x0>; -- ti,y-max = /bits/ 16 <0x0fff>; -- -- ti,x-plate-ohms = /bits/ 16 <180>; -- ti,pressure-max = /bits/ 16 <255>; -- -- ti,debounce-max = /bits/ 16 <30>; -- ti,debounce-tol = /bits/ 16 <10>; -- ti,debounce-rep = /bits/ 16 <1>; -- -- linux,wakeup; -- }; --}; -- --/* eth0 */ --&fec { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_enet>; -- phy-mode = "rgmii"; -- status = "okay"; --}; -- --/* nand */ --&gpmi { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpmi_nand>; -- status = "okay"; -- -- partition@0 { -- label = "linux"; -- reg = <0x0 0x800000>; -- }; -- -- partition@800000 { -- label = "rootfs"; -- reg = < 0x800000 0x0>; -- }; --}; -- --/* i2c3 */ --&i2c3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c3>; -- status = "okay"; -- -- eeprom@50 { -- compatible = "at24,24c02"; -- reg = <0x50>; -- pagesize = <16>; - }; - -- codec: wm8731@1a { -- compatible = "wlf,wm8731"; -- reg = <0x1a>; -- clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; -- clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; -- AVDD-supply = <&pu_dummy>; -- HPVDD-supply = <&pu_dummy>; -- DCVDD-supply = <&pu_dummy>; -- DBVDD-supply = <&pu_dummy>; -- }; --}; -- --&pcie { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_pcie>; -- reset-gpio = <&gpio1 26 0>; -- vdd-supply = <&pcie_power_on_gpio>; -- status = "okay"; - }; - - /* sata */ - &sata { - status = "okay"; - }; -- --/* console */ --&uart4 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -- status = "okay"; --}; -- --/* usb otg */ --&usbotg { -- vbus-supply = <®_usb_otg_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbotg>; -- dr_mode = "otg"; -- status = "okay"; --}; -- --/* usb hub1 */ --&usbh1 { -- vbus-supply = <®_usb_h1_vbus>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usbh1>; -- status = "okay"; --}; -- --/* wifi/bt */ --&usdhc1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; -- non-removable; -- vmmc-supply = <&awnh387_npoweron>; -- vmmc_aux-supply = <&awnh387_wifi_nreset>; -- status = "okay"; --}; -- --&ssi2 { -- fsl,mode = "i2s-master"; -- status = "okay"; --}; -- --&hdmi_core { -- ipu_id = <1>; -- disp_id = <0>; -- status = "okay"; --}; -- --&hdmi_video { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -- fsl,hdcp; -- status = "okay"; --}; -- --&hdmi_audio { -- status = "okay"; --}; -- --&spdif { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_spdif>; -- status = "okay"; --}; -- --&audmux { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_audmux>; -- status = "okay"; --}; -diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -new file mode 100644 -index 0000000..31086b7 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -@@ -0,0 +1,573 @@ -+/* -+ * Copyright 2014 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ memory { -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ heartbeat-led { -+ label = "Heartbeat"; -+ gpios = <&gpio2 31 0>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* regulator for usb otg */ -+ reg_usb_otg_vbus: usb_otg_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator1 for pcie power-on-gpio */ -+ pcie_power_on_gpio: regulator-pcie-power-on-gpio { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-pcie-power-on-gpio"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 24 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator for usb hub1 */ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio7 8 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator1 for wifi/bt */ -+ awnh387_npoweron: regulator-awnh387-npoweron { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-npoweron"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio7 12 0>; -+ enable-active-high; -+ }; -+ -+ /* regulator2 for wifi/bt */ -+ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { -+ compatible = "regulator-fixed"; -+ regulator-name = "regulator-awnh387-wifi-nreset"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio6 16 0>; -+ startup-delay-us = <10000>; -+ }; -+ -+ tsc2046reg: tsc2046-reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "tsc2046-reg"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ }; -+ -+ aliases { -+ mxcfb0 = &mxcfb1; -+ mxcfb1 = &mxcfb2; -+ }; -+ -+ sound { -+ compatible = "fsl,imx-audio-wm8731"; -+ model = "wm8731-audio"; -+ ssi-controller = <&ssi2>; -+ src-port = <2>; -+ ext-port = <4>; -+ audio-codec = <&codec>; -+ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; -+ }; -+ -+ sound-hdmi { -+ compatible = "fsl,imx-audio-hdmi"; -+ model = "imx-audio-hdmi"; -+ hdmi-controller = <&hdmi_audio>; -+ }; -+ -+ sound-spdif { -+ compatible = "fsl,imx-audio-spdif"; -+ model = "imx-spdif"; -+ spdif-controller = <&spdif>; -+ spdif-out; -+ spdif-in; -+ }; -+ -+ mxcfb1: fb@0 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "hdmi"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ mxcfb2: fb@1 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "lcd"; -+ interface_pix_fmt = "RGB24"; -+ mode_str ="1920x1080M@60"; -+ default_bpp = <32>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ lcd@0 { -+ compatible = "fsl,lcd"; -+ ipu_id = <0>; -+ disp_id = <0>; -+ default_ifmt = "RGB24"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ipu1_lcd>; -+ status = "okay"; -+ }; -+ -+ v4l2_out { -+ compatible = "fsl,mxc_v4l2_output"; -+ status = "okay"; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ /* SATA PWR */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 -+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 -+ /* SATA CTRL */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 -+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 -+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 -+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -+ /* POWER_BUTTON */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -+ >; -+ }; -+ }; -+ -+ imx6q-cm-fx6 { -+ /* pins for eth0 */ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_ipu1_lcd: ipu1grp-lcd { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 -+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 -+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 -+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 -+ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 -+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 -+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 -+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 -+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 -+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 -+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 -+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 -+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 -+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 -+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 -+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 -+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 -+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 -+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 -+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 -+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 -+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 -+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 -+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 -+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 -+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 -+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 -+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 -+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 -+ >; -+ }; -+ -+ /* pins for spi */ -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -+ >; -+ }; -+ -+ /* pins for nand */ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -+ >; -+ }; -+ -+ /* pins for i2c2 */ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for i2c3 */ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ /* pins for console */ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ /* pins for usb hub1 */ -+ pinctrl_usbh1: usbh1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -+ >; -+ }; -+ -+ /* pins for usb otg */ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ >; -+ }; -+ -+ /* pins for wifi/bt */ -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 -+ >; -+ }; -+ -+ /* pins for wifi/bt */ -+ pinctrl_mrvl1: mrvl1grp { -+ fsl,pins = < -+ /* WIFI_PWR_RST */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 -+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 -+ >; -+ }; -+ -+ /* pins for tsc2046 pendown */ -+ pinctrl_tsc2046: tsc2046grp { -+ fsl,pins = < -+ /* tsc2046 PENDOWN */ -+ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 -+ >; -+ }; -+ -+ /* pins for pcie */ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -+ >; -+ }; -+ -+ /* pins for spdif */ -+ pinctrl_spdif: spdifgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 -+ >; -+ }; -+ -+ /* pins for audmux */ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 -+ /* master mode pin */ -+ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points = < -+ /* kHz uV */ -+ 996000 1250000 -+ 852000 1250000 -+ 792000 1150000 -+ 396000 975000 -+ >; -+ fsl,soc-operating-points = < -+ /* ARM kHz SOC-PU uV */ -+ 996000 1250000 -+ 852000 1250000 -+ 792000 1175000 -+ 396000 1175000 -+ >; -+}; -+ -+/* spi */ -+&ecspi1 { -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25px16", "st,m25p"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0x0 0xc0000>; -+ }; -+ -+ partition@c0000 { -+ label = "uboot environment"; -+ reg = <0xc0000 0x40000>; -+ }; -+ -+ partition@100000 { -+ label = "reserved"; -+ reg = <0x100000 0x100000>; -+ }; -+ }; -+ -+ /* touch controller */ -+ touch: tsc2046@1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_tsc2046>; -+ -+ compatible = "ti,tsc2046"; -+ vcc-supply = <&tsc2046reg>; -+ -+ reg = <1>; /* CS1 */ -+ spi-max-frequency = <1500000>; -+ -+ interrupt-parent = <&gpio2>; -+ interrupts = <15 0>; -+ pendown-gpio = <&gpio2 15 0>; -+ -+ ti,x-min = /bits/ 16 <0x0>; -+ ti,x-max = /bits/ 16 <0x0fff>; -+ ti,y-min = /bits/ 16 <0x0>; -+ ti,y-max = /bits/ 16 <0x0fff>; -+ -+ ti,x-plate-ohms = /bits/ 16 <180>; -+ ti,pressure-max = /bits/ 16 <255>; -+ -+ ti,debounce-max = /bits/ 16 <30>; -+ ti,debounce-tol = /bits/ 16 <10>; -+ ti,debounce-rep = /bits/ 16 <1>; -+ -+ linux,wakeup; -+ }; -+}; -+ -+/* eth0 */ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ -+/* nand */ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+ -+ partition@0 { -+ label = "linux"; -+ reg = <0x0 0x800000>; -+ }; -+ -+ partition@800000 { -+ label = "rootfs"; -+ reg = < 0x800000 0x0>; -+ }; -+}; -+ -+/* i2c3 */ -+&i2c3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ codec: wm8731@1a { -+ compatible = "wlf,wm8731"; -+ reg = <0x1a>; -+ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; -+ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; -+ AVDD-supply = <&pu_dummy>; -+ HPVDD-supply = <&pu_dummy>; -+ DCVDD-supply = <&pu_dummy>; -+ DBVDD-supply = <&pu_dummy>; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 26 0>; -+ vdd-supply = <&pcie_power_on_gpio>; -+ status = "okay"; -+}; -+ -+/* console */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ status = "okay"; -+}; -+ -+/* usb otg */ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+/* usb hub1 */ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbh1>; -+ status = "okay"; -+}; -+ -+/* wifi/bt */ -+&usdhc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; -+ non-removable; -+ vmmc-supply = <&awnh387_npoweron>; -+ vmmc_aux-supply = <&awnh387_wifi_nreset>; -+ status = "okay"; -+}; -+ -+&ssi2 { -+ fsl,mode = "i2s-master"; -+ status = "okay"; -+}; -+ -+&hdmi_core { -+ ipu_id = <1>; -+ disp_id = <0>; -+ status = "okay"; -+}; -+ -+&hdmi_video { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -+ fsl,hdcp; -+ status = "okay"; -+}; -+ -+&hdmi_audio { -+ status = "okay"; -+}; -+ -+&spdif { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_spdif>; -+ status = "okay"; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch deleted file mode 100644 index 7c3da0ce..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 7f9cb189d94d973ce8f8211794fc3cb20171ed1a Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Mar 2015 10:15:50 +0200 -Subject: [PATCH 50/59] ARM: i.MX6: dts: add initial support for cm-fx6 DL/S - -Add initial support for cm-fx6 DL/S modules. - -This patch configures: -1) serial console -2) hearbeat led -3) FreeScale NIC -4) pcie -5) Intel I210 NIC -6) Analog audio wm8731-audio - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: fix dtsi file name as per previous patch] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6dl-cm-fx6.dts | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-cm-fx6.dts - -diff --git a/arch/arm/boot/dts/imx6dl-cm-fx6.dts b/arch/arm/boot/dts/imx6dl-cm-fx6.dts -new file mode 100644 -index 0000000..d33d14c ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-cm-fx6.dts -@@ -0,0 +1,21 @@ -+/* -+ * Copyright 2015 CompuLab Ltd. -+ * -+ * Author: Valentin Raevsky <valentin@compulab.co.il> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-cm-fx6.dtsi" -+ -+/ { -+ model = "CompuLab CM-FX6"; -+ compatible = "compulab,cm-fx6", "fsl,imx6dl"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch deleted file mode 100644 index d727345f..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch +++ /dev/null @@ -1,78 +0,0 @@ -From d979cd240d5aae4344c705524d05dbe5792695b4 Mon Sep 17 00:00:00 2001 -From: Igor Grinberg <grinberg@compulab.co.il> -Date: Mon, 23 Mar 2015 10:21:26 +0200 -Subject: [PATCH 51/59] ARM: i.MX6: dts: add board files for sbc-fx6 DL/S - -Add board files for sbc-fx6 DL/S modules and Utilite Value. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> -[grinberg@compulab.co.il: fix dtsi files names as per previous patches] -Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> ---- - arch/arm/boot/dts/imx6dl-sbc-fx6.dts | 23 +++++++++++++++++++++++ - arch/arm/boot/dts/imx6dl-sbc-fx6m.dts | 23 +++++++++++++++++++++++ - 2 files changed, 46 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-sbc-fx6.dts - create mode 100644 arch/arm/boot/dts/imx6dl-sbc-fx6m.dts - -diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts -new file mode 100644 -index 0000000..723b654 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts -@@ -0,0 +1,23 @@ -+/* -+* Copyright 2015 CompuLab Ltd. -+* -+* Author: Valentin Raevsky <valentin@compulab.co.il> -+* -+* The code contained herein is licensed under the GNU General Public -+* License. You may obtain a copy of the GNU General Public License -+* Version 2 or later at the following locations: -+* -+* http://www.opensource.org/licenses/gpl-license.html -+* http://www.gnu.org/copyleft/gpl.html -+*/ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-cm-fx6.dtsi" -+#include "imx6qdl-sb-fx6x.dtsi" -+#include "imx6qdl-sb-fx6.dtsi" -+ -+/ { -+ model = "CompuLab CM-FX6 on SBC-FX6"; -+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6dl"; -+}; -diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts -new file mode 100644 -index 0000000..f66b177 ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts -@@ -0,0 +1,23 @@ -+/* -+* Copyright 2015 CompuLab Ltd. -+* -+* Author: Valentin Raevsky <valentin@compulab.co.il> -+* -+* The code contained herein is licensed under the GNU General Public -+* License. You may obtain a copy of the GNU General Public License -+* Version 2 or later at the following locations: -+* -+* http://www.opensource.org/licenses/gpl-license.html -+* http://www.gnu.org/copyleft/gpl.html -+*/ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-cm-fx6.dtsi" -+#include "imx6qdl-sb-fx6x.dtsi" -+#include "imx6qdl-sb-fx6m.dtsi" -+ -+/ { -+ model = "CompuLab CM-FX6 on SBC-FX6m"; -+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6dl"; -+}; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch deleted file mode 100644 index e219233b..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 82c104998b3e0c8c55c3ddab4d41d8a012e40307 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 23 Mar 2015 11:47:54 +0200 -Subject: [PATCH 52/59] ARM: dts: cm-fx6: add build targets for cm-fx6 flavour - boards. - -Add build targets for cm-fx6 flavour boards. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> - -Conflicts: - - arch/arm/boot/dts/Makefile - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/Makefile | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 699bf8f..0d6813e 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ - imx53-mba53.dtb \ - imx53-qsb.dtb \ - imx53-smd.dtb \ -+ imx6dl-cm-fx6.dtb \ - imx6dl-cubox-i.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-sabreauto.dtb \ -@@ -164,8 +165,11 @@ dtb-$(CONFIG_ARCH_MXC) += \ - imx6dl-sabresd-ldo.dtb \ - imx6dl-sabresd-pf200.dtb \ - imx6dl-sabresd-hdcp.dtb \ -+ imx6dl-sbc-fx6.dtb \ -+ imx6dl-sbc-fx6m.dtb \ - imx6dl-wandboard.dtb \ - imx6q-arm2.dtb \ -+ imx6q-cm-fx6.dtb \ - imx6q-cubox-i.dtb \ - imx6q-phytec-pbab01.dtb \ - imx6q-sabreauto.dtb \ -@@ -179,6 +183,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ - imx6q-sabresd-uart.dtb \ - imx6q-sabresd-hdcp.dtb \ - imx6q-sabresd-ldo.dtb \ -+ imx6q-sbc-fx6.dtb \ -+ imx6q-sbc-fx6m.dtb \ - imx6q-sbc6x.dtb \ - imx6q-udoo.dtb \ - imx6q-wandboard.dtb \ --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch deleted file mode 100644 index 493463e3..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch +++ /dev/null @@ -1,47 +0,0 @@ -From b59a9dad52a2c53b9921d2e8ecb98dd92ee0bd6b Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 25 Mar 2015 17:39:07 +0200 -Subject: [PATCH 53/59] ARM: dts: cm-fx6: change the hdmi_core ipu connection - -Change the hdmi_core ipu connection in order to -allow using the second IPU on quad SBC-FX6 boards with ldb devices. -SBC-FX6m boards still use an IPU per port. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 6 ++++++ - arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 4 ++-- - 2 files changed, 8 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -index 19bf948..dd8c1c0 100644 ---- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -+++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts -@@ -21,3 +21,9 @@ - model = "CompuLab CM-FX6 on SBC-FX6m"; - compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; - }; -+ -+&hdmi_core { -+ ipu_id = <1>; -+ disp_id = <0>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -index 31086b7..4f02e30 100644 ---- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -@@ -544,8 +544,8 @@ - }; - - &hdmi_core { -- ipu_id = <1>; -- disp_id = <0>; -+ ipu_id = <0>; -+ disp_id = <1>; - status = "okay"; - }; - --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch deleted file mode 100644 index 1ac22288..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch +++ /dev/null @@ -1,90 +0,0 @@ -From e8ab6bcb80954c1b7874c288375defe73242458d Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Wed, 25 Mar 2015 17:55:09 +0200 -Subject: [PATCH 54/59] ARM: i.MX6: dts: add ldb support for SBC-FX6 boards - -Add ldb support for SBC-FX6 boards. -LVDS1/0 ports of the SBC-FX6 are configured. -LVDS0 - IPU1:DISP0 - fb3 -LVDS1 - IPU1:DISP1 - fb5 - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 24 ++++++++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 18 ++++++++++++++++++ - 2 files changed, 42 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -index 4f02e30..d17a4d1 100644 ---- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -@@ -92,6 +92,8 @@ - aliases { - mxcfb0 = &mxcfb1; - mxcfb1 = &mxcfb2; -+ mxcfb2 = &mxcfb3; -+ mxcfb3 = &mxcfb4; - }; - - sound { -@@ -140,6 +142,28 @@ - status = "disabled"; - }; - -+ mxcfb3: fb@2 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "ldb"; -+ interface_pix_fmt = "RGB666"; -+ mode_str ="1366x768M-18@60"; -+ default_bpp = <16>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ -+ mxcfb4: fb@3 { -+ compatible = "fsl,mxc_sdc_fb"; -+ disp_dev = "ldb"; -+ interface_pix_fmt = "RGB666"; -+ mode_str ="1280x800M-18@60"; -+ default_bpp = <16>; -+ int_clk = <0>; -+ late_init = <0>; -+ status = "disabled"; -+ }; -+ - lcd@0 { - compatible = "fsl,lcd"; - ipu_id = <0>; -diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -index 129e88e..85836d7 100644 ---- a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi -@@ -90,6 +90,24 @@ - status = "okay"; - }; - -+&mxcfb3 { -+ status = "okay"; -+}; -+ -+&mxcfb4 { -+ status = "okay"; -+}; -+ -+&ldb { -+ ipu_id = <1>; -+ disp_id = <0>; -+ ext_ref = <1>; -+ mode = "sep0"; -+ sec_ipu_id = <1>; -+ sec_disp_id = <1>; -+ status = "okay"; -+}; -+ - &flexcan1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1_1>; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch deleted file mode 100644 index 7abbf958..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 8aa5e04aeeb40323b6f7615b500058c02115d17f Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Mon, 30 Mar 2015 11:29:07 +0300 -Subject: [PATCH 55/59] ARM: dts: cm-fx6: IOMUXC_GPR1/6/7 to set correct - values - -Add IOMUXC_GPR1/6/7 registers to the iomux default pinctrl group. -The IOMUXC_GPR1 register must have default value in order to let the SoC boot up after a warm reboot. -IOMUXC_GPR6/7 registers must have a correct value for the ipu QoS priority. -Otherwise the SoC reports on: -1) the interrupt that is a result of a time out error during a read access via DIx. -2) a new frame starts before the previous end-of-frame event. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -index d17a4d1..cff8d4e 100644 ---- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -@@ -11,6 +11,10 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - -+#define MX6QDL_GPR1 0x04 0x04 0x000 0x0 0x0 -+#define MX6QDL_GPR6 0x18 0x18 0x000 0x0 0x0 -+#define MX6QDL_GPR7 0x1c 0x1c 0x000 0x0 0x0 -+ - / { - memory { - reg = <0x10000000 0x20000000>; -@@ -187,6 +191,10 @@ - hog { - pinctrl_hog: hoggrp { - fsl,pins = < -+ MX6QDL_GPR1 0x48400005 -+ /* ipu3 QoS */ -+ MX6QDL_GPR6 0x007f007f -+ MX6QDL_GPR7 0x007f007f - /* SATA PWR */ - MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 - MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch deleted file mode 100644 index 9e78f041..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch +++ /dev/null @@ -1,30 +0,0 @@ -From cdf878ae149301273767ed4f5052def1529c6cfa Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 9 Apr 2015 13:27:01 +0300 -Subject: [PATCH 56/59] i2c: fix i2c_of include - -The OF helpers have been moved to the core. -As a result the i2c_of.h does not exist anymore. -Fix i2c_of include with respect to the latest core implementation. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - sound/soc/fsl/imx-wm8731.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c -index c0833cf..7248042 100644 ---- a/sound/soc/fsl/imx-wm8731.c -+++ b/sound/soc/fsl/imx-wm8731.c -@@ -16,7 +16,7 @@ - #include <linux/module.h> - #include <linux/of.h> - #include <linux/of_platform.h> --#include <linux/of_i2c.h> -+#include <linux/i2c.h> - #include <linux/clk.h> - #include <sound/soc.h> - #include <sound/pcm_params.h> --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch deleted file mode 100644 index 30ed8bf9..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9388d08644b2397682db8d5cfce894e42e128999 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 9 Apr 2015 13:30:42 +0300 -Subject: [PATCH 57/59] ARM: dts: cm-fx6: fix missing defines - -Fix missing defines that have been changed since 3.10.17 - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 26 +++++++++++++++++++++++++- - 1 file changed, 25 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -index cff8d4e..e8f80bc 100644 ---- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi -@@ -182,6 +182,10 @@ - compatible = "fsl,mxc_v4l2_output"; - status = "okay"; - }; -+ -+ pu_dummy: pudummy_reg { -+ compatible = "fsl,imx6-dummy-pureg"; /* only used in ldo-bypass */ -+ }; - }; - - &iomuxc { -@@ -397,6 +401,26 @@ - MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 - >; - }; -+ -+ pinctrl_hdmi_hdcp: hdmihdcpgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pwm3_1: pwm3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_flexcan1_1: flexcan1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 -+ >; -+ }; - }; - }; - -@@ -583,7 +607,7 @@ - - &hdmi_video { - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; -+ pinctrl-0 = <&pinctrl_hdmi_hdcp>; - fsl,hdcp; - status = "okay"; - }; --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch deleted file mode 100644 index 9caceb04..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 3cb466070695ae9586aa52d668976c590f66008c Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 9 Apr 2015 14:01:38 +0300 -Subject: [PATCH 58/59] imx6: hdmi: add missing definition - -IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -index f6515b5..a5f996f 100644 ---- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -@@ -215,6 +215,7 @@ - #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) - #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI0 (0x2 << 4) - #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI1 (0x3 << 4) -+#define IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT 2 - #define IMX6Q_GPR3_HDMI_MUX_CTL_MASK (0x3 << 2) - #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI0 (0x0 << 2) - #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI1 (0x1 << 2) --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch deleted file mode 100644 index 80f9fe0e..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch +++ /dev/null @@ -1,211 +0,0 @@ -From 2a61f4133182c9c5b63ceb9f73cbc9bbc758c29a Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky <valentin@compulab.co.il> -Date: Thu, 16 Apr 2015 14:55:42 +0300 -Subject: [PATCH 59/59] ARM: i.MX6: cm-fx6: update defconfig - -Update the cm_fx6_defconfig with respect to -the kernel release after applying the 3.10.17 patches. - -Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> ---- - arch/arm/configs/cm_fx6_defconfig | 55 ++++++++++++++++--------------------- - 1 file changed, 24 insertions(+), 31 deletions(-) - -diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig -index 7d753ae..a247438 100644 ---- a/arch/arm/configs/cm_fx6_defconfig -+++ b/arch/arm/configs/cm_fx6_defconfig -@@ -1,3 +1,4 @@ -+CONFIG_LOCALVERSION="-cm-fx6" - CONFIG_KERNEL_LZO=y - CONFIG_SYSVIPC=y - CONFIG_NO_HZ=y -@@ -25,8 +26,8 @@ CONFIG_MACH_EUKREA_CPUIMX51SD=y - CONFIG_SOC_IMX53=y - CONFIG_SOC_IMX6Q=y - CONFIG_SOC_IMX6SL=y -+CONFIG_SOC_IMX6SX=y - CONFIG_SOC_VF610=y --CONFIG_MACH_CM_FX6=y - # CONFIG_SWP_EMULATE is not set - CONFIG_PCI=y - CONFIG_PCI_IMX6=y -@@ -34,16 +35,16 @@ CONFIG_SMP=y - CONFIG_VMSPLIT_2G=y - CONFIG_PREEMPT=y - CONFIG_AEABI=y --# CONFIG_OABI_COMPAT is not set - CONFIG_HIGHMEM=y --CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" -+CONFIG_CMA=y -+CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait" - CONFIG_CPU_FREQ=y - CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y - CONFIG_CPU_FREQ_GOV_POWERSAVE=y - CONFIG_CPU_FREQ_GOV_USERSPACE=y - CONFIG_CPU_FREQ_GOV_ONDEMAND=y - CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y --CONFIG_ARM_IMX6_CPUFREQ=y -+CONFIG_ARM_IMX6Q_CPUFREQ=y - CONFIG_CPU_IDLE=y - CONFIG_VFP=y - CONFIG_NEON=y -@@ -147,8 +148,6 @@ CONFIG_MAC80211=y - CONFIG_DEVTMPFS=y - CONFIG_DEVTMPFS_MOUNT=y - # CONFIG_STANDALONE is not set --CONFIG_CMA=y --CONFIG_CMA_SIZE_MBYTES=320 - CONFIG_IMX_WEIM=y - CONFIG_CONNECTOR=y - CONFIG_MTD=y -@@ -161,7 +160,6 @@ CONFIG_MTD_CFI_AMDSTD=y - CONFIG_MTD_CFI_STAA=y - CONFIG_MTD_PHYSMAP_OF=y - CONFIG_MTD_DATAFLASH=y --CONFIG_MTD_M25P80=y - CONFIG_MTD_SST25L=y - CONFIG_MTD_NAND=y - CONFIG_MTD_NAND_GPMI_NAND=y -@@ -221,7 +219,6 @@ CONFIG_INPUT_MISC=y - CONFIG_INPUT_MMA8450=y - CONFIG_INPUT_ISL29023=y - CONFIG_SERIO_SERPORT=m --CONFIG_VT_HW_CONSOLE_BINDING=y - # CONFIG_LEGACY_PTYS is not set - # CONFIG_DEVKMEM is not set - CONFIG_SERIAL_IMX=y -@@ -229,10 +226,8 @@ CONFIG_SERIAL_IMX_CONSOLE=y - CONFIG_SERIAL_FSL_LPUART=y - CONFIG_SERIAL_FSL_LPUART_CONSOLE=y - CONFIG_FSL_OTP=y --CONFIG_MXS_VIIM=y - # CONFIG_I2C_COMPAT is not set - CONFIG_I2C_CHARDEV=y --CONFIG_I2C_MUX=y - CONFIG_I2C_MUX_GPIO=y - CONFIG_I2C_MUX_PCA954x=y - # CONFIG_I2C_HELPER_AUTO is not set -@@ -259,24 +254,21 @@ CONFIG_MFD_MC13XXX_I2C=y - CONFIG_MFD_MAX17135=y - CONFIG_MFD_SI476X_CORE=y - CONFIG_REGULATOR=y --CONFIG_REGULATOR_DUMMY=y - CONFIG_REGULATOR_FIXED_VOLTAGE=y --CONFIG_REGULATOR_DA9052=y - CONFIG_REGULATOR_ANATOP=y -+CONFIG_REGULATOR_DA9052=y -+CONFIG_REGULATOR_MAX17135=y - CONFIG_REGULATOR_MC13783=y - CONFIG_REGULATOR_MC13892=y --CONFIG_REGULATOR_MAX17135=y - CONFIG_REGULATOR_PFUZE100=y - CONFIG_MEDIA_SUPPORT=y - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_RADIO_SUPPORT=y --CONFIG_VIDEO_V4L2_INT_DEVICE=y - CONFIG_MEDIA_USB_SUPPORT=y - CONFIG_USB_VIDEO_CLASS=m - CONFIG_V4L_PLATFORM_DRIVERS=y - CONFIG_VIDEO_MXC_OUTPUT=y - CONFIG_VIDEO_MXC_CAPTURE=m --CONFIG_VIDEO_MXC_CSI_CAMERA=m - CONFIG_MXC_CAMERA_OV5640=m - CONFIG_MXC_CAMERA_OV5642=m - CONFIG_MXC_CAMERA_OV5640_MIPI=m -@@ -284,13 +276,13 @@ CONFIG_MXC_TVIN_ADV7180=m - CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m - CONFIG_VIDEO_MXC_IPU_OUTPUT=y - CONFIG_VIDEO_MXC_PXP_V4L2=y -+CONFIG_VIDEO_MXC_CSI_CAMERA=m - CONFIG_SOC_CAMERA=y - CONFIG_VIDEO_MX3=y - CONFIG_RADIO_SI476X=y - CONFIG_SOC_CAMERA_OV2640=y - CONFIG_DRM=y - CONFIG_DRM_VIVANTE=y --CONFIG_FB=y - CONFIG_FB_MXS=y - CONFIG_BACKLIGHT_LCD_SUPPORT=y - CONFIG_LCD_CLASS_DEVICE=y -@@ -307,25 +299,20 @@ CONFIG_FB_MXC_EINK_PANEL=y - CONFIG_FB_MXS_SII902X=y - CONFIG_HANNSTAR_CABC=y - CONFIG_FRAMEBUFFER_CONSOLE=y --CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y --CONFIG_FONTS=y --CONFIG_FONT_8x8=y --CONFIG_FONT_8x16=y - CONFIG_LOGO=y - CONFIG_SOUND=y - CONFIG_SND=y - CONFIG_SND_USB_AUDIO=m - CONFIG_SND_SOC=y -+CONFIG_SND_SOC_FSL_ASRC=y -+CONFIG_SND_SOC_FSL_SAI=y -+CONFIG_SND_SOC_FSL_SSI=y -+CONFIG_SND_SOC_FSL_ESAI=y -+CONFIG_SND_SOC_IMX_AUDMUX=y - CONFIG_SND_IMX_SOC=y --CONFIG_SND_SOC_EUKREA_TLV320=y --CONFIG_SND_SOC_IMX_CS42888=y --CONFIG_SND_SOC_IMX_WM8731=y --CONFIG_SND_SOC_IMX_WM8962=y --CONFIG_SND_SOC_IMX_SGTL5000=y - CONFIG_SND_SOC_IMX_SPDIF=y --CONFIG_SND_SOC_IMX_MC13783=y - CONFIG_SND_SOC_IMX_HDMI=y --CONFIG_SND_SOC_IMX_SI476X=y -+CONFIG_SND_SOC_CS42XX8_I2C=y - CONFIG_USB=y - CONFIG_USB_OTG=y - CONFIG_USB_EHCI_HCD=y -@@ -335,7 +322,6 @@ CONFIG_USB_STORAGE=y - CONFIG_USB_CHIPIDEA=y - CONFIG_USB_CHIPIDEA_UDC=y - CONFIG_USB_CHIPIDEA_HOST=y --CONFIG_USB_PHY=y - CONFIG_NOP_USB_XCEIV=y - CONFIG_USB_MXS_PHY=y - CONFIG_USB_GADGET=y -@@ -352,7 +338,6 @@ CONFIG_MMC_SDHCI_PLTFM=y - CONFIG_MMC_SDHCI_ESDHC_IMX=y - CONFIG_MXC_IPU=y - CONFIG_MXC_GPU_VIV=y --CONFIG_MXC_ASRC=y - CONFIG_MXC_MIPI_CSI2=y - CONFIG_MXC_MLB150=m - CONFIG_NEW_LEDS=y -@@ -371,7 +356,13 @@ CONFIG_MXC_PXP_V2=y - CONFIG_IMX_SDMA=y - CONFIG_MXS_DMA=y - CONFIG_STAGING=y --CONFIG_COMMON_CLK_DEBUG=y -+CONFIG_DRM_IMX=y -+CONFIG_DRM_IMX_FB_HELPER=y -+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -+CONFIG_DRM_IMX_LDB=y -+CONFIG_DRM_IMX_IPUV3_CORE=y -+CONFIG_DRM_IMX_IPUV3=y -+CONFIG_DRM_IMX_HDMI=y - # CONFIG_IOMMU_SUPPORT is not set - CONFIG_PWM=y - CONFIG_PWM_IMX=y -@@ -416,7 +407,6 @@ CONFIG_MAGIC_SYSRQ=y - CONFIG_SECURITYFS=y - CONFIG_CRYPTO_USER=y - CONFIG_CRYPTO_TEST=m --CONFIG_CRYPTO_CCM=y - CONFIG_CRYPTO_GCM=y - CONFIG_CRYPTO_CBC=y - CONFIG_CRYPTO_CTS=y -@@ -448,3 +438,6 @@ CONFIG_CRC_CCITT=m - CONFIG_CRC_T10DIF=y - CONFIG_CRC7=m - CONFIG_LIBCRC32C=m -+CONFIG_FONTS=y -+CONFIG_FONT_8x8=y -+CONFIG_FONT_8x16=y --- -1.7.9.5 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb deleted file mode 100644 index 013b7969..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb +++ /dev/null @@ -1,74 +0,0 @@ -require recipes-kernel/linux/linux-imx.inc - -SUMMARY = "CompuLab 3.14.28 kernel" -DESCRIPTION = "Linux kernel for CompuLab cm-fx6 boards." - -DEPENDS += "lzop-native bc-native" - -SRCBRANCH = "imx_3.14.28_1.0.0_ga" -SRCREV = "91cf351a2afc17ac4a260e4d2ad1e32d00925a1b" -LOCALVERSION = "-cm-fx6" - -SRC_URI += "file://defconfig \ - file://0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch \ - file://0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch \ - file://0003-igb-Enable-random-mac-address.patch \ - file://0004-ARM-i.MX6-cm-fx6-update-defconfig.patch \ - file://0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch \ - file://0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch \ - file://0007-ARM-i.MX6-dts-add-SPDIF-support.patch \ - file://0008-ARM-i.MX6-dts-add-Power-Button.patch \ - file://0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch \ - file://0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch \ - file://0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch \ - file://0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch \ - file://0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch \ - file://0014-ARM-i.MX6-dts-add-analog-audio-support.patch \ - file://0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch \ - file://0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch \ - file://0017-ARM-i.MX6-dts-enable-v4l2-output.patch \ - file://0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch \ - file://0019-igb-Define-the-device-mac-address-in-device-tree.patch \ - file://0020-ARM-i.MX6-cm-fx6-update-defconfig.patch \ - file://0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch \ - file://0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch \ - file://0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch \ - file://0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch \ - file://0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch \ - file://0026-ARM-mxs-change-usb-phy-test-clock-gating.patch \ - file://0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch \ - file://0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch \ - file://0029-ARM-i.MX6-dts-change-issd-gpio-order.patch \ - file://0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch \ - file://0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch \ - file://0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch \ - file://0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch \ - file://0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch \ - file://0035-video-mxc-IPUv3-fb-restore-sync-bits.patch \ - file://0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch \ - file://0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch \ - file://0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch \ - file://0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch \ - file://0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch \ - file://0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch \ - file://0042-ARM-dts-cm-fx6-enable-can-bus.patch \ - file://0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch \ - file://0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch \ - file://0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch \ - file://0046-ARM-i.MX6-dts-fix-include-file-order.patch \ - file://0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch \ - file://0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch \ - file://0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch \ - file://0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch \ - file://0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch \ - file://0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch \ - file://0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch \ - file://0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch \ - file://0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch \ - file://0056-i2c-fix-i2c_of-include.patch \ - file://0057-ARM-dts-cm-fx6-fix-missing-defines.patch \ - file://0058-imx6-hdmi-add-missing-definition.patch \ - file://0059-ARM-i.MX6-cm-fx6-update-defconfig.patch \ -" - -COMPATIBLE_MACHINE = "(cm-fx6)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc deleted file mode 100644 index 8d135f01..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc +++ /dev/null @@ -1,21 +0,0 @@ -# Copyright (C) 2013 Marek Vasut <marex@denx.de> -# Released under the MIT license (see COPYING.MIT for the terms) - -SUMMARY = "DENX mainline based Linux kernel" -LICENSE = "GPLv2" -LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7" -DEPENDS += "lzop-native" -PROVIDES = "virtual/kernel linux-mainline" - -inherit kernel - -require recipes-kernel/linux/linux-imx.inc - -# Avoid imx-test installation hacks -IMX_TEST_SUPPORT = "n" - -SRCBRANCH ?= "master" -SRC_URI = "git://git.denx.de/linux-denx.git;branch=${SRCBRANCH} \ - file://defconfig" - -LOCALVERSION = "-master" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig deleted file mode 100644 index 23b29af6..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig +++ /dev/null @@ -1,290 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_KERNEL_LZMA=y -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_LOG_BUF_SHIFT=18 -CONFIG_CGROUPS=y -CONFIG_RELAY=y -CONFIG_EXPERT=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_MXC=y -CONFIG_MACH_MX31LILLY=y -CONFIG_MACH_MX31LITE=y -CONFIG_MACH_PCM037=y -CONFIG_MACH_PCM037_EET=y -CONFIG_MACH_MX31_3DS=y -CONFIG_MACH_MX31MOBOARD=y -CONFIG_MACH_QONG=y -CONFIG_MACH_ARMADILLO5X0=y -CONFIG_MACH_KZM_ARM11_01=y -CONFIG_MACH_PCM043=y -CONFIG_MACH_MX35_3DS=y -CONFIG_MACH_VPR200=y -CONFIG_MACH_IMX51_DT=y -CONFIG_MACH_MX51_BABBAGE=y -CONFIG_MACH_EUKREA_CPUIMX51SD=y -CONFIG_SOC_IMX53=y -CONFIG_SOC_IMX6Q=y -CONFIG_SMP=y -CONFIG_VMSPLIT_2G=y -CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=m -CONFIG_PM_DEBUG=y -CONFIG_PM_TEST_SUSPEND=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_IPV6=y -CONFIG_CAN=y -# CONFIG_CAN_BCM is not set -# CONFIG_CAN_GW is not set -CONFIG_CAN_FLEXCAN=y -# CONFIG_WIRELESS is not set -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_STANDALONE is not set -CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SST25L=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_MXC=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_AT25=y -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_ATA=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_PATA_IMX=y -CONFIG_NETDEVICES=y -# CONFIG_NET_VENDOR_BROADCOM is not set -CONFIG_CS89x0=y -CONFIG_CS89x0_PLATFORM=y -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -CONFIG_SMC91X=y -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_NET_VENDOR_STMICRO is not set -CONFIG_AT803X_PHY=y -CONFIG_AMD_PHY=y -CONFIG_MARVELL_PHY=y -CONFIG_DAVICOM_PHY=y -CONFIG_QSEMI_PHY=y -CONFIG_LXT_PHY=y -CONFIG_CICADA_PHY=y -CONFIG_VITESSE_PHY=y -CONFIG_SMSC_PHY=y -CONFIG_BROADCOM_PHY=y -CONFIG_BCM87XX_PHY=y -CONFIG_ICPLUS_PHY=y -CONFIG_REALTEK_PHY=y -CONFIG_NATIONAL_PHY=y -CONFIG_STE10XP=y -CONFIG_LSI_ET1011C_PHY=y -CONFIG_MICREL_PHY=y -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=800 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_IMX=y -CONFIG_MOUSE_PS2=m -CONFIG_MOUSE_PS2_ELANTECH=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_MC13783=y -CONFIG_TOUCHSCREEN_STMPE=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_MMA8450=y -CONFIG_SERIO_SERPORT=m -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_MXC_RNGA=y -# CONFIG_I2C_COMPAT is not set -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_ALGOPCF=m -CONFIG_I2C_ALGOPCA=m -CONFIG_I2C_IMX=y -CONFIG_SPI=y -CONFIG_SPI_IMX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_MC9S08DZ60=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_IMX2_WDT=y -CONFIG_MFD_STMPE=y -CONFIG_MFD_DA9052_I2C=y -CONFIG_MFD_MC13XXX_SPI=y -CONFIG_MFD_MC13XXX_I2C=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DA9052=y -CONFIG_REGULATOR_MC13783=y -CONFIG_REGULATOR_MC13892=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_SOC_CAMERA=y -CONFIG_VIDEO_MX3=y -CONFIG_SOC_CAMERA_OV2640=y -CONFIG_DRM=y -CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_OF_VIDEOMODE=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_L4F00242T03=y -CONFIG_LCD_PLATFORM=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SEQUENCER=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=y -CONFIG_SND_SOC=y -CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_PHYCORE_AC97=y -CONFIG_SND_SOC_EUKREA_TLV320=y -CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_IMX_MC13783=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_STORAGE=y -CONFIG_USB_MXS_PHY=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_M41T80=y -CONFIG_RTC_DRV_MC13XXX=y -CONFIG_RTC_DRV_MXC=y -CONFIG_DMADEVICES=y -CONFIG_IMX_SDMA=y -CONFIG_MXS_DMA=y -CONFIG_STAGING=y -CONFIG_DRM_IMX=y -CONFIG_DRM_IMX_FB_HELPER=y -CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -CONFIG_DRM_IMX_IPUV3_CORE=y -CONFIG_DRM_IMX_IPUV3=y -CONFIG_COMMON_CLK_DEBUG=y -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_PWM=y -CONFIG_PWM_IMX=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_QUOTA=y -CONFIG_QUOTA_NETLINK_INTERFACE=y -# CONFIG_PRINT_QUOTA_WARNING is not set -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=y -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_FTRACE is not set -# CONFIG_ARM_UNWIND is not set -CONFIG_SECURITYFS=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=m -CONFIG_CRC_T10DIF=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb deleted file mode 100644 index a5328671..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright (C) 2013 Marek Vasut <marex@denx.de> -# Released under the MIT license (see COPYING.MIT for the terms) - -include linux-denx.inc - -# m53evk -SRCREV_m53evk = "7c75b82904fa555ce7988b97619b85a436a8ed12" -SRCBRANCH_m53evk = "m53evk-rel-2013-05-02-v3.9" - -COMPATIBLE_MACHINE = "(m53evk)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19.bbappend new file mode 100644 index 00000000..5621c499 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19.bbappend @@ -0,0 +1,19 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +COMPATIBLE_MACHINE_imx6sl-warp = "(.)" +COMPATIBLE_MACHINE_imx6dl-riotboard = "(.)" + +SRC_URI_append_imx6qdl-variscite-som_use-mainline-bsp = " \ + file://imx6qdl-var-som.dtsi \ + file://imx6q-var-som-vsc.dts \ +" + +SRC_URI_append_ccimx6ul = " \ + file://0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch \ + file://0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch \ + file://0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch \ +" + +do_configure_prepend_imx6qdl-variscite-som() { + cp ${WORKDIR}/imx6*-var*.dts* ${S}/arch/arm/boot/dts +} diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch new file mode 100644 index 00000000..c2b81030 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch @@ -0,0 +1,552 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Fri, 24 Aug 2018 18:53:40 +0200 +Subject: [PATCH] MLK-11719-4: mtd: gpmi: change the BCH layout setting for + large oob NAND +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The cod change updated the NAND driver BCH ECC layout algorithm to +support large oob size NAND chips(oob > 1024 bytes) and proposed a new +way to set ECC layout. + +Current implementation requires each chunk size larger than oob size so +the bad block marker (BBM) can be guaranteed located in data chunk. The +ECC layout always using the unbalanced layout(Ecc for both meta and +Data0 chunk), but for the NAND chips with oob larger than 1k, the driver +cannot support because BCH doesn’t support GF 15 for 2K chunk. + +The change keeps the data chunk no larger than 1k and adjust the ECC +strength or ECC layout to locate the BBM in data chunk. General idea for +large oob NAND chips is + +1.Try all ECC strength from the minimum value required by NAND spec to +the maximum one that works, any ECC makes the BBM locate in data chunk +can be chosen. + +2.If none of them works, using separate ECC for meta, which will add one +extra ecc with the same ECC strength as other data chunks. This extra +ECC can guarantee BBM located in data chunk, of course, we need to check +if oob can afford it. + +Previous code has two methods for ECC layout setting, the +legacy_set_geometry and set_geometry_by_ecc_info, the difference +between these two methods is, legacy_set_geometry set the chunk size +larger chan oob size and then set the maximum ECC strength that oob can +afford. While the set_geometry_by_ecc_info set chunk size and ECC +strength according to NAND spec. It has been proved that the first +method cannot provide safe ECC strength for some modern NAND chips, so +in current code, + +1. Driver read NAND parameters first and then chose the proper ECC +layout setting method. + +2. If the oob is large or NAND required data chunk larger than oob size, +chose set_geometry_for_large_oob, otherwise use set_geometry_by_ecc_info + +3. legacy_set_geometry only used for some NAND chips does not contains +necessary information. So this is only a backup plan, it is NOT +recommended to use these NAND chips. + +Signed-off-by: Han Xu <b45815@freescale.com> +(cherry picked from commit 78e8beff734adb72185405ae2cb55e0097eb96cb) +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c | 16 +- + drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 269 ++++++++++++++++++++++++----- + drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h | 12 +- + 3 files changed, 248 insertions(+), 49 deletions(-) + +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c +index 88ea2203e263..a4cd9523e220 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c +@@ -212,7 +212,8 @@ void gpmi_dump_info(struct gpmi_nand_data *this) + "ECC Strength : %u\n" + "Page Size in Bytes : %u\n" + "Metadata Size in Bytes : %u\n" +- "ECC Chunk Size in Bytes: %u\n" ++ "ECC Chunk0 Size in Bytes: %u\n" ++ "ECC Chunkn Size in Bytes: %u\n" + "ECC Chunk Count : %u\n" + "Payload Size in Bytes : %u\n" + "Auxiliary Size in Bytes: %u\n" +@@ -223,7 +224,8 @@ void gpmi_dump_info(struct gpmi_nand_data *this) + geo->ecc_strength, + geo->page_size, + geo->metadata_size, +- geo->ecc_chunk_size, ++ geo->ecc_chunk0_size, ++ geo->ecc_chunkn_size, + geo->ecc_chunk_count, + geo->payload_size, + geo->auxiliary_size, +@@ -238,7 +240,8 @@ int bch_set_geometry(struct gpmi_nand_data *this) + struct resources *r = &this->resources; + struct bch_geometry *bch_geo = &this->bch_geometry; + unsigned int block_count; +- unsigned int block_size; ++ unsigned int block0_size; ++ unsigned int blockn_size; + unsigned int metadata_size; + unsigned int ecc_strength; + unsigned int page_size; +@@ -250,7 +253,8 @@ int bch_set_geometry(struct gpmi_nand_data *this) + return ret; + + block_count = bch_geo->ecc_chunk_count - 1; +- block_size = bch_geo->ecc_chunk_size; ++ block0_size = bch_geo->ecc_chunk0_size; ++ blockn_size = bch_geo->ecc_chunkn_size; + metadata_size = bch_geo->metadata_size; + ecc_strength = bch_geo->ecc_strength >> 1; + page_size = bch_geo->page_size; +@@ -277,13 +281,13 @@ int bch_set_geometry(struct gpmi_nand_data *this) + | BF_BCH_FLASH0LAYOUT0_META_SIZE(metadata_size) + | BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength, this) + | BF_BCH_FLASH0LAYOUT0_GF(gf_len, this) +- | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size, this), ++ | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block0_size, this), + r->bch_regs + HW_BCH_FLASH0LAYOUT0); + + writel(BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) + | BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength, this) + | BF_BCH_FLASH0LAYOUT1_GF(gf_len, this) +- | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size, this), ++ | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(blockn_size, this), + r->bch_regs + HW_BCH_FLASH0LAYOUT1); + + /* Set *all* chip selects to use layout 0. */ +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +index 1c1ebbc82824..bc4a364e5696 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +@@ -179,6 +179,36 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) + return geo->ecc_strength <= this->devdata->bch_max_ecc_strength; + } + ++static inline bool bbm_in_data_chunk(struct gpmi_nand_data *this, ++ unsigned int *chunk_num) ++{ ++ struct bch_geometry *geo = &this->bch_geometry; ++ struct mtd_info *mtd = &this->nand.mtd; ++ unsigned int i, j; ++ ++ if (geo->ecc_chunk0_size != geo->ecc_chunkn_size) { ++ dev_err(this->dev, "The size of chunk0 must equal to chunkn\n"); ++ return false; ++ } ++ ++ i = (mtd->writesize * 8 - geo->metadata_size * 8) / ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8); ++ ++ j = (mtd->writesize * 8 - geo->metadata_size * 8) - ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8) * i; ++ ++ if (j < geo->ecc_chunkn_size * 8) { ++ *chunk_num = i+1; ++ dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n", ++ geo->ecc_strength, *chunk_num); ++ return true; ++ } ++ ++ return false; ++} ++ + /* + * If we can get the ECC information from the nand chip, we do not + * need to calculate them ourselves. +@@ -207,13 +237,14 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + chip->ecc_strength_ds, chip->ecc_step_ds); + return -EINVAL; + } +- geo->ecc_chunk_size = ecc_step; +- geo->ecc_strength = round_up(ecc_strength, 2); ++ geo->ecc_chunk0_size = chip->ecc_step_ds; ++ geo->ecc_chunkn_size = chip->ecc_step_ds; ++ geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); + if (!gpmi_check_ecc(this)) + return -EINVAL; + + /* Keep the C >= O */ +- if (geo->ecc_chunk_size < mtd->oobsize) { ++ if (geo->ecc_chunkn_size < mtd->oobsize) { + dev_err(this->dev, + "unsupported nand chip. ecc size: %d, oob size : %d\n", + ecc_step, mtd->oobsize); +@@ -223,7 +254,7 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + /* The default value, see comment in the legacy_set_geometry(). */ + geo->metadata_size = 10; + +- geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; + + /* + * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: +@@ -295,6 +326,129 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + return 0; + } + ++static int set_geometry_for_large_oob(struct gpmi_nand_data *this) ++{ ++ struct bch_geometry *geo = &this->bch_geometry; ++ struct mtd_info *mtd = &this->nand.mtd; ++ struct nand_chip *chip = mtd->priv; ++ unsigned int block_mark_bit_offset; ++ unsigned int max_ecc; ++ unsigned int bbm_chunk; ++ unsigned int i; ++ ++ ++ /* sanity check for the minimum ecc nand required */ ++ if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) ++ return -EINVAL; ++ geo->ecc_strength = chip->ecc_strength_ds; ++ ++ /* check if platform can support this nand */ ++ if (!gpmi_check_ecc(this)) { ++ dev_err(this->dev, "unsupported NAND chip, minimum ecc required %d\n" ++ , geo->ecc_strength); ++ return -EINVAL; ++ } ++ ++ /* calculate the maximum ecc platform can support*/ ++ geo->metadata_size = 10; ++ geo->gf_len = 14; ++ geo->ecc_chunk0_size = 1024; ++ geo->ecc_chunkn_size = 1024; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; ++ max_ecc = min(get_ecc_strength(this), ++ this->devdata->bch_max_ecc_strength); ++ ++ /* search a supported ecc strength that makes bbm */ ++ /* located in data chunk */ ++ geo->ecc_strength = chip->ecc_strength_ds; ++ while (!(geo->ecc_strength > max_ecc)) { ++ if (bbm_in_data_chunk(this, &bbm_chunk)) ++ goto geo_setting; ++ geo->ecc_strength += 2; ++ } ++ ++ /* if none of them works, keep using the minimum ecc */ ++ /* nand required but changing ecc page layout */ ++ geo->ecc_strength = chip->ecc_strength_ds; ++ /* add extra ecc for meta data */ ++ geo->ecc_chunk0_size = 0; ++ geo->ecc_chunk_count = (mtd->writesize / geo->ecc_chunkn_size) + 1; ++ geo->ecc_for_meta = 1; ++ /* check if oob can afford this extra ecc chunk */ ++ if (mtd->oobsize * 8 < geo->metadata_size * 8 + ++ geo->gf_len * geo->ecc_strength ++ * geo->ecc_chunk_count) { ++ dev_err(this->dev, "unsupported NAND chip with new layout\n"); ++ return -EINVAL; ++ } ++ ++ /* calculate in which chunk bbm located */ ++ bbm_chunk = (mtd->writesize * 8 - geo->metadata_size * 8 - ++ geo->gf_len * geo->ecc_strength) / ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8) + 1; ++ ++geo_setting: ++ ++ geo->page_size = mtd->writesize + mtd->oobsize; ++ geo->payload_size = mtd->writesize; ++ ++ /* ++ * The auxiliary buffer contains the metadata and the ECC status. The ++ * metadata is padded to the nearest 32-bit boundary. The ECC status ++ * contains one byte for every ECC chunk, and is also padded to the ++ * nearest 32-bit boundary. ++ */ ++ geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); ++ geo->auxiliary_size = ALIGN(geo->metadata_size, 4) ++ + ALIGN(geo->ecc_chunk_count, 4); ++ ++ if (!this->swap_block_mark) ++ return 0; ++ ++ /* calculate the number of ecc chunk behind the bbm */ ++ i = (mtd->writesize / geo->ecc_chunkn_size) - bbm_chunk + 1; ++ ++ block_mark_bit_offset = mtd->writesize * 8 - ++ (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i) ++ + geo->metadata_size * 8); ++ ++ geo->block_mark_byte_offset = block_mark_bit_offset / 8; ++ geo->block_mark_bit_offset = block_mark_bit_offset % 8; ++ ++ dev_dbg(this->dev, "BCH Geometry :\n" ++ "GF length : %u\n" ++ "ECC Strength : %u\n" ++ "Page Size in Bytes : %u\n" ++ "Metadata Size in Bytes : %u\n" ++ "ECC Chunk0 Size in Bytes: %u\n" ++ "ECC Chunkn Size in Bytes: %u\n" ++ "ECC Chunk Count : %u\n" ++ "Payload Size in Bytes : %u\n" ++ "Auxiliary Size in Bytes: %u\n" ++ "Auxiliary Status Offset: %u\n" ++ "Block Mark Byte Offset : %u\n" ++ "Block Mark Bit Offset : %u\n" ++ "Block Mark in chunk : %u\n" ++ "Ecc for Meta data : %u\n", ++ geo->gf_len, ++ geo->ecc_strength, ++ geo->page_size, ++ geo->metadata_size, ++ geo->ecc_chunk0_size, ++ geo->ecc_chunkn_size, ++ geo->ecc_chunk_count, ++ geo->payload_size, ++ geo->auxiliary_size, ++ geo->auxiliary_status_offset, ++ geo->block_mark_byte_offset, ++ geo->block_mark_bit_offset, ++ bbm_chunk, ++ geo->ecc_for_meta); ++ ++ return 0; ++} ++ + static int legacy_set_geometry(struct gpmi_nand_data *this) + { + struct bch_geometry *geo = &this->bch_geometry; +@@ -314,13 +468,15 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) + geo->gf_len = 13; + + /* The default for chunk size. */ +- geo->ecc_chunk_size = 512; +- while (geo->ecc_chunk_size < mtd->oobsize) { +- geo->ecc_chunk_size *= 2; /* keep C >= O */ ++ geo->ecc_chunk0_size = 512; ++ geo->ecc_chunkn_size = 512; ++ while (geo->ecc_chunkn_size < mtd->oobsize) { ++ geo->ecc_chunk0_size *= 2; /* keep C >= O */ ++ geo->ecc_chunkn_size *= 2; /* keep C >= O */ + geo->gf_len = 14; + } + +- geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; + + /* We use the same ECC strength for all chunks. */ + geo->ecc_strength = get_ecc_strength(this); +@@ -409,22 +565,25 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) + + int common_nfc_set_geometry(struct gpmi_nand_data *this) + { +- struct nand_chip *chip = &this->nand; ++ struct mtd_info *mtd = &this->nand.mtd; ++ struct nand_chip *chip = mtd_to_nand(mtd); + +- if (chip->ecc.strength > 0 && chip->ecc.size > 0) +- return set_geometry_by_ecc_info(this, chip->ecc.strength, +- chip->ecc.size); ++ if (chip->ecc_strength_ds > this->devdata->bch_max_ecc_strength) { ++ dev_err(this->dev, ++ "unsupported NAND chip, minimum ecc required %d\n" ++ , chip->ecc_strength_ds); ++ return -EINVAL; ++ } + +- if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) +- || legacy_set_geometry(this)) { +- if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) +- return -EINVAL; ++ if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0) && ++ !(mtd->oobsize > 1024)) ++ return legacy_set_geometry(this); + +- return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, +- chip->ecc_step_ds); +- } ++ if (mtd->oobsize > 1024 || chip->ecc_step_ds < mtd->oobsize) ++ return set_geometry_for_large_oob(this); + +- return 0; ++ return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, ++ chip->ecc_step_ds); + } + + struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) +@@ -997,7 +1156,8 @@ static int gpmi_ecc_read_page_data(struct nand_chip *chip, + + /* Read ECC bytes into our internal raw_buffer */ + offset = nfc_geo->metadata_size * 8; +- offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1); ++ offset += ((8 * nfc_geo->ecc_chunkn_size) + eccbits) * ++ (i + 1); + offset -= eccbits; + bitoffset = offset % 8; + eccbytes = DIV_ROUND_UP(offset + eccbits, 8); +@@ -1034,19 +1194,19 @@ static int gpmi_ecc_read_page_data(struct nand_chip *chip, + if (i == 0) { + /* The first block includes metadata */ + flips = nand_check_erased_ecc_chunk( +- buf + i * nfc_geo->ecc_chunk_size, +- nfc_geo->ecc_chunk_size, +- eccbuf, eccbytes, +- this->auxiliary_virt, +- nfc_geo->metadata_size, +- nfc_geo->ecc_strength); ++ buf + i * nfc_geo->ecc_chunkn_size, ++ nfc_geo->ecc_chunkn_size, ++ eccbuf, eccbytes, ++ this->payload_virt, ++ nfc_geo->metadata_size, ++ nfc_geo->ecc_strength); + } else { + flips = nand_check_erased_ecc_chunk( +- buf + i * nfc_geo->ecc_chunk_size, +- nfc_geo->ecc_chunk_size, +- eccbuf, eccbytes, +- NULL, 0, +- nfc_geo->ecc_strength); ++ buf + i * nfc_geo->ecc_chunkn_size, ++ nfc_geo->ecc_chunkn_size, ++ eccbuf, eccbytes, ++ NULL, 0, ++ nfc_geo->ecc_strength); + } + + if (flips > 0) { +@@ -1134,9 +1294,24 @@ static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, + } + } + ++ /* ++ * if there is an ECC dedicate for meta: ++ * - need to add an extra ECC size when calculating col and page_size, ++ * if the meta size is NOT zero. ++ * ++ * - chunk0 size need to set to the same size as other chunks, ++ * if the meta size is zero. ++ */ ++ + meta = geo->metadata_size; + if (first) { +- col = meta + (size + ecc_parity_size) * first; ++ if (geo->ecc_for_meta) ++ col = meta + ecc_parity_size ++ + (size + ecc_parity_size) * first; ++ else ++ col = meta + (size + ecc_parity_size) * first; ++ ++ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1); + meta = 0; + buf = buf + first * size; + } +@@ -1149,21 +1324,37 @@ static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, + + /* change the BCH registers and bch_geometry{} */ + n = last - first + 1; +- page_size = meta + (size + ecc_parity_size) * n; ++ ++ if (geo->ecc_for_meta && meta) ++ page_size = meta + ecc_parity_size ++ + (size + ecc_parity_size) * n; ++ else ++ page_size = meta + (size + ecc_parity_size) * n; + + r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS | + BM_BCH_FLASH0LAYOUT0_META_SIZE); +- r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1) ++ r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS( ++ (geo->ecc_for_meta && meta) ? n : n - 1) + | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta); ++ ++ /* set chunk0 size if meta size is 0 */ ++ if (!meta) { ++ if (GPMI_IS_MX6(this)) ++ r1_new &= ~MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE; ++ else ++ r1_new &= ~BM_BCH_FLASH0LAYOUT0_DATA0_SIZE; ++ r1_new |= BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(size, this); ++ } + writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0); + + r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE; + r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size); + writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1); + +- geo->ecc_chunk_count = n; ++ geo->ecc_chunk_count = (geo->ecc_for_meta && meta) ? n + 1 : n; + geo->payload_size = n * size; + geo->page_size = page_size; ++ geo->metadata_size = meta; + geo->auxiliary_status_offset = ALIGN(meta, 4); + + dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", +@@ -1386,7 +1577,7 @@ static int gpmi_ecc_read_page_raw(struct mtd_info *mtd, + { + struct gpmi_nand_data *this = nand_get_controller_data(chip); + struct bch_geometry *nfc_geo = &this->bch_geometry; +- int eccsize = nfc_geo->ecc_chunk_size; ++ int eccsize = nfc_geo->ecc_chunkn_size; + int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; + u8 *tmp_buf = this->raw_buffer; + size_t src_bit_off; +@@ -1471,7 +1662,7 @@ static int gpmi_ecc_write_page_raw(struct mtd_info *mtd, + { + struct gpmi_nand_data *this = nand_get_controller_data(chip); + struct bch_geometry *nfc_geo = &this->bch_geometry; +- int eccsize = nfc_geo->ecc_chunk_size; ++ int eccsize = nfc_geo->ecc_chunkn_size; + int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; + u8 *tmp_buf = this->raw_buffer; + uint8_t *oob = chip->oob_poi; +@@ -1847,7 +2038,7 @@ static int gpmi_init_last(struct gpmi_nand_data *this) + ecc->read_oob_raw = gpmi_ecc_read_oob_raw; + ecc->write_oob_raw = gpmi_ecc_write_oob_raw; + ecc->mode = NAND_ECC_HW; +- ecc->size = bch_geo->ecc_chunk_size; ++ ecc->size = bch_geo->ecc_chunkn_size; + ecc->strength = bch_geo->ecc_strength; + mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops); + +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h +index 69cd0cbde4f2..ef4e57256d30 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h +@@ -30,9 +30,9 @@ struct resources { + * @page_size: The size, in bytes, of a physical page, including + * both data and OOB. + * @metadata_size: The size, in bytes, of the metadata. +- * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note +- * the first chunk in the page includes both data and +- * metadata, so it's a bit larger than this value. ++ * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk. ++ * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after ++ * the first chunk in the page. + * @ecc_chunk_count: The number of ECC chunks in the page, + * @payload_size: The size, in bytes, of the payload buffer. + * @auxiliary_size: The size, in bytes, of the auxiliary buffer. +@@ -42,19 +42,23 @@ struct resources { + * which the underlying physical block mark appears. + * @block_mark_bit_offset: The bit offset into the ECC-based page view at + * which the underlying physical block mark appears. ++ * @ecc_for_meta: The flag to indicate if there is a dedicate ecc ++ * for meta. + */ + struct bch_geometry { + unsigned int gf_len; + unsigned int ecc_strength; + unsigned int page_size; + unsigned int metadata_size; +- unsigned int ecc_chunk_size; ++ unsigned int ecc_chunk0_size; ++ unsigned int ecc_chunkn_size; + unsigned int ecc_chunk_count; + unsigned int payload_size; + unsigned int auxiliary_size; + unsigned int auxiliary_status_offset; + unsigned int block_mark_byte_offset; + unsigned int block_mark_bit_offset; ++ unsigned int ecc_for_meta; /* ECC for meta data */ + }; + + /** diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch new file mode 100644 index 00000000..26f6ba89 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch @@ -0,0 +1,113 @@ +From: Anson Huang <Anson.Huang@nxp.com> +Date: Mon, 8 Oct 2018 14:07:34 +0800 +Subject: [PATCH] cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull + +On i.MX6UL/i.MX6ULL, accessing OCOTP directly is wrong because +the ocotp clock needs to be enabled first. Add support for reading +OCOTP through the nvmem API, and keep the old method there to +support old dtb. + +Signed-off-by: Anson Huang <Anson.Huang@nxp.com> +Acked-by: Viresh Kumar <viresh.kumar@linaro.org> +Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +(cherry picked from commit 2733fb0d0699246711cf622e0e2faf02a05b69dc) +--- + drivers/cpufreq/imx6q-cpufreq.c | 52 +++++++++++++++++++++++++++-------------- + 1 file changed, 35 insertions(+), 17 deletions(-) + +diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c +index b2ff423ad7f8..8cfee0ab804b 100644 +--- a/drivers/cpufreq/imx6q-cpufreq.c ++++ b/drivers/cpufreq/imx6q-cpufreq.c +@@ -12,6 +12,7 @@ + #include <linux/cpu_cooling.h> + #include <linux/err.h> + #include <linux/module.h> ++#include <linux/nvmem-consumer.h> + #include <linux/of.h> + #include <linux/of_address.h> + #include <linux/pm_opp.h> +@@ -290,20 +291,32 @@ static void imx6q_opp_check_speed_grading(struct device *dev) + #define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2 + #define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3 + +-static void imx6ul_opp_check_speed_grading(struct device *dev) ++static int imx6ul_opp_check_speed_grading(struct device *dev) + { +- struct device_node *np; +- void __iomem *base; + u32 val; ++ int ret = 0; + +- np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp"); +- if (!np) +- return; ++ if (of_find_property(dev->of_node, "nvmem-cells", NULL)) { ++ ret = nvmem_cell_read_u32(dev, "speed_grade", &val); ++ if (ret) ++ return ret; ++ } else { ++ struct device_node *np; ++ void __iomem *base; ++ ++ np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp"); ++ if (!np) ++ return -ENOENT; ++ ++ base = of_iomap(np, 0); ++ of_node_put(np); ++ if (!base) { ++ dev_err(dev, "failed to map ocotp\n"); ++ return -EFAULT; ++ } + +- base = of_iomap(np, 0); +- if (!base) { +- dev_err(dev, "failed to map ocotp\n"); +- goto put_node; ++ val = readl_relaxed(base + OCOTP_CFG3); ++ iounmap(base); + } + + /* +@@ -314,7 +327,6 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) + * 2b'11: 900000000Hz on i.MX6ULL only; + * We need to set the max speed of ARM according to fuse map. + */ +- val = readl_relaxed(base + OCOTP_CFG3); + val >>= OCOTP_CFG3_SPEED_SHIFT; + val &= 0x3; + +@@ -334,9 +346,7 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) + dev_warn(dev, "failed to disable 900MHz OPP\n"); + } + +- iounmap(base); +-put_node: +- of_node_put(np); ++ return ret; + } + + static int imx6q_cpufreq_probe(struct platform_device *pdev) +@@ -394,10 +404,18 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) + } + + if (of_machine_is_compatible("fsl,imx6ul") || +- of_machine_is_compatible("fsl,imx6ull")) +- imx6ul_opp_check_speed_grading(cpu_dev); +- else ++ of_machine_is_compatible("fsl,imx6ull")) { ++ ret = imx6ul_opp_check_speed_grading(cpu_dev); ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ if (ret) { ++ dev_err(cpu_dev, "failed to read ocotp: %d\n", ++ ret); ++ return ret; ++ } ++ } else { + imx6q_opp_check_speed_grading(cpu_dev); ++ } + + /* Because we have added the OPPs here, we must free them */ + free_opp = true; diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch new file mode 100644 index 00000000..e8c6d16a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch @@ -0,0 +1,38 @@ +From: Anson Huang <Anson.Huang@nxp.com> +Date: Fri, 14 Sep 2018 10:59:21 +0800 +Subject: [PATCH] ARM: dts: imx6ul: use nvmem-cells for cpu speed grading + +On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock +needs to be enabled first, so use the nvmem-cells binding instead. + +Signed-off-by: Anson Huang <Anson.Huang@nxp.com> +Signed-off-by: Shawn Guo <shawnguo@kernel.org> +(cherry picked from commit 92f0eb08c66a73594cf200e65689e767f7f0da5e) +--- + arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi +index 6dc0b569acdf..c670d8e4e0a9 100644 +--- a/arch/arm/boot/dts/imx6ul.dtsi ++++ b/arch/arm/boot/dts/imx6ul.dtsi +@@ -89,6 +89,8 @@ + "pll1_sys"; + arm-supply = <®_arm>; + soc-supply = <®_soc>; ++ nvmem-cells = <&cpu_speed_grade>; ++ nvmem-cell-names = "speed_grade"; + }; + }; + +@@ -932,6 +934,10 @@ + tempmon_temp_grade: temp-grade@20 { + reg = <0x20 4>; + }; ++ ++ cpu_speed_grade: speed-grade@10 { ++ reg = <0x10 4>; ++ }; + }; + + lcdif: lcdif@21c8000 { diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6q-var-som-vsc.dts b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6q-var-som-vsc.dts new file mode 100644 index 00000000..63be949e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6q-var-som-vsc.dts @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Support for Variscite VAR-SOM-MX6 Starter Kit + * + * Copyright 2018 + * Author: Andreas Müller <schnitzeltony@gmail.com> + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-var-som.dtsi" +#include <dt-bindings/input/linux-event-codes.h> + +/ { + model = "Variscite i.MX6 VAR-SOM-MX6"; + compatible = "variscite,var-som", "fsl,imx6q"; + + gpio-keys { /* OK */ + compatible = "gpio-keys"; + autorepeat; + + back { + gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; + linux,code = <KEY_BACK>; + label = "Key Back"; + linux,input-type = <1>; + debounce-interval = <100>; + wakeup-source; + }; + }; + + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "tlv320aic3106-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_codec>; + simple-audio-card,frame-master = <&sound_codec>; + simple-audio-card,widgets = "Headphone", "Headphone Jack", + "Line", "Line In"; + simple-audio-card,routing = "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + + sound_cpu: simple-audio-card,cpu { + sound-dai = <&ssi2>; + }; + + sound_codec: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&clks IMX6QDL_CLK_CKO>; + }; + }; +}; + +&can1 { + status = "okay"; +}; + +&ecspi1 { + cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>, + <&gpio4 10 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { /* OK */ + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&i2c3 { /* OK */ + status = "okay"; + rtc@0x68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; +}; + +/*&ldb { + status = "okay"; + + lvds-channel@1 { + status = "okay"; + + port@4 { + reg = <4>; + + lvds1_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +};*/ + +&pwm2 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usdhc2 { /* OK */ + pinctrl-1 = <&pinctrl_usdhc2cdwp>; + cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&iomuxc { + pinctrl_gpio_keys: gpio_keysgrp { + fsl,pins = < + /* user button */ + MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059 + >; + }; + + pinctrl_usdhc2cdwp: usdhc2cdwpgrp { + fsl,pins = < + /* SDMMC2 CD/WP */ + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; +}; + + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6qdl-var-som.dtsi b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6qdl-var-som.dtsi new file mode 100644 index 00000000..47949d1c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-lts-4.19/imx6qdl-var-som.dtsi @@ -0,0 +1,626 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Support for Variscite SOM Module + * + * Copyright 2018 + * Author: Andreas Müller <schnitzeltony@gmail.com> + * Based on imx6qdl-var-dart.dtsi + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/sound/fsl-imx-audmux.h> + +/ { + memory@10000000 { + reg = <0x10000000 0x40000000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "vwl1807"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <70000>; + }; + + reg_usb_h1_vbus: regulator-usbh1vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_otg_vbus: regulator-usbotgvbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&iomuxc { + pinctrl_audmux: audmux { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + /* Audio Clock */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + /* Audio reset */ + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x178b0 + >; + }; + + pinctrl_bt: bt { + fsl,pins = < + /* Bluetooth / Wifi enable */ + MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 + /* Bluetooth Slow Clock */ + MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x178b0 /* CS */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 + >; + }; + + pinctrl_hdmicec: hdmicecgrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + /* PMIC INT */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9 + >; + }; + + pinctrl_gpmi_nand: gpmi-nand { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + >; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; + + ssi2 { + fsl,audmux-port = <1>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TFSEL(2) | + IMX_AUDMUX_V2_PTCR_TCLKDIR | + IMX_AUDMUX_V2_PTCR_TCSEL(2)) + IMX_AUDMUX_V2_PDCR_RXDSEL(2) + >; + }; + + aud3 { + fsl,audmux-port = <2>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(1) + >; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "disabled"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + status = "disabled"; +}; + +&ecspi3 { + pinctrl-names = "default"; + fsl,spi-num-chipselects = <1>; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio4 24 0>; + status = "disabled"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 0>; + phy-reset-duration=<100>; + status = "disabled"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmicec>; + ddc-i2c-bus = <&i2c2>; + status = "disabled"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "disabled"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic@8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + tlv320aic3106: codec@1b { + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + #sound-dai-cells = <0>; + DRVDD-supply = <®_3p3v>; + AVDD-supply = <®_3p3v>; + IOVDD-supply = <®_3p3v>; + DVDD-supply = <®_3p3v>; + ai3x-ocmv = <0>; + reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + ai3x-gpio-func = < + 0 /* AIC3X_GPIO1_FUNC_DISABLED */ + 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ + >; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "disabled"; +}; + +&pcie { + fsl,tx-swing-full = <103>; + fsl,tx-swing-low = <103>; + reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "disabled"; +}; + +®_arm { + vin-supply = <&sw1a_reg>; +}; + +®_pu { + vin-supply = <&sw1c_reg>; +}; + +®_soc { + vin-supply = <&sw1c_reg>; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&ssi2 { /* Onboard audio */ + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { /* Console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "disabled"; +}; + +&uart2 { /* Bluetooth */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "disabled"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + status = "disabled"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "disabled"; +}; + +&gpmi { /* NAND */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,legacy-bch-geometry; + status = "okay"; + + /* a 2 MiB partition */ + partition@0 { + label = "spl"; + reg = <0x00000000 0x00200000>; + }; + + /* a 2 MiB partition */ + partition@1 { + label = "bootloader"; + reg = <0x00200000 0x00200000>; + }; + + /* an 8 MiB partition */ + partition@2 { + label = "kernel"; + reg = <0x00400000 0x00800000>; + }; + + /* max 1012 MiB partition - truncated automatically */ + partition@3 { + label = "rootfs"; + reg = <0x00c00000 0x3f400000>; + }; +}; + +&usdhc1 { /* eMMC */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + keep-power-in-suspend; + wakeup-source; + non-removable; + status = "okay"; +}; + +&usdhc2 { /* MMC/SD card */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "disabled"; +}; + +&usdhc3 { /* Wilink8 WL18xx*/ + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + + non-removable; + keep-power-in-suspend; + wakeup-source; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + wakeup-source; + keep-power-in-suspend; + cap-power-off-card; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio6>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + ref-clock-frequency = <38400000>; + }; +}; + +&snvs_rtc { + status = "disabled"; +}; diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0001-arm64-dts-lx2160a-add-lx2160acex7-device-tree-build.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0001-arm64-dts-lx2160a-add-lx2160acex7-device-tree-build.patch new file mode 100644 index 00000000..2981aa95 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0001-arm64-dts-lx2160a-add-lx2160acex7-device-tree-build.patch @@ -0,0 +1,27 @@ +From 0038ae610ef69f00adf358d915ae618a83ac63cb Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 4 May 2020 17:33:28 +0300 +Subject: [PATCH] arm64: dts: lx2160a: add lx2160acex7 device tree build + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm64/boot/dts/freescale/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile +index 5e05e0be3aeb..7d342cffb87e 100644 +--- a/arch/arm64/boot/dts/freescale/Makefile ++++ b/arch/arm64/boot/dts/freescale/Makefile +@@ -47,6 +47,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb + dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb + dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb + dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-cex7.dtb + + dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb imx8mm-evk-rpmsg.dtb imx8mm-evk-rm67191.dtb \ + imx8mm-ddr4-evk.dtb imx8mm-evk-root.dtb imx8mm-evk-inmate.dtb \ +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0002-arm64-dts-lx2160a-add-lx2160acex7-device-tree.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0002-arm64-dts-lx2160a-add-lx2160acex7-device-tree.patch new file mode 100644 index 00000000..c834906a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0002-arm64-dts-lx2160a-add-lx2160acex7-device-tree.patch @@ -0,0 +1,225 @@ +From 35dc5b03bb8f7b93fb474c39d7689d39062ff81a Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 28 Jul 2019 14:21:06 +0300 +Subject: [PATCH 2/3] arm64: dts: lx2160a: add lx2160acex7 device tree + +The device tree enables the following features - +1. dpmac17 RGMII MAC connected to Atheros AR8035 phy +2. 2x MDIO busses +3. 2x USB 3.0 controllers +4. 4x SATA ports +5. MT35X 512Mb SPI flash +6. Temperature sensor on i2c0 channel 3 +7. AMC6821 temperature and PWM fan controller + +The module supports AMC6821 and EMC2301 PWM controllers where either can +be assembled, but not both together since the PWM and TACH signals are +shared between them. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + .../boot/dts/freescale/fsl-lx2160a-cex7.dts | 190 ++++++++++++++++++ + 1 file changed, 190 insertions(+) + create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts + +diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +new file mode 100644 +index 000000000000..872fcf9e724d +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +@@ -0,0 +1,190 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++// ++// Device Tree file for LX2160A-CEx7 ++// ++// Copyright 2019 SolidRun ltd. ++ ++/dts-v1/; ++ ++#include "fsl-lx2160a.dtsi" ++ ++/ { ++ model = "SolidRun LX2160A COM express type 7 module"; ++ compatible = "fsl,lx2160a-cex7", "fsl,lx2160a"; ++ ++ aliases { ++ crypto = &crypto; ++ serial0 = &uart0; ++ serial1 = &uart1; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ sb_3v3: regulator-sb3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "RT7290"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&esdhc0 { ++ sd-uhs-sdr104; ++ sd-uhs-sdr50; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ status = "okay"; ++}; ++ ++&esdhc1 { ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ bus-width = <8>; ++ status = "okay"; ++}; ++ ++ ++/* ++i2c busses are - ++/dev/i2c0 - CTRL #0 - connected to PCA9547 I2C switch ++/dev/i2c1 - CTRL #2 - COM module to carrier (general I2C_CK/I2C_DAT) ++/dev/i2c2 - CTRL #4 - Connected to RTC PCF2129AT (0x51), EEPROM (0x54,0x55,0x56,0x57) ++ ++I2C switch - ++/dev/i2c3 - CH0 - SO-DIMMs SPD (0x51, 0x53), 2Kb EEPROM (0x57), bootable 512Kb eeprom (0x50) ++/dev/i2c4 - CH1 - 100MHz clk gen (address 0x6a) ++/dev/i2c5 - CH2 - LTC3882 DC-DC controller on 0x63 ++/dev/i2c6 - CH3 - SA56004ED (0x4c), SA56004FD (0x4d), COM module SMB_CK,SMB_DAT and COM module 10G_LED_SDA,10G_LED_SCL ++/dev/i2c7 - CH4 - SFP #0 I2C ++/dev/i2c8 - CH5 - SFP #1 I2C ++/dev/i2c9 - CH6 - SFP #2 I2C ++/dev/i2c10 - CH7 - SFP #3 I2C ++ ++ ++*/ ++ ++ ++ ++&i2c0 { ++ status = "okay"; ++ ++ i2c-mux@77 { ++ compatible = "nxp,pca9547"; ++ reg = <0x77>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ i2c@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x1>; ++ fan-temperature-ctrlr@18 { ++ compatible = "ti,amc6821"; ++ reg = <0x18>; ++ cooling-min-state = <0>; ++ cooling-max-state = <9>; ++ #cooling-cells = <2>; ++ }; ++ }; ++ i2c@3 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x3>; ++ ++ temperature-sensor@48 { ++ compatible = "nxp,sa56004"; ++ reg = <0x48>; ++ vcc-supply = <&sb_3v3>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ ++ rtc@51 { ++ compatible = "nxp,pcf2129"; ++ reg = <0x51>; ++ // IRQ10_B ++ interrupts = <0 150 0x4>; ++ }; ++}; ++ ++&fspi { ++ status = "okay"; ++ flash0: mt35xu512aba@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "micron,m25p80"; ++ m25p,fast-read; ++ spi-max-frequency = <50000000>; ++ reg = <0>; ++ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ ++ spi-rx-bus-width = <8>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; ++ ++&usb1 { ++ status = "okay"; ++}; ++ ++&emdio1 { ++ status = "okay"; ++ rgmii_phy1: ethernet-phy@1 { ++ /* AR8035 PHY - "compatible" property not strictly needed */ ++ compatible = "ethernet-phy-id004d.d072"; ++ reg = <0x1>; ++ /* Poll mode - no "interrupts" property defined */ ++ }; ++}; ++ ++&emdio2 { ++ status = "okay"; ++}; ++ ++&dpmac17 { ++ phy-handle = <&rgmii_phy1>; ++ phy-connection-type = "rgmii-id"; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "okay"; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&sata3 { ++ status = "okay"; ++}; +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0005-arm64-dts-lx2160a-cex7-add-ltc3882-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0005-arm64-dts-lx2160a-cex7-add-ltc3882-support.patch new file mode 100644 index 00000000..2619e9e6 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0005-arm64-dts-lx2160a-cex7-add-ltc3882-support.patch @@ -0,0 +1,39 @@ +From cca2439ac83136b9ed85f8519931018d4f5385e6 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 12 Jan 2020 14:24:47 +0200 +Subject: [PATCH] arm64: dts: lx2160a-cex7: add ltc3882 support + +ltc3882 is lx2 cortex-a72 core voltage. +this patch adds it to the device tree support; the driver is in +drivers/hwmon/pmbus/ltc2978.c + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +index 872fcf9e724d..1c1a0d47897d 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +@@ -94,6 +94,15 @@ I2C switch - + #cooling-cells = <2>; + }; + }; ++ i2c@2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x2>; ++ ltc3882@5c { ++ compatible = "ltc3882"; ++ reg = <0x5c>; ++ }; ++ }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0006-arm64-dts-lx2160a-cex7-add-on-module-eeproms.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0006-arm64-dts-lx2160a-cex7-add-on-module-eeproms.patch new file mode 100644 index 00000000..46a97d34 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0006-arm64-dts-lx2160a-cex7-add-on-module-eeproms.patch @@ -0,0 +1,54 @@ +From 05acb6ecc8eb7426c4664a1e8fd22ad69256d541 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Sun, 26 Jan 2020 15:36:07 +0200 +Subject: [PATCH] arm64: dts: lx2160a-cex7: add on-module eeproms + +This patch adds 4 eeprom support on i2c mux channel #0 - +1. Bootable 512Kbit eeprom at address 0x50. +2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53. +3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing +data. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + .../boot/dts/freescale/fsl-lx2160a-cex7.dts | 22 ++++++++++++++++++- + 1 file changed, 21 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +index 1c1a0d47897d..2b8f1118b37a 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts +@@ -81,7 +81,27 @@ I2C switch - + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; +- ++ i2c@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0>; ++ 24aa512@50 { ++ compatible = "atmel,24c512"; ++ reg = <0x50>; ++ }; ++ spd1@51 { ++ compatible = "atmel,spd"; ++ reg = <0x51>; ++ }; ++ spd2@53 { ++ compatible = "atmel,spd"; ++ reg = <0x53>; ++ }; ++ m24c02@57 { ++ compatible = "atmel,24c02"; ++ reg = <0x57>; ++ }; ++ }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0007-pci-hotplug-declare-IDT-bridge-as-hotpluggabl-bridge.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0007-pci-hotplug-declare-IDT-bridge-as-hotpluggabl-bridge.patch new file mode 100644 index 00000000..f60f6c1f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0007-pci-hotplug-declare-IDT-bridge-as-hotpluggabl-bridge.patch @@ -0,0 +1,27 @@ +From 927a01dffed9eb439bc9bf6df0b6548380bc84a7 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Mon, 10 Feb 2020 10:47:45 +0200 +Subject: [PATCH] pci: hotplug: declare IDT bridge as hotpluggabl bridge + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + drivers/pci/quirks.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 55870dd42b4d..bfac025931e0 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -2915,6 +2915,7 @@ static void quirk_hotplug_bridge(struct pci_dev *dev) + dev->is_hotplug_bridge = 1; + } + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0020, quirk_hotplug_bridge); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IDT, 0x808c, quirk_hotplug_bridge); + + /* + * This is a quirk for the Ricoh MMC controller found as a part of some +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0008-pci-spr2803-quirk-to-fix-class-ID.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0008-pci-spr2803-quirk-to-fix-class-ID.patch new file mode 100644 index 00000000..3a581a07 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq-lx2160acex7/0008-pci-spr2803-quirk-to-fix-class-ID.patch @@ -0,0 +1,41 @@ +From bba6ebb2daac17bd2268c97b7255e477c2b15b52 Mon Sep 17 00:00:00 2001 +From: Rabeeh Khoury <rabeeh@solid-run.com> +Date: Wed, 26 Feb 2020 17:57:54 +0200 +Subject: [PATCH] pci: spr2803: quirk to fix class ID + +spr2803 class is 0x0, this quirk modifies that to multimedia class in +order to allocate memory to it's bars. + +Upstream-Status: Inappropriate [Solid-Run BSP] + +Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> +--- + drivers/pci/quirks.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 28c64f84bfe7..4ddf7e43d531 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3068,6 +3068,18 @@ static void fixup_ti816x_class(struct pci_dev *dev) + DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800, + PCI_CLASS_NOT_DEFINED, 8, fixup_ti816x_class); + ++static void fixup_spr2803_class(struct pci_dev *dev) ++{ ++ u32 class = dev->class; ++ ++ /* spr2803 does not have class code */ ++ dev->class = PCI_CLASS_MULTIMEDIA_VIDEO << 8; ++ pci_info(dev, "PCI class overridden (%#08x -> %#08x)\n", ++ class, dev->class); ++} ++DECLARE_PCI_FIXUP_CLASS_EARLY(0x1e00, 0x2803, ++ PCI_CLASS_NOT_DEFINED, 8, fixup_spr2803_class); ++ + /* + * Some PCIe devices do not work reliably with the claimed maximum + * payload size supported. +-- +2.17.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq_5.4.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq_5.4.bbappend new file mode 100644 index 00000000..40455572 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc-qoriq_5.4.bbappend @@ -0,0 +1 @@ +require linux-lx2160acex7.inc diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-ARM-dts-imx6ul-ccimx6ulsom-Add-empty-wireless-and-bl.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-ARM-dts-imx6ul-ccimx6ulsom-Add-empty-wireless-and-bl.patch new file mode 100644 index 00000000..4c514088 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-ARM-dts-imx6ul-ccimx6ulsom-Add-empty-wireless-and-bl.patch @@ -0,0 +1,32 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Fri, 14 Sep 2018 12:32:41 +0200 +Subject: [PATCH] ARM: dts: imx6ul: ccimx6ulsom: Add empty wireless and + bluetooth placeholders + +The vendor provided U-Boot will use these empty nodes to populate the +MAC addresses used for both the Bluetooth and the Wireless chips. + +Upstream-Status: Inappropriate [vendor specific] + +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi b/arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi +index b5781c3656d1..82fa176bf138 100644 +--- a/arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi ++++ b/arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi +@@ -24,6 +24,12 @@ + linux,cma-default; + }; + }; ++ ++ bluetooth { ++ }; ++ ++ wireless { ++ }; + }; + + &adc1 { diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-net-wireless-Export-regulatory_hint_user.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-net-wireless-Export-regulatory_hint_user.patch new file mode 100644 index 00000000..82445247 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-net-wireless-Export-regulatory_hint_user.patch @@ -0,0 +1,77 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Mon, 10 Sep 2018 13:38:40 +0200 +Subject: [PATCH] net: wireless: Export regulatory_hint_user() + +The QCA6564 driver makes use of this kernel API when built with +the QCA_VENDOR_KERNEL flag. + +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + include/net/cfg80211.h | 26 ++++++++++++++++++++++++++ + net/wireless/reg.c | 1 + + net/wireless/reg.h | 3 --- + 3 files changed, 27 insertions(+), 3 deletions(-) + +diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h +index e0c41eb1c860..84d47ac0cea4 100644 +--- a/include/net/cfg80211.h ++++ b/include/net/cfg80211.h +@@ -5111,6 +5111,32 @@ int regulatory_set_wiphy_regd_sync_rtnl(struct wiphy *wiphy, + struct ieee80211_regdomain *rd); + + /** ++ * regulatory_hint_user - hint to the wireless core a regulatory domain ++ * which the driver has received from an application ++ * @alpha2: the ISO/IEC 3166 alpha2 the driver claims its regulatory domain ++ * should be in. If @rd is set this should be NULL. Note that if you ++ * set this to NULL you should still set rd->alpha2 to some accepted ++ * alpha2. ++ * @user_reg_hint_type: the type of user regulatory hint. ++ * ++ * Wireless drivers can use this function to hint to the wireless core ++ * the current regulatory domain as specified by trusted applications, ++ * it is the driver's responsibilty to estbalish which applications it ++ * trusts. ++ * ++ * The wiphy should be registered to cfg80211 prior to this call. ++ * For cfg80211 drivers this means you must first use wiphy_register(), ++ * for mac80211 drivers you must first use ieee80211_register_hw(). ++ * ++ * Drivers should check the return value, its possible you can get ++ * an -ENOMEM or an -EINVAL. ++ * ++ * Return: 0 on success. -ENOMEM, -EINVAL. ++ */ ++int regulatory_hint_user(const char *alpha2, ++ enum nl80211_user_reg_hint_type user_reg_hint_type); ++ ++/** + * wiphy_apply_custom_regulatory - apply a custom driver regulatory domain + * @wiphy: the wireless device we want to process the regulatory domain on + * @regd: the custom regulatory domain to use for this wiphy +diff --git a/net/wireless/reg.c b/net/wireless/reg.c +index dd58b9909ac9..816a8a25b06f 100644 +--- a/net/wireless/reg.c ++++ b/net/wireless/reg.c +@@ -2912,6 +2912,7 @@ int regulatory_hint_user(const char *alpha2, + + return 0; + } ++EXPORT_SYMBOL(regulatory_hint_user); + + int regulatory_hint_indoor(bool is_indoor, u32 portid) + { +diff --git a/net/wireless/reg.h b/net/wireless/reg.h +index 9ceeb5f3a7cb..92de47dec466 100644 +--- a/net/wireless/reg.h ++++ b/net/wireless/reg.h +@@ -31,9 +31,6 @@ bool is_world_regdom(const char *alpha2); + bool reg_supported_dfs_region(enum nl80211_dfs_regions dfs_region); + enum nl80211_dfs_regions reg_get_dfs_region(struct wiphy *wiphy); + +-int regulatory_hint_user(const char *alpha2, +- enum nl80211_user_reg_hint_type user_reg_hint_type); +- + /** + * regulatory_hint_indoor - hint operation in indoor env. or not + * @is_indoor: if true indicates that user space thinks that the diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0004-net-wireless-Allow-for-firmware-to-handle-DFS.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0004-net-wireless-Allow-for-firmware-to-handle-DFS.patch new file mode 100644 index 00000000..aad7623f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0004-net-wireless-Allow-for-firmware-to-handle-DFS.patch @@ -0,0 +1,62 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Fri, 7 Sep 2018 13:12:14 +0200 +Subject: [PATCH] net: wireless: Allow for firmware to handle DFS + +The QCA6564 driver makes use of this functionality when compiled with +the QCA_VENDOR_KERNEL flag. + +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + include/net/cfg80211.h | 2 ++ + net/wireless/chan.c | 3 ++- + net/wireless/nl80211.c | 3 +++ + 3 files changed, 7 insertions(+), 1 deletion(-) + +diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h +index 84d47ac0cea4..3082f6bf047d 100644 +--- a/include/net/cfg80211.h ++++ b/include/net/cfg80211.h +@@ -3740,6 +3740,7 @@ struct cfg80211_ops { + * beaconing mode (AP, IBSS, Mesh, ...). + * @WIPHY_FLAG_HAS_STATIC_WEP: The device supports static WEP key installation + * before connection. ++ * @WIPHY_FLAG_DFS_OFFLOAD: The driver handles all the DFS related operations. + */ + enum wiphy_flags { + /* use hole at 0 */ +@@ -3766,6 +3767,7 @@ enum wiphy_flags { + WIPHY_FLAG_SUPPORTS_5_10_MHZ = BIT(22), + WIPHY_FLAG_HAS_CHANNEL_SWITCH = BIT(23), + WIPHY_FLAG_HAS_STATIC_WEP = BIT(24), ++ WIPHY_FLAG_DFS_OFFLOAD = BIT(25), + }; + + /** +diff --git a/net/wireless/chan.c b/net/wireless/chan.c +index 7dc1bbd0888f..2ef1f908408f 100644 +--- a/net/wireless/chan.c ++++ b/net/wireless/chan.c +@@ -321,7 +321,8 @@ static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy, + if (!c) + return -EINVAL; + +- if (c->flags & IEEE80211_CHAN_RADAR) ++ if ((c->flags & IEEE80211_CHAN_RADAR) && ++ !(wiphy->flags & WIPHY_FLAG_DFS_OFFLOAD)) + return 1; + } + return 0; +diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c +index d91a408db113..930670ccfa59 100644 +--- a/net/wireless/nl80211.c ++++ b/net/wireless/nl80211.c +@@ -7956,6 +7956,9 @@ static int nl80211_start_radar_detection(struct sk_buff *skb, + if (netif_carrier_ok(dev)) + return -EBUSY; + ++ if (rdev->wiphy.flags & WIPHY_FLAG_DFS_OFFLOAD) ++ return -EOPNOTSUPP; ++ + if (wdev->cac_started) + return -EBUSY; + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0005-net-wireless-Add-cfg80211_is_gratuitous_arp_unsolici.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0005-net-wireless-Add-cfg80211_is_gratuitous_arp_unsolici.patch new file mode 100644 index 00000000..fbf1135e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0005-net-wireless-Add-cfg80211_is_gratuitous_arp_unsolici.patch @@ -0,0 +1,95 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Fri, 7 Sep 2018 13:01:54 +0200 +Subject: [PATCH] net: wireless: Add + cfg80211_is_gratuitous_arp_unsolicited_na() + +The QCA6564 driver makes use of this call when compiled with the +QCA_VENDOR_KERNEL flag. + +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + include/net/cfg80211.h | 10 ++++++++++ + net/wireless/util.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 62 insertions(+) + +diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h +index 3082f6bf047d..42445bd1c26a 100644 +--- a/include/net/cfg80211.h ++++ b/include/net/cfg80211.h +@@ -6736,6 +6736,16 @@ void cfg80211_crit_proto_stopped(struct wireless_dev *wdev, gfp_t gfp); + unsigned int ieee80211_get_num_supported_channels(struct wiphy *wiphy); + + /** ++ * cfg80211_is_gratuitous_arp_unsolicited_na - packet is grat. ARP/unsol. NA ++ * @skb: the input packet, must be an ethernet frame already ++ * ++ * Return: %true if the packet is a gratuitous ARP or unsolicited NA packet. ++ * This is used to drop packets that shouldn't occur because the AP implements ++ * a proxy service. ++ */ ++bool cfg80211_is_gratuitous_arp_unsolicited_na(struct sk_buff *skb); ++ ++/** + * cfg80211_check_combinations - check interface combinations + * + * @wiphy: the wiphy +diff --git a/net/wireless/util.c b/net/wireless/util.c +index ec30e3732c7b..abcefae39e81 100644 +--- a/net/wireless/util.c ++++ b/net/wireless/util.c +@@ -2061,3 +2061,55 @@ int ieee80211_get_vht_max_nss(struct ieee80211_vht_cap *cap, + return max_vht_nss; + } + EXPORT_SYMBOL(ieee80211_get_vht_max_nss); ++ ++bool cfg80211_is_gratuitous_arp_unsolicited_na(struct sk_buff *skb) ++{ ++ const struct ethhdr *eth = (void *)skb->data; ++ ++ const struct { ++ struct arphdr hdr; ++ u8 ar_sha[ETH_ALEN]; ++ u8 ar_sip[4]; ++ u8 ar_tha[ETH_ALEN]; ++ u8 ar_tip[4]; ++ } __packed * arp; ++ ++ const struct ipv6hdr *ipv6; ++ const struct icmp6hdr *icmpv6; ++ ++ switch (eth->h_proto) { ++ case cpu_to_be16(ETH_P_ARP): ++ /* can't say - but will probably be dropped later anyway */ ++ if (!pskb_may_pull(skb, sizeof(*eth) + sizeof(*arp))) ++ return false; ++ ++ arp = (void *)(eth + 1); ++ ++ if ((arp->hdr.ar_op == cpu_to_be16(ARPOP_REPLY) || ++ arp->hdr.ar_op == cpu_to_be16(ARPOP_REQUEST)) && ++ !memcmp(arp->ar_sip, arp->ar_tip, sizeof(arp->ar_sip))) ++ return true; ++ break; ++ case cpu_to_be16(ETH_P_IPV6): ++ /* can't say - but will probably be dropped later anyway */ ++ if (!pskb_may_pull(skb, sizeof(*eth) + sizeof(*ipv6) + ++ sizeof(*icmpv6))) ++ return false; ++ ++ ipv6 = (void *)(eth + 1); ++ icmpv6 = (void *)(ipv6 + 1); ++ ++ if (icmpv6->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT && ++ !memcmp(&ipv6->saddr, &ipv6->daddr, sizeof(ipv6->saddr))) ++ return true; ++ break; ++ default: ++ /* no need to support other protocols, proxy service isn't ++ * specified for any others ++ */ ++ break; ++ } ++ ++ return false; ++} ++EXPORT_SYMBOL(cfg80211_is_gratuitous_arp_unsolicited_na); diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0006-linux-crypto-caam-set-hwrng-quality.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0006-linux-crypto-caam-set-hwrng-quality.patch new file mode 100644 index 00000000..7bc8d8d7 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0006-linux-crypto-caam-set-hwrng-quality.patch @@ -0,0 +1,26 @@ +From: Jose Diaz de Grenu <Jose.DiazdeGrenu@digi.com> +Date: Wed, 27 Jun 2018 17:39:11 +0200 +Subject: [PATCH] linux: crypto: caam set hwrng quality + +According to the i.MX6 Security Reference Manual it is a NIST +certifiable RNG, so set high quality to let the HWRNG framework +automatically use it. + +Signed-off-by: Jose Diaz de Grenu <Jose.DiazdeGrenu@digi.com> +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + drivers/crypto/caam/caamrng.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c +index fde07d4ff019..ddca16941640 100644 +--- a/drivers/crypto/caam/caamrng.c ++++ b/drivers/crypto/caam/caamrng.c +@@ -292,6 +292,7 @@ static struct hwrng caam_rng = { + .name = "rng-caam", + .cleanup = caam_cleanup, + .read = caam_read, ++ .quality = 1024, + }; + + static void __exit caam_rng_exit(void) diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend index 53a8ace1..80574b12 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend @@ -10,8 +10,25 @@ SRC_URI_append_imx6qdl-variscite-som_use-mainline-bsp = " \ SRC_URI_append_ccimx6ul = " \ file://0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch \ + ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'file://0002-ARM-dts-imx6ul-ccimx6ulsom-Add-empty-wireless-and-bl.patch', '', d)} \ + ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'file://0003-net-wireless-Export-regulatory_hint_user.patch', '', d)} \ + ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'file://0004-net-wireless-Allow-for-firmware-to-handle-DFS.patch', '', d)} \ + ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'file://0005-net-wireless-Add-cfg80211_is_gratuitous_arp_unsolici.patch', '', d)} \ + file://0006-linux-crypto-caam-set-hwrng-quality.patch \ " +do_configure_prepend_ccimx6ul() { + if ${@bb.utils.contains('MACHINE_FEATURES', 'wifi', 'true', 'false', d)}; then + kernel_conf_variable HOSTAP m + kernel_conf_variable PROVE_LOCKING n + sed -e "${CONF_SED_SCRIPT}" < '${WORKDIR}/defconfig' >> '${B}/.config' + fi + if ${@bb.utils.contains('MACHINE_FEATURES', 'bluetooth', 'true', 'false', d)}; then + kernel_conf_variable BT_RFCOMM y + sed -e "${CONF_SED_SCRIPT}" < '${WORKDIR}/defconfig' >> '${B}/.config' + fi +} + do_configure_prepend_imx6qdl-variscite-som() { cp ${WORKDIR}/imx6*-var*.dts* ${S}/arch/arm/boot/dts } diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig deleted file mode 100644 index d2688425..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig +++ /dev/null @@ -1,397 +0,0 @@ -CONFIG_SYSVIPC=y -# CONFIG_CROSS_MEMORY_ATTACH is not set -# CONFIG_USELIB is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_LOG_BUF_SHIFT=18 -CONFIG_RELAY=y -CONFIG_SGETMASK_SYSCALL=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLUB_CPU_PARTIAL is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_BLK_CMDLINE_PARSER=y -CONFIG_ARCH_MXC=y -CONFIG_SOC_IMX6Q=y -CONFIG_PCI=y -CONFIG_PCI_DEBUG=y -CONFIG_PCI_IMX6=y -CONFIG_PCIE_ECRC=y -CONFIG_PCIEASPM_DEBUG=y -CONFIG_PCIEASPM_POWERSAVE=y -CONFIG_SMP=y -CONFIG_VMSPLIT_2G=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_CMA=y -CONFIG_UACCESS_WITH_MEMCPY=y -CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_STAT is not set -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_GENERIC_CPUFREQ_CPU0=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -CONFIG_CPU_IDLE=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_RUNTIME=y -CONFIG_PM_DEBUG=y -CONFIG_PM_ADVANCED_DEBUG=y -CONFIG_PM_TEST_SUSPEND=y -CONFIG_APM_EMULATION=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_CAN=y -# CONFIG_CAN_GW is not set -CONFIG_CAN_VCAN=y -CONFIG_CAN_FLEXCAN=y -CONFIG_CFG80211=y -CONFIG_CFG80211_WEXT=y -CONFIG_MAC80211=y -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=320 -CONFIG_IMX_WEIM=y -CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_TESTS=m -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_NFTL=y -CONFIG_NFTL_RW=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_FASTMAP=y -CONFIG_MTD_UBI_GLUEBI=y -CONFIG_MTD_UBI_BLOCK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_EEPROM_AT24=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_ATA=y -# CONFIG_SATA_PMP is not set -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_IMX=y -# CONFIG_ATA_SFF is not set -CONFIG_NETDEVICES=y -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_NET_VENDOR_ADAPTEC is not set -# CONFIG_NET_VENDOR_ALTEON is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_ATHEROS is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_BROCADE is not set -# CONFIG_NET_VENDOR_CHELSIO is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_CISCO is not set -# CONFIG_NET_VENDOR_DEC is not set -# CONFIG_NET_VENDOR_DLINK is not set -# CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_HP is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MELLANOX is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_MYRI is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NVIDIA is not set -# CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set -# CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set -# CONFIG_NET_VENDOR_RDC is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SILAN is not set -# CONFIG_NET_VENDOR_SIS is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SUN is not set -# CONFIG_NET_VENDOR_TEHUTI is not set -# CONFIG_NET_VENDOR_TI is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -CONFIG_SMSC_PHY=y -CONFIG_ATH_CARDS=y -CONFIG_ATH6KL=m -CONFIG_ATH6KL_SDIO=m -CONFIG_BRCMFMAC=y -CONFIG_BRCMDBG=y -# CONFIG_RTL_CARDS is not set -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_MATRIX=y -CONFIG_KEYBOARD_IMX=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_EGALAX=y -CONFIG_TOUCHSCREEN_EDT_FT5X06=y -CONFIG_TOUCHSCREEN_USB_COMPOSITE=y -# CONFIG_TOUCHSCREEN_USB_PANJIT is not set -# CONFIG_TOUCHSCREEN_USB_3M is not set -# CONFIG_TOUCHSCREEN_USB_ITM is not set -# CONFIG_TOUCHSCREEN_USB_ETURBO is not set -# CONFIG_TOUCHSCREEN_USB_GUNZE is not set -# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set -# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set -# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set -# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set -# CONFIG_TOUCHSCREEN_USB_GOTOP is not set -# CONFIG_TOUCHSCREEN_USB_JASTEC is not set -# CONFIG_TOUCHSCREEN_USB_ELO is not set -# CONFIG_TOUCHSCREEN_USB_E2I is not set -# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set -# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set -# CONFIG_TOUCHSCREEN_USB_NEXIO is not set -# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set -CONFIG_TOUCHSCREEN_TSC2007=y -# CONFIG_SERIO is not set -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_HW_RANDOM=y -# CONFIG_I2C_COMPAT is not set -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_GPIO=y -CONFIG_I2C_IMX=y -CONFIG_SPI=y -CONFIG_SPI_IMX=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_CPU_THERMAL=y -CONFIG_THERMAL_EMULATION=y -CONFIG_IMX_THERMAL=y -CONFIG_DEVICE_THERMAL=y -CONFIG_WATCHDOG=y -CONFIG_IMX2_WDT=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MXC_OUTPUT=y -CONFIG_VIDEO_MXC_IPU_OUTPUT=y -CONFIG_SOC_CAMERA=y -CONFIG_VIDEO_MX3=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -# CONFIG_DVB_AU8522_V4L is not set -# CONFIG_DVB_TUNER_DIB0070 is not set -# CONFIG_DVB_TUNER_DIB0090 is not set -# CONFIG_VGA_ARB is not set -CONFIG_DRM=y -CONFIG_DRM_VIVANTE=y -CONFIG_FB=y -CONFIG_FB_TILEBLITTING=y -# CONFIG_FB_MX3 is not set -CONFIG_FB_MXC_SYNC_PANEL=y -CONFIG_FB_MXC_LDB=y -# CONFIG_FB_MXC_EDID is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_BACKLIGHT_PWM=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_HRTIMER=y -CONFIG_SND_DYNAMIC_MINORS=y -# CONFIG_SND_SUPPORT_OLD_API is not set -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_DEBUG=y -CONFIG_SND_DEBUG_VERBOSE=y -CONFIG_SND_PCM_XRUN_DEBUG=y -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_PCI is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=y -CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DYNAMIC_MINORS=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_MON=m -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_STORAGE_REALTEK=y -CONFIG_USB_STORAGE_DATAFAB=y -CONFIG_USB_STORAGE_SDDR09=y -CONFIG_USB_STORAGE_SDDR55=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_TEST=m -CONFIG_NOP_USB_XCEIV=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_ETH_EEM=y -CONFIG_USB_GADGETFS=m -CONFIG_USB_FUNCTIONFS=m -CONFIG_USB_FUNCTIONFS_ETH=y -CONFIG_USB_FUNCTIONFS_RNDIS=y -CONFIG_USB_FUNCTIONFS_GENERIC=y -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_USB_G_ACM_MS=m -CONFIG_USB_G_HID=m -CONFIG_MMC=y -CONFIG_MMC_CLKGATE=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MXC_IPU=y -CONFIG_MXC_GPU_VIV=y -CONFIG_MXC_VPU_DEBUG=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_SNVS=y -CONFIG_DMADEVICES=y -CONFIG_IMX_SDMA=y -CONFIG_MXS_DMA=y -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_PM_DEVFREQ=y -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_USERSPACE=y -CONFIG_PWM=y -CONFIG_PWM_IMX=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_FUSE_FS=y -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=y -CONFIG_NLS_UTF8=y -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_SHIRQ=y -CONFIG_LOCKUP_DETECTOR=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_DEBUG_BLOCK_EXT_DEVT=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -CONFIG_DEBUG_SET_MODULE_RONX=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=y -CONFIG_CRYPTO_RMD160=y -CONFIG_CRYPTO_RMD256=y -CONFIG_CRYPTO_RMD320=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_TWOFISH=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_SAHARA=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb deleted file mode 100644 index a4d184f5..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb +++ /dev/null @@ -1,17 +0,0 @@ -SUMMARY = "Linux Kernel for Ka-Ro electronics TX Computer-On-Modules" - -require recipes-kernel/linux/linux-imx.inc - -DEPENDS += "lzop-native bc-native" - -SRCBRANCH = "karo-tx6" -LOCALVERSION = "-2015-09-18" -SRCREV = "5340e6663c3b575808a5be437a25d8a7f85cb658" -KERNEL_SRC = "git://git.karo-electronics.de/karo-tx-linux.git;protocol=git" -SRC_URI = "${KERNEL_SRC};branch=${SRCBRANCH} \ - file://defconfig \ -" - -KERNEL_IMAGETYPE="uImage" - -COMPATIBLE_MACHINE = "(tx6[qsu]-.*)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron/defconfig new file mode 100644 index 00000000..2f43fee8 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron/defconfig @@ -0,0 +1,431 @@ +CONFIG_LOCALVERSION="-exceet" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_REFCOUNT_FULL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MXC=y +# CONFIG_MACH_MX31ADS is not set +# CONFIG_MACH_BUG is not set +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6UL=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_MSI=y +CONFIG_SMP=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_ARM_PSCI=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_HIGHMEM=y +CONFIG_ARM_MODULE_PLTS=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_KEXEC=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_NETFILTER=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_BLOCK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y +CONFIG_SCSI_MQ_DEFAULT=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +CONFIG_MICREL_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_SMSC95XX=y +CONFIG_BRCMFMAC=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_MWIFIEX_USB=m +CONFIG_RT2X00=y +CONFIG_RT2800USB=y +# CONFIG_RT2800USB_RT33XX is not set +# CONFIG_RT2800USB_RT35XX is not set +CONFIG_RT2800USB_RT53XX=y +CONFIG_WL12XX=m +CONFIG_WLCORE_SDIO=m +# CONFIG_WILINK_PLATFORM_DATA is not set +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_GOODIX=y +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_TOUCHSCREEN_TSC2004=y +CONFIG_TOUCHSCREEN_TSC2007=y +CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_TOUCHSCREEN_SX8654=y +CONFIG_TOUCHSCREEN_COLIBRI_VF50=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=y +CONFIG_INPUT_PWM_BEEPER=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX_GPIO=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_GPIO=y +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_SPI_IMX=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_STMPE=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_SENSORS_GPIO_FAN=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DA9062_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_DA9062=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_MFD_STMPE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_DA9062=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_RC_CORE is not set +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_SOC_CAMERA=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_CODA=m +CONFIG_IMX_IPUV3_CORE=y +CONFIG_DRM=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +CONFIG_DRM_IMX=y +CONFIG_DRM_IMX_PARALLEL_DISPLAY=y +CONFIG_DRM_IMX_TVE=y +CONFIG_DRM_IMX_LDB=y +CONFIG_DRM_IMX_HDMI=y +CONFIG_DRM_ETNAVIV=y +CONFIG_DRM_MXSFB=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_ASRC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_EUKREA_TLV320=y +CONFIG_SND_SOC_IMX_ES8328=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_MC13783=y +CONFIG_SND_SOC_FSL_ASOC_CARD=y +CONFIG_SND_SOC_CS42XX8_I2C=y +CONFIG_SND_SOC_TLV320AIC3X=y +CONFIG_SND_SOC_WM8510=y +CONFIG_SND_SOC_WM8960=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_HID_MULTITOUCH=y +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_FSL_USB2=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +CONFIG_USB_ZERO=m +CONFIG_USB_AUDIO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_ULPI_BUS=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_ISL1208=y +CONFIG_RTC_DRV_PCF8523=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_RV8803=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_IMX_SDMA=m +CONFIG_MXS_DMA=y +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_VCNL4000=m +CONFIG_MPL3115=y +CONFIG_PWM=y +CONFIG_PWM_FSL_FTM=y +CONFIG_PWM_IMX=y +CONFIG_NVMEM_IMX_OCOTP=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y +CONFIG_PROVE_LOCKING=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_SAHARA=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron_5.4.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron_5.4.bb new file mode 100644 index 00000000..8c99a579 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-kontron_5.4.bb @@ -0,0 +1,29 @@ +# Copyright (C) 2012-2020 O.S. Systems Software LTDA. +# Released under the MIT license (see COPYING.MIT for the terms) +# +# SPDX-License-Identifier: MIT +# + +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "Kontron Linux mainline based kernel with backported features and fixes" +LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" + +DEPENDS += "lzop-native bc-native" + +SRC_URI = "git://git.kontron-electronics.de/linux/linux.git;protocol=https;branch=${SRCBRANCH} \ + file://defconfig" +LOCALVERSION = "-ktn" + + +# PV is defined in the base in linux-imx.inc file and uses the LINUX_VERSION definition +# required by kernel-yocto.bbclass. +# +# LINUX_VERSION define should match to the kernel version referenced by SRC_URI and +# should be updated once patchlevel is merged. +LINUX_VERSION = "5.4.41" + +SRCBRANCH = "v5.4-ktn" +SRCREV = "807a88195d767631837242b89cd8c7734a471f81" + +COMPATIBLE_MACHINE = "(imx6ul-kontron)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-lx2160acex7.inc b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-lx2160acex7.inc new file mode 100644 index 00000000..2fa8231e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-lx2160acex7.inc @@ -0,0 +1,10 @@ +FILESEXTRAPATHS_append_lx2160acex7 := "${THISDIR}/linux-fslc-qoriq-lx2160acex7:" + +SRC_URI_append_lx2160acex7 = "\ + file://0001-arm64-dts-lx2160a-add-lx2160acex7-device-tree-build.patch \ + file://0002-arm64-dts-lx2160a-add-lx2160acex7-device-tree.patch \ + file://0005-arm64-dts-lx2160a-cex7-add-ltc3882-support.patch \ + file://0006-arm64-dts-lx2160a-cex7-add-on-module-eeproms.patch \ + file://0007-pci-hotplug-declare-IDT-bridge-as-hotpluggabl-bridge.patch \ + file://0008-pci-spr2803-quirk-to-fix-class-ID.patch \ +" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-qoriq_5.4.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-qoriq_5.4.bbappend new file mode 100644 index 00000000..40455572 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-qoriq_5.4.bbappend @@ -0,0 +1 @@ +require linux-lx2160acex7.inc diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch deleted file mode 100644 index d8c2b666..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 119e027174cde26d8243c52993a35283df4e4920 Mon Sep 17 00:00:00 2001 -From: Anthony Felice <tony.felice@timesys.com> -Date: Mon, 26 Oct 2015 13:07:23 -0400 -Subject: [PATCH] arm: dts: vf610-phycore-rdk.dts: rename to vf610-pcm052.dts - -Rename vf610-phycore-rdk.dts to match upstream U-Boot. - -Signed-off-by: Anthony Felice <tony.felice@timesys.com> ---- - arch/arm/boot/dts/{vf610-phycore-rdk.dts => vf610-pcm052.dts} | 0 - 1 file changed, 0 insertions(+), 0 deletions(-) - rename arch/arm/boot/dts/{vf610-phycore-rdk.dts => vf610-pcm052.dts} (100%) - -diff --git a/arch/arm/boot/dts/vf610-phycore-rdk.dts b/arch/arm/boot/dts/vf610-pcm052.dts -similarity index 100% -rename from arch/arm/boot/dts/vf610-phycore-rdk.dts -rename to arch/arm/boot/dts/vf610-pcm052.dts --- -1.9.1 - diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig deleted file mode 100644 index a3422bd1..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig +++ /dev/null @@ -1,175 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_IKCONFIG=m -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSCTL_SYSCALL=y -CONFIG_EMBEDDED=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_ARCH_MXC=y -CONFIG_SOC_VF610=y -CONFIG_HAVE_IMX_EXTERNAL_MCC=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_VMSPLIT_2G=y -CONFIG_AEABI=y -CONFIG_KSM=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=/dev/nfs rw nfsroot=10.193.20.106:/tftpboot/10.193.20.115 ip=10.193.20.115:10.193.20.106:10.193.20.254:255.255.255.0::eth0:off console=ttymxc1,115200 mem=128M" -CONFIG_VFP=y -CONFIG_NEON=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_CAN=y -CONFIG_CAN_VCAN=y -CONFIG_CAN_FLEXCAN=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_FSL_NFC=y -CONFIG_MTD_SPI_NOR_BASE=y -CONFIG_SPI_FSL_QUADSPI=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_RAM=y -CONFIG_EEPROM_AT24=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_MICREL_PHY=y -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_CRTOUCH=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -# CONFIG_CONSOLE_TRANSLATIONS is not set -CONFIG_LEGACY_PTY_COUNT=4 -CONFIG_SERIAL_FSL_LPUART=y -CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -CONFIG_HW_RANDOM=y -# CONFIG_IMX_MCC_LIBMCC is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -CONFIG_SPI=y -CONFIG_SPI_FSL_DSPI=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_IMX2_WDT=y -CONFIG_MFD_SYSCON=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_FB=y -CONFIG_FB_FSL_DCU=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=m -CONFIG_BACKLIGHT_PWM=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set -CONFIG_SND=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_FSL_SAI=y -CONFIG_SND_SOC_SGTL5000=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_MXC=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_STORAGE=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_ULPI=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_ONESHOT=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_SNVS=y -CONFIG_DMADEVICES=y -CONFIG_FSL_EDMA=y -CONFIG_STAGING=y -CONFIG_IIO=y -CONFIG_VF610_ADC=y -CONFIG_PWM=y -CONFIG_PWM_FSL_FTM=y -# CONFIG_RESET_CONTROLLER is not set -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT4_FS=y -CONFIG_AUTOFS4_FS=m -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=m -CONFIG_FUNCTION_TRACER=y -CONFIG_BLK_DEV_IO_TRACE=y -# CONFIG_ARM_UNWIND is not set -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_ARC4=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=m -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb deleted file mode 100644 index 0f3be236..00000000 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb +++ /dev/null @@ -1,17 +0,0 @@ -# Copyright (C) 2013-2014 Timesys Corporation -# Released under the MIT license (see COPYING.MIT for the terms) -require recipes-kernel/linux/linux-imx.inc - -SUMMARY = "Linux Kernel with added drivers and board support for Vybrid-based platforms" - -# Revision of 3.13_vybrid branch -SRC_URI = "git://github.com/Timesys/linux-timesys.git;protocol=git;branch=${SRCBRANCH} \ - file://defconfig \ - file://0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch \ -" - -SRCBRANCH = "3.13_vybrid" -SRCREV = "a8caf227b68beff7b3e6a2b69a37272c6fc7d4ac" -LOCALVERSION ?= "-${SRCBRANCH}" - -COMPATIBLE_MACHINE = "(vf60)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/apalis-imx6/defconfig index a247438e..f8776ba4 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/defconfig +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/apalis-imx6/defconfig @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="-cm-fx6" CONFIG_KERNEL_LZO=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y @@ -7,9 +6,16 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_CGROUPS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_DEBUG=y +CONFIG_NAMESPACES=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y +CONFIG_BPF_SYSCALL=y +CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set @@ -18,26 +24,19 @@ CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_GPIO_PCA953X=y CONFIG_ARCH_MXC=y -CONFIG_MXC_DEBUG_BOARD=y -CONFIG_MACH_IMX51_DT=y -CONFIG_MACH_EUKREA_CPUIMX51SD=y -CONFIG_SOC_IMX53=y CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -CONFIG_SOC_IMX6SX=y -CONFIG_SOC_VF610=y -# CONFIG_SWP_EMULATE is not set CONFIG_PCI=y +CONFIG_PCI_MSI=y CONFIG_PCI_IMX6=y CONFIG_SMP=y CONFIG_VMSPLIT_2G=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_HIGHMEM=y CONFIG_CMA=y -CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait" +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -48,107 +47,48 @@ CONFIG_ARM_IMX6Q_CPUFREQ=y CONFIG_CPU_IDLE=y CONFIG_VFP=y CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y CONFIG_BINFMT_MISC=m -CONFIG_PM_RUNTIME=y CONFIG_PM_DEBUG=y CONFIG_PM_TEST_SUSPEND=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_INET=y +CONFIG_IP_MULTICAST=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_IPV6=y +CONFIG_IPV6_SIT=m CONFIG_NETFILTER=y -CONFIG_NETFILTER_DEBUG=y -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -CONFIG_NETFILTER_XT_TARGET_LED=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_RPFILTER=m -CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT_IPV4=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y CONFIG_CAN=y +CONFIG_CAN_VCAN=y CONFIG_CAN_FLEXCAN=y CONFIG_BT=m -CONFIG_BT_MRVL=m -CONFIG_BT_MRVL_SDIO=m -CONFIG_CFG80211=y -CONFIG_CFG80211_WEXT=y -CONFIG_MAC80211=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HCIUART=m +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_GPIO=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set -CONFIG_IMX_WEIM=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=320 CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y @@ -159,11 +99,6 @@ CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_STAA=y CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_SST25L=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_NAND_MXC=y CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y @@ -172,75 +107,64 @@ CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # CONFIG_SCSI_LOWLEVEL is not set CONFIG_ATA=y -CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI=m CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_IMX=y CONFIG_PATA_IMX=y CONFIG_NETDEVICES=y -CONFIG_TUN=m +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set -CONFIG_CS89x0=y -CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_CIRRUS is not set # CONFIG_NET_VENDOR_FARADAY is not set -CONFIG_IGB=m +# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_SEEQ is not set -CONFIG_SMC91X=y -CONFIG_SMC911X=y -CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_STMICRO is not set -CONFIG_ATH_CARDS=y -CONFIG_ATH6KL=m -CONFIG_ATH6KL_SDIO=m -CONFIG_MWIFIEX=m -CONFIG_MWIFIEX_SDIO=m -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_MICREL_PHY=y +CONFIG_PPP=m +CONFIG_USB_USBNET=y +# CONFIG_RTL_CARDS is not set CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_IMX=y -CONFIG_MOUSE_PS2=m -CONFIG_MOUSE_PS2_ELANTECH=y +# CONFIG_MOUSE_PS2 is not set CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_EGALAX=y -CONFIG_TOUCHSCREEN_ELAN=y -CONFIG_TOUCHSCREEN_MAX11801=y -CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_FUSION_F0710A=m +CONFIG_TOUCHSCREEN_STMPE=y CONFIG_INPUT_MISC=y -CONFIG_INPUT_MMA8450=y -CONFIG_INPUT_ISL29023=y +CONFIG_INPUT_UINPUT=y CONFIG_SERIO_SERPORT=m # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -CONFIG_FSL_OTP=y # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y CONFIG_I2C_MUX_GPIO=y -CONFIG_I2C_MUX_PCA954x=y # CONFIG_I2C_HELPER_AUTO is not set CONFIG_I2C_ALGOPCF=m CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_GPIO=y CONFIG_I2C_IMX=y CONFIG_SPI=y CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y CONFIG_GPIO_SYSFS=y CONFIG_POWER_SUPPLY=y -CONFIG_SABRESD_MAX8903=y -CONFIG_IMX6_USB_CHARGER=y -CONFIG_SENSORS_MAX17135=y CONFIG_SENSORS_MAG3110=y CONFIG_THERMAL=y CONFIG_CPU_THERMAL=y @@ -248,131 +172,131 @@ CONFIG_IMX_THERMAL=y CONFIG_DEVICE_THERMAL=y CONFIG_WATCHDOG=y CONFIG_IMX2_WDT=y -CONFIG_MFD_DA9052_I2C=y -CONFIG_MFD_MC13XXX_SPI=y -CONFIG_MFD_MC13XXX_I2C=y -CONFIG_MFD_MAX17135=y -CONFIG_MFD_SI476X_CORE=y +CONFIG_MFD_STMPE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_DA9052=y -CONFIG_REGULATOR_MAX17135=y -CONFIG_REGULATOR_MC13783=y -CONFIG_REGULATOR_MC13892=y CONFIG_REGULATOR_PFUZE100=y CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_RADIO_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m CONFIG_V4L_PLATFORM_DRIVERS=y CONFIG_VIDEO_MXC_OUTPUT=y CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m CONFIG_MXC_CAMERA_OV5640=m CONFIG_MXC_CAMERA_OV5642=m CONFIG_MXC_CAMERA_OV5640_MIPI=m CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_TVIN_ADV7280=m +CONFIG_MXC_TVIN_MAX9526=m CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m CONFIG_VIDEO_MXC_IPU_OUTPUT=y CONFIG_VIDEO_MXC_PXP_V4L2=y -CONFIG_VIDEO_MXC_CSI_CAMERA=m CONFIG_SOC_CAMERA=y -CONFIG_VIDEO_MX3=y -CONFIG_RADIO_SI476X=y -CONFIG_SOC_CAMERA_OV2640=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set CONFIG_DRM=y CONFIG_DRM_VIVANTE=y CONFIG_FB_MXS=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_L4F00242T03=y -CONFIG_LCD_PLATFORM=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y CONFIG_FB_MXC_SYNC_PANEL=y -CONFIG_FB_MXC_LDB=y CONFIG_FB_MXC_MIPI_DSI=y CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y CONFIG_FB_MXC_HDMI=y -CONFIG_FB_MXC_EINK_PANEL=y CONFIG_FB_MXS_SII902X=y CONFIG_HANNSTAR_CABC=y +CONFIG_FB_MXC_EINK_PANEL=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_LOGO=y CONFIG_SOUND=y CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set CONFIG_SND_USB_AUDIO=m CONFIG_SND_SOC=y -CONFIG_SND_SOC_FSL_ASRC=y -CONFIG_SND_SOC_FSL_SAI=y -CONFIG_SND_SOC_FSL_SSI=y -CONFIG_SND_SOC_FSL_ESAI=y -CONFIG_SND_SOC_IMX_AUDMUX=y CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_SGTL5000=y CONFIG_SND_SOC_IMX_SPDIF=y CONFIG_SND_SOC_IMX_HDMI=y -CONFIG_SND_SOC_CS42XX8_I2C=y +CONFIG_HIDRAW=y +CONFIG_HID_MULTITOUCH=m +CONFIG_USB_HIDDEV=y CONFIG_USB=y -CONFIG_USB_OTG=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_MXC=y -CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_ACM=m +CONFIG_USB_WDM=m CONFIG_USB_STORAGE=y CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_MXS_PHY=y CONFIG_USB_GADGET=y -CONFIG_USB_FSL_USB2=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_ZERO=m -CONFIG_USB_AUDIO=m CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m CONFIG_USB_MASS_STORAGE=m CONFIG_USB_G_SERIAL=m CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_ESDHC_IMX=y CONFIG_MXC_IPU=y -CONFIG_MXC_GPU_VIV=y CONFIG_MXC_MIPI_CSI2=y -CONFIG_MXC_MLB150=m CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_RTC_CLASS=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_EM3027=y -CONFIG_RTC_DRV_MC13XXX=y -CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_SNVS=y CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=m CONFIG_MXC_PXP_V2=y -CONFIG_IMX_SDMA=y -CONFIG_MXS_DMA=y +# CONFIG_MX3_IPU is not set CONFIG_STAGING=y -CONFIG_DRM_IMX=y -CONFIG_DRM_IMX_FB_HELPER=y -CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -CONFIG_DRM_IMX_LDB=y -CONFIG_DRM_IMX_IPUV3_CORE=y -CONFIG_DRM_IMX_IPUV3=y -CONFIG_DRM_IMX_HDMI=y +CONFIG_R8188EU=m # CONFIG_IOMMU_SUPPORT is not set +CONFIG_IIO=y +CONFIG_STMPE_ADC=y CONFIG_PWM=y CONFIG_PWM_IMX=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y @@ -381,60 +305,73 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set CONFIG_AUTOFS4_FS=y CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_OVERLAY_FS=y CONFIG_ISO9660_FS=m CONFIG_JOLIET=y CONFIG_ZISOFS=y CONFIG_UDF_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y CONFIG_ROOT_NFS=y +CONFIG_CIFS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y -CONFIG_MAGIC_SYSRQ=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_USER=y CONFIG_SECURITYFS=y +CONFIG_CRYPTO_ECDH=y CONFIG_CRYPTO_USER=y -CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_PCBC=y CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_RMD128=y CONFIG_CRYPTO_RMD160=y CONFIG_CRYPTO_RMD256=y CONFIG_CRYPTO_RMD320=y CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_TGR192=y CONFIG_CRYPTO_WP512=y CONFIG_CRYPTO_BLOWFISH=y CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_TWOFISH=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y -CONFIG_CRC_CCITT=m +CONFIG_CRC_CCITT=y CONFIG_CRC_T10DIF=y CONFIG_CRC7=m CONFIG_LIBCRC32C=m diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/colibri-imx6/defconfig index 8df3b3de..7aacece7 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm/defconfig +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/colibri-imx6/defconfig @@ -1,55 +1,37 @@ CONFIG_KERNEL_LZO=y CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_CGROUPS=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -# CONFIG_MEMCG_SWAP_ENABLED is not set -CONFIG_BLK_CGROUP=y CONFIG_CGROUP_SCHED=y -CONFIG_CFS_BANDWIDTH=y -CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_FREEZER=y -CONFIG_CPUSETS=y -CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_DEBUG=y CONFIG_NAMESPACES=y +CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y +CONFIG_BPF_SYSCALL=y +CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set -CONFIG_CC_STACKPROTECTOR_STRONG=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_MXC=y -CONFIG_SOC_IMX51=y CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -CONFIG_SOC_IMX6SX=y -CONFIG_SOC_IMX7D=y -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCI_IMX6=y CONFIG_SMP=y CONFIG_VMSPLIT_2G=y -CONFIG_ARM_PSCI=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_HIGHMEM=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 CONFIG_CMA=y +CONFIG_UACCESS_WITH_MEMCPY=y CONFIG_SECCOMP=y CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" CONFIG_CPU_FREQ=y @@ -59,120 +41,79 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_ARM_IMX6Q_CPUFREQ=y -CONFIG_ARM_IMX7D_CPUFREQ=y CONFIG_CPU_IDLE=y CONFIG_VFP=y CONFIG_NEON=y -CONFIG_BINFMT_MISC=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_BINFMT_MISC=m CONFIG_PM_DEBUG=y CONFIG_PM_TEST_SUSPEND=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y -CONFIG_XFRM_USER=m CONFIG_INET=y +CONFIG_IP_MULTICAST=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y -CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_IPV6_SIT=m CONFIG_NETFILTER=y -CONFIG_NF_CONNTRACK=m -# CONFIG_NF_CONNTRACK_PROCFS is not set -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=m -CONFIG_NFT_EXTHDR=m -CONFIG_NFT_META=m -CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_IP_VS=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NFT_CHAIN_NAT_IPV4=m -CONFIG_NFT_MASQ_IPV4=m -CONFIG_NFT_REDIR_IPV4=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_BRIDGE=m -CONFIG_VLAN_8021Q=y -CONFIG_LLC2=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y CONFIG_CAN=y +CONFIG_CAN_VCAN=y CONFIG_CAN_FLEXCAN=y -CONFIG_CAN_M_CAN=y -CONFIG_CAN_MCP251X=m -CONFIG_BT=y -CONFIG_BT_RFCOMM=y +CONFIG_CAN_MCP251X=y +CONFIG_BT=m +CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y +CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=m -CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_LL=y CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -CONFIG_CFG80211_WEXT=y CONFIG_MAC80211=m CONFIG_RFKILL=y CONFIG_RFKILL_GPIO=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set +# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_SIZE_PERCENTAGE=50 +CONFIG_CMA_SIZE_SEL_MIN=y +CONFIG_IMX_WEIM=y CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_STAA=y CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SST25L=y -CONFIG_MTD_SPI_NOR=y -CONFIG_SPI_FSL_QUADSPI=y +CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_FTP628=m CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # CONFIG_SCSI_LOWLEVEL is not set -CONFIG_ATA=y -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_IMX=y -CONFIG_PATA_IMX=y -CONFIG_MD=y -CONFIG_BLK_DEV_DM=y CONFIG_NETDEVICES=y -CONFIG_TUN=m -CONFIG_VETH=m # CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_CIRRUS is not set @@ -182,326 +123,250 @@ CONFIG_VETH=m # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_NATSEMI is not set -CONFIG_R8169=m # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_WIZNET is not set -CONFIG_AT803X_PHY=y CONFIG_MICREL_PHY=y CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_USB_USBNET=m -# CONFIG_USB_NET_AX88179_178A is not set -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_CDC_MBIM=m -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -CONFIG_USB_NET_QMI_WWAN=m -CONFIG_USB_HSO=m -CONFIG_ATH9K=m -# CONFIG_ATH9K_RFKILL is not set -CONFIG_BRCMFMAC=m -CONFIG_IWLWIFI=m -CONFIG_IWLDVM=m -CONFIG_IWLMVM=m -CONFIG_RTL8192CE=m -CONFIG_WL12XX=m -CONFIG_WLCORE_SDIO=m -# CONFIG_WILINK_PLATFORM_DATA is not set -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_USB_USBNET=y CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_GPIO=m -CONFIG_KEYBOARD_IMX=m -CONFIG_KEYBOARD_CWC_HOOKSWITCH=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y # CONFIG_MOUSE_PS2 is not set CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_AR1020_I2C=m CONFIG_TOUCHSCREEN_ATMEL_MXT=m -CONFIG_TOUCHSCREEN_CR_MULTI=m -CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5=m -CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5_DEVICETREE_SUPPORT=y -CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5_I2C=m -CONFIG_TOUCHSCREEN_EGALAX=m -CONFIG_TOUCHSCREEN_EXC3000=m -CONFIG_TOUCHSCREEN_FT5X06=m -CONFIG_TOUCHSCREEN_GOODIX=m -CONFIG_TOUCHSCREEN_ILI210X=m -CONFIG_TOUCHSCREEN_PIC16F616=m -CONFIG_TOUCHSCREEN_MC13783=m -CONFIG_TOUCHSCREEN_TSC2004=m -CONFIG_TOUCHSCREEN_SILEAD=m -CONFIG_TOUCHSCREEN_AR1010_UART=m +CONFIG_TOUCHSCREEN_FUSION_F0710A=m +CONFIG_TOUCHSCREEN_STMPE=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y +CONFIG_SERIO_SERPORT=m # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_GPS_MAX7W=m -CONFIG_SERIAL_SC16IS7XX=m CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -CONFIG_SERIAL_XR20M117X=m -CONFIG_FSL_OTP=y -CONFIG_HW_RANDOM_IMX_RNG=y -CONFIG_MAGSTRIPE=m -CONFIG_SAS=m -CONFIG_DUMMY_I2C_DEVICE=m # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y CONFIG_I2C_MUX_GPIO=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_I2C_MUX_PINCTRL=m # CONFIG_I2C_HELPER_AUTO is not set CONFIG_I2C_ALGOPCF=m CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_GPIO=y CONFIG_I2C_IMX=y -CONFIG_I2C_IMX_HS=m CONFIG_SPI=y CONFIG_SPI_IMX=y CONFIG_SPI_SPIDEV=y CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_IMX_RPMSG=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_RESET_SYSCON_POWEROFF=y CONFIG_POWER_SUPPLY=y -CONFIG_SENSORS_LM75=m -CONFIG_SENSORS_ADS1000=m CONFIG_SENSORS_MAG3110=y -# CONFIG_MXC_MMA8451 is not set CONFIG_THERMAL=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_CPU_THERMAL=y CONFIG_IMX_THERMAL=y CONFIG_DEVICE_THERMAL=y CONFIG_WATCHDOG=y CONFIG_IMX2_WDT=y -CONFIG_MFD_MC13XXX_SPI=m -CONFIG_MFD_MAX77823=y -CONFIG_MFD_ARIZONA_SPI=m -CONFIG_MFD_WM5102=y +CONFIG_MFD_STMPE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_ARIZONA=m -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_MC13892=m CONFIG_REGULATOR_PFUZE100=y CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -CONFIG_MEDIA_RADIO_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m -CONFIG_MEDIA_PCI_SUPPORT=y -CONFIG_VIDEO_TW686X=m CONFIG_V4L_PLATFORM_DRIVERS=y CONFIG_VIDEO_MXC_OUTPUT=y CONFIG_VIDEO_MXC_CAPTURE=m CONFIG_VIDEO_MXC_CSI_CAMERA=m CONFIG_MXC_VADC=m -CONFIG_MXC_MIPI_CSI=m CONFIG_MXC_CAMERA_OV5640=m -CONFIG_MXC_CAMERA_OV5640_V2=m CONFIG_MXC_CAMERA_OV5642=m -CONFIG_MXC_CAMERA_OV5642_V2=m CONFIG_MXC_CAMERA_OV5640_MIPI=m -CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m -CONFIG_MXC_VIDEO_GS2971=m -CONFIG_MXC_HDMI_CSI2_TC358743=m -CONFIG_TC358743_AUDIO=y CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_TVIN_ADV7280=m +CONFIG_MXC_TVIN_MAX9526=m CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m CONFIG_VIDEO_MXC_IPU_OUTPUT=y CONFIG_VIDEO_MXC_PXP_V4L2=y CONFIG_SOC_CAMERA=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set CONFIG_DRM=y CONFIG_DRM_VIVANTE=y CONFIG_FB_MXS=y CONFIG_FB_MXC_SYNC_PANEL=y -CONFIG_FB_MXC_MIPI_DSI=y -CONFIG_FB_MXC_MIPI_RM68200=y -CONFIG_FB_MXC_TVOUT_ADV739X=y -CONFIG_FB_MXC_LDB=y CONFIG_FB_MXC_HDMI=y +CONFIG_FB_MXS_SII902X=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_L4F00242T03=y CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_PWM=y -CONFIG_BACKLIGHT_LP8860=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_DVI_TFP410=y CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_DYNAMIC_MINORS=y # CONFIG_SND_DRIVERS is not set # CONFIG_SND_ARM is not set # CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set +CONFIG_SND_USB_AUDIO=m CONFIG_SND_SOC=y CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_WM8960=m CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_IMX_WM5102=m -CONFIG_SND_SOC_IMX_HDMI=m +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_HIDRAW=y CONFIG_HID_MULTITOUCH=m +CONFIG_USB_HIDDEV=y CONFIG_USB=y -CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y -CONFIG_USB_ACM=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_ACM=m +CONFIG_USB_WDM=m CONFIG_USB_STORAGE=y CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_CP210X=y CONFIG_USB_SERIAL_FTDI_SIO=y -CONFIG_USB_SERIAL_KEYSPAN=y CONFIG_USB_SERIAL_PL2303=y -CONFIG_USB_SERIAL_QUALCOMM=y CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_CC_TUSB320=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_MXS_PHY=y CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_ZERO=m CONFIG_USB_ETH=m -CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m CONFIG_USB_MASS_STORAGE=m CONFIG_USB_G_SERIAL=m -CONFIG_USB_G_MULTI=m CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_ESDHC_IMX=y -# CONFIG_MXC_GPU_VIV is not set CONFIG_MXC_IPU=y -CONFIG_MXC_IPU_V3_PRE=y CONFIG_MXC_MIPI_CSI2=y -CONFIG_MXC_HDMI_CEC=y -CONFIG_MXC_SIM=y +CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y -CONFIG_LEDS_LM3643=m CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=m +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_ONESHOT=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_RTC_CLASS=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_ISL1208=y -CONFIG_RTC_DRV_M41T80=y -CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_SNVS=y CONFIG_DMADEVICES=y -CONFIG_IMX_SDMA=y -CONFIG_MXS_DMA=y +CONFIG_IMX_SDMA=m CONFIG_MXC_PXP_V2=y -CONFIG_MXC_PXP_V3=y # CONFIG_MX3_IPU is not set CONFIG_STAGING=y -CONFIG_DRM_ANX78XX=m -CONFIG_FB_TFT=m -CONFIG_FB_TFT_ST7789V=m -CONFIG_COMMON_CLK_PWM=y +CONFIG_R8188EU=m # CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXTCON_USB_GPIO=y CONFIG_IIO=y -CONFIG_ISL28022_ADC=m -CONFIG_TI_ADC081C=m -CONFIG_TI_ADS7924=m -CONFIG_TI_LMP900XX=m -CONFIG_ISL76534=m -CONFIG_APDS9300=m +CONFIG_STMPE_ADC=y CONFIG_PWM=y CONFIG_PWM_IMX=y -CONFIG_BATTERY_SAMSUNG=y -CONFIG_FUELGAUGE_MAX77823=m -CONFIG_FUELGAUGE_MAX77823_COULOMB_COUNTING=y -CONFIG_CHARGER_MAX77823=m -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set CONFIG_AUTOFS4_FS=y CONFIG_FUSE_FS=y +CONFIG_CUSE=y CONFIG_OVERLAY_FS=y -CONFIG_MSDOS_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CONFIGFS_FS=y -CONFIG_ECRYPT_FS=y -CONFIG_SQUASHFS=y +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y -CONFIG_SQUASHFS_EMBEDDED=y CONFIG_NFS_FS=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y CONFIG_ROOT_NFS=y +CONFIG_CIFS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y -CONFIG_DEBUG_INFO=y -CONFIG_FRAME_WARN=2048 -CONFIG_MAGIC_SYSRQ=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_FTRACE is not set -CONFIG_STRICT_DEVMEM=y # CONFIG_ARM_UNWIND is not set -CONFIG_DEBUG_SET_MODULE_RONX=y -CONFIG_SECURITY=y -CONFIG_LSM_MMAP_MIN_ADDR=0 -CONFIG_SECURITY_SELINUX=y -CONFIG_SECURITY_SMACK=y -CONFIG_SECURITY_APPARMOR=y -CONFIG_SECURITY_YAMA=y -CONFIG_DEFAULT_SECURITY_APPARMOR=y +CONFIG_DEBUG_USER=y +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_ECDH=y CONFIG_CRYPTO_USER=y -CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_PCBC=y CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_RMD128=y CONFIG_CRYPTO_RMD160=y CONFIG_CRYPTO_RMD256=y CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_TGR192=y CONFIG_CRYPTO_WP512=y CONFIG_CRYPTO_BLOWFISH=y CONFIG_CRYPTO_CAMELLIA=y CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRC_CCITT=y CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/colibri-imx6ull/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/colibri-imx6ull/defconfig new file mode 100644 index 00000000..af0680d5 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/colibri-imx6ull/defconfig @@ -0,0 +1,384 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_DEBUG=y +CONFIG_NAMESPACES=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_BPF_SYSCALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX6ULL=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_SMP=y +# CONFIG_ARM_CPU_TOPOLOGY is not set +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_CMA=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_BINFMT_MISC=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NET_IPGRE_DEMUX=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_IPV6_SIT=m +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_MASQ=y +CONFIG_NFT_NAT=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_NFACCT=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NFT_CHAIN_NAT_IPV4=y +CONFIG_NFT_MASQ_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_NF_TABLES_BRIDGE=y +CONFIG_L2TP=m +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_CAN=m +CONFIG_CAN_FLEXCAN=m +CONFIG_CAN_MCP251X=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_MRVL=y +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_CFG80211=m +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +# CONFIG_FIRMWARE_IN_KERNEL is not set +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_SIZE_PERCENTAGE=50 +CONFIG_CMA_SIZE_SEL_MIN=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_MICREL_PHY=y +CONFIG_PPP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_MPPE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_INPUT_POLLDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_AD7879=y +CONFIG_TOUCHSCREEN_AD7879_I2C=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_FUSION_F0710A=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_FSL_OTP=y +CONFIG_I2C=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +# CONFIG_MXC_MMA8451 is not set +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_GPIO=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +# CONFIG_USB_GSPCA is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_FB=y +CONFIG_FB_MXS=y +# CONFIG_FB_MXC_EDID is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB_AUDIO=m +CONFIG_HIDRAW=y +CONFIG_HID_MULTITOUCH=m +CONFIG_USB_HIDDEV=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_ACM=m +CONFIG_USB_WDM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OPTION=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_SIM=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=m +CONFIG_MXS_DMA=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +# CONFIG_MX3_IPU is not set +CONFIG_STAGING=y +CONFIG_R8188EU=m +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_OVERLAY_FS=y +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_CIFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_USER=y +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_PCBC=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRYPTO_DEV_MXS_DCP=y +CONFIG_CRC_CCITT=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.9-1.0.x/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/mx7/defconfig index 9e5fe3e2..46ff17e7 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.9-1.0.x/defconfig +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.14-2.0.x/mx7/defconfig @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="-" CONFIG_KERNEL_LZO=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y @@ -14,6 +13,7 @@ CONFIG_CGROUPS=y CONFIG_CGROUP_SCHED=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_BPF=y CONFIG_CGROUP_DEBUG=y CONFIG_NAMESPACES=y CONFIG_RELAY=y @@ -22,6 +22,7 @@ CONFIG_BLK_DEV_INITRD=y # CONFIG_RD_LZMA is not set # CONFIG_RD_XZ is not set CONFIG_KALLSYMS_ALL=y +CONFIG_BPF_SYSCALL=y CONFIG_EMBEDDED=y # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set @@ -31,22 +32,14 @@ CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_MXC=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6ULL=y CONFIG_SOC_IMX7D=y # CONFIG_ARM_ERRATA_643719 is not set -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCI_IMX6=y CONFIG_SMP=y # CONFIG_ARM_CPU_TOPOLOGY is not set CONFIG_VMSPLIT_2G=y +CONFIG_ARM_PSCI=y CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y CONFIG_CMA=y -CONFIG_UACCESS_WITH_MEMCPY=y -CONFIG_SECCOMP=y CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y @@ -55,19 +48,15 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPUFREQ_DT=y -CONFIG_ARM_IMX7D_CPUFREQ=y CONFIG_CPU_IDLE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_KERNEL_MODE_NEON=y -CONFIG_BINFMT_MISC=m -CONFIG_PM_DEBUG=y -CONFIG_PM_TEST_SUSPEND=y +CONFIG_BINFMT_MISC=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_INET=y -CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_PNP=y @@ -91,9 +80,11 @@ CONFIG_NF_CONNTRACK_IPV4=y CONFIG_NFT_CHAIN_NAT_IPV4=y CONFIG_NFT_MASQ_IPV4=y CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y CONFIG_NF_TABLES_BRIDGE=y CONFIG_L2TP=m CONFIG_BRIDGE=y @@ -101,8 +92,7 @@ CONFIG_BRIDGE=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y -CONFIG_CAN=y -CONFIG_CAN_VCAN=y +CONFIG_CAN=m CONFIG_CAN_FLEXCAN=m CONFIG_CAN_MCP251X=m CONFIG_BT=m @@ -113,30 +103,25 @@ CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=m CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_LL=y CONFIG_CFG80211=m CONFIG_CFG80211_WEXT=y CONFIG_MAC80211=m CONFIG_RFKILL=y CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set +# CONFIG_FIRMWARE_IN_KERNEL is not set +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=320 +CONFIG_CMA_SIZE_MBYTES=256 CONFIG_CMA_SIZE_PERCENTAGE=50 CONFIG_CMA_SIZE_SEL_MIN=y CONFIG_IMX_WEIM=y CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_GPMI_NAND=y @@ -144,24 +129,15 @@ CONFIG_MTD_NAND_MXC=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # CONFIG_SCSI_LOWLEVEL is not set -CONFIG_ATA=y -CONFIG_SATA_AHCI=m -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_IMX=y -CONFIG_PATA_IMX=y CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_ATHEROS is not set # CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_CIRRUS is not set @@ -170,7 +146,6 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_ROCKER is not set @@ -193,9 +168,7 @@ CONFIG_USB_USBNET=m # CONFIG_USB_NET_NET1080 is not set # CONFIG_USB_NET_CDC_SUBSET is not set # CONFIG_USB_NET_ZAURUS is not set -# CONFIG_WLAN is not set CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y @@ -206,25 +179,13 @@ CONFIG_TOUCHSCREEN_AD7879=y CONFIG_TOUCHSCREEN_AD7879_I2C=y CONFIG_TOUCHSCREEN_ATMEL_MXT=m CONFIG_TOUCHSCREEN_FUSION_F0710A=m -CONFIG_TOUCHSCREEN_STMPE=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_FSL_LPUART=y -CONFIG_SERIAL_FSL_LPUART_CONSOLE=y -CONFIG_FSL_OTP=y # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_GPIO=y # CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_ALGOPCF=m -CONFIG_I2C_ALGOPCA=m -CONFIG_I2C_GPIO=y CONFIG_I2C_IMX=y CONFIG_SPI=y CONFIG_SPI_GPIO=y @@ -236,7 +197,6 @@ CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y CONFIG_POWER_SUPPLY=y -CONFIG_SENSORS_MAG3110=y # CONFIG_MXC_MMA8451 is not set CONFIG_THERMAL=y CONFIG_CPU_THERMAL=y @@ -246,12 +206,9 @@ CONFIG_WATCHDOG=y CONFIG_RN5T618_WATCHDOG=y CONFIG_IMX2_WDT=y CONFIG_MFD_RN5T618=y -CONFIG_MFD_STMPE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_PFUZE100=y CONFIG_REGULATOR_RN5T618=y CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y @@ -259,59 +216,32 @@ CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m # CONFIG_USB_GSPCA is not set CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MXC_OUTPUT=y -CONFIG_VIDEO_MXC_CAPTURE=m -CONFIG_MXC_CAMERA_OV5640=m -CONFIG_MXC_CAMERA_OV5642=m -CONFIG_MXC_CAMERA_OV5640_MIPI=m -CONFIG_MXC_TVIN_ADV7180=m -CONFIG_MXC_TVIN_ADV7280=m -CONFIG_MXC_TVIN_MAX9526=m -CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m -CONFIG_VIDEO_MXC_IPU_OUTPUT=y CONFIG_VIDEO_MXC_PXP_V4L2=y -CONFIG_VIDEO_MXC_CSI_CAMERA=m -CONFIG_MXC_VADC=m CONFIG_SOC_CAMERA=y CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_VIDEO_CODA=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -CONFIG_SOC_CAMERA_OV2640=y -# CONFIG_DVB_AU8522_V4L is not set -# CONFIG_DVB_TUNER_DIB0070 is not set -# CONFIG_DVB_TUNER_DIB0090 is not set -CONFIG_DRM=y -CONFIG_DRM_VIVANTE=y +CONFIG_FB=y +# CONFIG_FB_MX3 is not set CONFIG_FB_MXS=y -CONFIG_FB_MXC_SYNC_PANEL=y -CONFIG_FB_MXC_MIPI_DSI=y -CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y -CONFIG_FB_MXC_LDB=y -CONFIG_FB_MXC_HDMI=y -CONFIG_HANNSTAR_CABC=y -CONFIG_FB_MXC_EINK_PANEL=y +# CONFIG_FB_MXC_EDID is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_L4F00242T03=y -CONFIG_LCD_PLATFORM=y +# CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_GENERIC is not set CONFIG_BACKLIGHT_PWM=y CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y CONFIG_SOUND=y CONFIG_SND=y -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set CONFIG_SND_USB_AUDIO=m CONFIG_SND_SOC=y CONFIG_SND_SOC_FSL_ASRC=y CONFIG_SND_SOC_FSL_SAI=y +CONFIG_SND_SOC_FSL_SPDIF=y +CONFIG_SND_SOC_IMX_AUDMUX=y CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_IMX_SPDIF=y -CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SOC_SGTL5000=y CONFIG_SND_SIMPLE_CARD=y CONFIG_HIDRAW=y CONFIG_HID_MULTITOUCH=m @@ -356,9 +286,7 @@ CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MXC_IPU=y CONFIG_MXC_SIM=y -CONFIG_MXC_MIPI_CSI2=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y @@ -369,19 +297,16 @@ CONFIG_LEDS_TRIGGER_ONESHOT=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_SNVS=y CONFIG_DMADEVICES=y -CONFIG_IMX_SDMA=y +CONFIG_IMX_SDMA=m CONFIG_MXS_DMA=y CONFIG_MXC_PXP_V2=y CONFIG_MXC_PXP_V3=y -# CONFIG_MX3_IPU is not set CONFIG_STAGING=y -CONFIG_STMPE_ADC=y +CONFIG_R8188EU=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXTCON_USB_GPIO=y CONFIG_IIO=y @@ -399,24 +324,12 @@ CONFIG_AUTOFS4_FS=y CONFIG_FUSE_FS=y CONFIG_CUSE=y CONFIG_OVERLAY_FS=y -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=y CONFIG_NTFS_FS=y CONFIG_NTFS_RW=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_UBIFS_FS=y -CONFIG_SQUASHFS=m -CONFIG_SQUASHFS_FILE_DIRECT=y -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_LZ4=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y @@ -428,17 +341,13 @@ CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_FS=y -CONFIG_LOCKUP_DETECTOR=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10 # CONFIG_SCHED_DEBUG is not set CONFIG_STACKTRACE=y # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_FTRACE is not set -# CONFIG_ARM_UNWIND is not set CONFIG_DEBUG_USER=y CONFIG_CORESIGHT=y CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y @@ -449,11 +358,10 @@ CONFIG_SECURITYFS=y CONFIG_CRYPTO_ECDH=y CONFIG_CRYPTO_USER=y CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_PCBC=y CONFIG_CRYPTO_XTS=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_RMD128=y @@ -470,12 +378,9 @@ CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m -CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y -CONFIG_CRYPTO_DEV_MXS_DCP=y CONFIG_CRC_CCITT=y CONFIG_CRC_T10DIF=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m +CONFIG_CRC_ITU_T=m CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.9-1.0.x.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.14-2.0.x.bb index 12465a1f..0ef10758 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.9-1.0.x.bb +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.14-2.0.x.bb @@ -1,6 +1,9 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-${PV}:" + require recipes-kernel/linux/linux-imx.inc +DEPENDS += "lzop-native bc-native" + SUMMARY = "Linux kernel for Toradex Freescale i.MX based modules" SRC_URI = "git://git.toradex.com/linux-toradex.git;protocol=git;branch=${SRCBRANCH} \ @@ -9,11 +12,11 @@ SRC_URI = "git://git.toradex.com/linux-toradex.git;protocol=git;branch=${SRCBRAN # Load USB functions configurable through configfs (CONFIG_USB_CONFIGFS) KERNEL_MODULE_AUTOLOAD += "${@bb.utils.contains('COMBINED_FEATURES', 'usbgadget', ' libcomposite', '',d)}" -LOCALVERSION = "-2.8.3" PV_append = "+git${SRCPV}" -SRCREV = "07d40f6ffcbb9b3db3c146f0949725752ed61b63" -SRCBRANCH = "toradex_4.9-1.0.x-imx" +LINUX_VERSION = "4.14.159" + +SRCREV = "1f43bce17a57a29d180ab0facb83a88b1fb9c797" +SRCBRANCH = "toradex_4.14-2.0.x-imx" -DEPENDS += "lzop-native bc-native" COMPATIBLE_MACHINE = "(mx6|mx7)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb index 356aeb5f..b2e61c21 100644 --- a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb @@ -11,8 +11,10 @@ KERNEL_MODULE_AUTOLOAD += "${@bb.utils.contains('COMBINED_FEATURES', 'usbgadget' LOCALVERSION = "-2.8.3" PV_append = "+git${SRCPV}" -SRCBRANCH = "toradex_vf_4.4-next" -SRCREV = "166cb6f4a4aff202d98914fe0c5530d26ce671a5" +LINUX_VERSION = "4.4.217" + +SRCBRANCH = "toradex_vf_4.4" +SRCREV = "4a31b8a3519d5dde0eacbb088b0d45c83732535b" DEPENDS += "lzop-native bc-native" COMPATIBLE_MACHINE = "(vf)" diff --git a/bsp/meta-freescale-3rdparty/wic/lx2160acex7.wks.in b/bsp/meta-freescale-3rdparty/wic/lx2160acex7.wks.in new file mode 100644 index 00000000..8703ce41 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/wic/lx2160acex7.wks.in @@ -0,0 +1,65 @@ +# short-description: Create eMMC/SD card image with a boot partition +# long-description: +# Create an image that can be written onto an eMMC or a SD card using +# dd for use with QorIQ SoC CEX7 family. +# It uses ... +# +# Offsets: +# * RCW+PBI+BL2 at block 8 +# * PFE firmware at block 0x100 +# * FIP (BL31+BL32+BL33) at 0x800 +# * Env variables at 0x2800 +# * Secureboot headers at 0x3000 +# * DDR PHY FIP at 0x4000 +# * DPAA1 FMAN ucode at 0x4800 +# * DPAA2-MC at 0x5000 +# * DPAA2 DPL at 0x6800 +# * DPAA2 DPC at 0x7000 +# * Device tree (UEFI) at 0x7800 +# * Kernel at 0x8000 +# * Ramdisk at 0x10000 +# +# The disk layout (in blocks) used is: +# blocks KiB +# 0x0 +-----------------------+ 0x0 +# | MBR / GPT ... | +# 0x8 +-----------------------+ 0x4 +# | RCW + PBI + BL2 | +# 0x100 +-----------------------+ 0x80 +# | PFE firmware | +# 0x800 +-----------------------+ 0x400 +# | FIP (BL31+BL32+BL33) | +# 0x2800 +-----------------------+ 0x1400 +# | U-Boot Env variables | +# 0x3000 +-----------------------+ 0x1800 +# | Secureboot headers | +# 0x4000 +-----------------------+ 0x2000 +# | DDR PHY FIP | +# 0x4800 +-----------------------+ 0x2400 +# | DPAA1 FMAN ucode | +# 0x5000 +-----------------------+ 0x2800 +# | DPAA2-MC | +# 0x6800 +-----------------------+ 0x3400 +# | DPAA2 DPL | +# 0x7000 +-----------------------+ 0x3800 +# | DPAA2 DPC | +# 0x7800 +-----------------------+ 0x3c00 +# | Device tree (UEFI) | +# 0x8000 +-----------------------+ 0x4000 +# | Kernel | +# 0x10000 +-----------------------+ 0x8000 +# | Ramdisk | +# +-----------------------+ +# + +part RCW --source rawcopy --sourceparams="file=atf/bl2_auto.pbl" --ondisk mmcblk --no-table --align 4 +part FIP --source rawcopy --sourceparams="file=atf/fip_uboot.bin" --ondisk mmcblk --no-table --align 1024 +part DDR --source rawcopy --sourceparams="file=ddr-phy/fip_ddr_all.bin" --ondisk mmcblk --no-table --align 8192 +part MCFW --source rawcopy --sourceparams="file=mc_app/mc.itb" --ondisk mmcblk --no-table --align 10240 +part DPL --source rawcopy --sourceparams="file=mc-utils/dpl-eth.8x10g.19.dtb" --ondisk mmcblk --no-table --align 13312 +part DPC --source rawcopy --sourceparams="file=mc-utils/dpc-8_x_usxgmii.dtb" --ondisk mmcblk --no-table --align 14336 + +part /boot --source bootimg-partition --ondisk mmcblk --fstype=ext4 --label boot --active --align 4096 --extra-space 0 +part / --source rootfs --ondisk mmcblk --fstype=ext4 --label rootfs --align 4096 --extra-space 32 + +bootloader --ptable msdos |