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authorAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
committerAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
commitaf1a266670d040d2f4083ff309d732d648afba2a (patch)
tree2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/mach-k3/r5_mpu.c
parente02cda008591317b1625707ff8e115a4841aa889 (diff)
Add submodule dependency filesHEADmaster
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/mach-k3/r5_mpu.c')
-rw-r--r--roms/u-boot/arch/arm/mach-k3/r5_mpu.c49
1 files changed, 49 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-k3/r5_mpu.c b/roms/u-boot/arch/arm/mach-k3/r5_mpu.c
new file mode 100644
index 000000000..3d2ff6775
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-k3/r5_mpu.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * K3: R5 MPU region definitions
+ *
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla <lokeshvutla@ti.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <linux/kernel.h>
+#include "common.h"
+
+struct mpu_region_config k3_mpu_regions[16] = {
+ /*
+ * Make all 4GB as Device Memory and not executable. We are overriding
+ * it with next region for any requirement.
+ */
+ {0x00000000, REGION_0, XN_EN, PRIV_RW_USR_RW, SHARED_WRITE_BUFFERED,
+ REGION_4GB},
+
+ /* SPL code area marking it as WB and Write allocate. */
+ {CONFIG_SPL_TEXT_BASE, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+ O_I_WB_RD_WR_ALLOC, REGION_8MB},
+
+ /* U-Boot's code area marking it as WB and Write allocate */
+ {CONFIG_SYS_SDRAM_BASE, REGION_2, XN_DIS, PRIV_RW_USR_RW,
+ O_I_WB_RD_WR_ALLOC, REGION_2GB},
+ /* mcu_r5fss0_core0 BTCM area marking it as WB and Write allocate. */
+ {0x41010000, 3, XN_DIS, PRIV_RW_USR_RW, O_I_WB_RD_WR_ALLOC,
+ REGION_8MB},
+ {0x0, 4, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 5, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 6, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 7, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 8, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 9, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 10, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 11, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 12, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 13, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 14, 0x0, 0x0, 0x0, 0x0},
+ {0x0, 15, 0x0, 0x0, 0x0, 0x0},
+};
+
+void setup_k3_mpu_regions(void)
+{
+ setup_mpu_regions(k3_mpu_regions, ARRAY_SIZE(k3_mpu_regions));
+}