diff options
Diffstat (limited to 'roms/u-boot/board/ti/am65x')
| -rw-r--r-- | roms/u-boot/board/ti/am65x/Kconfig | 61 | ||||
| -rw-r--r-- | roms/u-boot/board/ti/am65x/MAINTAINERS | 9 | ||||
| -rw-r--r-- | roms/u-boot/board/ti/am65x/Makefile | 8 | ||||
| -rw-r--r-- | roms/u-boot/board/ti/am65x/README | 350 | ||||
| -rw-r--r-- | roms/u-boot/board/ti/am65x/evm.c | 375 |
5 files changed, 803 insertions, 0 deletions
diff --git a/roms/u-boot/board/ti/am65x/Kconfig b/roms/u-boot/board/ti/am65x/Kconfig new file mode 100644 index 000000000..47b41cd6a --- /dev/null +++ b/roms/u-boot/board/ti/am65x/Kconfig @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ +# Lokesh Vutla <lokeshvutla@ti.com> + +choice + prompt "K3 AM65 based boards" + optional + +config TARGET_AM654_A53_EVM + bool "TI K3 based AM654 EVM running on A53" + select ARM64 + select SOC_K3_AM6 + select SYS_DISABLE_DCACHE_OPS + select BOARD_LATE_INIT + imply TI_I2C_BOARD_DETECT + +config TARGET_AM654_R5_EVM + bool "TI K3 based AM654 EVM running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select SOC_K3_AM6 + select K3_LOAD_SYSFW + select K3_AM654_DDRSS + imply SYS_K3_SPL_ATF + imply TI_I2C_BOARD_DETECT + +endchoice + +if TARGET_AM654_A53_EVM + +config SYS_BOARD + default "am65x" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "am65x_evm" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_AM654_R5_EVM + +config SYS_BOARD + default "am65x" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "am65x_evm" + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +source "board/ti/common/Kconfig" + +endif diff --git a/roms/u-boot/board/ti/am65x/MAINTAINERS b/roms/u-boot/board/ti/am65x/MAINTAINERS new file mode 100644 index 000000000..6da4182d9 --- /dev/null +++ b/roms/u-boot/board/ti/am65x/MAINTAINERS @@ -0,0 +1,9 @@ +AM65x BOARD +M: Lokesh Vutla <lokeshvutla@ti.com> +S: Maintained +F: board/ti/am65x/ +F: include/configs/am65x_evm.h +F: configs/am65x_evm_a53_defconfig +F: configs/am65x_evm_r5_defconfig +F: configs/am65x_evm_r5_usbdfu_defconfig +F: configs/am65x_evm_r5_usbmsc_defconfig diff --git a/roms/u-boot/board/ti/am65x/Makefile b/roms/u-boot/board/ti/am65x/Makefile new file mode 100644 index 000000000..94dddfcc4 --- /dev/null +++ b/roms/u-boot/board/ti/am65x/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ +# Lokesh Vutla <lokeshvutla@ti.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := evm.o diff --git a/roms/u-boot/board/ti/am65x/README b/roms/u-boot/board/ti/am65x/README new file mode 100644 index 000000000..67081ce34 --- /dev/null +++ b/roms/u-boot/board/ti/am65x/README @@ -0,0 +1,350 @@ +Introduction: +------------- +The AM65x family of SoCs is the first device family from K3 Multicore +SoC architecture, targeted for broad market and industrial control with +aim to meet the complex processing needs of modern embedded products. + +The device is built over three domains, each containing specific processing +cores, voltage domains and peripherals: +1. Wake-up (WKUP) domain: + - Device Management and Security Controller (DMSC) +2. Microcontroller (MCU) domain: + - Dual Core ARM Cortex-R5F processor +3. MAIN domain: + - Quad core 64-bit ARM Cortex-A53 + +More info can be found in TRM: http://www.ti.com/lit/pdf/spruid7 + +Boot Flow: +---------- +On AM65x family devices, ROM supports boot only via MCU(R5). This means that +bootloader has to run on R5 core. In order to meet this constraint, and for +the following reasons the boot flow is designed as mentioned: +1. Need to move away from R5 asap, so that we want to start *any* +firmware on the r5 cores like.... autosar can be loaded to receive CAN +response and other safety operations to be started. This operation is +very time critical and is applicable for all automotive use cases. +2. U-Boot on A53 should start other remotecores for various +applications. This should happen before running Linux. +3. In production boot flow, we might not like to use full u-boot, +instead use Flacon boot flow to reduce boot time. + ++------------------------------------------------------------------------+ +| DMSC | R5 | A53 | ++------------------------------------------------------------------------+ +| +--------+ | | | +| | Reset | | | | +| +--------+ | | | +| : | | | +| +--------+ | +-----------+ | | +| | *ROM* |----------|-->| Reset rls | | | +| +--------+ | +-----------+ | | +| | | | : | | +| | ROM | | : | | +| |services| | : | | +| | | | +-------------+ | | +| | | | | *R5 ROM* | | | +| | | | +-------------+ | | +| | |<---------|---|Load and auth| | | +| | | | | tiboot3.bin | | | +| | | | +-------------+ | | +| | | | : | | +| | | | : | | +| | | | : | | +| | | | +-------------+ | | +| | | | | *R5 SPL* | | | +| | | | +-------------+ | | +| | | | | Load | | | +| | | | | sysfw.itb | | | +| | Start | | +-------------+ | | +| | System |<---------|---| Start | | | +| |Firmware| | | SYSFW | | | +| +--------+ | +-------------+ | | +| : | | | | | +| +---------+ | | Load | | | +| | *SYSFW* | | | system | | | +| +---------+ | | Config data | | | +| | |<--------|---| | | | +| | | | +-------------+ | | +| | | | | | | | +| | | | | DDR | | | +| | | | | config | | | +| | | | +-------------+ | | +| | | | | | | | +| | |<--------|---| Start A53 | | | +| | | | | and Reset | | | +| | | | +-------------+ | | +| | | | | +-----------+ | +| | |---------|-----------------------|---->| Reset rls | | +| | | | | +-----------+ | +| | DMSC | | | : | +| |Services | | | +-----------+ | +| | |<--------|-----------------------|---->|*ATF/OPTEE*| | +| | | | | +-----------+ | +| | | | | : | +| | | | | +-----------+ | +| | |<--------|-----------------------|---->| *A53 SPL* | | +| | | | | +-----------+ | +| | | | | | Load | | +| | | | | | u-boot.img| | +| | | | | +-----------+ | +| | | | | : | +| | | | | +-----------+ | +| | |<--------|-----------------------|---->| *U-Boot* | | +| | | | | +-----------+ | +| | | | | | prompt | | +| | | | | +-----------+ | +| +---------+ | | | +| | | | ++------------------------------------------------------------------------+ + +- Here DMSC acts as master and provides all the critical services. R5/A53 +requests DMSC to get these services done as shown in the above diagram. + +Sources: +-------- +1. SYSFW: + Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git + Branch: master + +2. ATF: + Tree: https://github.com/ARM-software/arm-trusted-firmware.git + Branch: master + +3. OPTEE: + Tree: https://github.com/OP-TEE/optee_os.git + Branch: master + +4. U-Boot: + Tree: http://git.denx.de/u-boot.git + Branch: master + +Build procedure: +---------------- +1. SYSFW: +$ make CROSS_COMPILE=arm-linux-gnueabihf- + +2. ATF: +$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed + +3. OPTEE: +$ make PLATFORM=k3-am65x CFG_ARM64_core=y + +4. U-Boot: + +4.1. R5: +$ make CROSS_COMPILE=arm-linux-gnueabihf- am65x_evm_r5_defconfig O=/tmp/r5 +$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 + +4.2. A53: +$ make CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53 +$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a53 + +Target Images +-------------- +Copy the below images to an SD card and boot: +- sysfw.itb from step 1 +- tiboot3.bin from step 4.1 +- tispl.bin, u-boot.img from 4.2 + +Image formats: +-------------- + +- tiboot3.bin: + +-----------------------+ + | X.509 | + | Certificate | + | +-------------------+ | + | | | | + | | R5 | | + | | u-boot-spl.bin | | + | | | | + | +-------------------+ | + | | | | + | | FIT header | | + | | +---------------+ | | + | | | | | | + | | | DTB 1...N | | | + | | +---------------+ | | + | +-------------------+ | + +-----------------------+ + +- tispl.bin + +-----------------------+ + | | + | FIT HEADER | + | +-------------------+ | + | | | | + | | A53 ATF | | + | +-------------------+ | + | | | | + | | A53 OPTEE | | + | +-------------------+ | + | | | | + | | A53 SPL | | + | +-------------------+ | + | | | | + | | SPL DTB 1...N | | + | +-------------------+ | + +-----------------------+ + +- sysfw.itb + +-----------------------+ + | | + | FIT HEADER | + | +-------------------+ | + | | | | + | | sysfw.bin | | + | +-------------------+ | + | | | | + | | board config | | + | +-------------------+ | + | | | | + | | PM config | | + | +-------------------+ | + | | | | + | | RM config | | + | +-------------------+ | + | | | | + | | Secure config | | + | +-------------------+ | + +-----------------------+ + +eMMC: +----- +ROM supports booting from eMMC from boot0 partition offset 0x0 + +Flashing images to eMMC: + +The following commands can be used to download tiboot3.bin, tispl.bin, +u-boot.img, and sysfw.itb from an SD card and write them to the eMMC boot0 +partition at respective addresses. + +=> mmc dev 0 1 +=> fatload mmc 1 ${loadaddr} tiboot3.bin +=> mmc write ${loadaddr} 0x0 0x400 +=> fatload mmc 1 ${loadaddr} tispl.bin +=> mmc write ${loadaddr} 0x400 0x1000 +=> fatload mmc 1 ${loadaddr} u-boot.img +=> mmc write ${loadaddr} 0x1400 0x2000 +=> fatload mmc 1 ${loadaddr} sysfw.itb +=> mmc write ${loadaddr} 0x3600 0x800 + +To give the ROM access to the boot partition, the following commands must be +used for the first time: +=> mmc partconf 0 1 1 1 +=> mmc bootbus 0 1 0 0 + +To create a software partition for the rootfs, the following command can be +used: +=> gpt write mmc 0 ${partitions} + +eMMC layout: + + boot0 partition (8 MB) user partition + 0x0+----------------------------------+ 0x0+-------------------------+ + | tiboot3.bin (512 KB) | | | + 0x400+----------------------------------+ | | + | tispl.bin (2 MB) | | | +0x1400+----------------------------------+ | rootfs | + | u-boot.img (4 MB) | | | +0x3400+----------------------------------+ | | + | environment (128 KB) | | | +0x3500+----------------------------------+ | | + | backup environment (128 KB) | | | +0x3600+----------------------------------+ | | + | sysfw (1 MB) | | | +0x3E00+----------------------------------+ +-------------------------+ + +Kernel image and DT are expected to be present in the /boot folder of rootfs. +To boot kernel from eMMC, use the following commands: +=> setenv mmcdev 0 +=> setenv bootpart 0 +=> boot + +OSPI: +----- +ROM supports booting from OSPI from offset 0x0. + +Flashing images to OSPI: + +Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img, +and sysfw.itb over tftp and then flash those to OSPI at their respective +addresses. + +=> sf probe +=> tftp ${loadaddr} tiboot3.bin +=> sf update $loadaddr 0x0 $filesize +=> tftp ${loadaddr} tispl.bin +=> sf update $loadaddr 0x80000 $filesize +=> tftp ${loadaddr} u-boot.img +=> sf update $loadaddr 0x280000 $filesize +=> tftp ${loadaddr} sysfw.itb +=> sf update $loadaddr 0x6C0000 $filesize + +Flash layout for OSPI: + + 0x0 +----------------------------+ + | ospi.tiboot3(512K) | + | | + 0x80000 +----------------------------+ + | ospi.tispl(2M) | + | | + 0x280000 +----------------------------+ + | ospi.u-boot(4M) | + | | + 0x680000 +----------------------------+ + | ospi.env(128K) | + | | + 0x6A0000 +----------------------------+ + | ospi.env.backup (128K) | + | | + 0x6C0000 +----------------------------+ + | ospi.sysfw(1M) | + | | + 0x7C0000 +----------------------------+ + | padding (256k) | + 0x800000 +----------------------------+ + | ospi.rootfs(UBIFS) | + | | + +----------------------------+ + +Kernel Image and DT are expected to be present in the /boot folder of UBIFS +ospi.rootfs just like in SD card case. U-Boot looks for UBI volume named +"rootfs" for rootfs. + +To boot kernel from OSPI, at the U-Boot prompt: +=> setenv boot ubi +=> boot + +UART: +----- +ROM supports booting from MCU_UART0 via X-Modem protocol. The entire UART-based +boot process up to U-Boot (proper) prompt goes through different stages and uses +different UART peripherals as follows: + + WHO | Loading WHAT | HW Module | Protocol +----------+---------------+-------------+------------ +Boot ROM | tiboot3.bin | MCU_UART0 | X-Modem(*) +R5 SPL | sysfw.itb | MCU_UART0 | Y-Modem(*) +R5 SPL | tispl.bin | MAIN_UART0 | Y-Modem +A53 SPL | u-boot.img | MAIN_UART0 | Y-Modem + +(*) Note that in addition to X/Y-Modem related protocol timeouts the DMSC + watchdog timeout of 3min (typ.) needs to be observed until System Firmware + is fully loaded (from sysfw.itb) and started. + +Example bash script sequence for running on a Linux host PC feeding all boot +artifacts needed to the device: + +MCU_DEV=/dev/ttyUSB1 +MAIN_DEV=/dev/ttyUSB0 + +stty -F $MCU_DEV 115200 cs8 -cstopb -parenb +stty -F $MAIN_DEV 115200 cs8 -cstopb -parenb + +sb --xmodem tiboot3.bin > $MCU_DEV < $MCU_DEV +sb --ymodem sysfw.itb > $MCU_DEV < $MCU_DEV +sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV +sleep 1 +sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV diff --git a/roms/u-boot/board/ti/am65x/evm.c b/roms/u-boot/board/ti/am65x/evm.c new file mode 100644 index 000000000..fbe33cbea --- /dev/null +++ b/roms/u-boot/board/ti/am65x/evm.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board specific initialization for AM654 EVM + * + * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Lokesh Vutla <lokeshvutla@ti.com> + * + */ + +#include <common.h> +#include <dm.h> +#include <fdt_support.h> +#include <image.h> +#include <init.h> +#include <net.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/global_data.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/omap_common.h> +#include <env.h> +#include <spl.h> +#include <asm/arch/sys_proto.h> + +#include "../common/board_detect.h" + +#define board_is_am65x_base_board() board_ti_is("AM6-COMPROCEVM") + +/* Daughter card presence detection signals */ +enum { + AM65X_EVM_APP_BRD_DET, + AM65X_EVM_LCD_BRD_DET, + AM65X_EVM_SERDES_BRD_DET, + AM65X_EVM_HDMI_GPMC_BRD_DET, + AM65X_EVM_BRD_DET_COUNT, +}; + +/* Max number of MAC addresses that are parsed/processed per daughter card */ +#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8 + +/* Regiter that controls the SERDES0 lane and clock assignment */ +#define CTRLMMR_SERDES0_CTRL 0x00104080 +#define PCIE_LANE0 0x1 + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ +#ifdef CONFIG_PHYS_64BIT + gd->ram_size = 0x100000000; +#else + gd->ram_size = 0x80000000; +#endif + + return 0; +} + +ulong board_get_usable_ram_top(ulong total_size) +{ +#ifdef CONFIG_PHYS_64BIT + /* Limit RAM used by U-Boot to the DDR low region */ + if (gd->ram_top > 0x100000000) + return 0x100000000; +#endif + + return gd->ram_top; +} + +int dram_init_banksize(void) +{ + /* Bank 0 declares the memory available in the DDR low region */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = 0x80000000; + gd->ram_size = 0x80000000; + +#ifdef CONFIG_PHYS_64BIT + /* Bank 1 declares the memory available in the DDR high region */ + gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].size = 0x80000000; + gd->ram_size = 0x100000000; +#endif + + return 0; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ +#ifdef CONFIG_TARGET_AM654_A53_EVM + if (!strcmp(name, "k3-am654-base-board")) + return 0; +#endif + + return -1; +} +#endif + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + int ret; + + ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000"); + if (ret < 0) + ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000", + "sram@70000000"); + if (ret) { + printf("%s: fixing up msmc ram failed %d\n", __func__, ret); + return ret; + } + +#if defined(CONFIG_TI_SECURE_DEVICE) + /* Make Crypto HW reserved for secure world use */ + ret = fdt_disable_node(blob, "/bus@100000/crypto@4e00000"); + if (ret < 0) + ret = fdt_disable_node(blob, + "/interconnect@100000/crypto@4E00000"); + if (ret) + printf("%s: disabling SA2UL failed %d\n", __func__, ret); +#endif + + return 0; +} +#endif + +int do_board_detect(void) +{ + int ret; + + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS); + if (ret) + pr_err("Reading on-board EEPROM at 0x%02x failed %d\n", + CONFIG_EEPROM_CHIP_ADDRESS, ret); + + return ret; +} + +int checkboard(void) +{ + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA; + + if (do_board_detect()) + /* EEPROM not populated */ + printf("Board: %s rev %s\n", "AM6-COMPROCEVM", "E3"); + else + printf("Board: %s rev %s\n", ep->name, ep->version); + + return 0; +} + +static void setup_board_eeprom_env(void) +{ + char *name = "am65x"; + + if (do_board_detect()) + goto invalid_eeprom; + + if (board_is_am65x_base_board()) + name = "am65x"; + else + printf("Unidentified board claims %s in eeprom header\n", + board_ti_get_name()); + +invalid_eeprom: + set_board_info_env_am6(name); +} + +static int init_daughtercard_det_gpio(char *gpio_name, struct gpio_desc *desc) +{ + int ret; + + memset(desc, 0, sizeof(*desc)); + + ret = dm_gpio_lookup_name(gpio_name, desc); + if (ret < 0) + return ret; + + /* Request GPIO, simply re-using the name as label */ + ret = dm_gpio_request(desc, gpio_name); + if (ret < 0) + return ret; + + return dm_gpio_set_dir_flags(desc, GPIOD_IS_IN); +} + +static int probe_daughtercards(void) +{ + struct ti_am6_eeprom ep; + struct gpio_desc board_det_gpios[AM65X_EVM_BRD_DET_COUNT]; + char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN]; + u8 mac_addr_cnt; + char name_overlays[1024] = { 0 }; + int i, j; + int ret; + + /* + * Daughter card presence detection signal name to GPIO (via I2C I/O + * expander @ address 0x38) name and EEPROM I2C address mapping. + */ + const struct { + char *gpio_name; + u8 i2c_addr; + } slot_map[AM65X_EVM_BRD_DET_COUNT] = { + { "gpio@38_0", 0x52, }, /* AM65X_EVM_APP_BRD_DET */ + { "gpio@38_1", 0x55, }, /* AM65X_EVM_LCD_BRD_DET */ + { "gpio@38_2", 0x54, }, /* AM65X_EVM_SERDES_BRD_DET */ + { "gpio@38_3", 0x53, }, /* AM65X_EVM_HDMI_GPMC_BRD_DET */ + }; + + /* Declaration of daughtercards to probe */ + const struct { + u8 slot_index; /* Slot the card is installed */ + char *card_name; /* EEPROM-programmed card name */ + char *dtbo_name; /* Device tree overlay to apply */ + u8 eth_offset; /* ethXaddr MAC address index offset */ + } cards[] = { + { + AM65X_EVM_APP_BRD_DET, + "AM6-GPAPPEVM", + "k3-am654-gp.dtbo", + 0, + }, + { + AM65X_EVM_APP_BRD_DET, + "AM6-IDKAPPEVM", + "k3-am654-idk.dtbo", + 3, + }, + { + AM65X_EVM_SERDES_BRD_DET, + "SER-PCIE2LEVM", + "k3-am654-pcie-usb2.dtbo", + 0, + }, + { + AM65X_EVM_SERDES_BRD_DET, + "SER-PCIEUSBEVM", + "k3-am654-pcie-usb3.dtbo", + 0, + }, + { + AM65X_EVM_LCD_BRD_DET, + "OLDI-LCD1EVM", + "k3-am654-evm-oldi-lcd1evm.dtbo", + 0, + }, + }; + + /* + * Initialize GPIO used for daughtercard slot presence detection and + * keep the resulting handles in local array for easier access. + */ + for (i = 0; i < AM65X_EVM_BRD_DET_COUNT; i++) { + ret = init_daughtercard_det_gpio(slot_map[i].gpio_name, + &board_det_gpios[i]); + if (ret < 0) + return ret; + } + + for (i = 0; i < ARRAY_SIZE(cards); i++) { + /* Obtain card-specific slot index and associated I2C address */ + u8 slot_index = cards[i].slot_index; + u8 i2c_addr = slot_map[slot_index].i2c_addr; + + /* + * The presence detection signal is active-low, hence skip + * over this card slot if anything other than 0 is returned. + */ + ret = dm_gpio_get_value(&board_det_gpios[slot_index]); + if (ret < 0) + return ret; + else if (ret) + continue; + + /* Get and parse the daughter card EEPROM record */ + ret = ti_i2c_eeprom_am6_get(CONFIG_EEPROM_BUS_ADDRESS, i2c_addr, + &ep, + (char **)mac_addr, + DAUGHTER_CARD_NO_OF_MAC_ADDR, + &mac_addr_cnt); + if (ret) { + pr_err("Reading daughtercard EEPROM at 0x%02x failed %d\n", + i2c_addr, ret); + /* + * Even this is pretty serious let's just skip over + * this particular daughtercard, rather than ending + * the probing process altogether. + */ + continue; + } + + /* Only process the parsed data if we found a match */ + if (strncmp(ep.name, cards[i].card_name, sizeof(ep.name))) + continue; + + printf("Detected: %s rev %s\n", ep.name, ep.version); + + /* + * Populate any MAC addresses from daughtercard into the U-Boot + * environment, starting with a card-specific offset so we can + * have multiple cards contribute to the MAC pool in a well- + * defined manner. + */ + for (j = 0; j < mac_addr_cnt; j++) { + if (!is_valid_ethaddr((u8 *)mac_addr[j])) + continue; + + eth_env_set_enetaddr_by_index("eth", + cards[i].eth_offset + j, + (uchar *)mac_addr[j]); + } + + /* + * It has been observed that setting SERDES0 lane mux to USB prevents USB + * 2.0 operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is + * used in USB 2.0 only mode solves this issue. For USB3.0+2.0 operation + * this issue is not present. + * + * Implement this workaround by writing 1 to LANE_FUNC_SEL field in + * CTRLMMR_SERDES0_CTRL register. + */ + if (!strncmp(ep.name, "SER-PCIE2LEVM", sizeof(ep.name))) + writel(PCIE_LANE0, CTRLMMR_SERDES0_CTRL); + + /* Skip if no overlays are to be added */ + if (!strlen(cards[i].dtbo_name)) + continue; + + /* + * Make sure we are not running out of buffer space by checking + * if we can fit the new overlay, a trailing space to be used + * as a separator, plus the terminating zero. + */ + if (strlen(name_overlays) + strlen(cards[i].dtbo_name) + 2 > + sizeof(name_overlays)) + return -ENOMEM; + + /* Append to our list of overlays */ + strcat(name_overlays, cards[i].dtbo_name); + strcat(name_overlays, " "); + } + + /* Apply device tree overlay(s) to the U-Boot environment, if any */ + if (strlen(name_overlays)) + return env_set("name_overlays", name_overlays); + + return 0; +} + +int board_late_init(void) +{ + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA; + + setup_board_eeprom_env(); + + /* + * The first MAC address for ethernet a.k.a. ethernet0 comes from + * efuse populated via the am654 gigabit eth switch subsystem driver. + * All the other ones are populated via EEPROM, hence continue with + * an index of 1. + */ + board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt); + + /* Check for and probe any plugged-in daughtercards */ + probe_daughtercards(); + + return 0; +} |